ohci.c revision 1.116
1 /* $NetBSD: ohci.c,v 1.116 2001/11/21 08:18:40 augustss Exp $ */ 2 /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */ 3 4 /* 5 * Copyright (c) 1998 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Lennart Augustsson (lennart (at) augustsson.net) at 10 * Carlstedt Research & Technology. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. All advertising materials mentioning features or use of this software 21 * must display the following acknowledgement: 22 * This product includes software developed by the NetBSD 23 * Foundation, Inc. and its contributors. 24 * 4. Neither the name of The NetBSD Foundation nor the names of its 25 * contributors may be used to endorse or promote products derived 26 * from this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 29 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 30 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 31 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 32 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 33 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 34 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 35 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 36 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 37 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 * POSSIBILITY OF SUCH DAMAGE. 39 */ 40 41 /* 42 * USB Open Host Controller driver. 43 * 44 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html 45 * USB spec: http://www.usb.org/developers/data/usbspec.zip 46 */ 47 48 #include <sys/cdefs.h> 49 __KERNEL_RCSID(0, "$NetBSD: ohci.c,v 1.116 2001/11/21 08:18:40 augustss Exp $"); 50 51 #include <sys/param.h> 52 #include <sys/systm.h> 53 #include <sys/malloc.h> 54 #if defined(__NetBSD__) || defined(__OpenBSD__) 55 #include <sys/kernel.h> 56 #include <sys/device.h> 57 #include <sys/select.h> 58 #elif defined(__FreeBSD__) 59 #include <sys/module.h> 60 #include <sys/bus.h> 61 #include <machine/bus_pio.h> 62 #include <machine/bus_memio.h> 63 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 64 #include <machine/cpu.h> 65 #endif 66 #endif 67 #include <sys/proc.h> 68 #include <sys/queue.h> 69 70 #include <machine/bus.h> 71 #include <machine/endian.h> 72 73 #include <dev/usb/usb.h> 74 #include <dev/usb/usbdi.h> 75 #include <dev/usb/usbdivar.h> 76 #include <dev/usb/usb_mem.h> 77 #include <dev/usb/usb_quirks.h> 78 79 #include <dev/usb/ohcireg.h> 80 #include <dev/usb/ohcivar.h> 81 82 #if defined(__FreeBSD__) 83 #include <machine/clock.h> 84 85 #define delay(d) DELAY(d) 86 #endif 87 88 #if defined(__OpenBSD__) 89 struct cfdriver ohci_cd = { 90 NULL, "ohci", DV_DULL 91 }; 92 #endif 93 94 #ifdef OHCI_DEBUG 95 #define DPRINTF(x) if (ohcidebug) logprintf x 96 #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x 97 int ohcidebug = 0; 98 #ifndef __NetBSD__ 99 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 100 #endif 101 #else 102 #define DPRINTF(x) 103 #define DPRINTFN(n,x) 104 #endif 105 106 /* 107 * The OHCI controller is little endian, so on big endian machines 108 * the data strored in memory needs to be swapped. 109 */ 110 #if defined(__FreeBSD__) || defined(__OpenBSD__) 111 #if BYTE_ORDER == BIG_ENDIAN 112 #define htole32(x) (bswap32(x)) 113 #define le32toh(x) (bswap32(x)) 114 #else 115 #define htole32(x) (x) 116 #define le32toh(x) (x) 117 #endif 118 #endif 119 120 struct ohci_pipe; 121 122 Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *); 123 Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *); 124 125 Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *); 126 Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *); 127 128 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *); 129 Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *); 130 131 #if 0 132 Static void ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *, 133 ohci_soft_td_t *); 134 #endif 135 Static usbd_status ohci_alloc_std_chain(struct ohci_pipe *, 136 ohci_softc_t *, int, int, usbd_xfer_handle, 137 ohci_soft_td_t *, ohci_soft_td_t **); 138 139 Static void ohci_shutdown(void *v); 140 Static void ohci_power(int, void *); 141 Static usbd_status ohci_open(usbd_pipe_handle); 142 Static void ohci_poll(struct usbd_bus *); 143 Static void ohci_softintr(void *); 144 Static void ohci_waitintr(ohci_softc_t *, usbd_xfer_handle); 145 Static void ohci_add_done(ohci_softc_t *, ohci_physaddr_t); 146 Static void ohci_rhsc(ohci_softc_t *, usbd_xfer_handle); 147 148 Static usbd_status ohci_device_request(usbd_xfer_handle xfer); 149 Static void ohci_add_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 150 Static void ohci_rem_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 151 Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *); 152 Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *); 153 Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t); 154 Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *); 155 Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *); 156 Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t); 157 158 Static usbd_status ohci_setup_isoc(usbd_pipe_handle pipe); 159 Static void ohci_device_isoc_enter(usbd_xfer_handle); 160 161 Static usbd_status ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 162 Static void ohci_freem(struct usbd_bus *, usb_dma_t *); 163 164 Static usbd_xfer_handle ohci_allocx(struct usbd_bus *); 165 Static void ohci_freex(struct usbd_bus *, usbd_xfer_handle); 166 167 Static usbd_status ohci_root_ctrl_transfer(usbd_xfer_handle); 168 Static usbd_status ohci_root_ctrl_start(usbd_xfer_handle); 169 Static void ohci_root_ctrl_abort(usbd_xfer_handle); 170 Static void ohci_root_ctrl_close(usbd_pipe_handle); 171 Static void ohci_root_ctrl_done(usbd_xfer_handle); 172 173 Static usbd_status ohci_root_intr_transfer(usbd_xfer_handle); 174 Static usbd_status ohci_root_intr_start(usbd_xfer_handle); 175 Static void ohci_root_intr_abort(usbd_xfer_handle); 176 Static void ohci_root_intr_close(usbd_pipe_handle); 177 Static void ohci_root_intr_done(usbd_xfer_handle); 178 179 Static usbd_status ohci_device_ctrl_transfer(usbd_xfer_handle); 180 Static usbd_status ohci_device_ctrl_start(usbd_xfer_handle); 181 Static void ohci_device_ctrl_abort(usbd_xfer_handle); 182 Static void ohci_device_ctrl_close(usbd_pipe_handle); 183 Static void ohci_device_ctrl_done(usbd_xfer_handle); 184 185 Static usbd_status ohci_device_bulk_transfer(usbd_xfer_handle); 186 Static usbd_status ohci_device_bulk_start(usbd_xfer_handle); 187 Static void ohci_device_bulk_abort(usbd_xfer_handle); 188 Static void ohci_device_bulk_close(usbd_pipe_handle); 189 Static void ohci_device_bulk_done(usbd_xfer_handle); 190 191 Static usbd_status ohci_device_intr_transfer(usbd_xfer_handle); 192 Static usbd_status ohci_device_intr_start(usbd_xfer_handle); 193 Static void ohci_device_intr_abort(usbd_xfer_handle); 194 Static void ohci_device_intr_close(usbd_pipe_handle); 195 Static void ohci_device_intr_done(usbd_xfer_handle); 196 197 Static usbd_status ohci_device_isoc_transfer(usbd_xfer_handle); 198 Static usbd_status ohci_device_isoc_start(usbd_xfer_handle); 199 Static void ohci_device_isoc_abort(usbd_xfer_handle); 200 Static void ohci_device_isoc_close(usbd_pipe_handle); 201 Static void ohci_device_isoc_done(usbd_xfer_handle); 202 203 Static usbd_status ohci_device_setintr(ohci_softc_t *sc, 204 struct ohci_pipe *pipe, int ival); 205 206 Static int ohci_str(usb_string_descriptor_t *, int, char *); 207 208 Static void ohci_timeout(void *); 209 Static void ohci_timeout_task(void *); 210 Static void ohci_rhsc_able(ohci_softc_t *, int); 211 Static void ohci_rhsc_enable(void *); 212 213 Static void ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *); 214 Static void ohci_abort_xfer(usbd_xfer_handle, usbd_status); 215 216 Static void ohci_device_clear_toggle(usbd_pipe_handle pipe); 217 Static void ohci_noop(usbd_pipe_handle pipe); 218 219 #ifdef OHCI_DEBUG 220 Static void ohci_dumpregs(ohci_softc_t *); 221 Static void ohci_dump_tds(ohci_soft_td_t *); 222 Static void ohci_dump_td(ohci_soft_td_t *); 223 Static void ohci_dump_ed(ohci_soft_ed_t *); 224 Static void ohci_dump_itd(ohci_soft_itd_t *); 225 Static void ohci_dump_itds(ohci_soft_itd_t *); 226 #endif 227 228 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 229 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 230 #define OWRITE1(sc, r, x) \ 231 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 232 #define OWRITE2(sc, r, x) \ 233 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 234 #define OWRITE4(sc, r, x) \ 235 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 236 #define OREAD1(sc, r) (OBARR(sc), bus_space_read_1((sc)->iot, (sc)->ioh, (r))) 237 #define OREAD2(sc, r) (OBARR(sc), bus_space_read_2((sc)->iot, (sc)->ioh, (r))) 238 #define OREAD4(sc, r) (OBARR(sc), bus_space_read_4((sc)->iot, (sc)->ioh, (r))) 239 240 /* Reverse the bits in a value 0 .. 31 */ 241 Static u_int8_t revbits[OHCI_NO_INTRS] = 242 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 243 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 244 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 245 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 246 247 struct ohci_pipe { 248 struct usbd_pipe pipe; 249 ohci_soft_ed_t *sed; 250 union { 251 ohci_soft_td_t *td; 252 ohci_soft_itd_t *itd; 253 } tail; 254 /* Info needed for different pipe kinds. */ 255 union { 256 /* Control pipe */ 257 struct { 258 usb_dma_t reqdma; 259 u_int length; 260 ohci_soft_td_t *setup, *data, *stat; 261 } ctl; 262 /* Interrupt pipe */ 263 struct { 264 int nslots; 265 int pos; 266 } intr; 267 /* Bulk pipe */ 268 struct { 269 u_int length; 270 int isread; 271 } bulk; 272 /* Iso pipe */ 273 struct iso { 274 int next, inuse; 275 } iso; 276 } u; 277 }; 278 279 #define OHCI_INTR_ENDPT 1 280 281 Static struct usbd_bus_methods ohci_bus_methods = { 282 ohci_open, 283 ohci_softintr, 284 ohci_poll, 285 ohci_allocm, 286 ohci_freem, 287 ohci_allocx, 288 ohci_freex, 289 }; 290 291 Static struct usbd_pipe_methods ohci_root_ctrl_methods = { 292 ohci_root_ctrl_transfer, 293 ohci_root_ctrl_start, 294 ohci_root_ctrl_abort, 295 ohci_root_ctrl_close, 296 ohci_noop, 297 ohci_root_ctrl_done, 298 }; 299 300 Static struct usbd_pipe_methods ohci_root_intr_methods = { 301 ohci_root_intr_transfer, 302 ohci_root_intr_start, 303 ohci_root_intr_abort, 304 ohci_root_intr_close, 305 ohci_noop, 306 ohci_root_intr_done, 307 }; 308 309 Static struct usbd_pipe_methods ohci_device_ctrl_methods = { 310 ohci_device_ctrl_transfer, 311 ohci_device_ctrl_start, 312 ohci_device_ctrl_abort, 313 ohci_device_ctrl_close, 314 ohci_noop, 315 ohci_device_ctrl_done, 316 }; 317 318 Static struct usbd_pipe_methods ohci_device_intr_methods = { 319 ohci_device_intr_transfer, 320 ohci_device_intr_start, 321 ohci_device_intr_abort, 322 ohci_device_intr_close, 323 ohci_device_clear_toggle, 324 ohci_device_intr_done, 325 }; 326 327 Static struct usbd_pipe_methods ohci_device_bulk_methods = { 328 ohci_device_bulk_transfer, 329 ohci_device_bulk_start, 330 ohci_device_bulk_abort, 331 ohci_device_bulk_close, 332 ohci_device_clear_toggle, 333 ohci_device_bulk_done, 334 }; 335 336 Static struct usbd_pipe_methods ohci_device_isoc_methods = { 337 ohci_device_isoc_transfer, 338 ohci_device_isoc_start, 339 ohci_device_isoc_abort, 340 ohci_device_isoc_close, 341 ohci_noop, 342 ohci_device_isoc_done, 343 }; 344 345 #if defined(__NetBSD__) || defined(__OpenBSD__) 346 int 347 ohci_activate(device_ptr_t self, enum devact act) 348 { 349 struct ohci_softc *sc = (struct ohci_softc *)self; 350 int rv = 0; 351 352 switch (act) { 353 case DVACT_ACTIVATE: 354 return (EOPNOTSUPP); 355 break; 356 357 case DVACT_DEACTIVATE: 358 if (sc->sc_child != NULL) 359 rv = config_deactivate(sc->sc_child); 360 sc->sc_dying = 1; 361 break; 362 } 363 return (rv); 364 } 365 366 int 367 ohci_detach(struct ohci_softc *sc, int flags) 368 { 369 int rv = 0; 370 371 if (sc->sc_child != NULL) 372 rv = config_detach(sc->sc_child, flags); 373 374 if (rv != 0) 375 return (rv); 376 377 usb_uncallout(sc->sc_tmo_rhsc, ohci_rhsc_enable, sc); 378 379 #if defined(__NetBSD__) || defined(__OpenBSD__) 380 powerhook_disestablish(sc->sc_powerhook); 381 shutdownhook_disestablish(sc->sc_shutdownhook); 382 #endif 383 384 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 385 386 /* free data structures XXX */ 387 388 return (rv); 389 } 390 #endif 391 392 ohci_soft_ed_t * 393 ohci_alloc_sed(ohci_softc_t *sc) 394 { 395 ohci_soft_ed_t *sed; 396 usbd_status err; 397 int i, offs; 398 usb_dma_t dma; 399 400 if (sc->sc_freeeds == NULL) { 401 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 402 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 403 OHCI_ED_ALIGN, &dma); 404 if (err) 405 return (0); 406 for(i = 0; i < OHCI_SED_CHUNK; i++) { 407 offs = i * OHCI_SED_SIZE; 408 sed = (ohci_soft_ed_t *)((char *)KERNADDR(&dma) +offs); 409 sed->physaddr = DMAADDR(&dma) + offs; 410 sed->next = sc->sc_freeeds; 411 sc->sc_freeeds = sed; 412 } 413 } 414 sed = sc->sc_freeeds; 415 sc->sc_freeeds = sed->next; 416 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 417 sed->next = 0; 418 return (sed); 419 } 420 421 void 422 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 423 { 424 sed->next = sc->sc_freeeds; 425 sc->sc_freeeds = sed; 426 } 427 428 ohci_soft_td_t * 429 ohci_alloc_std(ohci_softc_t *sc) 430 { 431 ohci_soft_td_t *std; 432 usbd_status err; 433 int i, offs; 434 usb_dma_t dma; 435 int s; 436 437 if (sc->sc_freetds == NULL) { 438 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 439 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 440 OHCI_TD_ALIGN, &dma); 441 if (err) 442 return (NULL); 443 s = splusb(); 444 for(i = 0; i < OHCI_STD_CHUNK; i++) { 445 offs = i * OHCI_STD_SIZE; 446 std = (ohci_soft_td_t *)((char *)KERNADDR(&dma) +offs); 447 std->physaddr = DMAADDR(&dma) + offs; 448 std->nexttd = sc->sc_freetds; 449 sc->sc_freetds = std; 450 } 451 splx(s); 452 } 453 454 s = splusb(); 455 std = sc->sc_freetds; 456 sc->sc_freetds = std->nexttd; 457 memset(&std->td, 0, sizeof(ohci_td_t)); 458 std->nexttd = NULL; 459 std->xfer = NULL; 460 ohci_hash_add_td(sc, std); 461 splx(s); 462 463 return (std); 464 } 465 466 void 467 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std) 468 { 469 int s; 470 471 s = splusb(); 472 ohci_hash_rem_td(sc, std); 473 std->nexttd = sc->sc_freetds; 474 sc->sc_freetds = std; 475 splx(s); 476 } 477 478 usbd_status 479 ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc, 480 int alen, int rd, usbd_xfer_handle xfer, 481 ohci_soft_td_t *sp, ohci_soft_td_t **ep) 482 { 483 ohci_soft_td_t *next, *cur; 484 ohci_physaddr_t dataphys, dataphysend; 485 u_int32_t tdflags; 486 int len, curlen; 487 usb_dma_t *dma = &xfer->dmabuf; 488 u_int16_t flags = xfer->flags; 489 490 DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen)); 491 492 len = alen; 493 cur = sp; 494 dataphys = DMAADDR(dma); 495 dataphysend = OHCI_PAGE(dataphys + len - 1); 496 tdflags = htole32( 497 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 498 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) | 499 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR); 500 501 for (;;) { 502 next = ohci_alloc_std(sc); 503 if (next == NULL) 504 goto nomem; 505 506 /* The OHCI hardware can handle at most one page crossing. */ 507 if (OHCI_PAGE(dataphys) == dataphysend || 508 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) { 509 /* we can handle it in this TD */ 510 curlen = len; 511 } else { 512 /* must use multiple TDs, fill as much as possible. */ 513 curlen = 2 * OHCI_PAGE_SIZE - 514 (dataphys & (OHCI_PAGE_SIZE-1)); 515 /* the length must be a multiple of the max size */ 516 curlen -= curlen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize); 517 #ifdef DIAGNOSTIC 518 if (curlen == 0) 519 panic("ohci_alloc_std: curlen == 0\n"); 520 #endif 521 } 522 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x " 523 "dataphysend=0x%08x len=%d curlen=%d\n", 524 dataphys, dataphysend, 525 len, curlen)); 526 len -= curlen; 527 528 cur->td.td_flags = tdflags; 529 cur->td.td_cbp = htole32(dataphys); 530 cur->nexttd = next; 531 cur->td.td_nexttd = htole32(next->physaddr); 532 cur->td.td_be = htole32(dataphys + curlen - 1); 533 cur->len = curlen; 534 cur->flags = OHCI_ADD_LEN; 535 cur->xfer = xfer; 536 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n", 537 dataphys, dataphys + curlen - 1)); 538 if (len == 0) 539 break; 540 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n")); 541 dataphys += curlen; 542 cur = next; 543 } 544 if ((flags & USBD_FORCE_SHORT_XFER) && 545 alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) { 546 /* Force a 0 length transfer at the end. */ 547 548 cur = next; 549 next = ohci_alloc_std(sc); 550 if (next == NULL) 551 goto nomem; 552 553 cur->td.td_flags = tdflags; 554 cur->td.td_cbp = 0; /* indicate 0 length packet */ 555 cur->nexttd = next; 556 cur->td.td_nexttd = htole32(next->physaddr); 557 cur->td.td_be = ~0; 558 cur->len = 0; 559 cur->flags = 0; 560 cur->xfer = xfer; 561 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n")); 562 } 563 *ep = cur; 564 565 return (USBD_NORMAL_COMPLETION); 566 567 nomem: 568 /* XXX free chain */ 569 return (USBD_NOMEM); 570 } 571 572 #if 0 573 Static void 574 ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std, 575 ohci_soft_td_t *stdend) 576 { 577 ohci_soft_td_t *p; 578 579 for (; std != stdend; std = p) { 580 p = std->nexttd; 581 ohci_free_std(sc, std); 582 } 583 } 584 #endif 585 586 ohci_soft_itd_t * 587 ohci_alloc_sitd(ohci_softc_t *sc) 588 { 589 ohci_soft_itd_t *sitd; 590 usbd_status err; 591 int i, s, offs; 592 usb_dma_t dma; 593 594 if (sc->sc_freeitds == NULL) { 595 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n")); 596 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK, 597 OHCI_ITD_ALIGN, &dma); 598 if (err) 599 return (NULL); 600 for(i = 0; i < OHCI_SITD_CHUNK; i++) { 601 offs = i * OHCI_SITD_SIZE; 602 sitd = (ohci_soft_itd_t *)((char*)KERNADDR(&dma)+offs); 603 sitd->physaddr = DMAADDR(&dma) + offs; 604 sitd->nextitd = sc->sc_freeitds; 605 sc->sc_freeitds = sitd; 606 } 607 } 608 609 s = splusb(); 610 sitd = sc->sc_freeitds; 611 sc->sc_freeitds = sitd->nextitd; 612 memset(&sitd->itd, 0, sizeof(ohci_itd_t)); 613 sitd->nextitd = NULL; 614 sitd->xfer = NULL; 615 ohci_hash_add_itd(sc, sitd); 616 splx(s); 617 618 #ifdef DIAGNOSTIC 619 sitd->isdone = 0; 620 #endif 621 622 return (sitd); 623 } 624 625 void 626 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 627 { 628 int s; 629 630 DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd)); 631 632 #ifdef DIAGNOSTIC 633 if (!sitd->isdone) { 634 panic("ohci_free_sitd: sitd=%p not done\n", sitd); 635 return; 636 } 637 #endif 638 639 s = splusb(); 640 ohci_hash_rem_itd(sc, sitd); 641 sitd->nextitd = sc->sc_freeitds; 642 sc->sc_freeitds = sitd; 643 splx(s); 644 } 645 646 usbd_status 647 ohci_init(ohci_softc_t *sc) 648 { 649 ohci_soft_ed_t *sed, *psed; 650 usbd_status err; 651 int i; 652 u_int32_t s, ctl, ival, hcr, fm, per, rev, desca; 653 654 DPRINTF(("ohci_init: start\n")); 655 #if defined(__OpenBSD__) 656 printf(","); 657 #else 658 printf("%s:", USBDEVNAME(sc->sc_bus.bdev)); 659 #endif 660 rev = OREAD4(sc, OHCI_REVISION); 661 printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev), 662 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 663 664 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 665 printf("%s: unsupported OHCI revision\n", 666 USBDEVNAME(sc->sc_bus.bdev)); 667 sc->sc_bus.usbrev = USBREV_UNKNOWN; 668 return (USBD_INVAL); 669 } 670 sc->sc_bus.usbrev = USBREV_1_0; 671 672 for (i = 0; i < OHCI_HASH_SIZE; i++) 673 LIST_INIT(&sc->sc_hash_tds[i]); 674 for (i = 0; i < OHCI_HASH_SIZE; i++) 675 LIST_INIT(&sc->sc_hash_itds[i]); 676 677 SIMPLEQ_INIT(&sc->sc_free_xfers); 678 679 /* XXX determine alignment by R/W */ 680 /* Allocate the HCCA area. */ 681 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 682 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 683 if (err) 684 return (err); 685 sc->sc_hcca = (struct ohci_hcca *)KERNADDR(&sc->sc_hccadma); 686 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 687 688 sc->sc_eintrs = OHCI_NORMAL_INTRS; 689 690 /* Allocate dummy ED that starts the control list. */ 691 sc->sc_ctrl_head = ohci_alloc_sed(sc); 692 if (sc->sc_ctrl_head == NULL) { 693 err = USBD_NOMEM; 694 goto bad1; 695 } 696 sc->sc_ctrl_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 697 698 /* Allocate dummy ED that starts the bulk list. */ 699 sc->sc_bulk_head = ohci_alloc_sed(sc); 700 if (sc->sc_bulk_head == NULL) { 701 err = USBD_NOMEM; 702 goto bad2; 703 } 704 sc->sc_bulk_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 705 706 /* Allocate dummy ED that starts the isochronous list. */ 707 sc->sc_isoc_head = ohci_alloc_sed(sc); 708 if (sc->sc_isoc_head == NULL) { 709 err = USBD_NOMEM; 710 goto bad3; 711 } 712 sc->sc_isoc_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 713 714 /* Allocate all the dummy EDs that make up the interrupt tree. */ 715 for (i = 0; i < OHCI_NO_EDS; i++) { 716 sed = ohci_alloc_sed(sc); 717 if (sed == NULL) { 718 while (--i >= 0) 719 ohci_free_sed(sc, sc->sc_eds[i]); 720 err = USBD_NOMEM; 721 goto bad4; 722 } 723 /* All ED fields are set to 0. */ 724 sc->sc_eds[i] = sed; 725 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 726 if (i != 0) 727 psed = sc->sc_eds[(i-1) / 2]; 728 else 729 psed= sc->sc_isoc_head; 730 sed->next = psed; 731 sed->ed.ed_nexted = htole32(psed->physaddr); 732 } 733 /* 734 * Fill HCCA interrupt table. The bit reversal is to get 735 * the tree set up properly to spread the interrupts. 736 */ 737 for (i = 0; i < OHCI_NO_INTRS; i++) 738 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 739 htole32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 740 741 #ifdef OHCI_DEBUG 742 if (ohcidebug > 15) { 743 for (i = 0; i < OHCI_NO_EDS; i++) { 744 printf("ed#%d ", i); 745 ohci_dump_ed(sc->sc_eds[i]); 746 } 747 printf("iso "); 748 ohci_dump_ed(sc->sc_isoc_head); 749 } 750 #endif 751 752 /* Determine in what context we are running. */ 753 ctl = OREAD4(sc, OHCI_CONTROL); 754 if (ctl & OHCI_IR) { 755 /* SMM active, request change */ 756 DPRINTF(("ohci_init: SMM active, request owner change\n")); 757 s = OREAD4(sc, OHCI_COMMAND_STATUS); 758 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 759 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 760 usb_delay_ms(&sc->sc_bus, 1); 761 ctl = OREAD4(sc, OHCI_CONTROL); 762 } 763 if ((ctl & OHCI_IR) == 0) { 764 printf("%s: SMM does not respond, resetting\n", 765 USBDEVNAME(sc->sc_bus.bdev)); 766 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 767 goto reset; 768 } 769 #if 0 770 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */ 771 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 772 /* BIOS started controller. */ 773 DPRINTF(("ohci_init: BIOS active\n")); 774 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 775 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL); 776 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 777 } 778 #endif 779 } else { 780 DPRINTF(("ohci_init: cold started\n")); 781 reset: 782 /* Controller was cold started. */ 783 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 784 } 785 786 /* 787 * This reset should not be necessary according to the OHCI spec, but 788 * without it some controllers do not start. 789 */ 790 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 791 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 792 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 793 794 /* We now own the host controller and the bus has been reset. */ 795 ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL)); 796 797 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 798 /* Nominal time for a reset is 10 us. */ 799 for (i = 0; i < 10; i++) { 800 delay(10); 801 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 802 if (!hcr) 803 break; 804 } 805 if (hcr) { 806 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 807 err = USBD_IOERROR; 808 goto bad5; 809 } 810 #ifdef OHCI_DEBUG 811 if (ohcidebug > 15) 812 ohci_dumpregs(sc); 813 #endif 814 815 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 816 817 /* Set up HC registers. */ 818 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma)); 819 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 820 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 821 /* disable all interrupts and then switch on all desired interrupts */ 822 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 823 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 824 /* switch on desired functional features */ 825 ctl = OREAD4(sc, OHCI_CONTROL); 826 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 827 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 828 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL; 829 /* And finally start it! */ 830 OWRITE4(sc, OHCI_CONTROL, ctl); 831 832 /* 833 * The controller is now OPERATIONAL. Set a some final 834 * registers that should be set earlier, but that the 835 * controller ignores when in the SUSPEND state. 836 */ 837 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 838 fm |= OHCI_FSMPS(ival) | ival; 839 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 840 per = OHCI_PERIODIC(ival); /* 90% periodic */ 841 OWRITE4(sc, OHCI_PERIODIC_START, per); 842 843 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */ 844 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 845 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP); 846 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 847 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY); 848 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca); 849 850 /* 851 * The AMD756 requires a delay before re-reading the register, 852 * otherwise it will occasionally report 0 ports. 853 */ 854 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY); 855 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 856 857 #ifdef OHCI_DEBUG 858 if (ohcidebug > 5) 859 ohci_dumpregs(sc); 860 #endif 861 862 /* Set up the bus struct. */ 863 sc->sc_bus.methods = &ohci_bus_methods; 864 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 865 866 #if defined(__NetBSD__) || defined(__OpenBSD__) 867 sc->sc_control = sc->sc_intre = 0; 868 sc->sc_powerhook = powerhook_establish(ohci_power, sc); 869 sc->sc_shutdownhook = shutdownhook_establish(ohci_shutdown, sc); 870 #endif 871 872 usb_callout_init(sc->sc_tmo_rhsc); 873 874 return (USBD_NORMAL_COMPLETION); 875 876 bad5: 877 for (i = 0; i < OHCI_NO_EDS; i++) 878 ohci_free_sed(sc, sc->sc_eds[i]); 879 bad4: 880 ohci_free_sed(sc, sc->sc_isoc_head); 881 bad3: 882 ohci_free_sed(sc, sc->sc_ctrl_head); 883 bad2: 884 ohci_free_sed(sc, sc->sc_bulk_head); 885 bad1: 886 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 887 return (err); 888 } 889 890 usbd_status 891 ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 892 { 893 #if defined(__NetBSD__) || defined(__OpenBSD__) 894 struct ohci_softc *sc = (struct ohci_softc *)bus; 895 #endif 896 897 return (usb_allocmem(&sc->sc_bus, size, 0, dma)); 898 } 899 900 void 901 ohci_freem(struct usbd_bus *bus, usb_dma_t *dma) 902 { 903 #if defined(__NetBSD__) || defined(__OpenBSD__) 904 struct ohci_softc *sc = (struct ohci_softc *)bus; 905 #endif 906 907 usb_freemem(&sc->sc_bus, dma); 908 } 909 910 usbd_xfer_handle 911 ohci_allocx(struct usbd_bus *bus) 912 { 913 struct ohci_softc *sc = (struct ohci_softc *)bus; 914 usbd_xfer_handle xfer; 915 916 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 917 if (xfer != NULL) 918 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, xfer, next); 919 else 920 xfer = malloc(sizeof(struct ohci_xfer), M_USB, M_NOWAIT); 921 if (xfer != NULL) 922 memset(xfer, 0, sizeof (struct ohci_xfer)); 923 return (xfer); 924 } 925 926 void 927 ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 928 { 929 struct ohci_softc *sc = (struct ohci_softc *)bus; 930 931 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 932 } 933 934 /* 935 * Shut down the controller when the system is going down. 936 */ 937 void 938 ohci_shutdown(void *v) 939 { 940 ohci_softc_t *sc = v; 941 942 DPRINTF(("ohci_shutdown: stopping the HC\n")); 943 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 944 } 945 946 /* 947 * Handle suspend/resume. 948 * 949 * We need to switch to polling mode here, because this routine is 950 * called from an intterupt context. This is all right since we 951 * are almost suspended anyway. 952 */ 953 void 954 ohci_power(int why, void *v) 955 { 956 ohci_softc_t *sc = v; 957 u_int32_t ctl; 958 int s; 959 960 #ifdef OHCI_DEBUG 961 DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why)); 962 ohci_dumpregs(sc); 963 #endif 964 965 s = splhardusb(); 966 switch (why) { 967 case PWR_SUSPEND: 968 case PWR_STANDBY: 969 sc->sc_bus.use_polling++; 970 ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK; 971 if (sc->sc_control == 0) { 972 /* 973 * Preserve register values, in case that APM BIOS 974 * does not recover them. 975 */ 976 sc->sc_control = ctl; 977 sc->sc_intre = OREAD4(sc, OHCI_INTERRUPT_ENABLE); 978 } 979 ctl |= OHCI_HCFS_SUSPEND; 980 OWRITE4(sc, OHCI_CONTROL, ctl); 981 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 982 sc->sc_bus.use_polling--; 983 break; 984 case PWR_RESUME: 985 sc->sc_bus.use_polling++; 986 /* Some broken BIOSes do not recover these values */ 987 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma)); 988 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 989 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 990 if (sc->sc_intre) 991 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, 992 sc->sc_intre & (OHCI_ALL_INTRS | OHCI_MIE)); 993 if (sc->sc_control) 994 ctl = sc->sc_control; 995 else 996 ctl = OREAD4(sc, OHCI_CONTROL); 997 ctl |= OHCI_HCFS_RESUME; 998 OWRITE4(sc, OHCI_CONTROL, ctl); 999 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 1000 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL; 1001 OWRITE4(sc, OHCI_CONTROL, ctl); 1002 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 1003 sc->sc_control = sc->sc_intre = 0; 1004 sc->sc_bus.use_polling--; 1005 break; 1006 case PWR_SOFTSUSPEND: 1007 case PWR_SOFTSTANDBY: 1008 case PWR_SOFTRESUME: 1009 break; 1010 } 1011 splx(s); 1012 } 1013 1014 #ifdef OHCI_DEBUG 1015 void 1016 ohci_dumpregs(ohci_softc_t *sc) 1017 { 1018 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 1019 OREAD4(sc, OHCI_REVISION), 1020 OREAD4(sc, OHCI_CONTROL), 1021 OREAD4(sc, OHCI_COMMAND_STATUS))); 1022 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 1023 OREAD4(sc, OHCI_INTERRUPT_STATUS), 1024 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 1025 OREAD4(sc, OHCI_INTERRUPT_DISABLE))); 1026 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 1027 OREAD4(sc, OHCI_HCCA), 1028 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 1029 OREAD4(sc, OHCI_CONTROL_HEAD_ED))); 1030 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 1031 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 1032 OREAD4(sc, OHCI_BULK_HEAD_ED), 1033 OREAD4(sc, OHCI_BULK_CURRENT_ED))); 1034 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 1035 OREAD4(sc, OHCI_DONE_HEAD), 1036 OREAD4(sc, OHCI_FM_INTERVAL), 1037 OREAD4(sc, OHCI_FM_REMAINING))); 1038 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 1039 OREAD4(sc, OHCI_FM_NUMBER), 1040 OREAD4(sc, OHCI_PERIODIC_START), 1041 OREAD4(sc, OHCI_LS_THRESHOLD))); 1042 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n", 1043 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 1044 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 1045 OREAD4(sc, OHCI_RH_STATUS))); 1046 DPRINTF((" port1=0x%08x port2=0x%08x\n", 1047 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 1048 OREAD4(sc, OHCI_RH_PORT_STATUS(2)))); 1049 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n", 1050 le32toh(sc->sc_hcca->hcca_frame_number), 1051 le32toh(sc->sc_hcca->hcca_done_head))); 1052 } 1053 #endif 1054 1055 Static int ohci_intr1(ohci_softc_t *); 1056 1057 int 1058 ohci_intr(void *p) 1059 { 1060 ohci_softc_t *sc = p; 1061 1062 if (sc == NULL || sc->sc_dying) 1063 return (0); 1064 1065 /* If we get an interrupt while polling, then just ignore it. */ 1066 if (sc->sc_bus.use_polling) { 1067 #ifdef DIAGNOSTIC 1068 printf("ohci_intr: ignored interrupt while polling\n"); 1069 #endif 1070 return (0); 1071 } 1072 1073 return (ohci_intr1(sc)); 1074 } 1075 1076 Static int 1077 ohci_intr1(ohci_softc_t *sc) 1078 { 1079 u_int32_t intrs, eintrs; 1080 ohci_physaddr_t done; 1081 1082 DPRINTFN(14,("ohci_intr1: enter\n")); 1083 1084 /* In case the interrupt occurs before initialization has completed. */ 1085 if (sc == NULL || sc->sc_hcca == NULL) { 1086 #ifdef DIAGNOSTIC 1087 printf("ohci_intr: sc->sc_hcca == NULL\n"); 1088 #endif 1089 return (0); 1090 } 1091 1092 intrs = 0; 1093 done = le32toh(sc->sc_hcca->hcca_done_head); 1094 if (done != 0) { 1095 if (done & ~OHCI_DONE_INTRS) 1096 intrs = OHCI_WDH; 1097 if (done & OHCI_DONE_INTRS) 1098 intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS); 1099 } else 1100 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1101 1102 if (!intrs) 1103 return (0); 1104 1105 intrs &= ~OHCI_MIE; 1106 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */ 1107 eintrs = intrs & sc->sc_eintrs; 1108 if (!eintrs) 1109 return (0); 1110 1111 sc->sc_bus.intr_context++; 1112 sc->sc_bus.no_intrs++; 1113 DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 1114 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 1115 (u_int)eintrs)); 1116 1117 if (eintrs & OHCI_SO) { 1118 sc->sc_overrun_cnt++; 1119 if (usbd_ratecheck(&sc->sc_overrun_ntc)) { 1120 printf("%s: %u scheduling overruns\n", 1121 USBDEVNAME(sc->sc_bus.bdev), sc->sc_overrun_cnt); 1122 sc->sc_overrun_cnt = 0; 1123 } 1124 /* XXX do what */ 1125 eintrs &= ~OHCI_SO; 1126 } 1127 if (eintrs & OHCI_WDH) { 1128 ohci_add_done(sc, done &~ OHCI_DONE_INTRS); 1129 sc->sc_hcca->hcca_done_head = 0; 1130 usb_schedsoftintr(&sc->sc_bus); 1131 eintrs &= ~OHCI_WDH; 1132 } 1133 if (eintrs & OHCI_RD) { 1134 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev)); 1135 /* XXX process resume detect */ 1136 } 1137 if (eintrs & OHCI_UE) { 1138 printf("%s: unrecoverable error, controller halted\n", 1139 USBDEVNAME(sc->sc_bus.bdev)); 1140 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1141 /* XXX what else */ 1142 } 1143 if (eintrs & OHCI_RHSC) { 1144 ohci_rhsc(sc, sc->sc_intrxfer); 1145 /* 1146 * Disable RHSC interrupt for now, because it will be 1147 * on until the port has been reset. 1148 */ 1149 ohci_rhsc_able(sc, 0); 1150 /* Do not allow RHSC interrupts > 1 per second */ 1151 usb_callout(sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc); 1152 eintrs &= ~OHCI_RHSC; 1153 } 1154 1155 sc->sc_bus.intr_context--; 1156 1157 if (eintrs != 0) { 1158 /* Block unprocessed interrupts. XXX */ 1159 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs); 1160 sc->sc_eintrs &= ~eintrs; 1161 printf("%s: blocking intrs 0x%x\n", 1162 USBDEVNAME(sc->sc_bus.bdev), eintrs); 1163 } 1164 1165 return (1); 1166 } 1167 1168 void 1169 ohci_rhsc_able(ohci_softc_t *sc, int on) 1170 { 1171 DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on)); 1172 if (on) { 1173 sc->sc_eintrs |= OHCI_RHSC; 1174 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1175 } else { 1176 sc->sc_eintrs &= ~OHCI_RHSC; 1177 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC); 1178 } 1179 } 1180 1181 void 1182 ohci_rhsc_enable(void *v_sc) 1183 { 1184 ohci_softc_t *sc = v_sc; 1185 1186 ohci_rhsc_able(sc, 1); 1187 } 1188 1189 #ifdef OHCI_DEBUG 1190 char *ohci_cc_strs[] = { 1191 "NO_ERROR", 1192 "CRC", 1193 "BIT_STUFFING", 1194 "DATA_TOGGLE_MISMATCH", 1195 "STALL", 1196 "DEVICE_NOT_RESPONDING", 1197 "PID_CHECK_FAILURE", 1198 "UNEXPECTED_PID", 1199 "DATA_OVERRUN", 1200 "DATA_UNDERRUN", 1201 "BUFFER_OVERRUN", 1202 "BUFFER_UNDERRUN", 1203 "reserved", 1204 "reserved", 1205 "NOT_ACCESSED", 1206 "NOT_ACCESSED", 1207 }; 1208 #endif 1209 1210 void 1211 ohci_add_done(ohci_softc_t *sc, ohci_physaddr_t done) 1212 { 1213 ohci_soft_itd_t *sitd, *sidone, **ip; 1214 ohci_soft_td_t *std, *sdone, **p; 1215 1216 /* Reverse the done list. */ 1217 for (sdone = NULL, sidone = NULL; done != 0; ) { 1218 std = ohci_hash_find_td(sc, done); 1219 if (std != NULL) { 1220 std->dnext = sdone; 1221 done = le32toh(std->td.td_nexttd); 1222 sdone = std; 1223 DPRINTFN(10,("add TD %p\n", std)); 1224 continue; 1225 } 1226 sitd = ohci_hash_find_itd(sc, done); 1227 if (sitd != NULL) { 1228 sitd->dnext = sidone; 1229 done = le32toh(sitd->itd.itd_nextitd); 1230 sidone = sitd; 1231 DPRINTFN(5,("add ITD %p\n", sitd)); 1232 continue; 1233 } 1234 panic("ohci_add_done: addr 0x%08lx not found\n", (u_long)done); 1235 } 1236 1237 /* sdone & sidone now hold the done lists. */ 1238 /* Put them on the already processed lists. */ 1239 for (p = &sc->sc_sdone; *p != NULL; p = &(*p)->dnext) 1240 ; 1241 *p = sdone; 1242 for (ip = &sc->sc_sidone; *ip != NULL; ip = &(*ip)->dnext) 1243 ; 1244 *ip = sidone; 1245 } 1246 1247 void 1248 ohci_softintr(void *v) 1249 { 1250 ohci_softc_t *sc = v; 1251 ohci_soft_itd_t *sitd, *sidone, *sitdnext; 1252 ohci_soft_td_t *std, *sdone, *stdnext; 1253 usbd_xfer_handle xfer; 1254 int len, cc, s; 1255 1256 DPRINTFN(10,("ohci_softintr: enter\n:")); 1257 1258 sc->sc_bus.intr_context++; 1259 1260 s = splhardusb(); 1261 sdone = sc->sc_sdone; 1262 sc->sc_sdone = NULL; 1263 sidone = sc->sc_sidone; 1264 sc->sc_sidone = NULL; 1265 splx(s); 1266 1267 DPRINTFN(10,("ohci_softintr: sdone=%p sidone=%p\n", sdone, sidone)); 1268 1269 #ifdef OHCI_DEBUG 1270 if (ohcidebug > 10) { 1271 DPRINTF(("ohci_process_done: TD done:\n")); 1272 ohci_dump_tds(sdone); 1273 } 1274 #endif 1275 1276 for (std = sdone; std; std = stdnext) { 1277 xfer = std->xfer; 1278 stdnext = std->dnext; 1279 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n", 1280 std, xfer, xfer ? xfer->hcpriv : 0)); 1281 if (xfer == NULL) { 1282 /* xfer == NULL: There seems to be no xfer associated 1283 * with this TD. It is tailp that happened to end up on 1284 * the done queue. 1285 */ 1286 continue; 1287 } 1288 if (xfer->status == USBD_CANCELLED || 1289 xfer->status == USBD_TIMEOUT) { 1290 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1291 xfer)); 1292 /* Handled by abort routine. */ 1293 continue; 1294 } 1295 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 1296 cc = OHCI_TD_GET_CC(le32toh(std->td.td_flags)); 1297 if (cc == OHCI_CC_NO_ERROR) { 1298 len = std->len; 1299 if (std->td.td_cbp != 0) 1300 len -= le32toh(std->td.td_be) - 1301 le32toh(std->td.td_cbp) + 1; 1302 DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", 1303 len, std->flags)); 1304 if (std->flags & OHCI_ADD_LEN) 1305 xfer->actlen += len; 1306 if (std->flags & OHCI_CALL_DONE) { 1307 xfer->status = USBD_NORMAL_COMPLETION; 1308 usb_transfer_complete(xfer); 1309 } 1310 ohci_free_std(sc, std); 1311 } else { 1312 /* 1313 * Endpoint is halted. First unlink all the TDs 1314 * belonging to the failed transfer, and then restart 1315 * the endpoint. 1316 */ 1317 ohci_soft_td_t *p, *n; 1318 struct ohci_pipe *opipe = 1319 (struct ohci_pipe *)xfer->pipe; 1320 1321 DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n", 1322 OHCI_TD_GET_CC(le32toh(std->td.td_flags)), 1323 ohci_cc_strs[OHCI_TD_GET_CC(le32toh(std->td.td_flags))])); 1324 1325 /* remove TDs */ 1326 for (p = std; p->xfer == xfer; p = n) { 1327 n = p->nexttd; 1328 ohci_free_std(sc, p); 1329 } 1330 1331 /* clear halt */ 1332 opipe->sed->ed.ed_headp = htole32(p->physaddr); 1333 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1334 1335 if (cc == OHCI_CC_STALL) 1336 xfer->status = USBD_STALLED; 1337 else 1338 xfer->status = USBD_IOERROR; 1339 usb_transfer_complete(xfer); 1340 } 1341 } 1342 1343 #ifdef OHCI_DEBUG 1344 if (ohcidebug > 10) { 1345 DPRINTF(("ohci_softintr: ITD done:\n")); 1346 ohci_dump_itds(sidone); 1347 } 1348 #endif 1349 1350 for (sitd = sidone; sitd != NULL; sitd = sitdnext) { 1351 xfer = sitd->xfer; 1352 sitdnext = sitd->dnext; 1353 DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n", 1354 sitd, xfer, xfer ? xfer->hcpriv : 0)); 1355 if (xfer == NULL) 1356 continue; 1357 if (xfer->status == USBD_CANCELLED || 1358 xfer->status == USBD_TIMEOUT) { 1359 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1360 xfer)); 1361 /* Handled by abort routine. */ 1362 continue; 1363 } 1364 #ifdef DIAGNOSTIC 1365 if (sitd->isdone) 1366 printf("ohci_softintr: sitd=%p is done\n", sitd); 1367 sitd->isdone = 1; 1368 #endif 1369 cc = OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags)); 1370 if (cc == OHCI_CC_NO_ERROR) { 1371 /* XXX compute length for input */ 1372 struct ohci_pipe *opipe = 1373 (struct ohci_pipe *)xfer->pipe; 1374 if (sitd->flags & OHCI_CALL_DONE) { 1375 opipe->u.iso.inuse -= xfer->nframes; 1376 /* XXX update frlengths with actual length */ 1377 /* XXX xfer->actlen = actlen; */ 1378 xfer->status = USBD_NORMAL_COMPLETION; 1379 usb_transfer_complete(xfer); 1380 } 1381 } else { 1382 /* XXX Do more */ 1383 xfer->status = USBD_IOERROR; 1384 usb_transfer_complete(xfer); 1385 } 1386 } 1387 1388 sc->sc_bus.intr_context--; 1389 DPRINTFN(10,("ohci_softintr: done:\n")); 1390 } 1391 1392 void 1393 ohci_device_ctrl_done(usbd_xfer_handle xfer) 1394 { 1395 DPRINTFN(10,("ohci_ctrl_done: xfer=%p\n", xfer)); 1396 1397 #ifdef DIAGNOSTIC 1398 if (!(xfer->rqflags & URQ_REQUEST)) { 1399 panic("ohci_ctrl_done: not a request\n"); 1400 } 1401 #endif 1402 xfer->hcpriv = NULL; 1403 } 1404 1405 void 1406 ohci_device_intr_done(usbd_xfer_handle xfer) 1407 { 1408 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1409 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1410 ohci_soft_ed_t *sed = opipe->sed; 1411 ohci_soft_td_t *data, *tail; 1412 1413 1414 DPRINTFN(10,("ohci_intr_done: xfer=%p, actlen=%d\n", 1415 xfer, xfer->actlen)); 1416 1417 xfer->hcpriv = NULL; 1418 1419 if (xfer->pipe->repeat) { 1420 data = opipe->tail.td; 1421 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 1422 if (tail == NULL) { 1423 xfer->status = USBD_NOMEM; 1424 return; 1425 } 1426 tail->xfer = NULL; 1427 1428 data->td.td_flags = htole32( 1429 OHCI_TD_IN | OHCI_TD_NOCC | 1430 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 1431 if (xfer->flags & USBD_SHORT_XFER_OK) 1432 data->td.td_flags |= htole32(OHCI_TD_R); 1433 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf)); 1434 data->nexttd = tail; 1435 data->td.td_nexttd = htole32(tail->physaddr); 1436 data->td.td_be = htole32(le32toh(data->td.td_cbp) + 1437 xfer->length - 1); 1438 data->len = xfer->length; 1439 data->xfer = xfer; 1440 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1441 xfer->hcpriv = data; 1442 xfer->actlen = 0; 1443 1444 sed->ed.ed_tailp = htole32(tail->physaddr); 1445 opipe->tail.td = tail; 1446 } 1447 } 1448 1449 void 1450 ohci_device_bulk_done(usbd_xfer_handle xfer) 1451 { 1452 DPRINTFN(10,("ohci_bulk_done: xfer=%p, actlen=%d\n", 1453 xfer, xfer->actlen)); 1454 1455 xfer->hcpriv = NULL; 1456 } 1457 1458 void 1459 ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer) 1460 { 1461 usbd_pipe_handle pipe; 1462 struct ohci_pipe *opipe; 1463 u_char *p; 1464 int i, m; 1465 int hstatus; 1466 1467 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1468 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n", 1469 sc, xfer, hstatus)); 1470 1471 if (xfer == NULL) { 1472 /* Just ignore the change. */ 1473 return; 1474 } 1475 1476 pipe = xfer->pipe; 1477 opipe = (struct ohci_pipe *)pipe; 1478 1479 p = KERNADDR(&xfer->dmabuf); 1480 m = min(sc->sc_noport, xfer->length * 8 - 1); 1481 memset(p, 0, xfer->length); 1482 for (i = 1; i <= m; i++) { 1483 /* Pick out CHANGE bits from the status reg. */ 1484 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1485 p[i/8] |= 1 << (i%8); 1486 } 1487 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 1488 xfer->actlen = xfer->length; 1489 xfer->status = USBD_NORMAL_COMPLETION; 1490 1491 usb_transfer_complete(xfer); 1492 } 1493 1494 void 1495 ohci_root_intr_done(usbd_xfer_handle xfer) 1496 { 1497 xfer->hcpriv = NULL; 1498 } 1499 1500 void 1501 ohci_root_ctrl_done(usbd_xfer_handle xfer) 1502 { 1503 xfer->hcpriv = NULL; 1504 } 1505 1506 /* 1507 * Wait here until controller claims to have an interrupt. 1508 * Then call ohci_intr and return. Use timeout to avoid waiting 1509 * too long. 1510 */ 1511 void 1512 ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer) 1513 { 1514 int timo = xfer->timeout; 1515 int usecs; 1516 u_int32_t intrs; 1517 1518 xfer->status = USBD_IN_PROGRESS; 1519 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 1520 usb_delay_ms(&sc->sc_bus, 1); 1521 if (sc->sc_dying) 1522 break; 1523 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 1524 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs)); 1525 #ifdef OHCI_DEBUG 1526 if (ohcidebug > 15) 1527 ohci_dumpregs(sc); 1528 #endif 1529 if (intrs) { 1530 ohci_intr1(sc); 1531 if (xfer->status != USBD_IN_PROGRESS) 1532 return; 1533 } 1534 } 1535 1536 /* Timeout */ 1537 DPRINTF(("ohci_waitintr: timeout\n")); 1538 xfer->status = USBD_TIMEOUT; 1539 usb_transfer_complete(xfer); 1540 /* XXX should free TD */ 1541 } 1542 1543 void 1544 ohci_poll(struct usbd_bus *bus) 1545 { 1546 ohci_softc_t *sc = (ohci_softc_t *)bus; 1547 #ifdef OHCI_DEBUG 1548 static int last; 1549 int new; 1550 new = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1551 if (new != last) { 1552 DPRINTFN(10,("ohci_poll: intrs=0x%04x\n", new)); 1553 last = new; 1554 } 1555 #endif 1556 1557 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) 1558 ohci_intr1(sc); 1559 } 1560 1561 usbd_status 1562 ohci_device_request(usbd_xfer_handle xfer) 1563 { 1564 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1565 usb_device_request_t *req = &xfer->request; 1566 usbd_device_handle dev = opipe->pipe.device; 1567 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1568 int addr = dev->address; 1569 ohci_soft_td_t *setup, *stat, *next, *tail; 1570 ohci_soft_ed_t *sed; 1571 int isread; 1572 int len; 1573 usbd_status err; 1574 int s; 1575 1576 isread = req->bmRequestType & UT_READ; 1577 len = UGETW(req->wLength); 1578 1579 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 1580 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 1581 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1582 UGETW(req->wIndex), len, addr, 1583 opipe->pipe.endpoint->edesc->bEndpointAddress)); 1584 1585 setup = opipe->tail.td; 1586 stat = ohci_alloc_std(sc); 1587 if (stat == NULL) { 1588 err = USBD_NOMEM; 1589 goto bad1; 1590 } 1591 tail = ohci_alloc_std(sc); 1592 if (tail == NULL) { 1593 err = USBD_NOMEM; 1594 goto bad2; 1595 } 1596 tail->xfer = NULL; 1597 1598 sed = opipe->sed; 1599 opipe->u.ctl.length = len; 1600 1601 /* Update device address and length since they may have changed. */ 1602 /* XXX This only needs to be done once, but it's too early in open. */ 1603 /* XXXX Should not touch ED here! */ 1604 sed->ed.ed_flags = htole32( 1605 (le32toh(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) | 1606 OHCI_ED_SET_FA(addr) | 1607 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize))); 1608 1609 next = stat; 1610 1611 /* Set up data transaction */ 1612 if (len != 0) { 1613 ohci_soft_td_t *std = stat; 1614 1615 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 1616 std, &stat); 1617 stat = stat->nexttd; /* point at free TD */ 1618 if (err) 1619 goto bad3; 1620 /* Start toggle at 1 and then use the carried toggle. */ 1621 std->td.td_flags &= htole32(~OHCI_TD_TOGGLE_MASK); 1622 std->td.td_flags |= htole32(OHCI_TD_TOGGLE_1); 1623 } 1624 1625 memcpy(KERNADDR(&opipe->u.ctl.reqdma), req, sizeof *req); 1626 1627 setup->td.td_flags = htole32(OHCI_TD_SETUP | OHCI_TD_NOCC | 1628 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1629 setup->td.td_cbp = htole32(DMAADDR(&opipe->u.ctl.reqdma)); 1630 setup->nexttd = next; 1631 setup->td.td_nexttd = htole32(next->physaddr); 1632 setup->td.td_be = htole32(le32toh(setup->td.td_cbp) + sizeof *req - 1); 1633 setup->len = 0; 1634 setup->xfer = xfer; 1635 setup->flags = 0; 1636 xfer->hcpriv = setup; 1637 1638 stat->td.td_flags = htole32( 1639 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | 1640 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1641 stat->td.td_cbp = 0; 1642 stat->nexttd = tail; 1643 stat->td.td_nexttd = htole32(tail->physaddr); 1644 stat->td.td_be = 0; 1645 stat->flags = OHCI_CALL_DONE; 1646 stat->len = 0; 1647 stat->xfer = xfer; 1648 1649 #ifdef OHCI_DEBUG 1650 if (ohcidebug > 5) { 1651 DPRINTF(("ohci_device_request:\n")); 1652 ohci_dump_ed(sed); 1653 ohci_dump_tds(setup); 1654 } 1655 #endif 1656 1657 /* Insert ED in schedule */ 1658 s = splusb(); 1659 sed->ed.ed_tailp = htole32(tail->physaddr); 1660 opipe->tail.td = tail; 1661 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1662 if (xfer->timeout && !sc->sc_bus.use_polling) { 1663 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout), 1664 ohci_timeout, xfer); 1665 } 1666 splx(s); 1667 1668 #ifdef OHCI_DEBUG 1669 if (ohcidebug > 20) { 1670 delay(10000); 1671 DPRINTF(("ohci_device_request: status=%x\n", 1672 OREAD4(sc, OHCI_COMMAND_STATUS))); 1673 ohci_dumpregs(sc); 1674 printf("ctrl head:\n"); 1675 ohci_dump_ed(sc->sc_ctrl_head); 1676 printf("sed:\n"); 1677 ohci_dump_ed(sed); 1678 ohci_dump_tds(setup); 1679 } 1680 #endif 1681 1682 return (USBD_NORMAL_COMPLETION); 1683 1684 bad3: 1685 ohci_free_std(sc, tail); 1686 bad2: 1687 ohci_free_std(sc, stat); 1688 bad1: 1689 return (err); 1690 } 1691 1692 /* 1693 * Add an ED to the schedule. Called at splusb(). 1694 */ 1695 void 1696 ohci_add_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1697 { 1698 DPRINTFN(8,("ohci_add_ed: sed=%p head=%p\n", sed, head)); 1699 1700 SPLUSBCHECK; 1701 sed->next = head->next; 1702 sed->ed.ed_nexted = head->ed.ed_nexted; 1703 head->next = sed; 1704 head->ed.ed_nexted = htole32(sed->physaddr); 1705 } 1706 1707 /* 1708 * Remove an ED from the schedule. Called at splusb(). 1709 */ 1710 void 1711 ohci_rem_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1712 { 1713 ohci_soft_ed_t *p; 1714 1715 SPLUSBCHECK; 1716 1717 /* XXX */ 1718 for (p = head; p == NULL && p->next != sed; p = p->next) 1719 ; 1720 if (p == NULL) 1721 panic("ohci_rem_ed: ED not found\n"); 1722 p->next = sed->next; 1723 p->ed.ed_nexted = sed->ed.ed_nexted; 1724 } 1725 1726 /* 1727 * When a transfer is completed the TD is added to the done queue by 1728 * the host controller. This queue is the processed by software. 1729 * Unfortunately the queue contains the physical address of the TD 1730 * and we have no simple way to translate this back to a kernel address. 1731 * To make the translation possible (and fast) we use a hash table of 1732 * TDs currently in the schedule. The physical address is used as the 1733 * hash value. 1734 */ 1735 1736 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1737 /* Called at splusb() */ 1738 void 1739 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1740 { 1741 int h = HASH(std->physaddr); 1742 1743 SPLUSBCHECK; 1744 1745 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1746 } 1747 1748 /* Called at splusb() */ 1749 void 1750 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1751 { 1752 SPLUSBCHECK; 1753 1754 LIST_REMOVE(std, hnext); 1755 } 1756 1757 ohci_soft_td_t * 1758 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a) 1759 { 1760 int h = HASH(a); 1761 ohci_soft_td_t *std; 1762 1763 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1764 std != NULL; 1765 std = LIST_NEXT(std, hnext)) 1766 if (std->physaddr == a) 1767 return (std); 1768 return (NULL); 1769 } 1770 1771 /* Called at splusb() */ 1772 void 1773 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1774 { 1775 int h = HASH(sitd->physaddr); 1776 1777 SPLUSBCHECK; 1778 1779 DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n", 1780 sitd, (u_long)sitd->physaddr)); 1781 1782 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext); 1783 } 1784 1785 /* Called at splusb() */ 1786 void 1787 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1788 { 1789 SPLUSBCHECK; 1790 1791 DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n", 1792 sitd, (u_long)sitd->physaddr)); 1793 1794 LIST_REMOVE(sitd, hnext); 1795 } 1796 1797 ohci_soft_itd_t * 1798 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a) 1799 { 1800 int h = HASH(a); 1801 ohci_soft_itd_t *sitd; 1802 1803 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]); 1804 sitd != NULL; 1805 sitd = LIST_NEXT(sitd, hnext)) 1806 if (sitd->physaddr == a) 1807 return (sitd); 1808 return (NULL); 1809 } 1810 1811 void 1812 ohci_timeout(void *addr) 1813 { 1814 struct ohci_xfer *oxfer = addr; 1815 struct ohci_pipe *opipe = (struct ohci_pipe *)oxfer->xfer.pipe; 1816 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1817 1818 DPRINTF(("ohci_timeout: oxfer=%p\n", oxfer)); 1819 1820 if (sc->sc_dying) { 1821 ohci_abort_xfer(&oxfer->xfer, USBD_TIMEOUT); 1822 return; 1823 } 1824 1825 /* Execute the abort in a process context. */ 1826 usb_init_task(&oxfer->abort_task, ohci_timeout_task, addr); 1827 usb_add_task(oxfer->xfer.pipe->device, &oxfer->abort_task); 1828 } 1829 1830 void 1831 ohci_timeout_task(void *addr) 1832 { 1833 usbd_xfer_handle xfer = addr; 1834 int s; 1835 1836 DPRINTF(("ohci_timeout_task: xfer=%p\n", xfer)); 1837 1838 s = splusb(); 1839 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1840 splx(s); 1841 } 1842 1843 #ifdef OHCI_DEBUG 1844 void 1845 ohci_dump_tds(ohci_soft_td_t *std) 1846 { 1847 for (; std; std = std->nexttd) 1848 ohci_dump_td(std); 1849 } 1850 1851 void 1852 ohci_dump_td(ohci_soft_td_t *std) 1853 { 1854 char sbuf[128]; 1855 1856 bitmask_snprintf((u_int32_t)le32toh(std->td.td_flags), 1857 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 1858 sbuf, sizeof(sbuf)); 1859 1860 printf("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx " 1861 "nexttd=0x%08lx be=0x%08lx\n", 1862 std, (u_long)std->physaddr, sbuf, 1863 OHCI_TD_GET_DI(le32toh(std->td.td_flags)), 1864 OHCI_TD_GET_EC(le32toh(std->td.td_flags)), 1865 OHCI_TD_GET_CC(le32toh(std->td.td_flags)), 1866 (u_long)le32toh(std->td.td_cbp), 1867 (u_long)le32toh(std->td.td_nexttd), 1868 (u_long)le32toh(std->td.td_be)); 1869 } 1870 1871 void 1872 ohci_dump_itd(ohci_soft_itd_t *sitd) 1873 { 1874 int i; 1875 1876 printf("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n" 1877 "bp0=0x%08lx next=0x%08lx be=0x%08lx\n", 1878 sitd, (u_long)sitd->physaddr, 1879 OHCI_ITD_GET_SF(le32toh(sitd->itd.itd_flags)), 1880 OHCI_ITD_GET_DI(le32toh(sitd->itd.itd_flags)), 1881 OHCI_ITD_GET_FC(le32toh(sitd->itd.itd_flags)), 1882 OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags)), 1883 (u_long)le32toh(sitd->itd.itd_bp0), 1884 (u_long)le32toh(sitd->itd.itd_nextitd), 1885 (u_long)le32toh(sitd->itd.itd_be)); 1886 for (i = 0; i < OHCI_ITD_NOFFSET; i++) 1887 printf("offs[%d]=0x%04x ", i, 1888 (u_int)le16toh(sitd->itd.itd_offset[i])); 1889 printf("\n"); 1890 } 1891 1892 void 1893 ohci_dump_itds(ohci_soft_itd_t *sitd) 1894 { 1895 for (; sitd; sitd = sitd->nextitd) 1896 ohci_dump_itd(sitd); 1897 } 1898 1899 void 1900 ohci_dump_ed(ohci_soft_ed_t *sed) 1901 { 1902 char sbuf[128], sbuf2[128]; 1903 1904 bitmask_snprintf((u_int32_t)le32toh(sed->ed.ed_flags), 1905 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO", 1906 sbuf, sizeof(sbuf)); 1907 bitmask_snprintf((u_int32_t)le32toh(sed->ed.ed_headp), 1908 "\20\1HALT\2CARRY", sbuf2, sizeof(sbuf2)); 1909 1910 printf("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d flags=%s\ntailp=0x%08lx " 1911 "headflags=%s headp=0x%08lx nexted=0x%08lx\n", 1912 sed, (u_long)sed->physaddr, 1913 OHCI_ED_GET_FA(le32toh(sed->ed.ed_flags)), 1914 OHCI_ED_GET_EN(le32toh(sed->ed.ed_flags)), 1915 OHCI_ED_GET_MAXP(le32toh(sed->ed.ed_flags)), sbuf, 1916 (u_long)le32toh(sed->ed.ed_tailp), sbuf2, 1917 (u_long)le32toh(sed->ed.ed_headp), 1918 (u_long)le32toh(sed->ed.ed_nexted)); 1919 } 1920 #endif 1921 1922 usbd_status 1923 ohci_open(usbd_pipe_handle pipe) 1924 { 1925 usbd_device_handle dev = pipe->device; 1926 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1927 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1928 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1929 u_int8_t addr = dev->address; 1930 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1931 ohci_soft_ed_t *sed; 1932 ohci_soft_td_t *std; 1933 ohci_soft_itd_t *sitd; 1934 ohci_physaddr_t tdphys; 1935 u_int32_t fmt; 1936 usbd_status err; 1937 int s; 1938 int ival; 1939 1940 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1941 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1942 1943 if (sc->sc_dying) 1944 return (USBD_IOERROR); 1945 1946 std = NULL; 1947 sed = NULL; 1948 1949 if (addr == sc->sc_addr) { 1950 switch (ed->bEndpointAddress) { 1951 case USB_CONTROL_ENDPOINT: 1952 pipe->methods = &ohci_root_ctrl_methods; 1953 break; 1954 case UE_DIR_IN | OHCI_INTR_ENDPT: 1955 pipe->methods = &ohci_root_intr_methods; 1956 break; 1957 default: 1958 return (USBD_INVAL); 1959 } 1960 } else { 1961 sed = ohci_alloc_sed(sc); 1962 if (sed == NULL) 1963 goto bad0; 1964 opipe->sed = sed; 1965 if (xfertype == UE_ISOCHRONOUS) { 1966 sitd = ohci_alloc_sitd(sc); 1967 if (sitd == NULL) { 1968 ohci_free_sitd(sc, sitd); 1969 goto bad1; 1970 } 1971 opipe->tail.itd = sitd; 1972 tdphys = sitd->physaddr; 1973 fmt = OHCI_ED_FORMAT_ISO; 1974 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 1975 fmt |= OHCI_ED_DIR_IN; 1976 else 1977 fmt |= OHCI_ED_DIR_OUT; 1978 } else { 1979 std = ohci_alloc_std(sc); 1980 if (std == NULL) { 1981 ohci_free_std(sc, std); 1982 goto bad1; 1983 } 1984 opipe->tail.td = std; 1985 tdphys = std->physaddr; 1986 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD; 1987 } 1988 sed->ed.ed_flags = htole32( 1989 OHCI_ED_SET_FA(addr) | 1990 OHCI_ED_SET_EN(ed->bEndpointAddress) | 1991 (dev->speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) | 1992 fmt | 1993 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 1994 sed->ed.ed_headp = sed->ed.ed_tailp = htole32(tdphys); 1995 1996 switch (xfertype) { 1997 case UE_CONTROL: 1998 pipe->methods = &ohci_device_ctrl_methods; 1999 err = usb_allocmem(&sc->sc_bus, 2000 sizeof(usb_device_request_t), 2001 0, &opipe->u.ctl.reqdma); 2002 if (err) 2003 goto bad; 2004 s = splusb(); 2005 ohci_add_ed(sed, sc->sc_ctrl_head); 2006 splx(s); 2007 break; 2008 case UE_INTERRUPT: 2009 pipe->methods = &ohci_device_intr_methods; 2010 ival = pipe->interval; 2011 if (ival == USBD_DEFAULT_INTERVAL) 2012 ival = ed->bInterval; 2013 return (ohci_device_setintr(sc, opipe, ival)); 2014 case UE_ISOCHRONOUS: 2015 pipe->methods = &ohci_device_isoc_methods; 2016 return (ohci_setup_isoc(pipe)); 2017 case UE_BULK: 2018 pipe->methods = &ohci_device_bulk_methods; 2019 s = splusb(); 2020 ohci_add_ed(sed, sc->sc_bulk_head); 2021 splx(s); 2022 break; 2023 } 2024 } 2025 return (USBD_NORMAL_COMPLETION); 2026 2027 bad: 2028 if (std != NULL) 2029 ohci_free_std(sc, std); 2030 bad1: 2031 if (sed != NULL) 2032 ohci_free_sed(sc, sed); 2033 bad0: 2034 return (USBD_NOMEM); 2035 2036 } 2037 2038 /* 2039 * Close a reqular pipe. 2040 * Assumes that there are no pending transactions. 2041 */ 2042 void 2043 ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head) 2044 { 2045 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2046 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2047 ohci_soft_ed_t *sed = opipe->sed; 2048 int s; 2049 2050 s = splusb(); 2051 #ifdef DIAGNOSTIC 2052 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 2053 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2054 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) { 2055 ohci_soft_td_t *std; 2056 std = ohci_hash_find_td(sc, le32toh(sed->ed.ed_headp)); 2057 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 2058 "tl=0x%x pipe=%p, std=%p\n", sed, 2059 (int)le32toh(sed->ed.ed_headp), 2060 (int)le32toh(sed->ed.ed_tailp), 2061 pipe, std); 2062 #ifdef USB_DEBUG 2063 usbd_dump_pipe(&opipe->pipe); 2064 #endif 2065 #ifdef OHCI_DEBUG 2066 ohci_dump_ed(sed); 2067 if (std) 2068 ohci_dump_td(std); 2069 #endif 2070 usb_delay_ms(&sc->sc_bus, 2); 2071 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2072 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) 2073 printf("ohci_close_pipe: pipe still not empty\n"); 2074 } 2075 #endif 2076 ohci_rem_ed(sed, head); 2077 splx(s); 2078 ohci_free_sed(sc, opipe->sed); 2079 } 2080 2081 /* 2082 * Abort a device request. 2083 * If this routine is called at splusb() it guarantees that the request 2084 * will be removed from the hardware scheduling and that the callback 2085 * for it will be called with USBD_CANCELLED status. 2086 * It's impossible to guarantee that the requested transfer will not 2087 * have happened since the hardware runs concurrently. 2088 * If the transaction has already happened we rely on the ordinary 2089 * interrupt processing to process it. 2090 */ 2091 void 2092 ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2093 { 2094 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2095 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 2096 ohci_soft_ed_t *sed = opipe->sed; 2097 ohci_soft_td_t *p, *n; 2098 ohci_physaddr_t headp; 2099 int s, hit; 2100 2101 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p sed=%p\n", xfer, opipe,sed)); 2102 2103 if (sc->sc_dying) { 2104 /* If we're dying, just do the software part. */ 2105 s = splusb(); 2106 xfer->status = status; /* make software ignore it */ 2107 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2108 usb_transfer_complete(xfer); 2109 splx(s); 2110 } 2111 2112 if (xfer->device->bus->intr_context || !curproc) 2113 panic("ohci_abort_xfer: not in process context\n"); 2114 2115 /* 2116 * Step 1: Make interrupt routine and hardware ignore xfer. 2117 */ 2118 s = splusb(); 2119 xfer->status = status; /* make software ignore it */ 2120 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 2121 splx(s); 2122 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed)); 2123 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 2124 2125 /* 2126 * Step 2: Wait until we know hardware has finished any possible 2127 * use of the xfer. Also make sure the soft interrupt routine 2128 * has run. 2129 */ 2130 usb_delay_ms(opipe->pipe.device->bus, 1); /* Hardware finishes in 1ms */ 2131 /* XXX should have some communication with softintr() to know 2132 when it's done */ 2133 usb_delay_ms(opipe->pipe.device->bus, 250); 2134 2135 /* 2136 * Step 3: Remove any vestiges of the xfer from the hardware. 2137 * The complication here is that the hardware may have executed 2138 * beyond the xfer we're trying to abort. So as we're scanning 2139 * the TDs of this xfer we check if the hardware points to 2140 * any of them. 2141 */ 2142 s = splusb(); /* XXX why? */ 2143 p = xfer->hcpriv; 2144 #ifdef DIAGNOSTIC 2145 if (p == NULL) { 2146 splx(s); 2147 printf("ohci_abort_xfer: hcpriv is NULL\n"); 2148 return; 2149 } 2150 #endif 2151 #ifdef OHCI_DEBUG 2152 if (ohcidebug > 1) { 2153 DPRINTF(("ohci_abort_xfer: sed=\n")); 2154 ohci_dump_ed(sed); 2155 ohci_dump_tds(p); 2156 } 2157 #endif 2158 headp = le32toh(sed->ed.ed_headp) & OHCI_HEADMASK; 2159 hit = 0; 2160 for (; p->xfer == xfer; p = n) { 2161 hit |= headp == p->physaddr; 2162 n = p->nexttd; 2163 ohci_free_std(sc, p); 2164 } 2165 /* Zap headp register if hardware pointed inside the xfer. */ 2166 if (hit) { 2167 DPRINTFN(1,("ohci_abort_xfer: set hd=0x08%x, tl=0x%08x\n", 2168 (int)p->physaddr, (int)le32toh(sed->ed.ed_tailp))); 2169 sed->ed.ed_headp = htole32(p->physaddr); /* unlink TDs */ 2170 } else { 2171 DPRINTFN(1,("ohci_abort_xfer: no hit\n")); 2172 } 2173 2174 /* 2175 * Step 4: Turn on hardware again. 2176 */ 2177 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 2178 2179 /* 2180 * Step 5: Execute callback. 2181 */ 2182 usb_transfer_complete(xfer); 2183 2184 splx(s); 2185 } 2186 2187 /* 2188 * Data structures and routines to emulate the root hub. 2189 */ 2190 Static usb_device_descriptor_t ohci_devd = { 2191 USB_DEVICE_DESCRIPTOR_SIZE, 2192 UDESC_DEVICE, /* type */ 2193 {0x00, 0x01}, /* USB version */ 2194 UDCLASS_HUB, /* class */ 2195 UDSUBCLASS_HUB, /* subclass */ 2196 UDPROTO_FSHUB, 2197 64, /* max packet */ 2198 {0},{0},{0x00,0x01}, /* device id */ 2199 1,2,0, /* string indicies */ 2200 1 /* # of configurations */ 2201 }; 2202 2203 Static usb_config_descriptor_t ohci_confd = { 2204 USB_CONFIG_DESCRIPTOR_SIZE, 2205 UDESC_CONFIG, 2206 {USB_CONFIG_DESCRIPTOR_SIZE + 2207 USB_INTERFACE_DESCRIPTOR_SIZE + 2208 USB_ENDPOINT_DESCRIPTOR_SIZE}, 2209 1, 2210 1, 2211 0, 2212 UC_SELF_POWERED, 2213 0 /* max power */ 2214 }; 2215 2216 Static usb_interface_descriptor_t ohci_ifcd = { 2217 USB_INTERFACE_DESCRIPTOR_SIZE, 2218 UDESC_INTERFACE, 2219 0, 2220 0, 2221 1, 2222 UICLASS_HUB, 2223 UISUBCLASS_HUB, 2224 UIPROTO_FSHUB, 2225 0 2226 }; 2227 2228 Static usb_endpoint_descriptor_t ohci_endpd = { 2229 USB_ENDPOINT_DESCRIPTOR_SIZE, 2230 UDESC_ENDPOINT, 2231 UE_DIR_IN | OHCI_INTR_ENDPT, 2232 UE_INTERRUPT, 2233 {8, 0}, /* max packet */ 2234 255 2235 }; 2236 2237 Static usb_hub_descriptor_t ohci_hubd = { 2238 USB_HUB_DESCRIPTOR_SIZE, 2239 UDESC_HUB, 2240 0, 2241 {0,0}, 2242 0, 2243 0, 2244 {0}, 2245 }; 2246 2247 Static int 2248 ohci_str(p, l, s) 2249 usb_string_descriptor_t *p; 2250 int l; 2251 char *s; 2252 { 2253 int i; 2254 2255 if (l == 0) 2256 return (0); 2257 p->bLength = 2 * strlen(s) + 2; 2258 if (l == 1) 2259 return (1); 2260 p->bDescriptorType = UDESC_STRING; 2261 l -= 2; 2262 for (i = 0; s[i] && l > 1; i++, l -= 2) 2263 USETW2(p->bString[i], 0, s[i]); 2264 return (2*i+2); 2265 } 2266 2267 /* 2268 * Simulate a hardware hub by handling all the necessary requests. 2269 */ 2270 Static usbd_status 2271 ohci_root_ctrl_transfer(usbd_xfer_handle xfer) 2272 { 2273 usbd_status err; 2274 2275 /* Insert last in queue. */ 2276 err = usb_insert_transfer(xfer); 2277 if (err) 2278 return (err); 2279 2280 /* Pipe isn't running, start first */ 2281 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2282 } 2283 2284 Static usbd_status 2285 ohci_root_ctrl_start(usbd_xfer_handle xfer) 2286 { 2287 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2288 usb_device_request_t *req; 2289 void *buf = NULL; 2290 int port, i; 2291 int s, len, value, index, l, totlen = 0; 2292 usb_port_status_t ps; 2293 usb_hub_descriptor_t hubd; 2294 usbd_status err; 2295 u_int32_t v; 2296 2297 if (sc->sc_dying) 2298 return (USBD_IOERROR); 2299 2300 #ifdef DIAGNOSTIC 2301 if (!(xfer->rqflags & URQ_REQUEST)) 2302 /* XXX panic */ 2303 return (USBD_INVAL); 2304 #endif 2305 req = &xfer->request; 2306 2307 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 2308 req->bmRequestType, req->bRequest)); 2309 2310 len = UGETW(req->wLength); 2311 value = UGETW(req->wValue); 2312 index = UGETW(req->wIndex); 2313 2314 if (len != 0) 2315 buf = KERNADDR(&xfer->dmabuf); 2316 2317 #define C(x,y) ((x) | ((y) << 8)) 2318 switch(C(req->bRequest, req->bmRequestType)) { 2319 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 2320 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 2321 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 2322 /* 2323 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 2324 * for the integrated root hub. 2325 */ 2326 break; 2327 case C(UR_GET_CONFIG, UT_READ_DEVICE): 2328 if (len > 0) { 2329 *(u_int8_t *)buf = sc->sc_conf; 2330 totlen = 1; 2331 } 2332 break; 2333 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2334 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 2335 switch(value >> 8) { 2336 case UDESC_DEVICE: 2337 if ((value & 0xff) != 0) { 2338 err = USBD_IOERROR; 2339 goto ret; 2340 } 2341 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 2342 USETW(ohci_devd.idVendor, sc->sc_id_vendor); 2343 memcpy(buf, &ohci_devd, l); 2344 break; 2345 case UDESC_CONFIG: 2346 if ((value & 0xff) != 0) { 2347 err = USBD_IOERROR; 2348 goto ret; 2349 } 2350 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 2351 memcpy(buf, &ohci_confd, l); 2352 buf = (char *)buf + l; 2353 len -= l; 2354 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 2355 totlen += l; 2356 memcpy(buf, &ohci_ifcd, l); 2357 buf = (char *)buf + l; 2358 len -= l; 2359 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 2360 totlen += l; 2361 memcpy(buf, &ohci_endpd, l); 2362 break; 2363 case UDESC_STRING: 2364 if (len == 0) 2365 break; 2366 *(u_int8_t *)buf = 0; 2367 totlen = 1; 2368 switch (value & 0xff) { 2369 case 1: /* Vendor */ 2370 totlen = ohci_str(buf, len, sc->sc_vendor); 2371 break; 2372 case 2: /* Product */ 2373 totlen = ohci_str(buf, len, "OHCI root hub"); 2374 break; 2375 } 2376 break; 2377 default: 2378 err = USBD_IOERROR; 2379 goto ret; 2380 } 2381 break; 2382 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 2383 if (len > 0) { 2384 *(u_int8_t *)buf = 0; 2385 totlen = 1; 2386 } 2387 break; 2388 case C(UR_GET_STATUS, UT_READ_DEVICE): 2389 if (len > 1) { 2390 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 2391 totlen = 2; 2392 } 2393 break; 2394 case C(UR_GET_STATUS, UT_READ_INTERFACE): 2395 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 2396 if (len > 1) { 2397 USETW(((usb_status_t *)buf)->wStatus, 0); 2398 totlen = 2; 2399 } 2400 break; 2401 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 2402 if (value >= USB_MAX_DEVICES) { 2403 err = USBD_IOERROR; 2404 goto ret; 2405 } 2406 sc->sc_addr = value; 2407 break; 2408 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 2409 if (value != 0 && value != 1) { 2410 err = USBD_IOERROR; 2411 goto ret; 2412 } 2413 sc->sc_conf = value; 2414 break; 2415 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 2416 break; 2417 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 2418 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 2419 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 2420 err = USBD_IOERROR; 2421 goto ret; 2422 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 2423 break; 2424 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 2425 break; 2426 /* Hub requests */ 2427 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2428 break; 2429 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2430 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 2431 "port=%d feature=%d\n", 2432 index, value)); 2433 if (index < 1 || index > sc->sc_noport) { 2434 err = USBD_IOERROR; 2435 goto ret; 2436 } 2437 port = OHCI_RH_PORT_STATUS(index); 2438 switch(value) { 2439 case UHF_PORT_ENABLE: 2440 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2441 break; 2442 case UHF_PORT_SUSPEND: 2443 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2444 break; 2445 case UHF_PORT_POWER: 2446 /* Yes, writing to the LOW_SPEED bit clears power. */ 2447 OWRITE4(sc, port, UPS_LOW_SPEED); 2448 break; 2449 case UHF_C_PORT_CONNECTION: 2450 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2451 break; 2452 case UHF_C_PORT_ENABLE: 2453 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2454 break; 2455 case UHF_C_PORT_SUSPEND: 2456 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2457 break; 2458 case UHF_C_PORT_OVER_CURRENT: 2459 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2460 break; 2461 case UHF_C_PORT_RESET: 2462 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2463 break; 2464 default: 2465 err = USBD_IOERROR; 2466 goto ret; 2467 } 2468 switch(value) { 2469 case UHF_C_PORT_CONNECTION: 2470 case UHF_C_PORT_ENABLE: 2471 case UHF_C_PORT_SUSPEND: 2472 case UHF_C_PORT_OVER_CURRENT: 2473 case UHF_C_PORT_RESET: 2474 /* Enable RHSC interrupt if condition is cleared. */ 2475 if ((OREAD4(sc, port) >> 16) == 0) 2476 ohci_rhsc_able(sc, 1); 2477 break; 2478 default: 2479 break; 2480 } 2481 break; 2482 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2483 if (value != 0) { 2484 err = USBD_IOERROR; 2485 goto ret; 2486 } 2487 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2488 hubd = ohci_hubd; 2489 hubd.bNbrPorts = sc->sc_noport; 2490 USETW(hubd.wHubCharacteristics, 2491 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2492 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2493 /* XXX overcurrent */ 2494 ); 2495 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2496 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2497 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2498 hubd.DeviceRemovable[i++] = (u_int8_t)v; 2499 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2500 l = min(len, hubd.bDescLength); 2501 totlen = l; 2502 memcpy(buf, &hubd, l); 2503 break; 2504 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2505 if (len != 4) { 2506 err = USBD_IOERROR; 2507 goto ret; 2508 } 2509 memset(buf, 0, len); /* ? XXX */ 2510 totlen = len; 2511 break; 2512 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2513 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 2514 index)); 2515 if (index < 1 || index > sc->sc_noport) { 2516 err = USBD_IOERROR; 2517 goto ret; 2518 } 2519 if (len != 4) { 2520 err = USBD_IOERROR; 2521 goto ret; 2522 } 2523 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2524 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 2525 v)); 2526 USETW(ps.wPortStatus, v); 2527 USETW(ps.wPortChange, v >> 16); 2528 l = min(len, sizeof ps); 2529 memcpy(buf, &ps, l); 2530 totlen = l; 2531 break; 2532 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2533 err = USBD_IOERROR; 2534 goto ret; 2535 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2536 break; 2537 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2538 if (index < 1 || index > sc->sc_noport) { 2539 err = USBD_IOERROR; 2540 goto ret; 2541 } 2542 port = OHCI_RH_PORT_STATUS(index); 2543 switch(value) { 2544 case UHF_PORT_ENABLE: 2545 OWRITE4(sc, port, UPS_PORT_ENABLED); 2546 break; 2547 case UHF_PORT_SUSPEND: 2548 OWRITE4(sc, port, UPS_SUSPEND); 2549 break; 2550 case UHF_PORT_RESET: 2551 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 2552 index)); 2553 OWRITE4(sc, port, UPS_RESET); 2554 for (i = 0; i < 5; i++) { 2555 usb_delay_ms(&sc->sc_bus, 2556 USB_PORT_ROOT_RESET_DELAY); 2557 if (sc->sc_dying) { 2558 err = USBD_IOERROR; 2559 goto ret; 2560 } 2561 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2562 break; 2563 } 2564 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 2565 index, OREAD4(sc, port))); 2566 break; 2567 case UHF_PORT_POWER: 2568 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 2569 "%d\n", index)); 2570 OWRITE4(sc, port, UPS_PORT_POWER); 2571 break; 2572 default: 2573 err = USBD_IOERROR; 2574 goto ret; 2575 } 2576 break; 2577 default: 2578 err = USBD_IOERROR; 2579 goto ret; 2580 } 2581 xfer->actlen = totlen; 2582 err = USBD_NORMAL_COMPLETION; 2583 ret: 2584 xfer->status = err; 2585 s = splusb(); 2586 usb_transfer_complete(xfer); 2587 splx(s); 2588 return (USBD_IN_PROGRESS); 2589 } 2590 2591 /* Abort a root control request. */ 2592 Static void 2593 ohci_root_ctrl_abort(usbd_xfer_handle xfer) 2594 { 2595 /* Nothing to do, all transfers are synchronous. */ 2596 } 2597 2598 /* Close the root pipe. */ 2599 Static void 2600 ohci_root_ctrl_close(usbd_pipe_handle pipe) 2601 { 2602 DPRINTF(("ohci_root_ctrl_close\n")); 2603 /* Nothing to do. */ 2604 } 2605 2606 Static usbd_status 2607 ohci_root_intr_transfer(usbd_xfer_handle xfer) 2608 { 2609 usbd_status err; 2610 2611 /* Insert last in queue. */ 2612 err = usb_insert_transfer(xfer); 2613 if (err) 2614 return (err); 2615 2616 /* Pipe isn't running, start first */ 2617 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2618 } 2619 2620 Static usbd_status 2621 ohci_root_intr_start(usbd_xfer_handle xfer) 2622 { 2623 usbd_pipe_handle pipe = xfer->pipe; 2624 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2625 2626 if (sc->sc_dying) 2627 return (USBD_IOERROR); 2628 2629 sc->sc_intrxfer = xfer; 2630 2631 return (USBD_IN_PROGRESS); 2632 } 2633 2634 /* Abort a root interrupt request. */ 2635 Static void 2636 ohci_root_intr_abort(usbd_xfer_handle xfer) 2637 { 2638 int s; 2639 2640 if (xfer->pipe->intrxfer == xfer) { 2641 DPRINTF(("ohci_root_intr_abort: remove\n")); 2642 xfer->pipe->intrxfer = NULL; 2643 } 2644 xfer->status = USBD_CANCELLED; 2645 s = splusb(); 2646 usb_transfer_complete(xfer); 2647 splx(s); 2648 } 2649 2650 /* Close the root pipe. */ 2651 Static void 2652 ohci_root_intr_close(usbd_pipe_handle pipe) 2653 { 2654 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2655 2656 DPRINTF(("ohci_root_intr_close\n")); 2657 2658 sc->sc_intrxfer = NULL; 2659 } 2660 2661 /************************/ 2662 2663 Static usbd_status 2664 ohci_device_ctrl_transfer(usbd_xfer_handle xfer) 2665 { 2666 usbd_status err; 2667 2668 /* Insert last in queue. */ 2669 err = usb_insert_transfer(xfer); 2670 if (err) 2671 return (err); 2672 2673 /* Pipe isn't running, start first */ 2674 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2675 } 2676 2677 Static usbd_status 2678 ohci_device_ctrl_start(usbd_xfer_handle xfer) 2679 { 2680 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2681 usbd_status err; 2682 2683 if (sc->sc_dying) 2684 return (USBD_IOERROR); 2685 2686 #ifdef DIAGNOSTIC 2687 if (!(xfer->rqflags & URQ_REQUEST)) { 2688 /* XXX panic */ 2689 printf("ohci_device_ctrl_transfer: not a request\n"); 2690 return (USBD_INVAL); 2691 } 2692 #endif 2693 2694 err = ohci_device_request(xfer); 2695 if (err) 2696 return (err); 2697 2698 if (sc->sc_bus.use_polling) 2699 ohci_waitintr(sc, xfer); 2700 return (USBD_IN_PROGRESS); 2701 } 2702 2703 /* Abort a device control request. */ 2704 Static void 2705 ohci_device_ctrl_abort(usbd_xfer_handle xfer) 2706 { 2707 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer)); 2708 ohci_abort_xfer(xfer, USBD_CANCELLED); 2709 } 2710 2711 /* Close a device control pipe. */ 2712 Static void 2713 ohci_device_ctrl_close(usbd_pipe_handle pipe) 2714 { 2715 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2716 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2717 2718 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe)); 2719 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2720 ohci_free_std(sc, opipe->tail.td); 2721 } 2722 2723 /************************/ 2724 2725 Static void 2726 ohci_device_clear_toggle(usbd_pipe_handle pipe) 2727 { 2728 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2729 2730 opipe->sed->ed.ed_headp &= htole32(~OHCI_TOGGLECARRY); 2731 } 2732 2733 Static void 2734 ohci_noop(usbd_pipe_handle pipe) 2735 { 2736 } 2737 2738 Static usbd_status 2739 ohci_device_bulk_transfer(usbd_xfer_handle xfer) 2740 { 2741 usbd_status err; 2742 2743 /* Insert last in queue. */ 2744 err = usb_insert_transfer(xfer); 2745 if (err) 2746 return (err); 2747 2748 /* Pipe isn't running, start first */ 2749 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2750 } 2751 2752 Static usbd_status 2753 ohci_device_bulk_start(usbd_xfer_handle xfer) 2754 { 2755 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2756 usbd_device_handle dev = opipe->pipe.device; 2757 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2758 int addr = dev->address; 2759 ohci_soft_td_t *data, *tail, *tdp; 2760 ohci_soft_ed_t *sed; 2761 int s, len, isread, endpt; 2762 usbd_status err; 2763 2764 if (sc->sc_dying) 2765 return (USBD_IOERROR); 2766 2767 #ifdef DIAGNOSTIC 2768 if (xfer->rqflags & URQ_REQUEST) { 2769 /* XXX panic */ 2770 printf("ohci_device_bulk_start: a request\n"); 2771 return (USBD_INVAL); 2772 } 2773 #endif 2774 2775 len = xfer->length; 2776 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 2777 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2778 sed = opipe->sed; 2779 2780 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d " 2781 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags, 2782 endpt)); 2783 2784 opipe->u.bulk.isread = isread; 2785 opipe->u.bulk.length = len; 2786 2787 /* Update device address */ 2788 sed->ed.ed_flags = htole32( 2789 (le32toh(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) | 2790 OHCI_ED_SET_FA(addr)); 2791 2792 /* Allocate a chain of new TDs (including a new tail). */ 2793 data = opipe->tail.td; 2794 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 2795 data, &tail); 2796 /* We want interrupt at the end of the transfer. */ 2797 tail->td.td_flags &= htole32(~OHCI_TD_INTR_MASK); 2798 tail->td.td_flags |= htole32(OHCI_TD_SET_DI(1)); 2799 tail->flags |= OHCI_CALL_DONE; 2800 tail = tail->nexttd; /* point at sentinel */ 2801 if (err) 2802 return (err); 2803 2804 tail->xfer = NULL; 2805 xfer->hcpriv = data; 2806 2807 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x " 2808 "td_cbp=0x%08x td_be=0x%08x\n", 2809 (int)le32toh(sed->ed.ed_flags), 2810 (int)le32toh(data->td.td_flags), 2811 (int)le32toh(data->td.td_cbp), 2812 (int)le32toh(data->td.td_be))); 2813 2814 #ifdef OHCI_DEBUG 2815 if (ohcidebug > 5) { 2816 ohci_dump_ed(sed); 2817 ohci_dump_tds(data); 2818 } 2819 #endif 2820 2821 /* Insert ED in schedule */ 2822 s = splusb(); 2823 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 2824 tdp->xfer = xfer; 2825 } 2826 sed->ed.ed_tailp = htole32(tail->physaddr); 2827 opipe->tail.td = tail; 2828 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 2829 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 2830 if (xfer->timeout && !sc->sc_bus.use_polling) { 2831 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout), 2832 ohci_timeout, xfer); 2833 } 2834 2835 #if 0 2836 /* This goes wrong if we are too slow. */ 2837 if (ohcidebug > 10) { 2838 delay(10000); 2839 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2840 OREAD4(sc, OHCI_COMMAND_STATUS))); 2841 ohci_dump_ed(sed); 2842 ohci_dump_tds(data); 2843 } 2844 #endif 2845 2846 splx(s); 2847 2848 return (USBD_IN_PROGRESS); 2849 } 2850 2851 Static void 2852 ohci_device_bulk_abort(usbd_xfer_handle xfer) 2853 { 2854 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer)); 2855 ohci_abort_xfer(xfer, USBD_CANCELLED); 2856 } 2857 2858 /* 2859 * Close a device bulk pipe. 2860 */ 2861 Static void 2862 ohci_device_bulk_close(usbd_pipe_handle pipe) 2863 { 2864 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2865 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2866 2867 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe)); 2868 ohci_close_pipe(pipe, sc->sc_bulk_head); 2869 ohci_free_std(sc, opipe->tail.td); 2870 } 2871 2872 /************************/ 2873 2874 Static usbd_status 2875 ohci_device_intr_transfer(usbd_xfer_handle xfer) 2876 { 2877 usbd_status err; 2878 2879 /* Insert last in queue. */ 2880 err = usb_insert_transfer(xfer); 2881 if (err) 2882 return (err); 2883 2884 /* Pipe isn't running, start first */ 2885 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2886 } 2887 2888 Static usbd_status 2889 ohci_device_intr_start(usbd_xfer_handle xfer) 2890 { 2891 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2892 usbd_device_handle dev = opipe->pipe.device; 2893 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2894 ohci_soft_ed_t *sed = opipe->sed; 2895 ohci_soft_td_t *data, *tail; 2896 int len; 2897 int s; 2898 2899 if (sc->sc_dying) 2900 return (USBD_IOERROR); 2901 2902 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d " 2903 "flags=%d priv=%p\n", 2904 xfer, xfer->length, xfer->flags, xfer->priv)); 2905 2906 #ifdef DIAGNOSTIC 2907 if (xfer->rqflags & URQ_REQUEST) 2908 panic("ohci_device_intr_transfer: a request\n"); 2909 #endif 2910 2911 len = xfer->length; 2912 2913 data = opipe->tail.td; 2914 tail = ohci_alloc_std(sc); 2915 if (tail == NULL) 2916 return (USBD_NOMEM); 2917 tail->xfer = NULL; 2918 2919 data->td.td_flags = htole32( 2920 OHCI_TD_IN | OHCI_TD_NOCC | 2921 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 2922 if (xfer->flags & USBD_SHORT_XFER_OK) 2923 data->td.td_flags |= htole32(OHCI_TD_R); 2924 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf)); 2925 data->nexttd = tail; 2926 data->td.td_nexttd = htole32(tail->physaddr); 2927 data->td.td_be = htole32(le32toh(data->td.td_cbp) + len - 1); 2928 data->len = len; 2929 data->xfer = xfer; 2930 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 2931 xfer->hcpriv = data; 2932 2933 #ifdef OHCI_DEBUG 2934 if (ohcidebug > 5) { 2935 DPRINTF(("ohci_device_intr_transfer:\n")); 2936 ohci_dump_ed(sed); 2937 ohci_dump_tds(data); 2938 } 2939 #endif 2940 2941 /* Insert ED in schedule */ 2942 s = splusb(); 2943 sed->ed.ed_tailp = htole32(tail->physaddr); 2944 opipe->tail.td = tail; 2945 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 2946 2947 #if 0 2948 /* 2949 * This goes horribly wrong, printing thousands of descriptors, 2950 * because false references are followed due to the fact that the 2951 * TD is gone. 2952 */ 2953 if (ohcidebug > 5) { 2954 usb_delay_ms(&sc->sc_bus, 5); 2955 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2956 OREAD4(sc, OHCI_COMMAND_STATUS))); 2957 ohci_dump_ed(sed); 2958 ohci_dump_tds(data); 2959 } 2960 #endif 2961 splx(s); 2962 2963 return (USBD_IN_PROGRESS); 2964 } 2965 2966 /* Abort a device control request. */ 2967 Static void 2968 ohci_device_intr_abort(usbd_xfer_handle xfer) 2969 { 2970 if (xfer->pipe->intrxfer == xfer) { 2971 DPRINTF(("ohci_device_intr_abort: remove\n")); 2972 xfer->pipe->intrxfer = NULL; 2973 } 2974 ohci_abort_xfer(xfer, USBD_CANCELLED); 2975 } 2976 2977 /* Close a device interrupt pipe. */ 2978 Static void 2979 ohci_device_intr_close(usbd_pipe_handle pipe) 2980 { 2981 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2982 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2983 int nslots = opipe->u.intr.nslots; 2984 int pos = opipe->u.intr.pos; 2985 int j; 2986 ohci_soft_ed_t *p, *sed = opipe->sed; 2987 int s; 2988 2989 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 2990 pipe, nslots, pos)); 2991 s = splusb(); 2992 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 2993 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2994 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) 2995 usb_delay_ms(&sc->sc_bus, 2); 2996 2997 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 2998 ; 2999 #ifdef DIAGNOSTIC 3000 if (p == NULL) 3001 panic("ohci_device_intr_close: ED not found\n"); 3002 #endif 3003 p->next = sed->next; 3004 p->ed.ed_nexted = sed->ed.ed_nexted; 3005 splx(s); 3006 3007 for (j = 0; j < nslots; j++) 3008 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 3009 3010 ohci_free_std(sc, opipe->tail.td); 3011 ohci_free_sed(sc, opipe->sed); 3012 } 3013 3014 Static usbd_status 3015 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival) 3016 { 3017 int i, j, s, best; 3018 u_int npoll, slow, shigh, nslots; 3019 u_int bestbw, bw; 3020 ohci_soft_ed_t *hsed, *sed = opipe->sed; 3021 3022 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 3023 if (ival == 0) { 3024 printf("ohci_setintr: 0 interval\n"); 3025 return (USBD_INVAL); 3026 } 3027 3028 npoll = OHCI_NO_INTRS; 3029 while (npoll > ival) 3030 npoll /= 2; 3031 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 3032 3033 /* 3034 * We now know which level in the tree the ED must go into. 3035 * Figure out which slot has most bandwidth left over. 3036 * Slots to examine: 3037 * npoll 3038 * 1 0 3039 * 2 1 2 3040 * 4 3 4 5 6 3041 * 8 7 8 9 10 11 12 13 14 3042 * N (N-1) .. (N-1+N-1) 3043 */ 3044 slow = npoll-1; 3045 shigh = slow + npoll; 3046 nslots = OHCI_NO_INTRS / npoll; 3047 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 3048 bw = 0; 3049 for (j = 0; j < nslots; j++) 3050 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 3051 if (bw < bestbw) { 3052 best = i; 3053 bestbw = bw; 3054 } 3055 } 3056 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 3057 best, slow, shigh, bestbw)); 3058 3059 s = splusb(); 3060 hsed = sc->sc_eds[best]; 3061 sed->next = hsed->next; 3062 sed->ed.ed_nexted = hsed->ed.ed_nexted; 3063 hsed->next = sed; 3064 hsed->ed.ed_nexted = htole32(sed->physaddr); 3065 splx(s); 3066 3067 for (j = 0; j < nslots; j++) 3068 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 3069 opipe->u.intr.nslots = nslots; 3070 opipe->u.intr.pos = best; 3071 3072 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 3073 return (USBD_NORMAL_COMPLETION); 3074 } 3075 3076 /***********************/ 3077 3078 usbd_status 3079 ohci_device_isoc_transfer(usbd_xfer_handle xfer) 3080 { 3081 usbd_status err; 3082 3083 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer)); 3084 3085 /* Put it on our queue, */ 3086 err = usb_insert_transfer(xfer); 3087 3088 /* bail out on error, */ 3089 if (err && err != USBD_IN_PROGRESS) 3090 return (err); 3091 3092 /* XXX should check inuse here */ 3093 3094 /* insert into schedule, */ 3095 ohci_device_isoc_enter(xfer); 3096 3097 /* and start if the pipe wasn't running */ 3098 if (!err) 3099 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 3100 3101 return (err); 3102 } 3103 3104 void 3105 ohci_device_isoc_enter(usbd_xfer_handle xfer) 3106 { 3107 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3108 usbd_device_handle dev = opipe->pipe.device; 3109 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 3110 ohci_soft_ed_t *sed = opipe->sed; 3111 struct iso *iso = &opipe->u.iso; 3112 ohci_soft_itd_t *sitd, *nsitd; 3113 ohci_physaddr_t buf, offs, noffs, bp0; 3114 int i, ncur, nframes; 3115 int s; 3116 3117 DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p " 3118 "nframes=%d\n", 3119 iso->inuse, iso->next, xfer, xfer->nframes)); 3120 3121 if (sc->sc_dying) 3122 return; 3123 3124 if (iso->next == -1) { 3125 /* Not in use yet, schedule it a few frames ahead. */ 3126 iso->next = le32toh(sc->sc_hcca->hcca_frame_number) + 5; 3127 DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n", 3128 iso->next)); 3129 } 3130 3131 sitd = opipe->tail.itd; 3132 buf = DMAADDR(&xfer->dmabuf); 3133 bp0 = OHCI_PAGE(buf); 3134 offs = OHCI_PAGE_OFFSET(buf); 3135 nframes = xfer->nframes; 3136 xfer->hcpriv = sitd; 3137 for (i = ncur = 0; i < nframes; i++, ncur++) { 3138 noffs = offs + xfer->frlengths[i]; 3139 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ 3140 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */ 3141 3142 /* Allocate next ITD */ 3143 nsitd = ohci_alloc_sitd(sc); 3144 if (nsitd == NULL) { 3145 /* XXX what now? */ 3146 printf("%s: isoc TD alloc failed\n", 3147 USBDEVNAME(sc->sc_bus.bdev)); 3148 return; 3149 } 3150 3151 /* Fill current ITD */ 3152 sitd->itd.itd_flags = htole32( 3153 OHCI_ITD_NOCC | 3154 OHCI_ITD_SET_SF(iso->next) | 3155 OHCI_ITD_SET_DI(6) | /* delay intr a little */ 3156 OHCI_ITD_SET_FC(ncur)); 3157 sitd->itd.itd_bp0 = htole32(bp0); 3158 sitd->nextitd = nsitd; 3159 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 3160 sitd->itd.itd_be = htole32(bp0 + offs - 1); 3161 sitd->xfer = xfer; 3162 sitd->flags = 0; 3163 3164 sitd = nsitd; 3165 iso->next = iso->next + ncur; 3166 bp0 = OHCI_PAGE(buf + offs); 3167 ncur = 0; 3168 } 3169 sitd->itd.itd_offset[ncur] = htole16(OHCI_ITD_MK_OFFS(offs)); 3170 offs = noffs; 3171 } 3172 nsitd = ohci_alloc_sitd(sc); 3173 if (nsitd == NULL) { 3174 /* XXX what now? */ 3175 printf("%s: isoc TD alloc failed\n", 3176 USBDEVNAME(sc->sc_bus.bdev)); 3177 return; 3178 } 3179 /* Fixup last used ITD */ 3180 sitd->itd.itd_flags = htole32( 3181 OHCI_ITD_NOCC | 3182 OHCI_ITD_SET_SF(iso->next) | 3183 OHCI_ITD_SET_DI(0) | 3184 OHCI_ITD_SET_FC(ncur)); 3185 sitd->itd.itd_bp0 = htole32(bp0); 3186 sitd->nextitd = nsitd; 3187 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 3188 sitd->itd.itd_be = htole32(bp0 + offs - 1); 3189 sitd->xfer = xfer; 3190 sitd->flags = OHCI_CALL_DONE; 3191 3192 iso->next = iso->next + ncur; 3193 iso->inuse += nframes; 3194 3195 xfer->actlen = offs; /* XXX pretend we did it all */ 3196 3197 xfer->status = USBD_IN_PROGRESS; 3198 3199 #ifdef OHCI_DEBUG 3200 if (ohcidebug > 5) { 3201 DPRINTF(("ohci_device_isoc_enter: frame=%d\n", 3202 le32toh(sc->sc_hcca->hcca_frame_number))); 3203 ohci_dump_itds(xfer->hcpriv); 3204 ohci_dump_ed(sed); 3205 } 3206 #endif 3207 3208 s = splusb(); 3209 opipe->tail.itd = nsitd; 3210 sed->ed.ed_tailp = htole32(nsitd->physaddr); 3211 splx(s); 3212 3213 #ifdef OHCI_DEBUG 3214 if (ohcidebug > 5) { 3215 delay(150000); 3216 DPRINTF(("ohci_device_isoc_enter: after frame=%d\n", 3217 le32toh(sc->sc_hcca->hcca_frame_number))); 3218 ohci_dump_itds(xfer->hcpriv); 3219 ohci_dump_ed(sed); 3220 } 3221 #endif 3222 } 3223 3224 usbd_status 3225 ohci_device_isoc_start(usbd_xfer_handle xfer) 3226 { 3227 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3228 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3229 3230 DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer)); 3231 3232 if (sc->sc_dying) 3233 return (USBD_IOERROR); 3234 3235 #ifdef DIAGNOSTIC 3236 if (xfer->status != USBD_IN_PROGRESS) 3237 printf("uhci_device_isoc_start: not in progress %p\n", xfer); 3238 #endif 3239 3240 /* XXX anything to do? */ 3241 3242 return (USBD_IN_PROGRESS); 3243 } 3244 3245 void 3246 ohci_device_isoc_abort(usbd_xfer_handle xfer) 3247 { 3248 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3249 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3250 ohci_soft_ed_t *sed; 3251 ohci_soft_itd_t *sitd; 3252 int s; 3253 3254 s = splusb(); 3255 3256 DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer)); 3257 3258 /* Transfer is already done. */ 3259 if (xfer->status != USBD_NOT_STARTED && 3260 xfer->status != USBD_IN_PROGRESS) { 3261 splx(s); 3262 printf("ohci_device_isoc_abort: early return\n"); 3263 return; 3264 } 3265 3266 /* Give xfer the requested abort code. */ 3267 xfer->status = USBD_CANCELLED; 3268 3269 sed = opipe->sed; 3270 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 3271 3272 sitd = xfer->hcpriv; 3273 #ifdef DIAGNOSTIC 3274 if (sitd == NULL) { 3275 splx(s); 3276 printf("ohci_device_isoc_abort: hcpriv==0\n"); 3277 return; 3278 } 3279 #endif 3280 for (; sitd->xfer == xfer; sitd = sitd->nextitd) { 3281 #ifdef DIAGNOSTIC 3282 DPRINTFN(1,("abort sets done sitd=%p\n", sitd)); 3283 sitd->isdone = 1; 3284 #endif 3285 } 3286 3287 splx(s); 3288 3289 usb_delay_ms(&sc->sc_bus, OHCI_ITD_NOFFSET); 3290 3291 s = splusb(); 3292 3293 /* Run callback. */ 3294 usb_transfer_complete(xfer); 3295 3296 sed->ed.ed_headp = htole32(sitd->physaddr); /* unlink TDs */ 3297 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 3298 3299 splx(s); 3300 } 3301 3302 void 3303 ohci_device_isoc_done(usbd_xfer_handle xfer) 3304 { 3305 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3306 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3307 ohci_soft_itd_t *sitd, *nsitd; 3308 3309 DPRINTFN(1,("ohci_device_isoc_done: xfer=%p\n", xfer)); 3310 3311 for (sitd = xfer->hcpriv; 3312 !(sitd->flags & OHCI_CALL_DONE); 3313 sitd = nsitd) { 3314 nsitd = sitd->nextitd; 3315 DPRINTFN(1,("ohci_device_isoc_done: free sitd=%p\n", sitd)); 3316 ohci_free_sitd(sc, sitd); 3317 } 3318 ohci_free_sitd(sc, sitd); 3319 xfer->hcpriv = NULL; 3320 } 3321 3322 usbd_status 3323 ohci_setup_isoc(usbd_pipe_handle pipe) 3324 { 3325 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3326 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3327 struct iso *iso = &opipe->u.iso; 3328 int s; 3329 3330 iso->next = -1; 3331 iso->inuse = 0; 3332 3333 s = splusb(); 3334 ohci_add_ed(opipe->sed, sc->sc_isoc_head); 3335 splx(s); 3336 3337 return (USBD_NORMAL_COMPLETION); 3338 } 3339 3340 void 3341 ohci_device_isoc_close(usbd_pipe_handle pipe) 3342 { 3343 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3344 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3345 int s; 3346 3347 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe)); 3348 3349 s = splusb(); 3350 ohci_rem_ed(opipe->sed, sc->sc_isoc_head); 3351 splx(s); 3352 ohci_close_pipe(pipe, sc->sc_isoc_head); 3353 #ifdef DIAGNOSTIC 3354 opipe->tail.itd->isdone = 1; 3355 #endif 3356 ohci_free_sitd(sc, opipe->tail.itd); 3357 } 3358
Indexes created Wed Sep 24 05:09:52 GMT 2025