ohci.c revision 1.117
1 /* $NetBSD: ohci.c,v 1.117 2001/12/27 11:27:11 augustss Exp $ */ 2 /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */ 3 4 /* 5 * Copyright (c) 1998 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Lennart Augustsson (lennart (at) augustsson.net) at 10 * Carlstedt Research & Technology. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. All advertising materials mentioning features or use of this software 21 * must display the following acknowledgement: 22 * This product includes software developed by the NetBSD 23 * Foundation, Inc. and its contributors. 24 * 4. Neither the name of The NetBSD Foundation nor the names of its 25 * contributors may be used to endorse or promote products derived 26 * from this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 29 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 30 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 31 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 32 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 33 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 34 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 35 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 36 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 37 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 * POSSIBILITY OF SUCH DAMAGE. 39 */ 40 41 /* 42 * USB Open Host Controller driver. 43 * 44 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html 45 * USB spec: http://www.usb.org/developers/data/usbspec.zip 46 */ 47 48 #include <sys/cdefs.h> 49 __KERNEL_RCSID(0, "$NetBSD: ohci.c,v 1.117 2001/12/27 11:27:11 augustss Exp $"); 50 51 #include <sys/param.h> 52 #include <sys/systm.h> 53 #include <sys/malloc.h> 54 #if defined(__NetBSD__) || defined(__OpenBSD__) 55 #include <sys/kernel.h> 56 #include <sys/device.h> 57 #include <sys/select.h> 58 #elif defined(__FreeBSD__) 59 #include <sys/module.h> 60 #include <sys/bus.h> 61 #include <machine/bus_pio.h> 62 #include <machine/bus_memio.h> 63 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 64 #include <machine/cpu.h> 65 #endif 66 #endif 67 #include <sys/proc.h> 68 #include <sys/queue.h> 69 70 #include <machine/bus.h> 71 #include <machine/endian.h> 72 73 #include <dev/usb/usb.h> 74 #include <dev/usb/usbdi.h> 75 #include <dev/usb/usbdivar.h> 76 #include <dev/usb/usb_mem.h> 77 #include <dev/usb/usb_quirks.h> 78 79 #include <dev/usb/ohcireg.h> 80 #include <dev/usb/ohcivar.h> 81 82 #if defined(__FreeBSD__) 83 #include <machine/clock.h> 84 85 #define delay(d) DELAY(d) 86 #endif 87 88 #if defined(__OpenBSD__) 89 struct cfdriver ohci_cd = { 90 NULL, "ohci", DV_DULL 91 }; 92 #endif 93 94 #ifdef OHCI_DEBUG 95 #define DPRINTF(x) if (ohcidebug) logprintf x 96 #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x 97 int ohcidebug = 0; 98 #ifndef __NetBSD__ 99 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 100 #endif 101 #else 102 #define DPRINTF(x) 103 #define DPRINTFN(n,x) 104 #endif 105 106 /* 107 * The OHCI controller is little endian, so on big endian machines 108 * the data strored in memory needs to be swapped. 109 */ 110 #if defined(__FreeBSD__) || defined(__OpenBSD__) 111 #if BYTE_ORDER == BIG_ENDIAN 112 #define htole32(x) (bswap32(x)) 113 #define le32toh(x) (bswap32(x)) 114 #else 115 #define htole32(x) (x) 116 #define le32toh(x) (x) 117 #endif 118 #endif 119 120 struct ohci_pipe; 121 122 Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *); 123 Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *); 124 125 Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *); 126 Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *); 127 128 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *); 129 Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *); 130 131 #if 0 132 Static void ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *, 133 ohci_soft_td_t *); 134 #endif 135 Static usbd_status ohci_alloc_std_chain(struct ohci_pipe *, 136 ohci_softc_t *, int, int, usbd_xfer_handle, 137 ohci_soft_td_t *, ohci_soft_td_t **); 138 139 Static void ohci_shutdown(void *v); 140 Static void ohci_power(int, void *); 141 Static usbd_status ohci_open(usbd_pipe_handle); 142 Static void ohci_poll(struct usbd_bus *); 143 Static void ohci_softintr(void *); 144 Static void ohci_waitintr(ohci_softc_t *, usbd_xfer_handle); 145 Static void ohci_add_done(ohci_softc_t *, ohci_physaddr_t); 146 Static void ohci_rhsc(ohci_softc_t *, usbd_xfer_handle); 147 148 Static usbd_status ohci_device_request(usbd_xfer_handle xfer); 149 Static void ohci_add_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 150 Static void ohci_rem_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 151 Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *); 152 Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *); 153 Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t); 154 Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *); 155 Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *); 156 Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t); 157 158 Static usbd_status ohci_setup_isoc(usbd_pipe_handle pipe); 159 Static void ohci_device_isoc_enter(usbd_xfer_handle); 160 161 Static usbd_status ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 162 Static void ohci_freem(struct usbd_bus *, usb_dma_t *); 163 164 Static usbd_xfer_handle ohci_allocx(struct usbd_bus *); 165 Static void ohci_freex(struct usbd_bus *, usbd_xfer_handle); 166 167 Static usbd_status ohci_root_ctrl_transfer(usbd_xfer_handle); 168 Static usbd_status ohci_root_ctrl_start(usbd_xfer_handle); 169 Static void ohci_root_ctrl_abort(usbd_xfer_handle); 170 Static void ohci_root_ctrl_close(usbd_pipe_handle); 171 Static void ohci_root_ctrl_done(usbd_xfer_handle); 172 173 Static usbd_status ohci_root_intr_transfer(usbd_xfer_handle); 174 Static usbd_status ohci_root_intr_start(usbd_xfer_handle); 175 Static void ohci_root_intr_abort(usbd_xfer_handle); 176 Static void ohci_root_intr_close(usbd_pipe_handle); 177 Static void ohci_root_intr_done(usbd_xfer_handle); 178 179 Static usbd_status ohci_device_ctrl_transfer(usbd_xfer_handle); 180 Static usbd_status ohci_device_ctrl_start(usbd_xfer_handle); 181 Static void ohci_device_ctrl_abort(usbd_xfer_handle); 182 Static void ohci_device_ctrl_close(usbd_pipe_handle); 183 Static void ohci_device_ctrl_done(usbd_xfer_handle); 184 185 Static usbd_status ohci_device_bulk_transfer(usbd_xfer_handle); 186 Static usbd_status ohci_device_bulk_start(usbd_xfer_handle); 187 Static void ohci_device_bulk_abort(usbd_xfer_handle); 188 Static void ohci_device_bulk_close(usbd_pipe_handle); 189 Static void ohci_device_bulk_done(usbd_xfer_handle); 190 191 Static usbd_status ohci_device_intr_transfer(usbd_xfer_handle); 192 Static usbd_status ohci_device_intr_start(usbd_xfer_handle); 193 Static void ohci_device_intr_abort(usbd_xfer_handle); 194 Static void ohci_device_intr_close(usbd_pipe_handle); 195 Static void ohci_device_intr_done(usbd_xfer_handle); 196 197 Static usbd_status ohci_device_isoc_transfer(usbd_xfer_handle); 198 Static usbd_status ohci_device_isoc_start(usbd_xfer_handle); 199 Static void ohci_device_isoc_abort(usbd_xfer_handle); 200 Static void ohci_device_isoc_close(usbd_pipe_handle); 201 Static void ohci_device_isoc_done(usbd_xfer_handle); 202 203 Static usbd_status ohci_device_setintr(ohci_softc_t *sc, 204 struct ohci_pipe *pipe, int ival); 205 206 Static int ohci_str(usb_string_descriptor_t *, int, char *); 207 208 Static void ohci_timeout(void *); 209 Static void ohci_timeout_task(void *); 210 Static void ohci_rhsc_able(ohci_softc_t *, int); 211 Static void ohci_rhsc_enable(void *); 212 213 Static void ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *); 214 Static void ohci_abort_xfer(usbd_xfer_handle, usbd_status); 215 216 Static void ohci_device_clear_toggle(usbd_pipe_handle pipe); 217 Static void ohci_noop(usbd_pipe_handle pipe); 218 219 #ifdef OHCI_DEBUG 220 Static void ohci_dumpregs(ohci_softc_t *); 221 Static void ohci_dump_tds(ohci_soft_td_t *); 222 Static void ohci_dump_td(ohci_soft_td_t *); 223 Static void ohci_dump_ed(ohci_soft_ed_t *); 224 Static void ohci_dump_itd(ohci_soft_itd_t *); 225 Static void ohci_dump_itds(ohci_soft_itd_t *); 226 #endif 227 228 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 229 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 230 #define OWRITE1(sc, r, x) \ 231 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 232 #define OWRITE2(sc, r, x) \ 233 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 234 #define OWRITE4(sc, r, x) \ 235 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 236 #define OREAD1(sc, r) (OBARR(sc), bus_space_read_1((sc)->iot, (sc)->ioh, (r))) 237 #define OREAD2(sc, r) (OBARR(sc), bus_space_read_2((sc)->iot, (sc)->ioh, (r))) 238 #define OREAD4(sc, r) (OBARR(sc), bus_space_read_4((sc)->iot, (sc)->ioh, (r))) 239 240 /* Reverse the bits in a value 0 .. 31 */ 241 Static u_int8_t revbits[OHCI_NO_INTRS] = 242 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 243 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 244 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 245 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 246 247 struct ohci_pipe { 248 struct usbd_pipe pipe; 249 ohci_soft_ed_t *sed; 250 union { 251 ohci_soft_td_t *td; 252 ohci_soft_itd_t *itd; 253 } tail; 254 /* Info needed for different pipe kinds. */ 255 union { 256 /* Control pipe */ 257 struct { 258 usb_dma_t reqdma; 259 u_int length; 260 ohci_soft_td_t *setup, *data, *stat; 261 } ctl; 262 /* Interrupt pipe */ 263 struct { 264 int nslots; 265 int pos; 266 } intr; 267 /* Bulk pipe */ 268 struct { 269 u_int length; 270 int isread; 271 } bulk; 272 /* Iso pipe */ 273 struct iso { 274 int next, inuse; 275 } iso; 276 } u; 277 }; 278 279 #define OHCI_INTR_ENDPT 1 280 281 Static struct usbd_bus_methods ohci_bus_methods = { 282 ohci_open, 283 ohci_softintr, 284 ohci_poll, 285 ohci_allocm, 286 ohci_freem, 287 ohci_allocx, 288 ohci_freex, 289 }; 290 291 Static struct usbd_pipe_methods ohci_root_ctrl_methods = { 292 ohci_root_ctrl_transfer, 293 ohci_root_ctrl_start, 294 ohci_root_ctrl_abort, 295 ohci_root_ctrl_close, 296 ohci_noop, 297 ohci_root_ctrl_done, 298 }; 299 300 Static struct usbd_pipe_methods ohci_root_intr_methods = { 301 ohci_root_intr_transfer, 302 ohci_root_intr_start, 303 ohci_root_intr_abort, 304 ohci_root_intr_close, 305 ohci_noop, 306 ohci_root_intr_done, 307 }; 308 309 Static struct usbd_pipe_methods ohci_device_ctrl_methods = { 310 ohci_device_ctrl_transfer, 311 ohci_device_ctrl_start, 312 ohci_device_ctrl_abort, 313 ohci_device_ctrl_close, 314 ohci_noop, 315 ohci_device_ctrl_done, 316 }; 317 318 Static struct usbd_pipe_methods ohci_device_intr_methods = { 319 ohci_device_intr_transfer, 320 ohci_device_intr_start, 321 ohci_device_intr_abort, 322 ohci_device_intr_close, 323 ohci_device_clear_toggle, 324 ohci_device_intr_done, 325 }; 326 327 Static struct usbd_pipe_methods ohci_device_bulk_methods = { 328 ohci_device_bulk_transfer, 329 ohci_device_bulk_start, 330 ohci_device_bulk_abort, 331 ohci_device_bulk_close, 332 ohci_device_clear_toggle, 333 ohci_device_bulk_done, 334 }; 335 336 Static struct usbd_pipe_methods ohci_device_isoc_methods = { 337 ohci_device_isoc_transfer, 338 ohci_device_isoc_start, 339 ohci_device_isoc_abort, 340 ohci_device_isoc_close, 341 ohci_noop, 342 ohci_device_isoc_done, 343 }; 344 345 #if defined(__NetBSD__) || defined(__OpenBSD__) 346 int 347 ohci_activate(device_ptr_t self, enum devact act) 348 { 349 struct ohci_softc *sc = (struct ohci_softc *)self; 350 int rv = 0; 351 352 switch (act) { 353 case DVACT_ACTIVATE: 354 return (EOPNOTSUPP); 355 break; 356 357 case DVACT_DEACTIVATE: 358 if (sc->sc_child != NULL) 359 rv = config_deactivate(sc->sc_child); 360 sc->sc_dying = 1; 361 break; 362 } 363 return (rv); 364 } 365 366 int 367 ohci_detach(struct ohci_softc *sc, int flags) 368 { 369 int rv = 0; 370 371 if (sc->sc_child != NULL) 372 rv = config_detach(sc->sc_child, flags); 373 374 if (rv != 0) 375 return (rv); 376 377 usb_uncallout(sc->sc_tmo_rhsc, ohci_rhsc_enable, sc); 378 379 #if defined(__NetBSD__) || defined(__OpenBSD__) 380 powerhook_disestablish(sc->sc_powerhook); 381 shutdownhook_disestablish(sc->sc_shutdownhook); 382 #endif 383 384 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 385 386 /* free data structures XXX */ 387 388 return (rv); 389 } 390 #endif 391 392 ohci_soft_ed_t * 393 ohci_alloc_sed(ohci_softc_t *sc) 394 { 395 ohci_soft_ed_t *sed; 396 usbd_status err; 397 int i, offs; 398 usb_dma_t dma; 399 400 if (sc->sc_freeeds == NULL) { 401 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 402 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 403 OHCI_ED_ALIGN, &dma); 404 if (err) 405 return (0); 406 for(i = 0; i < OHCI_SED_CHUNK; i++) { 407 offs = i * OHCI_SED_SIZE; 408 sed = (ohci_soft_ed_t *)((char *)KERNADDR(&dma) +offs); 409 sed->physaddr = DMAADDR(&dma) + offs; 410 sed->next = sc->sc_freeeds; 411 sc->sc_freeeds = sed; 412 } 413 } 414 sed = sc->sc_freeeds; 415 sc->sc_freeeds = sed->next; 416 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 417 sed->next = 0; 418 return (sed); 419 } 420 421 void 422 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 423 { 424 sed->next = sc->sc_freeeds; 425 sc->sc_freeeds = sed; 426 } 427 428 ohci_soft_td_t * 429 ohci_alloc_std(ohci_softc_t *sc) 430 { 431 ohci_soft_td_t *std; 432 usbd_status err; 433 int i, offs; 434 usb_dma_t dma; 435 int s; 436 437 if (sc->sc_freetds == NULL) { 438 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 439 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 440 OHCI_TD_ALIGN, &dma); 441 if (err) 442 return (NULL); 443 s = splusb(); 444 for(i = 0; i < OHCI_STD_CHUNK; i++) { 445 offs = i * OHCI_STD_SIZE; 446 std = (ohci_soft_td_t *)((char *)KERNADDR(&dma) +offs); 447 std->physaddr = DMAADDR(&dma) + offs; 448 std->nexttd = sc->sc_freetds; 449 sc->sc_freetds = std; 450 } 451 splx(s); 452 } 453 454 s = splusb(); 455 std = sc->sc_freetds; 456 sc->sc_freetds = std->nexttd; 457 memset(&std->td, 0, sizeof(ohci_td_t)); 458 std->nexttd = NULL; 459 std->xfer = NULL; 460 ohci_hash_add_td(sc, std); 461 splx(s); 462 463 return (std); 464 } 465 466 void 467 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std) 468 { 469 int s; 470 471 s = splusb(); 472 ohci_hash_rem_td(sc, std); 473 std->nexttd = sc->sc_freetds; 474 sc->sc_freetds = std; 475 splx(s); 476 } 477 478 usbd_status 479 ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc, 480 int alen, int rd, usbd_xfer_handle xfer, 481 ohci_soft_td_t *sp, ohci_soft_td_t **ep) 482 { 483 ohci_soft_td_t *next, *cur; 484 ohci_physaddr_t dataphys, dataphysend; 485 u_int32_t tdflags; 486 int len, curlen; 487 usb_dma_t *dma = &xfer->dmabuf; 488 u_int16_t flags = xfer->flags; 489 490 DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen)); 491 492 len = alen; 493 cur = sp; 494 dataphys = DMAADDR(dma); 495 dataphysend = OHCI_PAGE(dataphys + len - 1); 496 tdflags = htole32( 497 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 498 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) | 499 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR); 500 501 for (;;) { 502 next = ohci_alloc_std(sc); 503 if (next == NULL) 504 goto nomem; 505 506 /* The OHCI hardware can handle at most one page crossing. */ 507 if (OHCI_PAGE(dataphys) == dataphysend || 508 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) { 509 /* we can handle it in this TD */ 510 curlen = len; 511 } else { 512 /* must use multiple TDs, fill as much as possible. */ 513 curlen = 2 * OHCI_PAGE_SIZE - 514 (dataphys & (OHCI_PAGE_SIZE-1)); 515 /* the length must be a multiple of the max size */ 516 curlen -= curlen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize); 517 #ifdef DIAGNOSTIC 518 if (curlen == 0) 519 panic("ohci_alloc_std: curlen == 0\n"); 520 #endif 521 } 522 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x " 523 "dataphysend=0x%08x len=%d curlen=%d\n", 524 dataphys, dataphysend, 525 len, curlen)); 526 len -= curlen; 527 528 cur->td.td_flags = tdflags; 529 cur->td.td_cbp = htole32(dataphys); 530 cur->nexttd = next; 531 cur->td.td_nexttd = htole32(next->physaddr); 532 cur->td.td_be = htole32(dataphys + curlen - 1); 533 cur->len = curlen; 534 cur->flags = OHCI_ADD_LEN; 535 cur->xfer = xfer; 536 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n", 537 dataphys, dataphys + curlen - 1)); 538 if (len == 0) 539 break; 540 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n")); 541 dataphys += curlen; 542 cur = next; 543 } 544 if ((flags & USBD_FORCE_SHORT_XFER) && 545 alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) { 546 /* Force a 0 length transfer at the end. */ 547 548 cur = next; 549 next = ohci_alloc_std(sc); 550 if (next == NULL) 551 goto nomem; 552 553 cur->td.td_flags = tdflags; 554 cur->td.td_cbp = 0; /* indicate 0 length packet */ 555 cur->nexttd = next; 556 cur->td.td_nexttd = htole32(next->physaddr); 557 cur->td.td_be = ~0; 558 cur->len = 0; 559 cur->flags = 0; 560 cur->xfer = xfer; 561 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n")); 562 } 563 *ep = cur; 564 565 return (USBD_NORMAL_COMPLETION); 566 567 nomem: 568 /* XXX free chain */ 569 return (USBD_NOMEM); 570 } 571 572 #if 0 573 Static void 574 ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std, 575 ohci_soft_td_t *stdend) 576 { 577 ohci_soft_td_t *p; 578 579 for (; std != stdend; std = p) { 580 p = std->nexttd; 581 ohci_free_std(sc, std); 582 } 583 } 584 #endif 585 586 ohci_soft_itd_t * 587 ohci_alloc_sitd(ohci_softc_t *sc) 588 { 589 ohci_soft_itd_t *sitd; 590 usbd_status err; 591 int i, s, offs; 592 usb_dma_t dma; 593 594 if (sc->sc_freeitds == NULL) { 595 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n")); 596 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK, 597 OHCI_ITD_ALIGN, &dma); 598 if (err) 599 return (NULL); 600 for(i = 0; i < OHCI_SITD_CHUNK; i++) { 601 offs = i * OHCI_SITD_SIZE; 602 sitd = (ohci_soft_itd_t *)((char*)KERNADDR(&dma)+offs); 603 sitd->physaddr = DMAADDR(&dma) + offs; 604 sitd->nextitd = sc->sc_freeitds; 605 sc->sc_freeitds = sitd; 606 } 607 } 608 609 s = splusb(); 610 sitd = sc->sc_freeitds; 611 sc->sc_freeitds = sitd->nextitd; 612 memset(&sitd->itd, 0, sizeof(ohci_itd_t)); 613 sitd->nextitd = NULL; 614 sitd->xfer = NULL; 615 ohci_hash_add_itd(sc, sitd); 616 splx(s); 617 618 #ifdef DIAGNOSTIC 619 sitd->isdone = 0; 620 #endif 621 622 return (sitd); 623 } 624 625 void 626 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 627 { 628 int s; 629 630 DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd)); 631 632 #ifdef DIAGNOSTIC 633 if (!sitd->isdone) { 634 panic("ohci_free_sitd: sitd=%p not done\n", sitd); 635 return; 636 } 637 #endif 638 639 s = splusb(); 640 ohci_hash_rem_itd(sc, sitd); 641 sitd->nextitd = sc->sc_freeitds; 642 sc->sc_freeitds = sitd; 643 splx(s); 644 } 645 646 usbd_status 647 ohci_init(ohci_softc_t *sc) 648 { 649 ohci_soft_ed_t *sed, *psed; 650 usbd_status err; 651 int i; 652 u_int32_t s, ctl, ival, hcr, fm, per, rev, desca; 653 654 DPRINTF(("ohci_init: start\n")); 655 #if defined(__OpenBSD__) 656 printf(","); 657 #else 658 printf("%s:", USBDEVNAME(sc->sc_bus.bdev)); 659 #endif 660 rev = OREAD4(sc, OHCI_REVISION); 661 printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev), 662 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 663 664 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 665 printf("%s: unsupported OHCI revision\n", 666 USBDEVNAME(sc->sc_bus.bdev)); 667 sc->sc_bus.usbrev = USBREV_UNKNOWN; 668 return (USBD_INVAL); 669 } 670 sc->sc_bus.usbrev = USBREV_1_0; 671 672 for (i = 0; i < OHCI_HASH_SIZE; i++) 673 LIST_INIT(&sc->sc_hash_tds[i]); 674 for (i = 0; i < OHCI_HASH_SIZE; i++) 675 LIST_INIT(&sc->sc_hash_itds[i]); 676 677 SIMPLEQ_INIT(&sc->sc_free_xfers); 678 679 /* XXX determine alignment by R/W */ 680 /* Allocate the HCCA area. */ 681 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 682 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 683 if (err) 684 return (err); 685 sc->sc_hcca = (struct ohci_hcca *)KERNADDR(&sc->sc_hccadma); 686 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 687 688 sc->sc_eintrs = OHCI_NORMAL_INTRS; 689 690 /* Allocate dummy ED that starts the control list. */ 691 sc->sc_ctrl_head = ohci_alloc_sed(sc); 692 if (sc->sc_ctrl_head == NULL) { 693 err = USBD_NOMEM; 694 goto bad1; 695 } 696 sc->sc_ctrl_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 697 698 /* Allocate dummy ED that starts the bulk list. */ 699 sc->sc_bulk_head = ohci_alloc_sed(sc); 700 if (sc->sc_bulk_head == NULL) { 701 err = USBD_NOMEM; 702 goto bad2; 703 } 704 sc->sc_bulk_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 705 706 /* Allocate dummy ED that starts the isochronous list. */ 707 sc->sc_isoc_head = ohci_alloc_sed(sc); 708 if (sc->sc_isoc_head == NULL) { 709 err = USBD_NOMEM; 710 goto bad3; 711 } 712 sc->sc_isoc_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 713 714 /* Allocate all the dummy EDs that make up the interrupt tree. */ 715 for (i = 0; i < OHCI_NO_EDS; i++) { 716 sed = ohci_alloc_sed(sc); 717 if (sed == NULL) { 718 while (--i >= 0) 719 ohci_free_sed(sc, sc->sc_eds[i]); 720 err = USBD_NOMEM; 721 goto bad4; 722 } 723 /* All ED fields are set to 0. */ 724 sc->sc_eds[i] = sed; 725 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 726 if (i != 0) 727 psed = sc->sc_eds[(i-1) / 2]; 728 else 729 psed= sc->sc_isoc_head; 730 sed->next = psed; 731 sed->ed.ed_nexted = htole32(psed->physaddr); 732 } 733 /* 734 * Fill HCCA interrupt table. The bit reversal is to get 735 * the tree set up properly to spread the interrupts. 736 */ 737 for (i = 0; i < OHCI_NO_INTRS; i++) 738 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 739 htole32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 740 741 #ifdef OHCI_DEBUG 742 if (ohcidebug > 15) { 743 for (i = 0; i < OHCI_NO_EDS; i++) { 744 printf("ed#%d ", i); 745 ohci_dump_ed(sc->sc_eds[i]); 746 } 747 printf("iso "); 748 ohci_dump_ed(sc->sc_isoc_head); 749 } 750 #endif 751 752 /* Determine in what context we are running. */ 753 ctl = OREAD4(sc, OHCI_CONTROL); 754 if (ctl & OHCI_IR) { 755 /* SMM active, request change */ 756 DPRINTF(("ohci_init: SMM active, request owner change\n")); 757 s = OREAD4(sc, OHCI_COMMAND_STATUS); 758 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 759 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 760 usb_delay_ms(&sc->sc_bus, 1); 761 ctl = OREAD4(sc, OHCI_CONTROL); 762 } 763 if ((ctl & OHCI_IR) == 0) { 764 printf("%s: SMM does not respond, resetting\n", 765 USBDEVNAME(sc->sc_bus.bdev)); 766 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 767 goto reset; 768 } 769 #if 0 770 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */ 771 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 772 /* BIOS started controller. */ 773 DPRINTF(("ohci_init: BIOS active\n")); 774 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 775 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL); 776 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 777 } 778 #endif 779 } else { 780 DPRINTF(("ohci_init: cold started\n")); 781 reset: 782 /* Controller was cold started. */ 783 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 784 } 785 786 /* 787 * This reset should not be necessary according to the OHCI spec, but 788 * without it some controllers do not start. 789 */ 790 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 791 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 792 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 793 794 /* We now own the host controller and the bus has been reset. */ 795 ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL)); 796 797 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 798 /* Nominal time for a reset is 10 us. */ 799 for (i = 0; i < 10; i++) { 800 delay(10); 801 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 802 if (!hcr) 803 break; 804 } 805 if (hcr) { 806 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 807 err = USBD_IOERROR; 808 goto bad5; 809 } 810 #ifdef OHCI_DEBUG 811 if (ohcidebug > 15) 812 ohci_dumpregs(sc); 813 #endif 814 815 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 816 817 /* Set up HC registers. */ 818 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma)); 819 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 820 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 821 /* disable all interrupts and then switch on all desired interrupts */ 822 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 823 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 824 /* switch on desired functional features */ 825 ctl = OREAD4(sc, OHCI_CONTROL); 826 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 827 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 828 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL; 829 /* And finally start it! */ 830 OWRITE4(sc, OHCI_CONTROL, ctl); 831 832 /* 833 * The controller is now OPERATIONAL. Set a some final 834 * registers that should be set earlier, but that the 835 * controller ignores when in the SUSPEND state. 836 */ 837 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 838 fm |= OHCI_FSMPS(ival) | ival; 839 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 840 per = OHCI_PERIODIC(ival); /* 90% periodic */ 841 OWRITE4(sc, OHCI_PERIODIC_START, per); 842 843 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */ 844 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 845 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP); 846 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 847 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY); 848 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca); 849 850 /* 851 * The AMD756 requires a delay before re-reading the register, 852 * otherwise it will occasionally report 0 ports. 853 */ 854 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY); 855 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 856 857 #ifdef OHCI_DEBUG 858 if (ohcidebug > 5) 859 ohci_dumpregs(sc); 860 #endif 861 862 /* Set up the bus struct. */ 863 sc->sc_bus.methods = &ohci_bus_methods; 864 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 865 866 #if defined(__NetBSD__) || defined(__OpenBSD__) 867 sc->sc_control = sc->sc_intre = 0; 868 sc->sc_powerhook = powerhook_establish(ohci_power, sc); 869 sc->sc_shutdownhook = shutdownhook_establish(ohci_shutdown, sc); 870 #endif 871 872 usb_callout_init(sc->sc_tmo_rhsc); 873 874 return (USBD_NORMAL_COMPLETION); 875 876 bad5: 877 for (i = 0; i < OHCI_NO_EDS; i++) 878 ohci_free_sed(sc, sc->sc_eds[i]); 879 bad4: 880 ohci_free_sed(sc, sc->sc_isoc_head); 881 bad3: 882 ohci_free_sed(sc, sc->sc_ctrl_head); 883 bad2: 884 ohci_free_sed(sc, sc->sc_bulk_head); 885 bad1: 886 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 887 return (err); 888 } 889 890 usbd_status 891 ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 892 { 893 #if defined(__NetBSD__) || defined(__OpenBSD__) 894 struct ohci_softc *sc = (struct ohci_softc *)bus; 895 #endif 896 897 return (usb_allocmem(&sc->sc_bus, size, 0, dma)); 898 } 899 900 void 901 ohci_freem(struct usbd_bus *bus, usb_dma_t *dma) 902 { 903 #if defined(__NetBSD__) || defined(__OpenBSD__) 904 struct ohci_softc *sc = (struct ohci_softc *)bus; 905 #endif 906 907 usb_freemem(&sc->sc_bus, dma); 908 } 909 910 usbd_xfer_handle 911 ohci_allocx(struct usbd_bus *bus) 912 { 913 struct ohci_softc *sc = (struct ohci_softc *)bus; 914 usbd_xfer_handle xfer; 915 916 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 917 if (xfer != NULL) 918 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, xfer, next); 919 else 920 xfer = malloc(sizeof(struct ohci_xfer), M_USB, M_NOWAIT); 921 if (xfer != NULL) 922 memset(xfer, 0, sizeof (struct ohci_xfer)); 923 return (xfer); 924 } 925 926 void 927 ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 928 { 929 struct ohci_softc *sc = (struct ohci_softc *)bus; 930 931 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 932 } 933 934 /* 935 * Shut down the controller when the system is going down. 936 */ 937 void 938 ohci_shutdown(void *v) 939 { 940 ohci_softc_t *sc = v; 941 942 DPRINTF(("ohci_shutdown: stopping the HC\n")); 943 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 944 } 945 946 /* 947 * Handle suspend/resume. 948 * 949 * We need to switch to polling mode here, because this routine is 950 * called from an intterupt context. This is all right since we 951 * are almost suspended anyway. 952 */ 953 void 954 ohci_power(int why, void *v) 955 { 956 ohci_softc_t *sc = v; 957 u_int32_t ctl; 958 int s; 959 960 #ifdef OHCI_DEBUG 961 DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why)); 962 ohci_dumpregs(sc); 963 #endif 964 965 s = splhardusb(); 966 switch (why) { 967 case PWR_SUSPEND: 968 case PWR_STANDBY: 969 sc->sc_bus.use_polling++; 970 ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK; 971 if (sc->sc_control == 0) { 972 /* 973 * Preserve register values, in case that APM BIOS 974 * does not recover them. 975 */ 976 sc->sc_control = ctl; 977 sc->sc_intre = OREAD4(sc, OHCI_INTERRUPT_ENABLE); 978 } 979 ctl |= OHCI_HCFS_SUSPEND; 980 OWRITE4(sc, OHCI_CONTROL, ctl); 981 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 982 sc->sc_bus.use_polling--; 983 break; 984 case PWR_RESUME: 985 sc->sc_bus.use_polling++; 986 /* Some broken BIOSes do not recover these values */ 987 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma)); 988 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 989 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 990 if (sc->sc_intre) 991 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, 992 sc->sc_intre & (OHCI_ALL_INTRS | OHCI_MIE)); 993 if (sc->sc_control) 994 ctl = sc->sc_control; 995 else 996 ctl = OREAD4(sc, OHCI_CONTROL); 997 ctl |= OHCI_HCFS_RESUME; 998 OWRITE4(sc, OHCI_CONTROL, ctl); 999 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 1000 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL; 1001 OWRITE4(sc, OHCI_CONTROL, ctl); 1002 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 1003 sc->sc_control = sc->sc_intre = 0; 1004 sc->sc_bus.use_polling--; 1005 break; 1006 case PWR_SOFTSUSPEND: 1007 case PWR_SOFTSTANDBY: 1008 case PWR_SOFTRESUME: 1009 break; 1010 } 1011 splx(s); 1012 } 1013 1014 #ifdef OHCI_DEBUG 1015 void 1016 ohci_dumpregs(ohci_softc_t *sc) 1017 { 1018 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 1019 OREAD4(sc, OHCI_REVISION), 1020 OREAD4(sc, OHCI_CONTROL), 1021 OREAD4(sc, OHCI_COMMAND_STATUS))); 1022 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 1023 OREAD4(sc, OHCI_INTERRUPT_STATUS), 1024 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 1025 OREAD4(sc, OHCI_INTERRUPT_DISABLE))); 1026 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 1027 OREAD4(sc, OHCI_HCCA), 1028 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 1029 OREAD4(sc, OHCI_CONTROL_HEAD_ED))); 1030 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 1031 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 1032 OREAD4(sc, OHCI_BULK_HEAD_ED), 1033 OREAD4(sc, OHCI_BULK_CURRENT_ED))); 1034 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 1035 OREAD4(sc, OHCI_DONE_HEAD), 1036 OREAD4(sc, OHCI_FM_INTERVAL), 1037 OREAD4(sc, OHCI_FM_REMAINING))); 1038 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 1039 OREAD4(sc, OHCI_FM_NUMBER), 1040 OREAD4(sc, OHCI_PERIODIC_START), 1041 OREAD4(sc, OHCI_LS_THRESHOLD))); 1042 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n", 1043 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 1044 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 1045 OREAD4(sc, OHCI_RH_STATUS))); 1046 DPRINTF((" port1=0x%08x port2=0x%08x\n", 1047 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 1048 OREAD4(sc, OHCI_RH_PORT_STATUS(2)))); 1049 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n", 1050 le32toh(sc->sc_hcca->hcca_frame_number), 1051 le32toh(sc->sc_hcca->hcca_done_head))); 1052 } 1053 #endif 1054 1055 Static int ohci_intr1(ohci_softc_t *); 1056 1057 int 1058 ohci_intr(void *p) 1059 { 1060 ohci_softc_t *sc = p; 1061 1062 if (sc == NULL || sc->sc_dying) 1063 return (0); 1064 1065 /* If we get an interrupt while polling, then just ignore it. */ 1066 if (sc->sc_bus.use_polling) { 1067 #ifdef DIAGNOSTIC 1068 printf("ohci_intr: ignored interrupt while polling\n"); 1069 #endif 1070 return (0); 1071 } 1072 1073 return (ohci_intr1(sc)); 1074 } 1075 1076 Static int 1077 ohci_intr1(ohci_softc_t *sc) 1078 { 1079 u_int32_t intrs, eintrs; 1080 ohci_physaddr_t done; 1081 1082 DPRINTFN(14,("ohci_intr1: enter\n")); 1083 1084 /* In case the interrupt occurs before initialization has completed. */ 1085 if (sc == NULL || sc->sc_hcca == NULL) { 1086 #ifdef DIAGNOSTIC 1087 printf("ohci_intr: sc->sc_hcca == NULL\n"); 1088 #endif 1089 return (0); 1090 } 1091 1092 intrs = 0; 1093 done = le32toh(sc->sc_hcca->hcca_done_head); 1094 if (done != 0) { 1095 if (done & ~OHCI_DONE_INTRS) 1096 intrs = OHCI_WDH; 1097 if (done & OHCI_DONE_INTRS) 1098 intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS); 1099 } else 1100 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1101 1102 if (!intrs) 1103 return (0); 1104 1105 intrs &= ~OHCI_MIE; 1106 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */ 1107 eintrs = intrs & sc->sc_eintrs; 1108 if (!eintrs) 1109 return (0); 1110 1111 sc->sc_bus.intr_context++; 1112 sc->sc_bus.no_intrs++; 1113 DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 1114 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 1115 (u_int)eintrs)); 1116 1117 if (eintrs & OHCI_SO) { 1118 sc->sc_overrun_cnt++; 1119 if (usbd_ratecheck(&sc->sc_overrun_ntc)) { 1120 printf("%s: %u scheduling overruns\n", 1121 USBDEVNAME(sc->sc_bus.bdev), sc->sc_overrun_cnt); 1122 sc->sc_overrun_cnt = 0; 1123 } 1124 /* XXX do what */ 1125 eintrs &= ~OHCI_SO; 1126 } 1127 if (eintrs & OHCI_WDH) { 1128 ohci_add_done(sc, done &~ OHCI_DONE_INTRS); 1129 sc->sc_hcca->hcca_done_head = 0; 1130 usb_schedsoftintr(&sc->sc_bus); 1131 eintrs &= ~OHCI_WDH; 1132 } 1133 if (eintrs & OHCI_RD) { 1134 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev)); 1135 /* XXX process resume detect */ 1136 } 1137 if (eintrs & OHCI_UE) { 1138 printf("%s: unrecoverable error, controller halted\n", 1139 USBDEVNAME(sc->sc_bus.bdev)); 1140 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1141 /* XXX what else */ 1142 } 1143 if (eintrs & OHCI_RHSC) { 1144 ohci_rhsc(sc, sc->sc_intrxfer); 1145 /* 1146 * Disable RHSC interrupt for now, because it will be 1147 * on until the port has been reset. 1148 */ 1149 ohci_rhsc_able(sc, 0); 1150 /* Do not allow RHSC interrupts > 1 per second */ 1151 usb_callout(sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc); 1152 eintrs &= ~OHCI_RHSC; 1153 } 1154 1155 sc->sc_bus.intr_context--; 1156 1157 if (eintrs != 0) { 1158 /* Block unprocessed interrupts. XXX */ 1159 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs); 1160 sc->sc_eintrs &= ~eintrs; 1161 printf("%s: blocking intrs 0x%x\n", 1162 USBDEVNAME(sc->sc_bus.bdev), eintrs); 1163 } 1164 1165 return (1); 1166 } 1167 1168 void 1169 ohci_rhsc_able(ohci_softc_t *sc, int on) 1170 { 1171 DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on)); 1172 if (on) { 1173 sc->sc_eintrs |= OHCI_RHSC; 1174 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1175 } else { 1176 sc->sc_eintrs &= ~OHCI_RHSC; 1177 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC); 1178 } 1179 } 1180 1181 void 1182 ohci_rhsc_enable(void *v_sc) 1183 { 1184 ohci_softc_t *sc = v_sc; 1185 1186 ohci_rhsc_able(sc, 1); 1187 } 1188 1189 #ifdef OHCI_DEBUG 1190 char *ohci_cc_strs[] = { 1191 "NO_ERROR", 1192 "CRC", 1193 "BIT_STUFFING", 1194 "DATA_TOGGLE_MISMATCH", 1195 "STALL", 1196 "DEVICE_NOT_RESPONDING", 1197 "PID_CHECK_FAILURE", 1198 "UNEXPECTED_PID", 1199 "DATA_OVERRUN", 1200 "DATA_UNDERRUN", 1201 "BUFFER_OVERRUN", 1202 "BUFFER_UNDERRUN", 1203 "reserved", 1204 "reserved", 1205 "NOT_ACCESSED", 1206 "NOT_ACCESSED", 1207 }; 1208 #endif 1209 1210 void 1211 ohci_add_done(ohci_softc_t *sc, ohci_physaddr_t done) 1212 { 1213 ohci_soft_itd_t *sitd, *sidone, **ip; 1214 ohci_soft_td_t *std, *sdone, **p; 1215 1216 /* Reverse the done list. */ 1217 for (sdone = NULL, sidone = NULL; done != 0; ) { 1218 std = ohci_hash_find_td(sc, done); 1219 if (std != NULL) { 1220 std->dnext = sdone; 1221 done = le32toh(std->td.td_nexttd); 1222 sdone = std; 1223 DPRINTFN(10,("add TD %p\n", std)); 1224 continue; 1225 } 1226 sitd = ohci_hash_find_itd(sc, done); 1227 if (sitd != NULL) { 1228 sitd->dnext = sidone; 1229 done = le32toh(sitd->itd.itd_nextitd); 1230 sidone = sitd; 1231 DPRINTFN(5,("add ITD %p\n", sitd)); 1232 continue; 1233 } 1234 panic("ohci_add_done: addr 0x%08lx not found\n", (u_long)done); 1235 } 1236 1237 /* sdone & sidone now hold the done lists. */ 1238 /* Put them on the already processed lists. */ 1239 for (p = &sc->sc_sdone; *p != NULL; p = &(*p)->dnext) 1240 ; 1241 *p = sdone; 1242 for (ip = &sc->sc_sidone; *ip != NULL; ip = &(*ip)->dnext) 1243 ; 1244 *ip = sidone; 1245 } 1246 1247 void 1248 ohci_softintr(void *v) 1249 { 1250 ohci_softc_t *sc = v; 1251 ohci_soft_itd_t *sitd, *sidone, *sitdnext; 1252 ohci_soft_td_t *std, *sdone, *stdnext; 1253 usbd_xfer_handle xfer; 1254 int len, cc, s; 1255 1256 DPRINTFN(10,("ohci_softintr: enter\n:")); 1257 1258 sc->sc_bus.intr_context++; 1259 1260 s = splhardusb(); 1261 sdone = sc->sc_sdone; 1262 sc->sc_sdone = NULL; 1263 sidone = sc->sc_sidone; 1264 sc->sc_sidone = NULL; 1265 splx(s); 1266 1267 DPRINTFN(10,("ohci_softintr: sdone=%p sidone=%p\n", sdone, sidone)); 1268 1269 #ifdef OHCI_DEBUG 1270 if (ohcidebug > 10) { 1271 DPRINTF(("ohci_process_done: TD done:\n")); 1272 ohci_dump_tds(sdone); 1273 } 1274 #endif 1275 1276 for (std = sdone; std; std = stdnext) { 1277 xfer = std->xfer; 1278 stdnext = std->dnext; 1279 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n", 1280 std, xfer, xfer ? xfer->hcpriv : 0)); 1281 if (xfer == NULL) { 1282 /* 1283 * xfer == NULL: There seems to be no xfer associated 1284 * with this TD. It is tailp that happened to end up on 1285 * the done queue. 1286 * Shouldn't happen, but some chips are broken(?). 1287 */ 1288 continue; 1289 } 1290 if (xfer->status == USBD_CANCELLED || 1291 xfer->status == USBD_TIMEOUT) { 1292 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1293 xfer)); 1294 /* Handled by abort routine. */ 1295 continue; 1296 } 1297 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 1298 cc = OHCI_TD_GET_CC(le32toh(std->td.td_flags)); 1299 if (cc == OHCI_CC_NO_ERROR) { 1300 len = std->len; 1301 if (std->td.td_cbp != 0) 1302 len -= le32toh(std->td.td_be) - 1303 le32toh(std->td.td_cbp) + 1; 1304 DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", 1305 len, std->flags)); 1306 if (std->flags & OHCI_ADD_LEN) 1307 xfer->actlen += len; 1308 if (std->flags & OHCI_CALL_DONE) { 1309 xfer->status = USBD_NORMAL_COMPLETION; 1310 usb_transfer_complete(xfer); 1311 } 1312 ohci_free_std(sc, std); 1313 } else { 1314 /* 1315 * Endpoint is halted. First unlink all the TDs 1316 * belonging to the failed transfer, and then restart 1317 * the endpoint. 1318 */ 1319 ohci_soft_td_t *p, *n; 1320 struct ohci_pipe *opipe = 1321 (struct ohci_pipe *)xfer->pipe; 1322 1323 DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n", 1324 OHCI_TD_GET_CC(le32toh(std->td.td_flags)), 1325 ohci_cc_strs[OHCI_TD_GET_CC(le32toh(std->td.td_flags))])); 1326 1327 /* remove TDs */ 1328 for (p = std; p->xfer == xfer; p = n) { 1329 n = p->nexttd; 1330 ohci_free_std(sc, p); 1331 } 1332 1333 /* clear halt */ 1334 opipe->sed->ed.ed_headp = htole32(p->physaddr); 1335 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1336 1337 if (cc == OHCI_CC_STALL) 1338 xfer->status = USBD_STALLED; 1339 else 1340 xfer->status = USBD_IOERROR; 1341 usb_transfer_complete(xfer); 1342 } 1343 } 1344 1345 #ifdef OHCI_DEBUG 1346 if (ohcidebug > 10) { 1347 DPRINTF(("ohci_softintr: ITD done:\n")); 1348 ohci_dump_itds(sidone); 1349 } 1350 #endif 1351 1352 for (sitd = sidone; sitd != NULL; sitd = sitdnext) { 1353 xfer = sitd->xfer; 1354 sitdnext = sitd->dnext; 1355 DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n", 1356 sitd, xfer, xfer ? xfer->hcpriv : 0)); 1357 if (xfer == NULL) 1358 continue; 1359 if (xfer->status == USBD_CANCELLED || 1360 xfer->status == USBD_TIMEOUT) { 1361 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1362 xfer)); 1363 /* Handled by abort routine. */ 1364 continue; 1365 } 1366 #ifdef DIAGNOSTIC 1367 if (sitd->isdone) 1368 printf("ohci_softintr: sitd=%p is done\n", sitd); 1369 sitd->isdone = 1; 1370 #endif 1371 cc = OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags)); 1372 if (cc == OHCI_CC_NO_ERROR) { 1373 /* XXX compute length for input */ 1374 struct ohci_pipe *opipe = 1375 (struct ohci_pipe *)xfer->pipe; 1376 if (sitd->flags & OHCI_CALL_DONE) { 1377 opipe->u.iso.inuse -= xfer->nframes; 1378 /* XXX update frlengths with actual length */ 1379 /* XXX xfer->actlen = actlen; */ 1380 xfer->status = USBD_NORMAL_COMPLETION; 1381 usb_transfer_complete(xfer); 1382 } 1383 } else { 1384 /* XXX Do more */ 1385 xfer->status = USBD_IOERROR; 1386 usb_transfer_complete(xfer); 1387 } 1388 } 1389 1390 sc->sc_bus.intr_context--; 1391 DPRINTFN(10,("ohci_softintr: done:\n")); 1392 } 1393 1394 void 1395 ohci_device_ctrl_done(usbd_xfer_handle xfer) 1396 { 1397 DPRINTFN(10,("ohci_ctrl_done: xfer=%p\n", xfer)); 1398 1399 #ifdef DIAGNOSTIC 1400 if (!(xfer->rqflags & URQ_REQUEST)) { 1401 panic("ohci_ctrl_done: not a request\n"); 1402 } 1403 #endif 1404 xfer->hcpriv = NULL; 1405 } 1406 1407 void 1408 ohci_device_intr_done(usbd_xfer_handle xfer) 1409 { 1410 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1411 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1412 ohci_soft_ed_t *sed = opipe->sed; 1413 ohci_soft_td_t *data, *tail; 1414 1415 1416 DPRINTFN(10,("ohci_intr_done: xfer=%p, actlen=%d\n", 1417 xfer, xfer->actlen)); 1418 1419 xfer->hcpriv = NULL; 1420 1421 if (xfer->pipe->repeat) { 1422 data = opipe->tail.td; 1423 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 1424 if (tail == NULL) { 1425 xfer->status = USBD_NOMEM; 1426 return; 1427 } 1428 tail->xfer = NULL; 1429 1430 data->td.td_flags = htole32( 1431 OHCI_TD_IN | OHCI_TD_NOCC | 1432 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 1433 if (xfer->flags & USBD_SHORT_XFER_OK) 1434 data->td.td_flags |= htole32(OHCI_TD_R); 1435 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf)); 1436 data->nexttd = tail; 1437 data->td.td_nexttd = htole32(tail->physaddr); 1438 data->td.td_be = htole32(le32toh(data->td.td_cbp) + 1439 xfer->length - 1); 1440 data->len = xfer->length; 1441 data->xfer = xfer; 1442 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1443 xfer->hcpriv = data; 1444 xfer->actlen = 0; 1445 1446 sed->ed.ed_tailp = htole32(tail->physaddr); 1447 opipe->tail.td = tail; 1448 } 1449 } 1450 1451 void 1452 ohci_device_bulk_done(usbd_xfer_handle xfer) 1453 { 1454 DPRINTFN(10,("ohci_bulk_done: xfer=%p, actlen=%d\n", 1455 xfer, xfer->actlen)); 1456 1457 xfer->hcpriv = NULL; 1458 } 1459 1460 void 1461 ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer) 1462 { 1463 usbd_pipe_handle pipe; 1464 struct ohci_pipe *opipe; 1465 u_char *p; 1466 int i, m; 1467 int hstatus; 1468 1469 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1470 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n", 1471 sc, xfer, hstatus)); 1472 1473 if (xfer == NULL) { 1474 /* Just ignore the change. */ 1475 return; 1476 } 1477 1478 pipe = xfer->pipe; 1479 opipe = (struct ohci_pipe *)pipe; 1480 1481 p = KERNADDR(&xfer->dmabuf); 1482 m = min(sc->sc_noport, xfer->length * 8 - 1); 1483 memset(p, 0, xfer->length); 1484 for (i = 1; i <= m; i++) { 1485 /* Pick out CHANGE bits from the status reg. */ 1486 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1487 p[i/8] |= 1 << (i%8); 1488 } 1489 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 1490 xfer->actlen = xfer->length; 1491 xfer->status = USBD_NORMAL_COMPLETION; 1492 1493 usb_transfer_complete(xfer); 1494 } 1495 1496 void 1497 ohci_root_intr_done(usbd_xfer_handle xfer) 1498 { 1499 xfer->hcpriv = NULL; 1500 } 1501 1502 void 1503 ohci_root_ctrl_done(usbd_xfer_handle xfer) 1504 { 1505 xfer->hcpriv = NULL; 1506 } 1507 1508 /* 1509 * Wait here until controller claims to have an interrupt. 1510 * Then call ohci_intr and return. Use timeout to avoid waiting 1511 * too long. 1512 */ 1513 void 1514 ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer) 1515 { 1516 int timo = xfer->timeout; 1517 int usecs; 1518 u_int32_t intrs; 1519 1520 xfer->status = USBD_IN_PROGRESS; 1521 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 1522 usb_delay_ms(&sc->sc_bus, 1); 1523 if (sc->sc_dying) 1524 break; 1525 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 1526 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs)); 1527 #ifdef OHCI_DEBUG 1528 if (ohcidebug > 15) 1529 ohci_dumpregs(sc); 1530 #endif 1531 if (intrs) { 1532 ohci_intr1(sc); 1533 if (xfer->status != USBD_IN_PROGRESS) 1534 return; 1535 } 1536 } 1537 1538 /* Timeout */ 1539 DPRINTF(("ohci_waitintr: timeout\n")); 1540 xfer->status = USBD_TIMEOUT; 1541 usb_transfer_complete(xfer); 1542 /* XXX should free TD */ 1543 } 1544 1545 void 1546 ohci_poll(struct usbd_bus *bus) 1547 { 1548 ohci_softc_t *sc = (ohci_softc_t *)bus; 1549 #ifdef OHCI_DEBUG 1550 static int last; 1551 int new; 1552 new = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1553 if (new != last) { 1554 DPRINTFN(10,("ohci_poll: intrs=0x%04x\n", new)); 1555 last = new; 1556 } 1557 #endif 1558 1559 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) 1560 ohci_intr1(sc); 1561 } 1562 1563 usbd_status 1564 ohci_device_request(usbd_xfer_handle xfer) 1565 { 1566 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1567 usb_device_request_t *req = &xfer->request; 1568 usbd_device_handle dev = opipe->pipe.device; 1569 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1570 int addr = dev->address; 1571 ohci_soft_td_t *setup, *stat, *next, *tail; 1572 ohci_soft_ed_t *sed; 1573 int isread; 1574 int len; 1575 usbd_status err; 1576 int s; 1577 1578 isread = req->bmRequestType & UT_READ; 1579 len = UGETW(req->wLength); 1580 1581 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 1582 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 1583 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1584 UGETW(req->wIndex), len, addr, 1585 opipe->pipe.endpoint->edesc->bEndpointAddress)); 1586 1587 setup = opipe->tail.td; 1588 stat = ohci_alloc_std(sc); 1589 if (stat == NULL) { 1590 err = USBD_NOMEM; 1591 goto bad1; 1592 } 1593 tail = ohci_alloc_std(sc); 1594 if (tail == NULL) { 1595 err = USBD_NOMEM; 1596 goto bad2; 1597 } 1598 tail->xfer = NULL; 1599 1600 sed = opipe->sed; 1601 opipe->u.ctl.length = len; 1602 1603 /* Update device address and length since they may have changed. */ 1604 /* XXX This only needs to be done once, but it's too early in open. */ 1605 /* XXXX Should not touch ED here! */ 1606 sed->ed.ed_flags = htole32( 1607 (le32toh(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) | 1608 OHCI_ED_SET_FA(addr) | 1609 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize))); 1610 1611 next = stat; 1612 1613 /* Set up data transaction */ 1614 if (len != 0) { 1615 ohci_soft_td_t *std = stat; 1616 1617 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 1618 std, &stat); 1619 stat = stat->nexttd; /* point at free TD */ 1620 if (err) 1621 goto bad3; 1622 /* Start toggle at 1 and then use the carried toggle. */ 1623 std->td.td_flags &= htole32(~OHCI_TD_TOGGLE_MASK); 1624 std->td.td_flags |= htole32(OHCI_TD_TOGGLE_1); 1625 } 1626 1627 memcpy(KERNADDR(&opipe->u.ctl.reqdma), req, sizeof *req); 1628 1629 setup->td.td_flags = htole32(OHCI_TD_SETUP | OHCI_TD_NOCC | 1630 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1631 setup->td.td_cbp = htole32(DMAADDR(&opipe->u.ctl.reqdma)); 1632 setup->nexttd = next; 1633 setup->td.td_nexttd = htole32(next->physaddr); 1634 setup->td.td_be = htole32(le32toh(setup->td.td_cbp) + sizeof *req - 1); 1635 setup->len = 0; 1636 setup->xfer = xfer; 1637 setup->flags = 0; 1638 xfer->hcpriv = setup; 1639 1640 stat->td.td_flags = htole32( 1641 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | 1642 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1643 stat->td.td_cbp = 0; 1644 stat->nexttd = tail; 1645 stat->td.td_nexttd = htole32(tail->physaddr); 1646 stat->td.td_be = 0; 1647 stat->flags = OHCI_CALL_DONE; 1648 stat->len = 0; 1649 stat->xfer = xfer; 1650 1651 #ifdef OHCI_DEBUG 1652 if (ohcidebug > 5) { 1653 DPRINTF(("ohci_device_request:\n")); 1654 ohci_dump_ed(sed); 1655 ohci_dump_tds(setup); 1656 } 1657 #endif 1658 1659 /* Insert ED in schedule */ 1660 s = splusb(); 1661 sed->ed.ed_tailp = htole32(tail->physaddr); 1662 opipe->tail.td = tail; 1663 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1664 if (xfer->timeout && !sc->sc_bus.use_polling) { 1665 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout), 1666 ohci_timeout, xfer); 1667 } 1668 splx(s); 1669 1670 #ifdef OHCI_DEBUG 1671 if (ohcidebug > 20) { 1672 delay(10000); 1673 DPRINTF(("ohci_device_request: status=%x\n", 1674 OREAD4(sc, OHCI_COMMAND_STATUS))); 1675 ohci_dumpregs(sc); 1676 printf("ctrl head:\n"); 1677 ohci_dump_ed(sc->sc_ctrl_head); 1678 printf("sed:\n"); 1679 ohci_dump_ed(sed); 1680 ohci_dump_tds(setup); 1681 } 1682 #endif 1683 1684 return (USBD_NORMAL_COMPLETION); 1685 1686 bad3: 1687 ohci_free_std(sc, tail); 1688 bad2: 1689 ohci_free_std(sc, stat); 1690 bad1: 1691 return (err); 1692 } 1693 1694 /* 1695 * Add an ED to the schedule. Called at splusb(). 1696 */ 1697 void 1698 ohci_add_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1699 { 1700 DPRINTFN(8,("ohci_add_ed: sed=%p head=%p\n", sed, head)); 1701 1702 SPLUSBCHECK; 1703 sed->next = head->next; 1704 sed->ed.ed_nexted = head->ed.ed_nexted; 1705 head->next = sed; 1706 head->ed.ed_nexted = htole32(sed->physaddr); 1707 } 1708 1709 /* 1710 * Remove an ED from the schedule. Called at splusb(). 1711 */ 1712 void 1713 ohci_rem_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1714 { 1715 ohci_soft_ed_t *p; 1716 1717 SPLUSBCHECK; 1718 1719 /* XXX */ 1720 for (p = head; p == NULL && p->next != sed; p = p->next) 1721 ; 1722 if (p == NULL) 1723 panic("ohci_rem_ed: ED not found\n"); 1724 p->next = sed->next; 1725 p->ed.ed_nexted = sed->ed.ed_nexted; 1726 } 1727 1728 /* 1729 * When a transfer is completed the TD is added to the done queue by 1730 * the host controller. This queue is the processed by software. 1731 * Unfortunately the queue contains the physical address of the TD 1732 * and we have no simple way to translate this back to a kernel address. 1733 * To make the translation possible (and fast) we use a hash table of 1734 * TDs currently in the schedule. The physical address is used as the 1735 * hash value. 1736 */ 1737 1738 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1739 /* Called at splusb() */ 1740 void 1741 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1742 { 1743 int h = HASH(std->physaddr); 1744 1745 SPLUSBCHECK; 1746 1747 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1748 } 1749 1750 /* Called at splusb() */ 1751 void 1752 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1753 { 1754 SPLUSBCHECK; 1755 1756 LIST_REMOVE(std, hnext); 1757 } 1758 1759 ohci_soft_td_t * 1760 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a) 1761 { 1762 int h = HASH(a); 1763 ohci_soft_td_t *std; 1764 1765 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1766 std != NULL; 1767 std = LIST_NEXT(std, hnext)) 1768 if (std->physaddr == a) 1769 return (std); 1770 return (NULL); 1771 } 1772 1773 /* Called at splusb() */ 1774 void 1775 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1776 { 1777 int h = HASH(sitd->physaddr); 1778 1779 SPLUSBCHECK; 1780 1781 DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n", 1782 sitd, (u_long)sitd->physaddr)); 1783 1784 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext); 1785 } 1786 1787 /* Called at splusb() */ 1788 void 1789 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1790 { 1791 SPLUSBCHECK; 1792 1793 DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n", 1794 sitd, (u_long)sitd->physaddr)); 1795 1796 LIST_REMOVE(sitd, hnext); 1797 } 1798 1799 ohci_soft_itd_t * 1800 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a) 1801 { 1802 int h = HASH(a); 1803 ohci_soft_itd_t *sitd; 1804 1805 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]); 1806 sitd != NULL; 1807 sitd = LIST_NEXT(sitd, hnext)) 1808 if (sitd->physaddr == a) 1809 return (sitd); 1810 return (NULL); 1811 } 1812 1813 void 1814 ohci_timeout(void *addr) 1815 { 1816 struct ohci_xfer *oxfer = addr; 1817 struct ohci_pipe *opipe = (struct ohci_pipe *)oxfer->xfer.pipe; 1818 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1819 1820 DPRINTF(("ohci_timeout: oxfer=%p\n", oxfer)); 1821 1822 if (sc->sc_dying) { 1823 ohci_abort_xfer(&oxfer->xfer, USBD_TIMEOUT); 1824 return; 1825 } 1826 1827 /* Execute the abort in a process context. */ 1828 usb_init_task(&oxfer->abort_task, ohci_timeout_task, addr); 1829 usb_add_task(oxfer->xfer.pipe->device, &oxfer->abort_task); 1830 } 1831 1832 void 1833 ohci_timeout_task(void *addr) 1834 { 1835 usbd_xfer_handle xfer = addr; 1836 int s; 1837 1838 DPRINTF(("ohci_timeout_task: xfer=%p\n", xfer)); 1839 1840 s = splusb(); 1841 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1842 splx(s); 1843 } 1844 1845 #ifdef OHCI_DEBUG 1846 void 1847 ohci_dump_tds(ohci_soft_td_t *std) 1848 { 1849 for (; std; std = std->nexttd) 1850 ohci_dump_td(std); 1851 } 1852 1853 void 1854 ohci_dump_td(ohci_soft_td_t *std) 1855 { 1856 char sbuf[128]; 1857 1858 bitmask_snprintf((u_int32_t)le32toh(std->td.td_flags), 1859 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 1860 sbuf, sizeof(sbuf)); 1861 1862 printf("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx " 1863 "nexttd=0x%08lx be=0x%08lx\n", 1864 std, (u_long)std->physaddr, sbuf, 1865 OHCI_TD_GET_DI(le32toh(std->td.td_flags)), 1866 OHCI_TD_GET_EC(le32toh(std->td.td_flags)), 1867 OHCI_TD_GET_CC(le32toh(std->td.td_flags)), 1868 (u_long)le32toh(std->td.td_cbp), 1869 (u_long)le32toh(std->td.td_nexttd), 1870 (u_long)le32toh(std->td.td_be)); 1871 } 1872 1873 void 1874 ohci_dump_itd(ohci_soft_itd_t *sitd) 1875 { 1876 int i; 1877 1878 printf("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n" 1879 "bp0=0x%08lx next=0x%08lx be=0x%08lx\n", 1880 sitd, (u_long)sitd->physaddr, 1881 OHCI_ITD_GET_SF(le32toh(sitd->itd.itd_flags)), 1882 OHCI_ITD_GET_DI(le32toh(sitd->itd.itd_flags)), 1883 OHCI_ITD_GET_FC(le32toh(sitd->itd.itd_flags)), 1884 OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags)), 1885 (u_long)le32toh(sitd->itd.itd_bp0), 1886 (u_long)le32toh(sitd->itd.itd_nextitd), 1887 (u_long)le32toh(sitd->itd.itd_be)); 1888 for (i = 0; i < OHCI_ITD_NOFFSET; i++) 1889 printf("offs[%d]=0x%04x ", i, 1890 (u_int)le16toh(sitd->itd.itd_offset[i])); 1891 printf("\n"); 1892 } 1893 1894 void 1895 ohci_dump_itds(ohci_soft_itd_t *sitd) 1896 { 1897 for (; sitd; sitd = sitd->nextitd) 1898 ohci_dump_itd(sitd); 1899 } 1900 1901 void 1902 ohci_dump_ed(ohci_soft_ed_t *sed) 1903 { 1904 char sbuf[128], sbuf2[128]; 1905 1906 bitmask_snprintf((u_int32_t)le32toh(sed->ed.ed_flags), 1907 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO", 1908 sbuf, sizeof(sbuf)); 1909 bitmask_snprintf((u_int32_t)le32toh(sed->ed.ed_headp), 1910 "\20\1HALT\2CARRY", sbuf2, sizeof(sbuf2)); 1911 1912 printf("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d flags=%s\ntailp=0x%08lx " 1913 "headflags=%s headp=0x%08lx nexted=0x%08lx\n", 1914 sed, (u_long)sed->physaddr, 1915 OHCI_ED_GET_FA(le32toh(sed->ed.ed_flags)), 1916 OHCI_ED_GET_EN(le32toh(sed->ed.ed_flags)), 1917 OHCI_ED_GET_MAXP(le32toh(sed->ed.ed_flags)), sbuf, 1918 (u_long)le32toh(sed->ed.ed_tailp), sbuf2, 1919 (u_long)le32toh(sed->ed.ed_headp), 1920 (u_long)le32toh(sed->ed.ed_nexted)); 1921 } 1922 #endif 1923 1924 usbd_status 1925 ohci_open(usbd_pipe_handle pipe) 1926 { 1927 usbd_device_handle dev = pipe->device; 1928 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1929 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1930 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1931 u_int8_t addr = dev->address; 1932 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1933 ohci_soft_ed_t *sed; 1934 ohci_soft_td_t *std; 1935 ohci_soft_itd_t *sitd; 1936 ohci_physaddr_t tdphys; 1937 u_int32_t fmt; 1938 usbd_status err; 1939 int s; 1940 int ival; 1941 1942 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1943 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1944 1945 if (sc->sc_dying) 1946 return (USBD_IOERROR); 1947 1948 std = NULL; 1949 sed = NULL; 1950 1951 if (addr == sc->sc_addr) { 1952 switch (ed->bEndpointAddress) { 1953 case USB_CONTROL_ENDPOINT: 1954 pipe->methods = &ohci_root_ctrl_methods; 1955 break; 1956 case UE_DIR_IN | OHCI_INTR_ENDPT: 1957 pipe->methods = &ohci_root_intr_methods; 1958 break; 1959 default: 1960 return (USBD_INVAL); 1961 } 1962 } else { 1963 sed = ohci_alloc_sed(sc); 1964 if (sed == NULL) 1965 goto bad0; 1966 opipe->sed = sed; 1967 if (xfertype == UE_ISOCHRONOUS) { 1968 sitd = ohci_alloc_sitd(sc); 1969 if (sitd == NULL) { 1970 ohci_free_sitd(sc, sitd); 1971 goto bad1; 1972 } 1973 opipe->tail.itd = sitd; 1974 tdphys = sitd->physaddr; 1975 fmt = OHCI_ED_FORMAT_ISO; 1976 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 1977 fmt |= OHCI_ED_DIR_IN; 1978 else 1979 fmt |= OHCI_ED_DIR_OUT; 1980 } else { 1981 std = ohci_alloc_std(sc); 1982 if (std == NULL) { 1983 ohci_free_std(sc, std); 1984 goto bad1; 1985 } 1986 opipe->tail.td = std; 1987 tdphys = std->physaddr; 1988 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD; 1989 } 1990 sed->ed.ed_flags = htole32( 1991 OHCI_ED_SET_FA(addr) | 1992 OHCI_ED_SET_EN(ed->bEndpointAddress) | 1993 (dev->speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) | 1994 fmt | 1995 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 1996 sed->ed.ed_headp = sed->ed.ed_tailp = htole32(tdphys); 1997 1998 switch (xfertype) { 1999 case UE_CONTROL: 2000 pipe->methods = &ohci_device_ctrl_methods; 2001 err = usb_allocmem(&sc->sc_bus, 2002 sizeof(usb_device_request_t), 2003 0, &opipe->u.ctl.reqdma); 2004 if (err) 2005 goto bad; 2006 s = splusb(); 2007 ohci_add_ed(sed, sc->sc_ctrl_head); 2008 splx(s); 2009 break; 2010 case UE_INTERRUPT: 2011 pipe->methods = &ohci_device_intr_methods; 2012 ival = pipe->interval; 2013 if (ival == USBD_DEFAULT_INTERVAL) 2014 ival = ed->bInterval; 2015 return (ohci_device_setintr(sc, opipe, ival)); 2016 case UE_ISOCHRONOUS: 2017 pipe->methods = &ohci_device_isoc_methods; 2018 return (ohci_setup_isoc(pipe)); 2019 case UE_BULK: 2020 pipe->methods = &ohci_device_bulk_methods; 2021 s = splusb(); 2022 ohci_add_ed(sed, sc->sc_bulk_head); 2023 splx(s); 2024 break; 2025 } 2026 } 2027 return (USBD_NORMAL_COMPLETION); 2028 2029 bad: 2030 if (std != NULL) 2031 ohci_free_std(sc, std); 2032 bad1: 2033 if (sed != NULL) 2034 ohci_free_sed(sc, sed); 2035 bad0: 2036 return (USBD_NOMEM); 2037 2038 } 2039 2040 /* 2041 * Close a reqular pipe. 2042 * Assumes that there are no pending transactions. 2043 */ 2044 void 2045 ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head) 2046 { 2047 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2048 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2049 ohci_soft_ed_t *sed = opipe->sed; 2050 int s; 2051 2052 s = splusb(); 2053 #ifdef DIAGNOSTIC 2054 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 2055 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2056 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) { 2057 ohci_soft_td_t *std; 2058 std = ohci_hash_find_td(sc, le32toh(sed->ed.ed_headp)); 2059 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 2060 "tl=0x%x pipe=%p, std=%p\n", sed, 2061 (int)le32toh(sed->ed.ed_headp), 2062 (int)le32toh(sed->ed.ed_tailp), 2063 pipe, std); 2064 #ifdef USB_DEBUG 2065 usbd_dump_pipe(&opipe->pipe); 2066 #endif 2067 #ifdef OHCI_DEBUG 2068 ohci_dump_ed(sed); 2069 if (std) 2070 ohci_dump_td(std); 2071 #endif 2072 usb_delay_ms(&sc->sc_bus, 2); 2073 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2074 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) 2075 printf("ohci_close_pipe: pipe still not empty\n"); 2076 } 2077 #endif 2078 ohci_rem_ed(sed, head); 2079 splx(s); 2080 ohci_free_sed(sc, opipe->sed); 2081 } 2082 2083 /* 2084 * Abort a device request. 2085 * If this routine is called at splusb() it guarantees that the request 2086 * will be removed from the hardware scheduling and that the callback 2087 * for it will be called with USBD_CANCELLED status. 2088 * It's impossible to guarantee that the requested transfer will not 2089 * have happened since the hardware runs concurrently. 2090 * If the transaction has already happened we rely on the ordinary 2091 * interrupt processing to process it. 2092 */ 2093 void 2094 ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2095 { 2096 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2097 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 2098 ohci_soft_ed_t *sed = opipe->sed; 2099 ohci_soft_td_t *p, *n; 2100 ohci_physaddr_t headp; 2101 int s, hit; 2102 2103 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p sed=%p\n", xfer, opipe,sed)); 2104 2105 if (sc->sc_dying) { 2106 /* If we're dying, just do the software part. */ 2107 s = splusb(); 2108 xfer->status = status; /* make software ignore it */ 2109 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2110 usb_transfer_complete(xfer); 2111 splx(s); 2112 } 2113 2114 if (xfer->device->bus->intr_context || !curproc) 2115 panic("ohci_abort_xfer: not in process context\n"); 2116 2117 /* 2118 * Step 1: Make interrupt routine and hardware ignore xfer. 2119 */ 2120 s = splusb(); 2121 xfer->status = status; /* make software ignore it */ 2122 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 2123 splx(s); 2124 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed)); 2125 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 2126 2127 /* 2128 * Step 2: Wait until we know hardware has finished any possible 2129 * use of the xfer. Also make sure the soft interrupt routine 2130 * has run. 2131 */ 2132 usb_delay_ms(opipe->pipe.device->bus, 1); /* Hardware finishes in 1ms */ 2133 /* XXX should have some communication with softintr() to know 2134 when it's done */ 2135 usb_delay_ms(opipe->pipe.device->bus, 250); 2136 2137 /* 2138 * Step 3: Remove any vestiges of the xfer from the hardware. 2139 * The complication here is that the hardware may have executed 2140 * beyond the xfer we're trying to abort. So as we're scanning 2141 * the TDs of this xfer we check if the hardware points to 2142 * any of them. 2143 */ 2144 s = splusb(); /* XXX why? */ 2145 p = xfer->hcpriv; 2146 #ifdef DIAGNOSTIC 2147 if (p == NULL) { 2148 splx(s); 2149 printf("ohci_abort_xfer: hcpriv is NULL\n"); 2150 return; 2151 } 2152 #endif 2153 #ifdef OHCI_DEBUG 2154 if (ohcidebug > 1) { 2155 DPRINTF(("ohci_abort_xfer: sed=\n")); 2156 ohci_dump_ed(sed); 2157 ohci_dump_tds(p); 2158 } 2159 #endif 2160 headp = le32toh(sed->ed.ed_headp) & OHCI_HEADMASK; 2161 hit = 0; 2162 for (; p->xfer == xfer; p = n) { 2163 hit |= headp == p->physaddr; 2164 n = p->nexttd; 2165 ohci_free_std(sc, p); 2166 } 2167 /* Zap headp register if hardware pointed inside the xfer. */ 2168 if (hit) { 2169 DPRINTFN(1,("ohci_abort_xfer: set hd=0x08%x, tl=0x%08x\n", 2170 (int)p->physaddr, (int)le32toh(sed->ed.ed_tailp))); 2171 sed->ed.ed_headp = htole32(p->physaddr); /* unlink TDs */ 2172 } else { 2173 DPRINTFN(1,("ohci_abort_xfer: no hit\n")); 2174 } 2175 2176 /* 2177 * Step 4: Turn on hardware again. 2178 */ 2179 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 2180 2181 /* 2182 * Step 5: Execute callback. 2183 */ 2184 usb_transfer_complete(xfer); 2185 2186 splx(s); 2187 } 2188 2189 /* 2190 * Data structures and routines to emulate the root hub. 2191 */ 2192 Static usb_device_descriptor_t ohci_devd = { 2193 USB_DEVICE_DESCRIPTOR_SIZE, 2194 UDESC_DEVICE, /* type */ 2195 {0x00, 0x01}, /* USB version */ 2196 UDCLASS_HUB, /* class */ 2197 UDSUBCLASS_HUB, /* subclass */ 2198 UDPROTO_FSHUB, 2199 64, /* max packet */ 2200 {0},{0},{0x00,0x01}, /* device id */ 2201 1,2,0, /* string indicies */ 2202 1 /* # of configurations */ 2203 }; 2204 2205 Static usb_config_descriptor_t ohci_confd = { 2206 USB_CONFIG_DESCRIPTOR_SIZE, 2207 UDESC_CONFIG, 2208 {USB_CONFIG_DESCRIPTOR_SIZE + 2209 USB_INTERFACE_DESCRIPTOR_SIZE + 2210 USB_ENDPOINT_DESCRIPTOR_SIZE}, 2211 1, 2212 1, 2213 0, 2214 UC_SELF_POWERED, 2215 0 /* max power */ 2216 }; 2217 2218 Static usb_interface_descriptor_t ohci_ifcd = { 2219 USB_INTERFACE_DESCRIPTOR_SIZE, 2220 UDESC_INTERFACE, 2221 0, 2222 0, 2223 1, 2224 UICLASS_HUB, 2225 UISUBCLASS_HUB, 2226 UIPROTO_FSHUB, 2227 0 2228 }; 2229 2230 Static usb_endpoint_descriptor_t ohci_endpd = { 2231 USB_ENDPOINT_DESCRIPTOR_SIZE, 2232 UDESC_ENDPOINT, 2233 UE_DIR_IN | OHCI_INTR_ENDPT, 2234 UE_INTERRUPT, 2235 {8, 0}, /* max packet */ 2236 255 2237 }; 2238 2239 Static usb_hub_descriptor_t ohci_hubd = { 2240 USB_HUB_DESCRIPTOR_SIZE, 2241 UDESC_HUB, 2242 0, 2243 {0,0}, 2244 0, 2245 0, 2246 {0}, 2247 }; 2248 2249 Static int 2250 ohci_str(p, l, s) 2251 usb_string_descriptor_t *p; 2252 int l; 2253 char *s; 2254 { 2255 int i; 2256 2257 if (l == 0) 2258 return (0); 2259 p->bLength = 2 * strlen(s) + 2; 2260 if (l == 1) 2261 return (1); 2262 p->bDescriptorType = UDESC_STRING; 2263 l -= 2; 2264 for (i = 0; s[i] && l > 1; i++, l -= 2) 2265 USETW2(p->bString[i], 0, s[i]); 2266 return (2*i+2); 2267 } 2268 2269 /* 2270 * Simulate a hardware hub by handling all the necessary requests. 2271 */ 2272 Static usbd_status 2273 ohci_root_ctrl_transfer(usbd_xfer_handle xfer) 2274 { 2275 usbd_status err; 2276 2277 /* Insert last in queue. */ 2278 err = usb_insert_transfer(xfer); 2279 if (err) 2280 return (err); 2281 2282 /* Pipe isn't running, start first */ 2283 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2284 } 2285 2286 Static usbd_status 2287 ohci_root_ctrl_start(usbd_xfer_handle xfer) 2288 { 2289 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2290 usb_device_request_t *req; 2291 void *buf = NULL; 2292 int port, i; 2293 int s, len, value, index, l, totlen = 0; 2294 usb_port_status_t ps; 2295 usb_hub_descriptor_t hubd; 2296 usbd_status err; 2297 u_int32_t v; 2298 2299 if (sc->sc_dying) 2300 return (USBD_IOERROR); 2301 2302 #ifdef DIAGNOSTIC 2303 if (!(xfer->rqflags & URQ_REQUEST)) 2304 /* XXX panic */ 2305 return (USBD_INVAL); 2306 #endif 2307 req = &xfer->request; 2308 2309 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 2310 req->bmRequestType, req->bRequest)); 2311 2312 len = UGETW(req->wLength); 2313 value = UGETW(req->wValue); 2314 index = UGETW(req->wIndex); 2315 2316 if (len != 0) 2317 buf = KERNADDR(&xfer->dmabuf); 2318 2319 #define C(x,y) ((x) | ((y) << 8)) 2320 switch(C(req->bRequest, req->bmRequestType)) { 2321 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 2322 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 2323 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 2324 /* 2325 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 2326 * for the integrated root hub. 2327 */ 2328 break; 2329 case C(UR_GET_CONFIG, UT_READ_DEVICE): 2330 if (len > 0) { 2331 *(u_int8_t *)buf = sc->sc_conf; 2332 totlen = 1; 2333 } 2334 break; 2335 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2336 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 2337 switch(value >> 8) { 2338 case UDESC_DEVICE: 2339 if ((value & 0xff) != 0) { 2340 err = USBD_IOERROR; 2341 goto ret; 2342 } 2343 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 2344 USETW(ohci_devd.idVendor, sc->sc_id_vendor); 2345 memcpy(buf, &ohci_devd, l); 2346 break; 2347 case UDESC_CONFIG: 2348 if ((value & 0xff) != 0) { 2349 err = USBD_IOERROR; 2350 goto ret; 2351 } 2352 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 2353 memcpy(buf, &ohci_confd, l); 2354 buf = (char *)buf + l; 2355 len -= l; 2356 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 2357 totlen += l; 2358 memcpy(buf, &ohci_ifcd, l); 2359 buf = (char *)buf + l; 2360 len -= l; 2361 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 2362 totlen += l; 2363 memcpy(buf, &ohci_endpd, l); 2364 break; 2365 case UDESC_STRING: 2366 if (len == 0) 2367 break; 2368 *(u_int8_t *)buf = 0; 2369 totlen = 1; 2370 switch (value & 0xff) { 2371 case 1: /* Vendor */ 2372 totlen = ohci_str(buf, len, sc->sc_vendor); 2373 break; 2374 case 2: /* Product */ 2375 totlen = ohci_str(buf, len, "OHCI root hub"); 2376 break; 2377 } 2378 break; 2379 default: 2380 err = USBD_IOERROR; 2381 goto ret; 2382 } 2383 break; 2384 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 2385 if (len > 0) { 2386 *(u_int8_t *)buf = 0; 2387 totlen = 1; 2388 } 2389 break; 2390 case C(UR_GET_STATUS, UT_READ_DEVICE): 2391 if (len > 1) { 2392 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 2393 totlen = 2; 2394 } 2395 break; 2396 case C(UR_GET_STATUS, UT_READ_INTERFACE): 2397 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 2398 if (len > 1) { 2399 USETW(((usb_status_t *)buf)->wStatus, 0); 2400 totlen = 2; 2401 } 2402 break; 2403 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 2404 if (value >= USB_MAX_DEVICES) { 2405 err = USBD_IOERROR; 2406 goto ret; 2407 } 2408 sc->sc_addr = value; 2409 break; 2410 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 2411 if (value != 0 && value != 1) { 2412 err = USBD_IOERROR; 2413 goto ret; 2414 } 2415 sc->sc_conf = value; 2416 break; 2417 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 2418 break; 2419 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 2420 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 2421 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 2422 err = USBD_IOERROR; 2423 goto ret; 2424 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 2425 break; 2426 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 2427 break; 2428 /* Hub requests */ 2429 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2430 break; 2431 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2432 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 2433 "port=%d feature=%d\n", 2434 index, value)); 2435 if (index < 1 || index > sc->sc_noport) { 2436 err = USBD_IOERROR; 2437 goto ret; 2438 } 2439 port = OHCI_RH_PORT_STATUS(index); 2440 switch(value) { 2441 case UHF_PORT_ENABLE: 2442 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2443 break; 2444 case UHF_PORT_SUSPEND: 2445 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2446 break; 2447 case UHF_PORT_POWER: 2448 /* Yes, writing to the LOW_SPEED bit clears power. */ 2449 OWRITE4(sc, port, UPS_LOW_SPEED); 2450 break; 2451 case UHF_C_PORT_CONNECTION: 2452 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2453 break; 2454 case UHF_C_PORT_ENABLE: 2455 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2456 break; 2457 case UHF_C_PORT_SUSPEND: 2458 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2459 break; 2460 case UHF_C_PORT_OVER_CURRENT: 2461 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2462 break; 2463 case UHF_C_PORT_RESET: 2464 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2465 break; 2466 default: 2467 err = USBD_IOERROR; 2468 goto ret; 2469 } 2470 switch(value) { 2471 case UHF_C_PORT_CONNECTION: 2472 case UHF_C_PORT_ENABLE: 2473 case UHF_C_PORT_SUSPEND: 2474 case UHF_C_PORT_OVER_CURRENT: 2475 case UHF_C_PORT_RESET: 2476 /* Enable RHSC interrupt if condition is cleared. */ 2477 if ((OREAD4(sc, port) >> 16) == 0) 2478 ohci_rhsc_able(sc, 1); 2479 break; 2480 default: 2481 break; 2482 } 2483 break; 2484 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2485 if (value != 0) { 2486 err = USBD_IOERROR; 2487 goto ret; 2488 } 2489 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2490 hubd = ohci_hubd; 2491 hubd.bNbrPorts = sc->sc_noport; 2492 USETW(hubd.wHubCharacteristics, 2493 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2494 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2495 /* XXX overcurrent */ 2496 ); 2497 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2498 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2499 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2500 hubd.DeviceRemovable[i++] = (u_int8_t)v; 2501 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2502 l = min(len, hubd.bDescLength); 2503 totlen = l; 2504 memcpy(buf, &hubd, l); 2505 break; 2506 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2507 if (len != 4) { 2508 err = USBD_IOERROR; 2509 goto ret; 2510 } 2511 memset(buf, 0, len); /* ? XXX */ 2512 totlen = len; 2513 break; 2514 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2515 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 2516 index)); 2517 if (index < 1 || index > sc->sc_noport) { 2518 err = USBD_IOERROR; 2519 goto ret; 2520 } 2521 if (len != 4) { 2522 err = USBD_IOERROR; 2523 goto ret; 2524 } 2525 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2526 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 2527 v)); 2528 USETW(ps.wPortStatus, v); 2529 USETW(ps.wPortChange, v >> 16); 2530 l = min(len, sizeof ps); 2531 memcpy(buf, &ps, l); 2532 totlen = l; 2533 break; 2534 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2535 err = USBD_IOERROR; 2536 goto ret; 2537 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2538 break; 2539 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2540 if (index < 1 || index > sc->sc_noport) { 2541 err = USBD_IOERROR; 2542 goto ret; 2543 } 2544 port = OHCI_RH_PORT_STATUS(index); 2545 switch(value) { 2546 case UHF_PORT_ENABLE: 2547 OWRITE4(sc, port, UPS_PORT_ENABLED); 2548 break; 2549 case UHF_PORT_SUSPEND: 2550 OWRITE4(sc, port, UPS_SUSPEND); 2551 break; 2552 case UHF_PORT_RESET: 2553 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 2554 index)); 2555 OWRITE4(sc, port, UPS_RESET); 2556 for (i = 0; i < 5; i++) { 2557 usb_delay_ms(&sc->sc_bus, 2558 USB_PORT_ROOT_RESET_DELAY); 2559 if (sc->sc_dying) { 2560 err = USBD_IOERROR; 2561 goto ret; 2562 } 2563 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2564 break; 2565 } 2566 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 2567 index, OREAD4(sc, port))); 2568 break; 2569 case UHF_PORT_POWER: 2570 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 2571 "%d\n", index)); 2572 OWRITE4(sc, port, UPS_PORT_POWER); 2573 break; 2574 default: 2575 err = USBD_IOERROR; 2576 goto ret; 2577 } 2578 break; 2579 default: 2580 err = USBD_IOERROR; 2581 goto ret; 2582 } 2583 xfer->actlen = totlen; 2584 err = USBD_NORMAL_COMPLETION; 2585 ret: 2586 xfer->status = err; 2587 s = splusb(); 2588 usb_transfer_complete(xfer); 2589 splx(s); 2590 return (USBD_IN_PROGRESS); 2591 } 2592 2593 /* Abort a root control request. */ 2594 Static void 2595 ohci_root_ctrl_abort(usbd_xfer_handle xfer) 2596 { 2597 /* Nothing to do, all transfers are synchronous. */ 2598 } 2599 2600 /* Close the root pipe. */ 2601 Static void 2602 ohci_root_ctrl_close(usbd_pipe_handle pipe) 2603 { 2604 DPRINTF(("ohci_root_ctrl_close\n")); 2605 /* Nothing to do. */ 2606 } 2607 2608 Static usbd_status 2609 ohci_root_intr_transfer(usbd_xfer_handle xfer) 2610 { 2611 usbd_status err; 2612 2613 /* Insert last in queue. */ 2614 err = usb_insert_transfer(xfer); 2615 if (err) 2616 return (err); 2617 2618 /* Pipe isn't running, start first */ 2619 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2620 } 2621 2622 Static usbd_status 2623 ohci_root_intr_start(usbd_xfer_handle xfer) 2624 { 2625 usbd_pipe_handle pipe = xfer->pipe; 2626 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2627 2628 if (sc->sc_dying) 2629 return (USBD_IOERROR); 2630 2631 sc->sc_intrxfer = xfer; 2632 2633 return (USBD_IN_PROGRESS); 2634 } 2635 2636 /* Abort a root interrupt request. */ 2637 Static void 2638 ohci_root_intr_abort(usbd_xfer_handle xfer) 2639 { 2640 int s; 2641 2642 if (xfer->pipe->intrxfer == xfer) { 2643 DPRINTF(("ohci_root_intr_abort: remove\n")); 2644 xfer->pipe->intrxfer = NULL; 2645 } 2646 xfer->status = USBD_CANCELLED; 2647 s = splusb(); 2648 usb_transfer_complete(xfer); 2649 splx(s); 2650 } 2651 2652 /* Close the root pipe. */ 2653 Static void 2654 ohci_root_intr_close(usbd_pipe_handle pipe) 2655 { 2656 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2657 2658 DPRINTF(("ohci_root_intr_close\n")); 2659 2660 sc->sc_intrxfer = NULL; 2661 } 2662 2663 /************************/ 2664 2665 Static usbd_status 2666 ohci_device_ctrl_transfer(usbd_xfer_handle xfer) 2667 { 2668 usbd_status err; 2669 2670 /* Insert last in queue. */ 2671 err = usb_insert_transfer(xfer); 2672 if (err) 2673 return (err); 2674 2675 /* Pipe isn't running, start first */ 2676 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2677 } 2678 2679 Static usbd_status 2680 ohci_device_ctrl_start(usbd_xfer_handle xfer) 2681 { 2682 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2683 usbd_status err; 2684 2685 if (sc->sc_dying) 2686 return (USBD_IOERROR); 2687 2688 #ifdef DIAGNOSTIC 2689 if (!(xfer->rqflags & URQ_REQUEST)) { 2690 /* XXX panic */ 2691 printf("ohci_device_ctrl_transfer: not a request\n"); 2692 return (USBD_INVAL); 2693 } 2694 #endif 2695 2696 err = ohci_device_request(xfer); 2697 if (err) 2698 return (err); 2699 2700 if (sc->sc_bus.use_polling) 2701 ohci_waitintr(sc, xfer); 2702 return (USBD_IN_PROGRESS); 2703 } 2704 2705 /* Abort a device control request. */ 2706 Static void 2707 ohci_device_ctrl_abort(usbd_xfer_handle xfer) 2708 { 2709 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer)); 2710 ohci_abort_xfer(xfer, USBD_CANCELLED); 2711 } 2712 2713 /* Close a device control pipe. */ 2714 Static void 2715 ohci_device_ctrl_close(usbd_pipe_handle pipe) 2716 { 2717 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2718 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2719 2720 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe)); 2721 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2722 ohci_free_std(sc, opipe->tail.td); 2723 } 2724 2725 /************************/ 2726 2727 Static void 2728 ohci_device_clear_toggle(usbd_pipe_handle pipe) 2729 { 2730 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2731 2732 opipe->sed->ed.ed_headp &= htole32(~OHCI_TOGGLECARRY); 2733 } 2734 2735 Static void 2736 ohci_noop(usbd_pipe_handle pipe) 2737 { 2738 } 2739 2740 Static usbd_status 2741 ohci_device_bulk_transfer(usbd_xfer_handle xfer) 2742 { 2743 usbd_status err; 2744 2745 /* Insert last in queue. */ 2746 err = usb_insert_transfer(xfer); 2747 if (err) 2748 return (err); 2749 2750 /* Pipe isn't running, start first */ 2751 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2752 } 2753 2754 Static usbd_status 2755 ohci_device_bulk_start(usbd_xfer_handle xfer) 2756 { 2757 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2758 usbd_device_handle dev = opipe->pipe.device; 2759 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2760 int addr = dev->address; 2761 ohci_soft_td_t *data, *tail, *tdp; 2762 ohci_soft_ed_t *sed; 2763 int s, len, isread, endpt; 2764 usbd_status err; 2765 2766 if (sc->sc_dying) 2767 return (USBD_IOERROR); 2768 2769 #ifdef DIAGNOSTIC 2770 if (xfer->rqflags & URQ_REQUEST) { 2771 /* XXX panic */ 2772 printf("ohci_device_bulk_start: a request\n"); 2773 return (USBD_INVAL); 2774 } 2775 #endif 2776 2777 len = xfer->length; 2778 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 2779 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2780 sed = opipe->sed; 2781 2782 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d " 2783 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags, 2784 endpt)); 2785 2786 opipe->u.bulk.isread = isread; 2787 opipe->u.bulk.length = len; 2788 2789 /* Update device address */ 2790 sed->ed.ed_flags = htole32( 2791 (le32toh(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) | 2792 OHCI_ED_SET_FA(addr)); 2793 2794 /* Allocate a chain of new TDs (including a new tail). */ 2795 data = opipe->tail.td; 2796 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 2797 data, &tail); 2798 /* We want interrupt at the end of the transfer. */ 2799 tail->td.td_flags &= htole32(~OHCI_TD_INTR_MASK); 2800 tail->td.td_flags |= htole32(OHCI_TD_SET_DI(1)); 2801 tail->flags |= OHCI_CALL_DONE; 2802 tail = tail->nexttd; /* point at sentinel */ 2803 if (err) 2804 return (err); 2805 2806 tail->xfer = NULL; 2807 xfer->hcpriv = data; 2808 2809 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x " 2810 "td_cbp=0x%08x td_be=0x%08x\n", 2811 (int)le32toh(sed->ed.ed_flags), 2812 (int)le32toh(data->td.td_flags), 2813 (int)le32toh(data->td.td_cbp), 2814 (int)le32toh(data->td.td_be))); 2815 2816 #ifdef OHCI_DEBUG 2817 if (ohcidebug > 5) { 2818 ohci_dump_ed(sed); 2819 ohci_dump_tds(data); 2820 } 2821 #endif 2822 2823 /* Insert ED in schedule */ 2824 s = splusb(); 2825 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 2826 tdp->xfer = xfer; 2827 } 2828 sed->ed.ed_tailp = htole32(tail->physaddr); 2829 opipe->tail.td = tail; 2830 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 2831 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 2832 if (xfer->timeout && !sc->sc_bus.use_polling) { 2833 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout), 2834 ohci_timeout, xfer); 2835 } 2836 2837 #if 0 2838 /* This goes wrong if we are too slow. */ 2839 if (ohcidebug > 10) { 2840 delay(10000); 2841 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2842 OREAD4(sc, OHCI_COMMAND_STATUS))); 2843 ohci_dump_ed(sed); 2844 ohci_dump_tds(data); 2845 } 2846 #endif 2847 2848 splx(s); 2849 2850 return (USBD_IN_PROGRESS); 2851 } 2852 2853 Static void 2854 ohci_device_bulk_abort(usbd_xfer_handle xfer) 2855 { 2856 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer)); 2857 ohci_abort_xfer(xfer, USBD_CANCELLED); 2858 } 2859 2860 /* 2861 * Close a device bulk pipe. 2862 */ 2863 Static void 2864 ohci_device_bulk_close(usbd_pipe_handle pipe) 2865 { 2866 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2867 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2868 2869 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe)); 2870 ohci_close_pipe(pipe, sc->sc_bulk_head); 2871 ohci_free_std(sc, opipe->tail.td); 2872 } 2873 2874 /************************/ 2875 2876 Static usbd_status 2877 ohci_device_intr_transfer(usbd_xfer_handle xfer) 2878 { 2879 usbd_status err; 2880 2881 /* Insert last in queue. */ 2882 err = usb_insert_transfer(xfer); 2883 if (err) 2884 return (err); 2885 2886 /* Pipe isn't running, start first */ 2887 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2888 } 2889 2890 Static usbd_status 2891 ohci_device_intr_start(usbd_xfer_handle xfer) 2892 { 2893 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2894 usbd_device_handle dev = opipe->pipe.device; 2895 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2896 ohci_soft_ed_t *sed = opipe->sed; 2897 ohci_soft_td_t *data, *tail; 2898 int len; 2899 int s; 2900 2901 if (sc->sc_dying) 2902 return (USBD_IOERROR); 2903 2904 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d " 2905 "flags=%d priv=%p\n", 2906 xfer, xfer->length, xfer->flags, xfer->priv)); 2907 2908 #ifdef DIAGNOSTIC 2909 if (xfer->rqflags & URQ_REQUEST) 2910 panic("ohci_device_intr_transfer: a request\n"); 2911 #endif 2912 2913 len = xfer->length; 2914 2915 data = opipe->tail.td; 2916 tail = ohci_alloc_std(sc); 2917 if (tail == NULL) 2918 return (USBD_NOMEM); 2919 tail->xfer = NULL; 2920 2921 data->td.td_flags = htole32( 2922 OHCI_TD_IN | OHCI_TD_NOCC | 2923 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 2924 if (xfer->flags & USBD_SHORT_XFER_OK) 2925 data->td.td_flags |= htole32(OHCI_TD_R); 2926 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf)); 2927 data->nexttd = tail; 2928 data->td.td_nexttd = htole32(tail->physaddr); 2929 data->td.td_be = htole32(le32toh(data->td.td_cbp) + len - 1); 2930 data->len = len; 2931 data->xfer = xfer; 2932 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 2933 xfer->hcpriv = data; 2934 2935 #ifdef OHCI_DEBUG 2936 if (ohcidebug > 5) { 2937 DPRINTF(("ohci_device_intr_transfer:\n")); 2938 ohci_dump_ed(sed); 2939 ohci_dump_tds(data); 2940 } 2941 #endif 2942 2943 /* Insert ED in schedule */ 2944 s = splusb(); 2945 sed->ed.ed_tailp = htole32(tail->physaddr); 2946 opipe->tail.td = tail; 2947 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 2948 2949 #if 0 2950 /* 2951 * This goes horribly wrong, printing thousands of descriptors, 2952 * because false references are followed due to the fact that the 2953 * TD is gone. 2954 */ 2955 if (ohcidebug > 5) { 2956 usb_delay_ms(&sc->sc_bus, 5); 2957 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2958 OREAD4(sc, OHCI_COMMAND_STATUS))); 2959 ohci_dump_ed(sed); 2960 ohci_dump_tds(data); 2961 } 2962 #endif 2963 splx(s); 2964 2965 return (USBD_IN_PROGRESS); 2966 } 2967 2968 /* Abort a device control request. */ 2969 Static void 2970 ohci_device_intr_abort(usbd_xfer_handle xfer) 2971 { 2972 if (xfer->pipe->intrxfer == xfer) { 2973 DPRINTF(("ohci_device_intr_abort: remove\n")); 2974 xfer->pipe->intrxfer = NULL; 2975 } 2976 ohci_abort_xfer(xfer, USBD_CANCELLED); 2977 } 2978 2979 /* Close a device interrupt pipe. */ 2980 Static void 2981 ohci_device_intr_close(usbd_pipe_handle pipe) 2982 { 2983 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2984 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2985 int nslots = opipe->u.intr.nslots; 2986 int pos = opipe->u.intr.pos; 2987 int j; 2988 ohci_soft_ed_t *p, *sed = opipe->sed; 2989 int s; 2990 2991 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 2992 pipe, nslots, pos)); 2993 s = splusb(); 2994 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 2995 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2996 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) 2997 usb_delay_ms(&sc->sc_bus, 2); 2998 2999 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 3000 ; 3001 #ifdef DIAGNOSTIC 3002 if (p == NULL) 3003 panic("ohci_device_intr_close: ED not found\n"); 3004 #endif 3005 p->next = sed->next; 3006 p->ed.ed_nexted = sed->ed.ed_nexted; 3007 splx(s); 3008 3009 for (j = 0; j < nslots; j++) 3010 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 3011 3012 ohci_free_std(sc, opipe->tail.td); 3013 ohci_free_sed(sc, opipe->sed); 3014 } 3015 3016 Static usbd_status 3017 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival) 3018 { 3019 int i, j, s, best; 3020 u_int npoll, slow, shigh, nslots; 3021 u_int bestbw, bw; 3022 ohci_soft_ed_t *hsed, *sed = opipe->sed; 3023 3024 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 3025 if (ival == 0) { 3026 printf("ohci_setintr: 0 interval\n"); 3027 return (USBD_INVAL); 3028 } 3029 3030 npoll = OHCI_NO_INTRS; 3031 while (npoll > ival) 3032 npoll /= 2; 3033 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 3034 3035 /* 3036 * We now know which level in the tree the ED must go into. 3037 * Figure out which slot has most bandwidth left over. 3038 * Slots to examine: 3039 * npoll 3040 * 1 0 3041 * 2 1 2 3042 * 4 3 4 5 6 3043 * 8 7 8 9 10 11 12 13 14 3044 * N (N-1) .. (N-1+N-1) 3045 */ 3046 slow = npoll-1; 3047 shigh = slow + npoll; 3048 nslots = OHCI_NO_INTRS / npoll; 3049 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 3050 bw = 0; 3051 for (j = 0; j < nslots; j++) 3052 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 3053 if (bw < bestbw) { 3054 best = i; 3055 bestbw = bw; 3056 } 3057 } 3058 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 3059 best, slow, shigh, bestbw)); 3060 3061 s = splusb(); 3062 hsed = sc->sc_eds[best]; 3063 sed->next = hsed->next; 3064 sed->ed.ed_nexted = hsed->ed.ed_nexted; 3065 hsed->next = sed; 3066 hsed->ed.ed_nexted = htole32(sed->physaddr); 3067 splx(s); 3068 3069 for (j = 0; j < nslots; j++) 3070 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 3071 opipe->u.intr.nslots = nslots; 3072 opipe->u.intr.pos = best; 3073 3074 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 3075 return (USBD_NORMAL_COMPLETION); 3076 } 3077 3078 /***********************/ 3079 3080 usbd_status 3081 ohci_device_isoc_transfer(usbd_xfer_handle xfer) 3082 { 3083 usbd_status err; 3084 3085 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer)); 3086 3087 /* Put it on our queue, */ 3088 err = usb_insert_transfer(xfer); 3089 3090 /* bail out on error, */ 3091 if (err && err != USBD_IN_PROGRESS) 3092 return (err); 3093 3094 /* XXX should check inuse here */ 3095 3096 /* insert into schedule, */ 3097 ohci_device_isoc_enter(xfer); 3098 3099 /* and start if the pipe wasn't running */ 3100 if (!err) 3101 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 3102 3103 return (err); 3104 } 3105 3106 void 3107 ohci_device_isoc_enter(usbd_xfer_handle xfer) 3108 { 3109 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3110 usbd_device_handle dev = opipe->pipe.device; 3111 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 3112 ohci_soft_ed_t *sed = opipe->sed; 3113 struct iso *iso = &opipe->u.iso; 3114 ohci_soft_itd_t *sitd, *nsitd; 3115 ohci_physaddr_t buf, offs, noffs, bp0; 3116 int i, ncur, nframes; 3117 int s; 3118 3119 DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p " 3120 "nframes=%d\n", 3121 iso->inuse, iso->next, xfer, xfer->nframes)); 3122 3123 if (sc->sc_dying) 3124 return; 3125 3126 if (iso->next == -1) { 3127 /* Not in use yet, schedule it a few frames ahead. */ 3128 iso->next = le32toh(sc->sc_hcca->hcca_frame_number) + 5; 3129 DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n", 3130 iso->next)); 3131 } 3132 3133 sitd = opipe->tail.itd; 3134 buf = DMAADDR(&xfer->dmabuf); 3135 bp0 = OHCI_PAGE(buf); 3136 offs = OHCI_PAGE_OFFSET(buf); 3137 nframes = xfer->nframes; 3138 xfer->hcpriv = sitd; 3139 for (i = ncur = 0; i < nframes; i++, ncur++) { 3140 noffs = offs + xfer->frlengths[i]; 3141 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ 3142 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */ 3143 3144 /* Allocate next ITD */ 3145 nsitd = ohci_alloc_sitd(sc); 3146 if (nsitd == NULL) { 3147 /* XXX what now? */ 3148 printf("%s: isoc TD alloc failed\n", 3149 USBDEVNAME(sc->sc_bus.bdev)); 3150 return; 3151 } 3152 3153 /* Fill current ITD */ 3154 sitd->itd.itd_flags = htole32( 3155 OHCI_ITD_NOCC | 3156 OHCI_ITD_SET_SF(iso->next) | 3157 OHCI_ITD_SET_DI(6) | /* delay intr a little */ 3158 OHCI_ITD_SET_FC(ncur)); 3159 sitd->itd.itd_bp0 = htole32(bp0); 3160 sitd->nextitd = nsitd; 3161 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 3162 sitd->itd.itd_be = htole32(bp0 + offs - 1); 3163 sitd->xfer = xfer; 3164 sitd->flags = 0; 3165 3166 sitd = nsitd; 3167 iso->next = iso->next + ncur; 3168 bp0 = OHCI_PAGE(buf + offs); 3169 ncur = 0; 3170 } 3171 sitd->itd.itd_offset[ncur] = htole16(OHCI_ITD_MK_OFFS(offs)); 3172 offs = noffs; 3173 } 3174 nsitd = ohci_alloc_sitd(sc); 3175 if (nsitd == NULL) { 3176 /* XXX what now? */ 3177 printf("%s: isoc TD alloc failed\n", 3178 USBDEVNAME(sc->sc_bus.bdev)); 3179 return; 3180 } 3181 /* Fixup last used ITD */ 3182 sitd->itd.itd_flags = htole32( 3183 OHCI_ITD_NOCC | 3184 OHCI_ITD_SET_SF(iso->next) | 3185 OHCI_ITD_SET_DI(0) | 3186 OHCI_ITD_SET_FC(ncur)); 3187 sitd->itd.itd_bp0 = htole32(bp0); 3188 sitd->nextitd = nsitd; 3189 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 3190 sitd->itd.itd_be = htole32(bp0 + offs - 1); 3191 sitd->xfer = xfer; 3192 sitd->flags = OHCI_CALL_DONE; 3193 3194 iso->next = iso->next + ncur; 3195 iso->inuse += nframes; 3196 3197 xfer->actlen = offs; /* XXX pretend we did it all */ 3198 3199 xfer->status = USBD_IN_PROGRESS; 3200 3201 #ifdef OHCI_DEBUG 3202 if (ohcidebug > 5) { 3203 DPRINTF(("ohci_device_isoc_enter: frame=%d\n", 3204 le32toh(sc->sc_hcca->hcca_frame_number))); 3205 ohci_dump_itds(xfer->hcpriv); 3206 ohci_dump_ed(sed); 3207 } 3208 #endif 3209 3210 s = splusb(); 3211 opipe->tail.itd = nsitd; 3212 sed->ed.ed_tailp = htole32(nsitd->physaddr); 3213 splx(s); 3214 3215 #ifdef OHCI_DEBUG 3216 if (ohcidebug > 5) { 3217 delay(150000); 3218 DPRINTF(("ohci_device_isoc_enter: after frame=%d\n", 3219 le32toh(sc->sc_hcca->hcca_frame_number))); 3220 ohci_dump_itds(xfer->hcpriv); 3221 ohci_dump_ed(sed); 3222 } 3223 #endif 3224 } 3225 3226 usbd_status 3227 ohci_device_isoc_start(usbd_xfer_handle xfer) 3228 { 3229 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3230 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3231 3232 DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer)); 3233 3234 if (sc->sc_dying) 3235 return (USBD_IOERROR); 3236 3237 #ifdef DIAGNOSTIC 3238 if (xfer->status != USBD_IN_PROGRESS) 3239 printf("uhci_device_isoc_start: not in progress %p\n", xfer); 3240 #endif 3241 3242 /* XXX anything to do? */ 3243 3244 return (USBD_IN_PROGRESS); 3245 } 3246 3247 void 3248 ohci_device_isoc_abort(usbd_xfer_handle xfer) 3249 { 3250 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3251 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3252 ohci_soft_ed_t *sed; 3253 ohci_soft_itd_t *sitd; 3254 int s; 3255 3256 s = splusb(); 3257 3258 DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer)); 3259 3260 /* Transfer is already done. */ 3261 if (xfer->status != USBD_NOT_STARTED && 3262 xfer->status != USBD_IN_PROGRESS) { 3263 splx(s); 3264 printf("ohci_device_isoc_abort: early return\n"); 3265 return; 3266 } 3267 3268 /* Give xfer the requested abort code. */ 3269 xfer->status = USBD_CANCELLED; 3270 3271 sed = opipe->sed; 3272 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 3273 3274 sitd = xfer->hcpriv; 3275 #ifdef DIAGNOSTIC 3276 if (sitd == NULL) { 3277 splx(s); 3278 printf("ohci_device_isoc_abort: hcpriv==0\n"); 3279 return; 3280 } 3281 #endif 3282 for (; sitd->xfer == xfer; sitd = sitd->nextitd) { 3283 #ifdef DIAGNOSTIC 3284 DPRINTFN(1,("abort sets done sitd=%p\n", sitd)); 3285 sitd->isdone = 1; 3286 #endif 3287 } 3288 3289 splx(s); 3290 3291 usb_delay_ms(&sc->sc_bus, OHCI_ITD_NOFFSET); 3292 3293 s = splusb(); 3294 3295 /* Run callback. */ 3296 usb_transfer_complete(xfer); 3297 3298 sed->ed.ed_headp = htole32(sitd->physaddr); /* unlink TDs */ 3299 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 3300 3301 splx(s); 3302 } 3303 3304 void 3305 ohci_device_isoc_done(usbd_xfer_handle xfer) 3306 { 3307 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3308 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3309 ohci_soft_itd_t *sitd, *nsitd; 3310 3311 DPRINTFN(1,("ohci_device_isoc_done: xfer=%p\n", xfer)); 3312 3313 for (sitd = xfer->hcpriv; 3314 !(sitd->flags & OHCI_CALL_DONE); 3315 sitd = nsitd) { 3316 nsitd = sitd->nextitd; 3317 DPRINTFN(1,("ohci_device_isoc_done: free sitd=%p\n", sitd)); 3318 ohci_free_sitd(sc, sitd); 3319 } 3320 ohci_free_sitd(sc, sitd); 3321 xfer->hcpriv = NULL; 3322 } 3323 3324 usbd_status 3325 ohci_setup_isoc(usbd_pipe_handle pipe) 3326 { 3327 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3328 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3329 struct iso *iso = &opipe->u.iso; 3330 int s; 3331 3332 iso->next = -1; 3333 iso->inuse = 0; 3334 3335 s = splusb(); 3336 ohci_add_ed(opipe->sed, sc->sc_isoc_head); 3337 splx(s); 3338 3339 return (USBD_NORMAL_COMPLETION); 3340 } 3341 3342 void 3343 ohci_device_isoc_close(usbd_pipe_handle pipe) 3344 { 3345 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3346 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3347 int s; 3348 3349 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe)); 3350 3351 s = splusb(); 3352 ohci_rem_ed(opipe->sed, sc->sc_isoc_head); 3353 splx(s); 3354 ohci_close_pipe(pipe, sc->sc_isoc_head); 3355 #ifdef DIAGNOSTIC 3356 opipe->tail.itd->isdone = 1; 3357 #endif 3358 ohci_free_sitd(sc, opipe->tail.itd); 3359 } 3360
Indexes created Tue Sep 23 20:09:58 GMT 2025