ohci.c revision 1.118
1 /* $NetBSD: ohci.c,v 1.118 2001/12/27 18:48:28 augustss Exp $ */ 2 /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */ 3 4 /* 5 * Copyright (c) 1998 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Lennart Augustsson (lennart (at) augustsson.net) at 10 * Carlstedt Research & Technology. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. All advertising materials mentioning features or use of this software 21 * must display the following acknowledgement: 22 * This product includes software developed by the NetBSD 23 * Foundation, Inc. and its contributors. 24 * 4. Neither the name of The NetBSD Foundation nor the names of its 25 * contributors may be used to endorse or promote products derived 26 * from this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 29 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 30 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 31 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 32 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 33 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 34 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 35 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 36 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 37 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 * POSSIBILITY OF SUCH DAMAGE. 39 */ 40 41 /* 42 * USB Open Host Controller driver. 43 * 44 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html 45 * USB spec: http://www.usb.org/developers/data/usbspec.zip 46 */ 47 48 #include <sys/cdefs.h> 49 __KERNEL_RCSID(0, "$NetBSD: ohci.c,v 1.118 2001/12/27 18:48:28 augustss Exp $"); 50 51 #include <sys/param.h> 52 #include <sys/systm.h> 53 #include <sys/malloc.h> 54 #if defined(__NetBSD__) || defined(__OpenBSD__) 55 #include <sys/kernel.h> 56 #include <sys/device.h> 57 #include <sys/select.h> 58 #elif defined(__FreeBSD__) 59 #include <sys/module.h> 60 #include <sys/bus.h> 61 #include <machine/bus_pio.h> 62 #include <machine/bus_memio.h> 63 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 64 #include <machine/cpu.h> 65 #endif 66 #endif 67 #include <sys/proc.h> 68 #include <sys/queue.h> 69 70 #include <machine/bus.h> 71 #include <machine/endian.h> 72 73 #include <dev/usb/usb.h> 74 #include <dev/usb/usbdi.h> 75 #include <dev/usb/usbdivar.h> 76 #include <dev/usb/usb_mem.h> 77 #include <dev/usb/usb_quirks.h> 78 79 #include <dev/usb/ohcireg.h> 80 #include <dev/usb/ohcivar.h> 81 82 #if defined(__FreeBSD__) 83 #include <machine/clock.h> 84 85 #define delay(d) DELAY(d) 86 #endif 87 88 #if defined(__OpenBSD__) 89 struct cfdriver ohci_cd = { 90 NULL, "ohci", DV_DULL 91 }; 92 #endif 93 94 #ifdef OHCI_DEBUG 95 #define DPRINTF(x) if (ohcidebug) logprintf x 96 #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x 97 int ohcidebug = 0; 98 #ifndef __NetBSD__ 99 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 100 #endif 101 #else 102 #define DPRINTF(x) 103 #define DPRINTFN(n,x) 104 #endif 105 106 /* 107 * The OHCI controller is little endian, so on big endian machines 108 * the data strored in memory needs to be swapped. 109 */ 110 #if defined(__FreeBSD__) || defined(__OpenBSD__) 111 #if BYTE_ORDER == BIG_ENDIAN 112 #define htole32(x) (bswap32(x)) 113 #define le32toh(x) (bswap32(x)) 114 #else 115 #define htole32(x) (x) 116 #define le32toh(x) (x) 117 #endif 118 #endif 119 120 struct ohci_pipe; 121 122 Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *); 123 Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *); 124 125 Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *); 126 Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *); 127 128 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *); 129 Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *); 130 131 #if 0 132 Static void ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *, 133 ohci_soft_td_t *); 134 #endif 135 Static usbd_status ohci_alloc_std_chain(struct ohci_pipe *, 136 ohci_softc_t *, int, int, usbd_xfer_handle, 137 ohci_soft_td_t *, ohci_soft_td_t **); 138 139 Static void ohci_shutdown(void *v); 140 Static void ohci_power(int, void *); 141 Static usbd_status ohci_open(usbd_pipe_handle); 142 Static void ohci_poll(struct usbd_bus *); 143 Static void ohci_softintr(void *); 144 Static void ohci_waitintr(ohci_softc_t *, usbd_xfer_handle); 145 Static void ohci_add_done(ohci_softc_t *, ohci_physaddr_t); 146 Static void ohci_rhsc(ohci_softc_t *, usbd_xfer_handle); 147 148 Static usbd_status ohci_device_request(usbd_xfer_handle xfer); 149 Static void ohci_add_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 150 Static void ohci_rem_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 151 Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *); 152 Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *); 153 Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t); 154 Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *); 155 Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *); 156 Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t); 157 158 Static usbd_status ohci_setup_isoc(usbd_pipe_handle pipe); 159 Static void ohci_device_isoc_enter(usbd_xfer_handle); 160 161 Static usbd_status ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 162 Static void ohci_freem(struct usbd_bus *, usb_dma_t *); 163 164 Static usbd_xfer_handle ohci_allocx(struct usbd_bus *); 165 Static void ohci_freex(struct usbd_bus *, usbd_xfer_handle); 166 167 Static usbd_status ohci_root_ctrl_transfer(usbd_xfer_handle); 168 Static usbd_status ohci_root_ctrl_start(usbd_xfer_handle); 169 Static void ohci_root_ctrl_abort(usbd_xfer_handle); 170 Static void ohci_root_ctrl_close(usbd_pipe_handle); 171 Static void ohci_root_ctrl_done(usbd_xfer_handle); 172 173 Static usbd_status ohci_root_intr_transfer(usbd_xfer_handle); 174 Static usbd_status ohci_root_intr_start(usbd_xfer_handle); 175 Static void ohci_root_intr_abort(usbd_xfer_handle); 176 Static void ohci_root_intr_close(usbd_pipe_handle); 177 Static void ohci_root_intr_done(usbd_xfer_handle); 178 179 Static usbd_status ohci_device_ctrl_transfer(usbd_xfer_handle); 180 Static usbd_status ohci_device_ctrl_start(usbd_xfer_handle); 181 Static void ohci_device_ctrl_abort(usbd_xfer_handle); 182 Static void ohci_device_ctrl_close(usbd_pipe_handle); 183 Static void ohci_device_ctrl_done(usbd_xfer_handle); 184 185 Static usbd_status ohci_device_bulk_transfer(usbd_xfer_handle); 186 Static usbd_status ohci_device_bulk_start(usbd_xfer_handle); 187 Static void ohci_device_bulk_abort(usbd_xfer_handle); 188 Static void ohci_device_bulk_close(usbd_pipe_handle); 189 Static void ohci_device_bulk_done(usbd_xfer_handle); 190 191 Static usbd_status ohci_device_intr_transfer(usbd_xfer_handle); 192 Static usbd_status ohci_device_intr_start(usbd_xfer_handle); 193 Static void ohci_device_intr_abort(usbd_xfer_handle); 194 Static void ohci_device_intr_close(usbd_pipe_handle); 195 Static void ohci_device_intr_done(usbd_xfer_handle); 196 197 Static usbd_status ohci_device_isoc_transfer(usbd_xfer_handle); 198 Static usbd_status ohci_device_isoc_start(usbd_xfer_handle); 199 Static void ohci_device_isoc_abort(usbd_xfer_handle); 200 Static void ohci_device_isoc_close(usbd_pipe_handle); 201 Static void ohci_device_isoc_done(usbd_xfer_handle); 202 203 Static usbd_status ohci_device_setintr(ohci_softc_t *sc, 204 struct ohci_pipe *pipe, int ival); 205 206 Static int ohci_str(usb_string_descriptor_t *, int, char *); 207 208 Static void ohci_timeout(void *); 209 Static void ohci_timeout_task(void *); 210 Static void ohci_rhsc_able(ohci_softc_t *, int); 211 Static void ohci_rhsc_enable(void *); 212 213 Static void ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *); 214 Static void ohci_abort_xfer(usbd_xfer_handle, usbd_status); 215 216 Static void ohci_device_clear_toggle(usbd_pipe_handle pipe); 217 Static void ohci_noop(usbd_pipe_handle pipe); 218 219 #ifdef OHCI_DEBUG 220 Static void ohci_dumpregs(ohci_softc_t *); 221 Static void ohci_dump_tds(ohci_soft_td_t *); 222 Static void ohci_dump_td(ohci_soft_td_t *); 223 Static void ohci_dump_ed(ohci_soft_ed_t *); 224 Static void ohci_dump_itd(ohci_soft_itd_t *); 225 Static void ohci_dump_itds(ohci_soft_itd_t *); 226 #endif 227 228 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 229 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 230 #define OWRITE1(sc, r, x) \ 231 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 232 #define OWRITE2(sc, r, x) \ 233 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 234 #define OWRITE4(sc, r, x) \ 235 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 236 #define OREAD1(sc, r) (OBARR(sc), bus_space_read_1((sc)->iot, (sc)->ioh, (r))) 237 #define OREAD2(sc, r) (OBARR(sc), bus_space_read_2((sc)->iot, (sc)->ioh, (r))) 238 #define OREAD4(sc, r) (OBARR(sc), bus_space_read_4((sc)->iot, (sc)->ioh, (r))) 239 240 /* Reverse the bits in a value 0 .. 31 */ 241 Static u_int8_t revbits[OHCI_NO_INTRS] = 242 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 243 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 244 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 245 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 246 247 struct ohci_pipe { 248 struct usbd_pipe pipe; 249 ohci_soft_ed_t *sed; 250 union { 251 ohci_soft_td_t *td; 252 ohci_soft_itd_t *itd; 253 } tail; 254 /* Info needed for different pipe kinds. */ 255 union { 256 /* Control pipe */ 257 struct { 258 usb_dma_t reqdma; 259 u_int length; 260 ohci_soft_td_t *setup, *data, *stat; 261 } ctl; 262 /* Interrupt pipe */ 263 struct { 264 int nslots; 265 int pos; 266 } intr; 267 /* Bulk pipe */ 268 struct { 269 u_int length; 270 int isread; 271 } bulk; 272 /* Iso pipe */ 273 struct iso { 274 int next, inuse; 275 } iso; 276 } u; 277 }; 278 279 #define OHCI_INTR_ENDPT 1 280 281 Static struct usbd_bus_methods ohci_bus_methods = { 282 ohci_open, 283 ohci_softintr, 284 ohci_poll, 285 ohci_allocm, 286 ohci_freem, 287 ohci_allocx, 288 ohci_freex, 289 }; 290 291 Static struct usbd_pipe_methods ohci_root_ctrl_methods = { 292 ohci_root_ctrl_transfer, 293 ohci_root_ctrl_start, 294 ohci_root_ctrl_abort, 295 ohci_root_ctrl_close, 296 ohci_noop, 297 ohci_root_ctrl_done, 298 }; 299 300 Static struct usbd_pipe_methods ohci_root_intr_methods = { 301 ohci_root_intr_transfer, 302 ohci_root_intr_start, 303 ohci_root_intr_abort, 304 ohci_root_intr_close, 305 ohci_noop, 306 ohci_root_intr_done, 307 }; 308 309 Static struct usbd_pipe_methods ohci_device_ctrl_methods = { 310 ohci_device_ctrl_transfer, 311 ohci_device_ctrl_start, 312 ohci_device_ctrl_abort, 313 ohci_device_ctrl_close, 314 ohci_noop, 315 ohci_device_ctrl_done, 316 }; 317 318 Static struct usbd_pipe_methods ohci_device_intr_methods = { 319 ohci_device_intr_transfer, 320 ohci_device_intr_start, 321 ohci_device_intr_abort, 322 ohci_device_intr_close, 323 ohci_device_clear_toggle, 324 ohci_device_intr_done, 325 }; 326 327 Static struct usbd_pipe_methods ohci_device_bulk_methods = { 328 ohci_device_bulk_transfer, 329 ohci_device_bulk_start, 330 ohci_device_bulk_abort, 331 ohci_device_bulk_close, 332 ohci_device_clear_toggle, 333 ohci_device_bulk_done, 334 }; 335 336 Static struct usbd_pipe_methods ohci_device_isoc_methods = { 337 ohci_device_isoc_transfer, 338 ohci_device_isoc_start, 339 ohci_device_isoc_abort, 340 ohci_device_isoc_close, 341 ohci_noop, 342 ohci_device_isoc_done, 343 }; 344 345 #if defined(__NetBSD__) || defined(__OpenBSD__) 346 int 347 ohci_activate(device_ptr_t self, enum devact act) 348 { 349 struct ohci_softc *sc = (struct ohci_softc *)self; 350 int rv = 0; 351 352 switch (act) { 353 case DVACT_ACTIVATE: 354 return (EOPNOTSUPP); 355 break; 356 357 case DVACT_DEACTIVATE: 358 if (sc->sc_child != NULL) 359 rv = config_deactivate(sc->sc_child); 360 sc->sc_dying = 1; 361 break; 362 } 363 return (rv); 364 } 365 366 int 367 ohci_detach(struct ohci_softc *sc, int flags) 368 { 369 int rv = 0; 370 371 if (sc->sc_child != NULL) 372 rv = config_detach(sc->sc_child, flags); 373 374 if (rv != 0) 375 return (rv); 376 377 usb_uncallout(sc->sc_tmo_rhsc, ohci_rhsc_enable, sc); 378 379 #if defined(__NetBSD__) || defined(__OpenBSD__) 380 powerhook_disestablish(sc->sc_powerhook); 381 shutdownhook_disestablish(sc->sc_shutdownhook); 382 #endif 383 384 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 385 386 /* free data structures XXX */ 387 388 return (rv); 389 } 390 #endif 391 392 ohci_soft_ed_t * 393 ohci_alloc_sed(ohci_softc_t *sc) 394 { 395 ohci_soft_ed_t *sed; 396 usbd_status err; 397 int i, offs; 398 usb_dma_t dma; 399 400 if (sc->sc_freeeds == NULL) { 401 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 402 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 403 OHCI_ED_ALIGN, &dma); 404 if (err) 405 return (0); 406 for(i = 0; i < OHCI_SED_CHUNK; i++) { 407 offs = i * OHCI_SED_SIZE; 408 sed = (ohci_soft_ed_t *)((char *)KERNADDR(&dma) +offs); 409 sed->physaddr = DMAADDR(&dma) + offs; 410 sed->next = sc->sc_freeeds; 411 sc->sc_freeeds = sed; 412 } 413 } 414 sed = sc->sc_freeeds; 415 sc->sc_freeeds = sed->next; 416 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 417 sed->next = 0; 418 return (sed); 419 } 420 421 void 422 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 423 { 424 sed->next = sc->sc_freeeds; 425 sc->sc_freeeds = sed; 426 } 427 428 ohci_soft_td_t * 429 ohci_alloc_std(ohci_softc_t *sc) 430 { 431 ohci_soft_td_t *std; 432 usbd_status err; 433 int i, offs; 434 usb_dma_t dma; 435 int s; 436 437 if (sc->sc_freetds == NULL) { 438 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 439 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 440 OHCI_TD_ALIGN, &dma); 441 if (err) 442 return (NULL); 443 s = splusb(); 444 for(i = 0; i < OHCI_STD_CHUNK; i++) { 445 offs = i * OHCI_STD_SIZE; 446 std = (ohci_soft_td_t *)((char *)KERNADDR(&dma) +offs); 447 std->physaddr = DMAADDR(&dma) + offs; 448 std->nexttd = sc->sc_freetds; 449 sc->sc_freetds = std; 450 } 451 splx(s); 452 } 453 454 s = splusb(); 455 std = sc->sc_freetds; 456 sc->sc_freetds = std->nexttd; 457 memset(&std->td, 0, sizeof(ohci_td_t)); 458 std->nexttd = NULL; 459 std->xfer = NULL; 460 ohci_hash_add_td(sc, std); 461 splx(s); 462 463 return (std); 464 } 465 466 void 467 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std) 468 { 469 int s; 470 471 s = splusb(); 472 ohci_hash_rem_td(sc, std); 473 std->nexttd = sc->sc_freetds; 474 sc->sc_freetds = std; 475 splx(s); 476 } 477 478 usbd_status 479 ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc, 480 int alen, int rd, usbd_xfer_handle xfer, 481 ohci_soft_td_t *sp, ohci_soft_td_t **ep) 482 { 483 ohci_soft_td_t *next, *cur; 484 ohci_physaddr_t dataphys, dataphysend; 485 u_int32_t tdflags; 486 int len, curlen; 487 usb_dma_t *dma = &xfer->dmabuf; 488 u_int16_t flags = xfer->flags; 489 490 DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen)); 491 492 len = alen; 493 cur = sp; 494 dataphys = DMAADDR(dma); 495 dataphysend = OHCI_PAGE(dataphys + len - 1); 496 tdflags = htole32( 497 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 498 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) | 499 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR); 500 501 for (;;) { 502 next = ohci_alloc_std(sc); 503 if (next == NULL) 504 goto nomem; 505 506 /* The OHCI hardware can handle at most one page crossing. */ 507 if (OHCI_PAGE(dataphys) == dataphysend || 508 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) { 509 /* we can handle it in this TD */ 510 curlen = len; 511 } else { 512 /* must use multiple TDs, fill as much as possible. */ 513 curlen = 2 * OHCI_PAGE_SIZE - 514 (dataphys & (OHCI_PAGE_SIZE-1)); 515 /* the length must be a multiple of the max size */ 516 curlen -= curlen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize); 517 #ifdef DIAGNOSTIC 518 if (curlen == 0) 519 panic("ohci_alloc_std: curlen == 0\n"); 520 #endif 521 } 522 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x " 523 "dataphysend=0x%08x len=%d curlen=%d\n", 524 dataphys, dataphysend, 525 len, curlen)); 526 len -= curlen; 527 528 cur->td.td_flags = tdflags; 529 cur->td.td_cbp = htole32(dataphys); 530 cur->nexttd = next; 531 cur->td.td_nexttd = htole32(next->physaddr); 532 cur->td.td_be = htole32(dataphys + curlen - 1); 533 cur->len = curlen; 534 cur->flags = OHCI_ADD_LEN; 535 cur->xfer = xfer; 536 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n", 537 dataphys, dataphys + curlen - 1)); 538 if (len == 0) 539 break; 540 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n")); 541 dataphys += curlen; 542 cur = next; 543 } 544 if ((flags & USBD_FORCE_SHORT_XFER) && 545 alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) { 546 /* Force a 0 length transfer at the end. */ 547 548 cur = next; 549 next = ohci_alloc_std(sc); 550 if (next == NULL) 551 goto nomem; 552 553 cur->td.td_flags = tdflags; 554 cur->td.td_cbp = 0; /* indicate 0 length packet */ 555 cur->nexttd = next; 556 cur->td.td_nexttd = htole32(next->physaddr); 557 cur->td.td_be = ~0; 558 cur->len = 0; 559 cur->flags = 0; 560 cur->xfer = xfer; 561 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n")); 562 } 563 *ep = cur; 564 565 return (USBD_NORMAL_COMPLETION); 566 567 nomem: 568 /* XXX free chain */ 569 return (USBD_NOMEM); 570 } 571 572 #if 0 573 Static void 574 ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std, 575 ohci_soft_td_t *stdend) 576 { 577 ohci_soft_td_t *p; 578 579 for (; std != stdend; std = p) { 580 p = std->nexttd; 581 ohci_free_std(sc, std); 582 } 583 } 584 #endif 585 586 ohci_soft_itd_t * 587 ohci_alloc_sitd(ohci_softc_t *sc) 588 { 589 ohci_soft_itd_t *sitd; 590 usbd_status err; 591 int i, s, offs; 592 usb_dma_t dma; 593 594 if (sc->sc_freeitds == NULL) { 595 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n")); 596 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK, 597 OHCI_ITD_ALIGN, &dma); 598 if (err) 599 return (NULL); 600 for(i = 0; i < OHCI_SITD_CHUNK; i++) { 601 offs = i * OHCI_SITD_SIZE; 602 sitd = (ohci_soft_itd_t *)((char*)KERNADDR(&dma)+offs); 603 sitd->physaddr = DMAADDR(&dma) + offs; 604 sitd->nextitd = sc->sc_freeitds; 605 sc->sc_freeitds = sitd; 606 } 607 } 608 609 s = splusb(); 610 sitd = sc->sc_freeitds; 611 sc->sc_freeitds = sitd->nextitd; 612 memset(&sitd->itd, 0, sizeof(ohci_itd_t)); 613 sitd->nextitd = NULL; 614 sitd->xfer = NULL; 615 ohci_hash_add_itd(sc, sitd); 616 splx(s); 617 618 #ifdef DIAGNOSTIC 619 sitd->isdone = 0; 620 #endif 621 622 return (sitd); 623 } 624 625 void 626 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 627 { 628 int s; 629 630 DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd)); 631 632 #ifdef DIAGNOSTIC 633 if (!sitd->isdone) { 634 panic("ohci_free_sitd: sitd=%p not done\n", sitd); 635 return; 636 } 637 #endif 638 639 s = splusb(); 640 ohci_hash_rem_itd(sc, sitd); 641 sitd->nextitd = sc->sc_freeitds; 642 sc->sc_freeitds = sitd; 643 splx(s); 644 } 645 646 usbd_status 647 ohci_init(ohci_softc_t *sc) 648 { 649 ohci_soft_ed_t *sed, *psed; 650 usbd_status err; 651 int i; 652 u_int32_t s, ctl, ival, hcr, fm, per, rev, desca; 653 654 DPRINTF(("ohci_init: start\n")); 655 #if defined(__OpenBSD__) 656 printf(","); 657 #else 658 printf("%s:", USBDEVNAME(sc->sc_bus.bdev)); 659 #endif 660 rev = OREAD4(sc, OHCI_REVISION); 661 printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev), 662 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 663 664 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 665 printf("%s: unsupported OHCI revision\n", 666 USBDEVNAME(sc->sc_bus.bdev)); 667 sc->sc_bus.usbrev = USBREV_UNKNOWN; 668 return (USBD_INVAL); 669 } 670 sc->sc_bus.usbrev = USBREV_1_0; 671 672 for (i = 0; i < OHCI_HASH_SIZE; i++) 673 LIST_INIT(&sc->sc_hash_tds[i]); 674 for (i = 0; i < OHCI_HASH_SIZE; i++) 675 LIST_INIT(&sc->sc_hash_itds[i]); 676 677 SIMPLEQ_INIT(&sc->sc_free_xfers); 678 679 /* XXX determine alignment by R/W */ 680 /* Allocate the HCCA area. */ 681 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 682 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 683 if (err) 684 return (err); 685 sc->sc_hcca = (struct ohci_hcca *)KERNADDR(&sc->sc_hccadma); 686 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 687 688 sc->sc_eintrs = OHCI_NORMAL_INTRS; 689 690 /* Allocate dummy ED that starts the control list. */ 691 sc->sc_ctrl_head = ohci_alloc_sed(sc); 692 if (sc->sc_ctrl_head == NULL) { 693 err = USBD_NOMEM; 694 goto bad1; 695 } 696 sc->sc_ctrl_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 697 698 /* Allocate dummy ED that starts the bulk list. */ 699 sc->sc_bulk_head = ohci_alloc_sed(sc); 700 if (sc->sc_bulk_head == NULL) { 701 err = USBD_NOMEM; 702 goto bad2; 703 } 704 sc->sc_bulk_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 705 706 /* Allocate dummy ED that starts the isochronous list. */ 707 sc->sc_isoc_head = ohci_alloc_sed(sc); 708 if (sc->sc_isoc_head == NULL) { 709 err = USBD_NOMEM; 710 goto bad3; 711 } 712 sc->sc_isoc_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 713 714 /* Allocate all the dummy EDs that make up the interrupt tree. */ 715 for (i = 0; i < OHCI_NO_EDS; i++) { 716 sed = ohci_alloc_sed(sc); 717 if (sed == NULL) { 718 while (--i >= 0) 719 ohci_free_sed(sc, sc->sc_eds[i]); 720 err = USBD_NOMEM; 721 goto bad4; 722 } 723 /* All ED fields are set to 0. */ 724 sc->sc_eds[i] = sed; 725 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 726 if (i != 0) 727 psed = sc->sc_eds[(i-1) / 2]; 728 else 729 psed= sc->sc_isoc_head; 730 sed->next = psed; 731 sed->ed.ed_nexted = htole32(psed->physaddr); 732 } 733 /* 734 * Fill HCCA interrupt table. The bit reversal is to get 735 * the tree set up properly to spread the interrupts. 736 */ 737 for (i = 0; i < OHCI_NO_INTRS; i++) 738 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 739 htole32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 740 741 #ifdef OHCI_DEBUG 742 if (ohcidebug > 15) { 743 for (i = 0; i < OHCI_NO_EDS; i++) { 744 printf("ed#%d ", i); 745 ohci_dump_ed(sc->sc_eds[i]); 746 } 747 printf("iso "); 748 ohci_dump_ed(sc->sc_isoc_head); 749 } 750 #endif 751 752 /* Determine in what context we are running. */ 753 ctl = OREAD4(sc, OHCI_CONTROL); 754 if (ctl & OHCI_IR) { 755 /* SMM active, request change */ 756 DPRINTF(("ohci_init: SMM active, request owner change\n")); 757 s = OREAD4(sc, OHCI_COMMAND_STATUS); 758 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 759 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 760 usb_delay_ms(&sc->sc_bus, 1); 761 ctl = OREAD4(sc, OHCI_CONTROL); 762 } 763 if ((ctl & OHCI_IR) == 0) { 764 printf("%s: SMM does not respond, resetting\n", 765 USBDEVNAME(sc->sc_bus.bdev)); 766 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 767 goto reset; 768 } 769 #if 0 770 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */ 771 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 772 /* BIOS started controller. */ 773 DPRINTF(("ohci_init: BIOS active\n")); 774 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 775 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL); 776 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 777 } 778 #endif 779 } else { 780 DPRINTF(("ohci_init: cold started\n")); 781 reset: 782 /* Controller was cold started. */ 783 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 784 } 785 786 /* 787 * This reset should not be necessary according to the OHCI spec, but 788 * without it some controllers do not start. 789 */ 790 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 791 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 792 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 793 794 /* We now own the host controller and the bus has been reset. */ 795 ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL)); 796 797 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 798 /* Nominal time for a reset is 10 us. */ 799 for (i = 0; i < 10; i++) { 800 delay(10); 801 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 802 if (!hcr) 803 break; 804 } 805 if (hcr) { 806 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 807 err = USBD_IOERROR; 808 goto bad5; 809 } 810 #ifdef OHCI_DEBUG 811 if (ohcidebug > 15) 812 ohci_dumpregs(sc); 813 #endif 814 815 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 816 817 /* Set up HC registers. */ 818 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma)); 819 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 820 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 821 /* disable all interrupts and then switch on all desired interrupts */ 822 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 823 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 824 /* switch on desired functional features */ 825 ctl = OREAD4(sc, OHCI_CONTROL); 826 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 827 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 828 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL; 829 /* And finally start it! */ 830 OWRITE4(sc, OHCI_CONTROL, ctl); 831 832 /* 833 * The controller is now OPERATIONAL. Set a some final 834 * registers that should be set earlier, but that the 835 * controller ignores when in the SUSPEND state. 836 */ 837 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 838 fm |= OHCI_FSMPS(ival) | ival; 839 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 840 per = OHCI_PERIODIC(ival); /* 90% periodic */ 841 OWRITE4(sc, OHCI_PERIODIC_START, per); 842 843 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */ 844 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 845 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP); 846 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 847 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY); 848 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca); 849 850 /* 851 * The AMD756 requires a delay before re-reading the register, 852 * otherwise it will occasionally report 0 ports. 853 */ 854 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY); 855 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 856 857 #ifdef OHCI_DEBUG 858 if (ohcidebug > 5) 859 ohci_dumpregs(sc); 860 #endif 861 862 /* Set up the bus struct. */ 863 sc->sc_bus.methods = &ohci_bus_methods; 864 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 865 866 #if defined(__NetBSD__) || defined(__OpenBSD__) 867 sc->sc_control = sc->sc_intre = 0; 868 sc->sc_powerhook = powerhook_establish(ohci_power, sc); 869 sc->sc_shutdownhook = shutdownhook_establish(ohci_shutdown, sc); 870 #endif 871 872 usb_callout_init(sc->sc_tmo_rhsc); 873 874 return (USBD_NORMAL_COMPLETION); 875 876 bad5: 877 for (i = 0; i < OHCI_NO_EDS; i++) 878 ohci_free_sed(sc, sc->sc_eds[i]); 879 bad4: 880 ohci_free_sed(sc, sc->sc_isoc_head); 881 bad3: 882 ohci_free_sed(sc, sc->sc_ctrl_head); 883 bad2: 884 ohci_free_sed(sc, sc->sc_bulk_head); 885 bad1: 886 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 887 return (err); 888 } 889 890 usbd_status 891 ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 892 { 893 #if defined(__NetBSD__) || defined(__OpenBSD__) 894 struct ohci_softc *sc = (struct ohci_softc *)bus; 895 #endif 896 897 return (usb_allocmem(&sc->sc_bus, size, 0, dma)); 898 } 899 900 void 901 ohci_freem(struct usbd_bus *bus, usb_dma_t *dma) 902 { 903 #if defined(__NetBSD__) || defined(__OpenBSD__) 904 struct ohci_softc *sc = (struct ohci_softc *)bus; 905 #endif 906 907 usb_freemem(&sc->sc_bus, dma); 908 } 909 910 usbd_xfer_handle 911 ohci_allocx(struct usbd_bus *bus) 912 { 913 struct ohci_softc *sc = (struct ohci_softc *)bus; 914 usbd_xfer_handle xfer; 915 916 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 917 if (xfer != NULL) { 918 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, xfer, next); 919 #ifdef DIAGNOSTIC 920 if (xfer->busy_free != XFER_FREE) { 921 printf("ohci_allocx: xfer=%p not free, 0x%08x\n", xfer, 922 xfer->busy_free); 923 } 924 #endif 925 } else { 926 xfer = malloc(sizeof(struct ohci_xfer), M_USB, M_NOWAIT); 927 } 928 if (xfer != NULL) { 929 memset(xfer, 0, sizeof (struct ohci_xfer)); 930 #ifdef DIAGNOSTIC 931 xfer->busy_free = XFER_BUSY; 932 #endif 933 } 934 return (xfer); 935 } 936 937 void 938 ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 939 { 940 struct ohci_softc *sc = (struct ohci_softc *)bus; 941 942 #ifdef DIAGNOSTIC 943 if (xfer->busy_free != XFER_BUSY) { 944 printf("ohci_freex: xfer=%p not busy, 0x%08x\n", xfer, 945 xfer->busy_free); 946 return; 947 } 948 xfer->busy_free = XFER_FREE; 949 #endif 950 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 951 } 952 953 /* 954 * Shut down the controller when the system is going down. 955 */ 956 void 957 ohci_shutdown(void *v) 958 { 959 ohci_softc_t *sc = v; 960 961 DPRINTF(("ohci_shutdown: stopping the HC\n")); 962 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 963 } 964 965 /* 966 * Handle suspend/resume. 967 * 968 * We need to switch to polling mode here, because this routine is 969 * called from an intterupt context. This is all right since we 970 * are almost suspended anyway. 971 */ 972 void 973 ohci_power(int why, void *v) 974 { 975 ohci_softc_t *sc = v; 976 u_int32_t ctl; 977 int s; 978 979 #ifdef OHCI_DEBUG 980 DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why)); 981 ohci_dumpregs(sc); 982 #endif 983 984 s = splhardusb(); 985 switch (why) { 986 case PWR_SUSPEND: 987 case PWR_STANDBY: 988 sc->sc_bus.use_polling++; 989 ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK; 990 if (sc->sc_control == 0) { 991 /* 992 * Preserve register values, in case that APM BIOS 993 * does not recover them. 994 */ 995 sc->sc_control = ctl; 996 sc->sc_intre = OREAD4(sc, OHCI_INTERRUPT_ENABLE); 997 } 998 ctl |= OHCI_HCFS_SUSPEND; 999 OWRITE4(sc, OHCI_CONTROL, ctl); 1000 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1001 sc->sc_bus.use_polling--; 1002 break; 1003 case PWR_RESUME: 1004 sc->sc_bus.use_polling++; 1005 /* Some broken BIOSes do not recover these values */ 1006 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma)); 1007 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 1008 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 1009 if (sc->sc_intre) 1010 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, 1011 sc->sc_intre & (OHCI_ALL_INTRS | OHCI_MIE)); 1012 if (sc->sc_control) 1013 ctl = sc->sc_control; 1014 else 1015 ctl = OREAD4(sc, OHCI_CONTROL); 1016 ctl |= OHCI_HCFS_RESUME; 1017 OWRITE4(sc, OHCI_CONTROL, ctl); 1018 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 1019 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL; 1020 OWRITE4(sc, OHCI_CONTROL, ctl); 1021 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 1022 sc->sc_control = sc->sc_intre = 0; 1023 sc->sc_bus.use_polling--; 1024 break; 1025 case PWR_SOFTSUSPEND: 1026 case PWR_SOFTSTANDBY: 1027 case PWR_SOFTRESUME: 1028 break; 1029 } 1030 splx(s); 1031 } 1032 1033 #ifdef OHCI_DEBUG 1034 void 1035 ohci_dumpregs(ohci_softc_t *sc) 1036 { 1037 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 1038 OREAD4(sc, OHCI_REVISION), 1039 OREAD4(sc, OHCI_CONTROL), 1040 OREAD4(sc, OHCI_COMMAND_STATUS))); 1041 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 1042 OREAD4(sc, OHCI_INTERRUPT_STATUS), 1043 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 1044 OREAD4(sc, OHCI_INTERRUPT_DISABLE))); 1045 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 1046 OREAD4(sc, OHCI_HCCA), 1047 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 1048 OREAD4(sc, OHCI_CONTROL_HEAD_ED))); 1049 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 1050 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 1051 OREAD4(sc, OHCI_BULK_HEAD_ED), 1052 OREAD4(sc, OHCI_BULK_CURRENT_ED))); 1053 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 1054 OREAD4(sc, OHCI_DONE_HEAD), 1055 OREAD4(sc, OHCI_FM_INTERVAL), 1056 OREAD4(sc, OHCI_FM_REMAINING))); 1057 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 1058 OREAD4(sc, OHCI_FM_NUMBER), 1059 OREAD4(sc, OHCI_PERIODIC_START), 1060 OREAD4(sc, OHCI_LS_THRESHOLD))); 1061 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n", 1062 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 1063 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 1064 OREAD4(sc, OHCI_RH_STATUS))); 1065 DPRINTF((" port1=0x%08x port2=0x%08x\n", 1066 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 1067 OREAD4(sc, OHCI_RH_PORT_STATUS(2)))); 1068 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n", 1069 le32toh(sc->sc_hcca->hcca_frame_number), 1070 le32toh(sc->sc_hcca->hcca_done_head))); 1071 } 1072 #endif 1073 1074 Static int ohci_intr1(ohci_softc_t *); 1075 1076 int 1077 ohci_intr(void *p) 1078 { 1079 ohci_softc_t *sc = p; 1080 1081 if (sc == NULL || sc->sc_dying) 1082 return (0); 1083 1084 /* If we get an interrupt while polling, then just ignore it. */ 1085 if (sc->sc_bus.use_polling) { 1086 #ifdef DIAGNOSTIC 1087 printf("ohci_intr: ignored interrupt while polling\n"); 1088 #endif 1089 return (0); 1090 } 1091 1092 return (ohci_intr1(sc)); 1093 } 1094 1095 Static int 1096 ohci_intr1(ohci_softc_t *sc) 1097 { 1098 u_int32_t intrs, eintrs; 1099 ohci_physaddr_t done; 1100 1101 DPRINTFN(14,("ohci_intr1: enter\n")); 1102 1103 /* In case the interrupt occurs before initialization has completed. */ 1104 if (sc == NULL || sc->sc_hcca == NULL) { 1105 #ifdef DIAGNOSTIC 1106 printf("ohci_intr: sc->sc_hcca == NULL\n"); 1107 #endif 1108 return (0); 1109 } 1110 1111 intrs = 0; 1112 done = le32toh(sc->sc_hcca->hcca_done_head); 1113 if (done != 0) { 1114 if (done & ~OHCI_DONE_INTRS) 1115 intrs = OHCI_WDH; 1116 if (done & OHCI_DONE_INTRS) 1117 intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS); 1118 } else 1119 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1120 1121 if (!intrs) 1122 return (0); 1123 1124 intrs &= ~OHCI_MIE; 1125 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */ 1126 eintrs = intrs & sc->sc_eintrs; 1127 if (!eintrs) 1128 return (0); 1129 1130 sc->sc_bus.intr_context++; 1131 sc->sc_bus.no_intrs++; 1132 DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 1133 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 1134 (u_int)eintrs)); 1135 1136 if (eintrs & OHCI_SO) { 1137 sc->sc_overrun_cnt++; 1138 if (usbd_ratecheck(&sc->sc_overrun_ntc)) { 1139 printf("%s: %u scheduling overruns\n", 1140 USBDEVNAME(sc->sc_bus.bdev), sc->sc_overrun_cnt); 1141 sc->sc_overrun_cnt = 0; 1142 } 1143 /* XXX do what */ 1144 eintrs &= ~OHCI_SO; 1145 } 1146 if (eintrs & OHCI_WDH) { 1147 ohci_add_done(sc, done &~ OHCI_DONE_INTRS); 1148 sc->sc_hcca->hcca_done_head = 0; 1149 usb_schedsoftintr(&sc->sc_bus); 1150 eintrs &= ~OHCI_WDH; 1151 } 1152 if (eintrs & OHCI_RD) { 1153 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev)); 1154 /* XXX process resume detect */ 1155 } 1156 if (eintrs & OHCI_UE) { 1157 printf("%s: unrecoverable error, controller halted\n", 1158 USBDEVNAME(sc->sc_bus.bdev)); 1159 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1160 /* XXX what else */ 1161 } 1162 if (eintrs & OHCI_RHSC) { 1163 ohci_rhsc(sc, sc->sc_intrxfer); 1164 /* 1165 * Disable RHSC interrupt for now, because it will be 1166 * on until the port has been reset. 1167 */ 1168 ohci_rhsc_able(sc, 0); 1169 /* Do not allow RHSC interrupts > 1 per second */ 1170 usb_callout(sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc); 1171 eintrs &= ~OHCI_RHSC; 1172 } 1173 1174 sc->sc_bus.intr_context--; 1175 1176 if (eintrs != 0) { 1177 /* Block unprocessed interrupts. XXX */ 1178 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs); 1179 sc->sc_eintrs &= ~eintrs; 1180 printf("%s: blocking intrs 0x%x\n", 1181 USBDEVNAME(sc->sc_bus.bdev), eintrs); 1182 } 1183 1184 return (1); 1185 } 1186 1187 void 1188 ohci_rhsc_able(ohci_softc_t *sc, int on) 1189 { 1190 DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on)); 1191 if (on) { 1192 sc->sc_eintrs |= OHCI_RHSC; 1193 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1194 } else { 1195 sc->sc_eintrs &= ~OHCI_RHSC; 1196 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC); 1197 } 1198 } 1199 1200 void 1201 ohci_rhsc_enable(void *v_sc) 1202 { 1203 ohci_softc_t *sc = v_sc; 1204 1205 ohci_rhsc_able(sc, 1); 1206 } 1207 1208 #ifdef OHCI_DEBUG 1209 char *ohci_cc_strs[] = { 1210 "NO_ERROR", 1211 "CRC", 1212 "BIT_STUFFING", 1213 "DATA_TOGGLE_MISMATCH", 1214 "STALL", 1215 "DEVICE_NOT_RESPONDING", 1216 "PID_CHECK_FAILURE", 1217 "UNEXPECTED_PID", 1218 "DATA_OVERRUN", 1219 "DATA_UNDERRUN", 1220 "BUFFER_OVERRUN", 1221 "BUFFER_UNDERRUN", 1222 "reserved", 1223 "reserved", 1224 "NOT_ACCESSED", 1225 "NOT_ACCESSED", 1226 }; 1227 #endif 1228 1229 void 1230 ohci_add_done(ohci_softc_t *sc, ohci_physaddr_t done) 1231 { 1232 ohci_soft_itd_t *sitd, *sidone, **ip; 1233 ohci_soft_td_t *std, *sdone, **p; 1234 1235 /* Reverse the done list. */ 1236 for (sdone = NULL, sidone = NULL; done != 0; ) { 1237 std = ohci_hash_find_td(sc, done); 1238 if (std != NULL) { 1239 std->dnext = sdone; 1240 done = le32toh(std->td.td_nexttd); 1241 sdone = std; 1242 DPRINTFN(10,("add TD %p\n", std)); 1243 continue; 1244 } 1245 sitd = ohci_hash_find_itd(sc, done); 1246 if (sitd != NULL) { 1247 sitd->dnext = sidone; 1248 done = le32toh(sitd->itd.itd_nextitd); 1249 sidone = sitd; 1250 DPRINTFN(5,("add ITD %p\n", sitd)); 1251 continue; 1252 } 1253 panic("ohci_add_done: addr 0x%08lx not found\n", (u_long)done); 1254 } 1255 1256 /* sdone & sidone now hold the done lists. */ 1257 /* Put them on the already processed lists. */ 1258 for (p = &sc->sc_sdone; *p != NULL; p = &(*p)->dnext) 1259 ; 1260 *p = sdone; 1261 for (ip = &sc->sc_sidone; *ip != NULL; ip = &(*ip)->dnext) 1262 ; 1263 *ip = sidone; 1264 } 1265 1266 void 1267 ohci_softintr(void *v) 1268 { 1269 ohci_softc_t *sc = v; 1270 ohci_soft_itd_t *sitd, *sidone, *sitdnext; 1271 ohci_soft_td_t *std, *sdone, *stdnext; 1272 usbd_xfer_handle xfer; 1273 int len, cc, s; 1274 1275 DPRINTFN(10,("ohci_softintr: enter\n:")); 1276 1277 sc->sc_bus.intr_context++; 1278 1279 s = splhardusb(); 1280 sdone = sc->sc_sdone; 1281 sc->sc_sdone = NULL; 1282 sidone = sc->sc_sidone; 1283 sc->sc_sidone = NULL; 1284 splx(s); 1285 1286 DPRINTFN(10,("ohci_softintr: sdone=%p sidone=%p\n", sdone, sidone)); 1287 1288 #ifdef OHCI_DEBUG 1289 if (ohcidebug > 10) { 1290 DPRINTF(("ohci_process_done: TD done:\n")); 1291 ohci_dump_tds(sdone); 1292 } 1293 #endif 1294 1295 for (std = sdone; std; std = stdnext) { 1296 xfer = std->xfer; 1297 stdnext = std->dnext; 1298 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n", 1299 std, xfer, xfer ? xfer->hcpriv : 0)); 1300 if (xfer == NULL) { 1301 /* 1302 * xfer == NULL: There seems to be no xfer associated 1303 * with this TD. It is tailp that happened to end up on 1304 * the done queue. 1305 * Shouldn't happen, but some chips are broken(?). 1306 */ 1307 continue; 1308 } 1309 if (xfer->status == USBD_CANCELLED || 1310 xfer->status == USBD_TIMEOUT) { 1311 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1312 xfer)); 1313 /* Handled by abort routine. */ 1314 continue; 1315 } 1316 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 1317 cc = OHCI_TD_GET_CC(le32toh(std->td.td_flags)); 1318 if (cc == OHCI_CC_NO_ERROR) { 1319 len = std->len; 1320 if (std->td.td_cbp != 0) 1321 len -= le32toh(std->td.td_be) - 1322 le32toh(std->td.td_cbp) + 1; 1323 DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", 1324 len, std->flags)); 1325 if (std->flags & OHCI_ADD_LEN) 1326 xfer->actlen += len; 1327 if (std->flags & OHCI_CALL_DONE) { 1328 xfer->status = USBD_NORMAL_COMPLETION; 1329 usb_transfer_complete(xfer); 1330 } 1331 ohci_free_std(sc, std); 1332 } else { 1333 /* 1334 * Endpoint is halted. First unlink all the TDs 1335 * belonging to the failed transfer, and then restart 1336 * the endpoint. 1337 */ 1338 ohci_soft_td_t *p, *n; 1339 struct ohci_pipe *opipe = 1340 (struct ohci_pipe *)xfer->pipe; 1341 1342 DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n", 1343 OHCI_TD_GET_CC(le32toh(std->td.td_flags)), 1344 ohci_cc_strs[OHCI_TD_GET_CC(le32toh(std->td.td_flags))])); 1345 1346 /* remove TDs */ 1347 for (p = std; p->xfer == xfer; p = n) { 1348 n = p->nexttd; 1349 ohci_free_std(sc, p); 1350 } 1351 1352 /* clear halt */ 1353 opipe->sed->ed.ed_headp = htole32(p->physaddr); 1354 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1355 1356 if (cc == OHCI_CC_STALL) 1357 xfer->status = USBD_STALLED; 1358 else 1359 xfer->status = USBD_IOERROR; 1360 usb_transfer_complete(xfer); 1361 } 1362 } 1363 1364 #ifdef OHCI_DEBUG 1365 if (ohcidebug > 10) { 1366 DPRINTF(("ohci_softintr: ITD done:\n")); 1367 ohci_dump_itds(sidone); 1368 } 1369 #endif 1370 1371 for (sitd = sidone; sitd != NULL; sitd = sitdnext) { 1372 xfer = sitd->xfer; 1373 sitdnext = sitd->dnext; 1374 DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n", 1375 sitd, xfer, xfer ? xfer->hcpriv : 0)); 1376 if (xfer == NULL) 1377 continue; 1378 if (xfer->status == USBD_CANCELLED || 1379 xfer->status == USBD_TIMEOUT) { 1380 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1381 xfer)); 1382 /* Handled by abort routine. */ 1383 continue; 1384 } 1385 #ifdef DIAGNOSTIC 1386 if (sitd->isdone) 1387 printf("ohci_softintr: sitd=%p is done\n", sitd); 1388 sitd->isdone = 1; 1389 #endif 1390 cc = OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags)); 1391 if (cc == OHCI_CC_NO_ERROR) { 1392 /* XXX compute length for input */ 1393 struct ohci_pipe *opipe = 1394 (struct ohci_pipe *)xfer->pipe; 1395 if (sitd->flags & OHCI_CALL_DONE) { 1396 opipe->u.iso.inuse -= xfer->nframes; 1397 /* XXX update frlengths with actual length */ 1398 /* XXX xfer->actlen = actlen; */ 1399 xfer->status = USBD_NORMAL_COMPLETION; 1400 usb_transfer_complete(xfer); 1401 } 1402 } else { 1403 /* XXX Do more */ 1404 xfer->status = USBD_IOERROR; 1405 usb_transfer_complete(xfer); 1406 } 1407 } 1408 1409 sc->sc_bus.intr_context--; 1410 DPRINTFN(10,("ohci_softintr: done:\n")); 1411 } 1412 1413 void 1414 ohci_device_ctrl_done(usbd_xfer_handle xfer) 1415 { 1416 DPRINTFN(10,("ohci_ctrl_done: xfer=%p\n", xfer)); 1417 1418 #ifdef DIAGNOSTIC 1419 if (!(xfer->rqflags & URQ_REQUEST)) { 1420 panic("ohci_ctrl_done: not a request\n"); 1421 } 1422 #endif 1423 xfer->hcpriv = NULL; 1424 } 1425 1426 void 1427 ohci_device_intr_done(usbd_xfer_handle xfer) 1428 { 1429 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1430 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1431 ohci_soft_ed_t *sed = opipe->sed; 1432 ohci_soft_td_t *data, *tail; 1433 1434 1435 DPRINTFN(10,("ohci_intr_done: xfer=%p, actlen=%d\n", 1436 xfer, xfer->actlen)); 1437 1438 xfer->hcpriv = NULL; 1439 1440 if (xfer->pipe->repeat) { 1441 data = opipe->tail.td; 1442 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 1443 if (tail == NULL) { 1444 xfer->status = USBD_NOMEM; 1445 return; 1446 } 1447 tail->xfer = NULL; 1448 1449 data->td.td_flags = htole32( 1450 OHCI_TD_IN | OHCI_TD_NOCC | 1451 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 1452 if (xfer->flags & USBD_SHORT_XFER_OK) 1453 data->td.td_flags |= htole32(OHCI_TD_R); 1454 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf)); 1455 data->nexttd = tail; 1456 data->td.td_nexttd = htole32(tail->physaddr); 1457 data->td.td_be = htole32(le32toh(data->td.td_cbp) + 1458 xfer->length - 1); 1459 data->len = xfer->length; 1460 data->xfer = xfer; 1461 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1462 xfer->hcpriv = data; 1463 xfer->actlen = 0; 1464 1465 sed->ed.ed_tailp = htole32(tail->physaddr); 1466 opipe->tail.td = tail; 1467 } 1468 } 1469 1470 void 1471 ohci_device_bulk_done(usbd_xfer_handle xfer) 1472 { 1473 DPRINTFN(10,("ohci_bulk_done: xfer=%p, actlen=%d\n", 1474 xfer, xfer->actlen)); 1475 1476 xfer->hcpriv = NULL; 1477 } 1478 1479 void 1480 ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer) 1481 { 1482 usbd_pipe_handle pipe; 1483 struct ohci_pipe *opipe; 1484 u_char *p; 1485 int i, m; 1486 int hstatus; 1487 1488 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1489 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n", 1490 sc, xfer, hstatus)); 1491 1492 if (xfer == NULL) { 1493 /* Just ignore the change. */ 1494 return; 1495 } 1496 1497 pipe = xfer->pipe; 1498 opipe = (struct ohci_pipe *)pipe; 1499 1500 p = KERNADDR(&xfer->dmabuf); 1501 m = min(sc->sc_noport, xfer->length * 8 - 1); 1502 memset(p, 0, xfer->length); 1503 for (i = 1; i <= m; i++) { 1504 /* Pick out CHANGE bits from the status reg. */ 1505 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1506 p[i/8] |= 1 << (i%8); 1507 } 1508 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 1509 xfer->actlen = xfer->length; 1510 xfer->status = USBD_NORMAL_COMPLETION; 1511 1512 usb_transfer_complete(xfer); 1513 } 1514 1515 void 1516 ohci_root_intr_done(usbd_xfer_handle xfer) 1517 { 1518 xfer->hcpriv = NULL; 1519 } 1520 1521 void 1522 ohci_root_ctrl_done(usbd_xfer_handle xfer) 1523 { 1524 xfer->hcpriv = NULL; 1525 } 1526 1527 /* 1528 * Wait here until controller claims to have an interrupt. 1529 * Then call ohci_intr and return. Use timeout to avoid waiting 1530 * too long. 1531 */ 1532 void 1533 ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer) 1534 { 1535 int timo = xfer->timeout; 1536 int usecs; 1537 u_int32_t intrs; 1538 1539 xfer->status = USBD_IN_PROGRESS; 1540 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 1541 usb_delay_ms(&sc->sc_bus, 1); 1542 if (sc->sc_dying) 1543 break; 1544 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 1545 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs)); 1546 #ifdef OHCI_DEBUG 1547 if (ohcidebug > 15) 1548 ohci_dumpregs(sc); 1549 #endif 1550 if (intrs) { 1551 ohci_intr1(sc); 1552 if (xfer->status != USBD_IN_PROGRESS) 1553 return; 1554 } 1555 } 1556 1557 /* Timeout */ 1558 DPRINTF(("ohci_waitintr: timeout\n")); 1559 xfer->status = USBD_TIMEOUT; 1560 usb_transfer_complete(xfer); 1561 /* XXX should free TD */ 1562 } 1563 1564 void 1565 ohci_poll(struct usbd_bus *bus) 1566 { 1567 ohci_softc_t *sc = (ohci_softc_t *)bus; 1568 #ifdef OHCI_DEBUG 1569 static int last; 1570 int new; 1571 new = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1572 if (new != last) { 1573 DPRINTFN(10,("ohci_poll: intrs=0x%04x\n", new)); 1574 last = new; 1575 } 1576 #endif 1577 1578 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) 1579 ohci_intr1(sc); 1580 } 1581 1582 usbd_status 1583 ohci_device_request(usbd_xfer_handle xfer) 1584 { 1585 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1586 usb_device_request_t *req = &xfer->request; 1587 usbd_device_handle dev = opipe->pipe.device; 1588 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1589 int addr = dev->address; 1590 ohci_soft_td_t *setup, *stat, *next, *tail; 1591 ohci_soft_ed_t *sed; 1592 int isread; 1593 int len; 1594 usbd_status err; 1595 int s; 1596 1597 isread = req->bmRequestType & UT_READ; 1598 len = UGETW(req->wLength); 1599 1600 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 1601 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 1602 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1603 UGETW(req->wIndex), len, addr, 1604 opipe->pipe.endpoint->edesc->bEndpointAddress)); 1605 1606 setup = opipe->tail.td; 1607 stat = ohci_alloc_std(sc); 1608 if (stat == NULL) { 1609 err = USBD_NOMEM; 1610 goto bad1; 1611 } 1612 tail = ohci_alloc_std(sc); 1613 if (tail == NULL) { 1614 err = USBD_NOMEM; 1615 goto bad2; 1616 } 1617 tail->xfer = NULL; 1618 1619 sed = opipe->sed; 1620 opipe->u.ctl.length = len; 1621 1622 /* Update device address and length since they may have changed. */ 1623 /* XXX This only needs to be done once, but it's too early in open. */ 1624 /* XXXX Should not touch ED here! */ 1625 sed->ed.ed_flags = htole32( 1626 (le32toh(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) | 1627 OHCI_ED_SET_FA(addr) | 1628 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize))); 1629 1630 next = stat; 1631 1632 /* Set up data transaction */ 1633 if (len != 0) { 1634 ohci_soft_td_t *std = stat; 1635 1636 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 1637 std, &stat); 1638 stat = stat->nexttd; /* point at free TD */ 1639 if (err) 1640 goto bad3; 1641 /* Start toggle at 1 and then use the carried toggle. */ 1642 std->td.td_flags &= htole32(~OHCI_TD_TOGGLE_MASK); 1643 std->td.td_flags |= htole32(OHCI_TD_TOGGLE_1); 1644 } 1645 1646 memcpy(KERNADDR(&opipe->u.ctl.reqdma), req, sizeof *req); 1647 1648 setup->td.td_flags = htole32(OHCI_TD_SETUP | OHCI_TD_NOCC | 1649 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1650 setup->td.td_cbp = htole32(DMAADDR(&opipe->u.ctl.reqdma)); 1651 setup->nexttd = next; 1652 setup->td.td_nexttd = htole32(next->physaddr); 1653 setup->td.td_be = htole32(le32toh(setup->td.td_cbp) + sizeof *req - 1); 1654 setup->len = 0; 1655 setup->xfer = xfer; 1656 setup->flags = 0; 1657 xfer->hcpriv = setup; 1658 1659 stat->td.td_flags = htole32( 1660 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | 1661 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1662 stat->td.td_cbp = 0; 1663 stat->nexttd = tail; 1664 stat->td.td_nexttd = htole32(tail->physaddr); 1665 stat->td.td_be = 0; 1666 stat->flags = OHCI_CALL_DONE; 1667 stat->len = 0; 1668 stat->xfer = xfer; 1669 1670 #ifdef OHCI_DEBUG 1671 if (ohcidebug > 5) { 1672 DPRINTF(("ohci_device_request:\n")); 1673 ohci_dump_ed(sed); 1674 ohci_dump_tds(setup); 1675 } 1676 #endif 1677 1678 /* Insert ED in schedule */ 1679 s = splusb(); 1680 sed->ed.ed_tailp = htole32(tail->physaddr); 1681 opipe->tail.td = tail; 1682 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1683 if (xfer->timeout && !sc->sc_bus.use_polling) { 1684 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout), 1685 ohci_timeout, xfer); 1686 } 1687 splx(s); 1688 1689 #ifdef OHCI_DEBUG 1690 if (ohcidebug > 20) { 1691 delay(10000); 1692 DPRINTF(("ohci_device_request: status=%x\n", 1693 OREAD4(sc, OHCI_COMMAND_STATUS))); 1694 ohci_dumpregs(sc); 1695 printf("ctrl head:\n"); 1696 ohci_dump_ed(sc->sc_ctrl_head); 1697 printf("sed:\n"); 1698 ohci_dump_ed(sed); 1699 ohci_dump_tds(setup); 1700 } 1701 #endif 1702 1703 return (USBD_NORMAL_COMPLETION); 1704 1705 bad3: 1706 ohci_free_std(sc, tail); 1707 bad2: 1708 ohci_free_std(sc, stat); 1709 bad1: 1710 return (err); 1711 } 1712 1713 /* 1714 * Add an ED to the schedule. Called at splusb(). 1715 */ 1716 void 1717 ohci_add_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1718 { 1719 DPRINTFN(8,("ohci_add_ed: sed=%p head=%p\n", sed, head)); 1720 1721 SPLUSBCHECK; 1722 sed->next = head->next; 1723 sed->ed.ed_nexted = head->ed.ed_nexted; 1724 head->next = sed; 1725 head->ed.ed_nexted = htole32(sed->physaddr); 1726 } 1727 1728 /* 1729 * Remove an ED from the schedule. Called at splusb(). 1730 */ 1731 void 1732 ohci_rem_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1733 { 1734 ohci_soft_ed_t *p; 1735 1736 SPLUSBCHECK; 1737 1738 /* XXX */ 1739 for (p = head; p == NULL && p->next != sed; p = p->next) 1740 ; 1741 if (p == NULL) 1742 panic("ohci_rem_ed: ED not found\n"); 1743 p->next = sed->next; 1744 p->ed.ed_nexted = sed->ed.ed_nexted; 1745 } 1746 1747 /* 1748 * When a transfer is completed the TD is added to the done queue by 1749 * the host controller. This queue is the processed by software. 1750 * Unfortunately the queue contains the physical address of the TD 1751 * and we have no simple way to translate this back to a kernel address. 1752 * To make the translation possible (and fast) we use a hash table of 1753 * TDs currently in the schedule. The physical address is used as the 1754 * hash value. 1755 */ 1756 1757 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1758 /* Called at splusb() */ 1759 void 1760 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1761 { 1762 int h = HASH(std->physaddr); 1763 1764 SPLUSBCHECK; 1765 1766 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1767 } 1768 1769 /* Called at splusb() */ 1770 void 1771 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1772 { 1773 SPLUSBCHECK; 1774 1775 LIST_REMOVE(std, hnext); 1776 } 1777 1778 ohci_soft_td_t * 1779 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a) 1780 { 1781 int h = HASH(a); 1782 ohci_soft_td_t *std; 1783 1784 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1785 std != NULL; 1786 std = LIST_NEXT(std, hnext)) 1787 if (std->physaddr == a) 1788 return (std); 1789 return (NULL); 1790 } 1791 1792 /* Called at splusb() */ 1793 void 1794 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1795 { 1796 int h = HASH(sitd->physaddr); 1797 1798 SPLUSBCHECK; 1799 1800 DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n", 1801 sitd, (u_long)sitd->physaddr)); 1802 1803 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext); 1804 } 1805 1806 /* Called at splusb() */ 1807 void 1808 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1809 { 1810 SPLUSBCHECK; 1811 1812 DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n", 1813 sitd, (u_long)sitd->physaddr)); 1814 1815 LIST_REMOVE(sitd, hnext); 1816 } 1817 1818 ohci_soft_itd_t * 1819 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a) 1820 { 1821 int h = HASH(a); 1822 ohci_soft_itd_t *sitd; 1823 1824 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]); 1825 sitd != NULL; 1826 sitd = LIST_NEXT(sitd, hnext)) 1827 if (sitd->physaddr == a) 1828 return (sitd); 1829 return (NULL); 1830 } 1831 1832 void 1833 ohci_timeout(void *addr) 1834 { 1835 struct ohci_xfer *oxfer = addr; 1836 struct ohci_pipe *opipe = (struct ohci_pipe *)oxfer->xfer.pipe; 1837 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1838 1839 DPRINTF(("ohci_timeout: oxfer=%p\n", oxfer)); 1840 1841 if (sc->sc_dying) { 1842 ohci_abort_xfer(&oxfer->xfer, USBD_TIMEOUT); 1843 return; 1844 } 1845 1846 /* Execute the abort in a process context. */ 1847 usb_init_task(&oxfer->abort_task, ohci_timeout_task, addr); 1848 usb_add_task(oxfer->xfer.pipe->device, &oxfer->abort_task); 1849 } 1850 1851 void 1852 ohci_timeout_task(void *addr) 1853 { 1854 usbd_xfer_handle xfer = addr; 1855 int s; 1856 1857 DPRINTF(("ohci_timeout_task: xfer=%p\n", xfer)); 1858 1859 s = splusb(); 1860 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1861 splx(s); 1862 } 1863 1864 #ifdef OHCI_DEBUG 1865 void 1866 ohci_dump_tds(ohci_soft_td_t *std) 1867 { 1868 for (; std; std = std->nexttd) 1869 ohci_dump_td(std); 1870 } 1871 1872 void 1873 ohci_dump_td(ohci_soft_td_t *std) 1874 { 1875 char sbuf[128]; 1876 1877 bitmask_snprintf((u_int32_t)le32toh(std->td.td_flags), 1878 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 1879 sbuf, sizeof(sbuf)); 1880 1881 printf("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx " 1882 "nexttd=0x%08lx be=0x%08lx\n", 1883 std, (u_long)std->physaddr, sbuf, 1884 OHCI_TD_GET_DI(le32toh(std->td.td_flags)), 1885 OHCI_TD_GET_EC(le32toh(std->td.td_flags)), 1886 OHCI_TD_GET_CC(le32toh(std->td.td_flags)), 1887 (u_long)le32toh(std->td.td_cbp), 1888 (u_long)le32toh(std->td.td_nexttd), 1889 (u_long)le32toh(std->td.td_be)); 1890 } 1891 1892 void 1893 ohci_dump_itd(ohci_soft_itd_t *sitd) 1894 { 1895 int i; 1896 1897 printf("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n" 1898 "bp0=0x%08lx next=0x%08lx be=0x%08lx\n", 1899 sitd, (u_long)sitd->physaddr, 1900 OHCI_ITD_GET_SF(le32toh(sitd->itd.itd_flags)), 1901 OHCI_ITD_GET_DI(le32toh(sitd->itd.itd_flags)), 1902 OHCI_ITD_GET_FC(le32toh(sitd->itd.itd_flags)), 1903 OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags)), 1904 (u_long)le32toh(sitd->itd.itd_bp0), 1905 (u_long)le32toh(sitd->itd.itd_nextitd), 1906 (u_long)le32toh(sitd->itd.itd_be)); 1907 for (i = 0; i < OHCI_ITD_NOFFSET; i++) 1908 printf("offs[%d]=0x%04x ", i, 1909 (u_int)le16toh(sitd->itd.itd_offset[i])); 1910 printf("\n"); 1911 } 1912 1913 void 1914 ohci_dump_itds(ohci_soft_itd_t *sitd) 1915 { 1916 for (; sitd; sitd = sitd->nextitd) 1917 ohci_dump_itd(sitd); 1918 } 1919 1920 void 1921 ohci_dump_ed(ohci_soft_ed_t *sed) 1922 { 1923 char sbuf[128], sbuf2[128]; 1924 1925 bitmask_snprintf((u_int32_t)le32toh(sed->ed.ed_flags), 1926 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO", 1927 sbuf, sizeof(sbuf)); 1928 bitmask_snprintf((u_int32_t)le32toh(sed->ed.ed_headp), 1929 "\20\1HALT\2CARRY", sbuf2, sizeof(sbuf2)); 1930 1931 printf("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d flags=%s\ntailp=0x%08lx " 1932 "headflags=%s headp=0x%08lx nexted=0x%08lx\n", 1933 sed, (u_long)sed->physaddr, 1934 OHCI_ED_GET_FA(le32toh(sed->ed.ed_flags)), 1935 OHCI_ED_GET_EN(le32toh(sed->ed.ed_flags)), 1936 OHCI_ED_GET_MAXP(le32toh(sed->ed.ed_flags)), sbuf, 1937 (u_long)le32toh(sed->ed.ed_tailp), sbuf2, 1938 (u_long)le32toh(sed->ed.ed_headp), 1939 (u_long)le32toh(sed->ed.ed_nexted)); 1940 } 1941 #endif 1942 1943 usbd_status 1944 ohci_open(usbd_pipe_handle pipe) 1945 { 1946 usbd_device_handle dev = pipe->device; 1947 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1948 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1949 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1950 u_int8_t addr = dev->address; 1951 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1952 ohci_soft_ed_t *sed; 1953 ohci_soft_td_t *std; 1954 ohci_soft_itd_t *sitd; 1955 ohci_physaddr_t tdphys; 1956 u_int32_t fmt; 1957 usbd_status err; 1958 int s; 1959 int ival; 1960 1961 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1962 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1963 1964 if (sc->sc_dying) 1965 return (USBD_IOERROR); 1966 1967 std = NULL; 1968 sed = NULL; 1969 1970 if (addr == sc->sc_addr) { 1971 switch (ed->bEndpointAddress) { 1972 case USB_CONTROL_ENDPOINT: 1973 pipe->methods = &ohci_root_ctrl_methods; 1974 break; 1975 case UE_DIR_IN | OHCI_INTR_ENDPT: 1976 pipe->methods = &ohci_root_intr_methods; 1977 break; 1978 default: 1979 return (USBD_INVAL); 1980 } 1981 } else { 1982 sed = ohci_alloc_sed(sc); 1983 if (sed == NULL) 1984 goto bad0; 1985 opipe->sed = sed; 1986 if (xfertype == UE_ISOCHRONOUS) { 1987 sitd = ohci_alloc_sitd(sc); 1988 if (sitd == NULL) { 1989 ohci_free_sitd(sc, sitd); 1990 goto bad1; 1991 } 1992 opipe->tail.itd = sitd; 1993 tdphys = sitd->physaddr; 1994 fmt = OHCI_ED_FORMAT_ISO; 1995 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 1996 fmt |= OHCI_ED_DIR_IN; 1997 else 1998 fmt |= OHCI_ED_DIR_OUT; 1999 } else { 2000 std = ohci_alloc_std(sc); 2001 if (std == NULL) { 2002 ohci_free_std(sc, std); 2003 goto bad1; 2004 } 2005 opipe->tail.td = std; 2006 tdphys = std->physaddr; 2007 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD; 2008 } 2009 sed->ed.ed_flags = htole32( 2010 OHCI_ED_SET_FA(addr) | 2011 OHCI_ED_SET_EN(ed->bEndpointAddress) | 2012 (dev->speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) | 2013 fmt | 2014 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 2015 sed->ed.ed_headp = sed->ed.ed_tailp = htole32(tdphys); 2016 2017 switch (xfertype) { 2018 case UE_CONTROL: 2019 pipe->methods = &ohci_device_ctrl_methods; 2020 err = usb_allocmem(&sc->sc_bus, 2021 sizeof(usb_device_request_t), 2022 0, &opipe->u.ctl.reqdma); 2023 if (err) 2024 goto bad; 2025 s = splusb(); 2026 ohci_add_ed(sed, sc->sc_ctrl_head); 2027 splx(s); 2028 break; 2029 case UE_INTERRUPT: 2030 pipe->methods = &ohci_device_intr_methods; 2031 ival = pipe->interval; 2032 if (ival == USBD_DEFAULT_INTERVAL) 2033 ival = ed->bInterval; 2034 return (ohci_device_setintr(sc, opipe, ival)); 2035 case UE_ISOCHRONOUS: 2036 pipe->methods = &ohci_device_isoc_methods; 2037 return (ohci_setup_isoc(pipe)); 2038 case UE_BULK: 2039 pipe->methods = &ohci_device_bulk_methods; 2040 s = splusb(); 2041 ohci_add_ed(sed, sc->sc_bulk_head); 2042 splx(s); 2043 break; 2044 } 2045 } 2046 return (USBD_NORMAL_COMPLETION); 2047 2048 bad: 2049 if (std != NULL) 2050 ohci_free_std(sc, std); 2051 bad1: 2052 if (sed != NULL) 2053 ohci_free_sed(sc, sed); 2054 bad0: 2055 return (USBD_NOMEM); 2056 2057 } 2058 2059 /* 2060 * Close a reqular pipe. 2061 * Assumes that there are no pending transactions. 2062 */ 2063 void 2064 ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head) 2065 { 2066 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2067 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2068 ohci_soft_ed_t *sed = opipe->sed; 2069 int s; 2070 2071 s = splusb(); 2072 #ifdef DIAGNOSTIC 2073 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 2074 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2075 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) { 2076 ohci_soft_td_t *std; 2077 std = ohci_hash_find_td(sc, le32toh(sed->ed.ed_headp)); 2078 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 2079 "tl=0x%x pipe=%p, std=%p\n", sed, 2080 (int)le32toh(sed->ed.ed_headp), 2081 (int)le32toh(sed->ed.ed_tailp), 2082 pipe, std); 2083 #ifdef USB_DEBUG 2084 usbd_dump_pipe(&opipe->pipe); 2085 #endif 2086 #ifdef OHCI_DEBUG 2087 ohci_dump_ed(sed); 2088 if (std) 2089 ohci_dump_td(std); 2090 #endif 2091 usb_delay_ms(&sc->sc_bus, 2); 2092 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2093 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) 2094 printf("ohci_close_pipe: pipe still not empty\n"); 2095 } 2096 #endif 2097 ohci_rem_ed(sed, head); 2098 splx(s); 2099 ohci_free_sed(sc, opipe->sed); 2100 } 2101 2102 /* 2103 * Abort a device request. 2104 * If this routine is called at splusb() it guarantees that the request 2105 * will be removed from the hardware scheduling and that the callback 2106 * for it will be called with USBD_CANCELLED status. 2107 * It's impossible to guarantee that the requested transfer will not 2108 * have happened since the hardware runs concurrently. 2109 * If the transaction has already happened we rely on the ordinary 2110 * interrupt processing to process it. 2111 */ 2112 void 2113 ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2114 { 2115 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2116 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 2117 ohci_soft_ed_t *sed = opipe->sed; 2118 ohci_soft_td_t *p, *n; 2119 ohci_physaddr_t headp; 2120 int s, hit; 2121 2122 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p sed=%p\n", xfer, opipe,sed)); 2123 2124 if (sc->sc_dying) { 2125 /* If we're dying, just do the software part. */ 2126 s = splusb(); 2127 xfer->status = status; /* make software ignore it */ 2128 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2129 usb_transfer_complete(xfer); 2130 splx(s); 2131 } 2132 2133 if (xfer->device->bus->intr_context || !curproc) 2134 panic("ohci_abort_xfer: not in process context\n"); 2135 2136 /* 2137 * Step 1: Make interrupt routine and hardware ignore xfer. 2138 */ 2139 s = splusb(); 2140 xfer->status = status; /* make software ignore it */ 2141 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 2142 splx(s); 2143 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed)); 2144 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 2145 2146 /* 2147 * Step 2: Wait until we know hardware has finished any possible 2148 * use of the xfer. Also make sure the soft interrupt routine 2149 * has run. 2150 */ 2151 usb_delay_ms(opipe->pipe.device->bus, 1); /* Hardware finishes in 1ms */ 2152 /* XXX should have some communication with softintr() to know 2153 when it's done */ 2154 usb_delay_ms(opipe->pipe.device->bus, 250); 2155 2156 /* 2157 * Step 3: Remove any vestiges of the xfer from the hardware. 2158 * The complication here is that the hardware may have executed 2159 * beyond the xfer we're trying to abort. So as we're scanning 2160 * the TDs of this xfer we check if the hardware points to 2161 * any of them. 2162 */ 2163 s = splusb(); /* XXX why? */ 2164 p = xfer->hcpriv; 2165 #ifdef DIAGNOSTIC 2166 if (p == NULL) { 2167 splx(s); 2168 printf("ohci_abort_xfer: hcpriv is NULL\n"); 2169 return; 2170 } 2171 #endif 2172 #ifdef OHCI_DEBUG 2173 if (ohcidebug > 1) { 2174 DPRINTF(("ohci_abort_xfer: sed=\n")); 2175 ohci_dump_ed(sed); 2176 ohci_dump_tds(p); 2177 } 2178 #endif 2179 headp = le32toh(sed->ed.ed_headp) & OHCI_HEADMASK; 2180 hit = 0; 2181 for (; p->xfer == xfer; p = n) { 2182 hit |= headp == p->physaddr; 2183 n = p->nexttd; 2184 ohci_free_std(sc, p); 2185 } 2186 /* Zap headp register if hardware pointed inside the xfer. */ 2187 if (hit) { 2188 DPRINTFN(1,("ohci_abort_xfer: set hd=0x08%x, tl=0x%08x\n", 2189 (int)p->physaddr, (int)le32toh(sed->ed.ed_tailp))); 2190 sed->ed.ed_headp = htole32(p->physaddr); /* unlink TDs */ 2191 } else { 2192 DPRINTFN(1,("ohci_abort_xfer: no hit\n")); 2193 } 2194 2195 /* 2196 * Step 4: Turn on hardware again. 2197 */ 2198 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 2199 2200 /* 2201 * Step 5: Execute callback. 2202 */ 2203 usb_transfer_complete(xfer); 2204 2205 splx(s); 2206 } 2207 2208 /* 2209 * Data structures and routines to emulate the root hub. 2210 */ 2211 Static usb_device_descriptor_t ohci_devd = { 2212 USB_DEVICE_DESCRIPTOR_SIZE, 2213 UDESC_DEVICE, /* type */ 2214 {0x00, 0x01}, /* USB version */ 2215 UDCLASS_HUB, /* class */ 2216 UDSUBCLASS_HUB, /* subclass */ 2217 UDPROTO_FSHUB, 2218 64, /* max packet */ 2219 {0},{0},{0x00,0x01}, /* device id */ 2220 1,2,0, /* string indicies */ 2221 1 /* # of configurations */ 2222 }; 2223 2224 Static usb_config_descriptor_t ohci_confd = { 2225 USB_CONFIG_DESCRIPTOR_SIZE, 2226 UDESC_CONFIG, 2227 {USB_CONFIG_DESCRIPTOR_SIZE + 2228 USB_INTERFACE_DESCRIPTOR_SIZE + 2229 USB_ENDPOINT_DESCRIPTOR_SIZE}, 2230 1, 2231 1, 2232 0, 2233 UC_SELF_POWERED, 2234 0 /* max power */ 2235 }; 2236 2237 Static usb_interface_descriptor_t ohci_ifcd = { 2238 USB_INTERFACE_DESCRIPTOR_SIZE, 2239 UDESC_INTERFACE, 2240 0, 2241 0, 2242 1, 2243 UICLASS_HUB, 2244 UISUBCLASS_HUB, 2245 UIPROTO_FSHUB, 2246 0 2247 }; 2248 2249 Static usb_endpoint_descriptor_t ohci_endpd = { 2250 USB_ENDPOINT_DESCRIPTOR_SIZE, 2251 UDESC_ENDPOINT, 2252 UE_DIR_IN | OHCI_INTR_ENDPT, 2253 UE_INTERRUPT, 2254 {8, 0}, /* max packet */ 2255 255 2256 }; 2257 2258 Static usb_hub_descriptor_t ohci_hubd = { 2259 USB_HUB_DESCRIPTOR_SIZE, 2260 UDESC_HUB, 2261 0, 2262 {0,0}, 2263 0, 2264 0, 2265 {0}, 2266 }; 2267 2268 Static int 2269 ohci_str(p, l, s) 2270 usb_string_descriptor_t *p; 2271 int l; 2272 char *s; 2273 { 2274 int i; 2275 2276 if (l == 0) 2277 return (0); 2278 p->bLength = 2 * strlen(s) + 2; 2279 if (l == 1) 2280 return (1); 2281 p->bDescriptorType = UDESC_STRING; 2282 l -= 2; 2283 for (i = 0; s[i] && l > 1; i++, l -= 2) 2284 USETW2(p->bString[i], 0, s[i]); 2285 return (2*i+2); 2286 } 2287 2288 /* 2289 * Simulate a hardware hub by handling all the necessary requests. 2290 */ 2291 Static usbd_status 2292 ohci_root_ctrl_transfer(usbd_xfer_handle xfer) 2293 { 2294 usbd_status err; 2295 2296 /* Insert last in queue. */ 2297 err = usb_insert_transfer(xfer); 2298 if (err) 2299 return (err); 2300 2301 /* Pipe isn't running, start first */ 2302 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2303 } 2304 2305 Static usbd_status 2306 ohci_root_ctrl_start(usbd_xfer_handle xfer) 2307 { 2308 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2309 usb_device_request_t *req; 2310 void *buf = NULL; 2311 int port, i; 2312 int s, len, value, index, l, totlen = 0; 2313 usb_port_status_t ps; 2314 usb_hub_descriptor_t hubd; 2315 usbd_status err; 2316 u_int32_t v; 2317 2318 if (sc->sc_dying) 2319 return (USBD_IOERROR); 2320 2321 #ifdef DIAGNOSTIC 2322 if (!(xfer->rqflags & URQ_REQUEST)) 2323 /* XXX panic */ 2324 return (USBD_INVAL); 2325 #endif 2326 req = &xfer->request; 2327 2328 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 2329 req->bmRequestType, req->bRequest)); 2330 2331 len = UGETW(req->wLength); 2332 value = UGETW(req->wValue); 2333 index = UGETW(req->wIndex); 2334 2335 if (len != 0) 2336 buf = KERNADDR(&xfer->dmabuf); 2337 2338 #define C(x,y) ((x) | ((y) << 8)) 2339 switch(C(req->bRequest, req->bmRequestType)) { 2340 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 2341 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 2342 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 2343 /* 2344 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 2345 * for the integrated root hub. 2346 */ 2347 break; 2348 case C(UR_GET_CONFIG, UT_READ_DEVICE): 2349 if (len > 0) { 2350 *(u_int8_t *)buf = sc->sc_conf; 2351 totlen = 1; 2352 } 2353 break; 2354 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2355 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 2356 switch(value >> 8) { 2357 case UDESC_DEVICE: 2358 if ((value & 0xff) != 0) { 2359 err = USBD_IOERROR; 2360 goto ret; 2361 } 2362 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 2363 USETW(ohci_devd.idVendor, sc->sc_id_vendor); 2364 memcpy(buf, &ohci_devd, l); 2365 break; 2366 case UDESC_CONFIG: 2367 if ((value & 0xff) != 0) { 2368 err = USBD_IOERROR; 2369 goto ret; 2370 } 2371 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 2372 memcpy(buf, &ohci_confd, l); 2373 buf = (char *)buf + l; 2374 len -= l; 2375 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 2376 totlen += l; 2377 memcpy(buf, &ohci_ifcd, l); 2378 buf = (char *)buf + l; 2379 len -= l; 2380 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 2381 totlen += l; 2382 memcpy(buf, &ohci_endpd, l); 2383 break; 2384 case UDESC_STRING: 2385 if (len == 0) 2386 break; 2387 *(u_int8_t *)buf = 0; 2388 totlen = 1; 2389 switch (value & 0xff) { 2390 case 1: /* Vendor */ 2391 totlen = ohci_str(buf, len, sc->sc_vendor); 2392 break; 2393 case 2: /* Product */ 2394 totlen = ohci_str(buf, len, "OHCI root hub"); 2395 break; 2396 } 2397 break; 2398 default: 2399 err = USBD_IOERROR; 2400 goto ret; 2401 } 2402 break; 2403 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 2404 if (len > 0) { 2405 *(u_int8_t *)buf = 0; 2406 totlen = 1; 2407 } 2408 break; 2409 case C(UR_GET_STATUS, UT_READ_DEVICE): 2410 if (len > 1) { 2411 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 2412 totlen = 2; 2413 } 2414 break; 2415 case C(UR_GET_STATUS, UT_READ_INTERFACE): 2416 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 2417 if (len > 1) { 2418 USETW(((usb_status_t *)buf)->wStatus, 0); 2419 totlen = 2; 2420 } 2421 break; 2422 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 2423 if (value >= USB_MAX_DEVICES) { 2424 err = USBD_IOERROR; 2425 goto ret; 2426 } 2427 sc->sc_addr = value; 2428 break; 2429 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 2430 if (value != 0 && value != 1) { 2431 err = USBD_IOERROR; 2432 goto ret; 2433 } 2434 sc->sc_conf = value; 2435 break; 2436 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 2437 break; 2438 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 2439 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 2440 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 2441 err = USBD_IOERROR; 2442 goto ret; 2443 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 2444 break; 2445 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 2446 break; 2447 /* Hub requests */ 2448 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2449 break; 2450 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2451 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 2452 "port=%d feature=%d\n", 2453 index, value)); 2454 if (index < 1 || index > sc->sc_noport) { 2455 err = USBD_IOERROR; 2456 goto ret; 2457 } 2458 port = OHCI_RH_PORT_STATUS(index); 2459 switch(value) { 2460 case UHF_PORT_ENABLE: 2461 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2462 break; 2463 case UHF_PORT_SUSPEND: 2464 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2465 break; 2466 case UHF_PORT_POWER: 2467 /* Yes, writing to the LOW_SPEED bit clears power. */ 2468 OWRITE4(sc, port, UPS_LOW_SPEED); 2469 break; 2470 case UHF_C_PORT_CONNECTION: 2471 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2472 break; 2473 case UHF_C_PORT_ENABLE: 2474 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2475 break; 2476 case UHF_C_PORT_SUSPEND: 2477 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2478 break; 2479 case UHF_C_PORT_OVER_CURRENT: 2480 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2481 break; 2482 case UHF_C_PORT_RESET: 2483 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2484 break; 2485 default: 2486 err = USBD_IOERROR; 2487 goto ret; 2488 } 2489 switch(value) { 2490 case UHF_C_PORT_CONNECTION: 2491 case UHF_C_PORT_ENABLE: 2492 case UHF_C_PORT_SUSPEND: 2493 case UHF_C_PORT_OVER_CURRENT: 2494 case UHF_C_PORT_RESET: 2495 /* Enable RHSC interrupt if condition is cleared. */ 2496 if ((OREAD4(sc, port) >> 16) == 0) 2497 ohci_rhsc_able(sc, 1); 2498 break; 2499 default: 2500 break; 2501 } 2502 break; 2503 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2504 if (value != 0) { 2505 err = USBD_IOERROR; 2506 goto ret; 2507 } 2508 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2509 hubd = ohci_hubd; 2510 hubd.bNbrPorts = sc->sc_noport; 2511 USETW(hubd.wHubCharacteristics, 2512 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2513 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2514 /* XXX overcurrent */ 2515 ); 2516 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2517 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2518 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2519 hubd.DeviceRemovable[i++] = (u_int8_t)v; 2520 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2521 l = min(len, hubd.bDescLength); 2522 totlen = l; 2523 memcpy(buf, &hubd, l); 2524 break; 2525 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2526 if (len != 4) { 2527 err = USBD_IOERROR; 2528 goto ret; 2529 } 2530 memset(buf, 0, len); /* ? XXX */ 2531 totlen = len; 2532 break; 2533 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2534 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 2535 index)); 2536 if (index < 1 || index > sc->sc_noport) { 2537 err = USBD_IOERROR; 2538 goto ret; 2539 } 2540 if (len != 4) { 2541 err = USBD_IOERROR; 2542 goto ret; 2543 } 2544 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2545 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 2546 v)); 2547 USETW(ps.wPortStatus, v); 2548 USETW(ps.wPortChange, v >> 16); 2549 l = min(len, sizeof ps); 2550 memcpy(buf, &ps, l); 2551 totlen = l; 2552 break; 2553 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2554 err = USBD_IOERROR; 2555 goto ret; 2556 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2557 break; 2558 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2559 if (index < 1 || index > sc->sc_noport) { 2560 err = USBD_IOERROR; 2561 goto ret; 2562 } 2563 port = OHCI_RH_PORT_STATUS(index); 2564 switch(value) { 2565 case UHF_PORT_ENABLE: 2566 OWRITE4(sc, port, UPS_PORT_ENABLED); 2567 break; 2568 case UHF_PORT_SUSPEND: 2569 OWRITE4(sc, port, UPS_SUSPEND); 2570 break; 2571 case UHF_PORT_RESET: 2572 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 2573 index)); 2574 OWRITE4(sc, port, UPS_RESET); 2575 for (i = 0; i < 5; i++) { 2576 usb_delay_ms(&sc->sc_bus, 2577 USB_PORT_ROOT_RESET_DELAY); 2578 if (sc->sc_dying) { 2579 err = USBD_IOERROR; 2580 goto ret; 2581 } 2582 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2583 break; 2584 } 2585 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 2586 index, OREAD4(sc, port))); 2587 break; 2588 case UHF_PORT_POWER: 2589 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 2590 "%d\n", index)); 2591 OWRITE4(sc, port, UPS_PORT_POWER); 2592 break; 2593 default: 2594 err = USBD_IOERROR; 2595 goto ret; 2596 } 2597 break; 2598 default: 2599 err = USBD_IOERROR; 2600 goto ret; 2601 } 2602 xfer->actlen = totlen; 2603 err = USBD_NORMAL_COMPLETION; 2604 ret: 2605 xfer->status = err; 2606 s = splusb(); 2607 usb_transfer_complete(xfer); 2608 splx(s); 2609 return (USBD_IN_PROGRESS); 2610 } 2611 2612 /* Abort a root control request. */ 2613 Static void 2614 ohci_root_ctrl_abort(usbd_xfer_handle xfer) 2615 { 2616 /* Nothing to do, all transfers are synchronous. */ 2617 } 2618 2619 /* Close the root pipe. */ 2620 Static void 2621 ohci_root_ctrl_close(usbd_pipe_handle pipe) 2622 { 2623 DPRINTF(("ohci_root_ctrl_close\n")); 2624 /* Nothing to do. */ 2625 } 2626 2627 Static usbd_status 2628 ohci_root_intr_transfer(usbd_xfer_handle xfer) 2629 { 2630 usbd_status err; 2631 2632 /* Insert last in queue. */ 2633 err = usb_insert_transfer(xfer); 2634 if (err) 2635 return (err); 2636 2637 /* Pipe isn't running, start first */ 2638 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2639 } 2640 2641 Static usbd_status 2642 ohci_root_intr_start(usbd_xfer_handle xfer) 2643 { 2644 usbd_pipe_handle pipe = xfer->pipe; 2645 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2646 2647 if (sc->sc_dying) 2648 return (USBD_IOERROR); 2649 2650 sc->sc_intrxfer = xfer; 2651 2652 return (USBD_IN_PROGRESS); 2653 } 2654 2655 /* Abort a root interrupt request. */ 2656 Static void 2657 ohci_root_intr_abort(usbd_xfer_handle xfer) 2658 { 2659 int s; 2660 2661 if (xfer->pipe->intrxfer == xfer) { 2662 DPRINTF(("ohci_root_intr_abort: remove\n")); 2663 xfer->pipe->intrxfer = NULL; 2664 } 2665 xfer->status = USBD_CANCELLED; 2666 s = splusb(); 2667 usb_transfer_complete(xfer); 2668 splx(s); 2669 } 2670 2671 /* Close the root pipe. */ 2672 Static void 2673 ohci_root_intr_close(usbd_pipe_handle pipe) 2674 { 2675 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2676 2677 DPRINTF(("ohci_root_intr_close\n")); 2678 2679 sc->sc_intrxfer = NULL; 2680 } 2681 2682 /************************/ 2683 2684 Static usbd_status 2685 ohci_device_ctrl_transfer(usbd_xfer_handle xfer) 2686 { 2687 usbd_status err; 2688 2689 /* Insert last in queue. */ 2690 err = usb_insert_transfer(xfer); 2691 if (err) 2692 return (err); 2693 2694 /* Pipe isn't running, start first */ 2695 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2696 } 2697 2698 Static usbd_status 2699 ohci_device_ctrl_start(usbd_xfer_handle xfer) 2700 { 2701 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2702 usbd_status err; 2703 2704 if (sc->sc_dying) 2705 return (USBD_IOERROR); 2706 2707 #ifdef DIAGNOSTIC 2708 if (!(xfer->rqflags & URQ_REQUEST)) { 2709 /* XXX panic */ 2710 printf("ohci_device_ctrl_transfer: not a request\n"); 2711 return (USBD_INVAL); 2712 } 2713 #endif 2714 2715 err = ohci_device_request(xfer); 2716 if (err) 2717 return (err); 2718 2719 if (sc->sc_bus.use_polling) 2720 ohci_waitintr(sc, xfer); 2721 return (USBD_IN_PROGRESS); 2722 } 2723 2724 /* Abort a device control request. */ 2725 Static void 2726 ohci_device_ctrl_abort(usbd_xfer_handle xfer) 2727 { 2728 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer)); 2729 ohci_abort_xfer(xfer, USBD_CANCELLED); 2730 } 2731 2732 /* Close a device control pipe. */ 2733 Static void 2734 ohci_device_ctrl_close(usbd_pipe_handle pipe) 2735 { 2736 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2737 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2738 2739 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe)); 2740 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2741 ohci_free_std(sc, opipe->tail.td); 2742 } 2743 2744 /************************/ 2745 2746 Static void 2747 ohci_device_clear_toggle(usbd_pipe_handle pipe) 2748 { 2749 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2750 2751 opipe->sed->ed.ed_headp &= htole32(~OHCI_TOGGLECARRY); 2752 } 2753 2754 Static void 2755 ohci_noop(usbd_pipe_handle pipe) 2756 { 2757 } 2758 2759 Static usbd_status 2760 ohci_device_bulk_transfer(usbd_xfer_handle xfer) 2761 { 2762 usbd_status err; 2763 2764 /* Insert last in queue. */ 2765 err = usb_insert_transfer(xfer); 2766 if (err) 2767 return (err); 2768 2769 /* Pipe isn't running, start first */ 2770 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2771 } 2772 2773 Static usbd_status 2774 ohci_device_bulk_start(usbd_xfer_handle xfer) 2775 { 2776 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2777 usbd_device_handle dev = opipe->pipe.device; 2778 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2779 int addr = dev->address; 2780 ohci_soft_td_t *data, *tail, *tdp; 2781 ohci_soft_ed_t *sed; 2782 int s, len, isread, endpt; 2783 usbd_status err; 2784 2785 if (sc->sc_dying) 2786 return (USBD_IOERROR); 2787 2788 #ifdef DIAGNOSTIC 2789 if (xfer->rqflags & URQ_REQUEST) { 2790 /* XXX panic */ 2791 printf("ohci_device_bulk_start: a request\n"); 2792 return (USBD_INVAL); 2793 } 2794 #endif 2795 2796 len = xfer->length; 2797 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 2798 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2799 sed = opipe->sed; 2800 2801 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d " 2802 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags, 2803 endpt)); 2804 2805 opipe->u.bulk.isread = isread; 2806 opipe->u.bulk.length = len; 2807 2808 /* Update device address */ 2809 sed->ed.ed_flags = htole32( 2810 (le32toh(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) | 2811 OHCI_ED_SET_FA(addr)); 2812 2813 /* Allocate a chain of new TDs (including a new tail). */ 2814 data = opipe->tail.td; 2815 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 2816 data, &tail); 2817 /* We want interrupt at the end of the transfer. */ 2818 tail->td.td_flags &= htole32(~OHCI_TD_INTR_MASK); 2819 tail->td.td_flags |= htole32(OHCI_TD_SET_DI(1)); 2820 tail->flags |= OHCI_CALL_DONE; 2821 tail = tail->nexttd; /* point at sentinel */ 2822 if (err) 2823 return (err); 2824 2825 tail->xfer = NULL; 2826 xfer->hcpriv = data; 2827 2828 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x " 2829 "td_cbp=0x%08x td_be=0x%08x\n", 2830 (int)le32toh(sed->ed.ed_flags), 2831 (int)le32toh(data->td.td_flags), 2832 (int)le32toh(data->td.td_cbp), 2833 (int)le32toh(data->td.td_be))); 2834 2835 #ifdef OHCI_DEBUG 2836 if (ohcidebug > 5) { 2837 ohci_dump_ed(sed); 2838 ohci_dump_tds(data); 2839 } 2840 #endif 2841 2842 /* Insert ED in schedule */ 2843 s = splusb(); 2844 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 2845 tdp->xfer = xfer; 2846 } 2847 sed->ed.ed_tailp = htole32(tail->physaddr); 2848 opipe->tail.td = tail; 2849 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 2850 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 2851 if (xfer->timeout && !sc->sc_bus.use_polling) { 2852 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout), 2853 ohci_timeout, xfer); 2854 } 2855 2856 #if 0 2857 /* This goes wrong if we are too slow. */ 2858 if (ohcidebug > 10) { 2859 delay(10000); 2860 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2861 OREAD4(sc, OHCI_COMMAND_STATUS))); 2862 ohci_dump_ed(sed); 2863 ohci_dump_tds(data); 2864 } 2865 #endif 2866 2867 splx(s); 2868 2869 return (USBD_IN_PROGRESS); 2870 } 2871 2872 Static void 2873 ohci_device_bulk_abort(usbd_xfer_handle xfer) 2874 { 2875 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer)); 2876 ohci_abort_xfer(xfer, USBD_CANCELLED); 2877 } 2878 2879 /* 2880 * Close a device bulk pipe. 2881 */ 2882 Static void 2883 ohci_device_bulk_close(usbd_pipe_handle pipe) 2884 { 2885 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2886 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2887 2888 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe)); 2889 ohci_close_pipe(pipe, sc->sc_bulk_head); 2890 ohci_free_std(sc, opipe->tail.td); 2891 } 2892 2893 /************************/ 2894 2895 Static usbd_status 2896 ohci_device_intr_transfer(usbd_xfer_handle xfer) 2897 { 2898 usbd_status err; 2899 2900 /* Insert last in queue. */ 2901 err = usb_insert_transfer(xfer); 2902 if (err) 2903 return (err); 2904 2905 /* Pipe isn't running, start first */ 2906 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2907 } 2908 2909 Static usbd_status 2910 ohci_device_intr_start(usbd_xfer_handle xfer) 2911 { 2912 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2913 usbd_device_handle dev = opipe->pipe.device; 2914 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2915 ohci_soft_ed_t *sed = opipe->sed; 2916 ohci_soft_td_t *data, *tail; 2917 int len; 2918 int s; 2919 2920 if (sc->sc_dying) 2921 return (USBD_IOERROR); 2922 2923 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d " 2924 "flags=%d priv=%p\n", 2925 xfer, xfer->length, xfer->flags, xfer->priv)); 2926 2927 #ifdef DIAGNOSTIC 2928 if (xfer->rqflags & URQ_REQUEST) 2929 panic("ohci_device_intr_transfer: a request\n"); 2930 #endif 2931 2932 len = xfer->length; 2933 2934 data = opipe->tail.td; 2935 tail = ohci_alloc_std(sc); 2936 if (tail == NULL) 2937 return (USBD_NOMEM); 2938 tail->xfer = NULL; 2939 2940 data->td.td_flags = htole32( 2941 OHCI_TD_IN | OHCI_TD_NOCC | 2942 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 2943 if (xfer->flags & USBD_SHORT_XFER_OK) 2944 data->td.td_flags |= htole32(OHCI_TD_R); 2945 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf)); 2946 data->nexttd = tail; 2947 data->td.td_nexttd = htole32(tail->physaddr); 2948 data->td.td_be = htole32(le32toh(data->td.td_cbp) + len - 1); 2949 data->len = len; 2950 data->xfer = xfer; 2951 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 2952 xfer->hcpriv = data; 2953 2954 #ifdef OHCI_DEBUG 2955 if (ohcidebug > 5) { 2956 DPRINTF(("ohci_device_intr_transfer:\n")); 2957 ohci_dump_ed(sed); 2958 ohci_dump_tds(data); 2959 } 2960 #endif 2961 2962 /* Insert ED in schedule */ 2963 s = splusb(); 2964 sed->ed.ed_tailp = htole32(tail->physaddr); 2965 opipe->tail.td = tail; 2966 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 2967 2968 #if 0 2969 /* 2970 * This goes horribly wrong, printing thousands of descriptors, 2971 * because false references are followed due to the fact that the 2972 * TD is gone. 2973 */ 2974 if (ohcidebug > 5) { 2975 usb_delay_ms(&sc->sc_bus, 5); 2976 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2977 OREAD4(sc, OHCI_COMMAND_STATUS))); 2978 ohci_dump_ed(sed); 2979 ohci_dump_tds(data); 2980 } 2981 #endif 2982 splx(s); 2983 2984 return (USBD_IN_PROGRESS); 2985 } 2986 2987 /* Abort a device control request. */ 2988 Static void 2989 ohci_device_intr_abort(usbd_xfer_handle xfer) 2990 { 2991 if (xfer->pipe->intrxfer == xfer) { 2992 DPRINTF(("ohci_device_intr_abort: remove\n")); 2993 xfer->pipe->intrxfer = NULL; 2994 } 2995 ohci_abort_xfer(xfer, USBD_CANCELLED); 2996 } 2997 2998 /* Close a device interrupt pipe. */ 2999 Static void 3000 ohci_device_intr_close(usbd_pipe_handle pipe) 3001 { 3002 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3003 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3004 int nslots = opipe->u.intr.nslots; 3005 int pos = opipe->u.intr.pos; 3006 int j; 3007 ohci_soft_ed_t *p, *sed = opipe->sed; 3008 int s; 3009 3010 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 3011 pipe, nslots, pos)); 3012 s = splusb(); 3013 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 3014 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 3015 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) 3016 usb_delay_ms(&sc->sc_bus, 2); 3017 3018 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 3019 ; 3020 #ifdef DIAGNOSTIC 3021 if (p == NULL) 3022 panic("ohci_device_intr_close: ED not found\n"); 3023 #endif 3024 p->next = sed->next; 3025 p->ed.ed_nexted = sed->ed.ed_nexted; 3026 splx(s); 3027 3028 for (j = 0; j < nslots; j++) 3029 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 3030 3031 ohci_free_std(sc, opipe->tail.td); 3032 ohci_free_sed(sc, opipe->sed); 3033 } 3034 3035 Static usbd_status 3036 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival) 3037 { 3038 int i, j, s, best; 3039 u_int npoll, slow, shigh, nslots; 3040 u_int bestbw, bw; 3041 ohci_soft_ed_t *hsed, *sed = opipe->sed; 3042 3043 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 3044 if (ival == 0) { 3045 printf("ohci_setintr: 0 interval\n"); 3046 return (USBD_INVAL); 3047 } 3048 3049 npoll = OHCI_NO_INTRS; 3050 while (npoll > ival) 3051 npoll /= 2; 3052 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 3053 3054 /* 3055 * We now know which level in the tree the ED must go into. 3056 * Figure out which slot has most bandwidth left over. 3057 * Slots to examine: 3058 * npoll 3059 * 1 0 3060 * 2 1 2 3061 * 4 3 4 5 6 3062 * 8 7 8 9 10 11 12 13 14 3063 * N (N-1) .. (N-1+N-1) 3064 */ 3065 slow = npoll-1; 3066 shigh = slow + npoll; 3067 nslots = OHCI_NO_INTRS / npoll; 3068 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 3069 bw = 0; 3070 for (j = 0; j < nslots; j++) 3071 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 3072 if (bw < bestbw) { 3073 best = i; 3074 bestbw = bw; 3075 } 3076 } 3077 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 3078 best, slow, shigh, bestbw)); 3079 3080 s = splusb(); 3081 hsed = sc->sc_eds[best]; 3082 sed->next = hsed->next; 3083 sed->ed.ed_nexted = hsed->ed.ed_nexted; 3084 hsed->next = sed; 3085 hsed->ed.ed_nexted = htole32(sed->physaddr); 3086 splx(s); 3087 3088 for (j = 0; j < nslots; j++) 3089 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 3090 opipe->u.intr.nslots = nslots; 3091 opipe->u.intr.pos = best; 3092 3093 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 3094 return (USBD_NORMAL_COMPLETION); 3095 } 3096 3097 /***********************/ 3098 3099 usbd_status 3100 ohci_device_isoc_transfer(usbd_xfer_handle xfer) 3101 { 3102 usbd_status err; 3103 3104 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer)); 3105 3106 /* Put it on our queue, */ 3107 err = usb_insert_transfer(xfer); 3108 3109 /* bail out on error, */ 3110 if (err && err != USBD_IN_PROGRESS) 3111 return (err); 3112 3113 /* XXX should check inuse here */ 3114 3115 /* insert into schedule, */ 3116 ohci_device_isoc_enter(xfer); 3117 3118 /* and start if the pipe wasn't running */ 3119 if (!err) 3120 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 3121 3122 return (err); 3123 } 3124 3125 void 3126 ohci_device_isoc_enter(usbd_xfer_handle xfer) 3127 { 3128 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3129 usbd_device_handle dev = opipe->pipe.device; 3130 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 3131 ohci_soft_ed_t *sed = opipe->sed; 3132 struct iso *iso = &opipe->u.iso; 3133 ohci_soft_itd_t *sitd, *nsitd; 3134 ohci_physaddr_t buf, offs, noffs, bp0; 3135 int i, ncur, nframes; 3136 int s; 3137 3138 DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p " 3139 "nframes=%d\n", 3140 iso->inuse, iso->next, xfer, xfer->nframes)); 3141 3142 if (sc->sc_dying) 3143 return; 3144 3145 if (iso->next == -1) { 3146 /* Not in use yet, schedule it a few frames ahead. */ 3147 iso->next = le32toh(sc->sc_hcca->hcca_frame_number) + 5; 3148 DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n", 3149 iso->next)); 3150 } 3151 3152 sitd = opipe->tail.itd; 3153 buf = DMAADDR(&xfer->dmabuf); 3154 bp0 = OHCI_PAGE(buf); 3155 offs = OHCI_PAGE_OFFSET(buf); 3156 nframes = xfer->nframes; 3157 xfer->hcpriv = sitd; 3158 for (i = ncur = 0; i < nframes; i++, ncur++) { 3159 noffs = offs + xfer->frlengths[i]; 3160 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ 3161 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */ 3162 3163 /* Allocate next ITD */ 3164 nsitd = ohci_alloc_sitd(sc); 3165 if (nsitd == NULL) { 3166 /* XXX what now? */ 3167 printf("%s: isoc TD alloc failed\n", 3168 USBDEVNAME(sc->sc_bus.bdev)); 3169 return; 3170 } 3171 3172 /* Fill current ITD */ 3173 sitd->itd.itd_flags = htole32( 3174 OHCI_ITD_NOCC | 3175 OHCI_ITD_SET_SF(iso->next) | 3176 OHCI_ITD_SET_DI(6) | /* delay intr a little */ 3177 OHCI_ITD_SET_FC(ncur)); 3178 sitd->itd.itd_bp0 = htole32(bp0); 3179 sitd->nextitd = nsitd; 3180 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 3181 sitd->itd.itd_be = htole32(bp0 + offs - 1); 3182 sitd->xfer = xfer; 3183 sitd->flags = 0; 3184 3185 sitd = nsitd; 3186 iso->next = iso->next + ncur; 3187 bp0 = OHCI_PAGE(buf + offs); 3188 ncur = 0; 3189 } 3190 sitd->itd.itd_offset[ncur] = htole16(OHCI_ITD_MK_OFFS(offs)); 3191 offs = noffs; 3192 } 3193 nsitd = ohci_alloc_sitd(sc); 3194 if (nsitd == NULL) { 3195 /* XXX what now? */ 3196 printf("%s: isoc TD alloc failed\n", 3197 USBDEVNAME(sc->sc_bus.bdev)); 3198 return; 3199 } 3200 /* Fixup last used ITD */ 3201 sitd->itd.itd_flags = htole32( 3202 OHCI_ITD_NOCC | 3203 OHCI_ITD_SET_SF(iso->next) | 3204 OHCI_ITD_SET_DI(0) | 3205 OHCI_ITD_SET_FC(ncur)); 3206 sitd->itd.itd_bp0 = htole32(bp0); 3207 sitd->nextitd = nsitd; 3208 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 3209 sitd->itd.itd_be = htole32(bp0 + offs - 1); 3210 sitd->xfer = xfer; 3211 sitd->flags = OHCI_CALL_DONE; 3212 3213 iso->next = iso->next + ncur; 3214 iso->inuse += nframes; 3215 3216 xfer->actlen = offs; /* XXX pretend we did it all */ 3217 3218 xfer->status = USBD_IN_PROGRESS; 3219 3220 #ifdef OHCI_DEBUG 3221 if (ohcidebug > 5) { 3222 DPRINTF(("ohci_device_isoc_enter: frame=%d\n", 3223 le32toh(sc->sc_hcca->hcca_frame_number))); 3224 ohci_dump_itds(xfer->hcpriv); 3225 ohci_dump_ed(sed); 3226 } 3227 #endif 3228 3229 s = splusb(); 3230 opipe->tail.itd = nsitd; 3231 sed->ed.ed_tailp = htole32(nsitd->physaddr); 3232 splx(s); 3233 3234 #ifdef OHCI_DEBUG 3235 if (ohcidebug > 5) { 3236 delay(150000); 3237 DPRINTF(("ohci_device_isoc_enter: after frame=%d\n", 3238 le32toh(sc->sc_hcca->hcca_frame_number))); 3239 ohci_dump_itds(xfer->hcpriv); 3240 ohci_dump_ed(sed); 3241 } 3242 #endif 3243 } 3244 3245 usbd_status 3246 ohci_device_isoc_start(usbd_xfer_handle xfer) 3247 { 3248 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3249 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3250 3251 DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer)); 3252 3253 if (sc->sc_dying) 3254 return (USBD_IOERROR); 3255 3256 #ifdef DIAGNOSTIC 3257 if (xfer->status != USBD_IN_PROGRESS) 3258 printf("uhci_device_isoc_start: not in progress %p\n", xfer); 3259 #endif 3260 3261 /* XXX anything to do? */ 3262 3263 return (USBD_IN_PROGRESS); 3264 } 3265 3266 void 3267 ohci_device_isoc_abort(usbd_xfer_handle xfer) 3268 { 3269 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3270 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3271 ohci_soft_ed_t *sed; 3272 ohci_soft_itd_t *sitd; 3273 int s; 3274 3275 s = splusb(); 3276 3277 DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer)); 3278 3279 /* Transfer is already done. */ 3280 if (xfer->status != USBD_NOT_STARTED && 3281 xfer->status != USBD_IN_PROGRESS) { 3282 splx(s); 3283 printf("ohci_device_isoc_abort: early return\n"); 3284 return; 3285 } 3286 3287 /* Give xfer the requested abort code. */ 3288 xfer->status = USBD_CANCELLED; 3289 3290 sed = opipe->sed; 3291 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 3292 3293 sitd = xfer->hcpriv; 3294 #ifdef DIAGNOSTIC 3295 if (sitd == NULL) { 3296 splx(s); 3297 printf("ohci_device_isoc_abort: hcpriv==0\n"); 3298 return; 3299 } 3300 #endif 3301 for (; sitd->xfer == xfer; sitd = sitd->nextitd) { 3302 #ifdef DIAGNOSTIC 3303 DPRINTFN(1,("abort sets done sitd=%p\n", sitd)); 3304 sitd->isdone = 1; 3305 #endif 3306 } 3307 3308 splx(s); 3309 3310 usb_delay_ms(&sc->sc_bus, OHCI_ITD_NOFFSET); 3311 3312 s = splusb(); 3313 3314 /* Run callback. */ 3315 usb_transfer_complete(xfer); 3316 3317 sed->ed.ed_headp = htole32(sitd->physaddr); /* unlink TDs */ 3318 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 3319 3320 splx(s); 3321 } 3322 3323 void 3324 ohci_device_isoc_done(usbd_xfer_handle xfer) 3325 { 3326 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3327 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3328 ohci_soft_itd_t *sitd, *nsitd; 3329 3330 DPRINTFN(1,("ohci_device_isoc_done: xfer=%p\n", xfer)); 3331 3332 for (sitd = xfer->hcpriv; 3333 !(sitd->flags & OHCI_CALL_DONE); 3334 sitd = nsitd) { 3335 nsitd = sitd->nextitd; 3336 DPRINTFN(1,("ohci_device_isoc_done: free sitd=%p\n", sitd)); 3337 ohci_free_sitd(sc, sitd); 3338 } 3339 ohci_free_sitd(sc, sitd); 3340 xfer->hcpriv = NULL; 3341 } 3342 3343 usbd_status 3344 ohci_setup_isoc(usbd_pipe_handle pipe) 3345 { 3346 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3347 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3348 struct iso *iso = &opipe->u.iso; 3349 int s; 3350 3351 iso->next = -1; 3352 iso->inuse = 0; 3353 3354 s = splusb(); 3355 ohci_add_ed(opipe->sed, sc->sc_isoc_head); 3356 splx(s); 3357 3358 return (USBD_NORMAL_COMPLETION); 3359 } 3360 3361 void 3362 ohci_device_isoc_close(usbd_pipe_handle pipe) 3363 { 3364 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3365 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3366 int s; 3367 3368 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe)); 3369 3370 s = splusb(); 3371 ohci_rem_ed(opipe->sed, sc->sc_isoc_head); 3372 splx(s); 3373 ohci_close_pipe(pipe, sc->sc_isoc_head); 3374 #ifdef DIAGNOSTIC 3375 opipe->tail.itd->isdone = 1; 3376 #endif 3377 ohci_free_sitd(sc, opipe->tail.itd); 3378 } 3379
Indexes created Tue Sep 23 07:09:52 GMT 2025