ohci.c revision 1.119
1 /* $NetBSD: ohci.c,v 1.119 2001/12/31 12:20:35 augustss Exp $ */ 2 /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */ 3 4 /* 5 * Copyright (c) 1998 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Lennart Augustsson (lennart (at) augustsson.net) at 10 * Carlstedt Research & Technology. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. All advertising materials mentioning features or use of this software 21 * must display the following acknowledgement: 22 * This product includes software developed by the NetBSD 23 * Foundation, Inc. and its contributors. 24 * 4. Neither the name of The NetBSD Foundation nor the names of its 25 * contributors may be used to endorse or promote products derived 26 * from this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 29 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 30 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 31 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 32 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 33 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 34 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 35 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 36 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 37 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 * POSSIBILITY OF SUCH DAMAGE. 39 */ 40 41 /* 42 * USB Open Host Controller driver. 43 * 44 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html 45 * USB spec: http://www.usb.org/developers/data/usbspec.zip 46 */ 47 48 #include <sys/cdefs.h> 49 __KERNEL_RCSID(0, "$NetBSD: ohci.c,v 1.119 2001/12/31 12:20:35 augustss Exp $"); 50 51 #include <sys/param.h> 52 #include <sys/systm.h> 53 #include <sys/malloc.h> 54 #if defined(__NetBSD__) || defined(__OpenBSD__) 55 #include <sys/kernel.h> 56 #include <sys/device.h> 57 #include <sys/select.h> 58 #elif defined(__FreeBSD__) 59 #include <sys/module.h> 60 #include <sys/bus.h> 61 #include <machine/bus_pio.h> 62 #include <machine/bus_memio.h> 63 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 64 #include <machine/cpu.h> 65 #endif 66 #endif 67 #include <sys/proc.h> 68 #include <sys/queue.h> 69 70 #include <machine/bus.h> 71 #include <machine/endian.h> 72 73 #include <dev/usb/usb.h> 74 #include <dev/usb/usbdi.h> 75 #include <dev/usb/usbdivar.h> 76 #include <dev/usb/usb_mem.h> 77 #include <dev/usb/usb_quirks.h> 78 79 #include <dev/usb/ohcireg.h> 80 #include <dev/usb/ohcivar.h> 81 82 #if defined(__FreeBSD__) 83 #include <machine/clock.h> 84 85 #define delay(d) DELAY(d) 86 #endif 87 88 #if defined(__OpenBSD__) 89 struct cfdriver ohci_cd = { 90 NULL, "ohci", DV_DULL 91 }; 92 #endif 93 94 #ifdef OHCI_DEBUG 95 #define DPRINTF(x) if (ohcidebug) logprintf x 96 #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x 97 int ohcidebug = 0; 98 #ifndef __NetBSD__ 99 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 100 #endif 101 #else 102 #define DPRINTF(x) 103 #define DPRINTFN(n,x) 104 #endif 105 106 /* 107 * The OHCI controller is little endian, so on big endian machines 108 * the data strored in memory needs to be swapped. 109 */ 110 #if defined(__FreeBSD__) || defined(__OpenBSD__) 111 #if BYTE_ORDER == BIG_ENDIAN 112 #define htole32(x) (bswap32(x)) 113 #define le32toh(x) (bswap32(x)) 114 #else 115 #define htole32(x) (x) 116 #define le32toh(x) (x) 117 #endif 118 #endif 119 120 struct ohci_pipe; 121 122 Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *); 123 Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *); 124 125 Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *); 126 Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *); 127 128 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *); 129 Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *); 130 131 #if 0 132 Static void ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *, 133 ohci_soft_td_t *); 134 #endif 135 Static usbd_status ohci_alloc_std_chain(struct ohci_pipe *, 136 ohci_softc_t *, int, int, usbd_xfer_handle, 137 ohci_soft_td_t *, ohci_soft_td_t **); 138 139 Static void ohci_shutdown(void *v); 140 Static void ohci_power(int, void *); 141 Static usbd_status ohci_open(usbd_pipe_handle); 142 Static void ohci_poll(struct usbd_bus *); 143 Static void ohci_softintr(void *); 144 Static void ohci_waitintr(ohci_softc_t *, usbd_xfer_handle); 145 Static void ohci_add_done(ohci_softc_t *, ohci_physaddr_t); 146 Static void ohci_rhsc(ohci_softc_t *, usbd_xfer_handle); 147 148 Static usbd_status ohci_device_request(usbd_xfer_handle xfer); 149 Static void ohci_add_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 150 Static void ohci_rem_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 151 Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *); 152 Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *); 153 Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t); 154 Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *); 155 Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *); 156 Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t); 157 158 Static usbd_status ohci_setup_isoc(usbd_pipe_handle pipe); 159 Static void ohci_device_isoc_enter(usbd_xfer_handle); 160 161 Static usbd_status ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 162 Static void ohci_freem(struct usbd_bus *, usb_dma_t *); 163 164 Static usbd_xfer_handle ohci_allocx(struct usbd_bus *); 165 Static void ohci_freex(struct usbd_bus *, usbd_xfer_handle); 166 167 Static usbd_status ohci_root_ctrl_transfer(usbd_xfer_handle); 168 Static usbd_status ohci_root_ctrl_start(usbd_xfer_handle); 169 Static void ohci_root_ctrl_abort(usbd_xfer_handle); 170 Static void ohci_root_ctrl_close(usbd_pipe_handle); 171 Static void ohci_root_ctrl_done(usbd_xfer_handle); 172 173 Static usbd_status ohci_root_intr_transfer(usbd_xfer_handle); 174 Static usbd_status ohci_root_intr_start(usbd_xfer_handle); 175 Static void ohci_root_intr_abort(usbd_xfer_handle); 176 Static void ohci_root_intr_close(usbd_pipe_handle); 177 Static void ohci_root_intr_done(usbd_xfer_handle); 178 179 Static usbd_status ohci_device_ctrl_transfer(usbd_xfer_handle); 180 Static usbd_status ohci_device_ctrl_start(usbd_xfer_handle); 181 Static void ohci_device_ctrl_abort(usbd_xfer_handle); 182 Static void ohci_device_ctrl_close(usbd_pipe_handle); 183 Static void ohci_device_ctrl_done(usbd_xfer_handle); 184 185 Static usbd_status ohci_device_bulk_transfer(usbd_xfer_handle); 186 Static usbd_status ohci_device_bulk_start(usbd_xfer_handle); 187 Static void ohci_device_bulk_abort(usbd_xfer_handle); 188 Static void ohci_device_bulk_close(usbd_pipe_handle); 189 Static void ohci_device_bulk_done(usbd_xfer_handle); 190 191 Static usbd_status ohci_device_intr_transfer(usbd_xfer_handle); 192 Static usbd_status ohci_device_intr_start(usbd_xfer_handle); 193 Static void ohci_device_intr_abort(usbd_xfer_handle); 194 Static void ohci_device_intr_close(usbd_pipe_handle); 195 Static void ohci_device_intr_done(usbd_xfer_handle); 196 197 Static usbd_status ohci_device_isoc_transfer(usbd_xfer_handle); 198 Static usbd_status ohci_device_isoc_start(usbd_xfer_handle); 199 Static void ohci_device_isoc_abort(usbd_xfer_handle); 200 Static void ohci_device_isoc_close(usbd_pipe_handle); 201 Static void ohci_device_isoc_done(usbd_xfer_handle); 202 203 Static usbd_status ohci_device_setintr(ohci_softc_t *sc, 204 struct ohci_pipe *pipe, int ival); 205 206 Static int ohci_str(usb_string_descriptor_t *, int, char *); 207 208 Static void ohci_timeout(void *); 209 Static void ohci_timeout_task(void *); 210 Static void ohci_rhsc_able(ohci_softc_t *, int); 211 Static void ohci_rhsc_enable(void *); 212 213 Static void ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *); 214 Static void ohci_abort_xfer(usbd_xfer_handle, usbd_status); 215 216 Static void ohci_device_clear_toggle(usbd_pipe_handle pipe); 217 Static void ohci_noop(usbd_pipe_handle pipe); 218 219 #ifdef OHCI_DEBUG 220 Static void ohci_dumpregs(ohci_softc_t *); 221 Static void ohci_dump_tds(ohci_soft_td_t *); 222 Static void ohci_dump_td(ohci_soft_td_t *); 223 Static void ohci_dump_ed(ohci_soft_ed_t *); 224 Static void ohci_dump_itd(ohci_soft_itd_t *); 225 Static void ohci_dump_itds(ohci_soft_itd_t *); 226 #endif 227 228 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 229 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 230 #define OWRITE1(sc, r, x) \ 231 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 232 #define OWRITE2(sc, r, x) \ 233 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 234 #define OWRITE4(sc, r, x) \ 235 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 236 #define OREAD1(sc, r) (OBARR(sc), bus_space_read_1((sc)->iot, (sc)->ioh, (r))) 237 #define OREAD2(sc, r) (OBARR(sc), bus_space_read_2((sc)->iot, (sc)->ioh, (r))) 238 #define OREAD4(sc, r) (OBARR(sc), bus_space_read_4((sc)->iot, (sc)->ioh, (r))) 239 240 /* Reverse the bits in a value 0 .. 31 */ 241 Static u_int8_t revbits[OHCI_NO_INTRS] = 242 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 243 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 244 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 245 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 246 247 struct ohci_pipe { 248 struct usbd_pipe pipe; 249 ohci_soft_ed_t *sed; 250 union { 251 ohci_soft_td_t *td; 252 ohci_soft_itd_t *itd; 253 } tail; 254 /* Info needed for different pipe kinds. */ 255 union { 256 /* Control pipe */ 257 struct { 258 usb_dma_t reqdma; 259 u_int length; 260 ohci_soft_td_t *setup, *data, *stat; 261 } ctl; 262 /* Interrupt pipe */ 263 struct { 264 int nslots; 265 int pos; 266 } intr; 267 /* Bulk pipe */ 268 struct { 269 u_int length; 270 int isread; 271 } bulk; 272 /* Iso pipe */ 273 struct iso { 274 int next, inuse; 275 } iso; 276 } u; 277 }; 278 279 #define OHCI_INTR_ENDPT 1 280 281 Static struct usbd_bus_methods ohci_bus_methods = { 282 ohci_open, 283 ohci_softintr, 284 ohci_poll, 285 ohci_allocm, 286 ohci_freem, 287 ohci_allocx, 288 ohci_freex, 289 }; 290 291 Static struct usbd_pipe_methods ohci_root_ctrl_methods = { 292 ohci_root_ctrl_transfer, 293 ohci_root_ctrl_start, 294 ohci_root_ctrl_abort, 295 ohci_root_ctrl_close, 296 ohci_noop, 297 ohci_root_ctrl_done, 298 }; 299 300 Static struct usbd_pipe_methods ohci_root_intr_methods = { 301 ohci_root_intr_transfer, 302 ohci_root_intr_start, 303 ohci_root_intr_abort, 304 ohci_root_intr_close, 305 ohci_noop, 306 ohci_root_intr_done, 307 }; 308 309 Static struct usbd_pipe_methods ohci_device_ctrl_methods = { 310 ohci_device_ctrl_transfer, 311 ohci_device_ctrl_start, 312 ohci_device_ctrl_abort, 313 ohci_device_ctrl_close, 314 ohci_noop, 315 ohci_device_ctrl_done, 316 }; 317 318 Static struct usbd_pipe_methods ohci_device_intr_methods = { 319 ohci_device_intr_transfer, 320 ohci_device_intr_start, 321 ohci_device_intr_abort, 322 ohci_device_intr_close, 323 ohci_device_clear_toggle, 324 ohci_device_intr_done, 325 }; 326 327 Static struct usbd_pipe_methods ohci_device_bulk_methods = { 328 ohci_device_bulk_transfer, 329 ohci_device_bulk_start, 330 ohci_device_bulk_abort, 331 ohci_device_bulk_close, 332 ohci_device_clear_toggle, 333 ohci_device_bulk_done, 334 }; 335 336 Static struct usbd_pipe_methods ohci_device_isoc_methods = { 337 ohci_device_isoc_transfer, 338 ohci_device_isoc_start, 339 ohci_device_isoc_abort, 340 ohci_device_isoc_close, 341 ohci_noop, 342 ohci_device_isoc_done, 343 }; 344 345 #if defined(__NetBSD__) || defined(__OpenBSD__) 346 int 347 ohci_activate(device_ptr_t self, enum devact act) 348 { 349 struct ohci_softc *sc = (struct ohci_softc *)self; 350 int rv = 0; 351 352 switch (act) { 353 case DVACT_ACTIVATE: 354 return (EOPNOTSUPP); 355 break; 356 357 case DVACT_DEACTIVATE: 358 if (sc->sc_child != NULL) 359 rv = config_deactivate(sc->sc_child); 360 sc->sc_dying = 1; 361 break; 362 } 363 return (rv); 364 } 365 366 int 367 ohci_detach(struct ohci_softc *sc, int flags) 368 { 369 int rv = 0; 370 371 if (sc->sc_child != NULL) 372 rv = config_detach(sc->sc_child, flags); 373 374 if (rv != 0) 375 return (rv); 376 377 usb_uncallout(sc->sc_tmo_rhsc, ohci_rhsc_enable, sc); 378 379 #if defined(__NetBSD__) || defined(__OpenBSD__) 380 powerhook_disestablish(sc->sc_powerhook); 381 shutdownhook_disestablish(sc->sc_shutdownhook); 382 #endif 383 384 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 385 386 /* free data structures XXX */ 387 388 return (rv); 389 } 390 #endif 391 392 ohci_soft_ed_t * 393 ohci_alloc_sed(ohci_softc_t *sc) 394 { 395 ohci_soft_ed_t *sed; 396 usbd_status err; 397 int i, offs; 398 usb_dma_t dma; 399 400 if (sc->sc_freeeds == NULL) { 401 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 402 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 403 OHCI_ED_ALIGN, &dma); 404 if (err) 405 return (0); 406 for(i = 0; i < OHCI_SED_CHUNK; i++) { 407 offs = i * OHCI_SED_SIZE; 408 sed = (ohci_soft_ed_t *)((char *)KERNADDR(&dma) +offs); 409 sed->physaddr = DMAADDR(&dma) + offs; 410 sed->next = sc->sc_freeeds; 411 sc->sc_freeeds = sed; 412 } 413 } 414 sed = sc->sc_freeeds; 415 sc->sc_freeeds = sed->next; 416 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 417 sed->next = 0; 418 return (sed); 419 } 420 421 void 422 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 423 { 424 sed->next = sc->sc_freeeds; 425 sc->sc_freeeds = sed; 426 } 427 428 ohci_soft_td_t * 429 ohci_alloc_std(ohci_softc_t *sc) 430 { 431 ohci_soft_td_t *std; 432 usbd_status err; 433 int i, offs; 434 usb_dma_t dma; 435 int s; 436 437 if (sc->sc_freetds == NULL) { 438 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 439 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 440 OHCI_TD_ALIGN, &dma); 441 if (err) 442 return (NULL); 443 s = splusb(); 444 for(i = 0; i < OHCI_STD_CHUNK; i++) { 445 offs = i * OHCI_STD_SIZE; 446 std = (ohci_soft_td_t *)((char *)KERNADDR(&dma) +offs); 447 std->physaddr = DMAADDR(&dma) + offs; 448 std->nexttd = sc->sc_freetds; 449 sc->sc_freetds = std; 450 } 451 splx(s); 452 } 453 454 s = splusb(); 455 std = sc->sc_freetds; 456 sc->sc_freetds = std->nexttd; 457 memset(&std->td, 0, sizeof(ohci_td_t)); 458 std->nexttd = NULL; 459 std->xfer = NULL; 460 ohci_hash_add_td(sc, std); 461 splx(s); 462 463 return (std); 464 } 465 466 void 467 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std) 468 { 469 int s; 470 471 s = splusb(); 472 ohci_hash_rem_td(sc, std); 473 std->nexttd = sc->sc_freetds; 474 sc->sc_freetds = std; 475 splx(s); 476 } 477 478 usbd_status 479 ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc, 480 int alen, int rd, usbd_xfer_handle xfer, 481 ohci_soft_td_t *sp, ohci_soft_td_t **ep) 482 { 483 ohci_soft_td_t *next, *cur; 484 ohci_physaddr_t dataphys, dataphysend; 485 u_int32_t tdflags; 486 int len, curlen; 487 usb_dma_t *dma = &xfer->dmabuf; 488 u_int16_t flags = xfer->flags; 489 490 DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen)); 491 492 len = alen; 493 cur = sp; 494 dataphys = DMAADDR(dma); 495 dataphysend = OHCI_PAGE(dataphys + len - 1); 496 tdflags = htole32( 497 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 498 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) | 499 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR); 500 501 for (;;) { 502 next = ohci_alloc_std(sc); 503 if (next == NULL) 504 goto nomem; 505 506 /* The OHCI hardware can handle at most one page crossing. */ 507 if (OHCI_PAGE(dataphys) == dataphysend || 508 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) { 509 /* we can handle it in this TD */ 510 curlen = len; 511 } else { 512 /* must use multiple TDs, fill as much as possible. */ 513 curlen = 2 * OHCI_PAGE_SIZE - 514 (dataphys & (OHCI_PAGE_SIZE-1)); 515 /* the length must be a multiple of the max size */ 516 curlen -= curlen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize); 517 #ifdef DIAGNOSTIC 518 if (curlen == 0) 519 panic("ohci_alloc_std: curlen == 0\n"); 520 #endif 521 } 522 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x " 523 "dataphysend=0x%08x len=%d curlen=%d\n", 524 dataphys, dataphysend, 525 len, curlen)); 526 len -= curlen; 527 528 cur->td.td_flags = tdflags; 529 cur->td.td_cbp = htole32(dataphys); 530 cur->nexttd = next; 531 cur->td.td_nexttd = htole32(next->physaddr); 532 cur->td.td_be = htole32(dataphys + curlen - 1); 533 cur->len = curlen; 534 cur->flags = OHCI_ADD_LEN; 535 cur->xfer = xfer; 536 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n", 537 dataphys, dataphys + curlen - 1)); 538 if (len == 0) 539 break; 540 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n")); 541 dataphys += curlen; 542 cur = next; 543 } 544 if ((flags & USBD_FORCE_SHORT_XFER) && 545 alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) { 546 /* Force a 0 length transfer at the end. */ 547 548 cur = next; 549 next = ohci_alloc_std(sc); 550 if (next == NULL) 551 goto nomem; 552 553 cur->td.td_flags = tdflags; 554 cur->td.td_cbp = 0; /* indicate 0 length packet */ 555 cur->nexttd = next; 556 cur->td.td_nexttd = htole32(next->physaddr); 557 cur->td.td_be = ~0; 558 cur->len = 0; 559 cur->flags = 0; 560 cur->xfer = xfer; 561 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n")); 562 } 563 *ep = cur; 564 565 return (USBD_NORMAL_COMPLETION); 566 567 nomem: 568 /* XXX free chain */ 569 return (USBD_NOMEM); 570 } 571 572 #if 0 573 Static void 574 ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std, 575 ohci_soft_td_t *stdend) 576 { 577 ohci_soft_td_t *p; 578 579 for (; std != stdend; std = p) { 580 p = std->nexttd; 581 ohci_free_std(sc, std); 582 } 583 } 584 #endif 585 586 ohci_soft_itd_t * 587 ohci_alloc_sitd(ohci_softc_t *sc) 588 { 589 ohci_soft_itd_t *sitd; 590 usbd_status err; 591 int i, s, offs; 592 usb_dma_t dma; 593 594 if (sc->sc_freeitds == NULL) { 595 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n")); 596 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK, 597 OHCI_ITD_ALIGN, &dma); 598 if (err) 599 return (NULL); 600 for(i = 0; i < OHCI_SITD_CHUNK; i++) { 601 offs = i * OHCI_SITD_SIZE; 602 sitd = (ohci_soft_itd_t *)((char*)KERNADDR(&dma)+offs); 603 sitd->physaddr = DMAADDR(&dma) + offs; 604 sitd->nextitd = sc->sc_freeitds; 605 sc->sc_freeitds = sitd; 606 } 607 } 608 609 s = splusb(); 610 sitd = sc->sc_freeitds; 611 sc->sc_freeitds = sitd->nextitd; 612 memset(&sitd->itd, 0, sizeof(ohci_itd_t)); 613 sitd->nextitd = NULL; 614 sitd->xfer = NULL; 615 ohci_hash_add_itd(sc, sitd); 616 splx(s); 617 618 #ifdef DIAGNOSTIC 619 sitd->isdone = 0; 620 #endif 621 622 return (sitd); 623 } 624 625 void 626 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 627 { 628 int s; 629 630 DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd)); 631 632 #ifdef DIAGNOSTIC 633 if (!sitd->isdone) { 634 panic("ohci_free_sitd: sitd=%p not done\n", sitd); 635 return; 636 } 637 #endif 638 639 s = splusb(); 640 ohci_hash_rem_itd(sc, sitd); 641 sitd->nextitd = sc->sc_freeitds; 642 sc->sc_freeitds = sitd; 643 splx(s); 644 } 645 646 usbd_status 647 ohci_init(ohci_softc_t *sc) 648 { 649 ohci_soft_ed_t *sed, *psed; 650 usbd_status err; 651 int i; 652 u_int32_t s, ctl, ival, hcr, fm, per, rev, desca; 653 654 DPRINTF(("ohci_init: start\n")); 655 #if defined(__OpenBSD__) 656 printf(","); 657 #else 658 printf("%s:", USBDEVNAME(sc->sc_bus.bdev)); 659 #endif 660 rev = OREAD4(sc, OHCI_REVISION); 661 printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev), 662 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 663 664 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 665 printf("%s: unsupported OHCI revision\n", 666 USBDEVNAME(sc->sc_bus.bdev)); 667 sc->sc_bus.usbrev = USBREV_UNKNOWN; 668 return (USBD_INVAL); 669 } 670 sc->sc_bus.usbrev = USBREV_1_0; 671 672 for (i = 0; i < OHCI_HASH_SIZE; i++) 673 LIST_INIT(&sc->sc_hash_tds[i]); 674 for (i = 0; i < OHCI_HASH_SIZE; i++) 675 LIST_INIT(&sc->sc_hash_itds[i]); 676 677 SIMPLEQ_INIT(&sc->sc_free_xfers); 678 679 /* XXX determine alignment by R/W */ 680 /* Allocate the HCCA area. */ 681 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 682 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 683 if (err) 684 return (err); 685 sc->sc_hcca = (struct ohci_hcca *)KERNADDR(&sc->sc_hccadma); 686 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 687 688 sc->sc_eintrs = OHCI_NORMAL_INTRS; 689 690 /* Allocate dummy ED that starts the control list. */ 691 sc->sc_ctrl_head = ohci_alloc_sed(sc); 692 if (sc->sc_ctrl_head == NULL) { 693 err = USBD_NOMEM; 694 goto bad1; 695 } 696 sc->sc_ctrl_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 697 698 /* Allocate dummy ED that starts the bulk list. */ 699 sc->sc_bulk_head = ohci_alloc_sed(sc); 700 if (sc->sc_bulk_head == NULL) { 701 err = USBD_NOMEM; 702 goto bad2; 703 } 704 sc->sc_bulk_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 705 706 /* Allocate dummy ED that starts the isochronous list. */ 707 sc->sc_isoc_head = ohci_alloc_sed(sc); 708 if (sc->sc_isoc_head == NULL) { 709 err = USBD_NOMEM; 710 goto bad3; 711 } 712 sc->sc_isoc_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 713 714 /* Allocate all the dummy EDs that make up the interrupt tree. */ 715 for (i = 0; i < OHCI_NO_EDS; i++) { 716 sed = ohci_alloc_sed(sc); 717 if (sed == NULL) { 718 while (--i >= 0) 719 ohci_free_sed(sc, sc->sc_eds[i]); 720 err = USBD_NOMEM; 721 goto bad4; 722 } 723 /* All ED fields are set to 0. */ 724 sc->sc_eds[i] = sed; 725 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 726 if (i != 0) 727 psed = sc->sc_eds[(i-1) / 2]; 728 else 729 psed= sc->sc_isoc_head; 730 sed->next = psed; 731 sed->ed.ed_nexted = htole32(psed->physaddr); 732 } 733 /* 734 * Fill HCCA interrupt table. The bit reversal is to get 735 * the tree set up properly to spread the interrupts. 736 */ 737 for (i = 0; i < OHCI_NO_INTRS; i++) 738 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 739 htole32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 740 741 #ifdef OHCI_DEBUG 742 if (ohcidebug > 15) { 743 for (i = 0; i < OHCI_NO_EDS; i++) { 744 printf("ed#%d ", i); 745 ohci_dump_ed(sc->sc_eds[i]); 746 } 747 printf("iso "); 748 ohci_dump_ed(sc->sc_isoc_head); 749 } 750 #endif 751 752 /* Determine in what context we are running. */ 753 ctl = OREAD4(sc, OHCI_CONTROL); 754 if (ctl & OHCI_IR) { 755 /* SMM active, request change */ 756 DPRINTF(("ohci_init: SMM active, request owner change\n")); 757 s = OREAD4(sc, OHCI_COMMAND_STATUS); 758 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 759 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 760 usb_delay_ms(&sc->sc_bus, 1); 761 ctl = OREAD4(sc, OHCI_CONTROL); 762 } 763 if ((ctl & OHCI_IR) == 0) { 764 printf("%s: SMM does not respond, resetting\n", 765 USBDEVNAME(sc->sc_bus.bdev)); 766 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 767 goto reset; 768 } 769 #if 0 770 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */ 771 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 772 /* BIOS started controller. */ 773 DPRINTF(("ohci_init: BIOS active\n")); 774 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 775 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL); 776 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 777 } 778 #endif 779 } else { 780 DPRINTF(("ohci_init: cold started\n")); 781 reset: 782 /* Controller was cold started. */ 783 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 784 } 785 786 /* 787 * This reset should not be necessary according to the OHCI spec, but 788 * without it some controllers do not start. 789 */ 790 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 791 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 792 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 793 794 /* We now own the host controller and the bus has been reset. */ 795 ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL)); 796 797 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 798 /* Nominal time for a reset is 10 us. */ 799 for (i = 0; i < 10; i++) { 800 delay(10); 801 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 802 if (!hcr) 803 break; 804 } 805 if (hcr) { 806 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 807 err = USBD_IOERROR; 808 goto bad5; 809 } 810 #ifdef OHCI_DEBUG 811 if (ohcidebug > 15) 812 ohci_dumpregs(sc); 813 #endif 814 815 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 816 817 /* Set up HC registers. */ 818 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma)); 819 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 820 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 821 /* disable all interrupts and then switch on all desired interrupts */ 822 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 823 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 824 /* switch on desired functional features */ 825 ctl = OREAD4(sc, OHCI_CONTROL); 826 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 827 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 828 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL; 829 /* And finally start it! */ 830 OWRITE4(sc, OHCI_CONTROL, ctl); 831 832 /* 833 * The controller is now OPERATIONAL. Set a some final 834 * registers that should be set earlier, but that the 835 * controller ignores when in the SUSPEND state. 836 */ 837 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 838 fm |= OHCI_FSMPS(ival) | ival; 839 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 840 per = OHCI_PERIODIC(ival); /* 90% periodic */ 841 OWRITE4(sc, OHCI_PERIODIC_START, per); 842 843 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */ 844 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 845 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP); 846 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 847 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY); 848 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca); 849 850 /* 851 * The AMD756 requires a delay before re-reading the register, 852 * otherwise it will occasionally report 0 ports. 853 */ 854 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY); 855 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 856 857 #ifdef OHCI_DEBUG 858 if (ohcidebug > 5) 859 ohci_dumpregs(sc); 860 #endif 861 862 /* Set up the bus struct. */ 863 sc->sc_bus.methods = &ohci_bus_methods; 864 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 865 866 #if defined(__NetBSD__) || defined(__OpenBSD__) 867 sc->sc_control = sc->sc_intre = 0; 868 sc->sc_powerhook = powerhook_establish(ohci_power, sc); 869 sc->sc_shutdownhook = shutdownhook_establish(ohci_shutdown, sc); 870 #endif 871 872 usb_callout_init(sc->sc_tmo_rhsc); 873 874 return (USBD_NORMAL_COMPLETION); 875 876 bad5: 877 for (i = 0; i < OHCI_NO_EDS; i++) 878 ohci_free_sed(sc, sc->sc_eds[i]); 879 bad4: 880 ohci_free_sed(sc, sc->sc_isoc_head); 881 bad3: 882 ohci_free_sed(sc, sc->sc_ctrl_head); 883 bad2: 884 ohci_free_sed(sc, sc->sc_bulk_head); 885 bad1: 886 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 887 return (err); 888 } 889 890 usbd_status 891 ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 892 { 893 #if defined(__NetBSD__) || defined(__OpenBSD__) 894 struct ohci_softc *sc = (struct ohci_softc *)bus; 895 #endif 896 897 return (usb_allocmem(&sc->sc_bus, size, 0, dma)); 898 } 899 900 void 901 ohci_freem(struct usbd_bus *bus, usb_dma_t *dma) 902 { 903 #if defined(__NetBSD__) || defined(__OpenBSD__) 904 struct ohci_softc *sc = (struct ohci_softc *)bus; 905 #endif 906 907 usb_freemem(&sc->sc_bus, dma); 908 } 909 910 usbd_xfer_handle 911 ohci_allocx(struct usbd_bus *bus) 912 { 913 struct ohci_softc *sc = (struct ohci_softc *)bus; 914 usbd_xfer_handle xfer; 915 916 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 917 if (xfer != NULL) { 918 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, xfer, next); 919 #ifdef DIAGNOSTIC 920 if (xfer->busy_free != XFER_FREE) { 921 printf("ohci_allocx: xfer=%p not free, 0x%08x\n", xfer, 922 xfer->busy_free); 923 } 924 #endif 925 } else { 926 xfer = malloc(sizeof(struct ohci_xfer), M_USB, M_NOWAIT); 927 } 928 if (xfer != NULL) { 929 memset(xfer, 0, sizeof (struct ohci_xfer)); 930 #ifdef DIAGNOSTIC 931 xfer->busy_free = XFER_BUSY; 932 #endif 933 } 934 return (xfer); 935 } 936 937 void 938 ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 939 { 940 struct ohci_softc *sc = (struct ohci_softc *)bus; 941 942 #ifdef DIAGNOSTIC 943 if (xfer->busy_free != XFER_BUSY) { 944 printf("ohci_freex: xfer=%p not busy, 0x%08x\n", xfer, 945 xfer->busy_free); 946 return; 947 } 948 xfer->busy_free = XFER_FREE; 949 #endif 950 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 951 } 952 953 /* 954 * Shut down the controller when the system is going down. 955 */ 956 void 957 ohci_shutdown(void *v) 958 { 959 ohci_softc_t *sc = v; 960 961 DPRINTF(("ohci_shutdown: stopping the HC\n")); 962 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 963 } 964 965 /* 966 * Handle suspend/resume. 967 * 968 * We need to switch to polling mode here, because this routine is 969 * called from an intterupt context. This is all right since we 970 * are almost suspended anyway. 971 */ 972 void 973 ohci_power(int why, void *v) 974 { 975 ohci_softc_t *sc = v; 976 u_int32_t ctl; 977 int s; 978 979 #ifdef OHCI_DEBUG 980 DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why)); 981 ohci_dumpregs(sc); 982 #endif 983 984 s = splhardusb(); 985 switch (why) { 986 case PWR_SUSPEND: 987 case PWR_STANDBY: 988 sc->sc_bus.use_polling++; 989 ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK; 990 if (sc->sc_control == 0) { 991 /* 992 * Preserve register values, in case that APM BIOS 993 * does not recover them. 994 */ 995 sc->sc_control = ctl; 996 sc->sc_intre = OREAD4(sc, OHCI_INTERRUPT_ENABLE); 997 } 998 ctl |= OHCI_HCFS_SUSPEND; 999 OWRITE4(sc, OHCI_CONTROL, ctl); 1000 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1001 sc->sc_bus.use_polling--; 1002 break; 1003 case PWR_RESUME: 1004 sc->sc_bus.use_polling++; 1005 /* Some broken BIOSes do not recover these values */ 1006 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma)); 1007 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 1008 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 1009 if (sc->sc_intre) 1010 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, 1011 sc->sc_intre & (OHCI_ALL_INTRS | OHCI_MIE)); 1012 if (sc->sc_control) 1013 ctl = sc->sc_control; 1014 else 1015 ctl = OREAD4(sc, OHCI_CONTROL); 1016 ctl |= OHCI_HCFS_RESUME; 1017 OWRITE4(sc, OHCI_CONTROL, ctl); 1018 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 1019 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL; 1020 OWRITE4(sc, OHCI_CONTROL, ctl); 1021 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 1022 sc->sc_control = sc->sc_intre = 0; 1023 sc->sc_bus.use_polling--; 1024 break; 1025 case PWR_SOFTSUSPEND: 1026 case PWR_SOFTSTANDBY: 1027 case PWR_SOFTRESUME: 1028 break; 1029 } 1030 splx(s); 1031 } 1032 1033 #ifdef OHCI_DEBUG 1034 void 1035 ohci_dumpregs(ohci_softc_t *sc) 1036 { 1037 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 1038 OREAD4(sc, OHCI_REVISION), 1039 OREAD4(sc, OHCI_CONTROL), 1040 OREAD4(sc, OHCI_COMMAND_STATUS))); 1041 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 1042 OREAD4(sc, OHCI_INTERRUPT_STATUS), 1043 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 1044 OREAD4(sc, OHCI_INTERRUPT_DISABLE))); 1045 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 1046 OREAD4(sc, OHCI_HCCA), 1047 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 1048 OREAD4(sc, OHCI_CONTROL_HEAD_ED))); 1049 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 1050 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 1051 OREAD4(sc, OHCI_BULK_HEAD_ED), 1052 OREAD4(sc, OHCI_BULK_CURRENT_ED))); 1053 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 1054 OREAD4(sc, OHCI_DONE_HEAD), 1055 OREAD4(sc, OHCI_FM_INTERVAL), 1056 OREAD4(sc, OHCI_FM_REMAINING))); 1057 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 1058 OREAD4(sc, OHCI_FM_NUMBER), 1059 OREAD4(sc, OHCI_PERIODIC_START), 1060 OREAD4(sc, OHCI_LS_THRESHOLD))); 1061 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n", 1062 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 1063 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 1064 OREAD4(sc, OHCI_RH_STATUS))); 1065 DPRINTF((" port1=0x%08x port2=0x%08x\n", 1066 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 1067 OREAD4(sc, OHCI_RH_PORT_STATUS(2)))); 1068 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n", 1069 le32toh(sc->sc_hcca->hcca_frame_number), 1070 le32toh(sc->sc_hcca->hcca_done_head))); 1071 } 1072 #endif 1073 1074 Static int ohci_intr1(ohci_softc_t *); 1075 1076 int 1077 ohci_intr(void *p) 1078 { 1079 ohci_softc_t *sc = p; 1080 1081 if (sc == NULL || sc->sc_dying) 1082 return (0); 1083 1084 /* If we get an interrupt while polling, then just ignore it. */ 1085 if (sc->sc_bus.use_polling) { 1086 #ifdef DIAGNOSTIC 1087 printf("ohci_intr: ignored interrupt while polling\n"); 1088 #endif 1089 return (0); 1090 } 1091 1092 return (ohci_intr1(sc)); 1093 } 1094 1095 Static int 1096 ohci_intr1(ohci_softc_t *sc) 1097 { 1098 u_int32_t intrs, eintrs; 1099 ohci_physaddr_t done; 1100 1101 DPRINTFN(14,("ohci_intr1: enter\n")); 1102 1103 /* In case the interrupt occurs before initialization has completed. */ 1104 if (sc == NULL || sc->sc_hcca == NULL) { 1105 #ifdef DIAGNOSTIC 1106 printf("ohci_intr: sc->sc_hcca == NULL\n"); 1107 #endif 1108 return (0); 1109 } 1110 1111 intrs = 0; 1112 done = le32toh(sc->sc_hcca->hcca_done_head); 1113 if (done != 0) { 1114 if (done & ~OHCI_DONE_INTRS) 1115 intrs = OHCI_WDH; 1116 if (done & OHCI_DONE_INTRS) 1117 intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS); 1118 } else 1119 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1120 1121 if (!intrs) 1122 return (0); 1123 1124 intrs &= ~OHCI_MIE; 1125 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */ 1126 eintrs = intrs & sc->sc_eintrs; 1127 if (!eintrs) 1128 return (0); 1129 1130 sc->sc_bus.intr_context++; 1131 sc->sc_bus.no_intrs++; 1132 DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 1133 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 1134 (u_int)eintrs)); 1135 1136 if (eintrs & OHCI_SO) { 1137 sc->sc_overrun_cnt++; 1138 if (usbd_ratecheck(&sc->sc_overrun_ntc)) { 1139 printf("%s: %u scheduling overruns\n", 1140 USBDEVNAME(sc->sc_bus.bdev), sc->sc_overrun_cnt); 1141 sc->sc_overrun_cnt = 0; 1142 } 1143 /* XXX do what */ 1144 eintrs &= ~OHCI_SO; 1145 } 1146 if (eintrs & OHCI_WDH) { 1147 ohci_add_done(sc, done &~ OHCI_DONE_INTRS); 1148 sc->sc_hcca->hcca_done_head = 0; 1149 usb_schedsoftintr(&sc->sc_bus); 1150 eintrs &= ~OHCI_WDH; 1151 } 1152 if (eintrs & OHCI_RD) { 1153 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev)); 1154 /* XXX process resume detect */ 1155 } 1156 if (eintrs & OHCI_UE) { 1157 printf("%s: unrecoverable error, controller halted\n", 1158 USBDEVNAME(sc->sc_bus.bdev)); 1159 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1160 /* XXX what else */ 1161 } 1162 if (eintrs & OHCI_RHSC) { 1163 ohci_rhsc(sc, sc->sc_intrxfer); 1164 /* 1165 * Disable RHSC interrupt for now, because it will be 1166 * on until the port has been reset. 1167 */ 1168 ohci_rhsc_able(sc, 0); 1169 /* Do not allow RHSC interrupts > 1 per second */ 1170 usb_callout(sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc); 1171 eintrs &= ~OHCI_RHSC; 1172 } 1173 1174 sc->sc_bus.intr_context--; 1175 1176 if (eintrs != 0) { 1177 /* Block unprocessed interrupts. XXX */ 1178 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs); 1179 sc->sc_eintrs &= ~eintrs; 1180 printf("%s: blocking intrs 0x%x\n", 1181 USBDEVNAME(sc->sc_bus.bdev), eintrs); 1182 } 1183 1184 return (1); 1185 } 1186 1187 void 1188 ohci_rhsc_able(ohci_softc_t *sc, int on) 1189 { 1190 DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on)); 1191 if (on) { 1192 sc->sc_eintrs |= OHCI_RHSC; 1193 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1194 } else { 1195 sc->sc_eintrs &= ~OHCI_RHSC; 1196 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC); 1197 } 1198 } 1199 1200 void 1201 ohci_rhsc_enable(void *v_sc) 1202 { 1203 ohci_softc_t *sc = v_sc; 1204 1205 ohci_rhsc_able(sc, 1); 1206 } 1207 1208 #ifdef OHCI_DEBUG 1209 char *ohci_cc_strs[] = { 1210 "NO_ERROR", 1211 "CRC", 1212 "BIT_STUFFING", 1213 "DATA_TOGGLE_MISMATCH", 1214 "STALL", 1215 "DEVICE_NOT_RESPONDING", 1216 "PID_CHECK_FAILURE", 1217 "UNEXPECTED_PID", 1218 "DATA_OVERRUN", 1219 "DATA_UNDERRUN", 1220 "BUFFER_OVERRUN", 1221 "BUFFER_UNDERRUN", 1222 "reserved", 1223 "reserved", 1224 "NOT_ACCESSED", 1225 "NOT_ACCESSED", 1226 }; 1227 #endif 1228 1229 void 1230 ohci_add_done(ohci_softc_t *sc, ohci_physaddr_t done) 1231 { 1232 ohci_soft_itd_t *sitd, *sidone, **ip; 1233 ohci_soft_td_t *std, *sdone, **p; 1234 1235 /* Reverse the done list. */ 1236 for (sdone = NULL, sidone = NULL; done != 0; ) { 1237 std = ohci_hash_find_td(sc, done); 1238 if (std != NULL) { 1239 std->dnext = sdone; 1240 done = le32toh(std->td.td_nexttd); 1241 sdone = std; 1242 DPRINTFN(10,("add TD %p\n", std)); 1243 continue; 1244 } 1245 sitd = ohci_hash_find_itd(sc, done); 1246 if (sitd != NULL) { 1247 sitd->dnext = sidone; 1248 done = le32toh(sitd->itd.itd_nextitd); 1249 sidone = sitd; 1250 DPRINTFN(5,("add ITD %p\n", sitd)); 1251 continue; 1252 } 1253 panic("ohci_add_done: addr 0x%08lx not found\n", (u_long)done); 1254 } 1255 1256 /* sdone & sidone now hold the done lists. */ 1257 /* Put them on the already processed lists. */ 1258 for (p = &sc->sc_sdone; *p != NULL; p = &(*p)->dnext) 1259 ; 1260 *p = sdone; 1261 for (ip = &sc->sc_sidone; *ip != NULL; ip = &(*ip)->dnext) 1262 ; 1263 *ip = sidone; 1264 } 1265 1266 void 1267 ohci_softintr(void *v) 1268 { 1269 ohci_softc_t *sc = v; 1270 ohci_soft_itd_t *sitd, *sidone, *sitdnext; 1271 ohci_soft_td_t *std, *sdone, *stdnext; 1272 usbd_xfer_handle xfer; 1273 int len, cc, s; 1274 1275 DPRINTFN(10,("ohci_softintr: enter\n:")); 1276 1277 sc->sc_bus.intr_context++; 1278 1279 s = splhardusb(); 1280 sdone = sc->sc_sdone; 1281 sc->sc_sdone = NULL; 1282 sidone = sc->sc_sidone; 1283 sc->sc_sidone = NULL; 1284 splx(s); 1285 1286 DPRINTFN(10,("ohci_softintr: sdone=%p sidone=%p\n", sdone, sidone)); 1287 1288 #ifdef OHCI_DEBUG 1289 if (ohcidebug > 10) { 1290 DPRINTF(("ohci_process_done: TD done:\n")); 1291 ohci_dump_tds(sdone); 1292 } 1293 #endif 1294 1295 for (std = sdone; std; std = stdnext) { 1296 xfer = std->xfer; 1297 stdnext = std->dnext; 1298 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n", 1299 std, xfer, xfer ? xfer->hcpriv : 0)); 1300 if (xfer == NULL) { 1301 /* 1302 * xfer == NULL: There seems to be no xfer associated 1303 * with this TD. It is tailp that happened to end up on 1304 * the done queue. 1305 * Shouldn't happen, but some chips are broken(?). 1306 */ 1307 continue; 1308 } 1309 if (xfer->status == USBD_CANCELLED || 1310 xfer->status == USBD_TIMEOUT) { 1311 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1312 xfer)); 1313 /* Handled by abort routine. */ 1314 continue; 1315 } 1316 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 1317 cc = OHCI_TD_GET_CC(le32toh(std->td.td_flags)); 1318 if (cc == OHCI_CC_NO_ERROR) { 1319 len = std->len; 1320 if (std->td.td_cbp != 0) 1321 len -= le32toh(std->td.td_be) - 1322 le32toh(std->td.td_cbp) + 1; 1323 DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", 1324 len, std->flags)); 1325 if (std->flags & OHCI_ADD_LEN) 1326 xfer->actlen += len; 1327 if (std->flags & OHCI_CALL_DONE) { 1328 xfer->status = USBD_NORMAL_COMPLETION; 1329 usb_transfer_complete(xfer); 1330 } 1331 ohci_free_std(sc, std); 1332 } else { 1333 /* 1334 * Endpoint is halted. First unlink all the TDs 1335 * belonging to the failed transfer, and then restart 1336 * the endpoint. 1337 */ 1338 ohci_soft_td_t *p, *n; 1339 struct ohci_pipe *opipe = 1340 (struct ohci_pipe *)xfer->pipe; 1341 1342 DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n", 1343 OHCI_TD_GET_CC(le32toh(std->td.td_flags)), 1344 ohci_cc_strs[OHCI_TD_GET_CC(le32toh(std->td.td_flags))])); 1345 1346 /* remove TDs */ 1347 for (p = std; p->xfer == xfer; p = n) { 1348 n = p->nexttd; 1349 ohci_free_std(sc, p); 1350 } 1351 1352 /* clear halt */ 1353 opipe->sed->ed.ed_headp = htole32(p->physaddr); 1354 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1355 1356 if (cc == OHCI_CC_STALL) 1357 xfer->status = USBD_STALLED; 1358 else 1359 xfer->status = USBD_IOERROR; 1360 usb_transfer_complete(xfer); 1361 } 1362 } 1363 1364 #ifdef OHCI_DEBUG 1365 if (ohcidebug > 10) { 1366 DPRINTF(("ohci_softintr: ITD done:\n")); 1367 ohci_dump_itds(sidone); 1368 } 1369 #endif 1370 1371 for (sitd = sidone; sitd != NULL; sitd = sitdnext) { 1372 xfer = sitd->xfer; 1373 sitdnext = sitd->dnext; 1374 DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n", 1375 sitd, xfer, xfer ? xfer->hcpriv : 0)); 1376 if (xfer == NULL) 1377 continue; 1378 if (xfer->status == USBD_CANCELLED || 1379 xfer->status == USBD_TIMEOUT) { 1380 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1381 xfer)); 1382 /* Handled by abort routine. */ 1383 continue; 1384 } 1385 #ifdef DIAGNOSTIC 1386 if (sitd->isdone) 1387 printf("ohci_softintr: sitd=%p is done\n", sitd); 1388 sitd->isdone = 1; 1389 #endif 1390 cc = OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags)); 1391 if (cc == OHCI_CC_NO_ERROR) { 1392 /* XXX compute length for input */ 1393 struct ohci_pipe *opipe = 1394 (struct ohci_pipe *)xfer->pipe; 1395 if (sitd->flags & OHCI_CALL_DONE) { 1396 opipe->u.iso.inuse -= xfer->nframes; 1397 /* XXX update frlengths with actual length */ 1398 /* XXX xfer->actlen = actlen; */ 1399 xfer->status = USBD_NORMAL_COMPLETION; 1400 usb_transfer_complete(xfer); 1401 } 1402 } else { 1403 /* XXX Do more */ 1404 xfer->status = USBD_IOERROR; 1405 usb_transfer_complete(xfer); 1406 } 1407 } 1408 1409 if (sc->sc_softwake) { 1410 sc->sc_softwake = 0; 1411 wakeup(&sc->sc_softwake); 1412 } 1413 1414 sc->sc_bus.intr_context--; 1415 DPRINTFN(10,("ohci_softintr: done:\n")); 1416 } 1417 1418 void 1419 ohci_device_ctrl_done(usbd_xfer_handle xfer) 1420 { 1421 DPRINTFN(10,("ohci_ctrl_done: xfer=%p\n", xfer)); 1422 1423 #ifdef DIAGNOSTIC 1424 if (!(xfer->rqflags & URQ_REQUEST)) { 1425 panic("ohci_ctrl_done: not a request\n"); 1426 } 1427 #endif 1428 xfer->hcpriv = NULL; 1429 } 1430 1431 void 1432 ohci_device_intr_done(usbd_xfer_handle xfer) 1433 { 1434 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1435 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1436 ohci_soft_ed_t *sed = opipe->sed; 1437 ohci_soft_td_t *data, *tail; 1438 1439 1440 DPRINTFN(10,("ohci_intr_done: xfer=%p, actlen=%d\n", 1441 xfer, xfer->actlen)); 1442 1443 xfer->hcpriv = NULL; 1444 1445 if (xfer->pipe->repeat) { 1446 data = opipe->tail.td; 1447 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 1448 if (tail == NULL) { 1449 xfer->status = USBD_NOMEM; 1450 return; 1451 } 1452 tail->xfer = NULL; 1453 1454 data->td.td_flags = htole32( 1455 OHCI_TD_IN | OHCI_TD_NOCC | 1456 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 1457 if (xfer->flags & USBD_SHORT_XFER_OK) 1458 data->td.td_flags |= htole32(OHCI_TD_R); 1459 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf)); 1460 data->nexttd = tail; 1461 data->td.td_nexttd = htole32(tail->physaddr); 1462 data->td.td_be = htole32(le32toh(data->td.td_cbp) + 1463 xfer->length - 1); 1464 data->len = xfer->length; 1465 data->xfer = xfer; 1466 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1467 xfer->hcpriv = data; 1468 xfer->actlen = 0; 1469 1470 sed->ed.ed_tailp = htole32(tail->physaddr); 1471 opipe->tail.td = tail; 1472 } 1473 } 1474 1475 void 1476 ohci_device_bulk_done(usbd_xfer_handle xfer) 1477 { 1478 DPRINTFN(10,("ohci_bulk_done: xfer=%p, actlen=%d\n", 1479 xfer, xfer->actlen)); 1480 1481 xfer->hcpriv = NULL; 1482 } 1483 1484 void 1485 ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer) 1486 { 1487 usbd_pipe_handle pipe; 1488 struct ohci_pipe *opipe; 1489 u_char *p; 1490 int i, m; 1491 int hstatus; 1492 1493 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1494 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n", 1495 sc, xfer, hstatus)); 1496 1497 if (xfer == NULL) { 1498 /* Just ignore the change. */ 1499 return; 1500 } 1501 1502 pipe = xfer->pipe; 1503 opipe = (struct ohci_pipe *)pipe; 1504 1505 p = KERNADDR(&xfer->dmabuf); 1506 m = min(sc->sc_noport, xfer->length * 8 - 1); 1507 memset(p, 0, xfer->length); 1508 for (i = 1; i <= m; i++) { 1509 /* Pick out CHANGE bits from the status reg. */ 1510 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1511 p[i/8] |= 1 << (i%8); 1512 } 1513 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 1514 xfer->actlen = xfer->length; 1515 xfer->status = USBD_NORMAL_COMPLETION; 1516 1517 usb_transfer_complete(xfer); 1518 } 1519 1520 void 1521 ohci_root_intr_done(usbd_xfer_handle xfer) 1522 { 1523 xfer->hcpriv = NULL; 1524 } 1525 1526 void 1527 ohci_root_ctrl_done(usbd_xfer_handle xfer) 1528 { 1529 xfer->hcpriv = NULL; 1530 } 1531 1532 /* 1533 * Wait here until controller claims to have an interrupt. 1534 * Then call ohci_intr and return. Use timeout to avoid waiting 1535 * too long. 1536 */ 1537 void 1538 ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer) 1539 { 1540 int timo = xfer->timeout; 1541 int usecs; 1542 u_int32_t intrs; 1543 1544 xfer->status = USBD_IN_PROGRESS; 1545 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 1546 usb_delay_ms(&sc->sc_bus, 1); 1547 if (sc->sc_dying) 1548 break; 1549 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 1550 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs)); 1551 #ifdef OHCI_DEBUG 1552 if (ohcidebug > 15) 1553 ohci_dumpregs(sc); 1554 #endif 1555 if (intrs) { 1556 ohci_intr1(sc); 1557 if (xfer->status != USBD_IN_PROGRESS) 1558 return; 1559 } 1560 } 1561 1562 /* Timeout */ 1563 DPRINTF(("ohci_waitintr: timeout\n")); 1564 xfer->status = USBD_TIMEOUT; 1565 usb_transfer_complete(xfer); 1566 /* XXX should free TD */ 1567 } 1568 1569 void 1570 ohci_poll(struct usbd_bus *bus) 1571 { 1572 ohci_softc_t *sc = (ohci_softc_t *)bus; 1573 #ifdef OHCI_DEBUG 1574 static int last; 1575 int new; 1576 new = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1577 if (new != last) { 1578 DPRINTFN(10,("ohci_poll: intrs=0x%04x\n", new)); 1579 last = new; 1580 } 1581 #endif 1582 1583 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) 1584 ohci_intr1(sc); 1585 } 1586 1587 usbd_status 1588 ohci_device_request(usbd_xfer_handle xfer) 1589 { 1590 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1591 usb_device_request_t *req = &xfer->request; 1592 usbd_device_handle dev = opipe->pipe.device; 1593 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1594 int addr = dev->address; 1595 ohci_soft_td_t *setup, *stat, *next, *tail; 1596 ohci_soft_ed_t *sed; 1597 int isread; 1598 int len; 1599 usbd_status err; 1600 int s; 1601 1602 isread = req->bmRequestType & UT_READ; 1603 len = UGETW(req->wLength); 1604 1605 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 1606 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 1607 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1608 UGETW(req->wIndex), len, addr, 1609 opipe->pipe.endpoint->edesc->bEndpointAddress)); 1610 1611 setup = opipe->tail.td; 1612 stat = ohci_alloc_std(sc); 1613 if (stat == NULL) { 1614 err = USBD_NOMEM; 1615 goto bad1; 1616 } 1617 tail = ohci_alloc_std(sc); 1618 if (tail == NULL) { 1619 err = USBD_NOMEM; 1620 goto bad2; 1621 } 1622 tail->xfer = NULL; 1623 1624 sed = opipe->sed; 1625 opipe->u.ctl.length = len; 1626 1627 /* Update device address and length since they may have changed. */ 1628 /* XXX This only needs to be done once, but it's too early in open. */ 1629 /* XXXX Should not touch ED here! */ 1630 sed->ed.ed_flags = htole32( 1631 (le32toh(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) | 1632 OHCI_ED_SET_FA(addr) | 1633 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize))); 1634 1635 next = stat; 1636 1637 /* Set up data transaction */ 1638 if (len != 0) { 1639 ohci_soft_td_t *std = stat; 1640 1641 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 1642 std, &stat); 1643 stat = stat->nexttd; /* point at free TD */ 1644 if (err) 1645 goto bad3; 1646 /* Start toggle at 1 and then use the carried toggle. */ 1647 std->td.td_flags &= htole32(~OHCI_TD_TOGGLE_MASK); 1648 std->td.td_flags |= htole32(OHCI_TD_TOGGLE_1); 1649 } 1650 1651 memcpy(KERNADDR(&opipe->u.ctl.reqdma), req, sizeof *req); 1652 1653 setup->td.td_flags = htole32(OHCI_TD_SETUP | OHCI_TD_NOCC | 1654 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1655 setup->td.td_cbp = htole32(DMAADDR(&opipe->u.ctl.reqdma)); 1656 setup->nexttd = next; 1657 setup->td.td_nexttd = htole32(next->physaddr); 1658 setup->td.td_be = htole32(le32toh(setup->td.td_cbp) + sizeof *req - 1); 1659 setup->len = 0; 1660 setup->xfer = xfer; 1661 setup->flags = 0; 1662 xfer->hcpriv = setup; 1663 1664 stat->td.td_flags = htole32( 1665 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | 1666 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1667 stat->td.td_cbp = 0; 1668 stat->nexttd = tail; 1669 stat->td.td_nexttd = htole32(tail->physaddr); 1670 stat->td.td_be = 0; 1671 stat->flags = OHCI_CALL_DONE; 1672 stat->len = 0; 1673 stat->xfer = xfer; 1674 1675 #ifdef OHCI_DEBUG 1676 if (ohcidebug > 5) { 1677 DPRINTF(("ohci_device_request:\n")); 1678 ohci_dump_ed(sed); 1679 ohci_dump_tds(setup); 1680 } 1681 #endif 1682 1683 /* Insert ED in schedule */ 1684 s = splusb(); 1685 sed->ed.ed_tailp = htole32(tail->physaddr); 1686 opipe->tail.td = tail; 1687 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1688 if (xfer->timeout && !sc->sc_bus.use_polling) { 1689 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout), 1690 ohci_timeout, xfer); 1691 } 1692 splx(s); 1693 1694 #ifdef OHCI_DEBUG 1695 if (ohcidebug > 20) { 1696 delay(10000); 1697 DPRINTF(("ohci_device_request: status=%x\n", 1698 OREAD4(sc, OHCI_COMMAND_STATUS))); 1699 ohci_dumpregs(sc); 1700 printf("ctrl head:\n"); 1701 ohci_dump_ed(sc->sc_ctrl_head); 1702 printf("sed:\n"); 1703 ohci_dump_ed(sed); 1704 ohci_dump_tds(setup); 1705 } 1706 #endif 1707 1708 return (USBD_NORMAL_COMPLETION); 1709 1710 bad3: 1711 ohci_free_std(sc, tail); 1712 bad2: 1713 ohci_free_std(sc, stat); 1714 bad1: 1715 return (err); 1716 } 1717 1718 /* 1719 * Add an ED to the schedule. Called at splusb(). 1720 */ 1721 void 1722 ohci_add_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1723 { 1724 DPRINTFN(8,("ohci_add_ed: sed=%p head=%p\n", sed, head)); 1725 1726 SPLUSBCHECK; 1727 sed->next = head->next; 1728 sed->ed.ed_nexted = head->ed.ed_nexted; 1729 head->next = sed; 1730 head->ed.ed_nexted = htole32(sed->physaddr); 1731 } 1732 1733 /* 1734 * Remove an ED from the schedule. Called at splusb(). 1735 */ 1736 void 1737 ohci_rem_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1738 { 1739 ohci_soft_ed_t *p; 1740 1741 SPLUSBCHECK; 1742 1743 /* XXX */ 1744 for (p = head; p == NULL && p->next != sed; p = p->next) 1745 ; 1746 if (p == NULL) 1747 panic("ohci_rem_ed: ED not found\n"); 1748 p->next = sed->next; 1749 p->ed.ed_nexted = sed->ed.ed_nexted; 1750 } 1751 1752 /* 1753 * When a transfer is completed the TD is added to the done queue by 1754 * the host controller. This queue is the processed by software. 1755 * Unfortunately the queue contains the physical address of the TD 1756 * and we have no simple way to translate this back to a kernel address. 1757 * To make the translation possible (and fast) we use a hash table of 1758 * TDs currently in the schedule. The physical address is used as the 1759 * hash value. 1760 */ 1761 1762 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1763 /* Called at splusb() */ 1764 void 1765 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1766 { 1767 int h = HASH(std->physaddr); 1768 1769 SPLUSBCHECK; 1770 1771 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1772 } 1773 1774 /* Called at splusb() */ 1775 void 1776 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1777 { 1778 SPLUSBCHECK; 1779 1780 LIST_REMOVE(std, hnext); 1781 } 1782 1783 ohci_soft_td_t * 1784 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a) 1785 { 1786 int h = HASH(a); 1787 ohci_soft_td_t *std; 1788 1789 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1790 std != NULL; 1791 std = LIST_NEXT(std, hnext)) 1792 if (std->physaddr == a) 1793 return (std); 1794 return (NULL); 1795 } 1796 1797 /* Called at splusb() */ 1798 void 1799 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1800 { 1801 int h = HASH(sitd->physaddr); 1802 1803 SPLUSBCHECK; 1804 1805 DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n", 1806 sitd, (u_long)sitd->physaddr)); 1807 1808 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext); 1809 } 1810 1811 /* Called at splusb() */ 1812 void 1813 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1814 { 1815 SPLUSBCHECK; 1816 1817 DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n", 1818 sitd, (u_long)sitd->physaddr)); 1819 1820 LIST_REMOVE(sitd, hnext); 1821 } 1822 1823 ohci_soft_itd_t * 1824 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a) 1825 { 1826 int h = HASH(a); 1827 ohci_soft_itd_t *sitd; 1828 1829 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]); 1830 sitd != NULL; 1831 sitd = LIST_NEXT(sitd, hnext)) 1832 if (sitd->physaddr == a) 1833 return (sitd); 1834 return (NULL); 1835 } 1836 1837 void 1838 ohci_timeout(void *addr) 1839 { 1840 struct ohci_xfer *oxfer = addr; 1841 struct ohci_pipe *opipe = (struct ohci_pipe *)oxfer->xfer.pipe; 1842 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1843 1844 DPRINTF(("ohci_timeout: oxfer=%p\n", oxfer)); 1845 1846 if (sc->sc_dying) { 1847 ohci_abort_xfer(&oxfer->xfer, USBD_TIMEOUT); 1848 return; 1849 } 1850 1851 /* Execute the abort in a process context. */ 1852 usb_init_task(&oxfer->abort_task, ohci_timeout_task, addr); 1853 usb_add_task(oxfer->xfer.pipe->device, &oxfer->abort_task); 1854 } 1855 1856 void 1857 ohci_timeout_task(void *addr) 1858 { 1859 usbd_xfer_handle xfer = addr; 1860 int s; 1861 1862 DPRINTF(("ohci_timeout_task: xfer=%p\n", xfer)); 1863 1864 s = splusb(); 1865 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1866 splx(s); 1867 } 1868 1869 #ifdef OHCI_DEBUG 1870 void 1871 ohci_dump_tds(ohci_soft_td_t *std) 1872 { 1873 for (; std; std = std->nexttd) 1874 ohci_dump_td(std); 1875 } 1876 1877 void 1878 ohci_dump_td(ohci_soft_td_t *std) 1879 { 1880 char sbuf[128]; 1881 1882 bitmask_snprintf((u_int32_t)le32toh(std->td.td_flags), 1883 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 1884 sbuf, sizeof(sbuf)); 1885 1886 printf("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx " 1887 "nexttd=0x%08lx be=0x%08lx\n", 1888 std, (u_long)std->physaddr, sbuf, 1889 OHCI_TD_GET_DI(le32toh(std->td.td_flags)), 1890 OHCI_TD_GET_EC(le32toh(std->td.td_flags)), 1891 OHCI_TD_GET_CC(le32toh(std->td.td_flags)), 1892 (u_long)le32toh(std->td.td_cbp), 1893 (u_long)le32toh(std->td.td_nexttd), 1894 (u_long)le32toh(std->td.td_be)); 1895 } 1896 1897 void 1898 ohci_dump_itd(ohci_soft_itd_t *sitd) 1899 { 1900 int i; 1901 1902 printf("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n" 1903 "bp0=0x%08lx next=0x%08lx be=0x%08lx\n", 1904 sitd, (u_long)sitd->physaddr, 1905 OHCI_ITD_GET_SF(le32toh(sitd->itd.itd_flags)), 1906 OHCI_ITD_GET_DI(le32toh(sitd->itd.itd_flags)), 1907 OHCI_ITD_GET_FC(le32toh(sitd->itd.itd_flags)), 1908 OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags)), 1909 (u_long)le32toh(sitd->itd.itd_bp0), 1910 (u_long)le32toh(sitd->itd.itd_nextitd), 1911 (u_long)le32toh(sitd->itd.itd_be)); 1912 for (i = 0; i < OHCI_ITD_NOFFSET; i++) 1913 printf("offs[%d]=0x%04x ", i, 1914 (u_int)le16toh(sitd->itd.itd_offset[i])); 1915 printf("\n"); 1916 } 1917 1918 void 1919 ohci_dump_itds(ohci_soft_itd_t *sitd) 1920 { 1921 for (; sitd; sitd = sitd->nextitd) 1922 ohci_dump_itd(sitd); 1923 } 1924 1925 void 1926 ohci_dump_ed(ohci_soft_ed_t *sed) 1927 { 1928 char sbuf[128], sbuf2[128]; 1929 1930 bitmask_snprintf((u_int32_t)le32toh(sed->ed.ed_flags), 1931 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO", 1932 sbuf, sizeof(sbuf)); 1933 bitmask_snprintf((u_int32_t)le32toh(sed->ed.ed_headp), 1934 "\20\1HALT\2CARRY", sbuf2, sizeof(sbuf2)); 1935 1936 printf("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d flags=%s\ntailp=0x%08lx " 1937 "headflags=%s headp=0x%08lx nexted=0x%08lx\n", 1938 sed, (u_long)sed->physaddr, 1939 OHCI_ED_GET_FA(le32toh(sed->ed.ed_flags)), 1940 OHCI_ED_GET_EN(le32toh(sed->ed.ed_flags)), 1941 OHCI_ED_GET_MAXP(le32toh(sed->ed.ed_flags)), sbuf, 1942 (u_long)le32toh(sed->ed.ed_tailp), sbuf2, 1943 (u_long)le32toh(sed->ed.ed_headp), 1944 (u_long)le32toh(sed->ed.ed_nexted)); 1945 } 1946 #endif 1947 1948 usbd_status 1949 ohci_open(usbd_pipe_handle pipe) 1950 { 1951 usbd_device_handle dev = pipe->device; 1952 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1953 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1954 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1955 u_int8_t addr = dev->address; 1956 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1957 ohci_soft_ed_t *sed; 1958 ohci_soft_td_t *std; 1959 ohci_soft_itd_t *sitd; 1960 ohci_physaddr_t tdphys; 1961 u_int32_t fmt; 1962 usbd_status err; 1963 int s; 1964 int ival; 1965 1966 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1967 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1968 1969 if (sc->sc_dying) 1970 return (USBD_IOERROR); 1971 1972 std = NULL; 1973 sed = NULL; 1974 1975 if (addr == sc->sc_addr) { 1976 switch (ed->bEndpointAddress) { 1977 case USB_CONTROL_ENDPOINT: 1978 pipe->methods = &ohci_root_ctrl_methods; 1979 break; 1980 case UE_DIR_IN | OHCI_INTR_ENDPT: 1981 pipe->methods = &ohci_root_intr_methods; 1982 break; 1983 default: 1984 return (USBD_INVAL); 1985 } 1986 } else { 1987 sed = ohci_alloc_sed(sc); 1988 if (sed == NULL) 1989 goto bad0; 1990 opipe->sed = sed; 1991 if (xfertype == UE_ISOCHRONOUS) { 1992 sitd = ohci_alloc_sitd(sc); 1993 if (sitd == NULL) { 1994 ohci_free_sitd(sc, sitd); 1995 goto bad1; 1996 } 1997 opipe->tail.itd = sitd; 1998 tdphys = sitd->physaddr; 1999 fmt = OHCI_ED_FORMAT_ISO; 2000 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 2001 fmt |= OHCI_ED_DIR_IN; 2002 else 2003 fmt |= OHCI_ED_DIR_OUT; 2004 } else { 2005 std = ohci_alloc_std(sc); 2006 if (std == NULL) { 2007 ohci_free_std(sc, std); 2008 goto bad1; 2009 } 2010 opipe->tail.td = std; 2011 tdphys = std->physaddr; 2012 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD; 2013 } 2014 sed->ed.ed_flags = htole32( 2015 OHCI_ED_SET_FA(addr) | 2016 OHCI_ED_SET_EN(ed->bEndpointAddress) | 2017 (dev->speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) | 2018 fmt | 2019 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 2020 sed->ed.ed_headp = sed->ed.ed_tailp = htole32(tdphys); 2021 2022 switch (xfertype) { 2023 case UE_CONTROL: 2024 pipe->methods = &ohci_device_ctrl_methods; 2025 err = usb_allocmem(&sc->sc_bus, 2026 sizeof(usb_device_request_t), 2027 0, &opipe->u.ctl.reqdma); 2028 if (err) 2029 goto bad; 2030 s = splusb(); 2031 ohci_add_ed(sed, sc->sc_ctrl_head); 2032 splx(s); 2033 break; 2034 case UE_INTERRUPT: 2035 pipe->methods = &ohci_device_intr_methods; 2036 ival = pipe->interval; 2037 if (ival == USBD_DEFAULT_INTERVAL) 2038 ival = ed->bInterval; 2039 return (ohci_device_setintr(sc, opipe, ival)); 2040 case UE_ISOCHRONOUS: 2041 pipe->methods = &ohci_device_isoc_methods; 2042 return (ohci_setup_isoc(pipe)); 2043 case UE_BULK: 2044 pipe->methods = &ohci_device_bulk_methods; 2045 s = splusb(); 2046 ohci_add_ed(sed, sc->sc_bulk_head); 2047 splx(s); 2048 break; 2049 } 2050 } 2051 return (USBD_NORMAL_COMPLETION); 2052 2053 bad: 2054 if (std != NULL) 2055 ohci_free_std(sc, std); 2056 bad1: 2057 if (sed != NULL) 2058 ohci_free_sed(sc, sed); 2059 bad0: 2060 return (USBD_NOMEM); 2061 2062 } 2063 2064 /* 2065 * Close a reqular pipe. 2066 * Assumes that there are no pending transactions. 2067 */ 2068 void 2069 ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head) 2070 { 2071 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2072 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2073 ohci_soft_ed_t *sed = opipe->sed; 2074 int s; 2075 2076 s = splusb(); 2077 #ifdef DIAGNOSTIC 2078 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 2079 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2080 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) { 2081 ohci_soft_td_t *std; 2082 std = ohci_hash_find_td(sc, le32toh(sed->ed.ed_headp)); 2083 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 2084 "tl=0x%x pipe=%p, std=%p\n", sed, 2085 (int)le32toh(sed->ed.ed_headp), 2086 (int)le32toh(sed->ed.ed_tailp), 2087 pipe, std); 2088 #ifdef USB_DEBUG 2089 usbd_dump_pipe(&opipe->pipe); 2090 #endif 2091 #ifdef OHCI_DEBUG 2092 ohci_dump_ed(sed); 2093 if (std) 2094 ohci_dump_td(std); 2095 #endif 2096 usb_delay_ms(&sc->sc_bus, 2); 2097 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2098 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) 2099 printf("ohci_close_pipe: pipe still not empty\n"); 2100 } 2101 #endif 2102 ohci_rem_ed(sed, head); 2103 splx(s); 2104 ohci_free_sed(sc, opipe->sed); 2105 } 2106 2107 /* 2108 * Abort a device request. 2109 * If this routine is called at splusb() it guarantees that the request 2110 * will be removed from the hardware scheduling and that the callback 2111 * for it will be called with USBD_CANCELLED status. 2112 * It's impossible to guarantee that the requested transfer will not 2113 * have happened since the hardware runs concurrently. 2114 * If the transaction has already happened we rely on the ordinary 2115 * interrupt processing to process it. 2116 */ 2117 void 2118 ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2119 { 2120 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2121 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 2122 ohci_soft_ed_t *sed = opipe->sed; 2123 ohci_soft_td_t *p, *n; 2124 ohci_physaddr_t headp; 2125 int s, hit; 2126 2127 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p sed=%p\n", xfer, opipe,sed)); 2128 2129 if (sc->sc_dying) { 2130 /* If we're dying, just do the software part. */ 2131 s = splusb(); 2132 xfer->status = status; /* make software ignore it */ 2133 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2134 usb_transfer_complete(xfer); 2135 splx(s); 2136 } 2137 2138 if (xfer->device->bus->intr_context || !curproc) 2139 panic("ohci_abort_xfer: not in process context\n"); 2140 2141 /* 2142 * Step 1: Make interrupt routine and hardware ignore xfer. 2143 */ 2144 s = splusb(); 2145 xfer->status = status; /* make software ignore it */ 2146 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 2147 splx(s); 2148 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed)); 2149 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 2150 2151 /* 2152 * Step 2: Wait until we know hardware has finished any possible 2153 * use of the xfer. Also make sure the soft interrupt routine 2154 * has run. 2155 */ 2156 usb_delay_ms(opipe->pipe.device->bus, 20); /* Hardware finishes in 1ms */ 2157 s = splusb(); 2158 sc->sc_softwake = 1; 2159 usb_schedsoftintr(&sc->sc_bus); 2160 tsleep(&sc->sc_softwake, PZERO, "ohciab", 0); 2161 splx(s); 2162 2163 /* 2164 * Step 3: Remove any vestiges of the xfer from the hardware. 2165 * The complication here is that the hardware may have executed 2166 * beyond the xfer we're trying to abort. So as we're scanning 2167 * the TDs of this xfer we check if the hardware points to 2168 * any of them. 2169 */ 2170 s = splusb(); /* XXX why? */ 2171 p = xfer->hcpriv; 2172 #ifdef DIAGNOSTIC 2173 if (p == NULL) { 2174 splx(s); 2175 printf("ohci_abort_xfer: hcpriv is NULL\n"); 2176 return; 2177 } 2178 #endif 2179 #ifdef OHCI_DEBUG 2180 if (ohcidebug > 1) { 2181 DPRINTF(("ohci_abort_xfer: sed=\n")); 2182 ohci_dump_ed(sed); 2183 ohci_dump_tds(p); 2184 } 2185 #endif 2186 headp = le32toh(sed->ed.ed_headp) & OHCI_HEADMASK; 2187 hit = 0; 2188 for (; p->xfer == xfer; p = n) { 2189 hit |= headp == p->physaddr; 2190 n = p->nexttd; 2191 ohci_free_std(sc, p); 2192 } 2193 /* Zap headp register if hardware pointed inside the xfer. */ 2194 if (hit) { 2195 DPRINTFN(1,("ohci_abort_xfer: set hd=0x08%x, tl=0x%08x\n", 2196 (int)p->physaddr, (int)le32toh(sed->ed.ed_tailp))); 2197 sed->ed.ed_headp = htole32(p->physaddr); /* unlink TDs */ 2198 } else { 2199 DPRINTFN(1,("ohci_abort_xfer: no hit\n")); 2200 } 2201 2202 /* 2203 * Step 4: Turn on hardware again. 2204 */ 2205 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 2206 2207 /* 2208 * Step 5: Execute callback. 2209 */ 2210 usb_transfer_complete(xfer); 2211 2212 splx(s); 2213 } 2214 2215 /* 2216 * Data structures and routines to emulate the root hub. 2217 */ 2218 Static usb_device_descriptor_t ohci_devd = { 2219 USB_DEVICE_DESCRIPTOR_SIZE, 2220 UDESC_DEVICE, /* type */ 2221 {0x00, 0x01}, /* USB version */ 2222 UDCLASS_HUB, /* class */ 2223 UDSUBCLASS_HUB, /* subclass */ 2224 UDPROTO_FSHUB, 2225 64, /* max packet */ 2226 {0},{0},{0x00,0x01}, /* device id */ 2227 1,2,0, /* string indicies */ 2228 1 /* # of configurations */ 2229 }; 2230 2231 Static usb_config_descriptor_t ohci_confd = { 2232 USB_CONFIG_DESCRIPTOR_SIZE, 2233 UDESC_CONFIG, 2234 {USB_CONFIG_DESCRIPTOR_SIZE + 2235 USB_INTERFACE_DESCRIPTOR_SIZE + 2236 USB_ENDPOINT_DESCRIPTOR_SIZE}, 2237 1, 2238 1, 2239 0, 2240 UC_SELF_POWERED, 2241 0 /* max power */ 2242 }; 2243 2244 Static usb_interface_descriptor_t ohci_ifcd = { 2245 USB_INTERFACE_DESCRIPTOR_SIZE, 2246 UDESC_INTERFACE, 2247 0, 2248 0, 2249 1, 2250 UICLASS_HUB, 2251 UISUBCLASS_HUB, 2252 UIPROTO_FSHUB, 2253 0 2254 }; 2255 2256 Static usb_endpoint_descriptor_t ohci_endpd = { 2257 USB_ENDPOINT_DESCRIPTOR_SIZE, 2258 UDESC_ENDPOINT, 2259 UE_DIR_IN | OHCI_INTR_ENDPT, 2260 UE_INTERRUPT, 2261 {8, 0}, /* max packet */ 2262 255 2263 }; 2264 2265 Static usb_hub_descriptor_t ohci_hubd = { 2266 USB_HUB_DESCRIPTOR_SIZE, 2267 UDESC_HUB, 2268 0, 2269 {0,0}, 2270 0, 2271 0, 2272 {0}, 2273 }; 2274 2275 Static int 2276 ohci_str(p, l, s) 2277 usb_string_descriptor_t *p; 2278 int l; 2279 char *s; 2280 { 2281 int i; 2282 2283 if (l == 0) 2284 return (0); 2285 p->bLength = 2 * strlen(s) + 2; 2286 if (l == 1) 2287 return (1); 2288 p->bDescriptorType = UDESC_STRING; 2289 l -= 2; 2290 for (i = 0; s[i] && l > 1; i++, l -= 2) 2291 USETW2(p->bString[i], 0, s[i]); 2292 return (2*i+2); 2293 } 2294 2295 /* 2296 * Simulate a hardware hub by handling all the necessary requests. 2297 */ 2298 Static usbd_status 2299 ohci_root_ctrl_transfer(usbd_xfer_handle xfer) 2300 { 2301 usbd_status err; 2302 2303 /* Insert last in queue. */ 2304 err = usb_insert_transfer(xfer); 2305 if (err) 2306 return (err); 2307 2308 /* Pipe isn't running, start first */ 2309 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2310 } 2311 2312 Static usbd_status 2313 ohci_root_ctrl_start(usbd_xfer_handle xfer) 2314 { 2315 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2316 usb_device_request_t *req; 2317 void *buf = NULL; 2318 int port, i; 2319 int s, len, value, index, l, totlen = 0; 2320 usb_port_status_t ps; 2321 usb_hub_descriptor_t hubd; 2322 usbd_status err; 2323 u_int32_t v; 2324 2325 if (sc->sc_dying) 2326 return (USBD_IOERROR); 2327 2328 #ifdef DIAGNOSTIC 2329 if (!(xfer->rqflags & URQ_REQUEST)) 2330 /* XXX panic */ 2331 return (USBD_INVAL); 2332 #endif 2333 req = &xfer->request; 2334 2335 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 2336 req->bmRequestType, req->bRequest)); 2337 2338 len = UGETW(req->wLength); 2339 value = UGETW(req->wValue); 2340 index = UGETW(req->wIndex); 2341 2342 if (len != 0) 2343 buf = KERNADDR(&xfer->dmabuf); 2344 2345 #define C(x,y) ((x) | ((y) << 8)) 2346 switch(C(req->bRequest, req->bmRequestType)) { 2347 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 2348 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 2349 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 2350 /* 2351 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 2352 * for the integrated root hub. 2353 */ 2354 break; 2355 case C(UR_GET_CONFIG, UT_READ_DEVICE): 2356 if (len > 0) { 2357 *(u_int8_t *)buf = sc->sc_conf; 2358 totlen = 1; 2359 } 2360 break; 2361 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2362 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 2363 switch(value >> 8) { 2364 case UDESC_DEVICE: 2365 if ((value & 0xff) != 0) { 2366 err = USBD_IOERROR; 2367 goto ret; 2368 } 2369 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 2370 USETW(ohci_devd.idVendor, sc->sc_id_vendor); 2371 memcpy(buf, &ohci_devd, l); 2372 break; 2373 case UDESC_CONFIG: 2374 if ((value & 0xff) != 0) { 2375 err = USBD_IOERROR; 2376 goto ret; 2377 } 2378 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 2379 memcpy(buf, &ohci_confd, l); 2380 buf = (char *)buf + l; 2381 len -= l; 2382 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 2383 totlen += l; 2384 memcpy(buf, &ohci_ifcd, l); 2385 buf = (char *)buf + l; 2386 len -= l; 2387 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 2388 totlen += l; 2389 memcpy(buf, &ohci_endpd, l); 2390 break; 2391 case UDESC_STRING: 2392 if (len == 0) 2393 break; 2394 *(u_int8_t *)buf = 0; 2395 totlen = 1; 2396 switch (value & 0xff) { 2397 case 1: /* Vendor */ 2398 totlen = ohci_str(buf, len, sc->sc_vendor); 2399 break; 2400 case 2: /* Product */ 2401 totlen = ohci_str(buf, len, "OHCI root hub"); 2402 break; 2403 } 2404 break; 2405 default: 2406 err = USBD_IOERROR; 2407 goto ret; 2408 } 2409 break; 2410 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 2411 if (len > 0) { 2412 *(u_int8_t *)buf = 0; 2413 totlen = 1; 2414 } 2415 break; 2416 case C(UR_GET_STATUS, UT_READ_DEVICE): 2417 if (len > 1) { 2418 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 2419 totlen = 2; 2420 } 2421 break; 2422 case C(UR_GET_STATUS, UT_READ_INTERFACE): 2423 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 2424 if (len > 1) { 2425 USETW(((usb_status_t *)buf)->wStatus, 0); 2426 totlen = 2; 2427 } 2428 break; 2429 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 2430 if (value >= USB_MAX_DEVICES) { 2431 err = USBD_IOERROR; 2432 goto ret; 2433 } 2434 sc->sc_addr = value; 2435 break; 2436 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 2437 if (value != 0 && value != 1) { 2438 err = USBD_IOERROR; 2439 goto ret; 2440 } 2441 sc->sc_conf = value; 2442 break; 2443 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 2444 break; 2445 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 2446 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 2447 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 2448 err = USBD_IOERROR; 2449 goto ret; 2450 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 2451 break; 2452 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 2453 break; 2454 /* Hub requests */ 2455 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2456 break; 2457 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2458 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 2459 "port=%d feature=%d\n", 2460 index, value)); 2461 if (index < 1 || index > sc->sc_noport) { 2462 err = USBD_IOERROR; 2463 goto ret; 2464 } 2465 port = OHCI_RH_PORT_STATUS(index); 2466 switch(value) { 2467 case UHF_PORT_ENABLE: 2468 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2469 break; 2470 case UHF_PORT_SUSPEND: 2471 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2472 break; 2473 case UHF_PORT_POWER: 2474 /* Yes, writing to the LOW_SPEED bit clears power. */ 2475 OWRITE4(sc, port, UPS_LOW_SPEED); 2476 break; 2477 case UHF_C_PORT_CONNECTION: 2478 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2479 break; 2480 case UHF_C_PORT_ENABLE: 2481 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2482 break; 2483 case UHF_C_PORT_SUSPEND: 2484 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2485 break; 2486 case UHF_C_PORT_OVER_CURRENT: 2487 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2488 break; 2489 case UHF_C_PORT_RESET: 2490 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2491 break; 2492 default: 2493 err = USBD_IOERROR; 2494 goto ret; 2495 } 2496 switch(value) { 2497 case UHF_C_PORT_CONNECTION: 2498 case UHF_C_PORT_ENABLE: 2499 case UHF_C_PORT_SUSPEND: 2500 case UHF_C_PORT_OVER_CURRENT: 2501 case UHF_C_PORT_RESET: 2502 /* Enable RHSC interrupt if condition is cleared. */ 2503 if ((OREAD4(sc, port) >> 16) == 0) 2504 ohci_rhsc_able(sc, 1); 2505 break; 2506 default: 2507 break; 2508 } 2509 break; 2510 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2511 if (value != 0) { 2512 err = USBD_IOERROR; 2513 goto ret; 2514 } 2515 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2516 hubd = ohci_hubd; 2517 hubd.bNbrPorts = sc->sc_noport; 2518 USETW(hubd.wHubCharacteristics, 2519 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2520 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2521 /* XXX overcurrent */ 2522 ); 2523 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2524 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2525 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2526 hubd.DeviceRemovable[i++] = (u_int8_t)v; 2527 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2528 l = min(len, hubd.bDescLength); 2529 totlen = l; 2530 memcpy(buf, &hubd, l); 2531 break; 2532 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2533 if (len != 4) { 2534 err = USBD_IOERROR; 2535 goto ret; 2536 } 2537 memset(buf, 0, len); /* ? XXX */ 2538 totlen = len; 2539 break; 2540 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2541 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 2542 index)); 2543 if (index < 1 || index > sc->sc_noport) { 2544 err = USBD_IOERROR; 2545 goto ret; 2546 } 2547 if (len != 4) { 2548 err = USBD_IOERROR; 2549 goto ret; 2550 } 2551 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2552 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 2553 v)); 2554 USETW(ps.wPortStatus, v); 2555 USETW(ps.wPortChange, v >> 16); 2556 l = min(len, sizeof ps); 2557 memcpy(buf, &ps, l); 2558 totlen = l; 2559 break; 2560 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2561 err = USBD_IOERROR; 2562 goto ret; 2563 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2564 break; 2565 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2566 if (index < 1 || index > sc->sc_noport) { 2567 err = USBD_IOERROR; 2568 goto ret; 2569 } 2570 port = OHCI_RH_PORT_STATUS(index); 2571 switch(value) { 2572 case UHF_PORT_ENABLE: 2573 OWRITE4(sc, port, UPS_PORT_ENABLED); 2574 break; 2575 case UHF_PORT_SUSPEND: 2576 OWRITE4(sc, port, UPS_SUSPEND); 2577 break; 2578 case UHF_PORT_RESET: 2579 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 2580 index)); 2581 OWRITE4(sc, port, UPS_RESET); 2582 for (i = 0; i < 5; i++) { 2583 usb_delay_ms(&sc->sc_bus, 2584 USB_PORT_ROOT_RESET_DELAY); 2585 if (sc->sc_dying) { 2586 err = USBD_IOERROR; 2587 goto ret; 2588 } 2589 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2590 break; 2591 } 2592 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 2593 index, OREAD4(sc, port))); 2594 break; 2595 case UHF_PORT_POWER: 2596 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 2597 "%d\n", index)); 2598 OWRITE4(sc, port, UPS_PORT_POWER); 2599 break; 2600 default: 2601 err = USBD_IOERROR; 2602 goto ret; 2603 } 2604 break; 2605 default: 2606 err = USBD_IOERROR; 2607 goto ret; 2608 } 2609 xfer->actlen = totlen; 2610 err = USBD_NORMAL_COMPLETION; 2611 ret: 2612 xfer->status = err; 2613 s = splusb(); 2614 usb_transfer_complete(xfer); 2615 splx(s); 2616 return (USBD_IN_PROGRESS); 2617 } 2618 2619 /* Abort a root control request. */ 2620 Static void 2621 ohci_root_ctrl_abort(usbd_xfer_handle xfer) 2622 { 2623 /* Nothing to do, all transfers are synchronous. */ 2624 } 2625 2626 /* Close the root pipe. */ 2627 Static void 2628 ohci_root_ctrl_close(usbd_pipe_handle pipe) 2629 { 2630 DPRINTF(("ohci_root_ctrl_close\n")); 2631 /* Nothing to do. */ 2632 } 2633 2634 Static usbd_status 2635 ohci_root_intr_transfer(usbd_xfer_handle xfer) 2636 { 2637 usbd_status err; 2638 2639 /* Insert last in queue. */ 2640 err = usb_insert_transfer(xfer); 2641 if (err) 2642 return (err); 2643 2644 /* Pipe isn't running, start first */ 2645 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2646 } 2647 2648 Static usbd_status 2649 ohci_root_intr_start(usbd_xfer_handle xfer) 2650 { 2651 usbd_pipe_handle pipe = xfer->pipe; 2652 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2653 2654 if (sc->sc_dying) 2655 return (USBD_IOERROR); 2656 2657 sc->sc_intrxfer = xfer; 2658 2659 return (USBD_IN_PROGRESS); 2660 } 2661 2662 /* Abort a root interrupt request. */ 2663 Static void 2664 ohci_root_intr_abort(usbd_xfer_handle xfer) 2665 { 2666 int s; 2667 2668 if (xfer->pipe->intrxfer == xfer) { 2669 DPRINTF(("ohci_root_intr_abort: remove\n")); 2670 xfer->pipe->intrxfer = NULL; 2671 } 2672 xfer->status = USBD_CANCELLED; 2673 s = splusb(); 2674 usb_transfer_complete(xfer); 2675 splx(s); 2676 } 2677 2678 /* Close the root pipe. */ 2679 Static void 2680 ohci_root_intr_close(usbd_pipe_handle pipe) 2681 { 2682 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2683 2684 DPRINTF(("ohci_root_intr_close\n")); 2685 2686 sc->sc_intrxfer = NULL; 2687 } 2688 2689 /************************/ 2690 2691 Static usbd_status 2692 ohci_device_ctrl_transfer(usbd_xfer_handle xfer) 2693 { 2694 usbd_status err; 2695 2696 /* Insert last in queue. */ 2697 err = usb_insert_transfer(xfer); 2698 if (err) 2699 return (err); 2700 2701 /* Pipe isn't running, start first */ 2702 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2703 } 2704 2705 Static usbd_status 2706 ohci_device_ctrl_start(usbd_xfer_handle xfer) 2707 { 2708 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2709 usbd_status err; 2710 2711 if (sc->sc_dying) 2712 return (USBD_IOERROR); 2713 2714 #ifdef DIAGNOSTIC 2715 if (!(xfer->rqflags & URQ_REQUEST)) { 2716 /* XXX panic */ 2717 printf("ohci_device_ctrl_transfer: not a request\n"); 2718 return (USBD_INVAL); 2719 } 2720 #endif 2721 2722 err = ohci_device_request(xfer); 2723 if (err) 2724 return (err); 2725 2726 if (sc->sc_bus.use_polling) 2727 ohci_waitintr(sc, xfer); 2728 return (USBD_IN_PROGRESS); 2729 } 2730 2731 /* Abort a device control request. */ 2732 Static void 2733 ohci_device_ctrl_abort(usbd_xfer_handle xfer) 2734 { 2735 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer)); 2736 ohci_abort_xfer(xfer, USBD_CANCELLED); 2737 } 2738 2739 /* Close a device control pipe. */ 2740 Static void 2741 ohci_device_ctrl_close(usbd_pipe_handle pipe) 2742 { 2743 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2744 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2745 2746 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe)); 2747 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2748 ohci_free_std(sc, opipe->tail.td); 2749 } 2750 2751 /************************/ 2752 2753 Static void 2754 ohci_device_clear_toggle(usbd_pipe_handle pipe) 2755 { 2756 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2757 2758 opipe->sed->ed.ed_headp &= htole32(~OHCI_TOGGLECARRY); 2759 } 2760 2761 Static void 2762 ohci_noop(usbd_pipe_handle pipe) 2763 { 2764 } 2765 2766 Static usbd_status 2767 ohci_device_bulk_transfer(usbd_xfer_handle xfer) 2768 { 2769 usbd_status err; 2770 2771 /* Insert last in queue. */ 2772 err = usb_insert_transfer(xfer); 2773 if (err) 2774 return (err); 2775 2776 /* Pipe isn't running, start first */ 2777 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2778 } 2779 2780 Static usbd_status 2781 ohci_device_bulk_start(usbd_xfer_handle xfer) 2782 { 2783 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2784 usbd_device_handle dev = opipe->pipe.device; 2785 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2786 int addr = dev->address; 2787 ohci_soft_td_t *data, *tail, *tdp; 2788 ohci_soft_ed_t *sed; 2789 int s, len, isread, endpt; 2790 usbd_status err; 2791 2792 if (sc->sc_dying) 2793 return (USBD_IOERROR); 2794 2795 #ifdef DIAGNOSTIC 2796 if (xfer->rqflags & URQ_REQUEST) { 2797 /* XXX panic */ 2798 printf("ohci_device_bulk_start: a request\n"); 2799 return (USBD_INVAL); 2800 } 2801 #endif 2802 2803 len = xfer->length; 2804 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 2805 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2806 sed = opipe->sed; 2807 2808 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d " 2809 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags, 2810 endpt)); 2811 2812 opipe->u.bulk.isread = isread; 2813 opipe->u.bulk.length = len; 2814 2815 /* Update device address */ 2816 sed->ed.ed_flags = htole32( 2817 (le32toh(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) | 2818 OHCI_ED_SET_FA(addr)); 2819 2820 /* Allocate a chain of new TDs (including a new tail). */ 2821 data = opipe->tail.td; 2822 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 2823 data, &tail); 2824 /* We want interrupt at the end of the transfer. */ 2825 tail->td.td_flags &= htole32(~OHCI_TD_INTR_MASK); 2826 tail->td.td_flags |= htole32(OHCI_TD_SET_DI(1)); 2827 tail->flags |= OHCI_CALL_DONE; 2828 tail = tail->nexttd; /* point at sentinel */ 2829 if (err) 2830 return (err); 2831 2832 tail->xfer = NULL; 2833 xfer->hcpriv = data; 2834 2835 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x " 2836 "td_cbp=0x%08x td_be=0x%08x\n", 2837 (int)le32toh(sed->ed.ed_flags), 2838 (int)le32toh(data->td.td_flags), 2839 (int)le32toh(data->td.td_cbp), 2840 (int)le32toh(data->td.td_be))); 2841 2842 #ifdef OHCI_DEBUG 2843 if (ohcidebug > 5) { 2844 ohci_dump_ed(sed); 2845 ohci_dump_tds(data); 2846 } 2847 #endif 2848 2849 /* Insert ED in schedule */ 2850 s = splusb(); 2851 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 2852 tdp->xfer = xfer; 2853 } 2854 sed->ed.ed_tailp = htole32(tail->physaddr); 2855 opipe->tail.td = tail; 2856 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 2857 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 2858 if (xfer->timeout && !sc->sc_bus.use_polling) { 2859 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout), 2860 ohci_timeout, xfer); 2861 } 2862 2863 #if 0 2864 /* This goes wrong if we are too slow. */ 2865 if (ohcidebug > 10) { 2866 delay(10000); 2867 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2868 OREAD4(sc, OHCI_COMMAND_STATUS))); 2869 ohci_dump_ed(sed); 2870 ohci_dump_tds(data); 2871 } 2872 #endif 2873 2874 splx(s); 2875 2876 return (USBD_IN_PROGRESS); 2877 } 2878 2879 Static void 2880 ohci_device_bulk_abort(usbd_xfer_handle xfer) 2881 { 2882 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer)); 2883 ohci_abort_xfer(xfer, USBD_CANCELLED); 2884 } 2885 2886 /* 2887 * Close a device bulk pipe. 2888 */ 2889 Static void 2890 ohci_device_bulk_close(usbd_pipe_handle pipe) 2891 { 2892 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2893 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2894 2895 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe)); 2896 ohci_close_pipe(pipe, sc->sc_bulk_head); 2897 ohci_free_std(sc, opipe->tail.td); 2898 } 2899 2900 /************************/ 2901 2902 Static usbd_status 2903 ohci_device_intr_transfer(usbd_xfer_handle xfer) 2904 { 2905 usbd_status err; 2906 2907 /* Insert last in queue. */ 2908 err = usb_insert_transfer(xfer); 2909 if (err) 2910 return (err); 2911 2912 /* Pipe isn't running, start first */ 2913 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2914 } 2915 2916 Static usbd_status 2917 ohci_device_intr_start(usbd_xfer_handle xfer) 2918 { 2919 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2920 usbd_device_handle dev = opipe->pipe.device; 2921 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2922 ohci_soft_ed_t *sed = opipe->sed; 2923 ohci_soft_td_t *data, *tail; 2924 int len; 2925 int s; 2926 2927 if (sc->sc_dying) 2928 return (USBD_IOERROR); 2929 2930 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d " 2931 "flags=%d priv=%p\n", 2932 xfer, xfer->length, xfer->flags, xfer->priv)); 2933 2934 #ifdef DIAGNOSTIC 2935 if (xfer->rqflags & URQ_REQUEST) 2936 panic("ohci_device_intr_transfer: a request\n"); 2937 #endif 2938 2939 len = xfer->length; 2940 2941 data = opipe->tail.td; 2942 tail = ohci_alloc_std(sc); 2943 if (tail == NULL) 2944 return (USBD_NOMEM); 2945 tail->xfer = NULL; 2946 2947 data->td.td_flags = htole32( 2948 OHCI_TD_IN | OHCI_TD_NOCC | 2949 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 2950 if (xfer->flags & USBD_SHORT_XFER_OK) 2951 data->td.td_flags |= htole32(OHCI_TD_R); 2952 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf)); 2953 data->nexttd = tail; 2954 data->td.td_nexttd = htole32(tail->physaddr); 2955 data->td.td_be = htole32(le32toh(data->td.td_cbp) + len - 1); 2956 data->len = len; 2957 data->xfer = xfer; 2958 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 2959 xfer->hcpriv = data; 2960 2961 #ifdef OHCI_DEBUG 2962 if (ohcidebug > 5) { 2963 DPRINTF(("ohci_device_intr_transfer:\n")); 2964 ohci_dump_ed(sed); 2965 ohci_dump_tds(data); 2966 } 2967 #endif 2968 2969 /* Insert ED in schedule */ 2970 s = splusb(); 2971 sed->ed.ed_tailp = htole32(tail->physaddr); 2972 opipe->tail.td = tail; 2973 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 2974 2975 #if 0 2976 /* 2977 * This goes horribly wrong, printing thousands of descriptors, 2978 * because false references are followed due to the fact that the 2979 * TD is gone. 2980 */ 2981 if (ohcidebug > 5) { 2982 usb_delay_ms(&sc->sc_bus, 5); 2983 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2984 OREAD4(sc, OHCI_COMMAND_STATUS))); 2985 ohci_dump_ed(sed); 2986 ohci_dump_tds(data); 2987 } 2988 #endif 2989 splx(s); 2990 2991 return (USBD_IN_PROGRESS); 2992 } 2993 2994 /* Abort a device control request. */ 2995 Static void 2996 ohci_device_intr_abort(usbd_xfer_handle xfer) 2997 { 2998 if (xfer->pipe->intrxfer == xfer) { 2999 DPRINTF(("ohci_device_intr_abort: remove\n")); 3000 xfer->pipe->intrxfer = NULL; 3001 } 3002 ohci_abort_xfer(xfer, USBD_CANCELLED); 3003 } 3004 3005 /* Close a device interrupt pipe. */ 3006 Static void 3007 ohci_device_intr_close(usbd_pipe_handle pipe) 3008 { 3009 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3010 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3011 int nslots = opipe->u.intr.nslots; 3012 int pos = opipe->u.intr.pos; 3013 int j; 3014 ohci_soft_ed_t *p, *sed = opipe->sed; 3015 int s; 3016 3017 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 3018 pipe, nslots, pos)); 3019 s = splusb(); 3020 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 3021 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 3022 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) 3023 usb_delay_ms(&sc->sc_bus, 2); 3024 3025 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 3026 ; 3027 #ifdef DIAGNOSTIC 3028 if (p == NULL) 3029 panic("ohci_device_intr_close: ED not found\n"); 3030 #endif 3031 p->next = sed->next; 3032 p->ed.ed_nexted = sed->ed.ed_nexted; 3033 splx(s); 3034 3035 for (j = 0; j < nslots; j++) 3036 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 3037 3038 ohci_free_std(sc, opipe->tail.td); 3039 ohci_free_sed(sc, opipe->sed); 3040 } 3041 3042 Static usbd_status 3043 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival) 3044 { 3045 int i, j, s, best; 3046 u_int npoll, slow, shigh, nslots; 3047 u_int bestbw, bw; 3048 ohci_soft_ed_t *hsed, *sed = opipe->sed; 3049 3050 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 3051 if (ival == 0) { 3052 printf("ohci_setintr: 0 interval\n"); 3053 return (USBD_INVAL); 3054 } 3055 3056 npoll = OHCI_NO_INTRS; 3057 while (npoll > ival) 3058 npoll /= 2; 3059 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 3060 3061 /* 3062 * We now know which level in the tree the ED must go into. 3063 * Figure out which slot has most bandwidth left over. 3064 * Slots to examine: 3065 * npoll 3066 * 1 0 3067 * 2 1 2 3068 * 4 3 4 5 6 3069 * 8 7 8 9 10 11 12 13 14 3070 * N (N-1) .. (N-1+N-1) 3071 */ 3072 slow = npoll-1; 3073 shigh = slow + npoll; 3074 nslots = OHCI_NO_INTRS / npoll; 3075 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 3076 bw = 0; 3077 for (j = 0; j < nslots; j++) 3078 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 3079 if (bw < bestbw) { 3080 best = i; 3081 bestbw = bw; 3082 } 3083 } 3084 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 3085 best, slow, shigh, bestbw)); 3086 3087 s = splusb(); 3088 hsed = sc->sc_eds[best]; 3089 sed->next = hsed->next; 3090 sed->ed.ed_nexted = hsed->ed.ed_nexted; 3091 hsed->next = sed; 3092 hsed->ed.ed_nexted = htole32(sed->physaddr); 3093 splx(s); 3094 3095 for (j = 0; j < nslots; j++) 3096 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 3097 opipe->u.intr.nslots = nslots; 3098 opipe->u.intr.pos = best; 3099 3100 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 3101 return (USBD_NORMAL_COMPLETION); 3102 } 3103 3104 /***********************/ 3105 3106 usbd_status 3107 ohci_device_isoc_transfer(usbd_xfer_handle xfer) 3108 { 3109 usbd_status err; 3110 3111 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer)); 3112 3113 /* Put it on our queue, */ 3114 err = usb_insert_transfer(xfer); 3115 3116 /* bail out on error, */ 3117 if (err && err != USBD_IN_PROGRESS) 3118 return (err); 3119 3120 /* XXX should check inuse here */ 3121 3122 /* insert into schedule, */ 3123 ohci_device_isoc_enter(xfer); 3124 3125 /* and start if the pipe wasn't running */ 3126 if (!err) 3127 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 3128 3129 return (err); 3130 } 3131 3132 void 3133 ohci_device_isoc_enter(usbd_xfer_handle xfer) 3134 { 3135 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3136 usbd_device_handle dev = opipe->pipe.device; 3137 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 3138 ohci_soft_ed_t *sed = opipe->sed; 3139 struct iso *iso = &opipe->u.iso; 3140 ohci_soft_itd_t *sitd, *nsitd; 3141 ohci_physaddr_t buf, offs, noffs, bp0; 3142 int i, ncur, nframes; 3143 int s; 3144 3145 DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p " 3146 "nframes=%d\n", 3147 iso->inuse, iso->next, xfer, xfer->nframes)); 3148 3149 if (sc->sc_dying) 3150 return; 3151 3152 if (iso->next == -1) { 3153 /* Not in use yet, schedule it a few frames ahead. */ 3154 iso->next = le32toh(sc->sc_hcca->hcca_frame_number) + 5; 3155 DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n", 3156 iso->next)); 3157 } 3158 3159 sitd = opipe->tail.itd; 3160 buf = DMAADDR(&xfer->dmabuf); 3161 bp0 = OHCI_PAGE(buf); 3162 offs = OHCI_PAGE_OFFSET(buf); 3163 nframes = xfer->nframes; 3164 xfer->hcpriv = sitd; 3165 for (i = ncur = 0; i < nframes; i++, ncur++) { 3166 noffs = offs + xfer->frlengths[i]; 3167 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ 3168 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */ 3169 3170 /* Allocate next ITD */ 3171 nsitd = ohci_alloc_sitd(sc); 3172 if (nsitd == NULL) { 3173 /* XXX what now? */ 3174 printf("%s: isoc TD alloc failed\n", 3175 USBDEVNAME(sc->sc_bus.bdev)); 3176 return; 3177 } 3178 3179 /* Fill current ITD */ 3180 sitd->itd.itd_flags = htole32( 3181 OHCI_ITD_NOCC | 3182 OHCI_ITD_SET_SF(iso->next) | 3183 OHCI_ITD_SET_DI(6) | /* delay intr a little */ 3184 OHCI_ITD_SET_FC(ncur)); 3185 sitd->itd.itd_bp0 = htole32(bp0); 3186 sitd->nextitd = nsitd; 3187 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 3188 sitd->itd.itd_be = htole32(bp0 + offs - 1); 3189 sitd->xfer = xfer; 3190 sitd->flags = 0; 3191 3192 sitd = nsitd; 3193 iso->next = iso->next + ncur; 3194 bp0 = OHCI_PAGE(buf + offs); 3195 ncur = 0; 3196 } 3197 sitd->itd.itd_offset[ncur] = htole16(OHCI_ITD_MK_OFFS(offs)); 3198 offs = noffs; 3199 } 3200 nsitd = ohci_alloc_sitd(sc); 3201 if (nsitd == NULL) { 3202 /* XXX what now? */ 3203 printf("%s: isoc TD alloc failed\n", 3204 USBDEVNAME(sc->sc_bus.bdev)); 3205 return; 3206 } 3207 /* Fixup last used ITD */ 3208 sitd->itd.itd_flags = htole32( 3209 OHCI_ITD_NOCC | 3210 OHCI_ITD_SET_SF(iso->next) | 3211 OHCI_ITD_SET_DI(0) | 3212 OHCI_ITD_SET_FC(ncur)); 3213 sitd->itd.itd_bp0 = htole32(bp0); 3214 sitd->nextitd = nsitd; 3215 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 3216 sitd->itd.itd_be = htole32(bp0 + offs - 1); 3217 sitd->xfer = xfer; 3218 sitd->flags = OHCI_CALL_DONE; 3219 3220 iso->next = iso->next + ncur; 3221 iso->inuse += nframes; 3222 3223 xfer->actlen = offs; /* XXX pretend we did it all */ 3224 3225 xfer->status = USBD_IN_PROGRESS; 3226 3227 #ifdef OHCI_DEBUG 3228 if (ohcidebug > 5) { 3229 DPRINTF(("ohci_device_isoc_enter: frame=%d\n", 3230 le32toh(sc->sc_hcca->hcca_frame_number))); 3231 ohci_dump_itds(xfer->hcpriv); 3232 ohci_dump_ed(sed); 3233 } 3234 #endif 3235 3236 s = splusb(); 3237 opipe->tail.itd = nsitd; 3238 sed->ed.ed_tailp = htole32(nsitd->physaddr); 3239 splx(s); 3240 3241 #ifdef OHCI_DEBUG 3242 if (ohcidebug > 5) { 3243 delay(150000); 3244 DPRINTF(("ohci_device_isoc_enter: after frame=%d\n", 3245 le32toh(sc->sc_hcca->hcca_frame_number))); 3246 ohci_dump_itds(xfer->hcpriv); 3247 ohci_dump_ed(sed); 3248 } 3249 #endif 3250 } 3251 3252 usbd_status 3253 ohci_device_isoc_start(usbd_xfer_handle xfer) 3254 { 3255 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3256 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3257 3258 DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer)); 3259 3260 if (sc->sc_dying) 3261 return (USBD_IOERROR); 3262 3263 #ifdef DIAGNOSTIC 3264 if (xfer->status != USBD_IN_PROGRESS) 3265 printf("uhci_device_isoc_start: not in progress %p\n", xfer); 3266 #endif 3267 3268 /* XXX anything to do? */ 3269 3270 return (USBD_IN_PROGRESS); 3271 } 3272 3273 void 3274 ohci_device_isoc_abort(usbd_xfer_handle xfer) 3275 { 3276 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3277 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3278 ohci_soft_ed_t *sed; 3279 ohci_soft_itd_t *sitd; 3280 int s; 3281 3282 s = splusb(); 3283 3284 DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer)); 3285 3286 /* Transfer is already done. */ 3287 if (xfer->status != USBD_NOT_STARTED && 3288 xfer->status != USBD_IN_PROGRESS) { 3289 splx(s); 3290 printf("ohci_device_isoc_abort: early return\n"); 3291 return; 3292 } 3293 3294 /* Give xfer the requested abort code. */ 3295 xfer->status = USBD_CANCELLED; 3296 3297 sed = opipe->sed; 3298 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 3299 3300 sitd = xfer->hcpriv; 3301 #ifdef DIAGNOSTIC 3302 if (sitd == NULL) { 3303 splx(s); 3304 printf("ohci_device_isoc_abort: hcpriv==0\n"); 3305 return; 3306 } 3307 #endif 3308 for (; sitd->xfer == xfer; sitd = sitd->nextitd) { 3309 #ifdef DIAGNOSTIC 3310 DPRINTFN(1,("abort sets done sitd=%p\n", sitd)); 3311 sitd->isdone = 1; 3312 #endif 3313 } 3314 3315 splx(s); 3316 3317 usb_delay_ms(&sc->sc_bus, OHCI_ITD_NOFFSET); 3318 3319 s = splusb(); 3320 3321 /* Run callback. */ 3322 usb_transfer_complete(xfer); 3323 3324 sed->ed.ed_headp = htole32(sitd->physaddr); /* unlink TDs */ 3325 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 3326 3327 splx(s); 3328 } 3329 3330 void 3331 ohci_device_isoc_done(usbd_xfer_handle xfer) 3332 { 3333 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3334 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3335 ohci_soft_itd_t *sitd, *nsitd; 3336 3337 DPRINTFN(1,("ohci_device_isoc_done: xfer=%p\n", xfer)); 3338 3339 for (sitd = xfer->hcpriv; 3340 !(sitd->flags & OHCI_CALL_DONE); 3341 sitd = nsitd) { 3342 nsitd = sitd->nextitd; 3343 DPRINTFN(1,("ohci_device_isoc_done: free sitd=%p\n", sitd)); 3344 ohci_free_sitd(sc, sitd); 3345 } 3346 ohci_free_sitd(sc, sitd); 3347 xfer->hcpriv = NULL; 3348 } 3349 3350 usbd_status 3351 ohci_setup_isoc(usbd_pipe_handle pipe) 3352 { 3353 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3354 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3355 struct iso *iso = &opipe->u.iso; 3356 int s; 3357 3358 iso->next = -1; 3359 iso->inuse = 0; 3360 3361 s = splusb(); 3362 ohci_add_ed(opipe->sed, sc->sc_isoc_head); 3363 splx(s); 3364 3365 return (USBD_NORMAL_COMPLETION); 3366 } 3367 3368 void 3369 ohci_device_isoc_close(usbd_pipe_handle pipe) 3370 { 3371 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3372 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3373 int s; 3374 3375 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe)); 3376 3377 s = splusb(); 3378 ohci_rem_ed(opipe->sed, sc->sc_isoc_head); 3379 splx(s); 3380 ohci_close_pipe(pipe, sc->sc_isoc_head); 3381 #ifdef DIAGNOSTIC 3382 opipe->tail.itd->isdone = 1; 3383 #endif 3384 ohci_free_sitd(sc, opipe->tail.itd); 3385 } 3386
Indexes created Fri Sep 26 20:09:58 GMT 2025