ohci.c revision 1.129
1 /* $NetBSD: ohci.c,v 1.129 2002/09/29 20:58:25 augustss Exp $ */ 2 /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */ 3 4 /* 5 * Copyright (c) 1998 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Lennart Augustsson (lennart (at) augustsson.net) at 10 * Carlstedt Research & Technology. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. All advertising materials mentioning features or use of this software 21 * must display the following acknowledgement: 22 * This product includes software developed by the NetBSD 23 * Foundation, Inc. and its contributors. 24 * 4. Neither the name of The NetBSD Foundation nor the names of its 25 * contributors may be used to endorse or promote products derived 26 * from this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 29 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 30 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 31 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 32 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 33 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 34 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 35 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 36 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 37 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 * POSSIBILITY OF SUCH DAMAGE. 39 */ 40 41 /* 42 * USB Open Host Controller driver. 43 * 44 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html 45 * USB spec: http://www.usb.org/developers/data/usbspec.zip 46 */ 47 48 #include <sys/cdefs.h> 49 __KERNEL_RCSID(0, "$NetBSD: ohci.c,v 1.129 2002/09/29 20:58:25 augustss Exp $"); 50 51 #include <sys/param.h> 52 #include <sys/systm.h> 53 #include <sys/malloc.h> 54 #if defined(__NetBSD__) || defined(__OpenBSD__) 55 #include <sys/kernel.h> 56 #include <sys/device.h> 57 #include <sys/select.h> 58 #elif defined(__FreeBSD__) 59 #include <sys/module.h> 60 #include <sys/bus.h> 61 #include <machine/bus_pio.h> 62 #include <machine/bus_memio.h> 63 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 64 #include <machine/cpu.h> 65 #endif 66 #endif 67 #include <sys/proc.h> 68 #include <sys/queue.h> 69 70 #include <machine/bus.h> 71 #include <machine/endian.h> 72 73 #include <dev/usb/usb.h> 74 #include <dev/usb/usbdi.h> 75 #include <dev/usb/usbdivar.h> 76 #include <dev/usb/usb_mem.h> 77 #include <dev/usb/usb_quirks.h> 78 79 #include <dev/usb/ohcireg.h> 80 #include <dev/usb/ohcivar.h> 81 82 #if defined(__FreeBSD__) 83 #include <machine/clock.h> 84 85 #define delay(d) DELAY(d) 86 #endif 87 88 #if defined(__OpenBSD__) 89 struct cfdriver ohci_cd = { 90 NULL, "ohci", DV_DULL 91 }; 92 #endif 93 94 #ifdef OHCI_DEBUG 95 #define DPRINTF(x) if (ohcidebug) logprintf x 96 #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x 97 int ohcidebug = 0; 98 #ifndef __NetBSD__ 99 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 100 #endif 101 #else 102 #define DPRINTF(x) 103 #define DPRINTFN(n,x) 104 #endif 105 106 /* 107 * The OHCI controller is little endian, so on big endian machines 108 * the data strored in memory needs to be swapped. 109 */ 110 #if defined(__FreeBSD__) || defined(__OpenBSD__) 111 #if BYTE_ORDER == BIG_ENDIAN 112 #define htole32(x) (bswap32(x)) 113 #define le32toh(x) (bswap32(x)) 114 #else 115 #define htole32(x) (x) 116 #define le32toh(x) (x) 117 #endif 118 #endif 119 120 struct ohci_pipe; 121 122 Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *); 123 Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *); 124 125 Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *); 126 Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *); 127 128 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *); 129 Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *); 130 131 #if 0 132 Static void ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *, 133 ohci_soft_td_t *); 134 #endif 135 Static usbd_status ohci_alloc_std_chain(struct ohci_pipe *, 136 ohci_softc_t *, int, int, usbd_xfer_handle, 137 ohci_soft_td_t *, ohci_soft_td_t **); 138 139 Static void ohci_shutdown(void *v); 140 Static void ohci_power(int, void *); 141 Static usbd_status ohci_open(usbd_pipe_handle); 142 Static void ohci_poll(struct usbd_bus *); 143 Static void ohci_softintr(void *); 144 Static void ohci_waitintr(ohci_softc_t *, usbd_xfer_handle); 145 Static void ohci_add_done(ohci_softc_t *, ohci_physaddr_t); 146 Static void ohci_rhsc(ohci_softc_t *, usbd_xfer_handle); 147 148 Static usbd_status ohci_device_request(usbd_xfer_handle xfer); 149 Static void ohci_add_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 150 Static void ohci_rem_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 151 Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *); 152 Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *); 153 Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t); 154 Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *); 155 Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *); 156 Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t); 157 158 Static usbd_status ohci_setup_isoc(usbd_pipe_handle pipe); 159 Static void ohci_device_isoc_enter(usbd_xfer_handle); 160 161 Static usbd_status ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 162 Static void ohci_freem(struct usbd_bus *, usb_dma_t *); 163 164 Static usbd_xfer_handle ohci_allocx(struct usbd_bus *); 165 Static void ohci_freex(struct usbd_bus *, usbd_xfer_handle); 166 167 Static usbd_status ohci_root_ctrl_transfer(usbd_xfer_handle); 168 Static usbd_status ohci_root_ctrl_start(usbd_xfer_handle); 169 Static void ohci_root_ctrl_abort(usbd_xfer_handle); 170 Static void ohci_root_ctrl_close(usbd_pipe_handle); 171 Static void ohci_root_ctrl_done(usbd_xfer_handle); 172 173 Static usbd_status ohci_root_intr_transfer(usbd_xfer_handle); 174 Static usbd_status ohci_root_intr_start(usbd_xfer_handle); 175 Static void ohci_root_intr_abort(usbd_xfer_handle); 176 Static void ohci_root_intr_close(usbd_pipe_handle); 177 Static void ohci_root_intr_done(usbd_xfer_handle); 178 179 Static usbd_status ohci_device_ctrl_transfer(usbd_xfer_handle); 180 Static usbd_status ohci_device_ctrl_start(usbd_xfer_handle); 181 Static void ohci_device_ctrl_abort(usbd_xfer_handle); 182 Static void ohci_device_ctrl_close(usbd_pipe_handle); 183 Static void ohci_device_ctrl_done(usbd_xfer_handle); 184 185 Static usbd_status ohci_device_bulk_transfer(usbd_xfer_handle); 186 Static usbd_status ohci_device_bulk_start(usbd_xfer_handle); 187 Static void ohci_device_bulk_abort(usbd_xfer_handle); 188 Static void ohci_device_bulk_close(usbd_pipe_handle); 189 Static void ohci_device_bulk_done(usbd_xfer_handle); 190 191 Static usbd_status ohci_device_intr_transfer(usbd_xfer_handle); 192 Static usbd_status ohci_device_intr_start(usbd_xfer_handle); 193 Static void ohci_device_intr_abort(usbd_xfer_handle); 194 Static void ohci_device_intr_close(usbd_pipe_handle); 195 Static void ohci_device_intr_done(usbd_xfer_handle); 196 197 Static usbd_status ohci_device_isoc_transfer(usbd_xfer_handle); 198 Static usbd_status ohci_device_isoc_start(usbd_xfer_handle); 199 Static void ohci_device_isoc_abort(usbd_xfer_handle); 200 Static void ohci_device_isoc_close(usbd_pipe_handle); 201 Static void ohci_device_isoc_done(usbd_xfer_handle); 202 203 Static usbd_status ohci_device_setintr(ohci_softc_t *sc, 204 struct ohci_pipe *pipe, int ival); 205 206 Static int ohci_str(usb_string_descriptor_t *, int, const char *); 207 208 Static void ohci_timeout(void *); 209 Static void ohci_timeout_task(void *); 210 Static void ohci_rhsc_able(ohci_softc_t *, int); 211 Static void ohci_rhsc_enable(void *); 212 213 Static void ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *); 214 Static void ohci_abort_xfer(usbd_xfer_handle, usbd_status); 215 216 Static void ohci_device_clear_toggle(usbd_pipe_handle pipe); 217 Static void ohci_noop(usbd_pipe_handle pipe); 218 219 #ifdef OHCI_DEBUG 220 Static void ohci_dumpregs(ohci_softc_t *); 221 Static void ohci_dump_tds(ohci_soft_td_t *); 222 Static void ohci_dump_td(ohci_soft_td_t *); 223 Static void ohci_dump_ed(ohci_soft_ed_t *); 224 Static void ohci_dump_itd(ohci_soft_itd_t *); 225 Static void ohci_dump_itds(ohci_soft_itd_t *); 226 #endif 227 228 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 229 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 230 #define OWRITE1(sc, r, x) \ 231 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 232 #define OWRITE2(sc, r, x) \ 233 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 234 #define OWRITE4(sc, r, x) \ 235 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 236 #define OREAD1(sc, r) (OBARR(sc), bus_space_read_1((sc)->iot, (sc)->ioh, (r))) 237 #define OREAD2(sc, r) (OBARR(sc), bus_space_read_2((sc)->iot, (sc)->ioh, (r))) 238 #define OREAD4(sc, r) (OBARR(sc), bus_space_read_4((sc)->iot, (sc)->ioh, (r))) 239 240 /* Reverse the bits in a value 0 .. 31 */ 241 Static u_int8_t revbits[OHCI_NO_INTRS] = 242 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 243 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 244 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 245 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 246 247 struct ohci_pipe { 248 struct usbd_pipe pipe; 249 ohci_soft_ed_t *sed; 250 union { 251 ohci_soft_td_t *td; 252 ohci_soft_itd_t *itd; 253 } tail; 254 /* Info needed for different pipe kinds. */ 255 union { 256 /* Control pipe */ 257 struct { 258 usb_dma_t reqdma; 259 u_int length; 260 ohci_soft_td_t *setup, *data, *stat; 261 } ctl; 262 /* Interrupt pipe */ 263 struct { 264 int nslots; 265 int pos; 266 } intr; 267 /* Bulk pipe */ 268 struct { 269 u_int length; 270 int isread; 271 } bulk; 272 /* Iso pipe */ 273 struct iso { 274 int next, inuse; 275 } iso; 276 } u; 277 }; 278 279 #define OHCI_INTR_ENDPT 1 280 281 Static struct usbd_bus_methods ohci_bus_methods = { 282 ohci_open, 283 ohci_softintr, 284 ohci_poll, 285 ohci_allocm, 286 ohci_freem, 287 ohci_allocx, 288 ohci_freex, 289 }; 290 291 Static struct usbd_pipe_methods ohci_root_ctrl_methods = { 292 ohci_root_ctrl_transfer, 293 ohci_root_ctrl_start, 294 ohci_root_ctrl_abort, 295 ohci_root_ctrl_close, 296 ohci_noop, 297 ohci_root_ctrl_done, 298 }; 299 300 Static struct usbd_pipe_methods ohci_root_intr_methods = { 301 ohci_root_intr_transfer, 302 ohci_root_intr_start, 303 ohci_root_intr_abort, 304 ohci_root_intr_close, 305 ohci_noop, 306 ohci_root_intr_done, 307 }; 308 309 Static struct usbd_pipe_methods ohci_device_ctrl_methods = { 310 ohci_device_ctrl_transfer, 311 ohci_device_ctrl_start, 312 ohci_device_ctrl_abort, 313 ohci_device_ctrl_close, 314 ohci_noop, 315 ohci_device_ctrl_done, 316 }; 317 318 Static struct usbd_pipe_methods ohci_device_intr_methods = { 319 ohci_device_intr_transfer, 320 ohci_device_intr_start, 321 ohci_device_intr_abort, 322 ohci_device_intr_close, 323 ohci_device_clear_toggle, 324 ohci_device_intr_done, 325 }; 326 327 Static struct usbd_pipe_methods ohci_device_bulk_methods = { 328 ohci_device_bulk_transfer, 329 ohci_device_bulk_start, 330 ohci_device_bulk_abort, 331 ohci_device_bulk_close, 332 ohci_device_clear_toggle, 333 ohci_device_bulk_done, 334 }; 335 336 Static struct usbd_pipe_methods ohci_device_isoc_methods = { 337 ohci_device_isoc_transfer, 338 ohci_device_isoc_start, 339 ohci_device_isoc_abort, 340 ohci_device_isoc_close, 341 ohci_noop, 342 ohci_device_isoc_done, 343 }; 344 345 #if defined(__NetBSD__) || defined(__OpenBSD__) 346 int 347 ohci_activate(device_ptr_t self, enum devact act) 348 { 349 struct ohci_softc *sc = (struct ohci_softc *)self; 350 int rv = 0; 351 352 switch (act) { 353 case DVACT_ACTIVATE: 354 return (EOPNOTSUPP); 355 break; 356 357 case DVACT_DEACTIVATE: 358 if (sc->sc_child != NULL) 359 rv = config_deactivate(sc->sc_child); 360 sc->sc_dying = 1; 361 break; 362 } 363 return (rv); 364 } 365 366 int 367 ohci_detach(struct ohci_softc *sc, int flags) 368 { 369 int rv = 0; 370 371 if (sc->sc_child != NULL) 372 rv = config_detach(sc->sc_child, flags); 373 374 if (rv != 0) 375 return (rv); 376 377 usb_uncallout(sc->sc_tmo_rhsc, ohci_rhsc_enable, sc); 378 379 #if defined(__NetBSD__) || defined(__OpenBSD__) 380 powerhook_disestablish(sc->sc_powerhook); 381 shutdownhook_disestablish(sc->sc_shutdownhook); 382 #endif 383 384 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 385 386 /* free data structures XXX */ 387 388 return (rv); 389 } 390 #endif 391 392 ohci_soft_ed_t * 393 ohci_alloc_sed(ohci_softc_t *sc) 394 { 395 ohci_soft_ed_t *sed; 396 usbd_status err; 397 int i, offs; 398 usb_dma_t dma; 399 400 if (sc->sc_freeeds == NULL) { 401 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 402 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 403 OHCI_ED_ALIGN, &dma); 404 if (err) 405 return (0); 406 for(i = 0; i < OHCI_SED_CHUNK; i++) { 407 offs = i * OHCI_SED_SIZE; 408 sed = KERNADDR(&dma, offs); 409 sed->physaddr = DMAADDR(&dma, offs); 410 sed->next = sc->sc_freeeds; 411 sc->sc_freeeds = sed; 412 } 413 } 414 sed = sc->sc_freeeds; 415 sc->sc_freeeds = sed->next; 416 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 417 sed->next = 0; 418 return (sed); 419 } 420 421 void 422 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 423 { 424 sed->next = sc->sc_freeeds; 425 sc->sc_freeeds = sed; 426 } 427 428 ohci_soft_td_t * 429 ohci_alloc_std(ohci_softc_t *sc) 430 { 431 ohci_soft_td_t *std; 432 usbd_status err; 433 int i, offs; 434 usb_dma_t dma; 435 int s; 436 437 if (sc->sc_freetds == NULL) { 438 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 439 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 440 OHCI_TD_ALIGN, &dma); 441 if (err) 442 return (NULL); 443 s = splusb(); 444 for(i = 0; i < OHCI_STD_CHUNK; i++) { 445 offs = i * OHCI_STD_SIZE; 446 std = KERNADDR(&dma, offs); 447 std->physaddr = DMAADDR(&dma, offs); 448 std->nexttd = sc->sc_freetds; 449 sc->sc_freetds = std; 450 } 451 splx(s); 452 } 453 454 s = splusb(); 455 std = sc->sc_freetds; 456 sc->sc_freetds = std->nexttd; 457 memset(&std->td, 0, sizeof(ohci_td_t)); 458 std->nexttd = NULL; 459 std->xfer = NULL; 460 ohci_hash_add_td(sc, std); 461 splx(s); 462 463 return (std); 464 } 465 466 void 467 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std) 468 { 469 int s; 470 471 s = splusb(); 472 ohci_hash_rem_td(sc, std); 473 std->nexttd = sc->sc_freetds; 474 sc->sc_freetds = std; 475 splx(s); 476 } 477 478 usbd_status 479 ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc, 480 int alen, int rd, usbd_xfer_handle xfer, 481 ohci_soft_td_t *sp, ohci_soft_td_t **ep) 482 { 483 ohci_soft_td_t *next, *cur; 484 ohci_physaddr_t dataphys, dataphysend; 485 u_int32_t tdflags; 486 int len, curlen; 487 usb_dma_t *dma = &xfer->dmabuf; 488 u_int16_t flags = xfer->flags; 489 490 DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen)); 491 492 len = alen; 493 cur = sp; 494 dataphys = DMAADDR(dma, 0); 495 dataphysend = OHCI_PAGE(dataphys + len - 1); 496 tdflags = htole32( 497 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 498 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) | 499 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR); 500 501 for (;;) { 502 next = ohci_alloc_std(sc); 503 if (next == NULL) 504 goto nomem; 505 506 /* The OHCI hardware can handle at most one page crossing. */ 507 if (OHCI_PAGE(dataphys) == dataphysend || 508 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) { 509 /* we can handle it in this TD */ 510 curlen = len; 511 } else { 512 /* must use multiple TDs, fill as much as possible. */ 513 curlen = 2 * OHCI_PAGE_SIZE - 514 (dataphys & (OHCI_PAGE_SIZE-1)); 515 /* the length must be a multiple of the max size */ 516 curlen -= curlen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize); 517 #ifdef DIAGNOSTIC 518 if (curlen == 0) 519 panic("ohci_alloc_std: curlen == 0"); 520 #endif 521 } 522 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x " 523 "dataphysend=0x%08x len=%d curlen=%d\n", 524 dataphys, dataphysend, 525 len, curlen)); 526 len -= curlen; 527 528 cur->td.td_flags = tdflags; 529 cur->td.td_cbp = htole32(dataphys); 530 cur->nexttd = next; 531 cur->td.td_nexttd = htole32(next->physaddr); 532 cur->td.td_be = htole32(dataphys + curlen - 1); 533 cur->len = curlen; 534 cur->flags = OHCI_ADD_LEN; 535 cur->xfer = xfer; 536 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n", 537 dataphys, dataphys + curlen - 1)); 538 if (len == 0) 539 break; 540 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n")); 541 dataphys += curlen; 542 cur = next; 543 } 544 if ((flags & USBD_FORCE_SHORT_XFER) && 545 alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) { 546 /* Force a 0 length transfer at the end. */ 547 548 cur = next; 549 next = ohci_alloc_std(sc); 550 if (next == NULL) 551 goto nomem; 552 553 cur->td.td_flags = tdflags; 554 cur->td.td_cbp = 0; /* indicate 0 length packet */ 555 cur->nexttd = next; 556 cur->td.td_nexttd = htole32(next->physaddr); 557 cur->td.td_be = ~0; 558 cur->len = 0; 559 cur->flags = 0; 560 cur->xfer = xfer; 561 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n")); 562 } 563 *ep = cur; 564 565 return (USBD_NORMAL_COMPLETION); 566 567 nomem: 568 /* XXX free chain */ 569 return (USBD_NOMEM); 570 } 571 572 #if 0 573 Static void 574 ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std, 575 ohci_soft_td_t *stdend) 576 { 577 ohci_soft_td_t *p; 578 579 for (; std != stdend; std = p) { 580 p = std->nexttd; 581 ohci_free_std(sc, std); 582 } 583 } 584 #endif 585 586 ohci_soft_itd_t * 587 ohci_alloc_sitd(ohci_softc_t *sc) 588 { 589 ohci_soft_itd_t *sitd; 590 usbd_status err; 591 int i, s, offs; 592 usb_dma_t dma; 593 594 if (sc->sc_freeitds == NULL) { 595 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n")); 596 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK, 597 OHCI_ITD_ALIGN, &dma); 598 if (err) 599 return (NULL); 600 s = splusb(); 601 for(i = 0; i < OHCI_SITD_CHUNK; i++) { 602 offs = i * OHCI_SITD_SIZE; 603 sitd = KERNADDR(&dma, offs); 604 sitd->physaddr = DMAADDR(&dma, offs); 605 sitd->nextitd = sc->sc_freeitds; 606 sc->sc_freeitds = sitd; 607 } 608 splx(s); 609 } 610 611 s = splusb(); 612 sitd = sc->sc_freeitds; 613 sc->sc_freeitds = sitd->nextitd; 614 memset(&sitd->itd, 0, sizeof(ohci_itd_t)); 615 sitd->nextitd = NULL; 616 sitd->xfer = NULL; 617 ohci_hash_add_itd(sc, sitd); 618 splx(s); 619 620 #ifdef DIAGNOSTIC 621 sitd->isdone = 0; 622 #endif 623 624 return (sitd); 625 } 626 627 void 628 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 629 { 630 int s; 631 632 DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd)); 633 634 #ifdef DIAGNOSTIC 635 if (!sitd->isdone) { 636 panic("ohci_free_sitd: sitd=%p not done", sitd); 637 return; 638 } 639 #endif 640 641 s = splusb(); 642 ohci_hash_rem_itd(sc, sitd); 643 sitd->nextitd = sc->sc_freeitds; 644 sc->sc_freeitds = sitd; 645 splx(s); 646 } 647 648 usbd_status 649 ohci_init(ohci_softc_t *sc) 650 { 651 ohci_soft_ed_t *sed, *psed; 652 usbd_status err; 653 int i; 654 u_int32_t s, ctl, ival, hcr, fm, per, rev, desca; 655 656 DPRINTF(("ohci_init: start\n")); 657 #if defined(__OpenBSD__) 658 printf(","); 659 #else 660 printf("%s:", USBDEVNAME(sc->sc_bus.bdev)); 661 #endif 662 rev = OREAD4(sc, OHCI_REVISION); 663 printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev), 664 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 665 666 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 667 printf("%s: unsupported OHCI revision\n", 668 USBDEVNAME(sc->sc_bus.bdev)); 669 sc->sc_bus.usbrev = USBREV_UNKNOWN; 670 return (USBD_INVAL); 671 } 672 sc->sc_bus.usbrev = USBREV_1_0; 673 674 for (i = 0; i < OHCI_HASH_SIZE; i++) 675 LIST_INIT(&sc->sc_hash_tds[i]); 676 for (i = 0; i < OHCI_HASH_SIZE; i++) 677 LIST_INIT(&sc->sc_hash_itds[i]); 678 679 SIMPLEQ_INIT(&sc->sc_free_xfers); 680 681 /* XXX determine alignment by R/W */ 682 /* Allocate the HCCA area. */ 683 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 684 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 685 if (err) 686 return (err); 687 sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0); 688 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 689 690 sc->sc_eintrs = OHCI_NORMAL_INTRS; 691 692 /* Allocate dummy ED that starts the control list. */ 693 sc->sc_ctrl_head = ohci_alloc_sed(sc); 694 if (sc->sc_ctrl_head == NULL) { 695 err = USBD_NOMEM; 696 goto bad1; 697 } 698 sc->sc_ctrl_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 699 700 /* Allocate dummy ED that starts the bulk list. */ 701 sc->sc_bulk_head = ohci_alloc_sed(sc); 702 if (sc->sc_bulk_head == NULL) { 703 err = USBD_NOMEM; 704 goto bad2; 705 } 706 sc->sc_bulk_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 707 708 /* Allocate dummy ED that starts the isochronous list. */ 709 sc->sc_isoc_head = ohci_alloc_sed(sc); 710 if (sc->sc_isoc_head == NULL) { 711 err = USBD_NOMEM; 712 goto bad3; 713 } 714 sc->sc_isoc_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 715 716 /* Allocate all the dummy EDs that make up the interrupt tree. */ 717 for (i = 0; i < OHCI_NO_EDS; i++) { 718 sed = ohci_alloc_sed(sc); 719 if (sed == NULL) { 720 while (--i >= 0) 721 ohci_free_sed(sc, sc->sc_eds[i]); 722 err = USBD_NOMEM; 723 goto bad4; 724 } 725 /* All ED fields are set to 0. */ 726 sc->sc_eds[i] = sed; 727 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 728 if (i != 0) 729 psed = sc->sc_eds[(i-1) / 2]; 730 else 731 psed= sc->sc_isoc_head; 732 sed->next = psed; 733 sed->ed.ed_nexted = htole32(psed->physaddr); 734 } 735 /* 736 * Fill HCCA interrupt table. The bit reversal is to get 737 * the tree set up properly to spread the interrupts. 738 */ 739 for (i = 0; i < OHCI_NO_INTRS; i++) 740 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 741 htole32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 742 743 #ifdef OHCI_DEBUG 744 if (ohcidebug > 15) { 745 for (i = 0; i < OHCI_NO_EDS; i++) { 746 printf("ed#%d ", i); 747 ohci_dump_ed(sc->sc_eds[i]); 748 } 749 printf("iso "); 750 ohci_dump_ed(sc->sc_isoc_head); 751 } 752 #endif 753 754 /* Determine in what context we are running. */ 755 ctl = OREAD4(sc, OHCI_CONTROL); 756 if (ctl & OHCI_IR) { 757 /* SMM active, request change */ 758 DPRINTF(("ohci_init: SMM active, request owner change\n")); 759 s = OREAD4(sc, OHCI_COMMAND_STATUS); 760 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 761 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 762 usb_delay_ms(&sc->sc_bus, 1); 763 ctl = OREAD4(sc, OHCI_CONTROL); 764 } 765 if ((ctl & OHCI_IR) == 0) { 766 printf("%s: SMM does not respond, resetting\n", 767 USBDEVNAME(sc->sc_bus.bdev)); 768 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 769 goto reset; 770 } 771 #if 0 772 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */ 773 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 774 /* BIOS started controller. */ 775 DPRINTF(("ohci_init: BIOS active\n")); 776 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 777 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL); 778 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 779 } 780 #endif 781 } else { 782 DPRINTF(("ohci_init: cold started\n")); 783 reset: 784 /* Controller was cold started. */ 785 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 786 } 787 788 /* 789 * This reset should not be necessary according to the OHCI spec, but 790 * without it some controllers do not start. 791 */ 792 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 793 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 794 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 795 796 /* We now own the host controller and the bus has been reset. */ 797 ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL)); 798 799 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 800 /* Nominal time for a reset is 10 us. */ 801 for (i = 0; i < 10; i++) { 802 delay(10); 803 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 804 if (!hcr) 805 break; 806 } 807 if (hcr) { 808 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 809 err = USBD_IOERROR; 810 goto bad5; 811 } 812 #ifdef OHCI_DEBUG 813 if (ohcidebug > 15) 814 ohci_dumpregs(sc); 815 #endif 816 817 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 818 819 /* Set up HC registers. */ 820 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 821 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 822 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 823 /* disable all interrupts and then switch on all desired interrupts */ 824 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 825 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 826 /* switch on desired functional features */ 827 ctl = OREAD4(sc, OHCI_CONTROL); 828 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 829 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 830 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL; 831 /* And finally start it! */ 832 OWRITE4(sc, OHCI_CONTROL, ctl); 833 834 /* 835 * The controller is now OPERATIONAL. Set a some final 836 * registers that should be set earlier, but that the 837 * controller ignores when in the SUSPEND state. 838 */ 839 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 840 fm |= OHCI_FSMPS(ival) | ival; 841 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 842 per = OHCI_PERIODIC(ival); /* 90% periodic */ 843 OWRITE4(sc, OHCI_PERIODIC_START, per); 844 845 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */ 846 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 847 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP); 848 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 849 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY); 850 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca); 851 852 /* 853 * The AMD756 requires a delay before re-reading the register, 854 * otherwise it will occasionally report 0 ports. 855 */ 856 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY); 857 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 858 859 #ifdef OHCI_DEBUG 860 if (ohcidebug > 5) 861 ohci_dumpregs(sc); 862 #endif 863 864 /* Set up the bus struct. */ 865 sc->sc_bus.methods = &ohci_bus_methods; 866 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 867 868 #if defined(__NetBSD__) || defined(__OpenBSD__) 869 sc->sc_control = sc->sc_intre = 0; 870 sc->sc_powerhook = powerhook_establish(ohci_power, sc); 871 sc->sc_shutdownhook = shutdownhook_establish(ohci_shutdown, sc); 872 #endif 873 874 usb_callout_init(sc->sc_tmo_rhsc); 875 876 return (USBD_NORMAL_COMPLETION); 877 878 bad5: 879 for (i = 0; i < OHCI_NO_EDS; i++) 880 ohci_free_sed(sc, sc->sc_eds[i]); 881 bad4: 882 ohci_free_sed(sc, sc->sc_isoc_head); 883 bad3: 884 ohci_free_sed(sc, sc->sc_ctrl_head); 885 bad2: 886 ohci_free_sed(sc, sc->sc_bulk_head); 887 bad1: 888 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 889 return (err); 890 } 891 892 usbd_status 893 ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 894 { 895 #if defined(__NetBSD__) || defined(__OpenBSD__) 896 struct ohci_softc *sc = (struct ohci_softc *)bus; 897 #endif 898 899 return (usb_allocmem(&sc->sc_bus, size, 0, dma)); 900 } 901 902 void 903 ohci_freem(struct usbd_bus *bus, usb_dma_t *dma) 904 { 905 #if defined(__NetBSD__) || defined(__OpenBSD__) 906 struct ohci_softc *sc = (struct ohci_softc *)bus; 907 #endif 908 909 usb_freemem(&sc->sc_bus, dma); 910 } 911 912 usbd_xfer_handle 913 ohci_allocx(struct usbd_bus *bus) 914 { 915 struct ohci_softc *sc = (struct ohci_softc *)bus; 916 usbd_xfer_handle xfer; 917 918 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 919 if (xfer != NULL) { 920 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 921 #ifdef DIAGNOSTIC 922 if (xfer->busy_free != XFER_FREE) { 923 printf("ohci_allocx: xfer=%p not free, 0x%08x\n", xfer, 924 xfer->busy_free); 925 } 926 #endif 927 } else { 928 xfer = malloc(sizeof(struct ohci_xfer), M_USB, M_NOWAIT); 929 } 930 if (xfer != NULL) { 931 memset(xfer, 0, sizeof (struct ohci_xfer)); 932 #ifdef DIAGNOSTIC 933 xfer->busy_free = XFER_BUSY; 934 #endif 935 } 936 return (xfer); 937 } 938 939 void 940 ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 941 { 942 struct ohci_softc *sc = (struct ohci_softc *)bus; 943 944 #ifdef DIAGNOSTIC 945 if (xfer->busy_free != XFER_BUSY) { 946 printf("ohci_freex: xfer=%p not busy, 0x%08x\n", xfer, 947 xfer->busy_free); 948 return; 949 } 950 xfer->busy_free = XFER_FREE; 951 #endif 952 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 953 } 954 955 /* 956 * Shut down the controller when the system is going down. 957 */ 958 void 959 ohci_shutdown(void *v) 960 { 961 ohci_softc_t *sc = v; 962 963 DPRINTF(("ohci_shutdown: stopping the HC\n")); 964 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 965 } 966 967 /* 968 * Handle suspend/resume. 969 * 970 * We need to switch to polling mode here, because this routine is 971 * called from an intterupt context. This is all right since we 972 * are almost suspended anyway. 973 */ 974 void 975 ohci_power(int why, void *v) 976 { 977 ohci_softc_t *sc = v; 978 u_int32_t ctl; 979 int s; 980 981 #ifdef OHCI_DEBUG 982 DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why)); 983 ohci_dumpregs(sc); 984 #endif 985 986 s = splhardusb(); 987 switch (why) { 988 case PWR_SUSPEND: 989 case PWR_STANDBY: 990 sc->sc_bus.use_polling++; 991 ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK; 992 if (sc->sc_control == 0) { 993 /* 994 * Preserve register values, in case that APM BIOS 995 * does not recover them. 996 */ 997 sc->sc_control = ctl; 998 sc->sc_intre = OREAD4(sc, OHCI_INTERRUPT_ENABLE); 999 } 1000 ctl |= OHCI_HCFS_SUSPEND; 1001 OWRITE4(sc, OHCI_CONTROL, ctl); 1002 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1003 sc->sc_bus.use_polling--; 1004 break; 1005 case PWR_RESUME: 1006 sc->sc_bus.use_polling++; 1007 /* Some broken BIOSes do not recover these values */ 1008 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 1009 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 1010 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 1011 if (sc->sc_intre) 1012 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, 1013 sc->sc_intre & (OHCI_ALL_INTRS | OHCI_MIE)); 1014 if (sc->sc_control) 1015 ctl = sc->sc_control; 1016 else 1017 ctl = OREAD4(sc, OHCI_CONTROL); 1018 ctl |= OHCI_HCFS_RESUME; 1019 OWRITE4(sc, OHCI_CONTROL, ctl); 1020 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 1021 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL; 1022 OWRITE4(sc, OHCI_CONTROL, ctl); 1023 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 1024 sc->sc_control = sc->sc_intre = 0; 1025 sc->sc_bus.use_polling--; 1026 break; 1027 case PWR_SOFTSUSPEND: 1028 case PWR_SOFTSTANDBY: 1029 case PWR_SOFTRESUME: 1030 break; 1031 } 1032 splx(s); 1033 } 1034 1035 #ifdef OHCI_DEBUG 1036 void 1037 ohci_dumpregs(ohci_softc_t *sc) 1038 { 1039 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 1040 OREAD4(sc, OHCI_REVISION), 1041 OREAD4(sc, OHCI_CONTROL), 1042 OREAD4(sc, OHCI_COMMAND_STATUS))); 1043 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 1044 OREAD4(sc, OHCI_INTERRUPT_STATUS), 1045 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 1046 OREAD4(sc, OHCI_INTERRUPT_DISABLE))); 1047 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 1048 OREAD4(sc, OHCI_HCCA), 1049 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 1050 OREAD4(sc, OHCI_CONTROL_HEAD_ED))); 1051 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 1052 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 1053 OREAD4(sc, OHCI_BULK_HEAD_ED), 1054 OREAD4(sc, OHCI_BULK_CURRENT_ED))); 1055 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 1056 OREAD4(sc, OHCI_DONE_HEAD), 1057 OREAD4(sc, OHCI_FM_INTERVAL), 1058 OREAD4(sc, OHCI_FM_REMAINING))); 1059 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 1060 OREAD4(sc, OHCI_FM_NUMBER), 1061 OREAD4(sc, OHCI_PERIODIC_START), 1062 OREAD4(sc, OHCI_LS_THRESHOLD))); 1063 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n", 1064 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 1065 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 1066 OREAD4(sc, OHCI_RH_STATUS))); 1067 DPRINTF((" port1=0x%08x port2=0x%08x\n", 1068 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 1069 OREAD4(sc, OHCI_RH_PORT_STATUS(2)))); 1070 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n", 1071 le32toh(sc->sc_hcca->hcca_frame_number), 1072 le32toh(sc->sc_hcca->hcca_done_head))); 1073 } 1074 #endif 1075 1076 Static int ohci_intr1(ohci_softc_t *); 1077 1078 int 1079 ohci_intr(void *p) 1080 { 1081 ohci_softc_t *sc = p; 1082 1083 if (sc == NULL || sc->sc_dying) 1084 return (0); 1085 1086 /* If we get an interrupt while polling, then just ignore it. */ 1087 if (sc->sc_bus.use_polling) { 1088 #ifdef DIAGNOSTIC 1089 printf("ohci_intr: ignored interrupt while polling\n"); 1090 #endif 1091 return (0); 1092 } 1093 1094 return (ohci_intr1(sc)); 1095 } 1096 1097 Static int 1098 ohci_intr1(ohci_softc_t *sc) 1099 { 1100 u_int32_t intrs, eintrs; 1101 ohci_physaddr_t done; 1102 1103 DPRINTFN(14,("ohci_intr1: enter\n")); 1104 1105 /* In case the interrupt occurs before initialization has completed. */ 1106 if (sc == NULL || sc->sc_hcca == NULL) { 1107 #ifdef DIAGNOSTIC 1108 printf("ohci_intr: sc->sc_hcca == NULL\n"); 1109 #endif 1110 return (0); 1111 } 1112 1113 intrs = 0; 1114 done = le32toh(sc->sc_hcca->hcca_done_head); 1115 if (done != 0) { 1116 if (done & ~OHCI_DONE_INTRS) 1117 intrs = OHCI_WDH; 1118 if (done & OHCI_DONE_INTRS) 1119 intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS); 1120 sc->sc_hcca->hcca_done_head = 0; 1121 } else 1122 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1123 1124 if (!intrs) 1125 return (0); 1126 1127 intrs &= ~OHCI_MIE; 1128 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */ 1129 eintrs = intrs & sc->sc_eintrs; 1130 if (!eintrs) 1131 return (0); 1132 1133 sc->sc_bus.intr_context++; 1134 sc->sc_bus.no_intrs++; 1135 DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 1136 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 1137 (u_int)eintrs)); 1138 1139 if (eintrs & OHCI_SO) { 1140 sc->sc_overrun_cnt++; 1141 if (usbd_ratecheck(&sc->sc_overrun_ntc)) { 1142 printf("%s: %u scheduling overruns\n", 1143 USBDEVNAME(sc->sc_bus.bdev), sc->sc_overrun_cnt); 1144 sc->sc_overrun_cnt = 0; 1145 } 1146 /* XXX do what */ 1147 eintrs &= ~OHCI_SO; 1148 } 1149 if (eintrs & OHCI_WDH) { 1150 ohci_add_done(sc, done &~ OHCI_DONE_INTRS); 1151 usb_schedsoftintr(&sc->sc_bus); 1152 eintrs &= ~OHCI_WDH; 1153 } 1154 if (eintrs & OHCI_RD) { 1155 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev)); 1156 /* XXX process resume detect */ 1157 } 1158 if (eintrs & OHCI_UE) { 1159 printf("%s: unrecoverable error, controller halted\n", 1160 USBDEVNAME(sc->sc_bus.bdev)); 1161 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1162 /* XXX what else */ 1163 } 1164 if (eintrs & OHCI_RHSC) { 1165 ohci_rhsc(sc, sc->sc_intrxfer); 1166 /* 1167 * Disable RHSC interrupt for now, because it will be 1168 * on until the port has been reset. 1169 */ 1170 ohci_rhsc_able(sc, 0); 1171 /* Do not allow RHSC interrupts > 1 per second */ 1172 usb_callout(sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc); 1173 eintrs &= ~OHCI_RHSC; 1174 } 1175 1176 sc->sc_bus.intr_context--; 1177 1178 if (eintrs != 0) { 1179 /* Block unprocessed interrupts. XXX */ 1180 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs); 1181 sc->sc_eintrs &= ~eintrs; 1182 printf("%s: blocking intrs 0x%x\n", 1183 USBDEVNAME(sc->sc_bus.bdev), eintrs); 1184 } 1185 1186 return (1); 1187 } 1188 1189 void 1190 ohci_rhsc_able(ohci_softc_t *sc, int on) 1191 { 1192 DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on)); 1193 if (on) { 1194 sc->sc_eintrs |= OHCI_RHSC; 1195 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1196 } else { 1197 sc->sc_eintrs &= ~OHCI_RHSC; 1198 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC); 1199 } 1200 } 1201 1202 void 1203 ohci_rhsc_enable(void *v_sc) 1204 { 1205 ohci_softc_t *sc = v_sc; 1206 int s; 1207 1208 s = splhardusb(); 1209 ohci_rhsc_able(sc, 1); 1210 splx(s); 1211 } 1212 1213 #ifdef OHCI_DEBUG 1214 char *ohci_cc_strs[] = { 1215 "NO_ERROR", 1216 "CRC", 1217 "BIT_STUFFING", 1218 "DATA_TOGGLE_MISMATCH", 1219 "STALL", 1220 "DEVICE_NOT_RESPONDING", 1221 "PID_CHECK_FAILURE", 1222 "UNEXPECTED_PID", 1223 "DATA_OVERRUN", 1224 "DATA_UNDERRUN", 1225 "BUFFER_OVERRUN", 1226 "BUFFER_UNDERRUN", 1227 "reserved", 1228 "reserved", 1229 "NOT_ACCESSED", 1230 "NOT_ACCESSED", 1231 }; 1232 #endif 1233 1234 void 1235 ohci_add_done(ohci_softc_t *sc, ohci_physaddr_t done) 1236 { 1237 ohci_soft_itd_t *sitd, *sidone, **ip; 1238 ohci_soft_td_t *std, *sdone, **p; 1239 1240 /* Reverse the done list. */ 1241 for (sdone = NULL, sidone = NULL; done != 0; ) { 1242 std = ohci_hash_find_td(sc, done); 1243 if (std != NULL) { 1244 std->dnext = sdone; 1245 done = le32toh(std->td.td_nexttd); 1246 sdone = std; 1247 DPRINTFN(10,("add TD %p\n", std)); 1248 continue; 1249 } 1250 sitd = ohci_hash_find_itd(sc, done); 1251 if (sitd != NULL) { 1252 sitd->dnext = sidone; 1253 done = le32toh(sitd->itd.itd_nextitd); 1254 sidone = sitd; 1255 DPRINTFN(5,("add ITD %p\n", sitd)); 1256 continue; 1257 } 1258 panic("ohci_add_done: addr 0x%08lx not found", (u_long)done); 1259 } 1260 1261 /* sdone & sidone now hold the done lists. */ 1262 /* Put them on the already processed lists. */ 1263 for (p = &sc->sc_sdone; *p != NULL; p = &(*p)->dnext) 1264 ; 1265 *p = sdone; 1266 for (ip = &sc->sc_sidone; *ip != NULL; ip = &(*ip)->dnext) 1267 ; 1268 *ip = sidone; 1269 } 1270 1271 void 1272 ohci_softintr(void *v) 1273 { 1274 ohci_softc_t *sc = v; 1275 ohci_soft_itd_t *sitd, *sidone, *sitdnext; 1276 ohci_soft_td_t *std, *sdone, *stdnext; 1277 usbd_xfer_handle xfer; 1278 int len, cc, s; 1279 1280 DPRINTFN(10,("ohci_softintr: enter\n:")); 1281 1282 sc->sc_bus.intr_context++; 1283 1284 s = splhardusb(); 1285 sdone = sc->sc_sdone; 1286 sc->sc_sdone = NULL; 1287 sidone = sc->sc_sidone; 1288 sc->sc_sidone = NULL; 1289 splx(s); 1290 1291 DPRINTFN(10,("ohci_softintr: sdone=%p sidone=%p\n", sdone, sidone)); 1292 1293 #ifdef OHCI_DEBUG 1294 if (ohcidebug > 10) { 1295 DPRINTF(("ohci_process_done: TD done:\n")); 1296 ohci_dump_tds(sdone); 1297 } 1298 #endif 1299 1300 for (std = sdone; std; std = stdnext) { 1301 xfer = std->xfer; 1302 stdnext = std->dnext; 1303 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n", 1304 std, xfer, xfer ? xfer->hcpriv : 0)); 1305 if (xfer == NULL) { 1306 /* 1307 * xfer == NULL: There seems to be no xfer associated 1308 * with this TD. It is tailp that happened to end up on 1309 * the done queue. 1310 * Shouldn't happen, but some chips are broken(?). 1311 */ 1312 continue; 1313 } 1314 if (xfer->status == USBD_CANCELLED || 1315 xfer->status == USBD_TIMEOUT) { 1316 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1317 xfer)); 1318 /* Handled by abort routine. */ 1319 continue; 1320 } 1321 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 1322 cc = OHCI_TD_GET_CC(le32toh(std->td.td_flags)); 1323 if (cc == OHCI_CC_NO_ERROR) { 1324 len = std->len; 1325 if (std->td.td_cbp != 0) 1326 len -= le32toh(std->td.td_be) - 1327 le32toh(std->td.td_cbp) + 1; 1328 DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", 1329 len, std->flags)); 1330 if (std->flags & OHCI_ADD_LEN) 1331 xfer->actlen += len; 1332 if (std->flags & OHCI_CALL_DONE) { 1333 xfer->status = USBD_NORMAL_COMPLETION; 1334 usb_transfer_complete(xfer); 1335 } 1336 ohci_free_std(sc, std); 1337 } else { 1338 /* 1339 * Endpoint is halted. First unlink all the TDs 1340 * belonging to the failed transfer, and then restart 1341 * the endpoint. 1342 */ 1343 ohci_soft_td_t *p, *n; 1344 struct ohci_pipe *opipe = 1345 (struct ohci_pipe *)xfer->pipe; 1346 1347 DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n", 1348 OHCI_TD_GET_CC(le32toh(std->td.td_flags)), 1349 ohci_cc_strs[OHCI_TD_GET_CC(le32toh(std->td.td_flags))])); 1350 1351 /* remove TDs */ 1352 for (p = std; p->xfer == xfer; p = n) { 1353 n = p->nexttd; 1354 ohci_free_std(sc, p); 1355 } 1356 1357 /* clear halt */ 1358 opipe->sed->ed.ed_headp = htole32(p->physaddr); 1359 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1360 1361 if (cc == OHCI_CC_STALL) 1362 xfer->status = USBD_STALLED; 1363 else 1364 xfer->status = USBD_IOERROR; 1365 usb_transfer_complete(xfer); 1366 } 1367 } 1368 1369 #ifdef OHCI_DEBUG 1370 if (ohcidebug > 10) { 1371 DPRINTF(("ohci_softintr: ITD done:\n")); 1372 ohci_dump_itds(sidone); 1373 } 1374 #endif 1375 1376 for (sitd = sidone; sitd != NULL; sitd = sitdnext) { 1377 xfer = sitd->xfer; 1378 sitdnext = sitd->dnext; 1379 DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n", 1380 sitd, xfer, xfer ? xfer->hcpriv : 0)); 1381 if (xfer == NULL) 1382 continue; 1383 if (xfer->status == USBD_CANCELLED || 1384 xfer->status == USBD_TIMEOUT) { 1385 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1386 xfer)); 1387 /* Handled by abort routine. */ 1388 continue; 1389 } 1390 #ifdef DIAGNOSTIC 1391 if (sitd->isdone) 1392 printf("ohci_softintr: sitd=%p is done\n", sitd); 1393 sitd->isdone = 1; 1394 #endif 1395 cc = OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags)); 1396 if (cc == OHCI_CC_NO_ERROR) { 1397 /* XXX compute length for input */ 1398 struct ohci_pipe *opipe = 1399 (struct ohci_pipe *)xfer->pipe; 1400 if (sitd->flags & OHCI_CALL_DONE) { 1401 opipe->u.iso.inuse -= xfer->nframes; 1402 /* XXX update frlengths with actual length */ 1403 /* XXX xfer->actlen = actlen; */ 1404 xfer->status = USBD_NORMAL_COMPLETION; 1405 usb_transfer_complete(xfer); 1406 } 1407 } else { 1408 /* XXX Do more */ 1409 xfer->status = USBD_IOERROR; 1410 usb_transfer_complete(xfer); 1411 } 1412 } 1413 1414 if (sc->sc_softwake) { 1415 sc->sc_softwake = 0; 1416 wakeup(&sc->sc_softwake); 1417 } 1418 1419 sc->sc_bus.intr_context--; 1420 DPRINTFN(10,("ohci_softintr: done:\n")); 1421 } 1422 1423 void 1424 ohci_device_ctrl_done(usbd_xfer_handle xfer) 1425 { 1426 DPRINTFN(10,("ohci_ctrl_done: xfer=%p\n", xfer)); 1427 1428 #ifdef DIAGNOSTIC 1429 if (!(xfer->rqflags & URQ_REQUEST)) { 1430 panic("ohci_ctrl_done: not a request"); 1431 } 1432 #endif 1433 xfer->hcpriv = NULL; 1434 } 1435 1436 void 1437 ohci_device_intr_done(usbd_xfer_handle xfer) 1438 { 1439 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1440 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1441 ohci_soft_ed_t *sed = opipe->sed; 1442 ohci_soft_td_t *data, *tail; 1443 1444 1445 DPRINTFN(10,("ohci_intr_done: xfer=%p, actlen=%d\n", 1446 xfer, xfer->actlen)); 1447 1448 xfer->hcpriv = NULL; 1449 1450 if (xfer->pipe->repeat) { 1451 data = opipe->tail.td; 1452 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 1453 if (tail == NULL) { 1454 xfer->status = USBD_NOMEM; 1455 return; 1456 } 1457 tail->xfer = NULL; 1458 1459 data->td.td_flags = htole32( 1460 OHCI_TD_IN | OHCI_TD_NOCC | 1461 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 1462 if (xfer->flags & USBD_SHORT_XFER_OK) 1463 data->td.td_flags |= htole32(OHCI_TD_R); 1464 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf, 0)); 1465 data->nexttd = tail; 1466 data->td.td_nexttd = htole32(tail->physaddr); 1467 data->td.td_be = htole32(le32toh(data->td.td_cbp) + 1468 xfer->length - 1); 1469 data->len = xfer->length; 1470 data->xfer = xfer; 1471 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1472 xfer->hcpriv = data; 1473 xfer->actlen = 0; 1474 1475 sed->ed.ed_tailp = htole32(tail->physaddr); 1476 opipe->tail.td = tail; 1477 } 1478 } 1479 1480 void 1481 ohci_device_bulk_done(usbd_xfer_handle xfer) 1482 { 1483 DPRINTFN(10,("ohci_bulk_done: xfer=%p, actlen=%d\n", 1484 xfer, xfer->actlen)); 1485 1486 xfer->hcpriv = NULL; 1487 } 1488 1489 void 1490 ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer) 1491 { 1492 usbd_pipe_handle pipe; 1493 struct ohci_pipe *opipe; 1494 u_char *p; 1495 int i, m; 1496 int hstatus; 1497 1498 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1499 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n", 1500 sc, xfer, hstatus)); 1501 1502 if (xfer == NULL) { 1503 /* Just ignore the change. */ 1504 return; 1505 } 1506 1507 pipe = xfer->pipe; 1508 opipe = (struct ohci_pipe *)pipe; 1509 1510 p = KERNADDR(&xfer->dmabuf, 0); 1511 m = min(sc->sc_noport, xfer->length * 8 - 1); 1512 memset(p, 0, xfer->length); 1513 for (i = 1; i <= m; i++) { 1514 /* Pick out CHANGE bits from the status reg. */ 1515 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1516 p[i/8] |= 1 << (i%8); 1517 } 1518 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 1519 xfer->actlen = xfer->length; 1520 xfer->status = USBD_NORMAL_COMPLETION; 1521 1522 usb_transfer_complete(xfer); 1523 } 1524 1525 void 1526 ohci_root_intr_done(usbd_xfer_handle xfer) 1527 { 1528 xfer->hcpriv = NULL; 1529 } 1530 1531 void 1532 ohci_root_ctrl_done(usbd_xfer_handle xfer) 1533 { 1534 xfer->hcpriv = NULL; 1535 } 1536 1537 /* 1538 * Wait here until controller claims to have an interrupt. 1539 * Then call ohci_intr and return. Use timeout to avoid waiting 1540 * too long. 1541 */ 1542 void 1543 ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer) 1544 { 1545 int timo = xfer->timeout; 1546 int usecs; 1547 u_int32_t intrs; 1548 1549 xfer->status = USBD_IN_PROGRESS; 1550 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 1551 usb_delay_ms(&sc->sc_bus, 1); 1552 if (sc->sc_dying) 1553 break; 1554 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 1555 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs)); 1556 #ifdef OHCI_DEBUG 1557 if (ohcidebug > 15) 1558 ohci_dumpregs(sc); 1559 #endif 1560 if (intrs) { 1561 ohci_intr1(sc); 1562 if (xfer->status != USBD_IN_PROGRESS) 1563 return; 1564 } 1565 } 1566 1567 /* Timeout */ 1568 DPRINTF(("ohci_waitintr: timeout\n")); 1569 xfer->status = USBD_TIMEOUT; 1570 usb_transfer_complete(xfer); 1571 /* XXX should free TD */ 1572 } 1573 1574 void 1575 ohci_poll(struct usbd_bus *bus) 1576 { 1577 ohci_softc_t *sc = (ohci_softc_t *)bus; 1578 #ifdef OHCI_DEBUG 1579 static int last; 1580 int new; 1581 new = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1582 if (new != last) { 1583 DPRINTFN(10,("ohci_poll: intrs=0x%04x\n", new)); 1584 last = new; 1585 } 1586 #endif 1587 1588 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) 1589 ohci_intr1(sc); 1590 } 1591 1592 usbd_status 1593 ohci_device_request(usbd_xfer_handle xfer) 1594 { 1595 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1596 usb_device_request_t *req = &xfer->request; 1597 usbd_device_handle dev = opipe->pipe.device; 1598 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1599 int addr = dev->address; 1600 ohci_soft_td_t *setup, *stat, *next, *tail; 1601 ohci_soft_ed_t *sed; 1602 int isread; 1603 int len; 1604 usbd_status err; 1605 int s; 1606 1607 isread = req->bmRequestType & UT_READ; 1608 len = UGETW(req->wLength); 1609 1610 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 1611 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 1612 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1613 UGETW(req->wIndex), len, addr, 1614 opipe->pipe.endpoint->edesc->bEndpointAddress)); 1615 1616 setup = opipe->tail.td; 1617 stat = ohci_alloc_std(sc); 1618 if (stat == NULL) { 1619 err = USBD_NOMEM; 1620 goto bad1; 1621 } 1622 tail = ohci_alloc_std(sc); 1623 if (tail == NULL) { 1624 err = USBD_NOMEM; 1625 goto bad2; 1626 } 1627 tail->xfer = NULL; 1628 1629 sed = opipe->sed; 1630 opipe->u.ctl.length = len; 1631 1632 /* Update device address and length since they may have changed. */ 1633 /* XXX This only needs to be done once, but it's too early in open. */ 1634 /* XXXX Should not touch ED here! */ 1635 sed->ed.ed_flags = htole32( 1636 (le32toh(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) | 1637 OHCI_ED_SET_FA(addr) | 1638 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize))); 1639 1640 next = stat; 1641 1642 /* Set up data transaction */ 1643 if (len != 0) { 1644 ohci_soft_td_t *std = stat; 1645 1646 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 1647 std, &stat); 1648 stat = stat->nexttd; /* point at free TD */ 1649 if (err) 1650 goto bad3; 1651 /* Start toggle at 1 and then use the carried toggle. */ 1652 std->td.td_flags &= htole32(~OHCI_TD_TOGGLE_MASK); 1653 std->td.td_flags |= htole32(OHCI_TD_TOGGLE_1); 1654 } 1655 1656 memcpy(KERNADDR(&opipe->u.ctl.reqdma, 0), req, sizeof *req); 1657 1658 setup->td.td_flags = htole32(OHCI_TD_SETUP | OHCI_TD_NOCC | 1659 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1660 setup->td.td_cbp = htole32(DMAADDR(&opipe->u.ctl.reqdma, 0)); 1661 setup->nexttd = next; 1662 setup->td.td_nexttd = htole32(next->physaddr); 1663 setup->td.td_be = htole32(le32toh(setup->td.td_cbp) + sizeof *req - 1); 1664 setup->len = 0; 1665 setup->xfer = xfer; 1666 setup->flags = 0; 1667 xfer->hcpriv = setup; 1668 1669 stat->td.td_flags = htole32( 1670 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | 1671 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1672 stat->td.td_cbp = 0; 1673 stat->nexttd = tail; 1674 stat->td.td_nexttd = htole32(tail->physaddr); 1675 stat->td.td_be = 0; 1676 stat->flags = OHCI_CALL_DONE; 1677 stat->len = 0; 1678 stat->xfer = xfer; 1679 1680 #ifdef OHCI_DEBUG 1681 if (ohcidebug > 5) { 1682 DPRINTF(("ohci_device_request:\n")); 1683 ohci_dump_ed(sed); 1684 ohci_dump_tds(setup); 1685 } 1686 #endif 1687 1688 /* Insert ED in schedule */ 1689 s = splusb(); 1690 sed->ed.ed_tailp = htole32(tail->physaddr); 1691 opipe->tail.td = tail; 1692 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1693 if (xfer->timeout && !sc->sc_bus.use_polling) { 1694 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout), 1695 ohci_timeout, xfer); 1696 } 1697 splx(s); 1698 1699 #ifdef OHCI_DEBUG 1700 if (ohcidebug > 20) { 1701 delay(10000); 1702 DPRINTF(("ohci_device_request: status=%x\n", 1703 OREAD4(sc, OHCI_COMMAND_STATUS))); 1704 ohci_dumpregs(sc); 1705 printf("ctrl head:\n"); 1706 ohci_dump_ed(sc->sc_ctrl_head); 1707 printf("sed:\n"); 1708 ohci_dump_ed(sed); 1709 ohci_dump_tds(setup); 1710 } 1711 #endif 1712 1713 return (USBD_NORMAL_COMPLETION); 1714 1715 bad3: 1716 ohci_free_std(sc, tail); 1717 bad2: 1718 ohci_free_std(sc, stat); 1719 bad1: 1720 return (err); 1721 } 1722 1723 /* 1724 * Add an ED to the schedule. Called at splusb(). 1725 */ 1726 void 1727 ohci_add_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1728 { 1729 DPRINTFN(8,("ohci_add_ed: sed=%p head=%p\n", sed, head)); 1730 1731 SPLUSBCHECK; 1732 sed->next = head->next; 1733 sed->ed.ed_nexted = head->ed.ed_nexted; 1734 head->next = sed; 1735 head->ed.ed_nexted = htole32(sed->physaddr); 1736 } 1737 1738 /* 1739 * Remove an ED from the schedule. Called at splusb(). 1740 */ 1741 void 1742 ohci_rem_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1743 { 1744 ohci_soft_ed_t *p; 1745 1746 SPLUSBCHECK; 1747 1748 /* XXX */ 1749 for (p = head; p == NULL && p->next != sed; p = p->next) 1750 ; 1751 if (p == NULL) 1752 panic("ohci_rem_ed: ED not found"); 1753 p->next = sed->next; 1754 p->ed.ed_nexted = sed->ed.ed_nexted; 1755 } 1756 1757 /* 1758 * When a transfer is completed the TD is added to the done queue by 1759 * the host controller. This queue is the processed by software. 1760 * Unfortunately the queue contains the physical address of the TD 1761 * and we have no simple way to translate this back to a kernel address. 1762 * To make the translation possible (and fast) we use a hash table of 1763 * TDs currently in the schedule. The physical address is used as the 1764 * hash value. 1765 */ 1766 1767 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1768 /* Called at splusb() */ 1769 void 1770 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1771 { 1772 int h = HASH(std->physaddr); 1773 1774 SPLUSBCHECK; 1775 1776 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1777 } 1778 1779 /* Called at splusb() */ 1780 void 1781 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1782 { 1783 SPLUSBCHECK; 1784 1785 LIST_REMOVE(std, hnext); 1786 } 1787 1788 ohci_soft_td_t * 1789 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a) 1790 { 1791 int h = HASH(a); 1792 ohci_soft_td_t *std; 1793 1794 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1795 std != NULL; 1796 std = LIST_NEXT(std, hnext)) 1797 if (std->physaddr == a) 1798 return (std); 1799 return (NULL); 1800 } 1801 1802 /* Called at splusb() */ 1803 void 1804 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1805 { 1806 int h = HASH(sitd->physaddr); 1807 1808 SPLUSBCHECK; 1809 1810 DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n", 1811 sitd, (u_long)sitd->physaddr)); 1812 1813 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext); 1814 } 1815 1816 /* Called at splusb() */ 1817 void 1818 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1819 { 1820 SPLUSBCHECK; 1821 1822 DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n", 1823 sitd, (u_long)sitd->physaddr)); 1824 1825 LIST_REMOVE(sitd, hnext); 1826 } 1827 1828 ohci_soft_itd_t * 1829 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a) 1830 { 1831 int h = HASH(a); 1832 ohci_soft_itd_t *sitd; 1833 1834 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]); 1835 sitd != NULL; 1836 sitd = LIST_NEXT(sitd, hnext)) 1837 if (sitd->physaddr == a) 1838 return (sitd); 1839 return (NULL); 1840 } 1841 1842 void 1843 ohci_timeout(void *addr) 1844 { 1845 struct ohci_xfer *oxfer = addr; 1846 struct ohci_pipe *opipe = (struct ohci_pipe *)oxfer->xfer.pipe; 1847 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1848 1849 DPRINTF(("ohci_timeout: oxfer=%p\n", oxfer)); 1850 1851 if (sc->sc_dying) { 1852 ohci_abort_xfer(&oxfer->xfer, USBD_TIMEOUT); 1853 return; 1854 } 1855 1856 /* Execute the abort in a process context. */ 1857 usb_init_task(&oxfer->abort_task, ohci_timeout_task, addr); 1858 usb_add_task(oxfer->xfer.pipe->device, &oxfer->abort_task); 1859 } 1860 1861 void 1862 ohci_timeout_task(void *addr) 1863 { 1864 usbd_xfer_handle xfer = addr; 1865 int s; 1866 1867 DPRINTF(("ohci_timeout_task: xfer=%p\n", xfer)); 1868 1869 s = splusb(); 1870 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1871 splx(s); 1872 } 1873 1874 #ifdef OHCI_DEBUG 1875 void 1876 ohci_dump_tds(ohci_soft_td_t *std) 1877 { 1878 for (; std; std = std->nexttd) 1879 ohci_dump_td(std); 1880 } 1881 1882 void 1883 ohci_dump_td(ohci_soft_td_t *std) 1884 { 1885 char sbuf[128]; 1886 1887 bitmask_snprintf((u_int32_t)le32toh(std->td.td_flags), 1888 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 1889 sbuf, sizeof(sbuf)); 1890 1891 printf("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx " 1892 "nexttd=0x%08lx be=0x%08lx\n", 1893 std, (u_long)std->physaddr, sbuf, 1894 OHCI_TD_GET_DI(le32toh(std->td.td_flags)), 1895 OHCI_TD_GET_EC(le32toh(std->td.td_flags)), 1896 OHCI_TD_GET_CC(le32toh(std->td.td_flags)), 1897 (u_long)le32toh(std->td.td_cbp), 1898 (u_long)le32toh(std->td.td_nexttd), 1899 (u_long)le32toh(std->td.td_be)); 1900 } 1901 1902 void 1903 ohci_dump_itd(ohci_soft_itd_t *sitd) 1904 { 1905 int i; 1906 1907 printf("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n" 1908 "bp0=0x%08lx next=0x%08lx be=0x%08lx\n", 1909 sitd, (u_long)sitd->physaddr, 1910 OHCI_ITD_GET_SF(le32toh(sitd->itd.itd_flags)), 1911 OHCI_ITD_GET_DI(le32toh(sitd->itd.itd_flags)), 1912 OHCI_ITD_GET_FC(le32toh(sitd->itd.itd_flags)), 1913 OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags)), 1914 (u_long)le32toh(sitd->itd.itd_bp0), 1915 (u_long)le32toh(sitd->itd.itd_nextitd), 1916 (u_long)le32toh(sitd->itd.itd_be)); 1917 for (i = 0; i < OHCI_ITD_NOFFSET; i++) 1918 printf("offs[%d]=0x%04x ", i, 1919 (u_int)le16toh(sitd->itd.itd_offset[i])); 1920 printf("\n"); 1921 } 1922 1923 void 1924 ohci_dump_itds(ohci_soft_itd_t *sitd) 1925 { 1926 for (; sitd; sitd = sitd->nextitd) 1927 ohci_dump_itd(sitd); 1928 } 1929 1930 void 1931 ohci_dump_ed(ohci_soft_ed_t *sed) 1932 { 1933 char sbuf[128], sbuf2[128]; 1934 1935 bitmask_snprintf((u_int32_t)le32toh(sed->ed.ed_flags), 1936 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO", 1937 sbuf, sizeof(sbuf)); 1938 bitmask_snprintf((u_int32_t)le32toh(sed->ed.ed_headp), 1939 "\20\1HALT\2CARRY", sbuf2, sizeof(sbuf2)); 1940 1941 printf("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d flags=%s\ntailp=0x%08lx " 1942 "headflags=%s headp=0x%08lx nexted=0x%08lx\n", 1943 sed, (u_long)sed->physaddr, 1944 OHCI_ED_GET_FA(le32toh(sed->ed.ed_flags)), 1945 OHCI_ED_GET_EN(le32toh(sed->ed.ed_flags)), 1946 OHCI_ED_GET_MAXP(le32toh(sed->ed.ed_flags)), sbuf, 1947 (u_long)le32toh(sed->ed.ed_tailp), sbuf2, 1948 (u_long)le32toh(sed->ed.ed_headp), 1949 (u_long)le32toh(sed->ed.ed_nexted)); 1950 } 1951 #endif 1952 1953 usbd_status 1954 ohci_open(usbd_pipe_handle pipe) 1955 { 1956 usbd_device_handle dev = pipe->device; 1957 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1958 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1959 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1960 u_int8_t addr = dev->address; 1961 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1962 ohci_soft_ed_t *sed; 1963 ohci_soft_td_t *std; 1964 ohci_soft_itd_t *sitd; 1965 ohci_physaddr_t tdphys; 1966 u_int32_t fmt; 1967 usbd_status err; 1968 int s; 1969 int ival; 1970 1971 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1972 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1973 1974 if (sc->sc_dying) 1975 return (USBD_IOERROR); 1976 1977 std = NULL; 1978 sed = NULL; 1979 1980 if (addr == sc->sc_addr) { 1981 switch (ed->bEndpointAddress) { 1982 case USB_CONTROL_ENDPOINT: 1983 pipe->methods = &ohci_root_ctrl_methods; 1984 break; 1985 case UE_DIR_IN | OHCI_INTR_ENDPT: 1986 pipe->methods = &ohci_root_intr_methods; 1987 break; 1988 default: 1989 return (USBD_INVAL); 1990 } 1991 } else { 1992 sed = ohci_alloc_sed(sc); 1993 if (sed == NULL) 1994 goto bad0; 1995 opipe->sed = sed; 1996 if (xfertype == UE_ISOCHRONOUS) { 1997 sitd = ohci_alloc_sitd(sc); 1998 if (sitd == NULL) 1999 goto bad1; 2000 opipe->tail.itd = sitd; 2001 tdphys = sitd->physaddr; 2002 fmt = OHCI_ED_FORMAT_ISO; 2003 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 2004 fmt |= OHCI_ED_DIR_IN; 2005 else 2006 fmt |= OHCI_ED_DIR_OUT; 2007 } else { 2008 std = ohci_alloc_std(sc); 2009 if (std == NULL) 2010 goto bad1; 2011 opipe->tail.td = std; 2012 tdphys = std->physaddr; 2013 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD; 2014 } 2015 sed->ed.ed_flags = htole32( 2016 OHCI_ED_SET_FA(addr) | 2017 OHCI_ED_SET_EN(ed->bEndpointAddress) | 2018 (dev->speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) | 2019 fmt | 2020 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 2021 sed->ed.ed_headp = sed->ed.ed_tailp = htole32(tdphys); 2022 2023 switch (xfertype) { 2024 case UE_CONTROL: 2025 pipe->methods = &ohci_device_ctrl_methods; 2026 err = usb_allocmem(&sc->sc_bus, 2027 sizeof(usb_device_request_t), 2028 0, &opipe->u.ctl.reqdma); 2029 if (err) 2030 goto bad; 2031 s = splusb(); 2032 ohci_add_ed(sed, sc->sc_ctrl_head); 2033 splx(s); 2034 break; 2035 case UE_INTERRUPT: 2036 pipe->methods = &ohci_device_intr_methods; 2037 ival = pipe->interval; 2038 if (ival == USBD_DEFAULT_INTERVAL) 2039 ival = ed->bInterval; 2040 return (ohci_device_setintr(sc, opipe, ival)); 2041 case UE_ISOCHRONOUS: 2042 pipe->methods = &ohci_device_isoc_methods; 2043 return (ohci_setup_isoc(pipe)); 2044 case UE_BULK: 2045 pipe->methods = &ohci_device_bulk_methods; 2046 s = splusb(); 2047 ohci_add_ed(sed, sc->sc_bulk_head); 2048 splx(s); 2049 break; 2050 } 2051 } 2052 return (USBD_NORMAL_COMPLETION); 2053 2054 bad: 2055 if (std != NULL) 2056 ohci_free_std(sc, std); 2057 bad1: 2058 if (sed != NULL) 2059 ohci_free_sed(sc, sed); 2060 bad0: 2061 return (USBD_NOMEM); 2062 2063 } 2064 2065 /* 2066 * Close a reqular pipe. 2067 * Assumes that there are no pending transactions. 2068 */ 2069 void 2070 ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head) 2071 { 2072 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2073 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2074 ohci_soft_ed_t *sed = opipe->sed; 2075 int s; 2076 2077 s = splusb(); 2078 #ifdef DIAGNOSTIC 2079 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 2080 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2081 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) { 2082 ohci_soft_td_t *std; 2083 std = ohci_hash_find_td(sc, le32toh(sed->ed.ed_headp)); 2084 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 2085 "tl=0x%x pipe=%p, std=%p\n", sed, 2086 (int)le32toh(sed->ed.ed_headp), 2087 (int)le32toh(sed->ed.ed_tailp), 2088 pipe, std); 2089 #ifdef USB_DEBUG 2090 usbd_dump_pipe(&opipe->pipe); 2091 #endif 2092 #ifdef OHCI_DEBUG 2093 ohci_dump_ed(sed); 2094 if (std) 2095 ohci_dump_td(std); 2096 #endif 2097 usb_delay_ms(&sc->sc_bus, 2); 2098 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2099 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) 2100 printf("ohci_close_pipe: pipe still not empty\n"); 2101 } 2102 #endif 2103 ohci_rem_ed(sed, head); 2104 splx(s); 2105 ohci_free_sed(sc, opipe->sed); 2106 } 2107 2108 /* 2109 * Abort a device request. 2110 * If this routine is called at splusb() it guarantees that the request 2111 * will be removed from the hardware scheduling and that the callback 2112 * for it will be called with USBD_CANCELLED status. 2113 * It's impossible to guarantee that the requested transfer will not 2114 * have happened since the hardware runs concurrently. 2115 * If the transaction has already happened we rely on the ordinary 2116 * interrupt processing to process it. 2117 */ 2118 void 2119 ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2120 { 2121 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2122 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 2123 ohci_soft_ed_t *sed = opipe->sed; 2124 ohci_soft_td_t *p, *n; 2125 ohci_physaddr_t headp; 2126 int s, hit; 2127 2128 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p sed=%p\n", xfer, opipe,sed)); 2129 2130 if (sc->sc_dying) { 2131 /* If we're dying, just do the software part. */ 2132 s = splusb(); 2133 xfer->status = status; /* make software ignore it */ 2134 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 2135 usb_transfer_complete(xfer); 2136 splx(s); 2137 } 2138 2139 if (xfer->device->bus->intr_context || !curproc) 2140 panic("ohci_abort_xfer: not in process context"); 2141 2142 /* 2143 * Step 1: Make interrupt routine and hardware ignore xfer. 2144 */ 2145 s = splusb(); 2146 xfer->status = status; /* make software ignore it */ 2147 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 2148 splx(s); 2149 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed)); 2150 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 2151 2152 /* 2153 * Step 2: Wait until we know hardware has finished any possible 2154 * use of the xfer. Also make sure the soft interrupt routine 2155 * has run. 2156 */ 2157 usb_delay_ms(opipe->pipe.device->bus, 20); /* Hardware finishes in 1ms */ 2158 s = splusb(); 2159 sc->sc_softwake = 1; 2160 usb_schedsoftintr(&sc->sc_bus); 2161 tsleep(&sc->sc_softwake, PZERO, "ohciab", 0); 2162 splx(s); 2163 2164 /* 2165 * Step 3: Remove any vestiges of the xfer from the hardware. 2166 * The complication here is that the hardware may have executed 2167 * beyond the xfer we're trying to abort. So as we're scanning 2168 * the TDs of this xfer we check if the hardware points to 2169 * any of them. 2170 */ 2171 s = splusb(); /* XXX why? */ 2172 p = xfer->hcpriv; 2173 #ifdef DIAGNOSTIC 2174 if (p == NULL) { 2175 splx(s); 2176 printf("ohci_abort_xfer: hcpriv is NULL\n"); 2177 return; 2178 } 2179 #endif 2180 #ifdef OHCI_DEBUG 2181 if (ohcidebug > 1) { 2182 DPRINTF(("ohci_abort_xfer: sed=\n")); 2183 ohci_dump_ed(sed); 2184 ohci_dump_tds(p); 2185 } 2186 #endif 2187 headp = le32toh(sed->ed.ed_headp) & OHCI_HEADMASK; 2188 hit = 0; 2189 for (; p->xfer == xfer; p = n) { 2190 hit |= headp == p->physaddr; 2191 n = p->nexttd; 2192 ohci_free_std(sc, p); 2193 } 2194 /* Zap headp register if hardware pointed inside the xfer. */ 2195 if (hit) { 2196 DPRINTFN(1,("ohci_abort_xfer: set hd=0x08%x, tl=0x%08x\n", 2197 (int)p->physaddr, (int)le32toh(sed->ed.ed_tailp))); 2198 sed->ed.ed_headp = htole32(p->physaddr); /* unlink TDs */ 2199 } else { 2200 DPRINTFN(1,("ohci_abort_xfer: no hit\n")); 2201 } 2202 2203 /* 2204 * Step 4: Turn on hardware again. 2205 */ 2206 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 2207 2208 /* 2209 * Step 5: Execute callback. 2210 */ 2211 usb_transfer_complete(xfer); 2212 2213 splx(s); 2214 } 2215 2216 /* 2217 * Data structures and routines to emulate the root hub. 2218 */ 2219 Static usb_device_descriptor_t ohci_devd = { 2220 USB_DEVICE_DESCRIPTOR_SIZE, 2221 UDESC_DEVICE, /* type */ 2222 {0x00, 0x01}, /* USB version */ 2223 UDCLASS_HUB, /* class */ 2224 UDSUBCLASS_HUB, /* subclass */ 2225 UDPROTO_FSHUB, 2226 64, /* max packet */ 2227 {0},{0},{0x00,0x01}, /* device id */ 2228 1,2,0, /* string indicies */ 2229 1 /* # of configurations */ 2230 }; 2231 2232 Static usb_config_descriptor_t ohci_confd = { 2233 USB_CONFIG_DESCRIPTOR_SIZE, 2234 UDESC_CONFIG, 2235 {USB_CONFIG_DESCRIPTOR_SIZE + 2236 USB_INTERFACE_DESCRIPTOR_SIZE + 2237 USB_ENDPOINT_DESCRIPTOR_SIZE}, 2238 1, 2239 1, 2240 0, 2241 UC_SELF_POWERED, 2242 0 /* max power */ 2243 }; 2244 2245 Static usb_interface_descriptor_t ohci_ifcd = { 2246 USB_INTERFACE_DESCRIPTOR_SIZE, 2247 UDESC_INTERFACE, 2248 0, 2249 0, 2250 1, 2251 UICLASS_HUB, 2252 UISUBCLASS_HUB, 2253 UIPROTO_FSHUB, 2254 0 2255 }; 2256 2257 Static usb_endpoint_descriptor_t ohci_endpd = { 2258 USB_ENDPOINT_DESCRIPTOR_SIZE, 2259 UDESC_ENDPOINT, 2260 UE_DIR_IN | OHCI_INTR_ENDPT, 2261 UE_INTERRUPT, 2262 {8, 0}, /* max packet */ 2263 255 2264 }; 2265 2266 Static usb_hub_descriptor_t ohci_hubd = { 2267 USB_HUB_DESCRIPTOR_SIZE, 2268 UDESC_HUB, 2269 0, 2270 {0,0}, 2271 0, 2272 0, 2273 {0}, 2274 }; 2275 2276 Static int 2277 ohci_str(usb_string_descriptor_t *p, int l, const char *s) 2278 { 2279 int i; 2280 2281 if (l == 0) 2282 return (0); 2283 p->bLength = 2 * strlen(s) + 2; 2284 if (l == 1) 2285 return (1); 2286 p->bDescriptorType = UDESC_STRING; 2287 l -= 2; 2288 for (i = 0; s[i] && l > 1; i++, l -= 2) 2289 USETW2(p->bString[i], 0, s[i]); 2290 return (2*i+2); 2291 } 2292 2293 /* 2294 * Simulate a hardware hub by handling all the necessary requests. 2295 */ 2296 Static usbd_status 2297 ohci_root_ctrl_transfer(usbd_xfer_handle xfer) 2298 { 2299 usbd_status err; 2300 2301 /* Insert last in queue. */ 2302 err = usb_insert_transfer(xfer); 2303 if (err) 2304 return (err); 2305 2306 /* Pipe isn't running, start first */ 2307 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2308 } 2309 2310 Static usbd_status 2311 ohci_root_ctrl_start(usbd_xfer_handle xfer) 2312 { 2313 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2314 usb_device_request_t *req; 2315 void *buf = NULL; 2316 int port, i; 2317 int s, len, value, index, l, totlen = 0; 2318 usb_port_status_t ps; 2319 usb_hub_descriptor_t hubd; 2320 usbd_status err; 2321 u_int32_t v; 2322 2323 if (sc->sc_dying) 2324 return (USBD_IOERROR); 2325 2326 #ifdef DIAGNOSTIC 2327 if (!(xfer->rqflags & URQ_REQUEST)) 2328 /* XXX panic */ 2329 return (USBD_INVAL); 2330 #endif 2331 req = &xfer->request; 2332 2333 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 2334 req->bmRequestType, req->bRequest)); 2335 2336 len = UGETW(req->wLength); 2337 value = UGETW(req->wValue); 2338 index = UGETW(req->wIndex); 2339 2340 if (len != 0) 2341 buf = KERNADDR(&xfer->dmabuf, 0); 2342 2343 #define C(x,y) ((x) | ((y) << 8)) 2344 switch(C(req->bRequest, req->bmRequestType)) { 2345 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 2346 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 2347 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 2348 /* 2349 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 2350 * for the integrated root hub. 2351 */ 2352 break; 2353 case C(UR_GET_CONFIG, UT_READ_DEVICE): 2354 if (len > 0) { 2355 *(u_int8_t *)buf = sc->sc_conf; 2356 totlen = 1; 2357 } 2358 break; 2359 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2360 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 2361 switch(value >> 8) { 2362 case UDESC_DEVICE: 2363 if ((value & 0xff) != 0) { 2364 err = USBD_IOERROR; 2365 goto ret; 2366 } 2367 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 2368 USETW(ohci_devd.idVendor, sc->sc_id_vendor); 2369 memcpy(buf, &ohci_devd, l); 2370 break; 2371 case UDESC_CONFIG: 2372 if ((value & 0xff) != 0) { 2373 err = USBD_IOERROR; 2374 goto ret; 2375 } 2376 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 2377 memcpy(buf, &ohci_confd, l); 2378 buf = (char *)buf + l; 2379 len -= l; 2380 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 2381 totlen += l; 2382 memcpy(buf, &ohci_ifcd, l); 2383 buf = (char *)buf + l; 2384 len -= l; 2385 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 2386 totlen += l; 2387 memcpy(buf, &ohci_endpd, l); 2388 break; 2389 case UDESC_STRING: 2390 if (len == 0) 2391 break; 2392 *(u_int8_t *)buf = 0; 2393 totlen = 1; 2394 switch (value & 0xff) { 2395 case 1: /* Vendor */ 2396 totlen = ohci_str(buf, len, sc->sc_vendor); 2397 break; 2398 case 2: /* Product */ 2399 totlen = ohci_str(buf, len, "OHCI root hub"); 2400 break; 2401 } 2402 break; 2403 default: 2404 err = USBD_IOERROR; 2405 goto ret; 2406 } 2407 break; 2408 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 2409 if (len > 0) { 2410 *(u_int8_t *)buf = 0; 2411 totlen = 1; 2412 } 2413 break; 2414 case C(UR_GET_STATUS, UT_READ_DEVICE): 2415 if (len > 1) { 2416 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 2417 totlen = 2; 2418 } 2419 break; 2420 case C(UR_GET_STATUS, UT_READ_INTERFACE): 2421 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 2422 if (len > 1) { 2423 USETW(((usb_status_t *)buf)->wStatus, 0); 2424 totlen = 2; 2425 } 2426 break; 2427 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 2428 if (value >= USB_MAX_DEVICES) { 2429 err = USBD_IOERROR; 2430 goto ret; 2431 } 2432 sc->sc_addr = value; 2433 break; 2434 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 2435 if (value != 0 && value != 1) { 2436 err = USBD_IOERROR; 2437 goto ret; 2438 } 2439 sc->sc_conf = value; 2440 break; 2441 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 2442 break; 2443 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 2444 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 2445 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 2446 err = USBD_IOERROR; 2447 goto ret; 2448 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 2449 break; 2450 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 2451 break; 2452 /* Hub requests */ 2453 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2454 break; 2455 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2456 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 2457 "port=%d feature=%d\n", 2458 index, value)); 2459 if (index < 1 || index > sc->sc_noport) { 2460 err = USBD_IOERROR; 2461 goto ret; 2462 } 2463 port = OHCI_RH_PORT_STATUS(index); 2464 switch(value) { 2465 case UHF_PORT_ENABLE: 2466 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2467 break; 2468 case UHF_PORT_SUSPEND: 2469 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2470 break; 2471 case UHF_PORT_POWER: 2472 /* Yes, writing to the LOW_SPEED bit clears power. */ 2473 OWRITE4(sc, port, UPS_LOW_SPEED); 2474 break; 2475 case UHF_C_PORT_CONNECTION: 2476 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2477 break; 2478 case UHF_C_PORT_ENABLE: 2479 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2480 break; 2481 case UHF_C_PORT_SUSPEND: 2482 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2483 break; 2484 case UHF_C_PORT_OVER_CURRENT: 2485 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2486 break; 2487 case UHF_C_PORT_RESET: 2488 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2489 break; 2490 default: 2491 err = USBD_IOERROR; 2492 goto ret; 2493 } 2494 switch(value) { 2495 case UHF_C_PORT_CONNECTION: 2496 case UHF_C_PORT_ENABLE: 2497 case UHF_C_PORT_SUSPEND: 2498 case UHF_C_PORT_OVER_CURRENT: 2499 case UHF_C_PORT_RESET: 2500 /* Enable RHSC interrupt if condition is cleared. */ 2501 if ((OREAD4(sc, port) >> 16) == 0) 2502 ohci_rhsc_able(sc, 1); 2503 break; 2504 default: 2505 break; 2506 } 2507 break; 2508 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2509 if (value != 0) { 2510 err = USBD_IOERROR; 2511 goto ret; 2512 } 2513 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2514 hubd = ohci_hubd; 2515 hubd.bNbrPorts = sc->sc_noport; 2516 USETW(hubd.wHubCharacteristics, 2517 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2518 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2519 /* XXX overcurrent */ 2520 ); 2521 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2522 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2523 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2524 hubd.DeviceRemovable[i++] = (u_int8_t)v; 2525 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2526 l = min(len, hubd.bDescLength); 2527 totlen = l; 2528 memcpy(buf, &hubd, l); 2529 break; 2530 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2531 if (len != 4) { 2532 err = USBD_IOERROR; 2533 goto ret; 2534 } 2535 memset(buf, 0, len); /* ? XXX */ 2536 totlen = len; 2537 break; 2538 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2539 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 2540 index)); 2541 if (index < 1 || index > sc->sc_noport) { 2542 err = USBD_IOERROR; 2543 goto ret; 2544 } 2545 if (len != 4) { 2546 err = USBD_IOERROR; 2547 goto ret; 2548 } 2549 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2550 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 2551 v)); 2552 USETW(ps.wPortStatus, v); 2553 USETW(ps.wPortChange, v >> 16); 2554 l = min(len, sizeof ps); 2555 memcpy(buf, &ps, l); 2556 totlen = l; 2557 break; 2558 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2559 err = USBD_IOERROR; 2560 goto ret; 2561 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2562 break; 2563 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2564 if (index < 1 || index > sc->sc_noport) { 2565 err = USBD_IOERROR; 2566 goto ret; 2567 } 2568 port = OHCI_RH_PORT_STATUS(index); 2569 switch(value) { 2570 case UHF_PORT_ENABLE: 2571 OWRITE4(sc, port, UPS_PORT_ENABLED); 2572 break; 2573 case UHF_PORT_SUSPEND: 2574 OWRITE4(sc, port, UPS_SUSPEND); 2575 break; 2576 case UHF_PORT_RESET: 2577 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 2578 index)); 2579 OWRITE4(sc, port, UPS_RESET); 2580 for (i = 0; i < 5; i++) { 2581 usb_delay_ms(&sc->sc_bus, 2582 USB_PORT_ROOT_RESET_DELAY); 2583 if (sc->sc_dying) { 2584 err = USBD_IOERROR; 2585 goto ret; 2586 } 2587 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2588 break; 2589 } 2590 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 2591 index, OREAD4(sc, port))); 2592 break; 2593 case UHF_PORT_POWER: 2594 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 2595 "%d\n", index)); 2596 OWRITE4(sc, port, UPS_PORT_POWER); 2597 break; 2598 default: 2599 err = USBD_IOERROR; 2600 goto ret; 2601 } 2602 break; 2603 default: 2604 err = USBD_IOERROR; 2605 goto ret; 2606 } 2607 xfer->actlen = totlen; 2608 err = USBD_NORMAL_COMPLETION; 2609 ret: 2610 xfer->status = err; 2611 s = splusb(); 2612 usb_transfer_complete(xfer); 2613 splx(s); 2614 return (USBD_IN_PROGRESS); 2615 } 2616 2617 /* Abort a root control request. */ 2618 Static void 2619 ohci_root_ctrl_abort(usbd_xfer_handle xfer) 2620 { 2621 /* Nothing to do, all transfers are synchronous. */ 2622 } 2623 2624 /* Close the root pipe. */ 2625 Static void 2626 ohci_root_ctrl_close(usbd_pipe_handle pipe) 2627 { 2628 DPRINTF(("ohci_root_ctrl_close\n")); 2629 /* Nothing to do. */ 2630 } 2631 2632 Static usbd_status 2633 ohci_root_intr_transfer(usbd_xfer_handle xfer) 2634 { 2635 usbd_status err; 2636 2637 /* Insert last in queue. */ 2638 err = usb_insert_transfer(xfer); 2639 if (err) 2640 return (err); 2641 2642 /* Pipe isn't running, start first */ 2643 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2644 } 2645 2646 Static usbd_status 2647 ohci_root_intr_start(usbd_xfer_handle xfer) 2648 { 2649 usbd_pipe_handle pipe = xfer->pipe; 2650 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2651 2652 if (sc->sc_dying) 2653 return (USBD_IOERROR); 2654 2655 sc->sc_intrxfer = xfer; 2656 2657 return (USBD_IN_PROGRESS); 2658 } 2659 2660 /* Abort a root interrupt request. */ 2661 Static void 2662 ohci_root_intr_abort(usbd_xfer_handle xfer) 2663 { 2664 int s; 2665 2666 if (xfer->pipe->intrxfer == xfer) { 2667 DPRINTF(("ohci_root_intr_abort: remove\n")); 2668 xfer->pipe->intrxfer = NULL; 2669 } 2670 xfer->status = USBD_CANCELLED; 2671 s = splusb(); 2672 usb_transfer_complete(xfer); 2673 splx(s); 2674 } 2675 2676 /* Close the root pipe. */ 2677 Static void 2678 ohci_root_intr_close(usbd_pipe_handle pipe) 2679 { 2680 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2681 2682 DPRINTF(("ohci_root_intr_close\n")); 2683 2684 sc->sc_intrxfer = NULL; 2685 } 2686 2687 /************************/ 2688 2689 Static usbd_status 2690 ohci_device_ctrl_transfer(usbd_xfer_handle xfer) 2691 { 2692 usbd_status err; 2693 2694 /* Insert last in queue. */ 2695 err = usb_insert_transfer(xfer); 2696 if (err) 2697 return (err); 2698 2699 /* Pipe isn't running, start first */ 2700 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2701 } 2702 2703 Static usbd_status 2704 ohci_device_ctrl_start(usbd_xfer_handle xfer) 2705 { 2706 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2707 usbd_status err; 2708 2709 if (sc->sc_dying) 2710 return (USBD_IOERROR); 2711 2712 #ifdef DIAGNOSTIC 2713 if (!(xfer->rqflags & URQ_REQUEST)) { 2714 /* XXX panic */ 2715 printf("ohci_device_ctrl_transfer: not a request\n"); 2716 return (USBD_INVAL); 2717 } 2718 #endif 2719 2720 err = ohci_device_request(xfer); 2721 if (err) 2722 return (err); 2723 2724 if (sc->sc_bus.use_polling) 2725 ohci_waitintr(sc, xfer); 2726 return (USBD_IN_PROGRESS); 2727 } 2728 2729 /* Abort a device control request. */ 2730 Static void 2731 ohci_device_ctrl_abort(usbd_xfer_handle xfer) 2732 { 2733 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer)); 2734 ohci_abort_xfer(xfer, USBD_CANCELLED); 2735 } 2736 2737 /* Close a device control pipe. */ 2738 Static void 2739 ohci_device_ctrl_close(usbd_pipe_handle pipe) 2740 { 2741 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2742 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2743 2744 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe)); 2745 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2746 ohci_free_std(sc, opipe->tail.td); 2747 } 2748 2749 /************************/ 2750 2751 Static void 2752 ohci_device_clear_toggle(usbd_pipe_handle pipe) 2753 { 2754 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2755 2756 opipe->sed->ed.ed_headp &= htole32(~OHCI_TOGGLECARRY); 2757 } 2758 2759 Static void 2760 ohci_noop(usbd_pipe_handle pipe) 2761 { 2762 } 2763 2764 Static usbd_status 2765 ohci_device_bulk_transfer(usbd_xfer_handle xfer) 2766 { 2767 usbd_status err; 2768 2769 /* Insert last in queue. */ 2770 err = usb_insert_transfer(xfer); 2771 if (err) 2772 return (err); 2773 2774 /* Pipe isn't running, start first */ 2775 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2776 } 2777 2778 Static usbd_status 2779 ohci_device_bulk_start(usbd_xfer_handle xfer) 2780 { 2781 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2782 usbd_device_handle dev = opipe->pipe.device; 2783 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2784 int addr = dev->address; 2785 ohci_soft_td_t *data, *tail, *tdp; 2786 ohci_soft_ed_t *sed; 2787 int s, len, isread, endpt; 2788 usbd_status err; 2789 2790 if (sc->sc_dying) 2791 return (USBD_IOERROR); 2792 2793 #ifdef DIAGNOSTIC 2794 if (xfer->rqflags & URQ_REQUEST) { 2795 /* XXX panic */ 2796 printf("ohci_device_bulk_start: a request\n"); 2797 return (USBD_INVAL); 2798 } 2799 #endif 2800 2801 len = xfer->length; 2802 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 2803 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2804 sed = opipe->sed; 2805 2806 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d " 2807 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags, 2808 endpt)); 2809 2810 opipe->u.bulk.isread = isread; 2811 opipe->u.bulk.length = len; 2812 2813 /* Update device address */ 2814 sed->ed.ed_flags = htole32( 2815 (le32toh(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) | 2816 OHCI_ED_SET_FA(addr)); 2817 2818 /* Allocate a chain of new TDs (including a new tail). */ 2819 data = opipe->tail.td; 2820 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 2821 data, &tail); 2822 /* We want interrupt at the end of the transfer. */ 2823 tail->td.td_flags &= htole32(~OHCI_TD_INTR_MASK); 2824 tail->td.td_flags |= htole32(OHCI_TD_SET_DI(1)); 2825 tail->flags |= OHCI_CALL_DONE; 2826 tail = tail->nexttd; /* point at sentinel */ 2827 if (err) 2828 return (err); 2829 2830 tail->xfer = NULL; 2831 xfer->hcpriv = data; 2832 2833 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x " 2834 "td_cbp=0x%08x td_be=0x%08x\n", 2835 (int)le32toh(sed->ed.ed_flags), 2836 (int)le32toh(data->td.td_flags), 2837 (int)le32toh(data->td.td_cbp), 2838 (int)le32toh(data->td.td_be))); 2839 2840 #ifdef OHCI_DEBUG 2841 if (ohcidebug > 5) { 2842 ohci_dump_ed(sed); 2843 ohci_dump_tds(data); 2844 } 2845 #endif 2846 2847 /* Insert ED in schedule */ 2848 s = splusb(); 2849 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 2850 tdp->xfer = xfer; 2851 } 2852 sed->ed.ed_tailp = htole32(tail->physaddr); 2853 opipe->tail.td = tail; 2854 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 2855 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 2856 if (xfer->timeout && !sc->sc_bus.use_polling) { 2857 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout), 2858 ohci_timeout, xfer); 2859 } 2860 2861 #if 0 2862 /* This goes wrong if we are too slow. */ 2863 if (ohcidebug > 10) { 2864 delay(10000); 2865 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2866 OREAD4(sc, OHCI_COMMAND_STATUS))); 2867 ohci_dump_ed(sed); 2868 ohci_dump_tds(data); 2869 } 2870 #endif 2871 2872 splx(s); 2873 2874 return (USBD_IN_PROGRESS); 2875 } 2876 2877 Static void 2878 ohci_device_bulk_abort(usbd_xfer_handle xfer) 2879 { 2880 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer)); 2881 ohci_abort_xfer(xfer, USBD_CANCELLED); 2882 } 2883 2884 /* 2885 * Close a device bulk pipe. 2886 */ 2887 Static void 2888 ohci_device_bulk_close(usbd_pipe_handle pipe) 2889 { 2890 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2891 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2892 2893 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe)); 2894 ohci_close_pipe(pipe, sc->sc_bulk_head); 2895 ohci_free_std(sc, opipe->tail.td); 2896 } 2897 2898 /************************/ 2899 2900 Static usbd_status 2901 ohci_device_intr_transfer(usbd_xfer_handle xfer) 2902 { 2903 usbd_status err; 2904 2905 /* Insert last in queue. */ 2906 err = usb_insert_transfer(xfer); 2907 if (err) 2908 return (err); 2909 2910 /* Pipe isn't running, start first */ 2911 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2912 } 2913 2914 Static usbd_status 2915 ohci_device_intr_start(usbd_xfer_handle xfer) 2916 { 2917 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2918 usbd_device_handle dev = opipe->pipe.device; 2919 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2920 ohci_soft_ed_t *sed = opipe->sed; 2921 ohci_soft_td_t *data, *tail; 2922 int len; 2923 int s; 2924 2925 if (sc->sc_dying) 2926 return (USBD_IOERROR); 2927 2928 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d " 2929 "flags=%d priv=%p\n", 2930 xfer, xfer->length, xfer->flags, xfer->priv)); 2931 2932 #ifdef DIAGNOSTIC 2933 if (xfer->rqflags & URQ_REQUEST) 2934 panic("ohci_device_intr_transfer: a request"); 2935 #endif 2936 2937 len = xfer->length; 2938 2939 data = opipe->tail.td; 2940 tail = ohci_alloc_std(sc); 2941 if (tail == NULL) 2942 return (USBD_NOMEM); 2943 tail->xfer = NULL; 2944 2945 data->td.td_flags = htole32( 2946 OHCI_TD_IN | OHCI_TD_NOCC | 2947 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 2948 if (xfer->flags & USBD_SHORT_XFER_OK) 2949 data->td.td_flags |= htole32(OHCI_TD_R); 2950 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf, 0)); 2951 data->nexttd = tail; 2952 data->td.td_nexttd = htole32(tail->physaddr); 2953 data->td.td_be = htole32(le32toh(data->td.td_cbp) + len - 1); 2954 data->len = len; 2955 data->xfer = xfer; 2956 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 2957 xfer->hcpriv = data; 2958 2959 #ifdef OHCI_DEBUG 2960 if (ohcidebug > 5) { 2961 DPRINTF(("ohci_device_intr_transfer:\n")); 2962 ohci_dump_ed(sed); 2963 ohci_dump_tds(data); 2964 } 2965 #endif 2966 2967 /* Insert ED in schedule */ 2968 s = splusb(); 2969 sed->ed.ed_tailp = htole32(tail->physaddr); 2970 opipe->tail.td = tail; 2971 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 2972 2973 #if 0 2974 /* 2975 * This goes horribly wrong, printing thousands of descriptors, 2976 * because false references are followed due to the fact that the 2977 * TD is gone. 2978 */ 2979 if (ohcidebug > 5) { 2980 usb_delay_ms(&sc->sc_bus, 5); 2981 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2982 OREAD4(sc, OHCI_COMMAND_STATUS))); 2983 ohci_dump_ed(sed); 2984 ohci_dump_tds(data); 2985 } 2986 #endif 2987 splx(s); 2988 2989 return (USBD_IN_PROGRESS); 2990 } 2991 2992 /* Abort a device control request. */ 2993 Static void 2994 ohci_device_intr_abort(usbd_xfer_handle xfer) 2995 { 2996 if (xfer->pipe->intrxfer == xfer) { 2997 DPRINTF(("ohci_device_intr_abort: remove\n")); 2998 xfer->pipe->intrxfer = NULL; 2999 } 3000 ohci_abort_xfer(xfer, USBD_CANCELLED); 3001 } 3002 3003 /* Close a device interrupt pipe. */ 3004 Static void 3005 ohci_device_intr_close(usbd_pipe_handle pipe) 3006 { 3007 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3008 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3009 int nslots = opipe->u.intr.nslots; 3010 int pos = opipe->u.intr.pos; 3011 int j; 3012 ohci_soft_ed_t *p, *sed = opipe->sed; 3013 int s; 3014 3015 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 3016 pipe, nslots, pos)); 3017 s = splusb(); 3018 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 3019 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 3020 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) 3021 usb_delay_ms(&sc->sc_bus, 2); 3022 3023 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 3024 ; 3025 #ifdef DIAGNOSTIC 3026 if (p == NULL) 3027 panic("ohci_device_intr_close: ED not found"); 3028 #endif 3029 p->next = sed->next; 3030 p->ed.ed_nexted = sed->ed.ed_nexted; 3031 splx(s); 3032 3033 for (j = 0; j < nslots; j++) 3034 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 3035 3036 ohci_free_std(sc, opipe->tail.td); 3037 ohci_free_sed(sc, opipe->sed); 3038 } 3039 3040 Static usbd_status 3041 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival) 3042 { 3043 int i, j, s, best; 3044 u_int npoll, slow, shigh, nslots; 3045 u_int bestbw, bw; 3046 ohci_soft_ed_t *hsed, *sed = opipe->sed; 3047 3048 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 3049 if (ival == 0) { 3050 printf("ohci_setintr: 0 interval\n"); 3051 return (USBD_INVAL); 3052 } 3053 3054 npoll = OHCI_NO_INTRS; 3055 while (npoll > ival) 3056 npoll /= 2; 3057 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 3058 3059 /* 3060 * We now know which level in the tree the ED must go into. 3061 * Figure out which slot has most bandwidth left over. 3062 * Slots to examine: 3063 * npoll 3064 * 1 0 3065 * 2 1 2 3066 * 4 3 4 5 6 3067 * 8 7 8 9 10 11 12 13 14 3068 * N (N-1) .. (N-1+N-1) 3069 */ 3070 slow = npoll-1; 3071 shigh = slow + npoll; 3072 nslots = OHCI_NO_INTRS / npoll; 3073 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 3074 bw = 0; 3075 for (j = 0; j < nslots; j++) 3076 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 3077 if (bw < bestbw) { 3078 best = i; 3079 bestbw = bw; 3080 } 3081 } 3082 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 3083 best, slow, shigh, bestbw)); 3084 3085 s = splusb(); 3086 hsed = sc->sc_eds[best]; 3087 sed->next = hsed->next; 3088 sed->ed.ed_nexted = hsed->ed.ed_nexted; 3089 hsed->next = sed; 3090 hsed->ed.ed_nexted = htole32(sed->physaddr); 3091 splx(s); 3092 3093 for (j = 0; j < nslots; j++) 3094 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 3095 opipe->u.intr.nslots = nslots; 3096 opipe->u.intr.pos = best; 3097 3098 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 3099 return (USBD_NORMAL_COMPLETION); 3100 } 3101 3102 /***********************/ 3103 3104 usbd_status 3105 ohci_device_isoc_transfer(usbd_xfer_handle xfer) 3106 { 3107 usbd_status err; 3108 3109 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer)); 3110 3111 /* Put it on our queue, */ 3112 err = usb_insert_transfer(xfer); 3113 3114 /* bail out on error, */ 3115 if (err && err != USBD_IN_PROGRESS) 3116 return (err); 3117 3118 /* XXX should check inuse here */ 3119 3120 /* insert into schedule, */ 3121 ohci_device_isoc_enter(xfer); 3122 3123 /* and start if the pipe wasn't running */ 3124 if (!err) 3125 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 3126 3127 return (err); 3128 } 3129 3130 void 3131 ohci_device_isoc_enter(usbd_xfer_handle xfer) 3132 { 3133 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3134 usbd_device_handle dev = opipe->pipe.device; 3135 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 3136 ohci_soft_ed_t *sed = opipe->sed; 3137 struct iso *iso = &opipe->u.iso; 3138 ohci_soft_itd_t *sitd, *nsitd; 3139 ohci_physaddr_t buf, offs, noffs, bp0; 3140 int i, ncur, nframes; 3141 int s; 3142 3143 DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p " 3144 "nframes=%d\n", 3145 iso->inuse, iso->next, xfer, xfer->nframes)); 3146 3147 if (sc->sc_dying) 3148 return; 3149 3150 if (iso->next == -1) { 3151 /* Not in use yet, schedule it a few frames ahead. */ 3152 iso->next = le32toh(sc->sc_hcca->hcca_frame_number) + 5; 3153 DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n", 3154 iso->next)); 3155 } 3156 3157 sitd = opipe->tail.itd; 3158 buf = DMAADDR(&xfer->dmabuf, 0); 3159 bp0 = OHCI_PAGE(buf); 3160 offs = OHCI_PAGE_OFFSET(buf); 3161 nframes = xfer->nframes; 3162 xfer->hcpriv = sitd; 3163 for (i = ncur = 0; i < nframes; i++, ncur++) { 3164 noffs = offs + xfer->frlengths[i]; 3165 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ 3166 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */ 3167 3168 /* Allocate next ITD */ 3169 nsitd = ohci_alloc_sitd(sc); 3170 if (nsitd == NULL) { 3171 /* XXX what now? */ 3172 printf("%s: isoc TD alloc failed\n", 3173 USBDEVNAME(sc->sc_bus.bdev)); 3174 return; 3175 } 3176 3177 /* Fill current ITD */ 3178 sitd->itd.itd_flags = htole32( 3179 OHCI_ITD_NOCC | 3180 OHCI_ITD_SET_SF(iso->next) | 3181 OHCI_ITD_SET_DI(6) | /* delay intr a little */ 3182 OHCI_ITD_SET_FC(ncur)); 3183 sitd->itd.itd_bp0 = htole32(bp0); 3184 sitd->nextitd = nsitd; 3185 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 3186 sitd->itd.itd_be = htole32(bp0 + offs - 1); 3187 sitd->xfer = xfer; 3188 sitd->flags = 0; 3189 3190 sitd = nsitd; 3191 iso->next = iso->next + ncur; 3192 bp0 = OHCI_PAGE(buf + offs); 3193 ncur = 0; 3194 } 3195 sitd->itd.itd_offset[ncur] = htole16(OHCI_ITD_MK_OFFS(offs)); 3196 offs = noffs; 3197 } 3198 nsitd = ohci_alloc_sitd(sc); 3199 if (nsitd == NULL) { 3200 /* XXX what now? */ 3201 printf("%s: isoc TD alloc failed\n", 3202 USBDEVNAME(sc->sc_bus.bdev)); 3203 return; 3204 } 3205 /* Fixup last used ITD */ 3206 sitd->itd.itd_flags = htole32( 3207 OHCI_ITD_NOCC | 3208 OHCI_ITD_SET_SF(iso->next) | 3209 OHCI_ITD_SET_DI(0) | 3210 OHCI_ITD_SET_FC(ncur)); 3211 sitd->itd.itd_bp0 = htole32(bp0); 3212 sitd->nextitd = nsitd; 3213 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 3214 sitd->itd.itd_be = htole32(bp0 + offs - 1); 3215 sitd->xfer = xfer; 3216 sitd->flags = OHCI_CALL_DONE; 3217 3218 iso->next = iso->next + ncur; 3219 iso->inuse += nframes; 3220 3221 xfer->actlen = offs; /* XXX pretend we did it all */ 3222 3223 xfer->status = USBD_IN_PROGRESS; 3224 3225 #ifdef OHCI_DEBUG 3226 if (ohcidebug > 5) { 3227 DPRINTF(("ohci_device_isoc_enter: frame=%d\n", 3228 le32toh(sc->sc_hcca->hcca_frame_number))); 3229 ohci_dump_itds(xfer->hcpriv); 3230 ohci_dump_ed(sed); 3231 } 3232 #endif 3233 3234 s = splusb(); 3235 opipe->tail.itd = nsitd; 3236 sed->ed.ed_tailp = htole32(nsitd->physaddr); 3237 splx(s); 3238 3239 #ifdef OHCI_DEBUG 3240 if (ohcidebug > 5) { 3241 delay(150000); 3242 DPRINTF(("ohci_device_isoc_enter: after frame=%d\n", 3243 le32toh(sc->sc_hcca->hcca_frame_number))); 3244 ohci_dump_itds(xfer->hcpriv); 3245 ohci_dump_ed(sed); 3246 } 3247 #endif 3248 } 3249 3250 usbd_status 3251 ohci_device_isoc_start(usbd_xfer_handle xfer) 3252 { 3253 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3254 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3255 3256 DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer)); 3257 3258 if (sc->sc_dying) 3259 return (USBD_IOERROR); 3260 3261 #ifdef DIAGNOSTIC 3262 if (xfer->status != USBD_IN_PROGRESS) 3263 printf("ohci_device_isoc_start: not in progress %p\n", xfer); 3264 #endif 3265 3266 /* XXX anything to do? */ 3267 3268 return (USBD_IN_PROGRESS); 3269 } 3270 3271 void 3272 ohci_device_isoc_abort(usbd_xfer_handle xfer) 3273 { 3274 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3275 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3276 ohci_soft_ed_t *sed; 3277 ohci_soft_itd_t *sitd; 3278 int s; 3279 3280 s = splusb(); 3281 3282 DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer)); 3283 3284 /* Transfer is already done. */ 3285 if (xfer->status != USBD_NOT_STARTED && 3286 xfer->status != USBD_IN_PROGRESS) { 3287 splx(s); 3288 printf("ohci_device_isoc_abort: early return\n"); 3289 return; 3290 } 3291 3292 /* Give xfer the requested abort code. */ 3293 xfer->status = USBD_CANCELLED; 3294 3295 sed = opipe->sed; 3296 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 3297 3298 sitd = xfer->hcpriv; 3299 #ifdef DIAGNOSTIC 3300 if (sitd == NULL) { 3301 splx(s); 3302 printf("ohci_device_isoc_abort: hcpriv==0\n"); 3303 return; 3304 } 3305 #endif 3306 for (; sitd->xfer == xfer; sitd = sitd->nextitd) { 3307 #ifdef DIAGNOSTIC 3308 DPRINTFN(1,("abort sets done sitd=%p\n", sitd)); 3309 sitd->isdone = 1; 3310 #endif 3311 } 3312 3313 splx(s); 3314 3315 usb_delay_ms(&sc->sc_bus, OHCI_ITD_NOFFSET); 3316 3317 s = splusb(); 3318 3319 /* Run callback. */ 3320 usb_transfer_complete(xfer); 3321 3322 sed->ed.ed_headp = htole32(sitd->physaddr); /* unlink TDs */ 3323 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 3324 3325 splx(s); 3326 } 3327 3328 void 3329 ohci_device_isoc_done(usbd_xfer_handle xfer) 3330 { 3331 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3332 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3333 ohci_soft_itd_t *sitd, *nsitd; 3334 3335 DPRINTFN(1,("ohci_device_isoc_done: xfer=%p\n", xfer)); 3336 3337 for (sitd = xfer->hcpriv; 3338 !(sitd->flags & OHCI_CALL_DONE); 3339 sitd = nsitd) { 3340 nsitd = sitd->nextitd; 3341 DPRINTFN(1,("ohci_device_isoc_done: free sitd=%p\n", sitd)); 3342 ohci_free_sitd(sc, sitd); 3343 } 3344 ohci_free_sitd(sc, sitd); 3345 xfer->hcpriv = NULL; 3346 } 3347 3348 usbd_status 3349 ohci_setup_isoc(usbd_pipe_handle pipe) 3350 { 3351 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3352 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3353 struct iso *iso = &opipe->u.iso; 3354 int s; 3355 3356 iso->next = -1; 3357 iso->inuse = 0; 3358 3359 s = splusb(); 3360 ohci_add_ed(opipe->sed, sc->sc_isoc_head); 3361 splx(s); 3362 3363 return (USBD_NORMAL_COMPLETION); 3364 } 3365 3366 void 3367 ohci_device_isoc_close(usbd_pipe_handle pipe) 3368 { 3369 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3370 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3371 int s; 3372 3373 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe)); 3374 3375 s = splusb(); 3376 ohci_rem_ed(opipe->sed, sc->sc_isoc_head); 3377 splx(s); 3378 ohci_close_pipe(pipe, sc->sc_isoc_head); 3379 #ifdef DIAGNOSTIC 3380 opipe->tail.itd->isdone = 1; 3381 #endif 3382 ohci_free_sitd(sc, opipe->tail.itd); 3383 } 3384
Indexes created Wed Sep 24 22:09:59 GMT 2025