ohci.c revision 1.132
1 /* $NetBSD: ohci.c,v 1.132 2002/12/07 06:52:11 toshii Exp $ */ 2 /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */ 3 4 /* 5 * Copyright (c) 1998 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Lennart Augustsson (lennart (at) augustsson.net) at 10 * Carlstedt Research & Technology. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. All advertising materials mentioning features or use of this software 21 * must display the following acknowledgement: 22 * This product includes software developed by the NetBSD 23 * Foundation, Inc. and its contributors. 24 * 4. Neither the name of The NetBSD Foundation nor the names of its 25 * contributors may be used to endorse or promote products derived 26 * from this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 29 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 30 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 31 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 32 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 33 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 34 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 35 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 36 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 37 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 * POSSIBILITY OF SUCH DAMAGE. 39 */ 40 41 /* 42 * USB Open Host Controller driver. 43 * 44 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html 45 * USB spec: http://www.usb.org/developers/data/usbspec.zip 46 */ 47 48 #include <sys/cdefs.h> 49 __KERNEL_RCSID(0, "$NetBSD: ohci.c,v 1.132 2002/12/07 06:52:11 toshii Exp $"); 50 51 #include <sys/param.h> 52 #include <sys/systm.h> 53 #include <sys/malloc.h> 54 #if defined(__NetBSD__) || defined(__OpenBSD__) 55 #include <sys/kernel.h> 56 #include <sys/device.h> 57 #include <sys/select.h> 58 #elif defined(__FreeBSD__) 59 #include <sys/module.h> 60 #include <sys/bus.h> 61 #include <machine/bus_pio.h> 62 #include <machine/bus_memio.h> 63 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 64 #include <machine/cpu.h> 65 #endif 66 #endif 67 #include <sys/proc.h> 68 #include <sys/queue.h> 69 70 #include <machine/bus.h> 71 #include <machine/endian.h> 72 73 #include <dev/usb/usb.h> 74 #include <dev/usb/usbdi.h> 75 #include <dev/usb/usbdivar.h> 76 #include <dev/usb/usb_mem.h> 77 #include <dev/usb/usb_quirks.h> 78 79 #include <dev/usb/ohcireg.h> 80 #include <dev/usb/ohcivar.h> 81 82 #if defined(__FreeBSD__) 83 #include <machine/clock.h> 84 85 #define delay(d) DELAY(d) 86 #endif 87 88 #if defined(__OpenBSD__) 89 struct cfdriver ohci_cd = { 90 NULL, "ohci", DV_DULL 91 }; 92 #endif 93 94 #ifdef OHCI_DEBUG 95 #define DPRINTF(x) if (ohcidebug) logprintf x 96 #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x 97 int ohcidebug = 0; 98 #ifndef __NetBSD__ 99 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 100 #endif 101 #else 102 #define DPRINTF(x) 103 #define DPRINTFN(n,x) 104 #endif 105 106 /* 107 * The OHCI controller is little endian, so on big endian machines 108 * the data strored in memory needs to be swapped. 109 */ 110 #if defined(__FreeBSD__) || defined(__OpenBSD__) 111 #if BYTE_ORDER == BIG_ENDIAN 112 #define htole32(x) (bswap32(x)) 113 #define le32toh(x) (bswap32(x)) 114 #else 115 #define htole32(x) (x) 116 #define le32toh(x) (x) 117 #endif 118 #endif 119 120 struct ohci_pipe; 121 122 Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *); 123 Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *); 124 125 Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *); 126 Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *); 127 128 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *); 129 Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *); 130 131 #if 0 132 Static void ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *, 133 ohci_soft_td_t *); 134 #endif 135 Static usbd_status ohci_alloc_std_chain(struct ohci_pipe *, 136 ohci_softc_t *, int, int, usbd_xfer_handle, 137 ohci_soft_td_t *, ohci_soft_td_t **); 138 139 Static void ohci_shutdown(void *v); 140 Static void ohci_power(int, void *); 141 Static usbd_status ohci_open(usbd_pipe_handle); 142 Static void ohci_poll(struct usbd_bus *); 143 Static void ohci_softintr(void *); 144 Static void ohci_waitintr(ohci_softc_t *, usbd_xfer_handle); 145 Static void ohci_add_done(ohci_softc_t *, ohci_physaddr_t); 146 Static void ohci_rhsc(ohci_softc_t *, usbd_xfer_handle); 147 148 Static usbd_status ohci_device_request(usbd_xfer_handle xfer); 149 Static void ohci_add_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 150 Static void ohci_rem_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 151 Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *); 152 Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *); 153 Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t); 154 Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *); 155 Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *); 156 Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t); 157 158 Static usbd_status ohci_setup_isoc(usbd_pipe_handle pipe); 159 Static void ohci_device_isoc_enter(usbd_xfer_handle); 160 161 Static usbd_status ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 162 Static void ohci_freem(struct usbd_bus *, usb_dma_t *); 163 164 Static usbd_xfer_handle ohci_allocx(struct usbd_bus *); 165 Static void ohci_freex(struct usbd_bus *, usbd_xfer_handle); 166 167 Static usbd_status ohci_root_ctrl_transfer(usbd_xfer_handle); 168 Static usbd_status ohci_root_ctrl_start(usbd_xfer_handle); 169 Static void ohci_root_ctrl_abort(usbd_xfer_handle); 170 Static void ohci_root_ctrl_close(usbd_pipe_handle); 171 Static void ohci_root_ctrl_done(usbd_xfer_handle); 172 173 Static usbd_status ohci_root_intr_transfer(usbd_xfer_handle); 174 Static usbd_status ohci_root_intr_start(usbd_xfer_handle); 175 Static void ohci_root_intr_abort(usbd_xfer_handle); 176 Static void ohci_root_intr_close(usbd_pipe_handle); 177 Static void ohci_root_intr_done(usbd_xfer_handle); 178 179 Static usbd_status ohci_device_ctrl_transfer(usbd_xfer_handle); 180 Static usbd_status ohci_device_ctrl_start(usbd_xfer_handle); 181 Static void ohci_device_ctrl_abort(usbd_xfer_handle); 182 Static void ohci_device_ctrl_close(usbd_pipe_handle); 183 Static void ohci_device_ctrl_done(usbd_xfer_handle); 184 185 Static usbd_status ohci_device_bulk_transfer(usbd_xfer_handle); 186 Static usbd_status ohci_device_bulk_start(usbd_xfer_handle); 187 Static void ohci_device_bulk_abort(usbd_xfer_handle); 188 Static void ohci_device_bulk_close(usbd_pipe_handle); 189 Static void ohci_device_bulk_done(usbd_xfer_handle); 190 191 Static usbd_status ohci_device_intr_transfer(usbd_xfer_handle); 192 Static usbd_status ohci_device_intr_start(usbd_xfer_handle); 193 Static void ohci_device_intr_abort(usbd_xfer_handle); 194 Static void ohci_device_intr_close(usbd_pipe_handle); 195 Static void ohci_device_intr_done(usbd_xfer_handle); 196 197 Static usbd_status ohci_device_isoc_transfer(usbd_xfer_handle); 198 Static usbd_status ohci_device_isoc_start(usbd_xfer_handle); 199 Static void ohci_device_isoc_abort(usbd_xfer_handle); 200 Static void ohci_device_isoc_close(usbd_pipe_handle); 201 Static void ohci_device_isoc_done(usbd_xfer_handle); 202 203 Static usbd_status ohci_device_setintr(ohci_softc_t *sc, 204 struct ohci_pipe *pipe, int ival); 205 206 Static int ohci_str(usb_string_descriptor_t *, int, const char *); 207 208 Static void ohci_timeout(void *); 209 Static void ohci_timeout_task(void *); 210 Static void ohci_rhsc_able(ohci_softc_t *, int); 211 Static void ohci_rhsc_enable(void *); 212 213 Static void ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *); 214 Static void ohci_abort_xfer(usbd_xfer_handle, usbd_status); 215 216 Static void ohci_device_clear_toggle(usbd_pipe_handle pipe); 217 Static void ohci_noop(usbd_pipe_handle pipe); 218 219 #ifdef OHCI_DEBUG 220 Static void ohci_dumpregs(ohci_softc_t *); 221 Static void ohci_dump_tds(ohci_soft_td_t *); 222 Static void ohci_dump_td(ohci_soft_td_t *); 223 Static void ohci_dump_ed(ohci_soft_ed_t *); 224 Static void ohci_dump_itd(ohci_soft_itd_t *); 225 Static void ohci_dump_itds(ohci_soft_itd_t *); 226 #endif 227 228 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 229 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 230 #define OWRITE1(sc, r, x) \ 231 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 232 #define OWRITE2(sc, r, x) \ 233 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 234 #define OWRITE4(sc, r, x) \ 235 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 236 #define OREAD1(sc, r) (OBARR(sc), bus_space_read_1((sc)->iot, (sc)->ioh, (r))) 237 #define OREAD2(sc, r) (OBARR(sc), bus_space_read_2((sc)->iot, (sc)->ioh, (r))) 238 #define OREAD4(sc, r) (OBARR(sc), bus_space_read_4((sc)->iot, (sc)->ioh, (r))) 239 240 /* Reverse the bits in a value 0 .. 31 */ 241 Static u_int8_t revbits[OHCI_NO_INTRS] = 242 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 243 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 244 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 245 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 246 247 struct ohci_pipe { 248 struct usbd_pipe pipe; 249 ohci_soft_ed_t *sed; 250 union { 251 ohci_soft_td_t *td; 252 ohci_soft_itd_t *itd; 253 } tail; 254 /* Info needed for different pipe kinds. */ 255 union { 256 /* Control pipe */ 257 struct { 258 usb_dma_t reqdma; 259 u_int length; 260 ohci_soft_td_t *setup, *data, *stat; 261 } ctl; 262 /* Interrupt pipe */ 263 struct { 264 int nslots; 265 int pos; 266 } intr; 267 /* Bulk pipe */ 268 struct { 269 u_int length; 270 int isread; 271 } bulk; 272 /* Iso pipe */ 273 struct iso { 274 int next, inuse; 275 } iso; 276 } u; 277 }; 278 279 #define OHCI_INTR_ENDPT 1 280 281 Static struct usbd_bus_methods ohci_bus_methods = { 282 ohci_open, 283 ohci_softintr, 284 ohci_poll, 285 ohci_allocm, 286 ohci_freem, 287 ohci_allocx, 288 ohci_freex, 289 }; 290 291 Static struct usbd_pipe_methods ohci_root_ctrl_methods = { 292 ohci_root_ctrl_transfer, 293 ohci_root_ctrl_start, 294 ohci_root_ctrl_abort, 295 ohci_root_ctrl_close, 296 ohci_noop, 297 ohci_root_ctrl_done, 298 }; 299 300 Static struct usbd_pipe_methods ohci_root_intr_methods = { 301 ohci_root_intr_transfer, 302 ohci_root_intr_start, 303 ohci_root_intr_abort, 304 ohci_root_intr_close, 305 ohci_noop, 306 ohci_root_intr_done, 307 }; 308 309 Static struct usbd_pipe_methods ohci_device_ctrl_methods = { 310 ohci_device_ctrl_transfer, 311 ohci_device_ctrl_start, 312 ohci_device_ctrl_abort, 313 ohci_device_ctrl_close, 314 ohci_noop, 315 ohci_device_ctrl_done, 316 }; 317 318 Static struct usbd_pipe_methods ohci_device_intr_methods = { 319 ohci_device_intr_transfer, 320 ohci_device_intr_start, 321 ohci_device_intr_abort, 322 ohci_device_intr_close, 323 ohci_device_clear_toggle, 324 ohci_device_intr_done, 325 }; 326 327 Static struct usbd_pipe_methods ohci_device_bulk_methods = { 328 ohci_device_bulk_transfer, 329 ohci_device_bulk_start, 330 ohci_device_bulk_abort, 331 ohci_device_bulk_close, 332 ohci_device_clear_toggle, 333 ohci_device_bulk_done, 334 }; 335 336 Static struct usbd_pipe_methods ohci_device_isoc_methods = { 337 ohci_device_isoc_transfer, 338 ohci_device_isoc_start, 339 ohci_device_isoc_abort, 340 ohci_device_isoc_close, 341 ohci_noop, 342 ohci_device_isoc_done, 343 }; 344 345 #if defined(__NetBSD__) || defined(__OpenBSD__) 346 int 347 ohci_activate(device_ptr_t self, enum devact act) 348 { 349 struct ohci_softc *sc = (struct ohci_softc *)self; 350 int rv = 0; 351 352 switch (act) { 353 case DVACT_ACTIVATE: 354 return (EOPNOTSUPP); 355 break; 356 357 case DVACT_DEACTIVATE: 358 if (sc->sc_child != NULL) 359 rv = config_deactivate(sc->sc_child); 360 sc->sc_dying = 1; 361 break; 362 } 363 return (rv); 364 } 365 366 int 367 ohci_detach(struct ohci_softc *sc, int flags) 368 { 369 int rv = 0; 370 371 if (sc->sc_child != NULL) 372 rv = config_detach(sc->sc_child, flags); 373 374 if (rv != 0) 375 return (rv); 376 377 usb_uncallout(sc->sc_tmo_rhsc, ohci_rhsc_enable, sc); 378 379 #if defined(__NetBSD__) || defined(__OpenBSD__) 380 powerhook_disestablish(sc->sc_powerhook); 381 shutdownhook_disestablish(sc->sc_shutdownhook); 382 #endif 383 384 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 385 386 /* free data structures XXX */ 387 388 return (rv); 389 } 390 #endif 391 392 ohci_soft_ed_t * 393 ohci_alloc_sed(ohci_softc_t *sc) 394 { 395 ohci_soft_ed_t *sed; 396 usbd_status err; 397 int i, offs; 398 usb_dma_t dma; 399 400 if (sc->sc_freeeds == NULL) { 401 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 402 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 403 OHCI_ED_ALIGN, &dma); 404 if (err) 405 return (0); 406 for(i = 0; i < OHCI_SED_CHUNK; i++) { 407 offs = i * OHCI_SED_SIZE; 408 sed = KERNADDR(&dma, offs); 409 sed->physaddr = DMAADDR(&dma, offs); 410 sed->next = sc->sc_freeeds; 411 sc->sc_freeeds = sed; 412 } 413 } 414 sed = sc->sc_freeeds; 415 sc->sc_freeeds = sed->next; 416 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 417 sed->next = 0; 418 return (sed); 419 } 420 421 void 422 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 423 { 424 sed->next = sc->sc_freeeds; 425 sc->sc_freeeds = sed; 426 } 427 428 ohci_soft_td_t * 429 ohci_alloc_std(ohci_softc_t *sc) 430 { 431 ohci_soft_td_t *std; 432 usbd_status err; 433 int i, offs; 434 usb_dma_t dma; 435 int s; 436 437 if (sc->sc_freetds == NULL) { 438 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 439 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 440 OHCI_TD_ALIGN, &dma); 441 if (err) 442 return (NULL); 443 s = splusb(); 444 for(i = 0; i < OHCI_STD_CHUNK; i++) { 445 offs = i * OHCI_STD_SIZE; 446 std = KERNADDR(&dma, offs); 447 std->physaddr = DMAADDR(&dma, offs); 448 std->nexttd = sc->sc_freetds; 449 sc->sc_freetds = std; 450 } 451 splx(s); 452 } 453 454 s = splusb(); 455 std = sc->sc_freetds; 456 sc->sc_freetds = std->nexttd; 457 memset(&std->td, 0, sizeof(ohci_td_t)); 458 std->nexttd = NULL; 459 std->xfer = NULL; 460 ohci_hash_add_td(sc, std); 461 splx(s); 462 463 return (std); 464 } 465 466 void 467 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std) 468 { 469 int s; 470 471 s = splusb(); 472 ohci_hash_rem_td(sc, std); 473 std->nexttd = sc->sc_freetds; 474 sc->sc_freetds = std; 475 splx(s); 476 } 477 478 usbd_status 479 ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc, 480 int alen, int rd, usbd_xfer_handle xfer, 481 ohci_soft_td_t *sp, ohci_soft_td_t **ep) 482 { 483 ohci_soft_td_t *next, *cur; 484 ohci_physaddr_t dataphys, dataphysend; 485 u_int32_t tdflags; 486 int len, curlen; 487 usb_dma_t *dma = &xfer->dmabuf; 488 u_int16_t flags = xfer->flags; 489 490 DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen)); 491 492 len = alen; 493 cur = sp; 494 dataphys = DMAADDR(dma, 0); 495 dataphysend = OHCI_PAGE(dataphys + len - 1); 496 tdflags = htole32( 497 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 498 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) | 499 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR); 500 501 for (;;) { 502 next = ohci_alloc_std(sc); 503 if (next == NULL) 504 goto nomem; 505 506 /* The OHCI hardware can handle at most one page crossing. */ 507 if (OHCI_PAGE(dataphys) == dataphysend || 508 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) { 509 /* we can handle it in this TD */ 510 curlen = len; 511 } else { 512 /* must use multiple TDs, fill as much as possible. */ 513 curlen = 2 * OHCI_PAGE_SIZE - 514 (dataphys & (OHCI_PAGE_SIZE-1)); 515 /* the length must be a multiple of the max size */ 516 curlen -= curlen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize); 517 #ifdef DIAGNOSTIC 518 if (curlen == 0) 519 panic("ohci_alloc_std: curlen == 0"); 520 #endif 521 } 522 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x " 523 "dataphysend=0x%08x len=%d curlen=%d\n", 524 dataphys, dataphysend, 525 len, curlen)); 526 len -= curlen; 527 528 cur->td.td_flags = tdflags; 529 cur->td.td_cbp = htole32(dataphys); 530 cur->nexttd = next; 531 cur->td.td_nexttd = htole32(next->physaddr); 532 cur->td.td_be = htole32(dataphys + curlen - 1); 533 cur->len = curlen; 534 cur->flags = OHCI_ADD_LEN; 535 cur->xfer = xfer; 536 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n", 537 dataphys, dataphys + curlen - 1)); 538 if (len == 0) 539 break; 540 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n")); 541 dataphys += curlen; 542 cur = next; 543 } 544 if ((flags & USBD_FORCE_SHORT_XFER) && 545 alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) { 546 /* Force a 0 length transfer at the end. */ 547 548 cur = next; 549 next = ohci_alloc_std(sc); 550 if (next == NULL) 551 goto nomem; 552 553 cur->td.td_flags = tdflags; 554 cur->td.td_cbp = 0; /* indicate 0 length packet */ 555 cur->nexttd = next; 556 cur->td.td_nexttd = htole32(next->physaddr); 557 cur->td.td_be = ~0; 558 cur->len = 0; 559 cur->flags = 0; 560 cur->xfer = xfer; 561 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n")); 562 } 563 *ep = cur; 564 565 return (USBD_NORMAL_COMPLETION); 566 567 nomem: 568 /* XXX free chain */ 569 return (USBD_NOMEM); 570 } 571 572 #if 0 573 Static void 574 ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std, 575 ohci_soft_td_t *stdend) 576 { 577 ohci_soft_td_t *p; 578 579 for (; std != stdend; std = p) { 580 p = std->nexttd; 581 ohci_free_std(sc, std); 582 } 583 } 584 #endif 585 586 ohci_soft_itd_t * 587 ohci_alloc_sitd(ohci_softc_t *sc) 588 { 589 ohci_soft_itd_t *sitd; 590 usbd_status err; 591 int i, s, offs; 592 usb_dma_t dma; 593 594 if (sc->sc_freeitds == NULL) { 595 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n")); 596 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK, 597 OHCI_ITD_ALIGN, &dma); 598 if (err) 599 return (NULL); 600 s = splusb(); 601 for(i = 0; i < OHCI_SITD_CHUNK; i++) { 602 offs = i * OHCI_SITD_SIZE; 603 sitd = KERNADDR(&dma, offs); 604 sitd->physaddr = DMAADDR(&dma, offs); 605 sitd->nextitd = sc->sc_freeitds; 606 sc->sc_freeitds = sitd; 607 } 608 splx(s); 609 } 610 611 s = splusb(); 612 sitd = sc->sc_freeitds; 613 sc->sc_freeitds = sitd->nextitd; 614 memset(&sitd->itd, 0, sizeof(ohci_itd_t)); 615 sitd->nextitd = NULL; 616 sitd->xfer = NULL; 617 ohci_hash_add_itd(sc, sitd); 618 splx(s); 619 620 #ifdef DIAGNOSTIC 621 sitd->isdone = 0; 622 #endif 623 624 return (sitd); 625 } 626 627 void 628 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 629 { 630 int s; 631 632 DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd)); 633 634 #ifdef DIAGNOSTIC 635 if (!sitd->isdone) { 636 panic("ohci_free_sitd: sitd=%p not done", sitd); 637 return; 638 } 639 #endif 640 641 s = splusb(); 642 ohci_hash_rem_itd(sc, sitd); 643 sitd->nextitd = sc->sc_freeitds; 644 sc->sc_freeitds = sitd; 645 splx(s); 646 } 647 648 usbd_status 649 ohci_init(ohci_softc_t *sc) 650 { 651 ohci_soft_ed_t *sed, *psed; 652 usbd_status err; 653 int i; 654 u_int32_t s, ctl, ival, hcr, fm, per, rev, desca; 655 656 DPRINTF(("ohci_init: start\n")); 657 #if defined(__OpenBSD__) 658 printf(","); 659 #else 660 printf("%s:", USBDEVNAME(sc->sc_bus.bdev)); 661 #endif 662 rev = OREAD4(sc, OHCI_REVISION); 663 printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev), 664 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 665 666 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 667 printf("%s: unsupported OHCI revision\n", 668 USBDEVNAME(sc->sc_bus.bdev)); 669 sc->sc_bus.usbrev = USBREV_UNKNOWN; 670 return (USBD_INVAL); 671 } 672 sc->sc_bus.usbrev = USBREV_1_0; 673 674 for (i = 0; i < OHCI_HASH_SIZE; i++) 675 LIST_INIT(&sc->sc_hash_tds[i]); 676 for (i = 0; i < OHCI_HASH_SIZE; i++) 677 LIST_INIT(&sc->sc_hash_itds[i]); 678 679 SIMPLEQ_INIT(&sc->sc_free_xfers); 680 681 /* XXX determine alignment by R/W */ 682 /* Allocate the HCCA area. */ 683 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 684 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 685 if (err) 686 return (err); 687 sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0); 688 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 689 690 sc->sc_eintrs = OHCI_NORMAL_INTRS; 691 692 /* Allocate dummy ED that starts the control list. */ 693 sc->sc_ctrl_head = ohci_alloc_sed(sc); 694 if (sc->sc_ctrl_head == NULL) { 695 err = USBD_NOMEM; 696 goto bad1; 697 } 698 sc->sc_ctrl_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 699 700 /* Allocate dummy ED that starts the bulk list. */ 701 sc->sc_bulk_head = ohci_alloc_sed(sc); 702 if (sc->sc_bulk_head == NULL) { 703 err = USBD_NOMEM; 704 goto bad2; 705 } 706 sc->sc_bulk_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 707 708 /* Allocate dummy ED that starts the isochronous list. */ 709 sc->sc_isoc_head = ohci_alloc_sed(sc); 710 if (sc->sc_isoc_head == NULL) { 711 err = USBD_NOMEM; 712 goto bad3; 713 } 714 sc->sc_isoc_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 715 716 /* Allocate all the dummy EDs that make up the interrupt tree. */ 717 for (i = 0; i < OHCI_NO_EDS; i++) { 718 sed = ohci_alloc_sed(sc); 719 if (sed == NULL) { 720 while (--i >= 0) 721 ohci_free_sed(sc, sc->sc_eds[i]); 722 err = USBD_NOMEM; 723 goto bad4; 724 } 725 /* All ED fields are set to 0. */ 726 sc->sc_eds[i] = sed; 727 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 728 if (i != 0) 729 psed = sc->sc_eds[(i-1) / 2]; 730 else 731 psed= sc->sc_isoc_head; 732 sed->next = psed; 733 sed->ed.ed_nexted = htole32(psed->physaddr); 734 } 735 /* 736 * Fill HCCA interrupt table. The bit reversal is to get 737 * the tree set up properly to spread the interrupts. 738 */ 739 for (i = 0; i < OHCI_NO_INTRS; i++) 740 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 741 htole32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 742 743 #ifdef OHCI_DEBUG 744 if (ohcidebug > 15) { 745 for (i = 0; i < OHCI_NO_EDS; i++) { 746 printf("ed#%d ", i); 747 ohci_dump_ed(sc->sc_eds[i]); 748 } 749 printf("iso "); 750 ohci_dump_ed(sc->sc_isoc_head); 751 } 752 #endif 753 754 /* Determine in what context we are running. */ 755 ctl = OREAD4(sc, OHCI_CONTROL); 756 if (ctl & OHCI_IR) { 757 /* SMM active, request change */ 758 DPRINTF(("ohci_init: SMM active, request owner change\n")); 759 s = OREAD4(sc, OHCI_COMMAND_STATUS); 760 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 761 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 762 usb_delay_ms(&sc->sc_bus, 1); 763 ctl = OREAD4(sc, OHCI_CONTROL); 764 } 765 if ((ctl & OHCI_IR) == 0) { 766 printf("%s: SMM does not respond, resetting\n", 767 USBDEVNAME(sc->sc_bus.bdev)); 768 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 769 goto reset; 770 } 771 #if 0 772 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */ 773 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 774 /* BIOS started controller. */ 775 DPRINTF(("ohci_init: BIOS active\n")); 776 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 777 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL); 778 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 779 } 780 #endif 781 } else { 782 DPRINTF(("ohci_init: cold started\n")); 783 reset: 784 /* Controller was cold started. */ 785 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 786 } 787 788 /* 789 * This reset should not be necessary according to the OHCI spec, but 790 * without it some controllers do not start. 791 */ 792 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 793 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 794 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 795 796 /* We now own the host controller and the bus has been reset. */ 797 ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL)); 798 799 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 800 /* Nominal time for a reset is 10 us. */ 801 for (i = 0; i < 10; i++) { 802 delay(10); 803 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 804 if (!hcr) 805 break; 806 } 807 if (hcr) { 808 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 809 err = USBD_IOERROR; 810 goto bad5; 811 } 812 #ifdef OHCI_DEBUG 813 if (ohcidebug > 15) 814 ohci_dumpregs(sc); 815 #endif 816 817 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 818 819 /* Set up HC registers. */ 820 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 821 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 822 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 823 /* disable all interrupts and then switch on all desired interrupts */ 824 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 825 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 826 /* switch on desired functional features */ 827 ctl = OREAD4(sc, OHCI_CONTROL); 828 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 829 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 830 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL; 831 /* And finally start it! */ 832 OWRITE4(sc, OHCI_CONTROL, ctl); 833 834 /* 835 * The controller is now OPERATIONAL. Set a some final 836 * registers that should be set earlier, but that the 837 * controller ignores when in the SUSPEND state. 838 */ 839 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 840 fm |= OHCI_FSMPS(ival) | ival; 841 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 842 per = OHCI_PERIODIC(ival); /* 90% periodic */ 843 OWRITE4(sc, OHCI_PERIODIC_START, per); 844 845 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */ 846 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 847 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP); 848 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 849 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY); 850 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca); 851 852 /* 853 * The AMD756 requires a delay before re-reading the register, 854 * otherwise it will occasionally report 0 ports. 855 */ 856 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY); 857 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 858 859 #ifdef OHCI_DEBUG 860 if (ohcidebug > 5) 861 ohci_dumpregs(sc); 862 #endif 863 864 /* Set up the bus struct. */ 865 sc->sc_bus.methods = &ohci_bus_methods; 866 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 867 868 #if defined(__NetBSD__) || defined(__OpenBSD__) 869 sc->sc_control = sc->sc_intre = 0; 870 sc->sc_powerhook = powerhook_establish(ohci_power, sc); 871 sc->sc_shutdownhook = shutdownhook_establish(ohci_shutdown, sc); 872 #endif 873 874 usb_callout_init(sc->sc_tmo_rhsc); 875 876 return (USBD_NORMAL_COMPLETION); 877 878 bad5: 879 for (i = 0; i < OHCI_NO_EDS; i++) 880 ohci_free_sed(sc, sc->sc_eds[i]); 881 bad4: 882 ohci_free_sed(sc, sc->sc_isoc_head); 883 bad3: 884 ohci_free_sed(sc, sc->sc_ctrl_head); 885 bad2: 886 ohci_free_sed(sc, sc->sc_bulk_head); 887 bad1: 888 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 889 return (err); 890 } 891 892 usbd_status 893 ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 894 { 895 #if defined(__NetBSD__) || defined(__OpenBSD__) 896 struct ohci_softc *sc = (struct ohci_softc *)bus; 897 #endif 898 899 return (usb_allocmem(&sc->sc_bus, size, 0, dma)); 900 } 901 902 void 903 ohci_freem(struct usbd_bus *bus, usb_dma_t *dma) 904 { 905 #if defined(__NetBSD__) || defined(__OpenBSD__) 906 struct ohci_softc *sc = (struct ohci_softc *)bus; 907 #endif 908 909 usb_freemem(&sc->sc_bus, dma); 910 } 911 912 usbd_xfer_handle 913 ohci_allocx(struct usbd_bus *bus) 914 { 915 struct ohci_softc *sc = (struct ohci_softc *)bus; 916 usbd_xfer_handle xfer; 917 918 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 919 if (xfer != NULL) { 920 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 921 #ifdef DIAGNOSTIC 922 if (xfer->busy_free != XFER_FREE) { 923 printf("ohci_allocx: xfer=%p not free, 0x%08x\n", xfer, 924 xfer->busy_free); 925 } 926 #endif 927 } else { 928 xfer = malloc(sizeof(struct ohci_xfer), M_USB, M_NOWAIT); 929 } 930 if (xfer != NULL) { 931 memset(xfer, 0, sizeof (struct ohci_xfer)); 932 #ifdef DIAGNOSTIC 933 xfer->busy_free = XFER_BUSY; 934 #endif 935 } 936 return (xfer); 937 } 938 939 void 940 ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 941 { 942 struct ohci_softc *sc = (struct ohci_softc *)bus; 943 944 #ifdef DIAGNOSTIC 945 if (xfer->busy_free != XFER_BUSY) { 946 printf("ohci_freex: xfer=%p not busy, 0x%08x\n", xfer, 947 xfer->busy_free); 948 return; 949 } 950 xfer->busy_free = XFER_FREE; 951 #endif 952 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 953 } 954 955 /* 956 * Shut down the controller when the system is going down. 957 */ 958 void 959 ohci_shutdown(void *v) 960 { 961 ohci_softc_t *sc = v; 962 963 DPRINTF(("ohci_shutdown: stopping the HC\n")); 964 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 965 } 966 967 /* 968 * Handle suspend/resume. 969 * 970 * We need to switch to polling mode here, because this routine is 971 * called from an intterupt context. This is all right since we 972 * are almost suspended anyway. 973 */ 974 void 975 ohci_power(int why, void *v) 976 { 977 ohci_softc_t *sc = v; 978 u_int32_t ctl; 979 int s; 980 981 #ifdef OHCI_DEBUG 982 DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why)); 983 ohci_dumpregs(sc); 984 #endif 985 986 s = splhardusb(); 987 switch (why) { 988 case PWR_SUSPEND: 989 case PWR_STANDBY: 990 sc->sc_bus.use_polling++; 991 ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK; 992 if (sc->sc_control == 0) { 993 /* 994 * Preserve register values, in case that APM BIOS 995 * does not recover them. 996 */ 997 sc->sc_control = ctl; 998 sc->sc_intre = OREAD4(sc, OHCI_INTERRUPT_ENABLE); 999 } 1000 ctl |= OHCI_HCFS_SUSPEND; 1001 OWRITE4(sc, OHCI_CONTROL, ctl); 1002 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1003 sc->sc_bus.use_polling--; 1004 break; 1005 case PWR_RESUME: 1006 sc->sc_bus.use_polling++; 1007 /* Some broken BIOSes do not recover these values */ 1008 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 1009 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 1010 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 1011 if (sc->sc_intre) 1012 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, 1013 sc->sc_intre & (OHCI_ALL_INTRS | OHCI_MIE)); 1014 if (sc->sc_control) 1015 ctl = sc->sc_control; 1016 else 1017 ctl = OREAD4(sc, OHCI_CONTROL); 1018 ctl |= OHCI_HCFS_RESUME; 1019 OWRITE4(sc, OHCI_CONTROL, ctl); 1020 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 1021 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL; 1022 OWRITE4(sc, OHCI_CONTROL, ctl); 1023 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 1024 sc->sc_control = sc->sc_intre = 0; 1025 sc->sc_bus.use_polling--; 1026 break; 1027 case PWR_SOFTSUSPEND: 1028 case PWR_SOFTSTANDBY: 1029 case PWR_SOFTRESUME: 1030 break; 1031 } 1032 splx(s); 1033 } 1034 1035 #ifdef OHCI_DEBUG 1036 void 1037 ohci_dumpregs(ohci_softc_t *sc) 1038 { 1039 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 1040 OREAD4(sc, OHCI_REVISION), 1041 OREAD4(sc, OHCI_CONTROL), 1042 OREAD4(sc, OHCI_COMMAND_STATUS))); 1043 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 1044 OREAD4(sc, OHCI_INTERRUPT_STATUS), 1045 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 1046 OREAD4(sc, OHCI_INTERRUPT_DISABLE))); 1047 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 1048 OREAD4(sc, OHCI_HCCA), 1049 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 1050 OREAD4(sc, OHCI_CONTROL_HEAD_ED))); 1051 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 1052 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 1053 OREAD4(sc, OHCI_BULK_HEAD_ED), 1054 OREAD4(sc, OHCI_BULK_CURRENT_ED))); 1055 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 1056 OREAD4(sc, OHCI_DONE_HEAD), 1057 OREAD4(sc, OHCI_FM_INTERVAL), 1058 OREAD4(sc, OHCI_FM_REMAINING))); 1059 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 1060 OREAD4(sc, OHCI_FM_NUMBER), 1061 OREAD4(sc, OHCI_PERIODIC_START), 1062 OREAD4(sc, OHCI_LS_THRESHOLD))); 1063 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n", 1064 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 1065 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 1066 OREAD4(sc, OHCI_RH_STATUS))); 1067 DPRINTF((" port1=0x%08x port2=0x%08x\n", 1068 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 1069 OREAD4(sc, OHCI_RH_PORT_STATUS(2)))); 1070 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n", 1071 le32toh(sc->sc_hcca->hcca_frame_number), 1072 le32toh(sc->sc_hcca->hcca_done_head))); 1073 } 1074 #endif 1075 1076 Static int ohci_intr1(ohci_softc_t *); 1077 1078 int 1079 ohci_intr(void *p) 1080 { 1081 ohci_softc_t *sc = p; 1082 1083 if (sc == NULL || sc->sc_dying) 1084 return (0); 1085 1086 /* If we get an interrupt while polling, then just ignore it. */ 1087 if (sc->sc_bus.use_polling) { 1088 #ifdef DIAGNOSTIC 1089 printf("ohci_intr: ignored interrupt while polling\n"); 1090 #endif 1091 return (0); 1092 } 1093 1094 return (ohci_intr1(sc)); 1095 } 1096 1097 Static int 1098 ohci_intr1(ohci_softc_t *sc) 1099 { 1100 u_int32_t intrs, eintrs; 1101 ohci_physaddr_t done; 1102 1103 DPRINTFN(14,("ohci_intr1: enter\n")); 1104 1105 /* In case the interrupt occurs before initialization has completed. */ 1106 if (sc == NULL || sc->sc_hcca == NULL) { 1107 #ifdef DIAGNOSTIC 1108 printf("ohci_intr: sc->sc_hcca == NULL\n"); 1109 #endif 1110 return (0); 1111 } 1112 1113 intrs = 0; 1114 done = le32toh(sc->sc_hcca->hcca_done_head); 1115 if (done != 0) { 1116 if (done & ~OHCI_DONE_INTRS) 1117 intrs = OHCI_WDH; 1118 if (done & OHCI_DONE_INTRS) 1119 intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS); 1120 sc->sc_hcca->hcca_done_head = 0; 1121 } else 1122 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1123 1124 if (!intrs) 1125 return (0); 1126 1127 intrs &= ~OHCI_MIE; 1128 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */ 1129 eintrs = intrs & sc->sc_eintrs; 1130 if (!eintrs) 1131 return (0); 1132 1133 sc->sc_bus.intr_context++; 1134 sc->sc_bus.no_intrs++; 1135 DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 1136 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 1137 (u_int)eintrs)); 1138 1139 if (eintrs & OHCI_SO) { 1140 sc->sc_overrun_cnt++; 1141 if (usbd_ratecheck(&sc->sc_overrun_ntc)) { 1142 printf("%s: %u scheduling overruns\n", 1143 USBDEVNAME(sc->sc_bus.bdev), sc->sc_overrun_cnt); 1144 sc->sc_overrun_cnt = 0; 1145 } 1146 /* XXX do what */ 1147 eintrs &= ~OHCI_SO; 1148 } 1149 if (eintrs & OHCI_WDH) { 1150 ohci_add_done(sc, done &~ OHCI_DONE_INTRS); 1151 usb_schedsoftintr(&sc->sc_bus); 1152 eintrs &= ~OHCI_WDH; 1153 } 1154 if (eintrs & OHCI_RD) { 1155 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev)); 1156 /* XXX process resume detect */ 1157 } 1158 if (eintrs & OHCI_UE) { 1159 printf("%s: unrecoverable error, controller halted\n", 1160 USBDEVNAME(sc->sc_bus.bdev)); 1161 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1162 /* XXX what else */ 1163 } 1164 if (eintrs & OHCI_RHSC) { 1165 ohci_rhsc(sc, sc->sc_intrxfer); 1166 /* 1167 * Disable RHSC interrupt for now, because it will be 1168 * on until the port has been reset. 1169 */ 1170 ohci_rhsc_able(sc, 0); 1171 /* Do not allow RHSC interrupts > 1 per second */ 1172 usb_callout(sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc); 1173 eintrs &= ~OHCI_RHSC; 1174 } 1175 1176 sc->sc_bus.intr_context--; 1177 1178 if (eintrs != 0) { 1179 /* Block unprocessed interrupts. XXX */ 1180 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs); 1181 sc->sc_eintrs &= ~eintrs; 1182 printf("%s: blocking intrs 0x%x\n", 1183 USBDEVNAME(sc->sc_bus.bdev), eintrs); 1184 } 1185 1186 return (1); 1187 } 1188 1189 void 1190 ohci_rhsc_able(ohci_softc_t *sc, int on) 1191 { 1192 DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on)); 1193 if (on) { 1194 sc->sc_eintrs |= OHCI_RHSC; 1195 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1196 } else { 1197 sc->sc_eintrs &= ~OHCI_RHSC; 1198 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC); 1199 } 1200 } 1201 1202 void 1203 ohci_rhsc_enable(void *v_sc) 1204 { 1205 ohci_softc_t *sc = v_sc; 1206 int s; 1207 1208 s = splhardusb(); 1209 ohci_rhsc_able(sc, 1); 1210 splx(s); 1211 } 1212 1213 #ifdef OHCI_DEBUG 1214 char *ohci_cc_strs[] = { 1215 "NO_ERROR", 1216 "CRC", 1217 "BIT_STUFFING", 1218 "DATA_TOGGLE_MISMATCH", 1219 "STALL", 1220 "DEVICE_NOT_RESPONDING", 1221 "PID_CHECK_FAILURE", 1222 "UNEXPECTED_PID", 1223 "DATA_OVERRUN", 1224 "DATA_UNDERRUN", 1225 "BUFFER_OVERRUN", 1226 "BUFFER_UNDERRUN", 1227 "reserved", 1228 "reserved", 1229 "NOT_ACCESSED", 1230 "NOT_ACCESSED", 1231 }; 1232 #endif 1233 1234 void 1235 ohci_add_done(ohci_softc_t *sc, ohci_physaddr_t done) 1236 { 1237 ohci_soft_itd_t *sitd, *sidone, **ip; 1238 ohci_soft_td_t *std, *sdone, **p; 1239 1240 /* Reverse the done list. */ 1241 for (sdone = NULL, sidone = NULL; done != 0; ) { 1242 std = ohci_hash_find_td(sc, done); 1243 if (std != NULL) { 1244 std->dnext = sdone; 1245 done = le32toh(std->td.td_nexttd); 1246 sdone = std; 1247 DPRINTFN(10,("add TD %p\n", std)); 1248 continue; 1249 } 1250 sitd = ohci_hash_find_itd(sc, done); 1251 if (sitd != NULL) { 1252 sitd->dnext = sidone; 1253 done = le32toh(sitd->itd.itd_nextitd); 1254 sidone = sitd; 1255 DPRINTFN(5,("add ITD %p\n", sitd)); 1256 continue; 1257 } 1258 panic("ohci_add_done: addr 0x%08lx not found", (u_long)done); 1259 } 1260 1261 /* sdone & sidone now hold the done lists. */ 1262 /* Put them on the already processed lists. */ 1263 for (p = &sc->sc_sdone; *p != NULL; p = &(*p)->dnext) 1264 ; 1265 *p = sdone; 1266 for (ip = &sc->sc_sidone; *ip != NULL; ip = &(*ip)->dnext) 1267 ; 1268 *ip = sidone; 1269 } 1270 1271 void 1272 ohci_softintr(void *v) 1273 { 1274 ohci_softc_t *sc = v; 1275 ohci_soft_itd_t *sitd, *sidone, *sitdnext; 1276 ohci_soft_td_t *std, *sdone, *stdnext; 1277 usbd_xfer_handle xfer; 1278 int len, cc, s; 1279 1280 DPRINTFN(10,("ohci_softintr: enter\n")); 1281 1282 sc->sc_bus.intr_context++; 1283 1284 s = splhardusb(); 1285 sdone = sc->sc_sdone; 1286 sc->sc_sdone = NULL; 1287 sidone = sc->sc_sidone; 1288 sc->sc_sidone = NULL; 1289 splx(s); 1290 1291 DPRINTFN(10,("ohci_softintr: sdone=%p sidone=%p\n", sdone, sidone)); 1292 1293 #ifdef OHCI_DEBUG 1294 if (ohcidebug > 10) { 1295 DPRINTF(("ohci_process_done: TD done:\n")); 1296 ohci_dump_tds(sdone); 1297 } 1298 #endif 1299 1300 for (std = sdone; std; std = stdnext) { 1301 xfer = std->xfer; 1302 stdnext = std->dnext; 1303 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n", 1304 std, xfer, xfer ? xfer->hcpriv : 0)); 1305 if (xfer == NULL) { 1306 /* 1307 * xfer == NULL: There seems to be no xfer associated 1308 * with this TD. It is tailp that happened to end up on 1309 * the done queue. 1310 * Shouldn't happen, but some chips are broken(?). 1311 */ 1312 continue; 1313 } 1314 if (xfer->status == USBD_CANCELLED || 1315 xfer->status == USBD_TIMEOUT) { 1316 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1317 xfer)); 1318 /* Handled by abort routine. */ 1319 continue; 1320 } 1321 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 1322 cc = OHCI_TD_GET_CC(le32toh(std->td.td_flags)); 1323 if (cc == OHCI_CC_NO_ERROR) { 1324 len = std->len; 1325 if (std->td.td_cbp != 0) 1326 len -= le32toh(std->td.td_be) - 1327 le32toh(std->td.td_cbp) + 1; 1328 DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", 1329 len, std->flags)); 1330 if (std->flags & OHCI_ADD_LEN) 1331 xfer->actlen += len; 1332 if (std->flags & OHCI_CALL_DONE) { 1333 xfer->status = USBD_NORMAL_COMPLETION; 1334 usb_transfer_complete(xfer); 1335 } 1336 ohci_free_std(sc, std); 1337 } else { 1338 /* 1339 * Endpoint is halted. First unlink all the TDs 1340 * belonging to the failed transfer, and then restart 1341 * the endpoint. 1342 */ 1343 ohci_soft_td_t *p, *n; 1344 struct ohci_pipe *opipe = 1345 (struct ohci_pipe *)xfer->pipe; 1346 1347 DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n", 1348 OHCI_TD_GET_CC(le32toh(std->td.td_flags)), 1349 ohci_cc_strs[OHCI_TD_GET_CC(le32toh(std->td.td_flags))])); 1350 1351 /* remove TDs */ 1352 for (p = std; p->xfer == xfer; p = n) { 1353 n = p->nexttd; 1354 ohci_free_std(sc, p); 1355 } 1356 1357 /* clear halt */ 1358 opipe->sed->ed.ed_headp = htole32(p->physaddr); 1359 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1360 1361 if (cc == OHCI_CC_STALL) 1362 xfer->status = USBD_STALLED; 1363 else 1364 xfer->status = USBD_IOERROR; 1365 usb_transfer_complete(xfer); 1366 } 1367 } 1368 1369 #ifdef OHCI_DEBUG 1370 if (ohcidebug > 10) { 1371 DPRINTF(("ohci_softintr: ITD done:\n")); 1372 ohci_dump_itds(sidone); 1373 } 1374 #endif 1375 1376 for (sitd = sidone; sitd != NULL; sitd = sitdnext) { 1377 xfer = sitd->xfer; 1378 sitdnext = sitd->dnext; 1379 DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n", 1380 sitd, xfer, xfer ? xfer->hcpriv : 0)); 1381 if (xfer == NULL) 1382 continue; 1383 if (xfer->status == USBD_CANCELLED || 1384 xfer->status == USBD_TIMEOUT) { 1385 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1386 xfer)); 1387 /* Handled by abort routine. */ 1388 continue; 1389 } 1390 #ifdef DIAGNOSTIC 1391 if (sitd->isdone) 1392 printf("ohci_softintr: sitd=%p is done\n", sitd); 1393 sitd->isdone = 1; 1394 #endif 1395 cc = OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags)); 1396 if (cc == OHCI_CC_NO_ERROR) { 1397 /* XXX compute length for input */ 1398 struct ohci_pipe *opipe = 1399 (struct ohci_pipe *)xfer->pipe; 1400 if (sitd->flags & OHCI_CALL_DONE) { 1401 opipe->u.iso.inuse -= xfer->nframes; 1402 /* XXX update frlengths with actual length */ 1403 /* XXX xfer->actlen = actlen; */ 1404 xfer->status = USBD_NORMAL_COMPLETION; 1405 usb_transfer_complete(xfer); 1406 } 1407 } else { 1408 /* XXX Do more */ 1409 xfer->status = USBD_IOERROR; 1410 usb_transfer_complete(xfer); 1411 } 1412 } 1413 1414 #ifdef USB_USE_SOFTINTR 1415 if (sc->sc_softwake) { 1416 sc->sc_softwake = 0; 1417 wakeup(&sc->sc_softwake); 1418 } 1419 #endif /* USB_USE_SOFTINTR */ 1420 1421 sc->sc_bus.intr_context--; 1422 DPRINTFN(10,("ohci_softintr: done:\n")); 1423 } 1424 1425 void 1426 ohci_device_ctrl_done(usbd_xfer_handle xfer) 1427 { 1428 DPRINTFN(10,("ohci_ctrl_done: xfer=%p\n", xfer)); 1429 1430 #ifdef DIAGNOSTIC 1431 if (!(xfer->rqflags & URQ_REQUEST)) { 1432 panic("ohci_ctrl_done: not a request"); 1433 } 1434 #endif 1435 xfer->hcpriv = NULL; 1436 } 1437 1438 void 1439 ohci_device_intr_done(usbd_xfer_handle xfer) 1440 { 1441 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1442 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1443 ohci_soft_ed_t *sed = opipe->sed; 1444 ohci_soft_td_t *data, *tail; 1445 1446 1447 DPRINTFN(10,("ohci_intr_done: xfer=%p, actlen=%d\n", 1448 xfer, xfer->actlen)); 1449 1450 xfer->hcpriv = NULL; 1451 1452 if (xfer->pipe->repeat) { 1453 data = opipe->tail.td; 1454 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 1455 if (tail == NULL) { 1456 xfer->status = USBD_NOMEM; 1457 return; 1458 } 1459 tail->xfer = NULL; 1460 1461 data->td.td_flags = htole32( 1462 OHCI_TD_IN | OHCI_TD_NOCC | 1463 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 1464 if (xfer->flags & USBD_SHORT_XFER_OK) 1465 data->td.td_flags |= htole32(OHCI_TD_R); 1466 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf, 0)); 1467 data->nexttd = tail; 1468 data->td.td_nexttd = htole32(tail->physaddr); 1469 data->td.td_be = htole32(le32toh(data->td.td_cbp) + 1470 xfer->length - 1); 1471 data->len = xfer->length; 1472 data->xfer = xfer; 1473 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1474 xfer->hcpriv = data; 1475 xfer->actlen = 0; 1476 1477 sed->ed.ed_tailp = htole32(tail->physaddr); 1478 opipe->tail.td = tail; 1479 } 1480 } 1481 1482 void 1483 ohci_device_bulk_done(usbd_xfer_handle xfer) 1484 { 1485 DPRINTFN(10,("ohci_bulk_done: xfer=%p, actlen=%d\n", 1486 xfer, xfer->actlen)); 1487 1488 xfer->hcpriv = NULL; 1489 } 1490 1491 void 1492 ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer) 1493 { 1494 usbd_pipe_handle pipe; 1495 struct ohci_pipe *opipe; 1496 u_char *p; 1497 int i, m; 1498 int hstatus; 1499 1500 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1501 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n", 1502 sc, xfer, hstatus)); 1503 1504 if (xfer == NULL) { 1505 /* Just ignore the change. */ 1506 return; 1507 } 1508 1509 pipe = xfer->pipe; 1510 opipe = (struct ohci_pipe *)pipe; 1511 1512 p = KERNADDR(&xfer->dmabuf, 0); 1513 m = min(sc->sc_noport, xfer->length * 8 - 1); 1514 memset(p, 0, xfer->length); 1515 for (i = 1; i <= m; i++) { 1516 /* Pick out CHANGE bits from the status reg. */ 1517 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1518 p[i/8] |= 1 << (i%8); 1519 } 1520 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 1521 xfer->actlen = xfer->length; 1522 xfer->status = USBD_NORMAL_COMPLETION; 1523 1524 usb_transfer_complete(xfer); 1525 } 1526 1527 void 1528 ohci_root_intr_done(usbd_xfer_handle xfer) 1529 { 1530 xfer->hcpriv = NULL; 1531 } 1532 1533 void 1534 ohci_root_ctrl_done(usbd_xfer_handle xfer) 1535 { 1536 xfer->hcpriv = NULL; 1537 } 1538 1539 /* 1540 * Wait here until controller claims to have an interrupt. 1541 * Then call ohci_intr and return. Use timeout to avoid waiting 1542 * too long. 1543 */ 1544 void 1545 ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer) 1546 { 1547 int timo = xfer->timeout; 1548 int usecs; 1549 u_int32_t intrs; 1550 1551 xfer->status = USBD_IN_PROGRESS; 1552 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 1553 usb_delay_ms(&sc->sc_bus, 1); 1554 if (sc->sc_dying) 1555 break; 1556 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 1557 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs)); 1558 #ifdef OHCI_DEBUG 1559 if (ohcidebug > 15) 1560 ohci_dumpregs(sc); 1561 #endif 1562 if (intrs) { 1563 ohci_intr1(sc); 1564 if (xfer->status != USBD_IN_PROGRESS) 1565 return; 1566 } 1567 } 1568 1569 /* Timeout */ 1570 DPRINTF(("ohci_waitintr: timeout\n")); 1571 xfer->status = USBD_TIMEOUT; 1572 usb_transfer_complete(xfer); 1573 /* XXX should free TD */ 1574 } 1575 1576 void 1577 ohci_poll(struct usbd_bus *bus) 1578 { 1579 ohci_softc_t *sc = (ohci_softc_t *)bus; 1580 #ifdef OHCI_DEBUG 1581 static int last; 1582 int new; 1583 new = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1584 if (new != last) { 1585 DPRINTFN(10,("ohci_poll: intrs=0x%04x\n", new)); 1586 last = new; 1587 } 1588 #endif 1589 1590 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) 1591 ohci_intr1(sc); 1592 } 1593 1594 usbd_status 1595 ohci_device_request(usbd_xfer_handle xfer) 1596 { 1597 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1598 usb_device_request_t *req = &xfer->request; 1599 usbd_device_handle dev = opipe->pipe.device; 1600 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1601 int addr = dev->address; 1602 ohci_soft_td_t *setup, *stat, *next, *tail; 1603 ohci_soft_ed_t *sed; 1604 int isread; 1605 int len; 1606 usbd_status err; 1607 int s; 1608 1609 isread = req->bmRequestType & UT_READ; 1610 len = UGETW(req->wLength); 1611 1612 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 1613 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 1614 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1615 UGETW(req->wIndex), len, addr, 1616 opipe->pipe.endpoint->edesc->bEndpointAddress)); 1617 1618 setup = opipe->tail.td; 1619 stat = ohci_alloc_std(sc); 1620 if (stat == NULL) { 1621 err = USBD_NOMEM; 1622 goto bad1; 1623 } 1624 tail = ohci_alloc_std(sc); 1625 if (tail == NULL) { 1626 err = USBD_NOMEM; 1627 goto bad2; 1628 } 1629 tail->xfer = NULL; 1630 1631 sed = opipe->sed; 1632 opipe->u.ctl.length = len; 1633 1634 /* Update device address and length since they may have changed. */ 1635 /* XXX This only needs to be done once, but it's too early in open. */ 1636 /* XXXX Should not touch ED here! */ 1637 sed->ed.ed_flags = htole32( 1638 (le32toh(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) | 1639 OHCI_ED_SET_FA(addr) | 1640 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize))); 1641 1642 next = stat; 1643 1644 /* Set up data transaction */ 1645 if (len != 0) { 1646 ohci_soft_td_t *std = stat; 1647 1648 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 1649 std, &stat); 1650 stat = stat->nexttd; /* point at free TD */ 1651 if (err) 1652 goto bad3; 1653 /* Start toggle at 1 and then use the carried toggle. */ 1654 std->td.td_flags &= htole32(~OHCI_TD_TOGGLE_MASK); 1655 std->td.td_flags |= htole32(OHCI_TD_TOGGLE_1); 1656 } 1657 1658 memcpy(KERNADDR(&opipe->u.ctl.reqdma, 0), req, sizeof *req); 1659 1660 setup->td.td_flags = htole32(OHCI_TD_SETUP | OHCI_TD_NOCC | 1661 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1662 setup->td.td_cbp = htole32(DMAADDR(&opipe->u.ctl.reqdma, 0)); 1663 setup->nexttd = next; 1664 setup->td.td_nexttd = htole32(next->physaddr); 1665 setup->td.td_be = htole32(le32toh(setup->td.td_cbp) + sizeof *req - 1); 1666 setup->len = 0; 1667 setup->xfer = xfer; 1668 setup->flags = 0; 1669 xfer->hcpriv = setup; 1670 1671 stat->td.td_flags = htole32( 1672 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | 1673 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1674 stat->td.td_cbp = 0; 1675 stat->nexttd = tail; 1676 stat->td.td_nexttd = htole32(tail->physaddr); 1677 stat->td.td_be = 0; 1678 stat->flags = OHCI_CALL_DONE; 1679 stat->len = 0; 1680 stat->xfer = xfer; 1681 1682 #ifdef OHCI_DEBUG 1683 if (ohcidebug > 5) { 1684 DPRINTF(("ohci_device_request:\n")); 1685 ohci_dump_ed(sed); 1686 ohci_dump_tds(setup); 1687 } 1688 #endif 1689 1690 /* Insert ED in schedule */ 1691 s = splusb(); 1692 sed->ed.ed_tailp = htole32(tail->physaddr); 1693 opipe->tail.td = tail; 1694 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1695 if (xfer->timeout && !sc->sc_bus.use_polling) { 1696 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout), 1697 ohci_timeout, xfer); 1698 } 1699 splx(s); 1700 1701 #ifdef OHCI_DEBUG 1702 if (ohcidebug > 20) { 1703 delay(10000); 1704 DPRINTF(("ohci_device_request: status=%x\n", 1705 OREAD4(sc, OHCI_COMMAND_STATUS))); 1706 ohci_dumpregs(sc); 1707 printf("ctrl head:\n"); 1708 ohci_dump_ed(sc->sc_ctrl_head); 1709 printf("sed:\n"); 1710 ohci_dump_ed(sed); 1711 ohci_dump_tds(setup); 1712 } 1713 #endif 1714 1715 return (USBD_NORMAL_COMPLETION); 1716 1717 bad3: 1718 ohci_free_std(sc, tail); 1719 bad2: 1720 ohci_free_std(sc, stat); 1721 bad1: 1722 return (err); 1723 } 1724 1725 /* 1726 * Add an ED to the schedule. Called at splusb(). 1727 */ 1728 void 1729 ohci_add_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1730 { 1731 DPRINTFN(8,("ohci_add_ed: sed=%p head=%p\n", sed, head)); 1732 1733 SPLUSBCHECK; 1734 sed->next = head->next; 1735 sed->ed.ed_nexted = head->ed.ed_nexted; 1736 head->next = sed; 1737 head->ed.ed_nexted = htole32(sed->physaddr); 1738 } 1739 1740 /* 1741 * Remove an ED from the schedule. Called at splusb(). 1742 */ 1743 void 1744 ohci_rem_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1745 { 1746 ohci_soft_ed_t *p; 1747 1748 SPLUSBCHECK; 1749 1750 /* XXX */ 1751 for (p = head; p == NULL && p->next != sed; p = p->next) 1752 ; 1753 if (p == NULL) 1754 panic("ohci_rem_ed: ED not found"); 1755 p->next = sed->next; 1756 p->ed.ed_nexted = sed->ed.ed_nexted; 1757 } 1758 1759 /* 1760 * When a transfer is completed the TD is added to the done queue by 1761 * the host controller. This queue is the processed by software. 1762 * Unfortunately the queue contains the physical address of the TD 1763 * and we have no simple way to translate this back to a kernel address. 1764 * To make the translation possible (and fast) we use a hash table of 1765 * TDs currently in the schedule. The physical address is used as the 1766 * hash value. 1767 */ 1768 1769 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1770 /* Called at splusb() */ 1771 void 1772 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1773 { 1774 int h = HASH(std->physaddr); 1775 1776 SPLUSBCHECK; 1777 1778 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1779 } 1780 1781 /* Called at splusb() */ 1782 void 1783 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1784 { 1785 SPLUSBCHECK; 1786 1787 LIST_REMOVE(std, hnext); 1788 } 1789 1790 ohci_soft_td_t * 1791 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a) 1792 { 1793 int h = HASH(a); 1794 ohci_soft_td_t *std; 1795 1796 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1797 std != NULL; 1798 std = LIST_NEXT(std, hnext)) 1799 if (std->physaddr == a) 1800 return (std); 1801 return (NULL); 1802 } 1803 1804 /* Called at splusb() */ 1805 void 1806 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1807 { 1808 int h = HASH(sitd->physaddr); 1809 1810 SPLUSBCHECK; 1811 1812 DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n", 1813 sitd, (u_long)sitd->physaddr)); 1814 1815 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext); 1816 } 1817 1818 /* Called at splusb() */ 1819 void 1820 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1821 { 1822 SPLUSBCHECK; 1823 1824 DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n", 1825 sitd, (u_long)sitd->physaddr)); 1826 1827 LIST_REMOVE(sitd, hnext); 1828 } 1829 1830 ohci_soft_itd_t * 1831 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a) 1832 { 1833 int h = HASH(a); 1834 ohci_soft_itd_t *sitd; 1835 1836 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]); 1837 sitd != NULL; 1838 sitd = LIST_NEXT(sitd, hnext)) 1839 if (sitd->physaddr == a) 1840 return (sitd); 1841 return (NULL); 1842 } 1843 1844 void 1845 ohci_timeout(void *addr) 1846 { 1847 struct ohci_xfer *oxfer = addr; 1848 struct ohci_pipe *opipe = (struct ohci_pipe *)oxfer->xfer.pipe; 1849 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1850 1851 DPRINTF(("ohci_timeout: oxfer=%p\n", oxfer)); 1852 1853 if (sc->sc_dying) { 1854 ohci_abort_xfer(&oxfer->xfer, USBD_TIMEOUT); 1855 return; 1856 } 1857 1858 /* Execute the abort in a process context. */ 1859 usb_init_task(&oxfer->abort_task, ohci_timeout_task, addr); 1860 usb_add_task(oxfer->xfer.pipe->device, &oxfer->abort_task); 1861 } 1862 1863 void 1864 ohci_timeout_task(void *addr) 1865 { 1866 usbd_xfer_handle xfer = addr; 1867 int s; 1868 1869 DPRINTF(("ohci_timeout_task: xfer=%p\n", xfer)); 1870 1871 s = splusb(); 1872 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1873 splx(s); 1874 } 1875 1876 #ifdef OHCI_DEBUG 1877 void 1878 ohci_dump_tds(ohci_soft_td_t *std) 1879 { 1880 for (; std; std = std->nexttd) 1881 ohci_dump_td(std); 1882 } 1883 1884 void 1885 ohci_dump_td(ohci_soft_td_t *std) 1886 { 1887 char sbuf[128]; 1888 1889 bitmask_snprintf((u_int32_t)le32toh(std->td.td_flags), 1890 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 1891 sbuf, sizeof(sbuf)); 1892 1893 printf("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx " 1894 "nexttd=0x%08lx be=0x%08lx\n", 1895 std, (u_long)std->physaddr, sbuf, 1896 OHCI_TD_GET_DI(le32toh(std->td.td_flags)), 1897 OHCI_TD_GET_EC(le32toh(std->td.td_flags)), 1898 OHCI_TD_GET_CC(le32toh(std->td.td_flags)), 1899 (u_long)le32toh(std->td.td_cbp), 1900 (u_long)le32toh(std->td.td_nexttd), 1901 (u_long)le32toh(std->td.td_be)); 1902 } 1903 1904 void 1905 ohci_dump_itd(ohci_soft_itd_t *sitd) 1906 { 1907 int i; 1908 1909 printf("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n" 1910 "bp0=0x%08lx next=0x%08lx be=0x%08lx\n", 1911 sitd, (u_long)sitd->physaddr, 1912 OHCI_ITD_GET_SF(le32toh(sitd->itd.itd_flags)), 1913 OHCI_ITD_GET_DI(le32toh(sitd->itd.itd_flags)), 1914 OHCI_ITD_GET_FC(le32toh(sitd->itd.itd_flags)), 1915 OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags)), 1916 (u_long)le32toh(sitd->itd.itd_bp0), 1917 (u_long)le32toh(sitd->itd.itd_nextitd), 1918 (u_long)le32toh(sitd->itd.itd_be)); 1919 for (i = 0; i < OHCI_ITD_NOFFSET; i++) 1920 printf("offs[%d]=0x%04x ", i, 1921 (u_int)le16toh(sitd->itd.itd_offset[i])); 1922 printf("\n"); 1923 } 1924 1925 void 1926 ohci_dump_itds(ohci_soft_itd_t *sitd) 1927 { 1928 for (; sitd; sitd = sitd->nextitd) 1929 ohci_dump_itd(sitd); 1930 } 1931 1932 void 1933 ohci_dump_ed(ohci_soft_ed_t *sed) 1934 { 1935 char sbuf[128], sbuf2[128]; 1936 1937 bitmask_snprintf((u_int32_t)le32toh(sed->ed.ed_flags), 1938 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO", 1939 sbuf, sizeof(sbuf)); 1940 bitmask_snprintf((u_int32_t)le32toh(sed->ed.ed_headp), 1941 "\20\1HALT\2CARRY", sbuf2, sizeof(sbuf2)); 1942 1943 printf("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d flags=%s\ntailp=0x%08lx " 1944 "headflags=%s headp=0x%08lx nexted=0x%08lx\n", 1945 sed, (u_long)sed->physaddr, 1946 OHCI_ED_GET_FA(le32toh(sed->ed.ed_flags)), 1947 OHCI_ED_GET_EN(le32toh(sed->ed.ed_flags)), 1948 OHCI_ED_GET_MAXP(le32toh(sed->ed.ed_flags)), sbuf, 1949 (u_long)le32toh(sed->ed.ed_tailp), sbuf2, 1950 (u_long)le32toh(sed->ed.ed_headp), 1951 (u_long)le32toh(sed->ed.ed_nexted)); 1952 } 1953 #endif 1954 1955 usbd_status 1956 ohci_open(usbd_pipe_handle pipe) 1957 { 1958 usbd_device_handle dev = pipe->device; 1959 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1960 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1961 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1962 u_int8_t addr = dev->address; 1963 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1964 ohci_soft_ed_t *sed; 1965 ohci_soft_td_t *std; 1966 ohci_soft_itd_t *sitd; 1967 ohci_physaddr_t tdphys; 1968 u_int32_t fmt; 1969 usbd_status err; 1970 int s; 1971 int ival; 1972 1973 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1974 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1975 1976 if (sc->sc_dying) 1977 return (USBD_IOERROR); 1978 1979 std = NULL; 1980 sed = NULL; 1981 1982 if (addr == sc->sc_addr) { 1983 switch (ed->bEndpointAddress) { 1984 case USB_CONTROL_ENDPOINT: 1985 pipe->methods = &ohci_root_ctrl_methods; 1986 break; 1987 case UE_DIR_IN | OHCI_INTR_ENDPT: 1988 pipe->methods = &ohci_root_intr_methods; 1989 break; 1990 default: 1991 return (USBD_INVAL); 1992 } 1993 } else { 1994 sed = ohci_alloc_sed(sc); 1995 if (sed == NULL) 1996 goto bad0; 1997 opipe->sed = sed; 1998 if (xfertype == UE_ISOCHRONOUS) { 1999 sitd = ohci_alloc_sitd(sc); 2000 if (sitd == NULL) 2001 goto bad1; 2002 opipe->tail.itd = sitd; 2003 tdphys = sitd->physaddr; 2004 fmt = OHCI_ED_FORMAT_ISO; 2005 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 2006 fmt |= OHCI_ED_DIR_IN; 2007 else 2008 fmt |= OHCI_ED_DIR_OUT; 2009 } else { 2010 std = ohci_alloc_std(sc); 2011 if (std == NULL) 2012 goto bad1; 2013 opipe->tail.td = std; 2014 tdphys = std->physaddr; 2015 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD; 2016 } 2017 sed->ed.ed_flags = htole32( 2018 OHCI_ED_SET_FA(addr) | 2019 OHCI_ED_SET_EN(ed->bEndpointAddress) | 2020 (dev->speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) | 2021 fmt | 2022 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 2023 sed->ed.ed_headp = sed->ed.ed_tailp = htole32(tdphys); 2024 2025 switch (xfertype) { 2026 case UE_CONTROL: 2027 pipe->methods = &ohci_device_ctrl_methods; 2028 err = usb_allocmem(&sc->sc_bus, 2029 sizeof(usb_device_request_t), 2030 0, &opipe->u.ctl.reqdma); 2031 if (err) 2032 goto bad; 2033 s = splusb(); 2034 ohci_add_ed(sed, sc->sc_ctrl_head); 2035 splx(s); 2036 break; 2037 case UE_INTERRUPT: 2038 pipe->methods = &ohci_device_intr_methods; 2039 ival = pipe->interval; 2040 if (ival == USBD_DEFAULT_INTERVAL) 2041 ival = ed->bInterval; 2042 return (ohci_device_setintr(sc, opipe, ival)); 2043 case UE_ISOCHRONOUS: 2044 pipe->methods = &ohci_device_isoc_methods; 2045 return (ohci_setup_isoc(pipe)); 2046 case UE_BULK: 2047 pipe->methods = &ohci_device_bulk_methods; 2048 s = splusb(); 2049 ohci_add_ed(sed, sc->sc_bulk_head); 2050 splx(s); 2051 break; 2052 } 2053 } 2054 return (USBD_NORMAL_COMPLETION); 2055 2056 bad: 2057 if (std != NULL) 2058 ohci_free_std(sc, std); 2059 bad1: 2060 if (sed != NULL) 2061 ohci_free_sed(sc, sed); 2062 bad0: 2063 return (USBD_NOMEM); 2064 2065 } 2066 2067 /* 2068 * Close a reqular pipe. 2069 * Assumes that there are no pending transactions. 2070 */ 2071 void 2072 ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head) 2073 { 2074 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2075 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2076 ohci_soft_ed_t *sed = opipe->sed; 2077 int s; 2078 2079 s = splusb(); 2080 #ifdef DIAGNOSTIC 2081 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 2082 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2083 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) { 2084 ohci_soft_td_t *std; 2085 std = ohci_hash_find_td(sc, le32toh(sed->ed.ed_headp)); 2086 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 2087 "tl=0x%x pipe=%p, std=%p\n", sed, 2088 (int)le32toh(sed->ed.ed_headp), 2089 (int)le32toh(sed->ed.ed_tailp), 2090 pipe, std); 2091 #ifdef USB_DEBUG 2092 usbd_dump_pipe(&opipe->pipe); 2093 #endif 2094 #ifdef OHCI_DEBUG 2095 ohci_dump_ed(sed); 2096 if (std) 2097 ohci_dump_td(std); 2098 #endif 2099 usb_delay_ms(&sc->sc_bus, 2); 2100 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2101 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) 2102 printf("ohci_close_pipe: pipe still not empty\n"); 2103 } 2104 #endif 2105 ohci_rem_ed(sed, head); 2106 splx(s); 2107 ohci_free_sed(sc, opipe->sed); 2108 } 2109 2110 /* 2111 * Abort a device request. 2112 * If this routine is called at splusb() it guarantees that the request 2113 * will be removed from the hardware scheduling and that the callback 2114 * for it will be called with USBD_CANCELLED status. 2115 * It's impossible to guarantee that the requested transfer will not 2116 * have happened since the hardware runs concurrently. 2117 * If the transaction has already happened we rely on the ordinary 2118 * interrupt processing to process it. 2119 */ 2120 void 2121 ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2122 { 2123 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2124 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 2125 ohci_soft_ed_t *sed = opipe->sed; 2126 ohci_soft_td_t *p, *n; 2127 ohci_physaddr_t headp; 2128 int s, hit; 2129 2130 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p sed=%p\n", xfer, opipe,sed)); 2131 2132 if (sc->sc_dying) { 2133 /* If we're dying, just do the software part. */ 2134 s = splusb(); 2135 xfer->status = status; /* make software ignore it */ 2136 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 2137 usb_transfer_complete(xfer); 2138 splx(s); 2139 } 2140 2141 if (xfer->device->bus->intr_context || !curproc) 2142 panic("ohci_abort_xfer: not in process context"); 2143 2144 /* 2145 * Step 1: Make interrupt routine and hardware ignore xfer. 2146 */ 2147 s = splusb(); 2148 xfer->status = status; /* make software ignore it */ 2149 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 2150 splx(s); 2151 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed)); 2152 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 2153 2154 /* 2155 * Step 2: Wait until we know hardware has finished any possible 2156 * use of the xfer. Also make sure the soft interrupt routine 2157 * has run. 2158 */ 2159 usb_delay_ms(opipe->pipe.device->bus, 20); /* Hardware finishes in 1ms */ 2160 s = splusb(); 2161 #ifdef USB_USE_SOFTINTR 2162 sc->sc_softwake = 1; 2163 #endif /* USB_USE_SOFTINTR */ 2164 usb_schedsoftintr(&sc->sc_bus); 2165 #ifdef USB_USE_SOFTINTR 2166 tsleep(&sc->sc_softwake, PZERO, "ohciab", 0); 2167 #endif /* USB_USE_SOFTINTR */ 2168 splx(s); 2169 2170 /* 2171 * Step 3: Remove any vestiges of the xfer from the hardware. 2172 * The complication here is that the hardware may have executed 2173 * beyond the xfer we're trying to abort. So as we're scanning 2174 * the TDs of this xfer we check if the hardware points to 2175 * any of them. 2176 */ 2177 s = splusb(); /* XXX why? */ 2178 p = xfer->hcpriv; 2179 #ifdef DIAGNOSTIC 2180 if (p == NULL) { 2181 splx(s); 2182 printf("ohci_abort_xfer: hcpriv is NULL\n"); 2183 return; 2184 } 2185 #endif 2186 #ifdef OHCI_DEBUG 2187 if (ohcidebug > 1) { 2188 DPRINTF(("ohci_abort_xfer: sed=\n")); 2189 ohci_dump_ed(sed); 2190 ohci_dump_tds(p); 2191 } 2192 #endif 2193 headp = le32toh(sed->ed.ed_headp) & OHCI_HEADMASK; 2194 hit = 0; 2195 for (; p->xfer == xfer; p = n) { 2196 hit |= headp == p->physaddr; 2197 n = p->nexttd; 2198 ohci_free_std(sc, p); 2199 } 2200 /* Zap headp register if hardware pointed inside the xfer. */ 2201 if (hit) { 2202 DPRINTFN(1,("ohci_abort_xfer: set hd=0x08%x, tl=0x%08x\n", 2203 (int)p->physaddr, (int)le32toh(sed->ed.ed_tailp))); 2204 sed->ed.ed_headp = htole32(p->physaddr); /* unlink TDs */ 2205 } else { 2206 DPRINTFN(1,("ohci_abort_xfer: no hit\n")); 2207 } 2208 2209 /* 2210 * Step 4: Turn on hardware again. 2211 */ 2212 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 2213 2214 /* 2215 * Step 5: Execute callback. 2216 */ 2217 usb_transfer_complete(xfer); 2218 2219 splx(s); 2220 } 2221 2222 /* 2223 * Data structures and routines to emulate the root hub. 2224 */ 2225 Static usb_device_descriptor_t ohci_devd = { 2226 USB_DEVICE_DESCRIPTOR_SIZE, 2227 UDESC_DEVICE, /* type */ 2228 {0x00, 0x01}, /* USB version */ 2229 UDCLASS_HUB, /* class */ 2230 UDSUBCLASS_HUB, /* subclass */ 2231 UDPROTO_FSHUB, 2232 64, /* max packet */ 2233 {0},{0},{0x00,0x01}, /* device id */ 2234 1,2,0, /* string indicies */ 2235 1 /* # of configurations */ 2236 }; 2237 2238 Static usb_config_descriptor_t ohci_confd = { 2239 USB_CONFIG_DESCRIPTOR_SIZE, 2240 UDESC_CONFIG, 2241 {USB_CONFIG_DESCRIPTOR_SIZE + 2242 USB_INTERFACE_DESCRIPTOR_SIZE + 2243 USB_ENDPOINT_DESCRIPTOR_SIZE}, 2244 1, 2245 1, 2246 0, 2247 UC_SELF_POWERED, 2248 0 /* max power */ 2249 }; 2250 2251 Static usb_interface_descriptor_t ohci_ifcd = { 2252 USB_INTERFACE_DESCRIPTOR_SIZE, 2253 UDESC_INTERFACE, 2254 0, 2255 0, 2256 1, 2257 UICLASS_HUB, 2258 UISUBCLASS_HUB, 2259 UIPROTO_FSHUB, 2260 0 2261 }; 2262 2263 Static usb_endpoint_descriptor_t ohci_endpd = { 2264 USB_ENDPOINT_DESCRIPTOR_SIZE, 2265 UDESC_ENDPOINT, 2266 UE_DIR_IN | OHCI_INTR_ENDPT, 2267 UE_INTERRUPT, 2268 {8, 0}, /* max packet */ 2269 255 2270 }; 2271 2272 Static usb_hub_descriptor_t ohci_hubd = { 2273 USB_HUB_DESCRIPTOR_SIZE, 2274 UDESC_HUB, 2275 0, 2276 {0,0}, 2277 0, 2278 0, 2279 {0}, 2280 }; 2281 2282 Static int 2283 ohci_str(usb_string_descriptor_t *p, int l, const char *s) 2284 { 2285 int i; 2286 2287 if (l == 0) 2288 return (0); 2289 p->bLength = 2 * strlen(s) + 2; 2290 if (l == 1) 2291 return (1); 2292 p->bDescriptorType = UDESC_STRING; 2293 l -= 2; 2294 for (i = 0; s[i] && l > 1; i++, l -= 2) 2295 USETW2(p->bString[i], 0, s[i]); 2296 return (2*i+2); 2297 } 2298 2299 /* 2300 * Simulate a hardware hub by handling all the necessary requests. 2301 */ 2302 Static usbd_status 2303 ohci_root_ctrl_transfer(usbd_xfer_handle xfer) 2304 { 2305 usbd_status err; 2306 2307 /* Insert last in queue. */ 2308 err = usb_insert_transfer(xfer); 2309 if (err) 2310 return (err); 2311 2312 /* Pipe isn't running, start first */ 2313 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2314 } 2315 2316 Static usbd_status 2317 ohci_root_ctrl_start(usbd_xfer_handle xfer) 2318 { 2319 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2320 usb_device_request_t *req; 2321 void *buf = NULL; 2322 int port, i; 2323 int s, len, value, index, l, totlen = 0; 2324 usb_port_status_t ps; 2325 usb_hub_descriptor_t hubd; 2326 usbd_status err; 2327 u_int32_t v; 2328 2329 if (sc->sc_dying) 2330 return (USBD_IOERROR); 2331 2332 #ifdef DIAGNOSTIC 2333 if (!(xfer->rqflags & URQ_REQUEST)) 2334 /* XXX panic */ 2335 return (USBD_INVAL); 2336 #endif 2337 req = &xfer->request; 2338 2339 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 2340 req->bmRequestType, req->bRequest)); 2341 2342 len = UGETW(req->wLength); 2343 value = UGETW(req->wValue); 2344 index = UGETW(req->wIndex); 2345 2346 if (len != 0) 2347 buf = KERNADDR(&xfer->dmabuf, 0); 2348 2349 #define C(x,y) ((x) | ((y) << 8)) 2350 switch(C(req->bRequest, req->bmRequestType)) { 2351 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 2352 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 2353 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 2354 /* 2355 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 2356 * for the integrated root hub. 2357 */ 2358 break; 2359 case C(UR_GET_CONFIG, UT_READ_DEVICE): 2360 if (len > 0) { 2361 *(u_int8_t *)buf = sc->sc_conf; 2362 totlen = 1; 2363 } 2364 break; 2365 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2366 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 2367 switch(value >> 8) { 2368 case UDESC_DEVICE: 2369 if ((value & 0xff) != 0) { 2370 err = USBD_IOERROR; 2371 goto ret; 2372 } 2373 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 2374 USETW(ohci_devd.idVendor, sc->sc_id_vendor); 2375 memcpy(buf, &ohci_devd, l); 2376 break; 2377 case UDESC_CONFIG: 2378 if ((value & 0xff) != 0) { 2379 err = USBD_IOERROR; 2380 goto ret; 2381 } 2382 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 2383 memcpy(buf, &ohci_confd, l); 2384 buf = (char *)buf + l; 2385 len -= l; 2386 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 2387 totlen += l; 2388 memcpy(buf, &ohci_ifcd, l); 2389 buf = (char *)buf + l; 2390 len -= l; 2391 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 2392 totlen += l; 2393 memcpy(buf, &ohci_endpd, l); 2394 break; 2395 case UDESC_STRING: 2396 if (len == 0) 2397 break; 2398 *(u_int8_t *)buf = 0; 2399 totlen = 1; 2400 switch (value & 0xff) { 2401 case 1: /* Vendor */ 2402 totlen = ohci_str(buf, len, sc->sc_vendor); 2403 break; 2404 case 2: /* Product */ 2405 totlen = ohci_str(buf, len, "OHCI root hub"); 2406 break; 2407 } 2408 break; 2409 default: 2410 err = USBD_IOERROR; 2411 goto ret; 2412 } 2413 break; 2414 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 2415 if (len > 0) { 2416 *(u_int8_t *)buf = 0; 2417 totlen = 1; 2418 } 2419 break; 2420 case C(UR_GET_STATUS, UT_READ_DEVICE): 2421 if (len > 1) { 2422 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 2423 totlen = 2; 2424 } 2425 break; 2426 case C(UR_GET_STATUS, UT_READ_INTERFACE): 2427 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 2428 if (len > 1) { 2429 USETW(((usb_status_t *)buf)->wStatus, 0); 2430 totlen = 2; 2431 } 2432 break; 2433 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 2434 if (value >= USB_MAX_DEVICES) { 2435 err = USBD_IOERROR; 2436 goto ret; 2437 } 2438 sc->sc_addr = value; 2439 break; 2440 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 2441 if (value != 0 && value != 1) { 2442 err = USBD_IOERROR; 2443 goto ret; 2444 } 2445 sc->sc_conf = value; 2446 break; 2447 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 2448 break; 2449 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 2450 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 2451 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 2452 err = USBD_IOERROR; 2453 goto ret; 2454 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 2455 break; 2456 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 2457 break; 2458 /* Hub requests */ 2459 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2460 break; 2461 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2462 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 2463 "port=%d feature=%d\n", 2464 index, value)); 2465 if (index < 1 || index > sc->sc_noport) { 2466 err = USBD_IOERROR; 2467 goto ret; 2468 } 2469 port = OHCI_RH_PORT_STATUS(index); 2470 switch(value) { 2471 case UHF_PORT_ENABLE: 2472 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2473 break; 2474 case UHF_PORT_SUSPEND: 2475 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2476 break; 2477 case UHF_PORT_POWER: 2478 /* Yes, writing to the LOW_SPEED bit clears power. */ 2479 OWRITE4(sc, port, UPS_LOW_SPEED); 2480 break; 2481 case UHF_C_PORT_CONNECTION: 2482 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2483 break; 2484 case UHF_C_PORT_ENABLE: 2485 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2486 break; 2487 case UHF_C_PORT_SUSPEND: 2488 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2489 break; 2490 case UHF_C_PORT_OVER_CURRENT: 2491 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2492 break; 2493 case UHF_C_PORT_RESET: 2494 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2495 break; 2496 default: 2497 err = USBD_IOERROR; 2498 goto ret; 2499 } 2500 switch(value) { 2501 case UHF_C_PORT_CONNECTION: 2502 case UHF_C_PORT_ENABLE: 2503 case UHF_C_PORT_SUSPEND: 2504 case UHF_C_PORT_OVER_CURRENT: 2505 case UHF_C_PORT_RESET: 2506 /* Enable RHSC interrupt if condition is cleared. */ 2507 if ((OREAD4(sc, port) >> 16) == 0) 2508 ohci_rhsc_able(sc, 1); 2509 break; 2510 default: 2511 break; 2512 } 2513 break; 2514 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2515 if (value != 0) { 2516 err = USBD_IOERROR; 2517 goto ret; 2518 } 2519 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2520 hubd = ohci_hubd; 2521 hubd.bNbrPorts = sc->sc_noport; 2522 USETW(hubd.wHubCharacteristics, 2523 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2524 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2525 /* XXX overcurrent */ 2526 ); 2527 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2528 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2529 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2530 hubd.DeviceRemovable[i++] = (u_int8_t)v; 2531 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2532 l = min(len, hubd.bDescLength); 2533 totlen = l; 2534 memcpy(buf, &hubd, l); 2535 break; 2536 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2537 if (len != 4) { 2538 err = USBD_IOERROR; 2539 goto ret; 2540 } 2541 memset(buf, 0, len); /* ? XXX */ 2542 totlen = len; 2543 break; 2544 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2545 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 2546 index)); 2547 if (index < 1 || index > sc->sc_noport) { 2548 err = USBD_IOERROR; 2549 goto ret; 2550 } 2551 if (len != 4) { 2552 err = USBD_IOERROR; 2553 goto ret; 2554 } 2555 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2556 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 2557 v)); 2558 USETW(ps.wPortStatus, v); 2559 USETW(ps.wPortChange, v >> 16); 2560 l = min(len, sizeof ps); 2561 memcpy(buf, &ps, l); 2562 totlen = l; 2563 break; 2564 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2565 err = USBD_IOERROR; 2566 goto ret; 2567 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2568 break; 2569 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2570 if (index < 1 || index > sc->sc_noport) { 2571 err = USBD_IOERROR; 2572 goto ret; 2573 } 2574 port = OHCI_RH_PORT_STATUS(index); 2575 switch(value) { 2576 case UHF_PORT_ENABLE: 2577 OWRITE4(sc, port, UPS_PORT_ENABLED); 2578 break; 2579 case UHF_PORT_SUSPEND: 2580 OWRITE4(sc, port, UPS_SUSPEND); 2581 break; 2582 case UHF_PORT_RESET: 2583 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 2584 index)); 2585 OWRITE4(sc, port, UPS_RESET); 2586 for (i = 0; i < 5; i++) { 2587 usb_delay_ms(&sc->sc_bus, 2588 USB_PORT_ROOT_RESET_DELAY); 2589 if (sc->sc_dying) { 2590 err = USBD_IOERROR; 2591 goto ret; 2592 } 2593 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2594 break; 2595 } 2596 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 2597 index, OREAD4(sc, port))); 2598 break; 2599 case UHF_PORT_POWER: 2600 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 2601 "%d\n", index)); 2602 OWRITE4(sc, port, UPS_PORT_POWER); 2603 break; 2604 default: 2605 err = USBD_IOERROR; 2606 goto ret; 2607 } 2608 break; 2609 default: 2610 err = USBD_IOERROR; 2611 goto ret; 2612 } 2613 xfer->actlen = totlen; 2614 err = USBD_NORMAL_COMPLETION; 2615 ret: 2616 xfer->status = err; 2617 s = splusb(); 2618 usb_transfer_complete(xfer); 2619 splx(s); 2620 return (USBD_IN_PROGRESS); 2621 } 2622 2623 /* Abort a root control request. */ 2624 Static void 2625 ohci_root_ctrl_abort(usbd_xfer_handle xfer) 2626 { 2627 /* Nothing to do, all transfers are synchronous. */ 2628 } 2629 2630 /* Close the root pipe. */ 2631 Static void 2632 ohci_root_ctrl_close(usbd_pipe_handle pipe) 2633 { 2634 DPRINTF(("ohci_root_ctrl_close\n")); 2635 /* Nothing to do. */ 2636 } 2637 2638 Static usbd_status 2639 ohci_root_intr_transfer(usbd_xfer_handle xfer) 2640 { 2641 usbd_status err; 2642 2643 /* Insert last in queue. */ 2644 err = usb_insert_transfer(xfer); 2645 if (err) 2646 return (err); 2647 2648 /* Pipe isn't running, start first */ 2649 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2650 } 2651 2652 Static usbd_status 2653 ohci_root_intr_start(usbd_xfer_handle xfer) 2654 { 2655 usbd_pipe_handle pipe = xfer->pipe; 2656 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2657 2658 if (sc->sc_dying) 2659 return (USBD_IOERROR); 2660 2661 sc->sc_intrxfer = xfer; 2662 2663 return (USBD_IN_PROGRESS); 2664 } 2665 2666 /* Abort a root interrupt request. */ 2667 Static void 2668 ohci_root_intr_abort(usbd_xfer_handle xfer) 2669 { 2670 int s; 2671 2672 if (xfer->pipe->intrxfer == xfer) { 2673 DPRINTF(("ohci_root_intr_abort: remove\n")); 2674 xfer->pipe->intrxfer = NULL; 2675 } 2676 xfer->status = USBD_CANCELLED; 2677 s = splusb(); 2678 usb_transfer_complete(xfer); 2679 splx(s); 2680 } 2681 2682 /* Close the root pipe. */ 2683 Static void 2684 ohci_root_intr_close(usbd_pipe_handle pipe) 2685 { 2686 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2687 2688 DPRINTF(("ohci_root_intr_close\n")); 2689 2690 sc->sc_intrxfer = NULL; 2691 } 2692 2693 /************************/ 2694 2695 Static usbd_status 2696 ohci_device_ctrl_transfer(usbd_xfer_handle xfer) 2697 { 2698 usbd_status err; 2699 2700 /* Insert last in queue. */ 2701 err = usb_insert_transfer(xfer); 2702 if (err) 2703 return (err); 2704 2705 /* Pipe isn't running, start first */ 2706 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2707 } 2708 2709 Static usbd_status 2710 ohci_device_ctrl_start(usbd_xfer_handle xfer) 2711 { 2712 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2713 usbd_status err; 2714 2715 if (sc->sc_dying) 2716 return (USBD_IOERROR); 2717 2718 #ifdef DIAGNOSTIC 2719 if (!(xfer->rqflags & URQ_REQUEST)) { 2720 /* XXX panic */ 2721 printf("ohci_device_ctrl_transfer: not a request\n"); 2722 return (USBD_INVAL); 2723 } 2724 #endif 2725 2726 err = ohci_device_request(xfer); 2727 if (err) 2728 return (err); 2729 2730 if (sc->sc_bus.use_polling) 2731 ohci_waitintr(sc, xfer); 2732 return (USBD_IN_PROGRESS); 2733 } 2734 2735 /* Abort a device control request. */ 2736 Static void 2737 ohci_device_ctrl_abort(usbd_xfer_handle xfer) 2738 { 2739 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer)); 2740 ohci_abort_xfer(xfer, USBD_CANCELLED); 2741 } 2742 2743 /* Close a device control pipe. */ 2744 Static void 2745 ohci_device_ctrl_close(usbd_pipe_handle pipe) 2746 { 2747 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2748 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2749 2750 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe)); 2751 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2752 ohci_free_std(sc, opipe->tail.td); 2753 } 2754 2755 /************************/ 2756 2757 Static void 2758 ohci_device_clear_toggle(usbd_pipe_handle pipe) 2759 { 2760 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2761 2762 opipe->sed->ed.ed_headp &= htole32(~OHCI_TOGGLECARRY); 2763 } 2764 2765 Static void 2766 ohci_noop(usbd_pipe_handle pipe) 2767 { 2768 } 2769 2770 Static usbd_status 2771 ohci_device_bulk_transfer(usbd_xfer_handle xfer) 2772 { 2773 usbd_status err; 2774 2775 /* Insert last in queue. */ 2776 err = usb_insert_transfer(xfer); 2777 if (err) 2778 return (err); 2779 2780 /* Pipe isn't running, start first */ 2781 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2782 } 2783 2784 Static usbd_status 2785 ohci_device_bulk_start(usbd_xfer_handle xfer) 2786 { 2787 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2788 usbd_device_handle dev = opipe->pipe.device; 2789 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2790 int addr = dev->address; 2791 ohci_soft_td_t *data, *tail, *tdp; 2792 ohci_soft_ed_t *sed; 2793 int s, len, isread, endpt; 2794 usbd_status err; 2795 2796 if (sc->sc_dying) 2797 return (USBD_IOERROR); 2798 2799 #ifdef DIAGNOSTIC 2800 if (xfer->rqflags & URQ_REQUEST) { 2801 /* XXX panic */ 2802 printf("ohci_device_bulk_start: a request\n"); 2803 return (USBD_INVAL); 2804 } 2805 #endif 2806 2807 len = xfer->length; 2808 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 2809 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2810 sed = opipe->sed; 2811 2812 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d " 2813 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags, 2814 endpt)); 2815 2816 opipe->u.bulk.isread = isread; 2817 opipe->u.bulk.length = len; 2818 2819 /* Update device address */ 2820 sed->ed.ed_flags = htole32( 2821 (le32toh(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) | 2822 OHCI_ED_SET_FA(addr)); 2823 2824 /* Allocate a chain of new TDs (including a new tail). */ 2825 data = opipe->tail.td; 2826 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 2827 data, &tail); 2828 /* We want interrupt at the end of the transfer. */ 2829 tail->td.td_flags &= htole32(~OHCI_TD_INTR_MASK); 2830 tail->td.td_flags |= htole32(OHCI_TD_SET_DI(1)); 2831 tail->flags |= OHCI_CALL_DONE; 2832 tail = tail->nexttd; /* point at sentinel */ 2833 if (err) 2834 return (err); 2835 2836 tail->xfer = NULL; 2837 xfer->hcpriv = data; 2838 2839 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x " 2840 "td_cbp=0x%08x td_be=0x%08x\n", 2841 (int)le32toh(sed->ed.ed_flags), 2842 (int)le32toh(data->td.td_flags), 2843 (int)le32toh(data->td.td_cbp), 2844 (int)le32toh(data->td.td_be))); 2845 2846 #ifdef OHCI_DEBUG 2847 if (ohcidebug > 5) { 2848 ohci_dump_ed(sed); 2849 ohci_dump_tds(data); 2850 } 2851 #endif 2852 2853 /* Insert ED in schedule */ 2854 s = splusb(); 2855 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 2856 tdp->xfer = xfer; 2857 } 2858 sed->ed.ed_tailp = htole32(tail->physaddr); 2859 opipe->tail.td = tail; 2860 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 2861 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 2862 if (xfer->timeout && !sc->sc_bus.use_polling) { 2863 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout), 2864 ohci_timeout, xfer); 2865 } 2866 2867 #if 0 2868 /* This goes wrong if we are too slow. */ 2869 if (ohcidebug > 10) { 2870 delay(10000); 2871 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2872 OREAD4(sc, OHCI_COMMAND_STATUS))); 2873 ohci_dump_ed(sed); 2874 ohci_dump_tds(data); 2875 } 2876 #endif 2877 2878 splx(s); 2879 2880 return (USBD_IN_PROGRESS); 2881 } 2882 2883 Static void 2884 ohci_device_bulk_abort(usbd_xfer_handle xfer) 2885 { 2886 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer)); 2887 ohci_abort_xfer(xfer, USBD_CANCELLED); 2888 } 2889 2890 /* 2891 * Close a device bulk pipe. 2892 */ 2893 Static void 2894 ohci_device_bulk_close(usbd_pipe_handle pipe) 2895 { 2896 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2897 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2898 2899 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe)); 2900 ohci_close_pipe(pipe, sc->sc_bulk_head); 2901 ohci_free_std(sc, opipe->tail.td); 2902 } 2903 2904 /************************/ 2905 2906 Static usbd_status 2907 ohci_device_intr_transfer(usbd_xfer_handle xfer) 2908 { 2909 usbd_status err; 2910 2911 /* Insert last in queue. */ 2912 err = usb_insert_transfer(xfer); 2913 if (err) 2914 return (err); 2915 2916 /* Pipe isn't running, start first */ 2917 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2918 } 2919 2920 Static usbd_status 2921 ohci_device_intr_start(usbd_xfer_handle xfer) 2922 { 2923 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2924 usbd_device_handle dev = opipe->pipe.device; 2925 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2926 ohci_soft_ed_t *sed = opipe->sed; 2927 ohci_soft_td_t *data, *tail; 2928 int len; 2929 int s; 2930 2931 if (sc->sc_dying) 2932 return (USBD_IOERROR); 2933 2934 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d " 2935 "flags=%d priv=%p\n", 2936 xfer, xfer->length, xfer->flags, xfer->priv)); 2937 2938 #ifdef DIAGNOSTIC 2939 if (xfer->rqflags & URQ_REQUEST) 2940 panic("ohci_device_intr_transfer: a request"); 2941 #endif 2942 2943 len = xfer->length; 2944 2945 data = opipe->tail.td; 2946 tail = ohci_alloc_std(sc); 2947 if (tail == NULL) 2948 return (USBD_NOMEM); 2949 tail->xfer = NULL; 2950 2951 data->td.td_flags = htole32( 2952 OHCI_TD_IN | OHCI_TD_NOCC | 2953 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 2954 if (xfer->flags & USBD_SHORT_XFER_OK) 2955 data->td.td_flags |= htole32(OHCI_TD_R); 2956 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf, 0)); 2957 data->nexttd = tail; 2958 data->td.td_nexttd = htole32(tail->physaddr); 2959 data->td.td_be = htole32(le32toh(data->td.td_cbp) + len - 1); 2960 data->len = len; 2961 data->xfer = xfer; 2962 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 2963 xfer->hcpriv = data; 2964 2965 #ifdef OHCI_DEBUG 2966 if (ohcidebug > 5) { 2967 DPRINTF(("ohci_device_intr_transfer:\n")); 2968 ohci_dump_ed(sed); 2969 ohci_dump_tds(data); 2970 } 2971 #endif 2972 2973 /* Insert ED in schedule */ 2974 s = splusb(); 2975 sed->ed.ed_tailp = htole32(tail->physaddr); 2976 opipe->tail.td = tail; 2977 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 2978 2979 #if 0 2980 /* 2981 * This goes horribly wrong, printing thousands of descriptors, 2982 * because false references are followed due to the fact that the 2983 * TD is gone. 2984 */ 2985 if (ohcidebug > 5) { 2986 usb_delay_ms(&sc->sc_bus, 5); 2987 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2988 OREAD4(sc, OHCI_COMMAND_STATUS))); 2989 ohci_dump_ed(sed); 2990 ohci_dump_tds(data); 2991 } 2992 #endif 2993 splx(s); 2994 2995 return (USBD_IN_PROGRESS); 2996 } 2997 2998 /* Abort a device control request. */ 2999 Static void 3000 ohci_device_intr_abort(usbd_xfer_handle xfer) 3001 { 3002 if (xfer->pipe->intrxfer == xfer) { 3003 DPRINTF(("ohci_device_intr_abort: remove\n")); 3004 xfer->pipe->intrxfer = NULL; 3005 } 3006 ohci_abort_xfer(xfer, USBD_CANCELLED); 3007 } 3008 3009 /* Close a device interrupt pipe. */ 3010 Static void 3011 ohci_device_intr_close(usbd_pipe_handle pipe) 3012 { 3013 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3014 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3015 int nslots = opipe->u.intr.nslots; 3016 int pos = opipe->u.intr.pos; 3017 int j; 3018 ohci_soft_ed_t *p, *sed = opipe->sed; 3019 int s; 3020 3021 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 3022 pipe, nslots, pos)); 3023 s = splusb(); 3024 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 3025 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 3026 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) 3027 usb_delay_ms(&sc->sc_bus, 2); 3028 3029 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 3030 ; 3031 #ifdef DIAGNOSTIC 3032 if (p == NULL) 3033 panic("ohci_device_intr_close: ED not found"); 3034 #endif 3035 p->next = sed->next; 3036 p->ed.ed_nexted = sed->ed.ed_nexted; 3037 splx(s); 3038 3039 for (j = 0; j < nslots; j++) 3040 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 3041 3042 ohci_free_std(sc, opipe->tail.td); 3043 ohci_free_sed(sc, opipe->sed); 3044 } 3045 3046 Static usbd_status 3047 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival) 3048 { 3049 int i, j, s, best; 3050 u_int npoll, slow, shigh, nslots; 3051 u_int bestbw, bw; 3052 ohci_soft_ed_t *hsed, *sed = opipe->sed; 3053 3054 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 3055 if (ival == 0) { 3056 printf("ohci_setintr: 0 interval\n"); 3057 return (USBD_INVAL); 3058 } 3059 3060 npoll = OHCI_NO_INTRS; 3061 while (npoll > ival) 3062 npoll /= 2; 3063 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 3064 3065 /* 3066 * We now know which level in the tree the ED must go into. 3067 * Figure out which slot has most bandwidth left over. 3068 * Slots to examine: 3069 * npoll 3070 * 1 0 3071 * 2 1 2 3072 * 4 3 4 5 6 3073 * 8 7 8 9 10 11 12 13 14 3074 * N (N-1) .. (N-1+N-1) 3075 */ 3076 slow = npoll-1; 3077 shigh = slow + npoll; 3078 nslots = OHCI_NO_INTRS / npoll; 3079 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 3080 bw = 0; 3081 for (j = 0; j < nslots; j++) 3082 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 3083 if (bw < bestbw) { 3084 best = i; 3085 bestbw = bw; 3086 } 3087 } 3088 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 3089 best, slow, shigh, bestbw)); 3090 3091 s = splusb(); 3092 hsed = sc->sc_eds[best]; 3093 sed->next = hsed->next; 3094 sed->ed.ed_nexted = hsed->ed.ed_nexted; 3095 hsed->next = sed; 3096 hsed->ed.ed_nexted = htole32(sed->physaddr); 3097 splx(s); 3098 3099 for (j = 0; j < nslots; j++) 3100 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 3101 opipe->u.intr.nslots = nslots; 3102 opipe->u.intr.pos = best; 3103 3104 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 3105 return (USBD_NORMAL_COMPLETION); 3106 } 3107 3108 /***********************/ 3109 3110 usbd_status 3111 ohci_device_isoc_transfer(usbd_xfer_handle xfer) 3112 { 3113 usbd_status err; 3114 3115 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer)); 3116 3117 /* Put it on our queue, */ 3118 err = usb_insert_transfer(xfer); 3119 3120 /* bail out on error, */ 3121 if (err && err != USBD_IN_PROGRESS) 3122 return (err); 3123 3124 /* XXX should check inuse here */ 3125 3126 /* insert into schedule, */ 3127 ohci_device_isoc_enter(xfer); 3128 3129 /* and start if the pipe wasn't running */ 3130 if (!err) 3131 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 3132 3133 return (err); 3134 } 3135 3136 void 3137 ohci_device_isoc_enter(usbd_xfer_handle xfer) 3138 { 3139 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3140 usbd_device_handle dev = opipe->pipe.device; 3141 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 3142 ohci_soft_ed_t *sed = opipe->sed; 3143 struct iso *iso = &opipe->u.iso; 3144 ohci_soft_itd_t *sitd, *nsitd; 3145 ohci_physaddr_t buf, offs, noffs, bp0; 3146 int i, ncur, nframes; 3147 int s; 3148 3149 DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p " 3150 "nframes=%d\n", 3151 iso->inuse, iso->next, xfer, xfer->nframes)); 3152 3153 if (sc->sc_dying) 3154 return; 3155 3156 if (iso->next == -1) { 3157 /* Not in use yet, schedule it a few frames ahead. */ 3158 iso->next = le32toh(sc->sc_hcca->hcca_frame_number) + 5; 3159 DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n", 3160 iso->next)); 3161 } 3162 3163 sitd = opipe->tail.itd; 3164 buf = DMAADDR(&xfer->dmabuf, 0); 3165 bp0 = OHCI_PAGE(buf); 3166 offs = OHCI_PAGE_OFFSET(buf); 3167 nframes = xfer->nframes; 3168 xfer->hcpriv = sitd; 3169 for (i = ncur = 0; i < nframes; i++, ncur++) { 3170 noffs = offs + xfer->frlengths[i]; 3171 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ 3172 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */ 3173 3174 /* Allocate next ITD */ 3175 nsitd = ohci_alloc_sitd(sc); 3176 if (nsitd == NULL) { 3177 /* XXX what now? */ 3178 printf("%s: isoc TD alloc failed\n", 3179 USBDEVNAME(sc->sc_bus.bdev)); 3180 return; 3181 } 3182 3183 /* Fill current ITD */ 3184 sitd->itd.itd_flags = htole32( 3185 OHCI_ITD_NOCC | 3186 OHCI_ITD_SET_SF(iso->next) | 3187 OHCI_ITD_SET_DI(6) | /* delay intr a little */ 3188 OHCI_ITD_SET_FC(ncur)); 3189 sitd->itd.itd_bp0 = htole32(bp0); 3190 sitd->nextitd = nsitd; 3191 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 3192 sitd->itd.itd_be = htole32(bp0 + offs - 1); 3193 sitd->xfer = xfer; 3194 sitd->flags = 0; 3195 3196 sitd = nsitd; 3197 iso->next = iso->next + ncur; 3198 bp0 = OHCI_PAGE(buf + offs); 3199 ncur = 0; 3200 } 3201 sitd->itd.itd_offset[ncur] = htole16(OHCI_ITD_MK_OFFS(offs)); 3202 offs = noffs; 3203 } 3204 nsitd = ohci_alloc_sitd(sc); 3205 if (nsitd == NULL) { 3206 /* XXX what now? */ 3207 printf("%s: isoc TD alloc failed\n", 3208 USBDEVNAME(sc->sc_bus.bdev)); 3209 return; 3210 } 3211 /* Fixup last used ITD */ 3212 sitd->itd.itd_flags = htole32( 3213 OHCI_ITD_NOCC | 3214 OHCI_ITD_SET_SF(iso->next) | 3215 OHCI_ITD_SET_DI(0) | 3216 OHCI_ITD_SET_FC(ncur)); 3217 sitd->itd.itd_bp0 = htole32(bp0); 3218 sitd->nextitd = nsitd; 3219 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 3220 sitd->itd.itd_be = htole32(bp0 + offs - 1); 3221 sitd->xfer = xfer; 3222 sitd->flags = OHCI_CALL_DONE; 3223 3224 iso->next = iso->next + ncur; 3225 iso->inuse += nframes; 3226 3227 xfer->actlen = offs; /* XXX pretend we did it all */ 3228 3229 xfer->status = USBD_IN_PROGRESS; 3230 3231 #ifdef OHCI_DEBUG 3232 if (ohcidebug > 5) { 3233 DPRINTF(("ohci_device_isoc_enter: frame=%d\n", 3234 le32toh(sc->sc_hcca->hcca_frame_number))); 3235 ohci_dump_itds(xfer->hcpriv); 3236 ohci_dump_ed(sed); 3237 } 3238 #endif 3239 3240 s = splusb(); 3241 opipe->tail.itd = nsitd; 3242 sed->ed.ed_tailp = htole32(nsitd->physaddr); 3243 splx(s); 3244 3245 #ifdef OHCI_DEBUG 3246 if (ohcidebug > 5) { 3247 delay(150000); 3248 DPRINTF(("ohci_device_isoc_enter: after frame=%d\n", 3249 le32toh(sc->sc_hcca->hcca_frame_number))); 3250 ohci_dump_itds(xfer->hcpriv); 3251 ohci_dump_ed(sed); 3252 } 3253 #endif 3254 } 3255 3256 usbd_status 3257 ohci_device_isoc_start(usbd_xfer_handle xfer) 3258 { 3259 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3260 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3261 3262 DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer)); 3263 3264 if (sc->sc_dying) 3265 return (USBD_IOERROR); 3266 3267 #ifdef DIAGNOSTIC 3268 if (xfer->status != USBD_IN_PROGRESS) 3269 printf("ohci_device_isoc_start: not in progress %p\n", xfer); 3270 #endif 3271 3272 /* XXX anything to do? */ 3273 3274 return (USBD_IN_PROGRESS); 3275 } 3276 3277 void 3278 ohci_device_isoc_abort(usbd_xfer_handle xfer) 3279 { 3280 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3281 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3282 ohci_soft_ed_t *sed; 3283 ohci_soft_itd_t *sitd; 3284 int s; 3285 3286 s = splusb(); 3287 3288 DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer)); 3289 3290 /* Transfer is already done. */ 3291 if (xfer->status != USBD_NOT_STARTED && 3292 xfer->status != USBD_IN_PROGRESS) { 3293 splx(s); 3294 printf("ohci_device_isoc_abort: early return\n"); 3295 return; 3296 } 3297 3298 /* Give xfer the requested abort code. */ 3299 xfer->status = USBD_CANCELLED; 3300 3301 sed = opipe->sed; 3302 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 3303 3304 sitd = xfer->hcpriv; 3305 #ifdef DIAGNOSTIC 3306 if (sitd == NULL) { 3307 splx(s); 3308 printf("ohci_device_isoc_abort: hcpriv==0\n"); 3309 return; 3310 } 3311 #endif 3312 for (; sitd->xfer == xfer; sitd = sitd->nextitd) { 3313 #ifdef DIAGNOSTIC 3314 DPRINTFN(1,("abort sets done sitd=%p\n", sitd)); 3315 sitd->isdone = 1; 3316 #endif 3317 } 3318 3319 splx(s); 3320 3321 usb_delay_ms(&sc->sc_bus, OHCI_ITD_NOFFSET); 3322 3323 s = splusb(); 3324 3325 /* Run callback. */ 3326 usb_transfer_complete(xfer); 3327 3328 sed->ed.ed_headp = htole32(sitd->physaddr); /* unlink TDs */ 3329 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 3330 3331 splx(s); 3332 } 3333 3334 void 3335 ohci_device_isoc_done(usbd_xfer_handle xfer) 3336 { 3337 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3338 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3339 ohci_soft_itd_t *sitd, *nsitd; 3340 3341 DPRINTFN(1,("ohci_device_isoc_done: xfer=%p\n", xfer)); 3342 3343 for (sitd = xfer->hcpriv; 3344 !(sitd->flags & OHCI_CALL_DONE); 3345 sitd = nsitd) { 3346 nsitd = sitd->nextitd; 3347 DPRINTFN(1,("ohci_device_isoc_done: free sitd=%p\n", sitd)); 3348 ohci_free_sitd(sc, sitd); 3349 } 3350 ohci_free_sitd(sc, sitd); 3351 xfer->hcpriv = NULL; 3352 } 3353 3354 usbd_status 3355 ohci_setup_isoc(usbd_pipe_handle pipe) 3356 { 3357 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3358 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3359 struct iso *iso = &opipe->u.iso; 3360 int s; 3361 3362 iso->next = -1; 3363 iso->inuse = 0; 3364 3365 s = splusb(); 3366 ohci_add_ed(opipe->sed, sc->sc_isoc_head); 3367 splx(s); 3368 3369 return (USBD_NORMAL_COMPLETION); 3370 } 3371 3372 void 3373 ohci_device_isoc_close(usbd_pipe_handle pipe) 3374 { 3375 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3376 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3377 3378 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe)); 3379 ohci_close_pipe(pipe, sc->sc_isoc_head); 3380 #ifdef DIAGNOSTIC 3381 opipe->tail.itd->isdone = 1; 3382 #endif 3383 ohci_free_sitd(sc, opipe->tail.itd); 3384 } 3385
Indexes created Tue Sep 23 07:09:52 GMT 2025