ohci.c revision 1.139
1 /* $NetBSD: ohci.c,v 1.139 2003/02/22 05:24:16 tsutsui Exp $ */ 2 /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */ 3 4 /* 5 * Copyright (c) 1998 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Lennart Augustsson (lennart (at) augustsson.net) at 10 * Carlstedt Research & Technology. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. All advertising materials mentioning features or use of this software 21 * must display the following acknowledgement: 22 * This product includes software developed by the NetBSD 23 * Foundation, Inc. and its contributors. 24 * 4. Neither the name of The NetBSD Foundation nor the names of its 25 * contributors may be used to endorse or promote products derived 26 * from this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 29 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 30 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 31 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 32 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 33 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 34 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 35 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 36 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 37 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 * POSSIBILITY OF SUCH DAMAGE. 39 */ 40 41 /* 42 * USB Open Host Controller driver. 43 * 44 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html 45 * USB spec: http://www.usb.org/developers/docs/usbspec.zip 46 */ 47 48 #include <sys/cdefs.h> 49 __KERNEL_RCSID(0, "$NetBSD: ohci.c,v 1.139 2003/02/22 05:24:16 tsutsui Exp $"); 50 51 #include <sys/param.h> 52 #include <sys/systm.h> 53 #include <sys/malloc.h> 54 #if defined(__NetBSD__) || defined(__OpenBSD__) 55 #include <sys/kernel.h> 56 #include <sys/device.h> 57 #include <sys/select.h> 58 #elif defined(__FreeBSD__) 59 #include <sys/module.h> 60 #include <sys/bus.h> 61 #include <machine/bus_pio.h> 62 #include <machine/bus_memio.h> 63 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 64 #include <machine/cpu.h> 65 #endif 66 #endif 67 #include <sys/proc.h> 68 #include <sys/queue.h> 69 70 #include <machine/bus.h> 71 #include <machine/endian.h> 72 73 #include <dev/usb/usb.h> 74 #include <dev/usb/usbdi.h> 75 #include <dev/usb/usbdivar.h> 76 #include <dev/usb/usb_mem.h> 77 #include <dev/usb/usb_quirks.h> 78 79 #include <dev/usb/ohcireg.h> 80 #include <dev/usb/ohcivar.h> 81 82 #if defined(__FreeBSD__) 83 #include <machine/clock.h> 84 85 #define delay(d) DELAY(d) 86 #endif 87 88 #if defined(__OpenBSD__) 89 struct cfdriver ohci_cd = { 90 NULL, "ohci", DV_DULL 91 }; 92 #endif 93 94 #ifdef OHCI_DEBUG 95 #define DPRINTF(x) if (ohcidebug) logprintf x 96 #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x 97 int ohcidebug = 0; 98 #ifndef __NetBSD__ 99 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 100 #endif 101 #else 102 #define DPRINTF(x) 103 #define DPRINTFN(n,x) 104 #endif 105 106 /* 107 * The OHCI controller is little endian, so on big endian machines 108 * the data strored in memory needs to be swapped. 109 */ 110 #if defined(__FreeBSD__) || defined(__OpenBSD__) 111 #if BYTE_ORDER == BIG_ENDIAN 112 #define htole32(x) (bswap32(x)) 113 #define le32toh(x) (bswap32(x)) 114 #else 115 #define htole32(x) (x) 116 #define le32toh(x) (x) 117 #endif 118 #endif 119 120 struct ohci_pipe; 121 122 Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *); 123 Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *); 124 125 Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *); 126 Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *); 127 128 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *); 129 Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *); 130 131 #if 0 132 Static void ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *, 133 ohci_soft_td_t *); 134 #endif 135 Static usbd_status ohci_alloc_std_chain(struct ohci_pipe *, 136 ohci_softc_t *, int, int, usbd_xfer_handle, 137 ohci_soft_td_t *, ohci_soft_td_t **); 138 139 Static void ohci_shutdown(void *v); 140 Static void ohci_power(int, void *); 141 Static usbd_status ohci_open(usbd_pipe_handle); 142 Static void ohci_poll(struct usbd_bus *); 143 Static void ohci_softintr(void *); 144 Static void ohci_waitintr(ohci_softc_t *, usbd_xfer_handle); 145 Static void ohci_add_done(ohci_softc_t *, ohci_physaddr_t); 146 Static void ohci_rhsc(ohci_softc_t *, usbd_xfer_handle); 147 148 Static usbd_status ohci_device_request(usbd_xfer_handle xfer); 149 Static void ohci_add_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 150 Static void ohci_rem_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 151 Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *); 152 Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *); 153 Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t); 154 Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *); 155 Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *); 156 Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t); 157 158 Static usbd_status ohci_setup_isoc(usbd_pipe_handle pipe); 159 Static void ohci_device_isoc_enter(usbd_xfer_handle); 160 161 Static usbd_status ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 162 Static void ohci_freem(struct usbd_bus *, usb_dma_t *); 163 164 Static usbd_xfer_handle ohci_allocx(struct usbd_bus *); 165 Static void ohci_freex(struct usbd_bus *, usbd_xfer_handle); 166 167 Static usbd_status ohci_root_ctrl_transfer(usbd_xfer_handle); 168 Static usbd_status ohci_root_ctrl_start(usbd_xfer_handle); 169 Static void ohci_root_ctrl_abort(usbd_xfer_handle); 170 Static void ohci_root_ctrl_close(usbd_pipe_handle); 171 Static void ohci_root_ctrl_done(usbd_xfer_handle); 172 173 Static usbd_status ohci_root_intr_transfer(usbd_xfer_handle); 174 Static usbd_status ohci_root_intr_start(usbd_xfer_handle); 175 Static void ohci_root_intr_abort(usbd_xfer_handle); 176 Static void ohci_root_intr_close(usbd_pipe_handle); 177 Static void ohci_root_intr_done(usbd_xfer_handle); 178 179 Static usbd_status ohci_device_ctrl_transfer(usbd_xfer_handle); 180 Static usbd_status ohci_device_ctrl_start(usbd_xfer_handle); 181 Static void ohci_device_ctrl_abort(usbd_xfer_handle); 182 Static void ohci_device_ctrl_close(usbd_pipe_handle); 183 Static void ohci_device_ctrl_done(usbd_xfer_handle); 184 185 Static usbd_status ohci_device_bulk_transfer(usbd_xfer_handle); 186 Static usbd_status ohci_device_bulk_start(usbd_xfer_handle); 187 Static void ohci_device_bulk_abort(usbd_xfer_handle); 188 Static void ohci_device_bulk_close(usbd_pipe_handle); 189 Static void ohci_device_bulk_done(usbd_xfer_handle); 190 191 Static usbd_status ohci_device_intr_transfer(usbd_xfer_handle); 192 Static usbd_status ohci_device_intr_start(usbd_xfer_handle); 193 Static void ohci_device_intr_abort(usbd_xfer_handle); 194 Static void ohci_device_intr_close(usbd_pipe_handle); 195 Static void ohci_device_intr_done(usbd_xfer_handle); 196 197 Static usbd_status ohci_device_isoc_transfer(usbd_xfer_handle); 198 Static usbd_status ohci_device_isoc_start(usbd_xfer_handle); 199 Static void ohci_device_isoc_abort(usbd_xfer_handle); 200 Static void ohci_device_isoc_close(usbd_pipe_handle); 201 Static void ohci_device_isoc_done(usbd_xfer_handle); 202 203 Static usbd_status ohci_device_setintr(ohci_softc_t *sc, 204 struct ohci_pipe *pipe, int ival); 205 206 Static int ohci_str(usb_string_descriptor_t *, int, const char *); 207 208 Static void ohci_timeout(void *); 209 Static void ohci_timeout_task(void *); 210 Static void ohci_rhsc_able(ohci_softc_t *, int); 211 Static void ohci_rhsc_enable(void *); 212 213 Static void ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *); 214 Static void ohci_abort_xfer(usbd_xfer_handle, usbd_status); 215 216 Static void ohci_device_clear_toggle(usbd_pipe_handle pipe); 217 Static void ohci_noop(usbd_pipe_handle pipe); 218 219 #ifdef OHCI_DEBUG 220 Static void ohci_dumpregs(ohci_softc_t *); 221 Static void ohci_dump_tds(ohci_soft_td_t *); 222 Static void ohci_dump_td(ohci_soft_td_t *); 223 Static void ohci_dump_ed(ohci_soft_ed_t *); 224 Static void ohci_dump_itd(ohci_soft_itd_t *); 225 Static void ohci_dump_itds(ohci_soft_itd_t *); 226 #endif 227 228 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 229 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 230 #define OWRITE1(sc, r, x) \ 231 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 232 #define OWRITE2(sc, r, x) \ 233 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 234 #define OWRITE4(sc, r, x) \ 235 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 236 #define OREAD1(sc, r) (OBARR(sc), bus_space_read_1((sc)->iot, (sc)->ioh, (r))) 237 #define OREAD2(sc, r) (OBARR(sc), bus_space_read_2((sc)->iot, (sc)->ioh, (r))) 238 #define OREAD4(sc, r) (OBARR(sc), bus_space_read_4((sc)->iot, (sc)->ioh, (r))) 239 240 /* Reverse the bits in a value 0 .. 31 */ 241 Static u_int8_t revbits[OHCI_NO_INTRS] = 242 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 243 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 244 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 245 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 246 247 struct ohci_pipe { 248 struct usbd_pipe pipe; 249 ohci_soft_ed_t *sed; 250 union { 251 ohci_soft_td_t *td; 252 ohci_soft_itd_t *itd; 253 } tail; 254 /* Info needed for different pipe kinds. */ 255 union { 256 /* Control pipe */ 257 struct { 258 usb_dma_t reqdma; 259 u_int length; 260 ohci_soft_td_t *setup, *data, *stat; 261 } ctl; 262 /* Interrupt pipe */ 263 struct { 264 int nslots; 265 int pos; 266 } intr; 267 /* Bulk pipe */ 268 struct { 269 u_int length; 270 int isread; 271 } bulk; 272 /* Iso pipe */ 273 struct iso { 274 int next, inuse; 275 } iso; 276 } u; 277 }; 278 279 #define OHCI_INTR_ENDPT 1 280 281 Static struct usbd_bus_methods ohci_bus_methods = { 282 ohci_open, 283 ohci_softintr, 284 ohci_poll, 285 ohci_allocm, 286 ohci_freem, 287 ohci_allocx, 288 ohci_freex, 289 }; 290 291 Static struct usbd_pipe_methods ohci_root_ctrl_methods = { 292 ohci_root_ctrl_transfer, 293 ohci_root_ctrl_start, 294 ohci_root_ctrl_abort, 295 ohci_root_ctrl_close, 296 ohci_noop, 297 ohci_root_ctrl_done, 298 }; 299 300 Static struct usbd_pipe_methods ohci_root_intr_methods = { 301 ohci_root_intr_transfer, 302 ohci_root_intr_start, 303 ohci_root_intr_abort, 304 ohci_root_intr_close, 305 ohci_noop, 306 ohci_root_intr_done, 307 }; 308 309 Static struct usbd_pipe_methods ohci_device_ctrl_methods = { 310 ohci_device_ctrl_transfer, 311 ohci_device_ctrl_start, 312 ohci_device_ctrl_abort, 313 ohci_device_ctrl_close, 314 ohci_noop, 315 ohci_device_ctrl_done, 316 }; 317 318 Static struct usbd_pipe_methods ohci_device_intr_methods = { 319 ohci_device_intr_transfer, 320 ohci_device_intr_start, 321 ohci_device_intr_abort, 322 ohci_device_intr_close, 323 ohci_device_clear_toggle, 324 ohci_device_intr_done, 325 }; 326 327 Static struct usbd_pipe_methods ohci_device_bulk_methods = { 328 ohci_device_bulk_transfer, 329 ohci_device_bulk_start, 330 ohci_device_bulk_abort, 331 ohci_device_bulk_close, 332 ohci_device_clear_toggle, 333 ohci_device_bulk_done, 334 }; 335 336 Static struct usbd_pipe_methods ohci_device_isoc_methods = { 337 ohci_device_isoc_transfer, 338 ohci_device_isoc_start, 339 ohci_device_isoc_abort, 340 ohci_device_isoc_close, 341 ohci_noop, 342 ohci_device_isoc_done, 343 }; 344 345 #if defined(__NetBSD__) || defined(__OpenBSD__) 346 int 347 ohci_activate(device_ptr_t self, enum devact act) 348 { 349 struct ohci_softc *sc = (struct ohci_softc *)self; 350 int rv = 0; 351 352 switch (act) { 353 case DVACT_ACTIVATE: 354 return (EOPNOTSUPP); 355 break; 356 357 case DVACT_DEACTIVATE: 358 if (sc->sc_child != NULL) 359 rv = config_deactivate(sc->sc_child); 360 sc->sc_dying = 1; 361 break; 362 } 363 return (rv); 364 } 365 366 int 367 ohci_detach(struct ohci_softc *sc, int flags) 368 { 369 int rv = 0; 370 371 if (sc->sc_child != NULL) 372 rv = config_detach(sc->sc_child, flags); 373 374 if (rv != 0) 375 return (rv); 376 377 usb_uncallout(sc->sc_tmo_rhsc, ohci_rhsc_enable, sc); 378 379 #if defined(__NetBSD__) || defined(__OpenBSD__) 380 powerhook_disestablish(sc->sc_powerhook); 381 shutdownhook_disestablish(sc->sc_shutdownhook); 382 #endif 383 384 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 385 386 /* free data structures XXX */ 387 388 return (rv); 389 } 390 #endif 391 392 ohci_soft_ed_t * 393 ohci_alloc_sed(ohci_softc_t *sc) 394 { 395 ohci_soft_ed_t *sed; 396 usbd_status err; 397 int i, offs; 398 usb_dma_t dma; 399 400 if (sc->sc_freeeds == NULL) { 401 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 402 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 403 OHCI_ED_ALIGN, &dma); 404 if (err) 405 return (0); 406 for(i = 0; i < OHCI_SED_CHUNK; i++) { 407 offs = i * OHCI_SED_SIZE; 408 sed = KERNADDR(&dma, offs); 409 sed->physaddr = DMAADDR(&dma, offs); 410 sed->next = sc->sc_freeeds; 411 sc->sc_freeeds = sed; 412 } 413 } 414 sed = sc->sc_freeeds; 415 sc->sc_freeeds = sed->next; 416 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 417 sed->next = 0; 418 return (sed); 419 } 420 421 void 422 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 423 { 424 sed->next = sc->sc_freeeds; 425 sc->sc_freeeds = sed; 426 } 427 428 ohci_soft_td_t * 429 ohci_alloc_std(ohci_softc_t *sc) 430 { 431 ohci_soft_td_t *std; 432 usbd_status err; 433 int i, offs; 434 usb_dma_t dma; 435 int s; 436 437 if (sc->sc_freetds == NULL) { 438 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 439 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 440 OHCI_TD_ALIGN, &dma); 441 if (err) 442 return (NULL); 443 s = splusb(); 444 for(i = 0; i < OHCI_STD_CHUNK; i++) { 445 offs = i * OHCI_STD_SIZE; 446 std = KERNADDR(&dma, offs); 447 std->physaddr = DMAADDR(&dma, offs); 448 std->nexttd = sc->sc_freetds; 449 sc->sc_freetds = std; 450 } 451 splx(s); 452 } 453 454 s = splusb(); 455 std = sc->sc_freetds; 456 sc->sc_freetds = std->nexttd; 457 memset(&std->td, 0, sizeof(ohci_td_t)); 458 std->nexttd = NULL; 459 std->xfer = NULL; 460 ohci_hash_add_td(sc, std); 461 splx(s); 462 463 return (std); 464 } 465 466 void 467 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std) 468 { 469 int s; 470 471 s = splusb(); 472 ohci_hash_rem_td(sc, std); 473 std->nexttd = sc->sc_freetds; 474 sc->sc_freetds = std; 475 splx(s); 476 } 477 478 usbd_status 479 ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc, 480 int alen, int rd, usbd_xfer_handle xfer, 481 ohci_soft_td_t *sp, ohci_soft_td_t **ep) 482 { 483 ohci_soft_td_t *next, *cur; 484 ohci_physaddr_t dataphys, dataphysend; 485 u_int32_t tdflags; 486 int len, curlen; 487 usb_dma_t *dma = &xfer->dmabuf; 488 u_int16_t flags = xfer->flags; 489 490 DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen)); 491 492 len = alen; 493 cur = sp; 494 dataphys = DMAADDR(dma, 0); 495 dataphysend = OHCI_PAGE(dataphys + len - 1); 496 tdflags = htole32( 497 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 498 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) | 499 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR); 500 501 for (;;) { 502 next = ohci_alloc_std(sc); 503 if (next == NULL) 504 goto nomem; 505 506 /* The OHCI hardware can handle at most one page crossing. */ 507 if (OHCI_PAGE(dataphys) == dataphysend || 508 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) { 509 /* we can handle it in this TD */ 510 curlen = len; 511 } else { 512 /* must use multiple TDs, fill as much as possible. */ 513 curlen = 2 * OHCI_PAGE_SIZE - 514 (dataphys & (OHCI_PAGE_SIZE-1)); 515 /* the length must be a multiple of the max size */ 516 curlen -= curlen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize); 517 #ifdef DIAGNOSTIC 518 if (curlen == 0) 519 panic("ohci_alloc_std: curlen == 0"); 520 #endif 521 } 522 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x " 523 "dataphysend=0x%08x len=%d curlen=%d\n", 524 dataphys, dataphysend, 525 len, curlen)); 526 len -= curlen; 527 528 cur->td.td_flags = tdflags; 529 cur->td.td_cbp = htole32(dataphys); 530 cur->nexttd = next; 531 cur->td.td_nexttd = htole32(next->physaddr); 532 cur->td.td_be = htole32(dataphys + curlen - 1); 533 cur->len = curlen; 534 cur->flags = OHCI_ADD_LEN; 535 cur->xfer = xfer; 536 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n", 537 dataphys, dataphys + curlen - 1)); 538 if (len == 0) 539 break; 540 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n")); 541 dataphys += curlen; 542 cur = next; 543 } 544 if ((flags & USBD_FORCE_SHORT_XFER) && 545 alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) { 546 /* Force a 0 length transfer at the end. */ 547 548 cur = next; 549 next = ohci_alloc_std(sc); 550 if (next == NULL) 551 goto nomem; 552 553 cur->td.td_flags = tdflags; 554 cur->td.td_cbp = 0; /* indicate 0 length packet */ 555 cur->nexttd = next; 556 cur->td.td_nexttd = htole32(next->physaddr); 557 cur->td.td_be = ~0; 558 cur->len = 0; 559 cur->flags = 0; 560 cur->xfer = xfer; 561 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n")); 562 } 563 *ep = cur; 564 565 return (USBD_NORMAL_COMPLETION); 566 567 nomem: 568 /* XXX free chain */ 569 return (USBD_NOMEM); 570 } 571 572 #if 0 573 Static void 574 ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std, 575 ohci_soft_td_t *stdend) 576 { 577 ohci_soft_td_t *p; 578 579 for (; std != stdend; std = p) { 580 p = std->nexttd; 581 ohci_free_std(sc, std); 582 } 583 } 584 #endif 585 586 ohci_soft_itd_t * 587 ohci_alloc_sitd(ohci_softc_t *sc) 588 { 589 ohci_soft_itd_t *sitd; 590 usbd_status err; 591 int i, s, offs; 592 usb_dma_t dma; 593 594 if (sc->sc_freeitds == NULL) { 595 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n")); 596 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK, 597 OHCI_ITD_ALIGN, &dma); 598 if (err) 599 return (NULL); 600 s = splusb(); 601 for(i = 0; i < OHCI_SITD_CHUNK; i++) { 602 offs = i * OHCI_SITD_SIZE; 603 sitd = KERNADDR(&dma, offs); 604 sitd->physaddr = DMAADDR(&dma, offs); 605 sitd->nextitd = sc->sc_freeitds; 606 sc->sc_freeitds = sitd; 607 } 608 splx(s); 609 } 610 611 s = splusb(); 612 sitd = sc->sc_freeitds; 613 sc->sc_freeitds = sitd->nextitd; 614 memset(&sitd->itd, 0, sizeof(ohci_itd_t)); 615 sitd->nextitd = NULL; 616 sitd->xfer = NULL; 617 ohci_hash_add_itd(sc, sitd); 618 splx(s); 619 620 #ifdef DIAGNOSTIC 621 sitd->isdone = 0; 622 #endif 623 624 return (sitd); 625 } 626 627 void 628 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 629 { 630 int s; 631 632 DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd)); 633 634 #ifdef DIAGNOSTIC 635 if (!sitd->isdone) { 636 panic("ohci_free_sitd: sitd=%p not done", sitd); 637 return; 638 } 639 /* Warn double free */ 640 sitd->isdone = 0; 641 #endif 642 643 s = splusb(); 644 ohci_hash_rem_itd(sc, sitd); 645 sitd->nextitd = sc->sc_freeitds; 646 sc->sc_freeitds = sitd; 647 splx(s); 648 } 649 650 usbd_status 651 ohci_init(ohci_softc_t *sc) 652 { 653 ohci_soft_ed_t *sed, *psed; 654 usbd_status err; 655 int i; 656 u_int32_t s, ctl, ival, hcr, fm, per, rev, desca; 657 658 DPRINTF(("ohci_init: start\n")); 659 #if defined(__OpenBSD__) 660 printf(","); 661 #else 662 printf("%s:", USBDEVNAME(sc->sc_bus.bdev)); 663 #endif 664 rev = OREAD4(sc, OHCI_REVISION); 665 printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev), 666 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 667 668 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 669 printf("%s: unsupported OHCI revision\n", 670 USBDEVNAME(sc->sc_bus.bdev)); 671 sc->sc_bus.usbrev = USBREV_UNKNOWN; 672 return (USBD_INVAL); 673 } 674 sc->sc_bus.usbrev = USBREV_1_0; 675 676 for (i = 0; i < OHCI_HASH_SIZE; i++) 677 LIST_INIT(&sc->sc_hash_tds[i]); 678 for (i = 0; i < OHCI_HASH_SIZE; i++) 679 LIST_INIT(&sc->sc_hash_itds[i]); 680 681 SIMPLEQ_INIT(&sc->sc_free_xfers); 682 683 /* XXX determine alignment by R/W */ 684 /* Allocate the HCCA area. */ 685 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 686 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 687 if (err) 688 return (err); 689 sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0); 690 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 691 692 sc->sc_eintrs = OHCI_NORMAL_INTRS; 693 694 /* Allocate dummy ED that starts the control list. */ 695 sc->sc_ctrl_head = ohci_alloc_sed(sc); 696 if (sc->sc_ctrl_head == NULL) { 697 err = USBD_NOMEM; 698 goto bad1; 699 } 700 sc->sc_ctrl_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 701 702 /* Allocate dummy ED that starts the bulk list. */ 703 sc->sc_bulk_head = ohci_alloc_sed(sc); 704 if (sc->sc_bulk_head == NULL) { 705 err = USBD_NOMEM; 706 goto bad2; 707 } 708 sc->sc_bulk_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 709 710 /* Allocate dummy ED that starts the isochronous list. */ 711 sc->sc_isoc_head = ohci_alloc_sed(sc); 712 if (sc->sc_isoc_head == NULL) { 713 err = USBD_NOMEM; 714 goto bad3; 715 } 716 sc->sc_isoc_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 717 718 /* Allocate all the dummy EDs that make up the interrupt tree. */ 719 for (i = 0; i < OHCI_NO_EDS; i++) { 720 sed = ohci_alloc_sed(sc); 721 if (sed == NULL) { 722 while (--i >= 0) 723 ohci_free_sed(sc, sc->sc_eds[i]); 724 err = USBD_NOMEM; 725 goto bad4; 726 } 727 /* All ED fields are set to 0. */ 728 sc->sc_eds[i] = sed; 729 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 730 if (i != 0) 731 psed = sc->sc_eds[(i-1) / 2]; 732 else 733 psed= sc->sc_isoc_head; 734 sed->next = psed; 735 sed->ed.ed_nexted = htole32(psed->physaddr); 736 } 737 /* 738 * Fill HCCA interrupt table. The bit reversal is to get 739 * the tree set up properly to spread the interrupts. 740 */ 741 for (i = 0; i < OHCI_NO_INTRS; i++) 742 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 743 htole32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 744 745 #ifdef OHCI_DEBUG 746 if (ohcidebug > 15) { 747 for (i = 0; i < OHCI_NO_EDS; i++) { 748 printf("ed#%d ", i); 749 ohci_dump_ed(sc->sc_eds[i]); 750 } 751 printf("iso "); 752 ohci_dump_ed(sc->sc_isoc_head); 753 } 754 #endif 755 756 /* Determine in what context we are running. */ 757 ctl = OREAD4(sc, OHCI_CONTROL); 758 if (ctl & OHCI_IR) { 759 /* SMM active, request change */ 760 DPRINTF(("ohci_init: SMM active, request owner change\n")); 761 s = OREAD4(sc, OHCI_COMMAND_STATUS); 762 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 763 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 764 usb_delay_ms(&sc->sc_bus, 1); 765 ctl = OREAD4(sc, OHCI_CONTROL); 766 } 767 if ((ctl & OHCI_IR) == 0) { 768 printf("%s: SMM does not respond, resetting\n", 769 USBDEVNAME(sc->sc_bus.bdev)); 770 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 771 goto reset; 772 } 773 #if 0 774 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */ 775 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 776 /* BIOS started controller. */ 777 DPRINTF(("ohci_init: BIOS active\n")); 778 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 779 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL); 780 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 781 } 782 #endif 783 } else { 784 DPRINTF(("ohci_init: cold started\n")); 785 reset: 786 /* Controller was cold started. */ 787 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 788 } 789 790 /* 791 * This reset should not be necessary according to the OHCI spec, but 792 * without it some controllers do not start. 793 */ 794 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 795 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 796 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 797 798 /* We now own the host controller and the bus has been reset. */ 799 ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL)); 800 801 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 802 /* Nominal time for a reset is 10 us. */ 803 for (i = 0; i < 10; i++) { 804 delay(10); 805 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 806 if (!hcr) 807 break; 808 } 809 if (hcr) { 810 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 811 err = USBD_IOERROR; 812 goto bad5; 813 } 814 #ifdef OHCI_DEBUG 815 if (ohcidebug > 15) 816 ohci_dumpregs(sc); 817 #endif 818 819 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 820 821 /* Set up HC registers. */ 822 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 823 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 824 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 825 /* disable all interrupts and then switch on all desired interrupts */ 826 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 827 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 828 /* switch on desired functional features */ 829 ctl = OREAD4(sc, OHCI_CONTROL); 830 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 831 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 832 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL; 833 /* And finally start it! */ 834 OWRITE4(sc, OHCI_CONTROL, ctl); 835 836 /* 837 * The controller is now OPERATIONAL. Set a some final 838 * registers that should be set earlier, but that the 839 * controller ignores when in the SUSPEND state. 840 */ 841 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 842 fm |= OHCI_FSMPS(ival) | ival; 843 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 844 per = OHCI_PERIODIC(ival); /* 90% periodic */ 845 OWRITE4(sc, OHCI_PERIODIC_START, per); 846 847 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */ 848 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 849 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP); 850 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 851 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY); 852 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca); 853 854 /* 855 * The AMD756 requires a delay before re-reading the register, 856 * otherwise it will occasionally report 0 ports. 857 */ 858 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY); 859 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 860 861 #ifdef OHCI_DEBUG 862 if (ohcidebug > 5) 863 ohci_dumpregs(sc); 864 #endif 865 866 /* Set up the bus struct. */ 867 sc->sc_bus.methods = &ohci_bus_methods; 868 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 869 870 #if defined(__NetBSD__) || defined(__OpenBSD__) 871 sc->sc_control = sc->sc_intre = 0; 872 sc->sc_powerhook = powerhook_establish(ohci_power, sc); 873 sc->sc_shutdownhook = shutdownhook_establish(ohci_shutdown, sc); 874 #endif 875 876 usb_callout_init(sc->sc_tmo_rhsc); 877 878 return (USBD_NORMAL_COMPLETION); 879 880 bad5: 881 for (i = 0; i < OHCI_NO_EDS; i++) 882 ohci_free_sed(sc, sc->sc_eds[i]); 883 bad4: 884 ohci_free_sed(sc, sc->sc_isoc_head); 885 bad3: 886 ohci_free_sed(sc, sc->sc_ctrl_head); 887 bad2: 888 ohci_free_sed(sc, sc->sc_bulk_head); 889 bad1: 890 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 891 return (err); 892 } 893 894 usbd_status 895 ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 896 { 897 #if defined(__NetBSD__) || defined(__OpenBSD__) 898 struct ohci_softc *sc = (struct ohci_softc *)bus; 899 #endif 900 901 return (usb_allocmem(&sc->sc_bus, size, 0, dma)); 902 } 903 904 void 905 ohci_freem(struct usbd_bus *bus, usb_dma_t *dma) 906 { 907 #if defined(__NetBSD__) || defined(__OpenBSD__) 908 struct ohci_softc *sc = (struct ohci_softc *)bus; 909 #endif 910 911 usb_freemem(&sc->sc_bus, dma); 912 } 913 914 usbd_xfer_handle 915 ohci_allocx(struct usbd_bus *bus) 916 { 917 struct ohci_softc *sc = (struct ohci_softc *)bus; 918 usbd_xfer_handle xfer; 919 920 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 921 if (xfer != NULL) { 922 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 923 #ifdef DIAGNOSTIC 924 if (xfer->busy_free != XFER_FREE) { 925 printf("ohci_allocx: xfer=%p not free, 0x%08x\n", xfer, 926 xfer->busy_free); 927 } 928 #endif 929 } else { 930 xfer = malloc(sizeof(struct ohci_xfer), M_USB, M_NOWAIT); 931 } 932 if (xfer != NULL) { 933 memset(xfer, 0, sizeof (struct ohci_xfer)); 934 #ifdef DIAGNOSTIC 935 xfer->busy_free = XFER_BUSY; 936 #endif 937 } 938 return (xfer); 939 } 940 941 void 942 ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 943 { 944 struct ohci_softc *sc = (struct ohci_softc *)bus; 945 946 #ifdef DIAGNOSTIC 947 if (xfer->busy_free != XFER_BUSY) { 948 printf("ohci_freex: xfer=%p not busy, 0x%08x\n", xfer, 949 xfer->busy_free); 950 return; 951 } 952 xfer->busy_free = XFER_FREE; 953 #endif 954 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 955 } 956 957 /* 958 * Shut down the controller when the system is going down. 959 */ 960 void 961 ohci_shutdown(void *v) 962 { 963 ohci_softc_t *sc = v; 964 965 DPRINTF(("ohci_shutdown: stopping the HC\n")); 966 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 967 } 968 969 /* 970 * Handle suspend/resume. 971 * 972 * We need to switch to polling mode here, because this routine is 973 * called from an intterupt context. This is all right since we 974 * are almost suspended anyway. 975 */ 976 void 977 ohci_power(int why, void *v) 978 { 979 ohci_softc_t *sc = v; 980 u_int32_t ctl; 981 int s; 982 983 #ifdef OHCI_DEBUG 984 DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why)); 985 ohci_dumpregs(sc); 986 #endif 987 988 s = splhardusb(); 989 switch (why) { 990 case PWR_SUSPEND: 991 case PWR_STANDBY: 992 sc->sc_bus.use_polling++; 993 ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK; 994 if (sc->sc_control == 0) { 995 /* 996 * Preserve register values, in case that APM BIOS 997 * does not recover them. 998 */ 999 sc->sc_control = ctl; 1000 sc->sc_intre = OREAD4(sc, OHCI_INTERRUPT_ENABLE); 1001 } 1002 ctl |= OHCI_HCFS_SUSPEND; 1003 OWRITE4(sc, OHCI_CONTROL, ctl); 1004 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1005 sc->sc_bus.use_polling--; 1006 break; 1007 case PWR_RESUME: 1008 sc->sc_bus.use_polling++; 1009 /* Some broken BIOSes do not recover these values */ 1010 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 1011 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 1012 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 1013 if (sc->sc_intre) 1014 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, 1015 sc->sc_intre & (OHCI_ALL_INTRS | OHCI_MIE)); 1016 if (sc->sc_control) 1017 ctl = sc->sc_control; 1018 else 1019 ctl = OREAD4(sc, OHCI_CONTROL); 1020 ctl |= OHCI_HCFS_RESUME; 1021 OWRITE4(sc, OHCI_CONTROL, ctl); 1022 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 1023 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL; 1024 OWRITE4(sc, OHCI_CONTROL, ctl); 1025 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 1026 sc->sc_control = sc->sc_intre = 0; 1027 sc->sc_bus.use_polling--; 1028 break; 1029 case PWR_SOFTSUSPEND: 1030 case PWR_SOFTSTANDBY: 1031 case PWR_SOFTRESUME: 1032 break; 1033 } 1034 splx(s); 1035 } 1036 1037 #ifdef OHCI_DEBUG 1038 void 1039 ohci_dumpregs(ohci_softc_t *sc) 1040 { 1041 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 1042 OREAD4(sc, OHCI_REVISION), 1043 OREAD4(sc, OHCI_CONTROL), 1044 OREAD4(sc, OHCI_COMMAND_STATUS))); 1045 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 1046 OREAD4(sc, OHCI_INTERRUPT_STATUS), 1047 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 1048 OREAD4(sc, OHCI_INTERRUPT_DISABLE))); 1049 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 1050 OREAD4(sc, OHCI_HCCA), 1051 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 1052 OREAD4(sc, OHCI_CONTROL_HEAD_ED))); 1053 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 1054 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 1055 OREAD4(sc, OHCI_BULK_HEAD_ED), 1056 OREAD4(sc, OHCI_BULK_CURRENT_ED))); 1057 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 1058 OREAD4(sc, OHCI_DONE_HEAD), 1059 OREAD4(sc, OHCI_FM_INTERVAL), 1060 OREAD4(sc, OHCI_FM_REMAINING))); 1061 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 1062 OREAD4(sc, OHCI_FM_NUMBER), 1063 OREAD4(sc, OHCI_PERIODIC_START), 1064 OREAD4(sc, OHCI_LS_THRESHOLD))); 1065 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n", 1066 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 1067 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 1068 OREAD4(sc, OHCI_RH_STATUS))); 1069 DPRINTF((" port1=0x%08x port2=0x%08x\n", 1070 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 1071 OREAD4(sc, OHCI_RH_PORT_STATUS(2)))); 1072 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n", 1073 le32toh(sc->sc_hcca->hcca_frame_number), 1074 le32toh(sc->sc_hcca->hcca_done_head))); 1075 } 1076 #endif 1077 1078 Static int ohci_intr1(ohci_softc_t *); 1079 1080 int 1081 ohci_intr(void *p) 1082 { 1083 ohci_softc_t *sc = p; 1084 1085 if (sc == NULL || sc->sc_dying) 1086 return (0); 1087 1088 /* If we get an interrupt while polling, then just ignore it. */ 1089 if (sc->sc_bus.use_polling) { 1090 #ifdef DIAGNOSTIC 1091 printf("ohci_intr: ignored interrupt while polling\n"); 1092 #endif 1093 return (0); 1094 } 1095 1096 return (ohci_intr1(sc)); 1097 } 1098 1099 Static int 1100 ohci_intr1(ohci_softc_t *sc) 1101 { 1102 u_int32_t intrs, eintrs; 1103 ohci_physaddr_t done; 1104 1105 DPRINTFN(14,("ohci_intr1: enter\n")); 1106 1107 /* In case the interrupt occurs before initialization has completed. */ 1108 if (sc == NULL || sc->sc_hcca == NULL) { 1109 #ifdef DIAGNOSTIC 1110 printf("ohci_intr: sc->sc_hcca == NULL\n"); 1111 #endif 1112 return (0); 1113 } 1114 1115 intrs = 0; 1116 done = le32toh(sc->sc_hcca->hcca_done_head); 1117 if (done != 0) { 1118 if (done & ~OHCI_DONE_INTRS) 1119 intrs = OHCI_WDH; 1120 if (done & OHCI_DONE_INTRS) 1121 intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS); 1122 sc->sc_hcca->hcca_done_head = 0; 1123 } else 1124 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1125 1126 if (!intrs) 1127 return (0); 1128 1129 intrs &= ~OHCI_MIE; 1130 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */ 1131 eintrs = intrs & sc->sc_eintrs; 1132 if (!eintrs) 1133 return (0); 1134 1135 sc->sc_bus.intr_context++; 1136 sc->sc_bus.no_intrs++; 1137 DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 1138 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 1139 (u_int)eintrs)); 1140 1141 if (eintrs & OHCI_SO) { 1142 sc->sc_overrun_cnt++; 1143 if (usbd_ratecheck(&sc->sc_overrun_ntc)) { 1144 printf("%s: %u scheduling overruns\n", 1145 USBDEVNAME(sc->sc_bus.bdev), sc->sc_overrun_cnt); 1146 sc->sc_overrun_cnt = 0; 1147 } 1148 /* XXX do what */ 1149 eintrs &= ~OHCI_SO; 1150 } 1151 if (eintrs & OHCI_WDH) { 1152 ohci_add_done(sc, done &~ OHCI_DONE_INTRS); 1153 usb_schedsoftintr(&sc->sc_bus); 1154 eintrs &= ~OHCI_WDH; 1155 } 1156 if (eintrs & OHCI_RD) { 1157 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev)); 1158 /* XXX process resume detect */ 1159 } 1160 if (eintrs & OHCI_UE) { 1161 printf("%s: unrecoverable error, controller halted\n", 1162 USBDEVNAME(sc->sc_bus.bdev)); 1163 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1164 /* XXX what else */ 1165 } 1166 if (eintrs & OHCI_RHSC) { 1167 ohci_rhsc(sc, sc->sc_intrxfer); 1168 /* 1169 * Disable RHSC interrupt for now, because it will be 1170 * on until the port has been reset. 1171 */ 1172 ohci_rhsc_able(sc, 0); 1173 /* Do not allow RHSC interrupts > 1 per second */ 1174 usb_callout(sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc); 1175 eintrs &= ~OHCI_RHSC; 1176 } 1177 1178 sc->sc_bus.intr_context--; 1179 1180 if (eintrs != 0) { 1181 /* Block unprocessed interrupts. XXX */ 1182 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs); 1183 sc->sc_eintrs &= ~eintrs; 1184 printf("%s: blocking intrs 0x%x\n", 1185 USBDEVNAME(sc->sc_bus.bdev), eintrs); 1186 } 1187 1188 return (1); 1189 } 1190 1191 void 1192 ohci_rhsc_able(ohci_softc_t *sc, int on) 1193 { 1194 DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on)); 1195 if (on) { 1196 sc->sc_eintrs |= OHCI_RHSC; 1197 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1198 } else { 1199 sc->sc_eintrs &= ~OHCI_RHSC; 1200 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC); 1201 } 1202 } 1203 1204 void 1205 ohci_rhsc_enable(void *v_sc) 1206 { 1207 ohci_softc_t *sc = v_sc; 1208 int s; 1209 1210 s = splhardusb(); 1211 ohci_rhsc_able(sc, 1); 1212 splx(s); 1213 } 1214 1215 #ifdef OHCI_DEBUG 1216 char *ohci_cc_strs[] = { 1217 "NO_ERROR", 1218 "CRC", 1219 "BIT_STUFFING", 1220 "DATA_TOGGLE_MISMATCH", 1221 "STALL", 1222 "DEVICE_NOT_RESPONDING", 1223 "PID_CHECK_FAILURE", 1224 "UNEXPECTED_PID", 1225 "DATA_OVERRUN", 1226 "DATA_UNDERRUN", 1227 "BUFFER_OVERRUN", 1228 "BUFFER_UNDERRUN", 1229 "reserved", 1230 "reserved", 1231 "NOT_ACCESSED", 1232 "NOT_ACCESSED", 1233 }; 1234 #endif 1235 1236 void 1237 ohci_add_done(ohci_softc_t *sc, ohci_physaddr_t done) 1238 { 1239 ohci_soft_itd_t *sitd, *sidone, **ip; 1240 ohci_soft_td_t *std, *sdone, **p; 1241 1242 /* Reverse the done list. */ 1243 for (sdone = NULL, sidone = NULL; done != 0; ) { 1244 std = ohci_hash_find_td(sc, done); 1245 if (std != NULL) { 1246 std->dnext = sdone; 1247 done = le32toh(std->td.td_nexttd); 1248 sdone = std; 1249 DPRINTFN(10,("add TD %p\n", std)); 1250 continue; 1251 } 1252 sitd = ohci_hash_find_itd(sc, done); 1253 if (sitd != NULL) { 1254 sitd->dnext = sidone; 1255 done = le32toh(sitd->itd.itd_nextitd); 1256 sidone = sitd; 1257 DPRINTFN(5,("add ITD %p\n", sitd)); 1258 continue; 1259 } 1260 panic("ohci_add_done: addr 0x%08lx not found", (u_long)done); 1261 } 1262 1263 /* sdone & sidone now hold the done lists. */ 1264 /* Put them on the already processed lists. */ 1265 for (p = &sc->sc_sdone; *p != NULL; p = &(*p)->dnext) 1266 ; 1267 *p = sdone; 1268 for (ip = &sc->sc_sidone; *ip != NULL; ip = &(*ip)->dnext) 1269 ; 1270 *ip = sidone; 1271 } 1272 1273 void 1274 ohci_softintr(void *v) 1275 { 1276 ohci_softc_t *sc = v; 1277 ohci_soft_itd_t *sitd, *sidone, *sitdnext; 1278 ohci_soft_td_t *std, *sdone, *stdnext; 1279 usbd_xfer_handle xfer; 1280 struct ohci_pipe *opipe; 1281 int len, cc, s; 1282 int i, j, actlen, iframes, uedir; 1283 1284 DPRINTFN(10,("ohci_softintr: enter\n")); 1285 1286 sc->sc_bus.intr_context++; 1287 1288 s = splhardusb(); 1289 sdone = sc->sc_sdone; 1290 sc->sc_sdone = NULL; 1291 sidone = sc->sc_sidone; 1292 sc->sc_sidone = NULL; 1293 splx(s); 1294 1295 DPRINTFN(10,("ohci_softintr: sdone=%p sidone=%p\n", sdone, sidone)); 1296 1297 #ifdef OHCI_DEBUG 1298 if (ohcidebug > 10) { 1299 DPRINTF(("ohci_process_done: TD done:\n")); 1300 ohci_dump_tds(sdone); 1301 } 1302 #endif 1303 1304 for (std = sdone; std; std = stdnext) { 1305 xfer = std->xfer; 1306 stdnext = std->dnext; 1307 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n", 1308 std, xfer, xfer ? xfer->hcpriv : 0)); 1309 if (xfer == NULL) { 1310 /* 1311 * xfer == NULL: There seems to be no xfer associated 1312 * with this TD. It is tailp that happened to end up on 1313 * the done queue. 1314 * Shouldn't happen, but some chips are broken(?). 1315 */ 1316 continue; 1317 } 1318 if (xfer->status == USBD_CANCELLED || 1319 xfer->status == USBD_TIMEOUT) { 1320 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1321 xfer)); 1322 /* Handled by abort routine. */ 1323 continue; 1324 } 1325 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 1326 cc = OHCI_TD_GET_CC(le32toh(std->td.td_flags)); 1327 if (cc == OHCI_CC_NO_ERROR) { 1328 len = std->len; 1329 if (std->td.td_cbp != 0) 1330 len -= le32toh(std->td.td_be) - 1331 le32toh(std->td.td_cbp) + 1; 1332 DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", 1333 len, std->flags)); 1334 if (std->flags & OHCI_ADD_LEN) 1335 xfer->actlen += len; 1336 if (std->flags & OHCI_CALL_DONE) { 1337 xfer->status = USBD_NORMAL_COMPLETION; 1338 s = splusb(); 1339 usb_transfer_complete(xfer); 1340 splx(s); 1341 } 1342 ohci_free_std(sc, std); 1343 } else { 1344 /* 1345 * Endpoint is halted. First unlink all the TDs 1346 * belonging to the failed transfer, and then restart 1347 * the endpoint. 1348 */ 1349 ohci_soft_td_t *p, *n; 1350 opipe = (struct ohci_pipe *)xfer->pipe; 1351 1352 DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n", 1353 OHCI_TD_GET_CC(le32toh(std->td.td_flags)), 1354 ohci_cc_strs[OHCI_TD_GET_CC(le32toh(std->td.td_flags))])); 1355 1356 /* remove TDs */ 1357 for (p = std; p->xfer == xfer; p = n) { 1358 n = p->nexttd; 1359 ohci_free_std(sc, p); 1360 } 1361 1362 /* clear halt */ 1363 opipe->sed->ed.ed_headp = htole32(p->physaddr); 1364 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1365 1366 if (cc == OHCI_CC_STALL) 1367 xfer->status = USBD_STALLED; 1368 else 1369 xfer->status = USBD_IOERROR; 1370 s = splusb(); 1371 usb_transfer_complete(xfer); 1372 splx(s); 1373 } 1374 } 1375 1376 #ifdef OHCI_DEBUG 1377 if (ohcidebug > 10) { 1378 DPRINTF(("ohci_softintr: ITD done:\n")); 1379 ohci_dump_itds(sidone); 1380 } 1381 #endif 1382 1383 for (sitd = sidone; sitd != NULL; sitd = sitdnext) { 1384 xfer = sitd->xfer; 1385 sitdnext = sitd->dnext; 1386 DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n", 1387 sitd, xfer, xfer ? xfer->hcpriv : 0)); 1388 if (xfer == NULL) 1389 continue; 1390 if (xfer->status == USBD_CANCELLED || 1391 xfer->status == USBD_TIMEOUT) { 1392 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1393 xfer)); 1394 /* Handled by abort routine. */ 1395 continue; 1396 } 1397 #ifdef DIAGNOSTIC 1398 if (sitd->isdone) 1399 printf("ohci_softintr: sitd=%p is done\n", sitd); 1400 sitd->isdone = 1; 1401 #endif 1402 if (sitd->flags & OHCI_CALL_DONE) { 1403 ohci_soft_itd_t *next; 1404 1405 opipe = (struct ohci_pipe *)xfer->pipe; 1406 opipe->u.iso.inuse -= xfer->nframes; 1407 uedir = UE_GET_DIR(xfer->pipe->endpoint->edesc-> 1408 bEndpointAddress); 1409 xfer->status = USBD_NORMAL_COMPLETION; 1410 actlen = 0; 1411 for (i = 0, sitd = xfer->hcpriv;; 1412 sitd = next) { 1413 next = sitd->nextitd; 1414 if (OHCI_ITD_GET_CC(le32toh(sitd-> 1415 itd.itd_flags)) != OHCI_CC_NO_ERROR) 1416 xfer->status = USBD_IOERROR; 1417 /* For input, update frlengths with actual */ 1418 /* XXX anything necessary for output? */ 1419 if (uedir == UE_DIR_IN && 1420 xfer->status == USBD_NORMAL_COMPLETION) { 1421 iframes = OHCI_ITD_GET_FC(le32toh( 1422 sitd->itd.itd_flags)); 1423 for (j = 0; j < iframes; i++, j++) { 1424 len = le16toh(sitd-> 1425 itd.itd_offset[j]); 1426 len = 1427 (OHCI_ITD_PSW_GET_CC(len) == 1428 OHCI_CC_NOT_ACCESSED) ? 0 : 1429 OHCI_ITD_PSW_LENGTH(len); 1430 xfer->frlengths[i] = len; 1431 actlen += len; 1432 } 1433 } 1434 if (sitd->flags & OHCI_CALL_DONE) 1435 break; 1436 ohci_free_sitd(sc, sitd); 1437 } 1438 ohci_free_sitd(sc, sitd); 1439 if (uedir == UE_DIR_IN && 1440 xfer->status == USBD_NORMAL_COMPLETION) 1441 xfer->actlen = actlen; 1442 1443 s = splusb(); 1444 usb_transfer_complete(xfer); 1445 splx(s); 1446 } 1447 } 1448 1449 #ifdef USB_USE_SOFTINTR 1450 if (sc->sc_softwake) { 1451 sc->sc_softwake = 0; 1452 wakeup(&sc->sc_softwake); 1453 } 1454 #endif /* USB_USE_SOFTINTR */ 1455 1456 sc->sc_bus.intr_context--; 1457 DPRINTFN(10,("ohci_softintr: done:\n")); 1458 } 1459 1460 void 1461 ohci_device_ctrl_done(usbd_xfer_handle xfer) 1462 { 1463 DPRINTFN(10,("ohci_ctrl_done: xfer=%p\n", xfer)); 1464 1465 #ifdef DIAGNOSTIC 1466 if (!(xfer->rqflags & URQ_REQUEST)) { 1467 panic("ohci_ctrl_done: not a request"); 1468 } 1469 #endif 1470 xfer->hcpriv = NULL; 1471 } 1472 1473 void 1474 ohci_device_intr_done(usbd_xfer_handle xfer) 1475 { 1476 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1477 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1478 ohci_soft_ed_t *sed = opipe->sed; 1479 ohci_soft_td_t *data, *tail; 1480 1481 1482 DPRINTFN(10,("ohci_intr_done: xfer=%p, actlen=%d\n", 1483 xfer, xfer->actlen)); 1484 1485 xfer->hcpriv = NULL; 1486 1487 if (xfer->pipe->repeat) { 1488 data = opipe->tail.td; 1489 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 1490 if (tail == NULL) { 1491 xfer->status = USBD_NOMEM; 1492 return; 1493 } 1494 tail->xfer = NULL; 1495 1496 data->td.td_flags = htole32( 1497 OHCI_TD_IN | OHCI_TD_NOCC | 1498 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 1499 if (xfer->flags & USBD_SHORT_XFER_OK) 1500 data->td.td_flags |= htole32(OHCI_TD_R); 1501 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf, 0)); 1502 data->nexttd = tail; 1503 data->td.td_nexttd = htole32(tail->physaddr); 1504 data->td.td_be = htole32(le32toh(data->td.td_cbp) + 1505 xfer->length - 1); 1506 data->len = xfer->length; 1507 data->xfer = xfer; 1508 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1509 xfer->hcpriv = data; 1510 xfer->actlen = 0; 1511 1512 sed->ed.ed_tailp = htole32(tail->physaddr); 1513 opipe->tail.td = tail; 1514 } 1515 } 1516 1517 void 1518 ohci_device_bulk_done(usbd_xfer_handle xfer) 1519 { 1520 DPRINTFN(10,("ohci_bulk_done: xfer=%p, actlen=%d\n", 1521 xfer, xfer->actlen)); 1522 1523 xfer->hcpriv = NULL; 1524 } 1525 1526 void 1527 ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer) 1528 { 1529 usbd_pipe_handle pipe; 1530 struct ohci_pipe *opipe; 1531 u_char *p; 1532 int i, m; 1533 int hstatus; 1534 1535 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1536 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n", 1537 sc, xfer, hstatus)); 1538 1539 if (xfer == NULL) { 1540 /* Just ignore the change. */ 1541 return; 1542 } 1543 1544 pipe = xfer->pipe; 1545 opipe = (struct ohci_pipe *)pipe; 1546 1547 p = KERNADDR(&xfer->dmabuf, 0); 1548 m = min(sc->sc_noport, xfer->length * 8 - 1); 1549 memset(p, 0, xfer->length); 1550 for (i = 1; i <= m; i++) { 1551 /* Pick out CHANGE bits from the status reg. */ 1552 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1553 p[i/8] |= 1 << (i%8); 1554 } 1555 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 1556 xfer->actlen = xfer->length; 1557 xfer->status = USBD_NORMAL_COMPLETION; 1558 1559 usb_transfer_complete(xfer); 1560 } 1561 1562 void 1563 ohci_root_intr_done(usbd_xfer_handle xfer) 1564 { 1565 xfer->hcpriv = NULL; 1566 } 1567 1568 void 1569 ohci_root_ctrl_done(usbd_xfer_handle xfer) 1570 { 1571 xfer->hcpriv = NULL; 1572 } 1573 1574 /* 1575 * Wait here until controller claims to have an interrupt. 1576 * Then call ohci_intr and return. Use timeout to avoid waiting 1577 * too long. 1578 */ 1579 void 1580 ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer) 1581 { 1582 int timo = xfer->timeout; 1583 int usecs; 1584 u_int32_t intrs; 1585 1586 xfer->status = USBD_IN_PROGRESS; 1587 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 1588 usb_delay_ms(&sc->sc_bus, 1); 1589 if (sc->sc_dying) 1590 break; 1591 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 1592 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs)); 1593 #ifdef OHCI_DEBUG 1594 if (ohcidebug > 15) 1595 ohci_dumpregs(sc); 1596 #endif 1597 if (intrs) { 1598 ohci_intr1(sc); 1599 if (xfer->status != USBD_IN_PROGRESS) 1600 return; 1601 } 1602 } 1603 1604 /* Timeout */ 1605 DPRINTF(("ohci_waitintr: timeout\n")); 1606 xfer->status = USBD_TIMEOUT; 1607 usb_transfer_complete(xfer); 1608 /* XXX should free TD */ 1609 } 1610 1611 void 1612 ohci_poll(struct usbd_bus *bus) 1613 { 1614 ohci_softc_t *sc = (ohci_softc_t *)bus; 1615 #ifdef OHCI_DEBUG 1616 static int last; 1617 int new; 1618 new = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1619 if (new != last) { 1620 DPRINTFN(10,("ohci_poll: intrs=0x%04x\n", new)); 1621 last = new; 1622 } 1623 #endif 1624 1625 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) 1626 ohci_intr1(sc); 1627 } 1628 1629 usbd_status 1630 ohci_device_request(usbd_xfer_handle xfer) 1631 { 1632 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1633 usb_device_request_t *req = &xfer->request; 1634 usbd_device_handle dev = opipe->pipe.device; 1635 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1636 int addr = dev->address; 1637 ohci_soft_td_t *setup, *stat, *next, *tail; 1638 ohci_soft_ed_t *sed; 1639 int isread; 1640 int len; 1641 usbd_status err; 1642 int s; 1643 1644 isread = req->bmRequestType & UT_READ; 1645 len = UGETW(req->wLength); 1646 1647 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 1648 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 1649 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1650 UGETW(req->wIndex), len, addr, 1651 opipe->pipe.endpoint->edesc->bEndpointAddress)); 1652 1653 setup = opipe->tail.td; 1654 stat = ohci_alloc_std(sc); 1655 if (stat == NULL) { 1656 err = USBD_NOMEM; 1657 goto bad1; 1658 } 1659 tail = ohci_alloc_std(sc); 1660 if (tail == NULL) { 1661 err = USBD_NOMEM; 1662 goto bad2; 1663 } 1664 tail->xfer = NULL; 1665 1666 sed = opipe->sed; 1667 opipe->u.ctl.length = len; 1668 1669 /* Update device address and length since they may have changed. */ 1670 /* XXX This only needs to be done once, but it's too early in open. */ 1671 /* XXXX Should not touch ED here! */ 1672 sed->ed.ed_flags = htole32( 1673 (le32toh(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) | 1674 OHCI_ED_SET_FA(addr) | 1675 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize))); 1676 1677 next = stat; 1678 1679 /* Set up data transaction */ 1680 if (len != 0) { 1681 ohci_soft_td_t *std = stat; 1682 1683 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 1684 std, &stat); 1685 stat = stat->nexttd; /* point at free TD */ 1686 if (err) 1687 goto bad3; 1688 /* Start toggle at 1 and then use the carried toggle. */ 1689 std->td.td_flags &= htole32(~OHCI_TD_TOGGLE_MASK); 1690 std->td.td_flags |= htole32(OHCI_TD_TOGGLE_1); 1691 } 1692 1693 memcpy(KERNADDR(&opipe->u.ctl.reqdma, 0), req, sizeof *req); 1694 1695 setup->td.td_flags = htole32(OHCI_TD_SETUP | OHCI_TD_NOCC | 1696 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1697 setup->td.td_cbp = htole32(DMAADDR(&opipe->u.ctl.reqdma, 0)); 1698 setup->nexttd = next; 1699 setup->td.td_nexttd = htole32(next->physaddr); 1700 setup->td.td_be = htole32(le32toh(setup->td.td_cbp) + sizeof *req - 1); 1701 setup->len = 0; 1702 setup->xfer = xfer; 1703 setup->flags = 0; 1704 xfer->hcpriv = setup; 1705 1706 stat->td.td_flags = htole32( 1707 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | 1708 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1709 stat->td.td_cbp = 0; 1710 stat->nexttd = tail; 1711 stat->td.td_nexttd = htole32(tail->physaddr); 1712 stat->td.td_be = 0; 1713 stat->flags = OHCI_CALL_DONE; 1714 stat->len = 0; 1715 stat->xfer = xfer; 1716 1717 #ifdef OHCI_DEBUG 1718 if (ohcidebug > 5) { 1719 DPRINTF(("ohci_device_request:\n")); 1720 ohci_dump_ed(sed); 1721 ohci_dump_tds(setup); 1722 } 1723 #endif 1724 1725 /* Insert ED in schedule */ 1726 s = splusb(); 1727 sed->ed.ed_tailp = htole32(tail->physaddr); 1728 opipe->tail.td = tail; 1729 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1730 if (xfer->timeout && !sc->sc_bus.use_polling) { 1731 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 1732 ohci_timeout, xfer); 1733 } 1734 splx(s); 1735 1736 #ifdef OHCI_DEBUG 1737 if (ohcidebug > 20) { 1738 delay(10000); 1739 DPRINTF(("ohci_device_request: status=%x\n", 1740 OREAD4(sc, OHCI_COMMAND_STATUS))); 1741 ohci_dumpregs(sc); 1742 printf("ctrl head:\n"); 1743 ohci_dump_ed(sc->sc_ctrl_head); 1744 printf("sed:\n"); 1745 ohci_dump_ed(sed); 1746 ohci_dump_tds(setup); 1747 } 1748 #endif 1749 1750 return (USBD_NORMAL_COMPLETION); 1751 1752 bad3: 1753 ohci_free_std(sc, tail); 1754 bad2: 1755 ohci_free_std(sc, stat); 1756 bad1: 1757 return (err); 1758 } 1759 1760 /* 1761 * Add an ED to the schedule. Called at splusb(). 1762 */ 1763 void 1764 ohci_add_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1765 { 1766 DPRINTFN(8,("ohci_add_ed: sed=%p head=%p\n", sed, head)); 1767 1768 SPLUSBCHECK; 1769 sed->next = head->next; 1770 sed->ed.ed_nexted = head->ed.ed_nexted; 1771 head->next = sed; 1772 head->ed.ed_nexted = htole32(sed->physaddr); 1773 } 1774 1775 /* 1776 * Remove an ED from the schedule. Called at splusb(). 1777 */ 1778 void 1779 ohci_rem_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1780 { 1781 ohci_soft_ed_t *p; 1782 1783 SPLUSBCHECK; 1784 1785 /* XXX */ 1786 for (p = head; p != NULL && p->next != sed; p = p->next) 1787 ; 1788 if (p == NULL) 1789 panic("ohci_rem_ed: ED not found"); 1790 p->next = sed->next; 1791 p->ed.ed_nexted = sed->ed.ed_nexted; 1792 } 1793 1794 /* 1795 * When a transfer is completed the TD is added to the done queue by 1796 * the host controller. This queue is the processed by software. 1797 * Unfortunately the queue contains the physical address of the TD 1798 * and we have no simple way to translate this back to a kernel address. 1799 * To make the translation possible (and fast) we use a hash table of 1800 * TDs currently in the schedule. The physical address is used as the 1801 * hash value. 1802 */ 1803 1804 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1805 /* Called at splusb() */ 1806 void 1807 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1808 { 1809 int h = HASH(std->physaddr); 1810 1811 SPLUSBCHECK; 1812 1813 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1814 } 1815 1816 /* Called at splusb() */ 1817 void 1818 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1819 { 1820 SPLUSBCHECK; 1821 1822 LIST_REMOVE(std, hnext); 1823 } 1824 1825 ohci_soft_td_t * 1826 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a) 1827 { 1828 int h = HASH(a); 1829 ohci_soft_td_t *std; 1830 1831 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1832 std != NULL; 1833 std = LIST_NEXT(std, hnext)) 1834 if (std->physaddr == a) 1835 return (std); 1836 return (NULL); 1837 } 1838 1839 /* Called at splusb() */ 1840 void 1841 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1842 { 1843 int h = HASH(sitd->physaddr); 1844 1845 SPLUSBCHECK; 1846 1847 DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n", 1848 sitd, (u_long)sitd->physaddr)); 1849 1850 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext); 1851 } 1852 1853 /* Called at splusb() */ 1854 void 1855 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1856 { 1857 SPLUSBCHECK; 1858 1859 DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n", 1860 sitd, (u_long)sitd->physaddr)); 1861 1862 LIST_REMOVE(sitd, hnext); 1863 } 1864 1865 ohci_soft_itd_t * 1866 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a) 1867 { 1868 int h = HASH(a); 1869 ohci_soft_itd_t *sitd; 1870 1871 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]); 1872 sitd != NULL; 1873 sitd = LIST_NEXT(sitd, hnext)) 1874 if (sitd->physaddr == a) 1875 return (sitd); 1876 return (NULL); 1877 } 1878 1879 void 1880 ohci_timeout(void *addr) 1881 { 1882 struct ohci_xfer *oxfer = addr; 1883 struct ohci_pipe *opipe = (struct ohci_pipe *)oxfer->xfer.pipe; 1884 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1885 1886 DPRINTF(("ohci_timeout: oxfer=%p\n", oxfer)); 1887 1888 if (sc->sc_dying) { 1889 ohci_abort_xfer(&oxfer->xfer, USBD_TIMEOUT); 1890 return; 1891 } 1892 1893 /* Execute the abort in a process context. */ 1894 usb_init_task(&oxfer->abort_task, ohci_timeout_task, addr); 1895 usb_add_task(oxfer->xfer.pipe->device, &oxfer->abort_task); 1896 } 1897 1898 void 1899 ohci_timeout_task(void *addr) 1900 { 1901 usbd_xfer_handle xfer = addr; 1902 int s; 1903 1904 DPRINTF(("ohci_timeout_task: xfer=%p\n", xfer)); 1905 1906 s = splusb(); 1907 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1908 splx(s); 1909 } 1910 1911 #ifdef OHCI_DEBUG 1912 void 1913 ohci_dump_tds(ohci_soft_td_t *std) 1914 { 1915 for (; std; std = std->nexttd) 1916 ohci_dump_td(std); 1917 } 1918 1919 void 1920 ohci_dump_td(ohci_soft_td_t *std) 1921 { 1922 char sbuf[128]; 1923 1924 bitmask_snprintf((u_int32_t)le32toh(std->td.td_flags), 1925 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 1926 sbuf, sizeof(sbuf)); 1927 1928 printf("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx " 1929 "nexttd=0x%08lx be=0x%08lx\n", 1930 std, (u_long)std->physaddr, sbuf, 1931 OHCI_TD_GET_DI(le32toh(std->td.td_flags)), 1932 OHCI_TD_GET_EC(le32toh(std->td.td_flags)), 1933 OHCI_TD_GET_CC(le32toh(std->td.td_flags)), 1934 (u_long)le32toh(std->td.td_cbp), 1935 (u_long)le32toh(std->td.td_nexttd), 1936 (u_long)le32toh(std->td.td_be)); 1937 } 1938 1939 void 1940 ohci_dump_itd(ohci_soft_itd_t *sitd) 1941 { 1942 int i; 1943 1944 printf("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n" 1945 "bp0=0x%08lx next=0x%08lx be=0x%08lx\n", 1946 sitd, (u_long)sitd->physaddr, 1947 OHCI_ITD_GET_SF(le32toh(sitd->itd.itd_flags)), 1948 OHCI_ITD_GET_DI(le32toh(sitd->itd.itd_flags)), 1949 OHCI_ITD_GET_FC(le32toh(sitd->itd.itd_flags)), 1950 OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags)), 1951 (u_long)le32toh(sitd->itd.itd_bp0), 1952 (u_long)le32toh(sitd->itd.itd_nextitd), 1953 (u_long)le32toh(sitd->itd.itd_be)); 1954 for (i = 0; i < OHCI_ITD_NOFFSET; i++) 1955 printf("offs[%d]=0x%04x ", i, 1956 (u_int)le16toh(sitd->itd.itd_offset[i])); 1957 printf("\n"); 1958 } 1959 1960 void 1961 ohci_dump_itds(ohci_soft_itd_t *sitd) 1962 { 1963 for (; sitd; sitd = sitd->nextitd) 1964 ohci_dump_itd(sitd); 1965 } 1966 1967 void 1968 ohci_dump_ed(ohci_soft_ed_t *sed) 1969 { 1970 char sbuf[128], sbuf2[128]; 1971 1972 bitmask_snprintf((u_int32_t)le32toh(sed->ed.ed_flags), 1973 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO", 1974 sbuf, sizeof(sbuf)); 1975 bitmask_snprintf((u_int32_t)le32toh(sed->ed.ed_headp), 1976 "\20\1HALT\2CARRY", sbuf2, sizeof(sbuf2)); 1977 1978 printf("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d flags=%s\ntailp=0x%08lx " 1979 "headflags=%s headp=0x%08lx nexted=0x%08lx\n", 1980 sed, (u_long)sed->physaddr, 1981 OHCI_ED_GET_FA(le32toh(sed->ed.ed_flags)), 1982 OHCI_ED_GET_EN(le32toh(sed->ed.ed_flags)), 1983 OHCI_ED_GET_MAXP(le32toh(sed->ed.ed_flags)), sbuf, 1984 (u_long)le32toh(sed->ed.ed_tailp), sbuf2, 1985 (u_long)le32toh(sed->ed.ed_headp), 1986 (u_long)le32toh(sed->ed.ed_nexted)); 1987 } 1988 #endif 1989 1990 usbd_status 1991 ohci_open(usbd_pipe_handle pipe) 1992 { 1993 usbd_device_handle dev = pipe->device; 1994 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1995 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1996 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1997 u_int8_t addr = dev->address; 1998 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1999 ohci_soft_ed_t *sed; 2000 ohci_soft_td_t *std; 2001 ohci_soft_itd_t *sitd; 2002 ohci_physaddr_t tdphys; 2003 u_int32_t fmt; 2004 usbd_status err; 2005 int s; 2006 int ival; 2007 2008 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 2009 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 2010 2011 if (sc->sc_dying) 2012 return (USBD_IOERROR); 2013 2014 std = NULL; 2015 sed = NULL; 2016 2017 if (addr == sc->sc_addr) { 2018 switch (ed->bEndpointAddress) { 2019 case USB_CONTROL_ENDPOINT: 2020 pipe->methods = &ohci_root_ctrl_methods; 2021 break; 2022 case UE_DIR_IN | OHCI_INTR_ENDPT: 2023 pipe->methods = &ohci_root_intr_methods; 2024 break; 2025 default: 2026 return (USBD_INVAL); 2027 } 2028 } else { 2029 sed = ohci_alloc_sed(sc); 2030 if (sed == NULL) 2031 goto bad0; 2032 opipe->sed = sed; 2033 if (xfertype == UE_ISOCHRONOUS) { 2034 sitd = ohci_alloc_sitd(sc); 2035 if (sitd == NULL) 2036 goto bad1; 2037 opipe->tail.itd = sitd; 2038 tdphys = sitd->physaddr; 2039 fmt = OHCI_ED_FORMAT_ISO; 2040 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 2041 fmt |= OHCI_ED_DIR_IN; 2042 else 2043 fmt |= OHCI_ED_DIR_OUT; 2044 } else { 2045 std = ohci_alloc_std(sc); 2046 if (std == NULL) 2047 goto bad1; 2048 opipe->tail.td = std; 2049 tdphys = std->physaddr; 2050 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD; 2051 } 2052 sed->ed.ed_flags = htole32( 2053 OHCI_ED_SET_FA(addr) | 2054 OHCI_ED_SET_EN(ed->bEndpointAddress) | 2055 (dev->speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) | 2056 fmt | 2057 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 2058 sed->ed.ed_headp = sed->ed.ed_tailp = htole32(tdphys); 2059 2060 switch (xfertype) { 2061 case UE_CONTROL: 2062 pipe->methods = &ohci_device_ctrl_methods; 2063 err = usb_allocmem(&sc->sc_bus, 2064 sizeof(usb_device_request_t), 2065 0, &opipe->u.ctl.reqdma); 2066 if (err) 2067 goto bad; 2068 s = splusb(); 2069 ohci_add_ed(sed, sc->sc_ctrl_head); 2070 splx(s); 2071 break; 2072 case UE_INTERRUPT: 2073 pipe->methods = &ohci_device_intr_methods; 2074 ival = pipe->interval; 2075 if (ival == USBD_DEFAULT_INTERVAL) 2076 ival = ed->bInterval; 2077 return (ohci_device_setintr(sc, opipe, ival)); 2078 case UE_ISOCHRONOUS: 2079 pipe->methods = &ohci_device_isoc_methods; 2080 return (ohci_setup_isoc(pipe)); 2081 case UE_BULK: 2082 pipe->methods = &ohci_device_bulk_methods; 2083 s = splusb(); 2084 ohci_add_ed(sed, sc->sc_bulk_head); 2085 splx(s); 2086 break; 2087 } 2088 } 2089 return (USBD_NORMAL_COMPLETION); 2090 2091 bad: 2092 if (std != NULL) 2093 ohci_free_std(sc, std); 2094 bad1: 2095 if (sed != NULL) 2096 ohci_free_sed(sc, sed); 2097 bad0: 2098 return (USBD_NOMEM); 2099 2100 } 2101 2102 /* 2103 * Close a reqular pipe. 2104 * Assumes that there are no pending transactions. 2105 */ 2106 void 2107 ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head) 2108 { 2109 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2110 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2111 ohci_soft_ed_t *sed = opipe->sed; 2112 int s; 2113 2114 s = splusb(); 2115 #ifdef DIAGNOSTIC 2116 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 2117 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2118 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) { 2119 ohci_soft_td_t *std; 2120 std = ohci_hash_find_td(sc, le32toh(sed->ed.ed_headp)); 2121 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 2122 "tl=0x%x pipe=%p, std=%p\n", sed, 2123 (int)le32toh(sed->ed.ed_headp), 2124 (int)le32toh(sed->ed.ed_tailp), 2125 pipe, std); 2126 #ifdef USB_DEBUG 2127 usbd_dump_pipe(&opipe->pipe); 2128 #endif 2129 #ifdef OHCI_DEBUG 2130 ohci_dump_ed(sed); 2131 if (std) 2132 ohci_dump_td(std); 2133 #endif 2134 usb_delay_ms(&sc->sc_bus, 2); 2135 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2136 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) 2137 printf("ohci_close_pipe: pipe still not empty\n"); 2138 } 2139 #endif 2140 ohci_rem_ed(sed, head); 2141 /* Make sure the host controller is not touching this ED */ 2142 usb_delay_ms(&sc->sc_bus, 1); 2143 splx(s); 2144 ohci_free_sed(sc, opipe->sed); 2145 } 2146 2147 /* 2148 * Abort a device request. 2149 * If this routine is called at splusb() it guarantees that the request 2150 * will be removed from the hardware scheduling and that the callback 2151 * for it will be called with USBD_CANCELLED status. 2152 * It's impossible to guarantee that the requested transfer will not 2153 * have happened since the hardware runs concurrently. 2154 * If the transaction has already happened we rely on the ordinary 2155 * interrupt processing to process it. 2156 */ 2157 void 2158 ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2159 { 2160 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2161 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 2162 ohci_soft_ed_t *sed = opipe->sed; 2163 ohci_soft_td_t *p, *n; 2164 ohci_physaddr_t headp; 2165 int s, hit; 2166 2167 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p sed=%p\n", xfer, opipe,sed)); 2168 2169 if (sc->sc_dying) { 2170 /* If we're dying, just do the software part. */ 2171 s = splusb(); 2172 xfer->status = status; /* make software ignore it */ 2173 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 2174 usb_transfer_complete(xfer); 2175 splx(s); 2176 } 2177 2178 if (xfer->device->bus->intr_context || !curproc) 2179 panic("ohci_abort_xfer: not in process context"); 2180 2181 /* 2182 * Step 1: Make interrupt routine and hardware ignore xfer. 2183 */ 2184 s = splusb(); 2185 xfer->status = status; /* make software ignore it */ 2186 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 2187 splx(s); 2188 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed)); 2189 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 2190 2191 /* 2192 * Step 2: Wait until we know hardware has finished any possible 2193 * use of the xfer. Also make sure the soft interrupt routine 2194 * has run. 2195 */ 2196 usb_delay_ms(opipe->pipe.device->bus, 20); /* Hardware finishes in 1ms */ 2197 s = splusb(); 2198 #ifdef USB_USE_SOFTINTR 2199 sc->sc_softwake = 1; 2200 #endif /* USB_USE_SOFTINTR */ 2201 usb_schedsoftintr(&sc->sc_bus); 2202 #ifdef USB_USE_SOFTINTR 2203 tsleep(&sc->sc_softwake, PZERO, "ohciab", 0); 2204 #endif /* USB_USE_SOFTINTR */ 2205 splx(s); 2206 2207 /* 2208 * Step 3: Remove any vestiges of the xfer from the hardware. 2209 * The complication here is that the hardware may have executed 2210 * beyond the xfer we're trying to abort. So as we're scanning 2211 * the TDs of this xfer we check if the hardware points to 2212 * any of them. 2213 */ 2214 s = splusb(); /* XXX why? */ 2215 p = xfer->hcpriv; 2216 #ifdef DIAGNOSTIC 2217 if (p == NULL) { 2218 splx(s); 2219 printf("ohci_abort_xfer: hcpriv is NULL\n"); 2220 return; 2221 } 2222 #endif 2223 #ifdef OHCI_DEBUG 2224 if (ohcidebug > 1) { 2225 DPRINTF(("ohci_abort_xfer: sed=\n")); 2226 ohci_dump_ed(sed); 2227 ohci_dump_tds(p); 2228 } 2229 #endif 2230 headp = le32toh(sed->ed.ed_headp) & OHCI_HEADMASK; 2231 hit = 0; 2232 for (; p->xfer == xfer; p = n) { 2233 hit |= headp == p->physaddr; 2234 n = p->nexttd; 2235 ohci_free_std(sc, p); 2236 } 2237 /* Zap headp register if hardware pointed inside the xfer. */ 2238 if (hit) { 2239 DPRINTFN(1,("ohci_abort_xfer: set hd=0x08%x, tl=0x%08x\n", 2240 (int)p->physaddr, (int)le32toh(sed->ed.ed_tailp))); 2241 sed->ed.ed_headp = htole32(p->physaddr); /* unlink TDs */ 2242 } else { 2243 DPRINTFN(1,("ohci_abort_xfer: no hit\n")); 2244 } 2245 2246 /* 2247 * Step 4: Turn on hardware again. 2248 */ 2249 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 2250 2251 /* 2252 * Step 5: Execute callback. 2253 */ 2254 usb_transfer_complete(xfer); 2255 2256 splx(s); 2257 } 2258 2259 /* 2260 * Data structures and routines to emulate the root hub. 2261 */ 2262 Static usb_device_descriptor_t ohci_devd = { 2263 USB_DEVICE_DESCRIPTOR_SIZE, 2264 UDESC_DEVICE, /* type */ 2265 {0x00, 0x01}, /* USB version */ 2266 UDCLASS_HUB, /* class */ 2267 UDSUBCLASS_HUB, /* subclass */ 2268 UDPROTO_FSHUB, 2269 64, /* max packet */ 2270 {0},{0},{0x00,0x01}, /* device id */ 2271 1,2,0, /* string indicies */ 2272 1 /* # of configurations */ 2273 }; 2274 2275 Static usb_config_descriptor_t ohci_confd = { 2276 USB_CONFIG_DESCRIPTOR_SIZE, 2277 UDESC_CONFIG, 2278 {USB_CONFIG_DESCRIPTOR_SIZE + 2279 USB_INTERFACE_DESCRIPTOR_SIZE + 2280 USB_ENDPOINT_DESCRIPTOR_SIZE}, 2281 1, 2282 1, 2283 0, 2284 UC_SELF_POWERED, 2285 0 /* max power */ 2286 }; 2287 2288 Static usb_interface_descriptor_t ohci_ifcd = { 2289 USB_INTERFACE_DESCRIPTOR_SIZE, 2290 UDESC_INTERFACE, 2291 0, 2292 0, 2293 1, 2294 UICLASS_HUB, 2295 UISUBCLASS_HUB, 2296 UIPROTO_FSHUB, 2297 0 2298 }; 2299 2300 Static usb_endpoint_descriptor_t ohci_endpd = { 2301 USB_ENDPOINT_DESCRIPTOR_SIZE, 2302 UDESC_ENDPOINT, 2303 UE_DIR_IN | OHCI_INTR_ENDPT, 2304 UE_INTERRUPT, 2305 {8, 0}, /* max packet */ 2306 255 2307 }; 2308 2309 Static usb_hub_descriptor_t ohci_hubd = { 2310 USB_HUB_DESCRIPTOR_SIZE, 2311 UDESC_HUB, 2312 0, 2313 {0,0}, 2314 0, 2315 0, 2316 {0}, 2317 }; 2318 2319 Static int 2320 ohci_str(usb_string_descriptor_t *p, int l, const char *s) 2321 { 2322 int i; 2323 2324 if (l == 0) 2325 return (0); 2326 p->bLength = 2 * strlen(s) + 2; 2327 if (l == 1) 2328 return (1); 2329 p->bDescriptorType = UDESC_STRING; 2330 l -= 2; 2331 for (i = 0; s[i] && l > 1; i++, l -= 2) 2332 USETW2(p->bString[i], 0, s[i]); 2333 return (2*i+2); 2334 } 2335 2336 /* 2337 * Simulate a hardware hub by handling all the necessary requests. 2338 */ 2339 Static usbd_status 2340 ohci_root_ctrl_transfer(usbd_xfer_handle xfer) 2341 { 2342 usbd_status err; 2343 2344 /* Insert last in queue. */ 2345 err = usb_insert_transfer(xfer); 2346 if (err) 2347 return (err); 2348 2349 /* Pipe isn't running, start first */ 2350 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2351 } 2352 2353 Static usbd_status 2354 ohci_root_ctrl_start(usbd_xfer_handle xfer) 2355 { 2356 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2357 usb_device_request_t *req; 2358 void *buf = NULL; 2359 int port, i; 2360 int s, len, value, index, l, totlen = 0; 2361 usb_port_status_t ps; 2362 usb_hub_descriptor_t hubd; 2363 usbd_status err; 2364 u_int32_t v; 2365 2366 if (sc->sc_dying) 2367 return (USBD_IOERROR); 2368 2369 #ifdef DIAGNOSTIC 2370 if (!(xfer->rqflags & URQ_REQUEST)) 2371 /* XXX panic */ 2372 return (USBD_INVAL); 2373 #endif 2374 req = &xfer->request; 2375 2376 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 2377 req->bmRequestType, req->bRequest)); 2378 2379 len = UGETW(req->wLength); 2380 value = UGETW(req->wValue); 2381 index = UGETW(req->wIndex); 2382 2383 if (len != 0) 2384 buf = KERNADDR(&xfer->dmabuf, 0); 2385 2386 #define C(x,y) ((x) | ((y) << 8)) 2387 switch(C(req->bRequest, req->bmRequestType)) { 2388 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 2389 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 2390 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 2391 /* 2392 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 2393 * for the integrated root hub. 2394 */ 2395 break; 2396 case C(UR_GET_CONFIG, UT_READ_DEVICE): 2397 if (len > 0) { 2398 *(u_int8_t *)buf = sc->sc_conf; 2399 totlen = 1; 2400 } 2401 break; 2402 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2403 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 2404 switch(value >> 8) { 2405 case UDESC_DEVICE: 2406 if ((value & 0xff) != 0) { 2407 err = USBD_IOERROR; 2408 goto ret; 2409 } 2410 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 2411 USETW(ohci_devd.idVendor, sc->sc_id_vendor); 2412 memcpy(buf, &ohci_devd, l); 2413 break; 2414 case UDESC_CONFIG: 2415 if ((value & 0xff) != 0) { 2416 err = USBD_IOERROR; 2417 goto ret; 2418 } 2419 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 2420 memcpy(buf, &ohci_confd, l); 2421 buf = (char *)buf + l; 2422 len -= l; 2423 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 2424 totlen += l; 2425 memcpy(buf, &ohci_ifcd, l); 2426 buf = (char *)buf + l; 2427 len -= l; 2428 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 2429 totlen += l; 2430 memcpy(buf, &ohci_endpd, l); 2431 break; 2432 case UDESC_STRING: 2433 if (len == 0) 2434 break; 2435 *(u_int8_t *)buf = 0; 2436 totlen = 1; 2437 switch (value & 0xff) { 2438 case 1: /* Vendor */ 2439 totlen = ohci_str(buf, len, sc->sc_vendor); 2440 break; 2441 case 2: /* Product */ 2442 totlen = ohci_str(buf, len, "OHCI root hub"); 2443 break; 2444 } 2445 break; 2446 default: 2447 err = USBD_IOERROR; 2448 goto ret; 2449 } 2450 break; 2451 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 2452 if (len > 0) { 2453 *(u_int8_t *)buf = 0; 2454 totlen = 1; 2455 } 2456 break; 2457 case C(UR_GET_STATUS, UT_READ_DEVICE): 2458 if (len > 1) { 2459 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 2460 totlen = 2; 2461 } 2462 break; 2463 case C(UR_GET_STATUS, UT_READ_INTERFACE): 2464 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 2465 if (len > 1) { 2466 USETW(((usb_status_t *)buf)->wStatus, 0); 2467 totlen = 2; 2468 } 2469 break; 2470 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 2471 if (value >= USB_MAX_DEVICES) { 2472 err = USBD_IOERROR; 2473 goto ret; 2474 } 2475 sc->sc_addr = value; 2476 break; 2477 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 2478 if (value != 0 && value != 1) { 2479 err = USBD_IOERROR; 2480 goto ret; 2481 } 2482 sc->sc_conf = value; 2483 break; 2484 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 2485 break; 2486 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 2487 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 2488 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 2489 err = USBD_IOERROR; 2490 goto ret; 2491 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 2492 break; 2493 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 2494 break; 2495 /* Hub requests */ 2496 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2497 break; 2498 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2499 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 2500 "port=%d feature=%d\n", 2501 index, value)); 2502 if (index < 1 || index > sc->sc_noport) { 2503 err = USBD_IOERROR; 2504 goto ret; 2505 } 2506 port = OHCI_RH_PORT_STATUS(index); 2507 switch(value) { 2508 case UHF_PORT_ENABLE: 2509 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2510 break; 2511 case UHF_PORT_SUSPEND: 2512 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2513 break; 2514 case UHF_PORT_POWER: 2515 /* Yes, writing to the LOW_SPEED bit clears power. */ 2516 OWRITE4(sc, port, UPS_LOW_SPEED); 2517 break; 2518 case UHF_C_PORT_CONNECTION: 2519 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2520 break; 2521 case UHF_C_PORT_ENABLE: 2522 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2523 break; 2524 case UHF_C_PORT_SUSPEND: 2525 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2526 break; 2527 case UHF_C_PORT_OVER_CURRENT: 2528 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2529 break; 2530 case UHF_C_PORT_RESET: 2531 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2532 break; 2533 default: 2534 err = USBD_IOERROR; 2535 goto ret; 2536 } 2537 switch(value) { 2538 case UHF_C_PORT_CONNECTION: 2539 case UHF_C_PORT_ENABLE: 2540 case UHF_C_PORT_SUSPEND: 2541 case UHF_C_PORT_OVER_CURRENT: 2542 case UHF_C_PORT_RESET: 2543 /* Enable RHSC interrupt if condition is cleared. */ 2544 if ((OREAD4(sc, port) >> 16) == 0) 2545 ohci_rhsc_able(sc, 1); 2546 break; 2547 default: 2548 break; 2549 } 2550 break; 2551 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2552 if (value != 0) { 2553 err = USBD_IOERROR; 2554 goto ret; 2555 } 2556 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2557 hubd = ohci_hubd; 2558 hubd.bNbrPorts = sc->sc_noport; 2559 USETW(hubd.wHubCharacteristics, 2560 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2561 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2562 /* XXX overcurrent */ 2563 ); 2564 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2565 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2566 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2567 hubd.DeviceRemovable[i++] = (u_int8_t)v; 2568 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2569 l = min(len, hubd.bDescLength); 2570 totlen = l; 2571 memcpy(buf, &hubd, l); 2572 break; 2573 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2574 if (len != 4) { 2575 err = USBD_IOERROR; 2576 goto ret; 2577 } 2578 memset(buf, 0, len); /* ? XXX */ 2579 totlen = len; 2580 break; 2581 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2582 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 2583 index)); 2584 if (index < 1 || index > sc->sc_noport) { 2585 err = USBD_IOERROR; 2586 goto ret; 2587 } 2588 if (len != 4) { 2589 err = USBD_IOERROR; 2590 goto ret; 2591 } 2592 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2593 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 2594 v)); 2595 USETW(ps.wPortStatus, v); 2596 USETW(ps.wPortChange, v >> 16); 2597 l = min(len, sizeof ps); 2598 memcpy(buf, &ps, l); 2599 totlen = l; 2600 break; 2601 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2602 err = USBD_IOERROR; 2603 goto ret; 2604 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2605 break; 2606 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2607 if (index < 1 || index > sc->sc_noport) { 2608 err = USBD_IOERROR; 2609 goto ret; 2610 } 2611 port = OHCI_RH_PORT_STATUS(index); 2612 switch(value) { 2613 case UHF_PORT_ENABLE: 2614 OWRITE4(sc, port, UPS_PORT_ENABLED); 2615 break; 2616 case UHF_PORT_SUSPEND: 2617 OWRITE4(sc, port, UPS_SUSPEND); 2618 break; 2619 case UHF_PORT_RESET: 2620 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 2621 index)); 2622 OWRITE4(sc, port, UPS_RESET); 2623 for (i = 0; i < 5; i++) { 2624 usb_delay_ms(&sc->sc_bus, 2625 USB_PORT_ROOT_RESET_DELAY); 2626 if (sc->sc_dying) { 2627 err = USBD_IOERROR; 2628 goto ret; 2629 } 2630 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2631 break; 2632 } 2633 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 2634 index, OREAD4(sc, port))); 2635 break; 2636 case UHF_PORT_POWER: 2637 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 2638 "%d\n", index)); 2639 OWRITE4(sc, port, UPS_PORT_POWER); 2640 break; 2641 default: 2642 err = USBD_IOERROR; 2643 goto ret; 2644 } 2645 break; 2646 default: 2647 err = USBD_IOERROR; 2648 goto ret; 2649 } 2650 xfer->actlen = totlen; 2651 err = USBD_NORMAL_COMPLETION; 2652 ret: 2653 xfer->status = err; 2654 s = splusb(); 2655 usb_transfer_complete(xfer); 2656 splx(s); 2657 return (USBD_IN_PROGRESS); 2658 } 2659 2660 /* Abort a root control request. */ 2661 Static void 2662 ohci_root_ctrl_abort(usbd_xfer_handle xfer) 2663 { 2664 /* Nothing to do, all transfers are synchronous. */ 2665 } 2666 2667 /* Close the root pipe. */ 2668 Static void 2669 ohci_root_ctrl_close(usbd_pipe_handle pipe) 2670 { 2671 DPRINTF(("ohci_root_ctrl_close\n")); 2672 /* Nothing to do. */ 2673 } 2674 2675 Static usbd_status 2676 ohci_root_intr_transfer(usbd_xfer_handle xfer) 2677 { 2678 usbd_status err; 2679 2680 /* Insert last in queue. */ 2681 err = usb_insert_transfer(xfer); 2682 if (err) 2683 return (err); 2684 2685 /* Pipe isn't running, start first */ 2686 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2687 } 2688 2689 Static usbd_status 2690 ohci_root_intr_start(usbd_xfer_handle xfer) 2691 { 2692 usbd_pipe_handle pipe = xfer->pipe; 2693 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2694 2695 if (sc->sc_dying) 2696 return (USBD_IOERROR); 2697 2698 sc->sc_intrxfer = xfer; 2699 2700 return (USBD_IN_PROGRESS); 2701 } 2702 2703 /* Abort a root interrupt request. */ 2704 Static void 2705 ohci_root_intr_abort(usbd_xfer_handle xfer) 2706 { 2707 int s; 2708 2709 if (xfer->pipe->intrxfer == xfer) { 2710 DPRINTF(("ohci_root_intr_abort: remove\n")); 2711 xfer->pipe->intrxfer = NULL; 2712 } 2713 xfer->status = USBD_CANCELLED; 2714 s = splusb(); 2715 usb_transfer_complete(xfer); 2716 splx(s); 2717 } 2718 2719 /* Close the root pipe. */ 2720 Static void 2721 ohci_root_intr_close(usbd_pipe_handle pipe) 2722 { 2723 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2724 2725 DPRINTF(("ohci_root_intr_close\n")); 2726 2727 sc->sc_intrxfer = NULL; 2728 } 2729 2730 /************************/ 2731 2732 Static usbd_status 2733 ohci_device_ctrl_transfer(usbd_xfer_handle xfer) 2734 { 2735 usbd_status err; 2736 2737 /* Insert last in queue. */ 2738 err = usb_insert_transfer(xfer); 2739 if (err) 2740 return (err); 2741 2742 /* Pipe isn't running, start first */ 2743 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2744 } 2745 2746 Static usbd_status 2747 ohci_device_ctrl_start(usbd_xfer_handle xfer) 2748 { 2749 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2750 usbd_status err; 2751 2752 if (sc->sc_dying) 2753 return (USBD_IOERROR); 2754 2755 #ifdef DIAGNOSTIC 2756 if (!(xfer->rqflags & URQ_REQUEST)) { 2757 /* XXX panic */ 2758 printf("ohci_device_ctrl_transfer: not a request\n"); 2759 return (USBD_INVAL); 2760 } 2761 #endif 2762 2763 err = ohci_device_request(xfer); 2764 if (err) 2765 return (err); 2766 2767 if (sc->sc_bus.use_polling) 2768 ohci_waitintr(sc, xfer); 2769 return (USBD_IN_PROGRESS); 2770 } 2771 2772 /* Abort a device control request. */ 2773 Static void 2774 ohci_device_ctrl_abort(usbd_xfer_handle xfer) 2775 { 2776 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer)); 2777 ohci_abort_xfer(xfer, USBD_CANCELLED); 2778 } 2779 2780 /* Close a device control pipe. */ 2781 Static void 2782 ohci_device_ctrl_close(usbd_pipe_handle pipe) 2783 { 2784 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2785 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2786 2787 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe)); 2788 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2789 ohci_free_std(sc, opipe->tail.td); 2790 } 2791 2792 /************************/ 2793 2794 Static void 2795 ohci_device_clear_toggle(usbd_pipe_handle pipe) 2796 { 2797 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2798 2799 opipe->sed->ed.ed_headp &= htole32(~OHCI_TOGGLECARRY); 2800 } 2801 2802 Static void 2803 ohci_noop(usbd_pipe_handle pipe) 2804 { 2805 } 2806 2807 Static usbd_status 2808 ohci_device_bulk_transfer(usbd_xfer_handle xfer) 2809 { 2810 usbd_status err; 2811 2812 /* Insert last in queue. */ 2813 err = usb_insert_transfer(xfer); 2814 if (err) 2815 return (err); 2816 2817 /* Pipe isn't running, start first */ 2818 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2819 } 2820 2821 Static usbd_status 2822 ohci_device_bulk_start(usbd_xfer_handle xfer) 2823 { 2824 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2825 usbd_device_handle dev = opipe->pipe.device; 2826 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2827 int addr = dev->address; 2828 ohci_soft_td_t *data, *tail, *tdp; 2829 ohci_soft_ed_t *sed; 2830 int s, len, isread, endpt; 2831 usbd_status err; 2832 2833 if (sc->sc_dying) 2834 return (USBD_IOERROR); 2835 2836 #ifdef DIAGNOSTIC 2837 if (xfer->rqflags & URQ_REQUEST) { 2838 /* XXX panic */ 2839 printf("ohci_device_bulk_start: a request\n"); 2840 return (USBD_INVAL); 2841 } 2842 #endif 2843 2844 len = xfer->length; 2845 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 2846 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2847 sed = opipe->sed; 2848 2849 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d " 2850 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags, 2851 endpt)); 2852 2853 opipe->u.bulk.isread = isread; 2854 opipe->u.bulk.length = len; 2855 2856 /* Update device address */ 2857 sed->ed.ed_flags = htole32( 2858 (le32toh(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) | 2859 OHCI_ED_SET_FA(addr)); 2860 2861 /* Allocate a chain of new TDs (including a new tail). */ 2862 data = opipe->tail.td; 2863 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 2864 data, &tail); 2865 /* We want interrupt at the end of the transfer. */ 2866 tail->td.td_flags &= htole32(~OHCI_TD_INTR_MASK); 2867 tail->td.td_flags |= htole32(OHCI_TD_SET_DI(1)); 2868 tail->flags |= OHCI_CALL_DONE; 2869 tail = tail->nexttd; /* point at sentinel */ 2870 if (err) 2871 return (err); 2872 2873 tail->xfer = NULL; 2874 xfer->hcpriv = data; 2875 2876 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x " 2877 "td_cbp=0x%08x td_be=0x%08x\n", 2878 (int)le32toh(sed->ed.ed_flags), 2879 (int)le32toh(data->td.td_flags), 2880 (int)le32toh(data->td.td_cbp), 2881 (int)le32toh(data->td.td_be))); 2882 2883 #ifdef OHCI_DEBUG 2884 if (ohcidebug > 5) { 2885 ohci_dump_ed(sed); 2886 ohci_dump_tds(data); 2887 } 2888 #endif 2889 2890 /* Insert ED in schedule */ 2891 s = splusb(); 2892 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 2893 tdp->xfer = xfer; 2894 } 2895 sed->ed.ed_tailp = htole32(tail->physaddr); 2896 opipe->tail.td = tail; 2897 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 2898 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 2899 if (xfer->timeout && !sc->sc_bus.use_polling) { 2900 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2901 ohci_timeout, xfer); 2902 } 2903 2904 #if 0 2905 /* This goes wrong if we are too slow. */ 2906 if (ohcidebug > 10) { 2907 delay(10000); 2908 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2909 OREAD4(sc, OHCI_COMMAND_STATUS))); 2910 ohci_dump_ed(sed); 2911 ohci_dump_tds(data); 2912 } 2913 #endif 2914 2915 splx(s); 2916 2917 return (USBD_IN_PROGRESS); 2918 } 2919 2920 Static void 2921 ohci_device_bulk_abort(usbd_xfer_handle xfer) 2922 { 2923 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer)); 2924 ohci_abort_xfer(xfer, USBD_CANCELLED); 2925 } 2926 2927 /* 2928 * Close a device bulk pipe. 2929 */ 2930 Static void 2931 ohci_device_bulk_close(usbd_pipe_handle pipe) 2932 { 2933 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2934 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2935 2936 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe)); 2937 ohci_close_pipe(pipe, sc->sc_bulk_head); 2938 ohci_free_std(sc, opipe->tail.td); 2939 } 2940 2941 /************************/ 2942 2943 Static usbd_status 2944 ohci_device_intr_transfer(usbd_xfer_handle xfer) 2945 { 2946 usbd_status err; 2947 2948 /* Insert last in queue. */ 2949 err = usb_insert_transfer(xfer); 2950 if (err) 2951 return (err); 2952 2953 /* Pipe isn't running, start first */ 2954 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2955 } 2956 2957 Static usbd_status 2958 ohci_device_intr_start(usbd_xfer_handle xfer) 2959 { 2960 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2961 usbd_device_handle dev = opipe->pipe.device; 2962 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2963 ohci_soft_ed_t *sed = opipe->sed; 2964 ohci_soft_td_t *data, *tail; 2965 int len; 2966 int s; 2967 2968 if (sc->sc_dying) 2969 return (USBD_IOERROR); 2970 2971 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d " 2972 "flags=%d priv=%p\n", 2973 xfer, xfer->length, xfer->flags, xfer->priv)); 2974 2975 #ifdef DIAGNOSTIC 2976 if (xfer->rqflags & URQ_REQUEST) 2977 panic("ohci_device_intr_transfer: a request"); 2978 #endif 2979 2980 len = xfer->length; 2981 2982 data = opipe->tail.td; 2983 tail = ohci_alloc_std(sc); 2984 if (tail == NULL) 2985 return (USBD_NOMEM); 2986 tail->xfer = NULL; 2987 2988 data->td.td_flags = htole32( 2989 OHCI_TD_IN | OHCI_TD_NOCC | 2990 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 2991 if (xfer->flags & USBD_SHORT_XFER_OK) 2992 data->td.td_flags |= htole32(OHCI_TD_R); 2993 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf, 0)); 2994 data->nexttd = tail; 2995 data->td.td_nexttd = htole32(tail->physaddr); 2996 data->td.td_be = htole32(le32toh(data->td.td_cbp) + len - 1); 2997 data->len = len; 2998 data->xfer = xfer; 2999 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 3000 xfer->hcpriv = data; 3001 3002 #ifdef OHCI_DEBUG 3003 if (ohcidebug > 5) { 3004 DPRINTF(("ohci_device_intr_transfer:\n")); 3005 ohci_dump_ed(sed); 3006 ohci_dump_tds(data); 3007 } 3008 #endif 3009 3010 /* Insert ED in schedule */ 3011 s = splusb(); 3012 sed->ed.ed_tailp = htole32(tail->physaddr); 3013 opipe->tail.td = tail; 3014 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 3015 3016 #if 0 3017 /* 3018 * This goes horribly wrong, printing thousands of descriptors, 3019 * because false references are followed due to the fact that the 3020 * TD is gone. 3021 */ 3022 if (ohcidebug > 5) { 3023 usb_delay_ms(&sc->sc_bus, 5); 3024 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 3025 OREAD4(sc, OHCI_COMMAND_STATUS))); 3026 ohci_dump_ed(sed); 3027 ohci_dump_tds(data); 3028 } 3029 #endif 3030 splx(s); 3031 3032 return (USBD_IN_PROGRESS); 3033 } 3034 3035 /* Abort a device control request. */ 3036 Static void 3037 ohci_device_intr_abort(usbd_xfer_handle xfer) 3038 { 3039 if (xfer->pipe->intrxfer == xfer) { 3040 DPRINTF(("ohci_device_intr_abort: remove\n")); 3041 xfer->pipe->intrxfer = NULL; 3042 } 3043 ohci_abort_xfer(xfer, USBD_CANCELLED); 3044 } 3045 3046 /* Close a device interrupt pipe. */ 3047 Static void 3048 ohci_device_intr_close(usbd_pipe_handle pipe) 3049 { 3050 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3051 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3052 int nslots = opipe->u.intr.nslots; 3053 int pos = opipe->u.intr.pos; 3054 int j; 3055 ohci_soft_ed_t *p, *sed = opipe->sed; 3056 int s; 3057 3058 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 3059 pipe, nslots, pos)); 3060 s = splusb(); 3061 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 3062 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 3063 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) 3064 usb_delay_ms(&sc->sc_bus, 2); 3065 3066 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 3067 ; 3068 #ifdef DIAGNOSTIC 3069 if (p == NULL) 3070 panic("ohci_device_intr_close: ED not found"); 3071 #endif 3072 p->next = sed->next; 3073 p->ed.ed_nexted = sed->ed.ed_nexted; 3074 splx(s); 3075 3076 for (j = 0; j < nslots; j++) 3077 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 3078 3079 ohci_free_std(sc, opipe->tail.td); 3080 ohci_free_sed(sc, opipe->sed); 3081 } 3082 3083 Static usbd_status 3084 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival) 3085 { 3086 int i, j, s, best; 3087 u_int npoll, slow, shigh, nslots; 3088 u_int bestbw, bw; 3089 ohci_soft_ed_t *hsed, *sed = opipe->sed; 3090 3091 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 3092 if (ival == 0) { 3093 printf("ohci_setintr: 0 interval\n"); 3094 return (USBD_INVAL); 3095 } 3096 3097 npoll = OHCI_NO_INTRS; 3098 while (npoll > ival) 3099 npoll /= 2; 3100 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 3101 3102 /* 3103 * We now know which level in the tree the ED must go into. 3104 * Figure out which slot has most bandwidth left over. 3105 * Slots to examine: 3106 * npoll 3107 * 1 0 3108 * 2 1 2 3109 * 4 3 4 5 6 3110 * 8 7 8 9 10 11 12 13 14 3111 * N (N-1) .. (N-1+N-1) 3112 */ 3113 slow = npoll-1; 3114 shigh = slow + npoll; 3115 nslots = OHCI_NO_INTRS / npoll; 3116 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 3117 bw = 0; 3118 for (j = 0; j < nslots; j++) 3119 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 3120 if (bw < bestbw) { 3121 best = i; 3122 bestbw = bw; 3123 } 3124 } 3125 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 3126 best, slow, shigh, bestbw)); 3127 3128 s = splusb(); 3129 hsed = sc->sc_eds[best]; 3130 sed->next = hsed->next; 3131 sed->ed.ed_nexted = hsed->ed.ed_nexted; 3132 hsed->next = sed; 3133 hsed->ed.ed_nexted = htole32(sed->physaddr); 3134 splx(s); 3135 3136 for (j = 0; j < nslots; j++) 3137 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 3138 opipe->u.intr.nslots = nslots; 3139 opipe->u.intr.pos = best; 3140 3141 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 3142 return (USBD_NORMAL_COMPLETION); 3143 } 3144 3145 /***********************/ 3146 3147 usbd_status 3148 ohci_device_isoc_transfer(usbd_xfer_handle xfer) 3149 { 3150 usbd_status err; 3151 3152 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer)); 3153 3154 /* Put it on our queue, */ 3155 err = usb_insert_transfer(xfer); 3156 3157 /* bail out on error, */ 3158 if (err && err != USBD_IN_PROGRESS) 3159 return (err); 3160 3161 /* XXX should check inuse here */ 3162 3163 /* insert into schedule, */ 3164 ohci_device_isoc_enter(xfer); 3165 3166 /* and start if the pipe wasn't running */ 3167 if (!err) 3168 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 3169 3170 return (err); 3171 } 3172 3173 void 3174 ohci_device_isoc_enter(usbd_xfer_handle xfer) 3175 { 3176 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3177 usbd_device_handle dev = opipe->pipe.device; 3178 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 3179 ohci_soft_ed_t *sed = opipe->sed; 3180 struct iso *iso = &opipe->u.iso; 3181 ohci_soft_itd_t *sitd, *nsitd; 3182 ohci_physaddr_t buf, offs, noffs, bp0; 3183 int i, ncur, nframes; 3184 int s; 3185 3186 DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p " 3187 "nframes=%d\n", 3188 iso->inuse, iso->next, xfer, xfer->nframes)); 3189 3190 if (sc->sc_dying) 3191 return; 3192 3193 if (iso->next == -1) { 3194 /* Not in use yet, schedule it a few frames ahead. */ 3195 iso->next = le32toh(sc->sc_hcca->hcca_frame_number) + 5; 3196 DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n", 3197 iso->next)); 3198 } 3199 3200 sitd = opipe->tail.itd; 3201 buf = DMAADDR(&xfer->dmabuf, 0); 3202 bp0 = OHCI_PAGE(buf); 3203 offs = OHCI_PAGE_OFFSET(buf); 3204 nframes = xfer->nframes; 3205 xfer->hcpriv = sitd; 3206 for (i = ncur = 0; i < nframes; i++, ncur++) { 3207 noffs = offs + xfer->frlengths[i]; 3208 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ 3209 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */ 3210 3211 /* Allocate next ITD */ 3212 nsitd = ohci_alloc_sitd(sc); 3213 if (nsitd == NULL) { 3214 /* XXX what now? */ 3215 printf("%s: isoc TD alloc failed\n", 3216 USBDEVNAME(sc->sc_bus.bdev)); 3217 return; 3218 } 3219 3220 /* Fill current ITD */ 3221 sitd->itd.itd_flags = htole32( 3222 OHCI_ITD_NOCC | 3223 OHCI_ITD_SET_SF(iso->next) | 3224 OHCI_ITD_SET_DI(6) | /* delay intr a little */ 3225 OHCI_ITD_SET_FC(ncur)); 3226 sitd->itd.itd_bp0 = htole32(bp0); 3227 sitd->nextitd = nsitd; 3228 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 3229 sitd->itd.itd_be = htole32(bp0 + offs - 1); 3230 sitd->xfer = xfer; 3231 sitd->flags = 0; 3232 3233 sitd = nsitd; 3234 iso->next = iso->next + ncur; 3235 bp0 = OHCI_PAGE(buf + offs); 3236 ncur = 0; 3237 } 3238 sitd->itd.itd_offset[ncur] = htole16(OHCI_ITD_MK_OFFS(offs)); 3239 offs = noffs; 3240 } 3241 nsitd = ohci_alloc_sitd(sc); 3242 if (nsitd == NULL) { 3243 /* XXX what now? */ 3244 printf("%s: isoc TD alloc failed\n", 3245 USBDEVNAME(sc->sc_bus.bdev)); 3246 return; 3247 } 3248 /* Fixup last used ITD */ 3249 sitd->itd.itd_flags = htole32( 3250 OHCI_ITD_NOCC | 3251 OHCI_ITD_SET_SF(iso->next) | 3252 OHCI_ITD_SET_DI(0) | 3253 OHCI_ITD_SET_FC(ncur)); 3254 sitd->itd.itd_bp0 = htole32(bp0); 3255 sitd->nextitd = nsitd; 3256 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 3257 sitd->itd.itd_be = htole32(bp0 + offs - 1); 3258 sitd->xfer = xfer; 3259 sitd->flags = OHCI_CALL_DONE; 3260 3261 iso->next = iso->next + ncur; 3262 iso->inuse += nframes; 3263 3264 xfer->actlen = offs; /* XXX pretend we did it all */ 3265 3266 xfer->status = USBD_IN_PROGRESS; 3267 3268 #ifdef OHCI_DEBUG 3269 if (ohcidebug > 5) { 3270 DPRINTF(("ohci_device_isoc_enter: frame=%d\n", 3271 le32toh(sc->sc_hcca->hcca_frame_number))); 3272 ohci_dump_itds(xfer->hcpriv); 3273 ohci_dump_ed(sed); 3274 } 3275 #endif 3276 3277 s = splusb(); 3278 opipe->tail.itd = nsitd; 3279 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 3280 sed->ed.ed_tailp = htole32(nsitd->physaddr); 3281 splx(s); 3282 3283 #ifdef OHCI_DEBUG 3284 if (ohcidebug > 5) { 3285 delay(150000); 3286 DPRINTF(("ohci_device_isoc_enter: after frame=%d\n", 3287 le32toh(sc->sc_hcca->hcca_frame_number))); 3288 ohci_dump_itds(xfer->hcpriv); 3289 ohci_dump_ed(sed); 3290 } 3291 #endif 3292 } 3293 3294 usbd_status 3295 ohci_device_isoc_start(usbd_xfer_handle xfer) 3296 { 3297 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3298 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3299 3300 DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer)); 3301 3302 if (sc->sc_dying) 3303 return (USBD_IOERROR); 3304 3305 #ifdef DIAGNOSTIC 3306 if (xfer->status != USBD_IN_PROGRESS) 3307 printf("ohci_device_isoc_start: not in progress %p\n", xfer); 3308 #endif 3309 3310 /* XXX anything to do? */ 3311 3312 return (USBD_IN_PROGRESS); 3313 } 3314 3315 void 3316 ohci_device_isoc_abort(usbd_xfer_handle xfer) 3317 { 3318 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3319 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3320 ohci_soft_ed_t *sed; 3321 ohci_soft_itd_t *sitd; 3322 int s; 3323 3324 s = splusb(); 3325 3326 DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer)); 3327 3328 /* Transfer is already done. */ 3329 if (xfer->status != USBD_NOT_STARTED && 3330 xfer->status != USBD_IN_PROGRESS) { 3331 splx(s); 3332 printf("ohci_device_isoc_abort: early return\n"); 3333 return; 3334 } 3335 3336 /* Give xfer the requested abort code. */ 3337 xfer->status = USBD_CANCELLED; 3338 3339 sed = opipe->sed; 3340 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 3341 3342 sitd = xfer->hcpriv; 3343 #ifdef DIAGNOSTIC 3344 if (sitd == NULL) { 3345 splx(s); 3346 printf("ohci_device_isoc_abort: hcpriv==0\n"); 3347 return; 3348 } 3349 #endif 3350 for (; sitd->xfer == xfer; sitd = sitd->nextitd) { 3351 #ifdef DIAGNOSTIC 3352 DPRINTFN(1,("abort sets done sitd=%p\n", sitd)); 3353 sitd->isdone = 1; 3354 #endif 3355 } 3356 3357 splx(s); 3358 3359 usb_delay_ms(&sc->sc_bus, OHCI_ITD_NOFFSET); 3360 3361 s = splusb(); 3362 3363 /* Run callback. */ 3364 usb_transfer_complete(xfer); 3365 3366 sed->ed.ed_headp = htole32(sitd->physaddr); /* unlink TDs */ 3367 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 3368 3369 splx(s); 3370 } 3371 3372 void 3373 ohci_device_isoc_done(usbd_xfer_handle xfer) 3374 { 3375 3376 DPRINTFN(1,("ohci_device_isoc_done: xfer=%p\n", xfer)); 3377 3378 xfer->hcpriv = NULL; 3379 } 3380 3381 usbd_status 3382 ohci_setup_isoc(usbd_pipe_handle pipe) 3383 { 3384 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3385 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3386 struct iso *iso = &opipe->u.iso; 3387 int s; 3388 3389 iso->next = -1; 3390 iso->inuse = 0; 3391 3392 s = splusb(); 3393 ohci_add_ed(opipe->sed, sc->sc_isoc_head); 3394 splx(s); 3395 3396 return (USBD_NORMAL_COMPLETION); 3397 } 3398 3399 void 3400 ohci_device_isoc_close(usbd_pipe_handle pipe) 3401 { 3402 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3403 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3404 3405 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe)); 3406 ohci_close_pipe(pipe, sc->sc_isoc_head); 3407 #ifdef DIAGNOSTIC 3408 opipe->tail.itd->isdone = 1; 3409 #endif 3410 ohci_free_sitd(sc, opipe->tail.itd); 3411 } 3412
Indexes created Tue Sep 23 07:09:52 GMT 2025