ohci.c revision 1.144
1 /* $NetBSD: ohci.c,v 1.144 2003/11/23 19:18:06 augustss Exp $ */ 2 /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */ 3 4 /* 5 * Copyright (c) 1998 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Lennart Augustsson (lennart (at) augustsson.net) at 10 * Carlstedt Research & Technology. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. All advertising materials mentioning features or use of this software 21 * must display the following acknowledgement: 22 * This product includes software developed by the NetBSD 23 * Foundation, Inc. and its contributors. 24 * 4. Neither the name of The NetBSD Foundation nor the names of its 25 * contributors may be used to endorse or promote products derived 26 * from this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 29 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 30 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 31 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 32 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 33 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 34 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 35 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 36 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 37 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 * POSSIBILITY OF SUCH DAMAGE. 39 */ 40 41 /* 42 * USB Open Host Controller driver. 43 * 44 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html 45 * USB spec: http://www.usb.org/developers/docs/usbspec.zip 46 */ 47 48 #include <sys/cdefs.h> 49 __KERNEL_RCSID(0, "$NetBSD: ohci.c,v 1.144 2003/11/23 19:18:06 augustss Exp $"); 50 51 #include <sys/param.h> 52 #include <sys/systm.h> 53 #include <sys/malloc.h> 54 #if defined(__NetBSD__) || defined(__OpenBSD__) 55 #include <sys/kernel.h> 56 #include <sys/device.h> 57 #include <sys/select.h> 58 #elif defined(__FreeBSD__) 59 #include <sys/module.h> 60 #include <sys/bus.h> 61 #include <machine/bus_pio.h> 62 #include <machine/bus_memio.h> 63 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 64 #include <machine/cpu.h> 65 #endif 66 #endif 67 #include <sys/proc.h> 68 #include <sys/queue.h> 69 70 #include <machine/bus.h> 71 #include <machine/endian.h> 72 73 #include <dev/usb/usb.h> 74 #include <dev/usb/usbdi.h> 75 #include <dev/usb/usbdivar.h> 76 #include <dev/usb/usb_mem.h> 77 #include <dev/usb/usb_quirks.h> 78 79 #include <dev/usb/ohcireg.h> 80 #include <dev/usb/ohcivar.h> 81 82 #if defined(__FreeBSD__) 83 #include <machine/clock.h> 84 85 #define delay(d) DELAY(d) 86 #endif 87 88 #if defined(__OpenBSD__) 89 struct cfdriver ohci_cd = { 90 NULL, "ohci", DV_DULL 91 }; 92 #endif 93 94 #ifdef OHCI_DEBUG 95 #define DPRINTF(x) if (ohcidebug) logprintf x 96 #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x 97 int ohcidebug = 0; 98 #ifndef __NetBSD__ 99 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 100 #endif 101 #else 102 #define DPRINTF(x) 103 #define DPRINTFN(n,x) 104 #endif 105 106 /* 107 * The OHCI controller is little endian, so on big endian machines 108 * the data strored in memory needs to be swapped. 109 */ 110 #if defined(__FreeBSD__) || defined(__OpenBSD__) 111 #if BYTE_ORDER == BIG_ENDIAN 112 #define htole32(x) (bswap32(x)) 113 #define le32toh(x) (bswap32(x)) 114 #else 115 #define htole32(x) (x) 116 #define le32toh(x) (x) 117 #endif 118 #endif 119 120 struct ohci_pipe; 121 122 Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *); 123 Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *); 124 125 Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *); 126 Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *); 127 128 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *); 129 Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *); 130 131 #if 0 132 Static void ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *, 133 ohci_soft_td_t *); 134 #endif 135 Static usbd_status ohci_alloc_std_chain(struct ohci_pipe *, 136 ohci_softc_t *, int, int, usbd_xfer_handle, 137 ohci_soft_td_t *, ohci_soft_td_t **); 138 139 Static void ohci_shutdown(void *v); 140 Static void ohci_power(int, void *); 141 Static usbd_status ohci_open(usbd_pipe_handle); 142 Static void ohci_poll(struct usbd_bus *); 143 Static void ohci_softintr(void *); 144 Static void ohci_waitintr(ohci_softc_t *, usbd_xfer_handle); 145 Static void ohci_add_done(ohci_softc_t *, ohci_physaddr_t); 146 Static void ohci_rhsc(ohci_softc_t *, usbd_xfer_handle); 147 148 Static usbd_status ohci_device_request(usbd_xfer_handle xfer); 149 Static void ohci_add_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 150 Static void ohci_rem_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 151 Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *); 152 Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *); 153 Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t); 154 Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *); 155 Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *); 156 Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t); 157 158 Static usbd_status ohci_setup_isoc(usbd_pipe_handle pipe); 159 Static void ohci_device_isoc_enter(usbd_xfer_handle); 160 161 Static usbd_status ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 162 Static void ohci_freem(struct usbd_bus *, usb_dma_t *); 163 164 Static usbd_xfer_handle ohci_allocx(struct usbd_bus *); 165 Static void ohci_freex(struct usbd_bus *, usbd_xfer_handle); 166 167 Static usbd_status ohci_root_ctrl_transfer(usbd_xfer_handle); 168 Static usbd_status ohci_root_ctrl_start(usbd_xfer_handle); 169 Static void ohci_root_ctrl_abort(usbd_xfer_handle); 170 Static void ohci_root_ctrl_close(usbd_pipe_handle); 171 Static void ohci_root_ctrl_done(usbd_xfer_handle); 172 173 Static usbd_status ohci_root_intr_transfer(usbd_xfer_handle); 174 Static usbd_status ohci_root_intr_start(usbd_xfer_handle); 175 Static void ohci_root_intr_abort(usbd_xfer_handle); 176 Static void ohci_root_intr_close(usbd_pipe_handle); 177 Static void ohci_root_intr_done(usbd_xfer_handle); 178 179 Static usbd_status ohci_device_ctrl_transfer(usbd_xfer_handle); 180 Static usbd_status ohci_device_ctrl_start(usbd_xfer_handle); 181 Static void ohci_device_ctrl_abort(usbd_xfer_handle); 182 Static void ohci_device_ctrl_close(usbd_pipe_handle); 183 Static void ohci_device_ctrl_done(usbd_xfer_handle); 184 185 Static usbd_status ohci_device_bulk_transfer(usbd_xfer_handle); 186 Static usbd_status ohci_device_bulk_start(usbd_xfer_handle); 187 Static void ohci_device_bulk_abort(usbd_xfer_handle); 188 Static void ohci_device_bulk_close(usbd_pipe_handle); 189 Static void ohci_device_bulk_done(usbd_xfer_handle); 190 191 Static usbd_status ohci_device_intr_transfer(usbd_xfer_handle); 192 Static usbd_status ohci_device_intr_start(usbd_xfer_handle); 193 Static void ohci_device_intr_abort(usbd_xfer_handle); 194 Static void ohci_device_intr_close(usbd_pipe_handle); 195 Static void ohci_device_intr_done(usbd_xfer_handle); 196 197 Static usbd_status ohci_device_isoc_transfer(usbd_xfer_handle); 198 Static usbd_status ohci_device_isoc_start(usbd_xfer_handle); 199 Static void ohci_device_isoc_abort(usbd_xfer_handle); 200 Static void ohci_device_isoc_close(usbd_pipe_handle); 201 Static void ohci_device_isoc_done(usbd_xfer_handle); 202 203 Static usbd_status ohci_device_setintr(ohci_softc_t *sc, 204 struct ohci_pipe *pipe, int ival); 205 206 Static int ohci_str(usb_string_descriptor_t *, int, const char *); 207 208 Static void ohci_timeout(void *); 209 Static void ohci_timeout_task(void *); 210 Static void ohci_rhsc_able(ohci_softc_t *, int); 211 Static void ohci_rhsc_enable(void *); 212 213 Static void ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *); 214 Static void ohci_abort_xfer(usbd_xfer_handle, usbd_status); 215 216 Static void ohci_device_clear_toggle(usbd_pipe_handle pipe); 217 Static void ohci_noop(usbd_pipe_handle pipe); 218 219 #ifdef OHCI_DEBUG 220 Static void ohci_dumpregs(ohci_softc_t *); 221 Static void ohci_dump_tds(ohci_soft_td_t *); 222 Static void ohci_dump_td(ohci_soft_td_t *); 223 Static void ohci_dump_ed(ohci_soft_ed_t *); 224 Static void ohci_dump_itd(ohci_soft_itd_t *); 225 Static void ohci_dump_itds(ohci_soft_itd_t *); 226 #endif 227 228 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 229 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 230 #define OWRITE1(sc, r, x) \ 231 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 232 #define OWRITE2(sc, r, x) \ 233 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 234 #define OWRITE4(sc, r, x) \ 235 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 236 #define OREAD1(sc, r) (OBARR(sc), bus_space_read_1((sc)->iot, (sc)->ioh, (r))) 237 #define OREAD2(sc, r) (OBARR(sc), bus_space_read_2((sc)->iot, (sc)->ioh, (r))) 238 #define OREAD4(sc, r) (OBARR(sc), bus_space_read_4((sc)->iot, (sc)->ioh, (r))) 239 240 /* Reverse the bits in a value 0 .. 31 */ 241 Static u_int8_t revbits[OHCI_NO_INTRS] = 242 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 243 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 244 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 245 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 246 247 struct ohci_pipe { 248 struct usbd_pipe pipe; 249 ohci_soft_ed_t *sed; 250 union { 251 ohci_soft_td_t *td; 252 ohci_soft_itd_t *itd; 253 } tail; 254 /* Info needed for different pipe kinds. */ 255 union { 256 /* Control pipe */ 257 struct { 258 usb_dma_t reqdma; 259 u_int length; 260 ohci_soft_td_t *setup, *data, *stat; 261 } ctl; 262 /* Interrupt pipe */ 263 struct { 264 int nslots; 265 int pos; 266 } intr; 267 /* Bulk pipe */ 268 struct { 269 u_int length; 270 int isread; 271 } bulk; 272 /* Iso pipe */ 273 struct iso { 274 int next, inuse; 275 } iso; 276 } u; 277 }; 278 279 #define OHCI_INTR_ENDPT 1 280 281 Static struct usbd_bus_methods ohci_bus_methods = { 282 ohci_open, 283 ohci_softintr, 284 ohci_poll, 285 ohci_allocm, 286 ohci_freem, 287 ohci_allocx, 288 ohci_freex, 289 }; 290 291 Static struct usbd_pipe_methods ohci_root_ctrl_methods = { 292 ohci_root_ctrl_transfer, 293 ohci_root_ctrl_start, 294 ohci_root_ctrl_abort, 295 ohci_root_ctrl_close, 296 ohci_noop, 297 ohci_root_ctrl_done, 298 }; 299 300 Static struct usbd_pipe_methods ohci_root_intr_methods = { 301 ohci_root_intr_transfer, 302 ohci_root_intr_start, 303 ohci_root_intr_abort, 304 ohci_root_intr_close, 305 ohci_noop, 306 ohci_root_intr_done, 307 }; 308 309 Static struct usbd_pipe_methods ohci_device_ctrl_methods = { 310 ohci_device_ctrl_transfer, 311 ohci_device_ctrl_start, 312 ohci_device_ctrl_abort, 313 ohci_device_ctrl_close, 314 ohci_noop, 315 ohci_device_ctrl_done, 316 }; 317 318 Static struct usbd_pipe_methods ohci_device_intr_methods = { 319 ohci_device_intr_transfer, 320 ohci_device_intr_start, 321 ohci_device_intr_abort, 322 ohci_device_intr_close, 323 ohci_device_clear_toggle, 324 ohci_device_intr_done, 325 }; 326 327 Static struct usbd_pipe_methods ohci_device_bulk_methods = { 328 ohci_device_bulk_transfer, 329 ohci_device_bulk_start, 330 ohci_device_bulk_abort, 331 ohci_device_bulk_close, 332 ohci_device_clear_toggle, 333 ohci_device_bulk_done, 334 }; 335 336 Static struct usbd_pipe_methods ohci_device_isoc_methods = { 337 ohci_device_isoc_transfer, 338 ohci_device_isoc_start, 339 ohci_device_isoc_abort, 340 ohci_device_isoc_close, 341 ohci_noop, 342 ohci_device_isoc_done, 343 }; 344 345 #if defined(__NetBSD__) || defined(__OpenBSD__) 346 int 347 ohci_activate(device_ptr_t self, enum devact act) 348 { 349 struct ohci_softc *sc = (struct ohci_softc *)self; 350 int rv = 0; 351 352 switch (act) { 353 case DVACT_ACTIVATE: 354 return (EOPNOTSUPP); 355 356 case DVACT_DEACTIVATE: 357 if (sc->sc_child != NULL) 358 rv = config_deactivate(sc->sc_child); 359 sc->sc_dying = 1; 360 break; 361 } 362 return (rv); 363 } 364 365 int 366 ohci_detach(struct ohci_softc *sc, int flags) 367 { 368 int rv = 0; 369 370 if (sc->sc_child != NULL) 371 rv = config_detach(sc->sc_child, flags); 372 373 if (rv != 0) 374 return (rv); 375 376 usb_uncallout(sc->sc_tmo_rhsc, ohci_rhsc_enable, sc); 377 378 #if defined(__NetBSD__) || defined(__OpenBSD__) 379 powerhook_disestablish(sc->sc_powerhook); 380 shutdownhook_disestablish(sc->sc_shutdownhook); 381 #endif 382 383 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 384 385 /* free data structures XXX */ 386 387 return (rv); 388 } 389 #endif 390 391 ohci_soft_ed_t * 392 ohci_alloc_sed(ohci_softc_t *sc) 393 { 394 ohci_soft_ed_t *sed; 395 usbd_status err; 396 int i, offs; 397 usb_dma_t dma; 398 399 if (sc->sc_freeeds == NULL) { 400 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 401 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 402 OHCI_ED_ALIGN, &dma); 403 if (err) 404 return (0); 405 for(i = 0; i < OHCI_SED_CHUNK; i++) { 406 offs = i * OHCI_SED_SIZE; 407 sed = KERNADDR(&dma, offs); 408 sed->physaddr = DMAADDR(&dma, offs); 409 sed->next = sc->sc_freeeds; 410 sc->sc_freeeds = sed; 411 } 412 } 413 sed = sc->sc_freeeds; 414 sc->sc_freeeds = sed->next; 415 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 416 sed->next = 0; 417 return (sed); 418 } 419 420 void 421 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 422 { 423 sed->next = sc->sc_freeeds; 424 sc->sc_freeeds = sed; 425 } 426 427 ohci_soft_td_t * 428 ohci_alloc_std(ohci_softc_t *sc) 429 { 430 ohci_soft_td_t *std; 431 usbd_status err; 432 int i, offs; 433 usb_dma_t dma; 434 int s; 435 436 if (sc->sc_freetds == NULL) { 437 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 438 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 439 OHCI_TD_ALIGN, &dma); 440 if (err) 441 return (NULL); 442 s = splusb(); 443 for(i = 0; i < OHCI_STD_CHUNK; i++) { 444 offs = i * OHCI_STD_SIZE; 445 std = KERNADDR(&dma, offs); 446 std->physaddr = DMAADDR(&dma, offs); 447 std->nexttd = sc->sc_freetds; 448 sc->sc_freetds = std; 449 } 450 splx(s); 451 } 452 453 s = splusb(); 454 std = sc->sc_freetds; 455 sc->sc_freetds = std->nexttd; 456 memset(&std->td, 0, sizeof(ohci_td_t)); 457 std->nexttd = NULL; 458 std->xfer = NULL; 459 ohci_hash_add_td(sc, std); 460 splx(s); 461 462 return (std); 463 } 464 465 void 466 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std) 467 { 468 int s; 469 470 s = splusb(); 471 ohci_hash_rem_td(sc, std); 472 std->nexttd = sc->sc_freetds; 473 sc->sc_freetds = std; 474 splx(s); 475 } 476 477 usbd_status 478 ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc, 479 int alen, int rd, usbd_xfer_handle xfer, 480 ohci_soft_td_t *sp, ohci_soft_td_t **ep) 481 { 482 ohci_soft_td_t *next, *cur; 483 ohci_physaddr_t dataphys, dataphysend; 484 u_int32_t tdflags; 485 int len, curlen; 486 usb_dma_t *dma = &xfer->dmabuf; 487 u_int16_t flags = xfer->flags; 488 489 DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen)); 490 491 len = alen; 492 cur = sp; 493 dataphys = DMAADDR(dma, 0); 494 dataphysend = OHCI_PAGE(dataphys + len - 1); 495 tdflags = htole32( 496 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 497 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) | 498 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR); 499 500 for (;;) { 501 next = ohci_alloc_std(sc); 502 if (next == NULL) 503 goto nomem; 504 505 /* The OHCI hardware can handle at most one page crossing. */ 506 if (OHCI_PAGE(dataphys) == dataphysend || 507 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) { 508 /* we can handle it in this TD */ 509 curlen = len; 510 } else { 511 /* must use multiple TDs, fill as much as possible. */ 512 curlen = 2 * OHCI_PAGE_SIZE - 513 (dataphys & (OHCI_PAGE_SIZE-1)); 514 /* the length must be a multiple of the max size */ 515 curlen -= curlen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize); 516 #ifdef DIAGNOSTIC 517 if (curlen == 0) 518 panic("ohci_alloc_std: curlen == 0"); 519 #endif 520 } 521 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x " 522 "dataphysend=0x%08x len=%d curlen=%d\n", 523 dataphys, dataphysend, 524 len, curlen)); 525 len -= curlen; 526 527 cur->td.td_flags = tdflags; 528 cur->td.td_cbp = htole32(dataphys); 529 cur->nexttd = next; 530 cur->td.td_nexttd = htole32(next->physaddr); 531 cur->td.td_be = htole32(dataphys + curlen - 1); 532 cur->len = curlen; 533 cur->flags = OHCI_ADD_LEN; 534 cur->xfer = xfer; 535 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n", 536 dataphys, dataphys + curlen - 1)); 537 if (len == 0) 538 break; 539 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n")); 540 dataphys += curlen; 541 cur = next; 542 } 543 if ((flags & USBD_FORCE_SHORT_XFER) && 544 alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) { 545 /* Force a 0 length transfer at the end. */ 546 547 cur = next; 548 next = ohci_alloc_std(sc); 549 if (next == NULL) 550 goto nomem; 551 552 cur->td.td_flags = tdflags; 553 cur->td.td_cbp = 0; /* indicate 0 length packet */ 554 cur->nexttd = next; 555 cur->td.td_nexttd = htole32(next->physaddr); 556 cur->td.td_be = ~0; 557 cur->len = 0; 558 cur->flags = 0; 559 cur->xfer = xfer; 560 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n")); 561 } 562 *ep = cur; 563 564 return (USBD_NORMAL_COMPLETION); 565 566 nomem: 567 /* XXX free chain */ 568 return (USBD_NOMEM); 569 } 570 571 #if 0 572 Static void 573 ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std, 574 ohci_soft_td_t *stdend) 575 { 576 ohci_soft_td_t *p; 577 578 for (; std != stdend; std = p) { 579 p = std->nexttd; 580 ohci_free_std(sc, std); 581 } 582 } 583 #endif 584 585 ohci_soft_itd_t * 586 ohci_alloc_sitd(ohci_softc_t *sc) 587 { 588 ohci_soft_itd_t *sitd; 589 usbd_status err; 590 int i, s, offs; 591 usb_dma_t dma; 592 593 if (sc->sc_freeitds == NULL) { 594 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n")); 595 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK, 596 OHCI_ITD_ALIGN, &dma); 597 if (err) 598 return (NULL); 599 s = splusb(); 600 for(i = 0; i < OHCI_SITD_CHUNK; i++) { 601 offs = i * OHCI_SITD_SIZE; 602 sitd = KERNADDR(&dma, offs); 603 sitd->physaddr = DMAADDR(&dma, offs); 604 sitd->nextitd = sc->sc_freeitds; 605 sc->sc_freeitds = sitd; 606 } 607 splx(s); 608 } 609 610 s = splusb(); 611 sitd = sc->sc_freeitds; 612 sc->sc_freeitds = sitd->nextitd; 613 memset(&sitd->itd, 0, sizeof(ohci_itd_t)); 614 sitd->nextitd = NULL; 615 sitd->xfer = NULL; 616 ohci_hash_add_itd(sc, sitd); 617 splx(s); 618 619 #ifdef DIAGNOSTIC 620 sitd->isdone = 0; 621 #endif 622 623 return (sitd); 624 } 625 626 void 627 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 628 { 629 int s; 630 631 DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd)); 632 633 #ifdef DIAGNOSTIC 634 if (!sitd->isdone) { 635 panic("ohci_free_sitd: sitd=%p not done", sitd); 636 return; 637 } 638 /* Warn double free */ 639 sitd->isdone = 0; 640 #endif 641 642 s = splusb(); 643 ohci_hash_rem_itd(sc, sitd); 644 sitd->nextitd = sc->sc_freeitds; 645 sc->sc_freeitds = sitd; 646 splx(s); 647 } 648 649 usbd_status 650 ohci_init(ohci_softc_t *sc) 651 { 652 ohci_soft_ed_t *sed, *psed; 653 usbd_status err; 654 int i; 655 u_int32_t s, ctl, ival, hcr, fm, per, rev, desca; 656 657 DPRINTF(("ohci_init: start\n")); 658 #if defined(__OpenBSD__) 659 printf(","); 660 #else 661 printf("%s:", USBDEVNAME(sc->sc_bus.bdev)); 662 #endif 663 rev = OREAD4(sc, OHCI_REVISION); 664 printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev), 665 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 666 667 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 668 printf("%s: unsupported OHCI revision\n", 669 USBDEVNAME(sc->sc_bus.bdev)); 670 sc->sc_bus.usbrev = USBREV_UNKNOWN; 671 return (USBD_INVAL); 672 } 673 sc->sc_bus.usbrev = USBREV_1_0; 674 675 for (i = 0; i < OHCI_HASH_SIZE; i++) 676 LIST_INIT(&sc->sc_hash_tds[i]); 677 for (i = 0; i < OHCI_HASH_SIZE; i++) 678 LIST_INIT(&sc->sc_hash_itds[i]); 679 680 SIMPLEQ_INIT(&sc->sc_free_xfers); 681 682 /* XXX determine alignment by R/W */ 683 /* Allocate the HCCA area. */ 684 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 685 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 686 if (err) 687 return (err); 688 sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0); 689 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 690 691 sc->sc_eintrs = OHCI_NORMAL_INTRS; 692 693 /* Allocate dummy ED that starts the control list. */ 694 sc->sc_ctrl_head = ohci_alloc_sed(sc); 695 if (sc->sc_ctrl_head == NULL) { 696 err = USBD_NOMEM; 697 goto bad1; 698 } 699 sc->sc_ctrl_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 700 701 /* Allocate dummy ED that starts the bulk list. */ 702 sc->sc_bulk_head = ohci_alloc_sed(sc); 703 if (sc->sc_bulk_head == NULL) { 704 err = USBD_NOMEM; 705 goto bad2; 706 } 707 sc->sc_bulk_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 708 709 /* Allocate dummy ED that starts the isochronous list. */ 710 sc->sc_isoc_head = ohci_alloc_sed(sc); 711 if (sc->sc_isoc_head == NULL) { 712 err = USBD_NOMEM; 713 goto bad3; 714 } 715 sc->sc_isoc_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 716 717 /* Allocate all the dummy EDs that make up the interrupt tree. */ 718 for (i = 0; i < OHCI_NO_EDS; i++) { 719 sed = ohci_alloc_sed(sc); 720 if (sed == NULL) { 721 while (--i >= 0) 722 ohci_free_sed(sc, sc->sc_eds[i]); 723 err = USBD_NOMEM; 724 goto bad4; 725 } 726 /* All ED fields are set to 0. */ 727 sc->sc_eds[i] = sed; 728 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 729 if (i != 0) 730 psed = sc->sc_eds[(i-1) / 2]; 731 else 732 psed= sc->sc_isoc_head; 733 sed->next = psed; 734 sed->ed.ed_nexted = htole32(psed->physaddr); 735 } 736 /* 737 * Fill HCCA interrupt table. The bit reversal is to get 738 * the tree set up properly to spread the interrupts. 739 */ 740 for (i = 0; i < OHCI_NO_INTRS; i++) 741 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 742 htole32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 743 744 #ifdef OHCI_DEBUG 745 if (ohcidebug > 15) { 746 for (i = 0; i < OHCI_NO_EDS; i++) { 747 printf("ed#%d ", i); 748 ohci_dump_ed(sc->sc_eds[i]); 749 } 750 printf("iso "); 751 ohci_dump_ed(sc->sc_isoc_head); 752 } 753 #endif 754 755 /* Determine in what context we are running. */ 756 ctl = OREAD4(sc, OHCI_CONTROL); 757 if (ctl & OHCI_IR) { 758 /* SMM active, request change */ 759 DPRINTF(("ohci_init: SMM active, request owner change\n")); 760 s = OREAD4(sc, OHCI_COMMAND_STATUS); 761 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 762 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 763 usb_delay_ms(&sc->sc_bus, 1); 764 ctl = OREAD4(sc, OHCI_CONTROL); 765 } 766 if ((ctl & OHCI_IR) == 0) { 767 printf("%s: SMM does not respond, resetting\n", 768 USBDEVNAME(sc->sc_bus.bdev)); 769 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 770 goto reset; 771 } 772 #if 0 773 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */ 774 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 775 /* BIOS started controller. */ 776 DPRINTF(("ohci_init: BIOS active\n")); 777 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 778 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL); 779 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 780 } 781 #endif 782 } else { 783 DPRINTF(("ohci_init: cold started\n")); 784 reset: 785 /* Controller was cold started. */ 786 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 787 } 788 789 /* 790 * This reset should not be necessary according to the OHCI spec, but 791 * without it some controllers do not start. 792 */ 793 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 794 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 795 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 796 797 /* We now own the host controller and the bus has been reset. */ 798 ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL)); 799 800 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 801 /* Nominal time for a reset is 10 us. */ 802 for (i = 0; i < 10; i++) { 803 delay(10); 804 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 805 if (!hcr) 806 break; 807 } 808 if (hcr) { 809 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 810 err = USBD_IOERROR; 811 goto bad5; 812 } 813 #ifdef OHCI_DEBUG 814 if (ohcidebug > 15) 815 ohci_dumpregs(sc); 816 #endif 817 818 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 819 820 /* Set up HC registers. */ 821 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 822 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 823 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 824 /* disable all interrupts and then switch on all desired interrupts */ 825 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 826 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 827 /* switch on desired functional features */ 828 ctl = OREAD4(sc, OHCI_CONTROL); 829 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 830 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 831 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL; 832 /* And finally start it! */ 833 OWRITE4(sc, OHCI_CONTROL, ctl); 834 835 /* 836 * The controller is now OPERATIONAL. Set a some final 837 * registers that should be set earlier, but that the 838 * controller ignores when in the SUSPEND state. 839 */ 840 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 841 fm |= OHCI_FSMPS(ival) | ival; 842 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 843 per = OHCI_PERIODIC(ival); /* 90% periodic */ 844 OWRITE4(sc, OHCI_PERIODIC_START, per); 845 846 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */ 847 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 848 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP); 849 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 850 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY); 851 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca); 852 853 /* 854 * The AMD756 requires a delay before re-reading the register, 855 * otherwise it will occasionally report 0 ports. 856 */ 857 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY); 858 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 859 860 #ifdef OHCI_DEBUG 861 if (ohcidebug > 5) 862 ohci_dumpregs(sc); 863 #endif 864 865 /* Set up the bus struct. */ 866 sc->sc_bus.methods = &ohci_bus_methods; 867 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 868 869 #if defined(__NetBSD__) || defined(__OpenBSD__) 870 sc->sc_control = sc->sc_intre = 0; 871 sc->sc_powerhook = powerhook_establish(ohci_power, sc); 872 sc->sc_shutdownhook = shutdownhook_establish(ohci_shutdown, sc); 873 #endif 874 875 usb_callout_init(sc->sc_tmo_rhsc); 876 877 return (USBD_NORMAL_COMPLETION); 878 879 bad5: 880 for (i = 0; i < OHCI_NO_EDS; i++) 881 ohci_free_sed(sc, sc->sc_eds[i]); 882 bad4: 883 ohci_free_sed(sc, sc->sc_isoc_head); 884 bad3: 885 ohci_free_sed(sc, sc->sc_bulk_head); 886 bad2: 887 ohci_free_sed(sc, sc->sc_ctrl_head); 888 bad1: 889 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 890 return (err); 891 } 892 893 usbd_status 894 ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 895 { 896 #if defined(__NetBSD__) || defined(__OpenBSD__) 897 struct ohci_softc *sc = (struct ohci_softc *)bus; 898 #endif 899 900 return (usb_allocmem(&sc->sc_bus, size, 0, dma)); 901 } 902 903 void 904 ohci_freem(struct usbd_bus *bus, usb_dma_t *dma) 905 { 906 #if defined(__NetBSD__) || defined(__OpenBSD__) 907 struct ohci_softc *sc = (struct ohci_softc *)bus; 908 #endif 909 910 usb_freemem(&sc->sc_bus, dma); 911 } 912 913 usbd_xfer_handle 914 ohci_allocx(struct usbd_bus *bus) 915 { 916 struct ohci_softc *sc = (struct ohci_softc *)bus; 917 usbd_xfer_handle xfer; 918 919 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 920 if (xfer != NULL) { 921 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 922 #ifdef DIAGNOSTIC 923 if (xfer->busy_free != XFER_FREE) { 924 printf("ohci_allocx: xfer=%p not free, 0x%08x\n", xfer, 925 xfer->busy_free); 926 } 927 #endif 928 } else { 929 xfer = malloc(sizeof(struct ohci_xfer), M_USB, M_NOWAIT); 930 } 931 if (xfer != NULL) { 932 memset(xfer, 0, sizeof (struct ohci_xfer)); 933 #ifdef DIAGNOSTIC 934 xfer->busy_free = XFER_BUSY; 935 #endif 936 } 937 return (xfer); 938 } 939 940 void 941 ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 942 { 943 struct ohci_softc *sc = (struct ohci_softc *)bus; 944 945 #ifdef DIAGNOSTIC 946 if (xfer->busy_free != XFER_BUSY) { 947 printf("ohci_freex: xfer=%p not busy, 0x%08x\n", xfer, 948 xfer->busy_free); 949 return; 950 } 951 xfer->busy_free = XFER_FREE; 952 #endif 953 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 954 } 955 956 /* 957 * Shut down the controller when the system is going down. 958 */ 959 void 960 ohci_shutdown(void *v) 961 { 962 ohci_softc_t *sc = v; 963 964 DPRINTF(("ohci_shutdown: stopping the HC\n")); 965 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 966 } 967 968 /* 969 * Handle suspend/resume. 970 * 971 * We need to switch to polling mode here, because this routine is 972 * called from an intterupt context. This is all right since we 973 * are almost suspended anyway. 974 */ 975 void 976 ohci_power(int why, void *v) 977 { 978 ohci_softc_t *sc = v; 979 u_int32_t ctl; 980 int s; 981 982 #ifdef OHCI_DEBUG 983 DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why)); 984 ohci_dumpregs(sc); 985 #endif 986 987 s = splhardusb(); 988 switch (why) { 989 case PWR_SUSPEND: 990 case PWR_STANDBY: 991 sc->sc_bus.use_polling++; 992 ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK; 993 if (sc->sc_control == 0) { 994 /* 995 * Preserve register values, in case that APM BIOS 996 * does not recover them. 997 */ 998 sc->sc_control = ctl; 999 sc->sc_intre = OREAD4(sc, OHCI_INTERRUPT_ENABLE); 1000 } 1001 ctl |= OHCI_HCFS_SUSPEND; 1002 OWRITE4(sc, OHCI_CONTROL, ctl); 1003 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1004 sc->sc_bus.use_polling--; 1005 break; 1006 case PWR_RESUME: 1007 sc->sc_bus.use_polling++; 1008 /* Some broken BIOSes do not recover these values */ 1009 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 1010 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 1011 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 1012 if (sc->sc_intre) 1013 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, 1014 sc->sc_intre & (OHCI_ALL_INTRS | OHCI_MIE)); 1015 if (sc->sc_control) 1016 ctl = sc->sc_control; 1017 else 1018 ctl = OREAD4(sc, OHCI_CONTROL); 1019 ctl |= OHCI_HCFS_RESUME; 1020 OWRITE4(sc, OHCI_CONTROL, ctl); 1021 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 1022 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL; 1023 OWRITE4(sc, OHCI_CONTROL, ctl); 1024 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 1025 sc->sc_control = sc->sc_intre = 0; 1026 sc->sc_bus.use_polling--; 1027 break; 1028 case PWR_SOFTSUSPEND: 1029 case PWR_SOFTSTANDBY: 1030 case PWR_SOFTRESUME: 1031 break; 1032 } 1033 splx(s); 1034 } 1035 1036 #ifdef OHCI_DEBUG 1037 void 1038 ohci_dumpregs(ohci_softc_t *sc) 1039 { 1040 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 1041 OREAD4(sc, OHCI_REVISION), 1042 OREAD4(sc, OHCI_CONTROL), 1043 OREAD4(sc, OHCI_COMMAND_STATUS))); 1044 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 1045 OREAD4(sc, OHCI_INTERRUPT_STATUS), 1046 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 1047 OREAD4(sc, OHCI_INTERRUPT_DISABLE))); 1048 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 1049 OREAD4(sc, OHCI_HCCA), 1050 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 1051 OREAD4(sc, OHCI_CONTROL_HEAD_ED))); 1052 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 1053 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 1054 OREAD4(sc, OHCI_BULK_HEAD_ED), 1055 OREAD4(sc, OHCI_BULK_CURRENT_ED))); 1056 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 1057 OREAD4(sc, OHCI_DONE_HEAD), 1058 OREAD4(sc, OHCI_FM_INTERVAL), 1059 OREAD4(sc, OHCI_FM_REMAINING))); 1060 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 1061 OREAD4(sc, OHCI_FM_NUMBER), 1062 OREAD4(sc, OHCI_PERIODIC_START), 1063 OREAD4(sc, OHCI_LS_THRESHOLD))); 1064 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n", 1065 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 1066 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 1067 OREAD4(sc, OHCI_RH_STATUS))); 1068 DPRINTF((" port1=0x%08x port2=0x%08x\n", 1069 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 1070 OREAD4(sc, OHCI_RH_PORT_STATUS(2)))); 1071 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n", 1072 le32toh(sc->sc_hcca->hcca_frame_number), 1073 le32toh(sc->sc_hcca->hcca_done_head))); 1074 } 1075 #endif 1076 1077 Static int ohci_intr1(ohci_softc_t *); 1078 1079 int 1080 ohci_intr(void *p) 1081 { 1082 ohci_softc_t *sc = p; 1083 1084 if (sc == NULL || sc->sc_dying) 1085 return (0); 1086 1087 /* If we get an interrupt while polling, then just ignore it. */ 1088 if (sc->sc_bus.use_polling) { 1089 #ifdef DIAGNOSTIC 1090 printf("ohci_intr: ignored interrupt while polling\n"); 1091 #endif 1092 return (0); 1093 } 1094 1095 return (ohci_intr1(sc)); 1096 } 1097 1098 Static int 1099 ohci_intr1(ohci_softc_t *sc) 1100 { 1101 u_int32_t intrs, eintrs; 1102 ohci_physaddr_t done; 1103 1104 DPRINTFN(14,("ohci_intr1: enter\n")); 1105 1106 /* In case the interrupt occurs before initialization has completed. */ 1107 if (sc == NULL || sc->sc_hcca == NULL) { 1108 #ifdef DIAGNOSTIC 1109 printf("ohci_intr: sc->sc_hcca == NULL\n"); 1110 #endif 1111 return (0); 1112 } 1113 1114 intrs = 0; 1115 done = le32toh(sc->sc_hcca->hcca_done_head); 1116 if (done != 0) { 1117 if (done & ~OHCI_DONE_INTRS) 1118 intrs = OHCI_WDH; 1119 if (done & OHCI_DONE_INTRS) 1120 intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS); 1121 sc->sc_hcca->hcca_done_head = 0; 1122 } else 1123 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & ~OHCI_WDH; 1124 1125 if (!intrs) 1126 return (0); 1127 1128 intrs &= ~OHCI_MIE; 1129 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */ 1130 eintrs = intrs & sc->sc_eintrs; 1131 if (!eintrs) 1132 return (0); 1133 1134 sc->sc_bus.intr_context++; 1135 sc->sc_bus.no_intrs++; 1136 DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 1137 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 1138 (u_int)eintrs)); 1139 1140 if (eintrs & OHCI_SO) { 1141 sc->sc_overrun_cnt++; 1142 if (usbd_ratecheck(&sc->sc_overrun_ntc)) { 1143 printf("%s: %u scheduling overruns\n", 1144 USBDEVNAME(sc->sc_bus.bdev), sc->sc_overrun_cnt); 1145 sc->sc_overrun_cnt = 0; 1146 } 1147 /* XXX do what */ 1148 eintrs &= ~OHCI_SO; 1149 } 1150 if (eintrs & OHCI_WDH) { 1151 ohci_add_done(sc, done &~ OHCI_DONE_INTRS); 1152 usb_schedsoftintr(&sc->sc_bus); 1153 eintrs &= ~OHCI_WDH; 1154 } 1155 if (eintrs & OHCI_RD) { 1156 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev)); 1157 /* XXX process resume detect */ 1158 } 1159 if (eintrs & OHCI_UE) { 1160 printf("%s: unrecoverable error, controller halted\n", 1161 USBDEVNAME(sc->sc_bus.bdev)); 1162 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1163 /* XXX what else */ 1164 } 1165 if (eintrs & OHCI_RHSC) { 1166 ohci_rhsc(sc, sc->sc_intrxfer); 1167 /* 1168 * Disable RHSC interrupt for now, because it will be 1169 * on until the port has been reset. 1170 */ 1171 ohci_rhsc_able(sc, 0); 1172 /* Do not allow RHSC interrupts > 1 per second */ 1173 usb_callout(sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc); 1174 eintrs &= ~OHCI_RHSC; 1175 } 1176 1177 sc->sc_bus.intr_context--; 1178 1179 if (eintrs != 0) { 1180 /* Block unprocessed interrupts. XXX */ 1181 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs); 1182 sc->sc_eintrs &= ~eintrs; 1183 printf("%s: blocking intrs 0x%x\n", 1184 USBDEVNAME(sc->sc_bus.bdev), eintrs); 1185 } 1186 1187 return (1); 1188 } 1189 1190 void 1191 ohci_rhsc_able(ohci_softc_t *sc, int on) 1192 { 1193 DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on)); 1194 if (on) { 1195 sc->sc_eintrs |= OHCI_RHSC; 1196 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1197 } else { 1198 sc->sc_eintrs &= ~OHCI_RHSC; 1199 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC); 1200 } 1201 } 1202 1203 void 1204 ohci_rhsc_enable(void *v_sc) 1205 { 1206 ohci_softc_t *sc = v_sc; 1207 int s; 1208 1209 s = splhardusb(); 1210 ohci_rhsc_able(sc, 1); 1211 splx(s); 1212 } 1213 1214 #ifdef OHCI_DEBUG 1215 char *ohci_cc_strs[] = { 1216 "NO_ERROR", 1217 "CRC", 1218 "BIT_STUFFING", 1219 "DATA_TOGGLE_MISMATCH", 1220 "STALL", 1221 "DEVICE_NOT_RESPONDING", 1222 "PID_CHECK_FAILURE", 1223 "UNEXPECTED_PID", 1224 "DATA_OVERRUN", 1225 "DATA_UNDERRUN", 1226 "BUFFER_OVERRUN", 1227 "BUFFER_UNDERRUN", 1228 "reserved", 1229 "reserved", 1230 "NOT_ACCESSED", 1231 "NOT_ACCESSED", 1232 }; 1233 #endif 1234 1235 void 1236 ohci_add_done(ohci_softc_t *sc, ohci_physaddr_t done) 1237 { 1238 ohci_soft_itd_t *sitd, *sidone, **ip; 1239 ohci_soft_td_t *std, *sdone, **p; 1240 1241 /* Reverse the done list. */ 1242 for (sdone = NULL, sidone = NULL; done != 0; ) { 1243 std = ohci_hash_find_td(sc, done); 1244 if (std != NULL) { 1245 std->dnext = sdone; 1246 done = le32toh(std->td.td_nexttd); 1247 sdone = std; 1248 DPRINTFN(10,("add TD %p\n", std)); 1249 continue; 1250 } 1251 sitd = ohci_hash_find_itd(sc, done); 1252 if (sitd != NULL) { 1253 sitd->dnext = sidone; 1254 done = le32toh(sitd->itd.itd_nextitd); 1255 sidone = sitd; 1256 DPRINTFN(5,("add ITD %p\n", sitd)); 1257 continue; 1258 } 1259 panic("ohci_add_done: addr 0x%08lx not found", (u_long)done); 1260 } 1261 1262 /* sdone & sidone now hold the done lists. */ 1263 /* Put them on the already processed lists. */ 1264 for (p = &sc->sc_sdone; *p != NULL; p = &(*p)->dnext) 1265 ; 1266 *p = sdone; 1267 for (ip = &sc->sc_sidone; *ip != NULL; ip = &(*ip)->dnext) 1268 ; 1269 *ip = sidone; 1270 } 1271 1272 void 1273 ohci_softintr(void *v) 1274 { 1275 ohci_softc_t *sc = v; 1276 ohci_soft_itd_t *sitd, *sidone, *sitdnext; 1277 ohci_soft_td_t *std, *sdone, *stdnext; 1278 usbd_xfer_handle xfer; 1279 struct ohci_pipe *opipe; 1280 int len, cc, s; 1281 int i, j, actlen, iframes, uedir; 1282 1283 DPRINTFN(10,("ohci_softintr: enter\n")); 1284 1285 sc->sc_bus.intr_context++; 1286 1287 s = splhardusb(); 1288 sdone = sc->sc_sdone; 1289 sc->sc_sdone = NULL; 1290 sidone = sc->sc_sidone; 1291 sc->sc_sidone = NULL; 1292 splx(s); 1293 1294 DPRINTFN(10,("ohci_softintr: sdone=%p sidone=%p\n", sdone, sidone)); 1295 1296 #ifdef OHCI_DEBUG 1297 if (ohcidebug > 10) { 1298 DPRINTF(("ohci_process_done: TD done:\n")); 1299 ohci_dump_tds(sdone); 1300 } 1301 #endif 1302 1303 for (std = sdone; std; std = stdnext) { 1304 xfer = std->xfer; 1305 stdnext = std->dnext; 1306 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n", 1307 std, xfer, xfer ? xfer->hcpriv : 0)); 1308 if (xfer == NULL) { 1309 /* 1310 * xfer == NULL: There seems to be no xfer associated 1311 * with this TD. It is tailp that happened to end up on 1312 * the done queue. 1313 * Shouldn't happen, but some chips are broken(?). 1314 */ 1315 continue; 1316 } 1317 if (xfer->status == USBD_CANCELLED || 1318 xfer->status == USBD_TIMEOUT) { 1319 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1320 xfer)); 1321 /* Handled by abort routine. */ 1322 continue; 1323 } 1324 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 1325 1326 len = std->len; 1327 if (std->td.td_cbp != 0) 1328 len -= le32toh(std->td.td_be) - 1329 le32toh(std->td.td_cbp) + 1; 1330 DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", len, 1331 std->flags)); 1332 if (std->flags & OHCI_ADD_LEN) 1333 xfer->actlen += len; 1334 1335 cc = OHCI_TD_GET_CC(le32toh(std->td.td_flags)); 1336 if (cc == OHCI_CC_NO_ERROR) { 1337 if (std->flags & OHCI_CALL_DONE) { 1338 xfer->status = USBD_NORMAL_COMPLETION; 1339 s = splusb(); 1340 usb_transfer_complete(xfer); 1341 splx(s); 1342 } 1343 ohci_free_std(sc, std); 1344 } else { 1345 /* 1346 * Endpoint is halted. First unlink all the TDs 1347 * belonging to the failed transfer, and then restart 1348 * the endpoint. 1349 */ 1350 ohci_soft_td_t *p, *n; 1351 opipe = (struct ohci_pipe *)xfer->pipe; 1352 1353 DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n", 1354 OHCI_TD_GET_CC(le32toh(std->td.td_flags)), 1355 ohci_cc_strs[OHCI_TD_GET_CC(le32toh(std->td.td_flags))])); 1356 1357 /* remove TDs */ 1358 for (p = std; p->xfer == xfer; p = n) { 1359 n = p->nexttd; 1360 ohci_free_std(sc, p); 1361 } 1362 1363 /* clear halt */ 1364 opipe->sed->ed.ed_headp = htole32(p->physaddr); 1365 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1366 1367 if (cc == OHCI_CC_STALL) 1368 xfer->status = USBD_STALLED; 1369 else 1370 xfer->status = USBD_IOERROR; 1371 s = splusb(); 1372 usb_transfer_complete(xfer); 1373 splx(s); 1374 } 1375 } 1376 1377 #ifdef OHCI_DEBUG 1378 if (ohcidebug > 10) { 1379 DPRINTF(("ohci_softintr: ITD done:\n")); 1380 ohci_dump_itds(sidone); 1381 } 1382 #endif 1383 1384 for (sitd = sidone; sitd != NULL; sitd = sitdnext) { 1385 xfer = sitd->xfer; 1386 sitdnext = sitd->dnext; 1387 DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n", 1388 sitd, xfer, xfer ? xfer->hcpriv : 0)); 1389 if (xfer == NULL) 1390 continue; 1391 if (xfer->status == USBD_CANCELLED || 1392 xfer->status == USBD_TIMEOUT) { 1393 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1394 xfer)); 1395 /* Handled by abort routine. */ 1396 continue; 1397 } 1398 #ifdef DIAGNOSTIC 1399 if (sitd->isdone) 1400 printf("ohci_softintr: sitd=%p is done\n", sitd); 1401 sitd->isdone = 1; 1402 #endif 1403 if (sitd->flags & OHCI_CALL_DONE) { 1404 ohci_soft_itd_t *next; 1405 1406 opipe = (struct ohci_pipe *)xfer->pipe; 1407 opipe->u.iso.inuse -= xfer->nframes; 1408 uedir = UE_GET_DIR(xfer->pipe->endpoint->edesc-> 1409 bEndpointAddress); 1410 xfer->status = USBD_NORMAL_COMPLETION; 1411 actlen = 0; 1412 for (i = 0, sitd = xfer->hcpriv;; 1413 sitd = next) { 1414 next = sitd->nextitd; 1415 if (OHCI_ITD_GET_CC(le32toh(sitd-> 1416 itd.itd_flags)) != OHCI_CC_NO_ERROR) 1417 xfer->status = USBD_IOERROR; 1418 /* For input, update frlengths with actual */ 1419 /* XXX anything necessary for output? */ 1420 if (uedir == UE_DIR_IN && 1421 xfer->status == USBD_NORMAL_COMPLETION) { 1422 iframes = OHCI_ITD_GET_FC(le32toh( 1423 sitd->itd.itd_flags)); 1424 for (j = 0; j < iframes; i++, j++) { 1425 len = le16toh(sitd-> 1426 itd.itd_offset[j]); 1427 len = 1428 (OHCI_ITD_PSW_GET_CC(len) == 1429 OHCI_CC_NOT_ACCESSED) ? 0 : 1430 OHCI_ITD_PSW_LENGTH(len); 1431 xfer->frlengths[i] = len; 1432 actlen += len; 1433 } 1434 } 1435 if (sitd->flags & OHCI_CALL_DONE) 1436 break; 1437 ohci_free_sitd(sc, sitd); 1438 } 1439 ohci_free_sitd(sc, sitd); 1440 if (uedir == UE_DIR_IN && 1441 xfer->status == USBD_NORMAL_COMPLETION) 1442 xfer->actlen = actlen; 1443 1444 s = splusb(); 1445 usb_transfer_complete(xfer); 1446 splx(s); 1447 } 1448 } 1449 1450 #ifdef USB_USE_SOFTINTR 1451 if (sc->sc_softwake) { 1452 sc->sc_softwake = 0; 1453 wakeup(&sc->sc_softwake); 1454 } 1455 #endif /* USB_USE_SOFTINTR */ 1456 1457 sc->sc_bus.intr_context--; 1458 DPRINTFN(10,("ohci_softintr: done:\n")); 1459 } 1460 1461 void 1462 ohci_device_ctrl_done(usbd_xfer_handle xfer) 1463 { 1464 DPRINTFN(10,("ohci_device_ctrl_done: xfer=%p\n", xfer)); 1465 1466 #ifdef DIAGNOSTIC 1467 if (!(xfer->rqflags & URQ_REQUEST)) { 1468 panic("ohci_device_ctrl_done: not a request"); 1469 } 1470 #endif 1471 xfer->hcpriv = NULL; 1472 } 1473 1474 void 1475 ohci_device_intr_done(usbd_xfer_handle xfer) 1476 { 1477 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1478 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1479 ohci_soft_ed_t *sed = opipe->sed; 1480 ohci_soft_td_t *data, *tail; 1481 1482 1483 DPRINTFN(10,("ohci_device_intr_done: xfer=%p, actlen=%d\n", 1484 xfer, xfer->actlen)); 1485 1486 xfer->hcpriv = NULL; 1487 1488 if (xfer->pipe->repeat) { 1489 data = opipe->tail.td; 1490 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 1491 if (tail == NULL) { 1492 xfer->status = USBD_NOMEM; 1493 return; 1494 } 1495 tail->xfer = NULL; 1496 1497 data->td.td_flags = htole32( 1498 OHCI_TD_IN | OHCI_TD_NOCC | 1499 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 1500 if (xfer->flags & USBD_SHORT_XFER_OK) 1501 data->td.td_flags |= htole32(OHCI_TD_R); 1502 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf, 0)); 1503 data->nexttd = tail; 1504 data->td.td_nexttd = htole32(tail->physaddr); 1505 data->td.td_be = htole32(le32toh(data->td.td_cbp) + 1506 xfer->length - 1); 1507 data->len = xfer->length; 1508 data->xfer = xfer; 1509 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1510 xfer->hcpriv = data; 1511 xfer->actlen = 0; 1512 1513 sed->ed.ed_tailp = htole32(tail->physaddr); 1514 opipe->tail.td = tail; 1515 } 1516 } 1517 1518 void 1519 ohci_device_bulk_done(usbd_xfer_handle xfer) 1520 { 1521 DPRINTFN(10,("ohci_device_bulk_done: xfer=%p, actlen=%d\n", 1522 xfer, xfer->actlen)); 1523 1524 xfer->hcpriv = NULL; 1525 } 1526 1527 void 1528 ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer) 1529 { 1530 usbd_pipe_handle pipe; 1531 u_char *p; 1532 int i, m; 1533 int hstatus; 1534 1535 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1536 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n", 1537 sc, xfer, hstatus)); 1538 1539 if (xfer == NULL) { 1540 /* Just ignore the change. */ 1541 return; 1542 } 1543 1544 pipe = xfer->pipe; 1545 1546 p = KERNADDR(&xfer->dmabuf, 0); 1547 m = min(sc->sc_noport, xfer->length * 8 - 1); 1548 memset(p, 0, xfer->length); 1549 for (i = 1; i <= m; i++) { 1550 /* Pick out CHANGE bits from the status reg. */ 1551 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1552 p[i/8] |= 1 << (i%8); 1553 } 1554 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 1555 xfer->actlen = xfer->length; 1556 xfer->status = USBD_NORMAL_COMPLETION; 1557 1558 usb_transfer_complete(xfer); 1559 } 1560 1561 void 1562 ohci_root_intr_done(usbd_xfer_handle xfer) 1563 { 1564 xfer->hcpriv = NULL; 1565 } 1566 1567 void 1568 ohci_root_ctrl_done(usbd_xfer_handle xfer) 1569 { 1570 xfer->hcpriv = NULL; 1571 } 1572 1573 /* 1574 * Wait here until controller claims to have an interrupt. 1575 * Then call ohci_intr and return. Use timeout to avoid waiting 1576 * too long. 1577 */ 1578 void 1579 ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer) 1580 { 1581 int timo = xfer->timeout; 1582 int usecs; 1583 u_int32_t intrs; 1584 1585 xfer->status = USBD_IN_PROGRESS; 1586 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 1587 usb_delay_ms(&sc->sc_bus, 1); 1588 if (sc->sc_dying) 1589 break; 1590 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 1591 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs)); 1592 #ifdef OHCI_DEBUG 1593 if (ohcidebug > 15) 1594 ohci_dumpregs(sc); 1595 #endif 1596 if (intrs) { 1597 ohci_intr1(sc); 1598 if (xfer->status != USBD_IN_PROGRESS) 1599 return; 1600 } 1601 } 1602 1603 /* Timeout */ 1604 DPRINTF(("ohci_waitintr: timeout\n")); 1605 xfer->status = USBD_TIMEOUT; 1606 usb_transfer_complete(xfer); 1607 /* XXX should free TD */ 1608 } 1609 1610 void 1611 ohci_poll(struct usbd_bus *bus) 1612 { 1613 ohci_softc_t *sc = (ohci_softc_t *)bus; 1614 #ifdef OHCI_DEBUG 1615 static int last; 1616 int new; 1617 new = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1618 if (new != last) { 1619 DPRINTFN(10,("ohci_poll: intrs=0x%04x\n", new)); 1620 last = new; 1621 } 1622 #endif 1623 1624 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) 1625 ohci_intr1(sc); 1626 } 1627 1628 usbd_status 1629 ohci_device_request(usbd_xfer_handle xfer) 1630 { 1631 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1632 usb_device_request_t *req = &xfer->request; 1633 usbd_device_handle dev = opipe->pipe.device; 1634 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1635 int addr = dev->address; 1636 ohci_soft_td_t *setup, *stat, *next, *tail; 1637 ohci_soft_ed_t *sed; 1638 int isread; 1639 int len; 1640 usbd_status err; 1641 int s; 1642 1643 isread = req->bmRequestType & UT_READ; 1644 len = UGETW(req->wLength); 1645 1646 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 1647 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 1648 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1649 UGETW(req->wIndex), len, addr, 1650 opipe->pipe.endpoint->edesc->bEndpointAddress)); 1651 1652 setup = opipe->tail.td; 1653 stat = ohci_alloc_std(sc); 1654 if (stat == NULL) { 1655 err = USBD_NOMEM; 1656 goto bad1; 1657 } 1658 tail = ohci_alloc_std(sc); 1659 if (tail == NULL) { 1660 err = USBD_NOMEM; 1661 goto bad2; 1662 } 1663 tail->xfer = NULL; 1664 1665 sed = opipe->sed; 1666 opipe->u.ctl.length = len; 1667 1668 /* Update device address and length since they may have changed. */ 1669 /* XXX This only needs to be done once, but it's too early in open. */ 1670 /* XXXX Should not touch ED here! */ 1671 sed->ed.ed_flags = htole32( 1672 (le32toh(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) | 1673 OHCI_ED_SET_FA(addr) | 1674 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize))); 1675 1676 next = stat; 1677 1678 /* Set up data transaction */ 1679 if (len != 0) { 1680 ohci_soft_td_t *std = stat; 1681 1682 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 1683 std, &stat); 1684 stat = stat->nexttd; /* point at free TD */ 1685 if (err) 1686 goto bad3; 1687 /* Start toggle at 1 and then use the carried toggle. */ 1688 std->td.td_flags &= htole32(~OHCI_TD_TOGGLE_MASK); 1689 std->td.td_flags |= htole32(OHCI_TD_TOGGLE_1); 1690 } 1691 1692 memcpy(KERNADDR(&opipe->u.ctl.reqdma, 0), req, sizeof *req); 1693 1694 setup->td.td_flags = htole32(OHCI_TD_SETUP | OHCI_TD_NOCC | 1695 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1696 setup->td.td_cbp = htole32(DMAADDR(&opipe->u.ctl.reqdma, 0)); 1697 setup->nexttd = next; 1698 setup->td.td_nexttd = htole32(next->physaddr); 1699 setup->td.td_be = htole32(le32toh(setup->td.td_cbp) + sizeof *req - 1); 1700 setup->len = 0; 1701 setup->xfer = xfer; 1702 setup->flags = 0; 1703 xfer->hcpriv = setup; 1704 1705 stat->td.td_flags = htole32( 1706 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | 1707 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1708 stat->td.td_cbp = 0; 1709 stat->nexttd = tail; 1710 stat->td.td_nexttd = htole32(tail->physaddr); 1711 stat->td.td_be = 0; 1712 stat->flags = OHCI_CALL_DONE; 1713 stat->len = 0; 1714 stat->xfer = xfer; 1715 1716 #ifdef OHCI_DEBUG 1717 if (ohcidebug > 5) { 1718 DPRINTF(("ohci_device_request:\n")); 1719 ohci_dump_ed(sed); 1720 ohci_dump_tds(setup); 1721 } 1722 #endif 1723 1724 /* Insert ED in schedule */ 1725 s = splusb(); 1726 sed->ed.ed_tailp = htole32(tail->physaddr); 1727 opipe->tail.td = tail; 1728 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1729 if (xfer->timeout && !sc->sc_bus.use_polling) { 1730 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 1731 ohci_timeout, xfer); 1732 } 1733 splx(s); 1734 1735 #ifdef OHCI_DEBUG 1736 if (ohcidebug > 20) { 1737 delay(10000); 1738 DPRINTF(("ohci_device_request: status=%x\n", 1739 OREAD4(sc, OHCI_COMMAND_STATUS))); 1740 ohci_dumpregs(sc); 1741 printf("ctrl head:\n"); 1742 ohci_dump_ed(sc->sc_ctrl_head); 1743 printf("sed:\n"); 1744 ohci_dump_ed(sed); 1745 ohci_dump_tds(setup); 1746 } 1747 #endif 1748 1749 return (USBD_NORMAL_COMPLETION); 1750 1751 bad3: 1752 ohci_free_std(sc, tail); 1753 bad2: 1754 ohci_free_std(sc, stat); 1755 bad1: 1756 return (err); 1757 } 1758 1759 /* 1760 * Add an ED to the schedule. Called at splusb(). 1761 */ 1762 void 1763 ohci_add_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1764 { 1765 DPRINTFN(8,("ohci_add_ed: sed=%p head=%p\n", sed, head)); 1766 1767 SPLUSBCHECK; 1768 sed->next = head->next; 1769 sed->ed.ed_nexted = head->ed.ed_nexted; 1770 head->next = sed; 1771 head->ed.ed_nexted = htole32(sed->physaddr); 1772 } 1773 1774 /* 1775 * Remove an ED from the schedule. Called at splusb(). 1776 */ 1777 void 1778 ohci_rem_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1779 { 1780 ohci_soft_ed_t *p; 1781 1782 SPLUSBCHECK; 1783 1784 /* XXX */ 1785 for (p = head; p != NULL && p->next != sed; p = p->next) 1786 ; 1787 if (p == NULL) 1788 panic("ohci_rem_ed: ED not found"); 1789 p->next = sed->next; 1790 p->ed.ed_nexted = sed->ed.ed_nexted; 1791 } 1792 1793 /* 1794 * When a transfer is completed the TD is added to the done queue by 1795 * the host controller. This queue is the processed by software. 1796 * Unfortunately the queue contains the physical address of the TD 1797 * and we have no simple way to translate this back to a kernel address. 1798 * To make the translation possible (and fast) we use a hash table of 1799 * TDs currently in the schedule. The physical address is used as the 1800 * hash value. 1801 */ 1802 1803 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1804 /* Called at splusb() */ 1805 void 1806 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1807 { 1808 int h = HASH(std->physaddr); 1809 1810 SPLUSBCHECK; 1811 1812 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1813 } 1814 1815 /* Called at splusb() */ 1816 void 1817 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1818 { 1819 SPLUSBCHECK; 1820 1821 LIST_REMOVE(std, hnext); 1822 } 1823 1824 ohci_soft_td_t * 1825 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a) 1826 { 1827 int h = HASH(a); 1828 ohci_soft_td_t *std; 1829 1830 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1831 std != NULL; 1832 std = LIST_NEXT(std, hnext)) 1833 if (std->physaddr == a) 1834 return (std); 1835 return (NULL); 1836 } 1837 1838 /* Called at splusb() */ 1839 void 1840 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1841 { 1842 int h = HASH(sitd->physaddr); 1843 1844 SPLUSBCHECK; 1845 1846 DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n", 1847 sitd, (u_long)sitd->physaddr)); 1848 1849 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext); 1850 } 1851 1852 /* Called at splusb() */ 1853 void 1854 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1855 { 1856 SPLUSBCHECK; 1857 1858 DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n", 1859 sitd, (u_long)sitd->physaddr)); 1860 1861 LIST_REMOVE(sitd, hnext); 1862 } 1863 1864 ohci_soft_itd_t * 1865 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a) 1866 { 1867 int h = HASH(a); 1868 ohci_soft_itd_t *sitd; 1869 1870 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]); 1871 sitd != NULL; 1872 sitd = LIST_NEXT(sitd, hnext)) 1873 if (sitd->physaddr == a) 1874 return (sitd); 1875 return (NULL); 1876 } 1877 1878 void 1879 ohci_timeout(void *addr) 1880 { 1881 struct ohci_xfer *oxfer = addr; 1882 struct ohci_pipe *opipe = (struct ohci_pipe *)oxfer->xfer.pipe; 1883 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1884 1885 DPRINTF(("ohci_timeout: oxfer=%p\n", oxfer)); 1886 1887 if (sc->sc_dying) { 1888 ohci_abort_xfer(&oxfer->xfer, USBD_TIMEOUT); 1889 return; 1890 } 1891 1892 /* Execute the abort in a process context. */ 1893 usb_init_task(&oxfer->abort_task, ohci_timeout_task, addr); 1894 usb_add_task(oxfer->xfer.pipe->device, &oxfer->abort_task); 1895 } 1896 1897 void 1898 ohci_timeout_task(void *addr) 1899 { 1900 usbd_xfer_handle xfer = addr; 1901 int s; 1902 1903 DPRINTF(("ohci_timeout_task: xfer=%p\n", xfer)); 1904 1905 s = splusb(); 1906 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1907 splx(s); 1908 } 1909 1910 #ifdef OHCI_DEBUG 1911 void 1912 ohci_dump_tds(ohci_soft_td_t *std) 1913 { 1914 for (; std; std = std->nexttd) 1915 ohci_dump_td(std); 1916 } 1917 1918 void 1919 ohci_dump_td(ohci_soft_td_t *std) 1920 { 1921 char sbuf[128]; 1922 1923 bitmask_snprintf((u_int32_t)le32toh(std->td.td_flags), 1924 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 1925 sbuf, sizeof(sbuf)); 1926 1927 printf("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx " 1928 "nexttd=0x%08lx be=0x%08lx\n", 1929 std, (u_long)std->physaddr, sbuf, 1930 OHCI_TD_GET_DI(le32toh(std->td.td_flags)), 1931 OHCI_TD_GET_EC(le32toh(std->td.td_flags)), 1932 OHCI_TD_GET_CC(le32toh(std->td.td_flags)), 1933 (u_long)le32toh(std->td.td_cbp), 1934 (u_long)le32toh(std->td.td_nexttd), 1935 (u_long)le32toh(std->td.td_be)); 1936 } 1937 1938 void 1939 ohci_dump_itd(ohci_soft_itd_t *sitd) 1940 { 1941 int i; 1942 1943 printf("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n" 1944 "bp0=0x%08lx next=0x%08lx be=0x%08lx\n", 1945 sitd, (u_long)sitd->physaddr, 1946 OHCI_ITD_GET_SF(le32toh(sitd->itd.itd_flags)), 1947 OHCI_ITD_GET_DI(le32toh(sitd->itd.itd_flags)), 1948 OHCI_ITD_GET_FC(le32toh(sitd->itd.itd_flags)), 1949 OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags)), 1950 (u_long)le32toh(sitd->itd.itd_bp0), 1951 (u_long)le32toh(sitd->itd.itd_nextitd), 1952 (u_long)le32toh(sitd->itd.itd_be)); 1953 for (i = 0; i < OHCI_ITD_NOFFSET; i++) 1954 printf("offs[%d]=0x%04x ", i, 1955 (u_int)le16toh(sitd->itd.itd_offset[i])); 1956 printf("\n"); 1957 } 1958 1959 void 1960 ohci_dump_itds(ohci_soft_itd_t *sitd) 1961 { 1962 for (; sitd; sitd = sitd->nextitd) 1963 ohci_dump_itd(sitd); 1964 } 1965 1966 void 1967 ohci_dump_ed(ohci_soft_ed_t *sed) 1968 { 1969 char sbuf[128], sbuf2[128]; 1970 1971 bitmask_snprintf((u_int32_t)le32toh(sed->ed.ed_flags), 1972 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO", 1973 sbuf, sizeof(sbuf)); 1974 bitmask_snprintf((u_int32_t)le32toh(sed->ed.ed_headp), 1975 "\20\1HALT\2CARRY", sbuf2, sizeof(sbuf2)); 1976 1977 printf("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d flags=%s\ntailp=0x%08lx " 1978 "headflags=%s headp=0x%08lx nexted=0x%08lx\n", 1979 sed, (u_long)sed->physaddr, 1980 OHCI_ED_GET_FA(le32toh(sed->ed.ed_flags)), 1981 OHCI_ED_GET_EN(le32toh(sed->ed.ed_flags)), 1982 OHCI_ED_GET_MAXP(le32toh(sed->ed.ed_flags)), sbuf, 1983 (u_long)le32toh(sed->ed.ed_tailp), sbuf2, 1984 (u_long)le32toh(sed->ed.ed_headp), 1985 (u_long)le32toh(sed->ed.ed_nexted)); 1986 } 1987 #endif 1988 1989 usbd_status 1990 ohci_open(usbd_pipe_handle pipe) 1991 { 1992 usbd_device_handle dev = pipe->device; 1993 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1994 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1995 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1996 u_int8_t addr = dev->address; 1997 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1998 ohci_soft_ed_t *sed; 1999 ohci_soft_td_t *std; 2000 ohci_soft_itd_t *sitd; 2001 ohci_physaddr_t tdphys; 2002 u_int32_t fmt; 2003 usbd_status err; 2004 int s; 2005 int ival; 2006 2007 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 2008 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 2009 2010 if (sc->sc_dying) 2011 return (USBD_IOERROR); 2012 2013 std = NULL; 2014 sed = NULL; 2015 2016 if (addr == sc->sc_addr) { 2017 switch (ed->bEndpointAddress) { 2018 case USB_CONTROL_ENDPOINT: 2019 pipe->methods = &ohci_root_ctrl_methods; 2020 break; 2021 case UE_DIR_IN | OHCI_INTR_ENDPT: 2022 pipe->methods = &ohci_root_intr_methods; 2023 break; 2024 default: 2025 return (USBD_INVAL); 2026 } 2027 } else { 2028 sed = ohci_alloc_sed(sc); 2029 if (sed == NULL) 2030 goto bad0; 2031 opipe->sed = sed; 2032 if (xfertype == UE_ISOCHRONOUS) { 2033 sitd = ohci_alloc_sitd(sc); 2034 if (sitd == NULL) 2035 goto bad1; 2036 opipe->tail.itd = sitd; 2037 tdphys = sitd->physaddr; 2038 fmt = OHCI_ED_FORMAT_ISO; 2039 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 2040 fmt |= OHCI_ED_DIR_IN; 2041 else 2042 fmt |= OHCI_ED_DIR_OUT; 2043 } else { 2044 std = ohci_alloc_std(sc); 2045 if (std == NULL) 2046 goto bad1; 2047 opipe->tail.td = std; 2048 tdphys = std->physaddr; 2049 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD; 2050 } 2051 sed->ed.ed_flags = htole32( 2052 OHCI_ED_SET_FA(addr) | 2053 OHCI_ED_SET_EN(ed->bEndpointAddress) | 2054 (dev->speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) | 2055 fmt | 2056 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 2057 sed->ed.ed_headp = sed->ed.ed_tailp = htole32(tdphys); 2058 2059 switch (xfertype) { 2060 case UE_CONTROL: 2061 pipe->methods = &ohci_device_ctrl_methods; 2062 err = usb_allocmem(&sc->sc_bus, 2063 sizeof(usb_device_request_t), 2064 0, &opipe->u.ctl.reqdma); 2065 if (err) 2066 goto bad; 2067 s = splusb(); 2068 ohci_add_ed(sed, sc->sc_ctrl_head); 2069 splx(s); 2070 break; 2071 case UE_INTERRUPT: 2072 pipe->methods = &ohci_device_intr_methods; 2073 ival = pipe->interval; 2074 if (ival == USBD_DEFAULT_INTERVAL) 2075 ival = ed->bInterval; 2076 return (ohci_device_setintr(sc, opipe, ival)); 2077 case UE_ISOCHRONOUS: 2078 pipe->methods = &ohci_device_isoc_methods; 2079 return (ohci_setup_isoc(pipe)); 2080 case UE_BULK: 2081 pipe->methods = &ohci_device_bulk_methods; 2082 s = splusb(); 2083 ohci_add_ed(sed, sc->sc_bulk_head); 2084 splx(s); 2085 break; 2086 } 2087 } 2088 return (USBD_NORMAL_COMPLETION); 2089 2090 bad: 2091 if (std != NULL) 2092 ohci_free_std(sc, std); 2093 bad1: 2094 if (sed != NULL) 2095 ohci_free_sed(sc, sed); 2096 bad0: 2097 return (USBD_NOMEM); 2098 2099 } 2100 2101 /* 2102 * Close a reqular pipe. 2103 * Assumes that there are no pending transactions. 2104 */ 2105 void 2106 ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head) 2107 { 2108 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2109 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2110 ohci_soft_ed_t *sed = opipe->sed; 2111 int s; 2112 2113 s = splusb(); 2114 #ifdef DIAGNOSTIC 2115 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 2116 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2117 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) { 2118 ohci_soft_td_t *std; 2119 std = ohci_hash_find_td(sc, le32toh(sed->ed.ed_headp)); 2120 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 2121 "tl=0x%x pipe=%p, std=%p\n", sed, 2122 (int)le32toh(sed->ed.ed_headp), 2123 (int)le32toh(sed->ed.ed_tailp), 2124 pipe, std); 2125 #ifdef USB_DEBUG 2126 usbd_dump_pipe(&opipe->pipe); 2127 #endif 2128 #ifdef OHCI_DEBUG 2129 ohci_dump_ed(sed); 2130 if (std) 2131 ohci_dump_td(std); 2132 #endif 2133 usb_delay_ms(&sc->sc_bus, 2); 2134 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2135 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) 2136 printf("ohci_close_pipe: pipe still not empty\n"); 2137 } 2138 #endif 2139 ohci_rem_ed(sed, head); 2140 /* Make sure the host controller is not touching this ED */ 2141 usb_delay_ms(&sc->sc_bus, 1); 2142 splx(s); 2143 ohci_free_sed(sc, opipe->sed); 2144 } 2145 2146 /* 2147 * Abort a device request. 2148 * If this routine is called at splusb() it guarantees that the request 2149 * will be removed from the hardware scheduling and that the callback 2150 * for it will be called with USBD_CANCELLED status. 2151 * It's impossible to guarantee that the requested transfer will not 2152 * have happened since the hardware runs concurrently. 2153 * If the transaction has already happened we rely on the ordinary 2154 * interrupt processing to process it. 2155 */ 2156 void 2157 ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2158 { 2159 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2160 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 2161 ohci_soft_ed_t *sed = opipe->sed; 2162 ohci_soft_td_t *p, *n; 2163 ohci_physaddr_t headp; 2164 int s, hit; 2165 2166 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p sed=%p\n", xfer, opipe,sed)); 2167 2168 if (sc->sc_dying) { 2169 /* If we're dying, just do the software part. */ 2170 s = splusb(); 2171 xfer->status = status; /* make software ignore it */ 2172 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 2173 usb_transfer_complete(xfer); 2174 splx(s); 2175 } 2176 2177 if (xfer->device->bus->intr_context || !curproc) 2178 panic("ohci_abort_xfer: not in process context"); 2179 2180 /* 2181 * Step 1: Make interrupt routine and hardware ignore xfer. 2182 */ 2183 s = splusb(); 2184 xfer->status = status; /* make software ignore it */ 2185 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 2186 splx(s); 2187 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed)); 2188 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 2189 2190 /* 2191 * Step 2: Wait until we know hardware has finished any possible 2192 * use of the xfer. Also make sure the soft interrupt routine 2193 * has run. 2194 */ 2195 usb_delay_ms(opipe->pipe.device->bus, 20); /* Hardware finishes in 1ms */ 2196 s = splusb(); 2197 #ifdef USB_USE_SOFTINTR 2198 sc->sc_softwake = 1; 2199 #endif /* USB_USE_SOFTINTR */ 2200 usb_schedsoftintr(&sc->sc_bus); 2201 #ifdef USB_USE_SOFTINTR 2202 tsleep(&sc->sc_softwake, PZERO, "ohciab", 0); 2203 #endif /* USB_USE_SOFTINTR */ 2204 splx(s); 2205 2206 /* 2207 * Step 3: Remove any vestiges of the xfer from the hardware. 2208 * The complication here is that the hardware may have executed 2209 * beyond the xfer we're trying to abort. So as we're scanning 2210 * the TDs of this xfer we check if the hardware points to 2211 * any of them. 2212 */ 2213 s = splusb(); /* XXX why? */ 2214 p = xfer->hcpriv; 2215 #ifdef DIAGNOSTIC 2216 if (p == NULL) { 2217 splx(s); 2218 printf("ohci_abort_xfer: hcpriv is NULL\n"); 2219 return; 2220 } 2221 #endif 2222 #ifdef OHCI_DEBUG 2223 if (ohcidebug > 1) { 2224 DPRINTF(("ohci_abort_xfer: sed=\n")); 2225 ohci_dump_ed(sed); 2226 ohci_dump_tds(p); 2227 } 2228 #endif 2229 headp = le32toh(sed->ed.ed_headp) & OHCI_HEADMASK; 2230 hit = 0; 2231 for (; p->xfer == xfer; p = n) { 2232 hit |= headp == p->physaddr; 2233 n = p->nexttd; 2234 ohci_free_std(sc, p); 2235 } 2236 /* Zap headp register if hardware pointed inside the xfer. */ 2237 if (hit) { 2238 DPRINTFN(1,("ohci_abort_xfer: set hd=0x08%x, tl=0x%08x\n", 2239 (int)p->physaddr, (int)le32toh(sed->ed.ed_tailp))); 2240 sed->ed.ed_headp = htole32(p->physaddr); /* unlink TDs */ 2241 } else { 2242 DPRINTFN(1,("ohci_abort_xfer: no hit\n")); 2243 } 2244 2245 /* 2246 * Step 4: Turn on hardware again. 2247 */ 2248 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 2249 2250 /* 2251 * Step 5: Execute callback. 2252 */ 2253 usb_transfer_complete(xfer); 2254 2255 splx(s); 2256 } 2257 2258 /* 2259 * Data structures and routines to emulate the root hub. 2260 */ 2261 Static usb_device_descriptor_t ohci_devd = { 2262 USB_DEVICE_DESCRIPTOR_SIZE, 2263 UDESC_DEVICE, /* type */ 2264 {0x00, 0x01}, /* USB version */ 2265 UDCLASS_HUB, /* class */ 2266 UDSUBCLASS_HUB, /* subclass */ 2267 UDPROTO_FSHUB, 2268 64, /* max packet */ 2269 {0},{0},{0x00,0x01}, /* device id */ 2270 1,2,0, /* string indicies */ 2271 1 /* # of configurations */ 2272 }; 2273 2274 Static usb_config_descriptor_t ohci_confd = { 2275 USB_CONFIG_DESCRIPTOR_SIZE, 2276 UDESC_CONFIG, 2277 {USB_CONFIG_DESCRIPTOR_SIZE + 2278 USB_INTERFACE_DESCRIPTOR_SIZE + 2279 USB_ENDPOINT_DESCRIPTOR_SIZE}, 2280 1, 2281 1, 2282 0, 2283 UC_SELF_POWERED, 2284 0 /* max power */ 2285 }; 2286 2287 Static usb_interface_descriptor_t ohci_ifcd = { 2288 USB_INTERFACE_DESCRIPTOR_SIZE, 2289 UDESC_INTERFACE, 2290 0, 2291 0, 2292 1, 2293 UICLASS_HUB, 2294 UISUBCLASS_HUB, 2295 UIPROTO_FSHUB, 2296 0 2297 }; 2298 2299 Static usb_endpoint_descriptor_t ohci_endpd = { 2300 USB_ENDPOINT_DESCRIPTOR_SIZE, 2301 UDESC_ENDPOINT, 2302 UE_DIR_IN | OHCI_INTR_ENDPT, 2303 UE_INTERRUPT, 2304 {8, 0}, /* max packet */ 2305 255 2306 }; 2307 2308 Static usb_hub_descriptor_t ohci_hubd = { 2309 USB_HUB_DESCRIPTOR_SIZE, 2310 UDESC_HUB, 2311 0, 2312 {0,0}, 2313 0, 2314 0, 2315 {0}, 2316 }; 2317 2318 Static int 2319 ohci_str(usb_string_descriptor_t *p, int l, const char *s) 2320 { 2321 int i; 2322 2323 if (l == 0) 2324 return (0); 2325 p->bLength = 2 * strlen(s) + 2; 2326 if (l == 1) 2327 return (1); 2328 p->bDescriptorType = UDESC_STRING; 2329 l -= 2; 2330 for (i = 0; s[i] && l > 1; i++, l -= 2) 2331 USETW2(p->bString[i], 0, s[i]); 2332 return (2*i+2); 2333 } 2334 2335 /* 2336 * Simulate a hardware hub by handling all the necessary requests. 2337 */ 2338 Static usbd_status 2339 ohci_root_ctrl_transfer(usbd_xfer_handle xfer) 2340 { 2341 usbd_status err; 2342 2343 /* Insert last in queue. */ 2344 err = usb_insert_transfer(xfer); 2345 if (err) 2346 return (err); 2347 2348 /* Pipe isn't running, start first */ 2349 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2350 } 2351 2352 Static usbd_status 2353 ohci_root_ctrl_start(usbd_xfer_handle xfer) 2354 { 2355 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2356 usb_device_request_t *req; 2357 void *buf = NULL; 2358 int port, i; 2359 int s, len, value, index, l, totlen = 0; 2360 usb_port_status_t ps; 2361 usb_hub_descriptor_t hubd; 2362 usbd_status err; 2363 u_int32_t v; 2364 2365 if (sc->sc_dying) 2366 return (USBD_IOERROR); 2367 2368 #ifdef DIAGNOSTIC 2369 if (!(xfer->rqflags & URQ_REQUEST)) 2370 /* XXX panic */ 2371 return (USBD_INVAL); 2372 #endif 2373 req = &xfer->request; 2374 2375 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 2376 req->bmRequestType, req->bRequest)); 2377 2378 len = UGETW(req->wLength); 2379 value = UGETW(req->wValue); 2380 index = UGETW(req->wIndex); 2381 2382 if (len != 0) 2383 buf = KERNADDR(&xfer->dmabuf, 0); 2384 2385 #define C(x,y) ((x) | ((y) << 8)) 2386 switch(C(req->bRequest, req->bmRequestType)) { 2387 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 2388 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 2389 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 2390 /* 2391 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 2392 * for the integrated root hub. 2393 */ 2394 break; 2395 case C(UR_GET_CONFIG, UT_READ_DEVICE): 2396 if (len > 0) { 2397 *(u_int8_t *)buf = sc->sc_conf; 2398 totlen = 1; 2399 } 2400 break; 2401 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2402 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 2403 switch(value >> 8) { 2404 case UDESC_DEVICE: 2405 if ((value & 0xff) != 0) { 2406 err = USBD_IOERROR; 2407 goto ret; 2408 } 2409 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 2410 USETW(ohci_devd.idVendor, sc->sc_id_vendor); 2411 memcpy(buf, &ohci_devd, l); 2412 break; 2413 case UDESC_CONFIG: 2414 if ((value & 0xff) != 0) { 2415 err = USBD_IOERROR; 2416 goto ret; 2417 } 2418 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 2419 memcpy(buf, &ohci_confd, l); 2420 buf = (char *)buf + l; 2421 len -= l; 2422 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 2423 totlen += l; 2424 memcpy(buf, &ohci_ifcd, l); 2425 buf = (char *)buf + l; 2426 len -= l; 2427 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 2428 totlen += l; 2429 memcpy(buf, &ohci_endpd, l); 2430 break; 2431 case UDESC_STRING: 2432 if (len == 0) 2433 break; 2434 *(u_int8_t *)buf = 0; 2435 totlen = 1; 2436 switch (value & 0xff) { 2437 case 1: /* Vendor */ 2438 totlen = ohci_str(buf, len, sc->sc_vendor); 2439 break; 2440 case 2: /* Product */ 2441 totlen = ohci_str(buf, len, "OHCI root hub"); 2442 break; 2443 } 2444 break; 2445 default: 2446 err = USBD_IOERROR; 2447 goto ret; 2448 } 2449 break; 2450 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 2451 if (len > 0) { 2452 *(u_int8_t *)buf = 0; 2453 totlen = 1; 2454 } 2455 break; 2456 case C(UR_GET_STATUS, UT_READ_DEVICE): 2457 if (len > 1) { 2458 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 2459 totlen = 2; 2460 } 2461 break; 2462 case C(UR_GET_STATUS, UT_READ_INTERFACE): 2463 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 2464 if (len > 1) { 2465 USETW(((usb_status_t *)buf)->wStatus, 0); 2466 totlen = 2; 2467 } 2468 break; 2469 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 2470 if (value >= USB_MAX_DEVICES) { 2471 err = USBD_IOERROR; 2472 goto ret; 2473 } 2474 sc->sc_addr = value; 2475 break; 2476 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 2477 if (value != 0 && value != 1) { 2478 err = USBD_IOERROR; 2479 goto ret; 2480 } 2481 sc->sc_conf = value; 2482 break; 2483 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 2484 break; 2485 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 2486 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 2487 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 2488 err = USBD_IOERROR; 2489 goto ret; 2490 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 2491 break; 2492 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 2493 break; 2494 /* Hub requests */ 2495 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2496 break; 2497 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2498 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 2499 "port=%d feature=%d\n", 2500 index, value)); 2501 if (index < 1 || index > sc->sc_noport) { 2502 err = USBD_IOERROR; 2503 goto ret; 2504 } 2505 port = OHCI_RH_PORT_STATUS(index); 2506 switch(value) { 2507 case UHF_PORT_ENABLE: 2508 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2509 break; 2510 case UHF_PORT_SUSPEND: 2511 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2512 break; 2513 case UHF_PORT_POWER: 2514 /* Yes, writing to the LOW_SPEED bit clears power. */ 2515 OWRITE4(sc, port, UPS_LOW_SPEED); 2516 break; 2517 case UHF_C_PORT_CONNECTION: 2518 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2519 break; 2520 case UHF_C_PORT_ENABLE: 2521 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2522 break; 2523 case UHF_C_PORT_SUSPEND: 2524 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2525 break; 2526 case UHF_C_PORT_OVER_CURRENT: 2527 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2528 break; 2529 case UHF_C_PORT_RESET: 2530 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2531 break; 2532 default: 2533 err = USBD_IOERROR; 2534 goto ret; 2535 } 2536 switch(value) { 2537 case UHF_C_PORT_CONNECTION: 2538 case UHF_C_PORT_ENABLE: 2539 case UHF_C_PORT_SUSPEND: 2540 case UHF_C_PORT_OVER_CURRENT: 2541 case UHF_C_PORT_RESET: 2542 /* Enable RHSC interrupt if condition is cleared. */ 2543 if ((OREAD4(sc, port) >> 16) == 0) 2544 ohci_rhsc_able(sc, 1); 2545 break; 2546 default: 2547 break; 2548 } 2549 break; 2550 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2551 if (value != 0) { 2552 err = USBD_IOERROR; 2553 goto ret; 2554 } 2555 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2556 hubd = ohci_hubd; 2557 hubd.bNbrPorts = sc->sc_noport; 2558 USETW(hubd.wHubCharacteristics, 2559 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2560 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2561 /* XXX overcurrent */ 2562 ); 2563 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2564 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2565 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2566 hubd.DeviceRemovable[i++] = (u_int8_t)v; 2567 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2568 l = min(len, hubd.bDescLength); 2569 totlen = l; 2570 memcpy(buf, &hubd, l); 2571 break; 2572 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2573 if (len != 4) { 2574 err = USBD_IOERROR; 2575 goto ret; 2576 } 2577 memset(buf, 0, len); /* ? XXX */ 2578 totlen = len; 2579 break; 2580 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2581 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 2582 index)); 2583 if (index < 1 || index > sc->sc_noport) { 2584 err = USBD_IOERROR; 2585 goto ret; 2586 } 2587 if (len != 4) { 2588 err = USBD_IOERROR; 2589 goto ret; 2590 } 2591 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2592 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 2593 v)); 2594 USETW(ps.wPortStatus, v); 2595 USETW(ps.wPortChange, v >> 16); 2596 l = min(len, sizeof ps); 2597 memcpy(buf, &ps, l); 2598 totlen = l; 2599 break; 2600 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2601 err = USBD_IOERROR; 2602 goto ret; 2603 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2604 break; 2605 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2606 if (index < 1 || index > sc->sc_noport) { 2607 err = USBD_IOERROR; 2608 goto ret; 2609 } 2610 port = OHCI_RH_PORT_STATUS(index); 2611 switch(value) { 2612 case UHF_PORT_ENABLE: 2613 OWRITE4(sc, port, UPS_PORT_ENABLED); 2614 break; 2615 case UHF_PORT_SUSPEND: 2616 OWRITE4(sc, port, UPS_SUSPEND); 2617 break; 2618 case UHF_PORT_RESET: 2619 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 2620 index)); 2621 OWRITE4(sc, port, UPS_RESET); 2622 for (i = 0; i < 5; i++) { 2623 usb_delay_ms(&sc->sc_bus, 2624 USB_PORT_ROOT_RESET_DELAY); 2625 if (sc->sc_dying) { 2626 err = USBD_IOERROR; 2627 goto ret; 2628 } 2629 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2630 break; 2631 } 2632 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 2633 index, OREAD4(sc, port))); 2634 break; 2635 case UHF_PORT_POWER: 2636 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 2637 "%d\n", index)); 2638 OWRITE4(sc, port, UPS_PORT_POWER); 2639 break; 2640 default: 2641 err = USBD_IOERROR; 2642 goto ret; 2643 } 2644 break; 2645 default: 2646 err = USBD_IOERROR; 2647 goto ret; 2648 } 2649 xfer->actlen = totlen; 2650 err = USBD_NORMAL_COMPLETION; 2651 ret: 2652 xfer->status = err; 2653 s = splusb(); 2654 usb_transfer_complete(xfer); 2655 splx(s); 2656 return (USBD_IN_PROGRESS); 2657 } 2658 2659 /* Abort a root control request. */ 2660 Static void 2661 ohci_root_ctrl_abort(usbd_xfer_handle xfer) 2662 { 2663 /* Nothing to do, all transfers are synchronous. */ 2664 } 2665 2666 /* Close the root pipe. */ 2667 Static void 2668 ohci_root_ctrl_close(usbd_pipe_handle pipe) 2669 { 2670 DPRINTF(("ohci_root_ctrl_close\n")); 2671 /* Nothing to do. */ 2672 } 2673 2674 Static usbd_status 2675 ohci_root_intr_transfer(usbd_xfer_handle xfer) 2676 { 2677 usbd_status err; 2678 2679 /* Insert last in queue. */ 2680 err = usb_insert_transfer(xfer); 2681 if (err) 2682 return (err); 2683 2684 /* Pipe isn't running, start first */ 2685 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2686 } 2687 2688 Static usbd_status 2689 ohci_root_intr_start(usbd_xfer_handle xfer) 2690 { 2691 usbd_pipe_handle pipe = xfer->pipe; 2692 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2693 2694 if (sc->sc_dying) 2695 return (USBD_IOERROR); 2696 2697 sc->sc_intrxfer = xfer; 2698 2699 return (USBD_IN_PROGRESS); 2700 } 2701 2702 /* Abort a root interrupt request. */ 2703 Static void 2704 ohci_root_intr_abort(usbd_xfer_handle xfer) 2705 { 2706 int s; 2707 2708 if (xfer->pipe->intrxfer == xfer) { 2709 DPRINTF(("ohci_root_intr_abort: remove\n")); 2710 xfer->pipe->intrxfer = NULL; 2711 } 2712 xfer->status = USBD_CANCELLED; 2713 s = splusb(); 2714 usb_transfer_complete(xfer); 2715 splx(s); 2716 } 2717 2718 /* Close the root pipe. */ 2719 Static void 2720 ohci_root_intr_close(usbd_pipe_handle pipe) 2721 { 2722 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2723 2724 DPRINTF(("ohci_root_intr_close\n")); 2725 2726 sc->sc_intrxfer = NULL; 2727 } 2728 2729 /************************/ 2730 2731 Static usbd_status 2732 ohci_device_ctrl_transfer(usbd_xfer_handle xfer) 2733 { 2734 usbd_status err; 2735 2736 /* Insert last in queue. */ 2737 err = usb_insert_transfer(xfer); 2738 if (err) 2739 return (err); 2740 2741 /* Pipe isn't running, start first */ 2742 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2743 } 2744 2745 Static usbd_status 2746 ohci_device_ctrl_start(usbd_xfer_handle xfer) 2747 { 2748 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2749 usbd_status err; 2750 2751 if (sc->sc_dying) 2752 return (USBD_IOERROR); 2753 2754 #ifdef DIAGNOSTIC 2755 if (!(xfer->rqflags & URQ_REQUEST)) { 2756 /* XXX panic */ 2757 printf("ohci_device_ctrl_transfer: not a request\n"); 2758 return (USBD_INVAL); 2759 } 2760 #endif 2761 2762 err = ohci_device_request(xfer); 2763 if (err) 2764 return (err); 2765 2766 if (sc->sc_bus.use_polling) 2767 ohci_waitintr(sc, xfer); 2768 return (USBD_IN_PROGRESS); 2769 } 2770 2771 /* Abort a device control request. */ 2772 Static void 2773 ohci_device_ctrl_abort(usbd_xfer_handle xfer) 2774 { 2775 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer)); 2776 ohci_abort_xfer(xfer, USBD_CANCELLED); 2777 } 2778 2779 /* Close a device control pipe. */ 2780 Static void 2781 ohci_device_ctrl_close(usbd_pipe_handle pipe) 2782 { 2783 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2784 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2785 2786 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe)); 2787 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2788 ohci_free_std(sc, opipe->tail.td); 2789 } 2790 2791 /************************/ 2792 2793 Static void 2794 ohci_device_clear_toggle(usbd_pipe_handle pipe) 2795 { 2796 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2797 2798 opipe->sed->ed.ed_headp &= htole32(~OHCI_TOGGLECARRY); 2799 } 2800 2801 Static void 2802 ohci_noop(usbd_pipe_handle pipe) 2803 { 2804 } 2805 2806 Static usbd_status 2807 ohci_device_bulk_transfer(usbd_xfer_handle xfer) 2808 { 2809 usbd_status err; 2810 2811 /* Insert last in queue. */ 2812 err = usb_insert_transfer(xfer); 2813 if (err) 2814 return (err); 2815 2816 /* Pipe isn't running, start first */ 2817 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2818 } 2819 2820 Static usbd_status 2821 ohci_device_bulk_start(usbd_xfer_handle xfer) 2822 { 2823 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2824 usbd_device_handle dev = opipe->pipe.device; 2825 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2826 int addr = dev->address; 2827 ohci_soft_td_t *data, *tail, *tdp; 2828 ohci_soft_ed_t *sed; 2829 int s, len, isread, endpt; 2830 usbd_status err; 2831 2832 if (sc->sc_dying) 2833 return (USBD_IOERROR); 2834 2835 #ifdef DIAGNOSTIC 2836 if (xfer->rqflags & URQ_REQUEST) { 2837 /* XXX panic */ 2838 printf("ohci_device_bulk_start: a request\n"); 2839 return (USBD_INVAL); 2840 } 2841 #endif 2842 2843 len = xfer->length; 2844 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 2845 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2846 sed = opipe->sed; 2847 2848 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d " 2849 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags, 2850 endpt)); 2851 2852 opipe->u.bulk.isread = isread; 2853 opipe->u.bulk.length = len; 2854 2855 /* Update device address */ 2856 sed->ed.ed_flags = htole32( 2857 (le32toh(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) | 2858 OHCI_ED_SET_FA(addr)); 2859 2860 /* Allocate a chain of new TDs (including a new tail). */ 2861 data = opipe->tail.td; 2862 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 2863 data, &tail); 2864 /* We want interrupt at the end of the transfer. */ 2865 tail->td.td_flags &= htole32(~OHCI_TD_INTR_MASK); 2866 tail->td.td_flags |= htole32(OHCI_TD_SET_DI(1)); 2867 tail->flags |= OHCI_CALL_DONE; 2868 tail = tail->nexttd; /* point at sentinel */ 2869 if (err) 2870 return (err); 2871 2872 tail->xfer = NULL; 2873 xfer->hcpriv = data; 2874 2875 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x " 2876 "td_cbp=0x%08x td_be=0x%08x\n", 2877 (int)le32toh(sed->ed.ed_flags), 2878 (int)le32toh(data->td.td_flags), 2879 (int)le32toh(data->td.td_cbp), 2880 (int)le32toh(data->td.td_be))); 2881 2882 #ifdef OHCI_DEBUG 2883 if (ohcidebug > 5) { 2884 ohci_dump_ed(sed); 2885 ohci_dump_tds(data); 2886 } 2887 #endif 2888 2889 /* Insert ED in schedule */ 2890 s = splusb(); 2891 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 2892 tdp->xfer = xfer; 2893 } 2894 sed->ed.ed_tailp = htole32(tail->physaddr); 2895 opipe->tail.td = tail; 2896 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 2897 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 2898 if (xfer->timeout && !sc->sc_bus.use_polling) { 2899 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2900 ohci_timeout, xfer); 2901 } 2902 2903 #if 0 2904 /* This goes wrong if we are too slow. */ 2905 if (ohcidebug > 10) { 2906 delay(10000); 2907 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2908 OREAD4(sc, OHCI_COMMAND_STATUS))); 2909 ohci_dump_ed(sed); 2910 ohci_dump_tds(data); 2911 } 2912 #endif 2913 2914 splx(s); 2915 2916 return (USBD_IN_PROGRESS); 2917 } 2918 2919 Static void 2920 ohci_device_bulk_abort(usbd_xfer_handle xfer) 2921 { 2922 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer)); 2923 ohci_abort_xfer(xfer, USBD_CANCELLED); 2924 } 2925 2926 /* 2927 * Close a device bulk pipe. 2928 */ 2929 Static void 2930 ohci_device_bulk_close(usbd_pipe_handle pipe) 2931 { 2932 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2933 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2934 2935 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe)); 2936 ohci_close_pipe(pipe, sc->sc_bulk_head); 2937 ohci_free_std(sc, opipe->tail.td); 2938 } 2939 2940 /************************/ 2941 2942 Static usbd_status 2943 ohci_device_intr_transfer(usbd_xfer_handle xfer) 2944 { 2945 usbd_status err; 2946 2947 /* Insert last in queue. */ 2948 err = usb_insert_transfer(xfer); 2949 if (err) 2950 return (err); 2951 2952 /* Pipe isn't running, start first */ 2953 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2954 } 2955 2956 Static usbd_status 2957 ohci_device_intr_start(usbd_xfer_handle xfer) 2958 { 2959 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2960 usbd_device_handle dev = opipe->pipe.device; 2961 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2962 ohci_soft_ed_t *sed = opipe->sed; 2963 ohci_soft_td_t *data, *tail; 2964 int len; 2965 int s; 2966 2967 if (sc->sc_dying) 2968 return (USBD_IOERROR); 2969 2970 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d " 2971 "flags=%d priv=%p\n", 2972 xfer, xfer->length, xfer->flags, xfer->priv)); 2973 2974 #ifdef DIAGNOSTIC 2975 if (xfer->rqflags & URQ_REQUEST) 2976 panic("ohci_device_intr_transfer: a request"); 2977 #endif 2978 2979 len = xfer->length; 2980 2981 data = opipe->tail.td; 2982 tail = ohci_alloc_std(sc); 2983 if (tail == NULL) 2984 return (USBD_NOMEM); 2985 tail->xfer = NULL; 2986 2987 data->td.td_flags = htole32( 2988 OHCI_TD_IN | OHCI_TD_NOCC | 2989 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 2990 if (xfer->flags & USBD_SHORT_XFER_OK) 2991 data->td.td_flags |= htole32(OHCI_TD_R); 2992 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf, 0)); 2993 data->nexttd = tail; 2994 data->td.td_nexttd = htole32(tail->physaddr); 2995 data->td.td_be = htole32(le32toh(data->td.td_cbp) + len - 1); 2996 data->len = len; 2997 data->xfer = xfer; 2998 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 2999 xfer->hcpriv = data; 3000 3001 #ifdef OHCI_DEBUG 3002 if (ohcidebug > 5) { 3003 DPRINTF(("ohci_device_intr_transfer:\n")); 3004 ohci_dump_ed(sed); 3005 ohci_dump_tds(data); 3006 } 3007 #endif 3008 3009 /* Insert ED in schedule */ 3010 s = splusb(); 3011 sed->ed.ed_tailp = htole32(tail->physaddr); 3012 opipe->tail.td = tail; 3013 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 3014 3015 #if 0 3016 /* 3017 * This goes horribly wrong, printing thousands of descriptors, 3018 * because false references are followed due to the fact that the 3019 * TD is gone. 3020 */ 3021 if (ohcidebug > 5) { 3022 usb_delay_ms(&sc->sc_bus, 5); 3023 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 3024 OREAD4(sc, OHCI_COMMAND_STATUS))); 3025 ohci_dump_ed(sed); 3026 ohci_dump_tds(data); 3027 } 3028 #endif 3029 splx(s); 3030 3031 return (USBD_IN_PROGRESS); 3032 } 3033 3034 /* Abort a device control request. */ 3035 Static void 3036 ohci_device_intr_abort(usbd_xfer_handle xfer) 3037 { 3038 if (xfer->pipe->intrxfer == xfer) { 3039 DPRINTF(("ohci_device_intr_abort: remove\n")); 3040 xfer->pipe->intrxfer = NULL; 3041 } 3042 ohci_abort_xfer(xfer, USBD_CANCELLED); 3043 } 3044 3045 /* Close a device interrupt pipe. */ 3046 Static void 3047 ohci_device_intr_close(usbd_pipe_handle pipe) 3048 { 3049 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3050 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3051 int nslots = opipe->u.intr.nslots; 3052 int pos = opipe->u.intr.pos; 3053 int j; 3054 ohci_soft_ed_t *p, *sed = opipe->sed; 3055 int s; 3056 3057 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 3058 pipe, nslots, pos)); 3059 s = splusb(); 3060 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 3061 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 3062 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) 3063 usb_delay_ms(&sc->sc_bus, 2); 3064 3065 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 3066 ; 3067 #ifdef DIAGNOSTIC 3068 if (p == NULL) 3069 panic("ohci_device_intr_close: ED not found"); 3070 #endif 3071 p->next = sed->next; 3072 p->ed.ed_nexted = sed->ed.ed_nexted; 3073 splx(s); 3074 3075 for (j = 0; j < nslots; j++) 3076 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 3077 3078 ohci_free_std(sc, opipe->tail.td); 3079 ohci_free_sed(sc, opipe->sed); 3080 } 3081 3082 Static usbd_status 3083 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival) 3084 { 3085 int i, j, s, best; 3086 u_int npoll, slow, shigh, nslots; 3087 u_int bestbw, bw; 3088 ohci_soft_ed_t *hsed, *sed = opipe->sed; 3089 3090 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 3091 if (ival == 0) { 3092 printf("ohci_setintr: 0 interval\n"); 3093 return (USBD_INVAL); 3094 } 3095 3096 npoll = OHCI_NO_INTRS; 3097 while (npoll > ival) 3098 npoll /= 2; 3099 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 3100 3101 /* 3102 * We now know which level in the tree the ED must go into. 3103 * Figure out which slot has most bandwidth left over. 3104 * Slots to examine: 3105 * npoll 3106 * 1 0 3107 * 2 1 2 3108 * 4 3 4 5 6 3109 * 8 7 8 9 10 11 12 13 14 3110 * N (N-1) .. (N-1+N-1) 3111 */ 3112 slow = npoll-1; 3113 shigh = slow + npoll; 3114 nslots = OHCI_NO_INTRS / npoll; 3115 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 3116 bw = 0; 3117 for (j = 0; j < nslots; j++) 3118 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 3119 if (bw < bestbw) { 3120 best = i; 3121 bestbw = bw; 3122 } 3123 } 3124 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 3125 best, slow, shigh, bestbw)); 3126 3127 s = splusb(); 3128 hsed = sc->sc_eds[best]; 3129 sed->next = hsed->next; 3130 sed->ed.ed_nexted = hsed->ed.ed_nexted; 3131 hsed->next = sed; 3132 hsed->ed.ed_nexted = htole32(sed->physaddr); 3133 splx(s); 3134 3135 for (j = 0; j < nslots; j++) 3136 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 3137 opipe->u.intr.nslots = nslots; 3138 opipe->u.intr.pos = best; 3139 3140 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 3141 return (USBD_NORMAL_COMPLETION); 3142 } 3143 3144 /***********************/ 3145 3146 usbd_status 3147 ohci_device_isoc_transfer(usbd_xfer_handle xfer) 3148 { 3149 usbd_status err; 3150 3151 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer)); 3152 3153 /* Put it on our queue, */ 3154 err = usb_insert_transfer(xfer); 3155 3156 /* bail out on error, */ 3157 if (err && err != USBD_IN_PROGRESS) 3158 return (err); 3159 3160 /* XXX should check inuse here */ 3161 3162 /* insert into schedule, */ 3163 ohci_device_isoc_enter(xfer); 3164 3165 /* and start if the pipe wasn't running */ 3166 if (!err) 3167 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 3168 3169 return (err); 3170 } 3171 3172 void 3173 ohci_device_isoc_enter(usbd_xfer_handle xfer) 3174 { 3175 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3176 usbd_device_handle dev = opipe->pipe.device; 3177 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 3178 ohci_soft_ed_t *sed = opipe->sed; 3179 struct iso *iso = &opipe->u.iso; 3180 ohci_soft_itd_t *sitd, *nsitd; 3181 ohci_physaddr_t buf, offs, noffs, bp0; 3182 int i, ncur, nframes; 3183 int s; 3184 3185 DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p " 3186 "nframes=%d\n", 3187 iso->inuse, iso->next, xfer, xfer->nframes)); 3188 3189 if (sc->sc_dying) 3190 return; 3191 3192 if (iso->next == -1) { 3193 /* Not in use yet, schedule it a few frames ahead. */ 3194 iso->next = le32toh(sc->sc_hcca->hcca_frame_number) + 5; 3195 DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n", 3196 iso->next)); 3197 } 3198 3199 sitd = opipe->tail.itd; 3200 buf = DMAADDR(&xfer->dmabuf, 0); 3201 bp0 = OHCI_PAGE(buf); 3202 offs = OHCI_PAGE_OFFSET(buf); 3203 nframes = xfer->nframes; 3204 xfer->hcpriv = sitd; 3205 for (i = ncur = 0; i < nframes; i++, ncur++) { 3206 noffs = offs + xfer->frlengths[i]; 3207 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ 3208 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */ 3209 3210 /* Allocate next ITD */ 3211 nsitd = ohci_alloc_sitd(sc); 3212 if (nsitd == NULL) { 3213 /* XXX what now? */ 3214 printf("%s: isoc TD alloc failed\n", 3215 USBDEVNAME(sc->sc_bus.bdev)); 3216 return; 3217 } 3218 3219 /* Fill current ITD */ 3220 sitd->itd.itd_flags = htole32( 3221 OHCI_ITD_NOCC | 3222 OHCI_ITD_SET_SF(iso->next) | 3223 OHCI_ITD_SET_DI(6) | /* delay intr a little */ 3224 OHCI_ITD_SET_FC(ncur)); 3225 sitd->itd.itd_bp0 = htole32(bp0); 3226 sitd->nextitd = nsitd; 3227 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 3228 sitd->itd.itd_be = htole32(bp0 + offs - 1); 3229 sitd->xfer = xfer; 3230 sitd->flags = 0; 3231 3232 sitd = nsitd; 3233 iso->next = iso->next + ncur; 3234 bp0 = OHCI_PAGE(buf + offs); 3235 ncur = 0; 3236 } 3237 sitd->itd.itd_offset[ncur] = htole16(OHCI_ITD_MK_OFFS(offs)); 3238 offs = noffs; 3239 } 3240 nsitd = ohci_alloc_sitd(sc); 3241 if (nsitd == NULL) { 3242 /* XXX what now? */ 3243 printf("%s: isoc TD alloc failed\n", 3244 USBDEVNAME(sc->sc_bus.bdev)); 3245 return; 3246 } 3247 /* Fixup last used ITD */ 3248 sitd->itd.itd_flags = htole32( 3249 OHCI_ITD_NOCC | 3250 OHCI_ITD_SET_SF(iso->next) | 3251 OHCI_ITD_SET_DI(0) | 3252 OHCI_ITD_SET_FC(ncur)); 3253 sitd->itd.itd_bp0 = htole32(bp0); 3254 sitd->nextitd = nsitd; 3255 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 3256 sitd->itd.itd_be = htole32(bp0 + offs - 1); 3257 sitd->xfer = xfer; 3258 sitd->flags = OHCI_CALL_DONE; 3259 3260 iso->next = iso->next + ncur; 3261 iso->inuse += nframes; 3262 3263 xfer->actlen = offs; /* XXX pretend we did it all */ 3264 3265 xfer->status = USBD_IN_PROGRESS; 3266 3267 #ifdef OHCI_DEBUG 3268 if (ohcidebug > 5) { 3269 DPRINTF(("ohci_device_isoc_enter: frame=%d\n", 3270 le32toh(sc->sc_hcca->hcca_frame_number))); 3271 ohci_dump_itds(xfer->hcpriv); 3272 ohci_dump_ed(sed); 3273 } 3274 #endif 3275 3276 s = splusb(); 3277 opipe->tail.itd = nsitd; 3278 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 3279 sed->ed.ed_tailp = htole32(nsitd->physaddr); 3280 splx(s); 3281 3282 #ifdef OHCI_DEBUG 3283 if (ohcidebug > 5) { 3284 delay(150000); 3285 DPRINTF(("ohci_device_isoc_enter: after frame=%d\n", 3286 le32toh(sc->sc_hcca->hcca_frame_number))); 3287 ohci_dump_itds(xfer->hcpriv); 3288 ohci_dump_ed(sed); 3289 } 3290 #endif 3291 } 3292 3293 usbd_status 3294 ohci_device_isoc_start(usbd_xfer_handle xfer) 3295 { 3296 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3297 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3298 3299 DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer)); 3300 3301 if (sc->sc_dying) 3302 return (USBD_IOERROR); 3303 3304 #ifdef DIAGNOSTIC 3305 if (xfer->status != USBD_IN_PROGRESS) 3306 printf("ohci_device_isoc_start: not in progress %p\n", xfer); 3307 #endif 3308 3309 /* XXX anything to do? */ 3310 3311 return (USBD_IN_PROGRESS); 3312 } 3313 3314 void 3315 ohci_device_isoc_abort(usbd_xfer_handle xfer) 3316 { 3317 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3318 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3319 ohci_soft_ed_t *sed; 3320 ohci_soft_itd_t *sitd; 3321 int s; 3322 3323 s = splusb(); 3324 3325 DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer)); 3326 3327 /* Transfer is already done. */ 3328 if (xfer->status != USBD_NOT_STARTED && 3329 xfer->status != USBD_IN_PROGRESS) { 3330 splx(s); 3331 printf("ohci_device_isoc_abort: early return\n"); 3332 return; 3333 } 3334 3335 /* Give xfer the requested abort code. */ 3336 xfer->status = USBD_CANCELLED; 3337 3338 sed = opipe->sed; 3339 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 3340 3341 sitd = xfer->hcpriv; 3342 #ifdef DIAGNOSTIC 3343 if (sitd == NULL) { 3344 splx(s); 3345 printf("ohci_device_isoc_abort: hcpriv==0\n"); 3346 return; 3347 } 3348 #endif 3349 for (; sitd->xfer == xfer; sitd = sitd->nextitd) { 3350 #ifdef DIAGNOSTIC 3351 DPRINTFN(1,("abort sets done sitd=%p\n", sitd)); 3352 sitd->isdone = 1; 3353 #endif 3354 } 3355 3356 splx(s); 3357 3358 usb_delay_ms(&sc->sc_bus, OHCI_ITD_NOFFSET); 3359 3360 s = splusb(); 3361 3362 /* Run callback. */ 3363 usb_transfer_complete(xfer); 3364 3365 sed->ed.ed_headp = htole32(sitd->physaddr); /* unlink TDs */ 3366 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 3367 3368 splx(s); 3369 } 3370 3371 void 3372 ohci_device_isoc_done(usbd_xfer_handle xfer) 3373 { 3374 3375 DPRINTFN(1,("ohci_device_isoc_done: xfer=%p\n", xfer)); 3376 3377 xfer->hcpriv = NULL; 3378 } 3379 3380 usbd_status 3381 ohci_setup_isoc(usbd_pipe_handle pipe) 3382 { 3383 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3384 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3385 struct iso *iso = &opipe->u.iso; 3386 int s; 3387 3388 iso->next = -1; 3389 iso->inuse = 0; 3390 3391 s = splusb(); 3392 ohci_add_ed(opipe->sed, sc->sc_isoc_head); 3393 splx(s); 3394 3395 return (USBD_NORMAL_COMPLETION); 3396 } 3397 3398 void 3399 ohci_device_isoc_close(usbd_pipe_handle pipe) 3400 { 3401 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3402 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3403 3404 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe)); 3405 ohci_close_pipe(pipe, sc->sc_isoc_head); 3406 #ifdef DIAGNOSTIC 3407 opipe->tail.itd->isdone = 1; 3408 #endif 3409 ohci_free_sitd(sc, opipe->tail.itd); 3410 } 3411
Indexes created Tue Sep 23 13:09:54 GMT 2025