ohci.c revision 1.148
1 /* $NetBSD: ohci.c,v 1.148 2004/06/22 18:27:46 mycroft Exp $ */ 2 /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */ 3 4 /* 5 * Copyright (c) 1998 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Lennart Augustsson (lennart (at) augustsson.net) at 10 * Carlstedt Research & Technology. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. All advertising materials mentioning features or use of this software 21 * must display the following acknowledgement: 22 * This product includes software developed by the NetBSD 23 * Foundation, Inc. and its contributors. 24 * 4. Neither the name of The NetBSD Foundation nor the names of its 25 * contributors may be used to endorse or promote products derived 26 * from this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 29 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 30 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 31 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 32 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 33 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 34 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 35 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 36 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 37 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 * POSSIBILITY OF SUCH DAMAGE. 39 */ 40 41 /* 42 * USB Open Host Controller driver. 43 * 44 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html 45 * USB spec: http://www.usb.org/developers/docs/usbspec.zip 46 */ 47 48 #include <sys/cdefs.h> 49 __KERNEL_RCSID(0, "$NetBSD: ohci.c,v 1.148 2004/06/22 18:27:46 mycroft Exp $"); 50 51 #include <sys/param.h> 52 #include <sys/systm.h> 53 #include <sys/malloc.h> 54 #if defined(__NetBSD__) || defined(__OpenBSD__) 55 #include <sys/kernel.h> 56 #include <sys/device.h> 57 #include <sys/select.h> 58 #elif defined(__FreeBSD__) 59 #include <sys/module.h> 60 #include <sys/bus.h> 61 #include <machine/bus_pio.h> 62 #include <machine/bus_memio.h> 63 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 64 #include <machine/cpu.h> 65 #endif 66 #endif 67 #include <sys/proc.h> 68 #include <sys/queue.h> 69 70 #include <machine/bus.h> 71 #include <machine/endian.h> 72 73 #include <dev/usb/usb.h> 74 #include <dev/usb/usbdi.h> 75 #include <dev/usb/usbdivar.h> 76 #include <dev/usb/usb_mem.h> 77 #include <dev/usb/usb_quirks.h> 78 79 #include <dev/usb/ohcireg.h> 80 #include <dev/usb/ohcivar.h> 81 82 #if defined(__FreeBSD__) 83 #include <machine/clock.h> 84 85 #define delay(d) DELAY(d) 86 #endif 87 88 #if defined(__OpenBSD__) 89 struct cfdriver ohci_cd = { 90 NULL, "ohci", DV_DULL 91 }; 92 #endif 93 94 #ifdef OHCI_DEBUG 95 #define DPRINTF(x) if (ohcidebug) logprintf x 96 #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x 97 int ohcidebug = 0; 98 #ifndef __NetBSD__ 99 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 100 #endif 101 #else 102 #define DPRINTF(x) 103 #define DPRINTFN(n,x) 104 #endif 105 106 /* 107 * The OHCI controller is little endian, so on big endian machines 108 * the data strored in memory needs to be swapped. 109 */ 110 #if defined(__FreeBSD__) || defined(__OpenBSD__) 111 #if BYTE_ORDER == BIG_ENDIAN 112 #define htole32(x) (bswap32(x)) 113 #define le32toh(x) (bswap32(x)) 114 #else 115 #define htole32(x) (x) 116 #define le32toh(x) (x) 117 #endif 118 #endif 119 120 struct ohci_pipe; 121 122 Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *); 123 Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *); 124 125 Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *); 126 Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *); 127 128 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *); 129 Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *); 130 131 #if 0 132 Static void ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *, 133 ohci_soft_td_t *); 134 #endif 135 Static usbd_status ohci_alloc_std_chain(struct ohci_pipe *, 136 ohci_softc_t *, int, int, usbd_xfer_handle, 137 ohci_soft_td_t *, ohci_soft_td_t **); 138 139 Static void ohci_shutdown(void *v); 140 Static void ohci_power(int, void *); 141 Static usbd_status ohci_open(usbd_pipe_handle); 142 Static void ohci_poll(struct usbd_bus *); 143 Static void ohci_softintr(void *); 144 Static void ohci_waitintr(ohci_softc_t *, usbd_xfer_handle); 145 Static void ohci_add_done(ohci_softc_t *, ohci_physaddr_t); 146 Static void ohci_rhsc(ohci_softc_t *, usbd_xfer_handle); 147 148 Static usbd_status ohci_device_request(usbd_xfer_handle xfer); 149 Static void ohci_add_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 150 Static void ohci_rem_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 151 Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *); 152 Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *); 153 Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t); 154 Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *); 155 Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *); 156 Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t); 157 158 Static usbd_status ohci_setup_isoc(usbd_pipe_handle pipe); 159 Static void ohci_device_isoc_enter(usbd_xfer_handle); 160 161 Static usbd_status ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 162 Static void ohci_freem(struct usbd_bus *, usb_dma_t *); 163 164 Static usbd_xfer_handle ohci_allocx(struct usbd_bus *); 165 Static void ohci_freex(struct usbd_bus *, usbd_xfer_handle); 166 167 Static usbd_status ohci_root_ctrl_transfer(usbd_xfer_handle); 168 Static usbd_status ohci_root_ctrl_start(usbd_xfer_handle); 169 Static void ohci_root_ctrl_abort(usbd_xfer_handle); 170 Static void ohci_root_ctrl_close(usbd_pipe_handle); 171 Static void ohci_root_ctrl_done(usbd_xfer_handle); 172 173 Static usbd_status ohci_root_intr_transfer(usbd_xfer_handle); 174 Static usbd_status ohci_root_intr_start(usbd_xfer_handle); 175 Static void ohci_root_intr_abort(usbd_xfer_handle); 176 Static void ohci_root_intr_close(usbd_pipe_handle); 177 Static void ohci_root_intr_done(usbd_xfer_handle); 178 179 Static usbd_status ohci_device_ctrl_transfer(usbd_xfer_handle); 180 Static usbd_status ohci_device_ctrl_start(usbd_xfer_handle); 181 Static void ohci_device_ctrl_abort(usbd_xfer_handle); 182 Static void ohci_device_ctrl_close(usbd_pipe_handle); 183 Static void ohci_device_ctrl_done(usbd_xfer_handle); 184 185 Static usbd_status ohci_device_bulk_transfer(usbd_xfer_handle); 186 Static usbd_status ohci_device_bulk_start(usbd_xfer_handle); 187 Static void ohci_device_bulk_abort(usbd_xfer_handle); 188 Static void ohci_device_bulk_close(usbd_pipe_handle); 189 Static void ohci_device_bulk_done(usbd_xfer_handle); 190 191 Static usbd_status ohci_device_intr_transfer(usbd_xfer_handle); 192 Static usbd_status ohci_device_intr_start(usbd_xfer_handle); 193 Static void ohci_device_intr_abort(usbd_xfer_handle); 194 Static void ohci_device_intr_close(usbd_pipe_handle); 195 Static void ohci_device_intr_done(usbd_xfer_handle); 196 197 Static usbd_status ohci_device_isoc_transfer(usbd_xfer_handle); 198 Static usbd_status ohci_device_isoc_start(usbd_xfer_handle); 199 Static void ohci_device_isoc_abort(usbd_xfer_handle); 200 Static void ohci_device_isoc_close(usbd_pipe_handle); 201 Static void ohci_device_isoc_done(usbd_xfer_handle); 202 203 Static usbd_status ohci_device_setintr(ohci_softc_t *sc, 204 struct ohci_pipe *pipe, int ival); 205 206 Static int ohci_str(usb_string_descriptor_t *, int, const char *); 207 208 Static void ohci_timeout(void *); 209 Static void ohci_timeout_task(void *); 210 Static void ohci_rhsc_able(ohci_softc_t *, int); 211 Static void ohci_rhsc_enable(void *); 212 213 Static void ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *); 214 Static void ohci_abort_xfer(usbd_xfer_handle, usbd_status); 215 216 Static void ohci_device_clear_toggle(usbd_pipe_handle pipe); 217 Static void ohci_noop(usbd_pipe_handle pipe); 218 219 #ifdef OHCI_DEBUG 220 Static void ohci_dumpregs(ohci_softc_t *); 221 Static void ohci_dump_tds(ohci_soft_td_t *); 222 Static void ohci_dump_td(ohci_soft_td_t *); 223 Static void ohci_dump_ed(ohci_soft_ed_t *); 224 Static void ohci_dump_itd(ohci_soft_itd_t *); 225 Static void ohci_dump_itds(ohci_soft_itd_t *); 226 #endif 227 228 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 229 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 230 #define OWRITE1(sc, r, x) \ 231 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 232 #define OWRITE2(sc, r, x) \ 233 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 234 #define OWRITE4(sc, r, x) \ 235 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 236 #define OREAD1(sc, r) (OBARR(sc), bus_space_read_1((sc)->iot, (sc)->ioh, (r))) 237 #define OREAD2(sc, r) (OBARR(sc), bus_space_read_2((sc)->iot, (sc)->ioh, (r))) 238 #define OREAD4(sc, r) (OBARR(sc), bus_space_read_4((sc)->iot, (sc)->ioh, (r))) 239 240 /* Reverse the bits in a value 0 .. 31 */ 241 Static u_int8_t revbits[OHCI_NO_INTRS] = 242 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 243 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 244 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 245 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 246 247 struct ohci_pipe { 248 struct usbd_pipe pipe; 249 ohci_soft_ed_t *sed; 250 union { 251 ohci_soft_td_t *td; 252 ohci_soft_itd_t *itd; 253 } tail; 254 /* Info needed for different pipe kinds. */ 255 union { 256 /* Control pipe */ 257 struct { 258 usb_dma_t reqdma; 259 u_int length; 260 ohci_soft_td_t *setup, *data, *stat; 261 } ctl; 262 /* Interrupt pipe */ 263 struct { 264 int nslots; 265 int pos; 266 } intr; 267 /* Bulk pipe */ 268 struct { 269 u_int length; 270 int isread; 271 } bulk; 272 /* Iso pipe */ 273 struct iso { 274 int next, inuse; 275 } iso; 276 } u; 277 }; 278 279 #define OHCI_INTR_ENDPT 1 280 281 Static struct usbd_bus_methods ohci_bus_methods = { 282 ohci_open, 283 ohci_softintr, 284 ohci_poll, 285 ohci_allocm, 286 ohci_freem, 287 ohci_allocx, 288 ohci_freex, 289 }; 290 291 Static struct usbd_pipe_methods ohci_root_ctrl_methods = { 292 ohci_root_ctrl_transfer, 293 ohci_root_ctrl_start, 294 ohci_root_ctrl_abort, 295 ohci_root_ctrl_close, 296 ohci_noop, 297 ohci_root_ctrl_done, 298 }; 299 300 Static struct usbd_pipe_methods ohci_root_intr_methods = { 301 ohci_root_intr_transfer, 302 ohci_root_intr_start, 303 ohci_root_intr_abort, 304 ohci_root_intr_close, 305 ohci_noop, 306 ohci_root_intr_done, 307 }; 308 309 Static struct usbd_pipe_methods ohci_device_ctrl_methods = { 310 ohci_device_ctrl_transfer, 311 ohci_device_ctrl_start, 312 ohci_device_ctrl_abort, 313 ohci_device_ctrl_close, 314 ohci_noop, 315 ohci_device_ctrl_done, 316 }; 317 318 Static struct usbd_pipe_methods ohci_device_intr_methods = { 319 ohci_device_intr_transfer, 320 ohci_device_intr_start, 321 ohci_device_intr_abort, 322 ohci_device_intr_close, 323 ohci_device_clear_toggle, 324 ohci_device_intr_done, 325 }; 326 327 Static struct usbd_pipe_methods ohci_device_bulk_methods = { 328 ohci_device_bulk_transfer, 329 ohci_device_bulk_start, 330 ohci_device_bulk_abort, 331 ohci_device_bulk_close, 332 ohci_device_clear_toggle, 333 ohci_device_bulk_done, 334 }; 335 336 Static struct usbd_pipe_methods ohci_device_isoc_methods = { 337 ohci_device_isoc_transfer, 338 ohci_device_isoc_start, 339 ohci_device_isoc_abort, 340 ohci_device_isoc_close, 341 ohci_noop, 342 ohci_device_isoc_done, 343 }; 344 345 #if defined(__NetBSD__) || defined(__OpenBSD__) 346 int 347 ohci_activate(device_ptr_t self, enum devact act) 348 { 349 struct ohci_softc *sc = (struct ohci_softc *)self; 350 int rv = 0; 351 352 switch (act) { 353 case DVACT_ACTIVATE: 354 return (EOPNOTSUPP); 355 356 case DVACT_DEACTIVATE: 357 if (sc->sc_child != NULL) 358 rv = config_deactivate(sc->sc_child); 359 sc->sc_dying = 1; 360 break; 361 } 362 return (rv); 363 } 364 365 int 366 ohci_detach(struct ohci_softc *sc, int flags) 367 { 368 int rv = 0; 369 370 if (sc->sc_child != NULL) 371 rv = config_detach(sc->sc_child, flags); 372 373 if (rv != 0) 374 return (rv); 375 376 usb_uncallout(sc->sc_tmo_rhsc, ohci_rhsc_enable, sc); 377 378 #if defined(__NetBSD__) || defined(__OpenBSD__) 379 powerhook_disestablish(sc->sc_powerhook); 380 shutdownhook_disestablish(sc->sc_shutdownhook); 381 #endif 382 383 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 384 385 /* free data structures XXX */ 386 387 return (rv); 388 } 389 #endif 390 391 ohci_soft_ed_t * 392 ohci_alloc_sed(ohci_softc_t *sc) 393 { 394 ohci_soft_ed_t *sed; 395 usbd_status err; 396 int i, offs; 397 usb_dma_t dma; 398 399 if (sc->sc_freeeds == NULL) { 400 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 401 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 402 OHCI_ED_ALIGN, &dma); 403 if (err) 404 return (0); 405 for(i = 0; i < OHCI_SED_CHUNK; i++) { 406 offs = i * OHCI_SED_SIZE; 407 sed = KERNADDR(&dma, offs); 408 sed->physaddr = DMAADDR(&dma, offs); 409 sed->next = sc->sc_freeeds; 410 sc->sc_freeeds = sed; 411 } 412 } 413 sed = sc->sc_freeeds; 414 sc->sc_freeeds = sed->next; 415 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 416 sed->next = 0; 417 return (sed); 418 } 419 420 void 421 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 422 { 423 sed->next = sc->sc_freeeds; 424 sc->sc_freeeds = sed; 425 } 426 427 ohci_soft_td_t * 428 ohci_alloc_std(ohci_softc_t *sc) 429 { 430 ohci_soft_td_t *std; 431 usbd_status err; 432 int i, offs; 433 usb_dma_t dma; 434 int s; 435 436 if (sc->sc_freetds == NULL) { 437 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 438 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 439 OHCI_TD_ALIGN, &dma); 440 if (err) 441 return (NULL); 442 s = splusb(); 443 for(i = 0; i < OHCI_STD_CHUNK; i++) { 444 offs = i * OHCI_STD_SIZE; 445 std = KERNADDR(&dma, offs); 446 std->physaddr = DMAADDR(&dma, offs); 447 std->nexttd = sc->sc_freetds; 448 sc->sc_freetds = std; 449 } 450 splx(s); 451 } 452 453 s = splusb(); 454 std = sc->sc_freetds; 455 sc->sc_freetds = std->nexttd; 456 memset(&std->td, 0, sizeof(ohci_td_t)); 457 std->nexttd = NULL; 458 std->xfer = NULL; 459 ohci_hash_add_td(sc, std); 460 splx(s); 461 462 return (std); 463 } 464 465 void 466 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std) 467 { 468 int s; 469 470 s = splusb(); 471 ohci_hash_rem_td(sc, std); 472 std->nexttd = sc->sc_freetds; 473 sc->sc_freetds = std; 474 splx(s); 475 } 476 477 usbd_status 478 ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc, 479 int alen, int rd, usbd_xfer_handle xfer, 480 ohci_soft_td_t *sp, ohci_soft_td_t **ep) 481 { 482 ohci_soft_td_t *next, *cur; 483 ohci_physaddr_t dataphys, dataphysend; 484 u_int32_t tdflags; 485 int len, curlen; 486 usb_dma_t *dma = &xfer->dmabuf; 487 u_int16_t flags = xfer->flags; 488 489 DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen)); 490 491 len = alen; 492 cur = sp; 493 dataphys = DMAADDR(dma, 0); 494 dataphysend = OHCI_PAGE(dataphys + len - 1); 495 tdflags = htole32( 496 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 497 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) | 498 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR); 499 500 for (;;) { 501 next = ohci_alloc_std(sc); 502 if (next == NULL) 503 goto nomem; 504 505 /* The OHCI hardware can handle at most one page crossing. */ 506 if (OHCI_PAGE(dataphys) == dataphysend || 507 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) { 508 /* we can handle it in this TD */ 509 curlen = len; 510 } else { 511 /* must use multiple TDs, fill as much as possible. */ 512 curlen = 2 * OHCI_PAGE_SIZE - 513 (dataphys & (OHCI_PAGE_SIZE-1)); 514 /* the length must be a multiple of the max size */ 515 curlen -= curlen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize); 516 #ifdef DIAGNOSTIC 517 if (curlen == 0) 518 panic("ohci_alloc_std: curlen == 0"); 519 #endif 520 } 521 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x " 522 "dataphysend=0x%08x len=%d curlen=%d\n", 523 dataphys, dataphysend, 524 len, curlen)); 525 len -= curlen; 526 527 cur->td.td_flags = tdflags; 528 cur->td.td_cbp = htole32(dataphys); 529 cur->nexttd = next; 530 cur->td.td_nexttd = htole32(next->physaddr); 531 cur->td.td_be = htole32(dataphys + curlen - 1); 532 cur->len = curlen; 533 cur->flags = OHCI_ADD_LEN; 534 cur->xfer = xfer; 535 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n", 536 dataphys, dataphys + curlen - 1)); 537 if (len == 0) 538 break; 539 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n")); 540 dataphys += curlen; 541 cur = next; 542 } 543 if ((flags & USBD_FORCE_SHORT_XFER) && 544 alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) { 545 /* Force a 0 length transfer at the end. */ 546 547 cur = next; 548 next = ohci_alloc_std(sc); 549 if (next == NULL) 550 goto nomem; 551 552 cur->td.td_flags = tdflags; 553 cur->td.td_cbp = 0; /* indicate 0 length packet */ 554 cur->nexttd = next; 555 cur->td.td_nexttd = htole32(next->physaddr); 556 cur->td.td_be = ~0; 557 cur->len = 0; 558 cur->flags = 0; 559 cur->xfer = xfer; 560 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n")); 561 } 562 *ep = cur; 563 564 return (USBD_NORMAL_COMPLETION); 565 566 nomem: 567 /* XXX free chain */ 568 return (USBD_NOMEM); 569 } 570 571 #if 0 572 Static void 573 ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std, 574 ohci_soft_td_t *stdend) 575 { 576 ohci_soft_td_t *p; 577 578 for (; std != stdend; std = p) { 579 p = std->nexttd; 580 ohci_free_std(sc, std); 581 } 582 } 583 #endif 584 585 ohci_soft_itd_t * 586 ohci_alloc_sitd(ohci_softc_t *sc) 587 { 588 ohci_soft_itd_t *sitd; 589 usbd_status err; 590 int i, s, offs; 591 usb_dma_t dma; 592 593 if (sc->sc_freeitds == NULL) { 594 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n")); 595 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK, 596 OHCI_ITD_ALIGN, &dma); 597 if (err) 598 return (NULL); 599 s = splusb(); 600 for(i = 0; i < OHCI_SITD_CHUNK; i++) { 601 offs = i * OHCI_SITD_SIZE; 602 sitd = KERNADDR(&dma, offs); 603 sitd->physaddr = DMAADDR(&dma, offs); 604 sitd->nextitd = sc->sc_freeitds; 605 sc->sc_freeitds = sitd; 606 } 607 splx(s); 608 } 609 610 s = splusb(); 611 sitd = sc->sc_freeitds; 612 sc->sc_freeitds = sitd->nextitd; 613 memset(&sitd->itd, 0, sizeof(ohci_itd_t)); 614 sitd->nextitd = NULL; 615 sitd->xfer = NULL; 616 ohci_hash_add_itd(sc, sitd); 617 splx(s); 618 619 #ifdef DIAGNOSTIC 620 sitd->isdone = 0; 621 #endif 622 623 return (sitd); 624 } 625 626 void 627 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 628 { 629 int s; 630 631 DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd)); 632 633 #ifdef DIAGNOSTIC 634 if (!sitd->isdone) { 635 panic("ohci_free_sitd: sitd=%p not done", sitd); 636 return; 637 } 638 /* Warn double free */ 639 sitd->isdone = 0; 640 #endif 641 642 s = splusb(); 643 ohci_hash_rem_itd(sc, sitd); 644 sitd->nextitd = sc->sc_freeitds; 645 sc->sc_freeitds = sitd; 646 splx(s); 647 } 648 649 usbd_status 650 ohci_init(ohci_softc_t *sc) 651 { 652 ohci_soft_ed_t *sed, *psed; 653 usbd_status err; 654 int i; 655 u_int32_t s, ctl, ival, hcr, fm, per, rev, desca; 656 657 DPRINTF(("ohci_init: start\n")); 658 #if defined(__OpenBSD__) 659 printf(","); 660 #else 661 printf("%s:", USBDEVNAME(sc->sc_bus.bdev)); 662 #endif 663 rev = OREAD4(sc, OHCI_REVISION); 664 printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev), 665 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 666 667 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 668 printf("%s: unsupported OHCI revision\n", 669 USBDEVNAME(sc->sc_bus.bdev)); 670 sc->sc_bus.usbrev = USBREV_UNKNOWN; 671 return (USBD_INVAL); 672 } 673 sc->sc_bus.usbrev = USBREV_1_0; 674 675 for (i = 0; i < OHCI_HASH_SIZE; i++) 676 LIST_INIT(&sc->sc_hash_tds[i]); 677 for (i = 0; i < OHCI_HASH_SIZE; i++) 678 LIST_INIT(&sc->sc_hash_itds[i]); 679 680 SIMPLEQ_INIT(&sc->sc_free_xfers); 681 682 /* XXX determine alignment by R/W */ 683 /* Allocate the HCCA area. */ 684 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 685 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 686 if (err) 687 return (err); 688 sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0); 689 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 690 691 sc->sc_eintrs = OHCI_NORMAL_INTRS; 692 693 /* Allocate dummy ED that starts the control list. */ 694 sc->sc_ctrl_head = ohci_alloc_sed(sc); 695 if (sc->sc_ctrl_head == NULL) { 696 err = USBD_NOMEM; 697 goto bad1; 698 } 699 sc->sc_ctrl_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 700 701 /* Allocate dummy ED that starts the bulk list. */ 702 sc->sc_bulk_head = ohci_alloc_sed(sc); 703 if (sc->sc_bulk_head == NULL) { 704 err = USBD_NOMEM; 705 goto bad2; 706 } 707 sc->sc_bulk_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 708 709 /* Allocate dummy ED that starts the isochronous list. */ 710 sc->sc_isoc_head = ohci_alloc_sed(sc); 711 if (sc->sc_isoc_head == NULL) { 712 err = USBD_NOMEM; 713 goto bad3; 714 } 715 sc->sc_isoc_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 716 717 /* Allocate all the dummy EDs that make up the interrupt tree. */ 718 for (i = 0; i < OHCI_NO_EDS; i++) { 719 sed = ohci_alloc_sed(sc); 720 if (sed == NULL) { 721 while (--i >= 0) 722 ohci_free_sed(sc, sc->sc_eds[i]); 723 err = USBD_NOMEM; 724 goto bad4; 725 } 726 /* All ED fields are set to 0. */ 727 sc->sc_eds[i] = sed; 728 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 729 if (i != 0) 730 psed = sc->sc_eds[(i-1) / 2]; 731 else 732 psed= sc->sc_isoc_head; 733 sed->next = psed; 734 sed->ed.ed_nexted = htole32(psed->physaddr); 735 } 736 /* 737 * Fill HCCA interrupt table. The bit reversal is to get 738 * the tree set up properly to spread the interrupts. 739 */ 740 for (i = 0; i < OHCI_NO_INTRS; i++) 741 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 742 htole32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 743 744 #ifdef OHCI_DEBUG 745 if (ohcidebug > 15) { 746 for (i = 0; i < OHCI_NO_EDS; i++) { 747 printf("ed#%d ", i); 748 ohci_dump_ed(sc->sc_eds[i]); 749 } 750 printf("iso "); 751 ohci_dump_ed(sc->sc_isoc_head); 752 } 753 #endif 754 755 /* Determine in what context we are running. */ 756 ctl = OREAD4(sc, OHCI_CONTROL); 757 if (ctl & OHCI_IR) { 758 /* SMM active, request change */ 759 DPRINTF(("ohci_init: SMM active, request owner change\n")); 760 s = OREAD4(sc, OHCI_COMMAND_STATUS); 761 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 762 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 763 usb_delay_ms(&sc->sc_bus, 1); 764 ctl = OREAD4(sc, OHCI_CONTROL); 765 } 766 if ((ctl & OHCI_IR) == 0) { 767 printf("%s: SMM does not respond, resetting\n", 768 USBDEVNAME(sc->sc_bus.bdev)); 769 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 770 goto reset; 771 } 772 #if 0 773 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */ 774 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 775 /* BIOS started controller. */ 776 DPRINTF(("ohci_init: BIOS active\n")); 777 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 778 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL); 779 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 780 } 781 #endif 782 } else { 783 DPRINTF(("ohci_init: cold started\n")); 784 reset: 785 /* Controller was cold started. */ 786 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 787 } 788 789 /* 790 * This reset should not be necessary according to the OHCI spec, but 791 * without it some controllers do not start. 792 */ 793 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 794 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 795 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 796 797 /* We now own the host controller and the bus has been reset. */ 798 ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL)); 799 800 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 801 /* Nominal time for a reset is 10 us. */ 802 for (i = 0; i < 10; i++) { 803 delay(10); 804 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 805 if (!hcr) 806 break; 807 } 808 if (hcr) { 809 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 810 err = USBD_IOERROR; 811 goto bad5; 812 } 813 #ifdef OHCI_DEBUG 814 if (ohcidebug > 15) 815 ohci_dumpregs(sc); 816 #endif 817 818 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 819 820 /* Set up HC registers. */ 821 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 822 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 823 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 824 /* disable all interrupts and then switch on all desired interrupts */ 825 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 826 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 827 /* switch on desired functional features */ 828 ctl = OREAD4(sc, OHCI_CONTROL); 829 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 830 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 831 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL; 832 /* And finally start it! */ 833 OWRITE4(sc, OHCI_CONTROL, ctl); 834 835 /* 836 * The controller is now OPERATIONAL. Set a some final 837 * registers that should be set earlier, but that the 838 * controller ignores when in the SUSPEND state. 839 */ 840 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 841 fm |= OHCI_FSMPS(ival) | ival; 842 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 843 per = OHCI_PERIODIC(ival); /* 90% periodic */ 844 OWRITE4(sc, OHCI_PERIODIC_START, per); 845 846 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */ 847 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 848 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP); 849 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 850 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY); 851 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca); 852 853 /* 854 * The AMD756 requires a delay before re-reading the register, 855 * otherwise it will occasionally report 0 ports. 856 */ 857 sc->sc_noport = 0; 858 for (i = 0; i < 10 && sc->sc_noport == 0; i++) { 859 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY); 860 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 861 } 862 863 #ifdef OHCI_DEBUG 864 if (ohcidebug > 5) 865 ohci_dumpregs(sc); 866 #endif 867 868 /* Set up the bus struct. */ 869 sc->sc_bus.methods = &ohci_bus_methods; 870 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 871 872 #if defined(__NetBSD__) || defined(__OpenBSD__) 873 sc->sc_control = sc->sc_intre = 0; 874 sc->sc_powerhook = powerhook_establish(ohci_power, sc); 875 sc->sc_shutdownhook = shutdownhook_establish(ohci_shutdown, sc); 876 #endif 877 878 usb_callout_init(sc->sc_tmo_rhsc); 879 880 return (USBD_NORMAL_COMPLETION); 881 882 bad5: 883 for (i = 0; i < OHCI_NO_EDS; i++) 884 ohci_free_sed(sc, sc->sc_eds[i]); 885 bad4: 886 ohci_free_sed(sc, sc->sc_isoc_head); 887 bad3: 888 ohci_free_sed(sc, sc->sc_bulk_head); 889 bad2: 890 ohci_free_sed(sc, sc->sc_ctrl_head); 891 bad1: 892 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 893 return (err); 894 } 895 896 usbd_status 897 ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 898 { 899 #if defined(__NetBSD__) || defined(__OpenBSD__) 900 struct ohci_softc *sc = (struct ohci_softc *)bus; 901 #endif 902 903 return (usb_allocmem(&sc->sc_bus, size, 0, dma)); 904 } 905 906 void 907 ohci_freem(struct usbd_bus *bus, usb_dma_t *dma) 908 { 909 #if defined(__NetBSD__) || defined(__OpenBSD__) 910 struct ohci_softc *sc = (struct ohci_softc *)bus; 911 #endif 912 913 usb_freemem(&sc->sc_bus, dma); 914 } 915 916 usbd_xfer_handle 917 ohci_allocx(struct usbd_bus *bus) 918 { 919 struct ohci_softc *sc = (struct ohci_softc *)bus; 920 usbd_xfer_handle xfer; 921 922 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 923 if (xfer != NULL) { 924 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 925 #ifdef DIAGNOSTIC 926 if (xfer->busy_free != XFER_FREE) { 927 printf("ohci_allocx: xfer=%p not free, 0x%08x\n", xfer, 928 xfer->busy_free); 929 } 930 #endif 931 } else { 932 xfer = malloc(sizeof(struct ohci_xfer), M_USB, M_NOWAIT); 933 } 934 if (xfer != NULL) { 935 memset(xfer, 0, sizeof (struct ohci_xfer)); 936 #ifdef DIAGNOSTIC 937 xfer->busy_free = XFER_BUSY; 938 #endif 939 } 940 return (xfer); 941 } 942 943 void 944 ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 945 { 946 struct ohci_softc *sc = (struct ohci_softc *)bus; 947 948 #ifdef DIAGNOSTIC 949 if (xfer->busy_free != XFER_BUSY) { 950 printf("ohci_freex: xfer=%p not busy, 0x%08x\n", xfer, 951 xfer->busy_free); 952 return; 953 } 954 xfer->busy_free = XFER_FREE; 955 #endif 956 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 957 } 958 959 /* 960 * Shut down the controller when the system is going down. 961 */ 962 void 963 ohci_shutdown(void *v) 964 { 965 ohci_softc_t *sc = v; 966 967 DPRINTF(("ohci_shutdown: stopping the HC\n")); 968 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 969 } 970 971 /* 972 * Handle suspend/resume. 973 * 974 * We need to switch to polling mode here, because this routine is 975 * called from an intterupt context. This is all right since we 976 * are almost suspended anyway. 977 */ 978 void 979 ohci_power(int why, void *v) 980 { 981 ohci_softc_t *sc = v; 982 u_int32_t ctl; 983 int s; 984 985 #ifdef OHCI_DEBUG 986 DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why)); 987 ohci_dumpregs(sc); 988 #endif 989 990 s = splhardusb(); 991 switch (why) { 992 case PWR_SUSPEND: 993 case PWR_STANDBY: 994 sc->sc_bus.use_polling++; 995 ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK; 996 if (sc->sc_control == 0) { 997 /* 998 * Preserve register values, in case that APM BIOS 999 * does not recover them. 1000 */ 1001 sc->sc_control = ctl; 1002 sc->sc_intre = OREAD4(sc, OHCI_INTERRUPT_ENABLE); 1003 } 1004 ctl |= OHCI_HCFS_SUSPEND; 1005 OWRITE4(sc, OHCI_CONTROL, ctl); 1006 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1007 sc->sc_bus.use_polling--; 1008 break; 1009 case PWR_RESUME: 1010 sc->sc_bus.use_polling++; 1011 /* Some broken BIOSes do not recover these values */ 1012 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 1013 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 1014 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 1015 if (sc->sc_intre) 1016 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, 1017 sc->sc_intre & (OHCI_ALL_INTRS | OHCI_MIE)); 1018 if (sc->sc_control) 1019 ctl = sc->sc_control; 1020 else 1021 ctl = OREAD4(sc, OHCI_CONTROL); 1022 ctl |= OHCI_HCFS_RESUME; 1023 OWRITE4(sc, OHCI_CONTROL, ctl); 1024 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 1025 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL; 1026 OWRITE4(sc, OHCI_CONTROL, ctl); 1027 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 1028 sc->sc_control = sc->sc_intre = 0; 1029 sc->sc_bus.use_polling--; 1030 break; 1031 case PWR_SOFTSUSPEND: 1032 case PWR_SOFTSTANDBY: 1033 case PWR_SOFTRESUME: 1034 break; 1035 } 1036 splx(s); 1037 } 1038 1039 #ifdef OHCI_DEBUG 1040 void 1041 ohci_dumpregs(ohci_softc_t *sc) 1042 { 1043 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 1044 OREAD4(sc, OHCI_REVISION), 1045 OREAD4(sc, OHCI_CONTROL), 1046 OREAD4(sc, OHCI_COMMAND_STATUS))); 1047 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 1048 OREAD4(sc, OHCI_INTERRUPT_STATUS), 1049 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 1050 OREAD4(sc, OHCI_INTERRUPT_DISABLE))); 1051 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 1052 OREAD4(sc, OHCI_HCCA), 1053 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 1054 OREAD4(sc, OHCI_CONTROL_HEAD_ED))); 1055 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 1056 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 1057 OREAD4(sc, OHCI_BULK_HEAD_ED), 1058 OREAD4(sc, OHCI_BULK_CURRENT_ED))); 1059 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 1060 OREAD4(sc, OHCI_DONE_HEAD), 1061 OREAD4(sc, OHCI_FM_INTERVAL), 1062 OREAD4(sc, OHCI_FM_REMAINING))); 1063 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 1064 OREAD4(sc, OHCI_FM_NUMBER), 1065 OREAD4(sc, OHCI_PERIODIC_START), 1066 OREAD4(sc, OHCI_LS_THRESHOLD))); 1067 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n", 1068 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 1069 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 1070 OREAD4(sc, OHCI_RH_STATUS))); 1071 DPRINTF((" port1=0x%08x port2=0x%08x\n", 1072 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 1073 OREAD4(sc, OHCI_RH_PORT_STATUS(2)))); 1074 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n", 1075 le32toh(sc->sc_hcca->hcca_frame_number), 1076 le32toh(sc->sc_hcca->hcca_done_head))); 1077 } 1078 #endif 1079 1080 Static int ohci_intr1(ohci_softc_t *); 1081 1082 int 1083 ohci_intr(void *p) 1084 { 1085 ohci_softc_t *sc = p; 1086 1087 if (sc == NULL || sc->sc_dying) 1088 return (0); 1089 1090 /* If we get an interrupt while polling, then just ignore it. */ 1091 if (sc->sc_bus.use_polling) { 1092 #ifdef DIAGNOSTIC 1093 printf("ohci_intr: ignored interrupt while polling\n"); 1094 #endif 1095 return (0); 1096 } 1097 1098 return (ohci_intr1(sc)); 1099 } 1100 1101 Static int 1102 ohci_intr1(ohci_softc_t *sc) 1103 { 1104 u_int32_t intrs, eintrs; 1105 ohci_physaddr_t done; 1106 1107 DPRINTFN(14,("ohci_intr1: enter\n")); 1108 1109 /* In case the interrupt occurs before initialization has completed. */ 1110 if (sc == NULL || sc->sc_hcca == NULL) { 1111 #ifdef DIAGNOSTIC 1112 printf("ohci_intr: sc->sc_hcca == NULL\n"); 1113 #endif 1114 return (0); 1115 } 1116 1117 intrs = 0; 1118 done = le32toh(sc->sc_hcca->hcca_done_head); 1119 if (done != 0) { 1120 if (done & ~OHCI_DONE_INTRS) 1121 intrs = OHCI_WDH; 1122 if (done & OHCI_DONE_INTRS) 1123 intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS); 1124 sc->sc_hcca->hcca_done_head = 0; 1125 } else 1126 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & ~OHCI_WDH; 1127 1128 if (!intrs) 1129 return (0); 1130 1131 intrs &= ~OHCI_MIE; 1132 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */ 1133 eintrs = intrs & sc->sc_eintrs; 1134 if (!eintrs) 1135 return (0); 1136 1137 sc->sc_bus.intr_context++; 1138 sc->sc_bus.no_intrs++; 1139 DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 1140 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 1141 (u_int)eintrs)); 1142 1143 if (eintrs & OHCI_SO) { 1144 sc->sc_overrun_cnt++; 1145 if (usbd_ratecheck(&sc->sc_overrun_ntc)) { 1146 printf("%s: %u scheduling overruns\n", 1147 USBDEVNAME(sc->sc_bus.bdev), sc->sc_overrun_cnt); 1148 sc->sc_overrun_cnt = 0; 1149 } 1150 /* XXX do what */ 1151 eintrs &= ~OHCI_SO; 1152 } 1153 if (eintrs & OHCI_WDH) { 1154 ohci_add_done(sc, done &~ OHCI_DONE_INTRS); 1155 usb_schedsoftintr(&sc->sc_bus); 1156 eintrs &= ~OHCI_WDH; 1157 } 1158 if (eintrs & OHCI_RD) { 1159 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev)); 1160 /* XXX process resume detect */ 1161 } 1162 if (eintrs & OHCI_UE) { 1163 printf("%s: unrecoverable error, controller halted\n", 1164 USBDEVNAME(sc->sc_bus.bdev)); 1165 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1166 /* XXX what else */ 1167 } 1168 if (eintrs & OHCI_RHSC) { 1169 ohci_rhsc(sc, sc->sc_intrxfer); 1170 /* 1171 * Disable RHSC interrupt for now, because it will be 1172 * on until the port has been reset. 1173 */ 1174 ohci_rhsc_able(sc, 0); 1175 /* Do not allow RHSC interrupts > 1 per second */ 1176 usb_callout(sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc); 1177 eintrs &= ~OHCI_RHSC; 1178 } 1179 1180 sc->sc_bus.intr_context--; 1181 1182 if (eintrs != 0) { 1183 /* Block unprocessed interrupts. XXX */ 1184 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs); 1185 sc->sc_eintrs &= ~eintrs; 1186 printf("%s: blocking intrs 0x%x\n", 1187 USBDEVNAME(sc->sc_bus.bdev), eintrs); 1188 } 1189 1190 return (1); 1191 } 1192 1193 void 1194 ohci_rhsc_able(ohci_softc_t *sc, int on) 1195 { 1196 DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on)); 1197 if (on) { 1198 sc->sc_eintrs |= OHCI_RHSC; 1199 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1200 } else { 1201 sc->sc_eintrs &= ~OHCI_RHSC; 1202 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC); 1203 } 1204 } 1205 1206 void 1207 ohci_rhsc_enable(void *v_sc) 1208 { 1209 ohci_softc_t *sc = v_sc; 1210 int s; 1211 1212 s = splhardusb(); 1213 ohci_rhsc_able(sc, 1); 1214 splx(s); 1215 } 1216 1217 #ifdef OHCI_DEBUG 1218 char *ohci_cc_strs[] = { 1219 "NO_ERROR", 1220 "CRC", 1221 "BIT_STUFFING", 1222 "DATA_TOGGLE_MISMATCH", 1223 "STALL", 1224 "DEVICE_NOT_RESPONDING", 1225 "PID_CHECK_FAILURE", 1226 "UNEXPECTED_PID", 1227 "DATA_OVERRUN", 1228 "DATA_UNDERRUN", 1229 "BUFFER_OVERRUN", 1230 "BUFFER_UNDERRUN", 1231 "reserved", 1232 "reserved", 1233 "NOT_ACCESSED", 1234 "NOT_ACCESSED", 1235 }; 1236 #endif 1237 1238 void 1239 ohci_add_done(ohci_softc_t *sc, ohci_physaddr_t done) 1240 { 1241 ohci_soft_itd_t *sitd, *sidone, **ip; 1242 ohci_soft_td_t *std, *sdone, **p; 1243 1244 /* Reverse the done list. */ 1245 for (sdone = NULL, sidone = NULL; done != 0; ) { 1246 std = ohci_hash_find_td(sc, done); 1247 if (std != NULL) { 1248 std->dnext = sdone; 1249 done = le32toh(std->td.td_nexttd); 1250 sdone = std; 1251 DPRINTFN(10,("add TD %p\n", std)); 1252 continue; 1253 } 1254 sitd = ohci_hash_find_itd(sc, done); 1255 if (sitd != NULL) { 1256 sitd->dnext = sidone; 1257 done = le32toh(sitd->itd.itd_nextitd); 1258 sidone = sitd; 1259 DPRINTFN(5,("add ITD %p\n", sitd)); 1260 continue; 1261 } 1262 panic("ohci_add_done: addr 0x%08lx not found", (u_long)done); 1263 } 1264 1265 /* sdone & sidone now hold the done lists. */ 1266 /* Put them on the already processed lists. */ 1267 for (p = &sc->sc_sdone; *p != NULL; p = &(*p)->dnext) 1268 ; 1269 *p = sdone; 1270 for (ip = &sc->sc_sidone; *ip != NULL; ip = &(*ip)->dnext) 1271 ; 1272 *ip = sidone; 1273 } 1274 1275 void 1276 ohci_softintr(void *v) 1277 { 1278 ohci_softc_t *sc = v; 1279 ohci_soft_itd_t *sitd, *sidone, *sitdnext; 1280 ohci_soft_td_t *std, *sdone, *stdnext; 1281 usbd_xfer_handle xfer; 1282 struct ohci_pipe *opipe; 1283 int len, cc, s; 1284 int i, j, actlen, iframes, uedir; 1285 1286 DPRINTFN(10,("ohci_softintr: enter\n")); 1287 1288 sc->sc_bus.intr_context++; 1289 1290 s = splhardusb(); 1291 sdone = sc->sc_sdone; 1292 sc->sc_sdone = NULL; 1293 sidone = sc->sc_sidone; 1294 sc->sc_sidone = NULL; 1295 splx(s); 1296 1297 DPRINTFN(10,("ohci_softintr: sdone=%p sidone=%p\n", sdone, sidone)); 1298 1299 #ifdef OHCI_DEBUG 1300 if (ohcidebug > 10) { 1301 DPRINTF(("ohci_process_done: TD done:\n")); 1302 ohci_dump_tds(sdone); 1303 } 1304 #endif 1305 1306 for (std = sdone; std; std = stdnext) { 1307 xfer = std->xfer; 1308 stdnext = std->dnext; 1309 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n", 1310 std, xfer, xfer ? xfer->hcpriv : 0)); 1311 if (xfer == NULL) { 1312 /* 1313 * xfer == NULL: There seems to be no xfer associated 1314 * with this TD. It is tailp that happened to end up on 1315 * the done queue. 1316 * Shouldn't happen, but some chips are broken(?). 1317 */ 1318 continue; 1319 } 1320 if (xfer->status == USBD_CANCELLED || 1321 xfer->status == USBD_TIMEOUT) { 1322 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1323 xfer)); 1324 /* Handled by abort routine. */ 1325 continue; 1326 } 1327 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 1328 1329 len = std->len; 1330 if (std->td.td_cbp != 0) 1331 len -= le32toh(std->td.td_be) - 1332 le32toh(std->td.td_cbp) + 1; 1333 DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", len, 1334 std->flags)); 1335 if (std->flags & OHCI_ADD_LEN) 1336 xfer->actlen += len; 1337 1338 cc = OHCI_TD_GET_CC(le32toh(std->td.td_flags)); 1339 if (cc == OHCI_CC_NO_ERROR) { 1340 if (std->flags & OHCI_CALL_DONE) { 1341 xfer->status = USBD_NORMAL_COMPLETION; 1342 s = splusb(); 1343 usb_transfer_complete(xfer); 1344 splx(s); 1345 } 1346 ohci_free_std(sc, std); 1347 } else { 1348 /* 1349 * Endpoint is halted. First unlink all the TDs 1350 * belonging to the failed transfer, and then restart 1351 * the endpoint. 1352 */ 1353 ohci_soft_td_t *p, *n; 1354 opipe = (struct ohci_pipe *)xfer->pipe; 1355 1356 DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n", 1357 OHCI_TD_GET_CC(le32toh(std->td.td_flags)), 1358 ohci_cc_strs[OHCI_TD_GET_CC(le32toh(std->td.td_flags))])); 1359 1360 /* remove TDs */ 1361 for (p = std; p->xfer == xfer; p = n) { 1362 n = p->nexttd; 1363 ohci_free_std(sc, p); 1364 } 1365 1366 /* clear halt */ 1367 opipe->sed->ed.ed_headp = htole32(p->physaddr); 1368 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1369 1370 if (cc == OHCI_CC_STALL) 1371 xfer->status = USBD_STALLED; 1372 else 1373 xfer->status = USBD_IOERROR; 1374 s = splusb(); 1375 usb_transfer_complete(xfer); 1376 splx(s); 1377 } 1378 } 1379 1380 #ifdef OHCI_DEBUG 1381 if (ohcidebug > 10) { 1382 DPRINTF(("ohci_softintr: ITD done:\n")); 1383 ohci_dump_itds(sidone); 1384 } 1385 #endif 1386 1387 for (sitd = sidone; sitd != NULL; sitd = sitdnext) { 1388 xfer = sitd->xfer; 1389 sitdnext = sitd->dnext; 1390 DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n", 1391 sitd, xfer, xfer ? xfer->hcpriv : 0)); 1392 if (xfer == NULL) 1393 continue; 1394 if (xfer->status == USBD_CANCELLED || 1395 xfer->status == USBD_TIMEOUT) { 1396 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1397 xfer)); 1398 /* Handled by abort routine. */ 1399 continue; 1400 } 1401 #ifdef DIAGNOSTIC 1402 if (sitd->isdone) 1403 printf("ohci_softintr: sitd=%p is done\n", sitd); 1404 sitd->isdone = 1; 1405 #endif 1406 if (sitd->flags & OHCI_CALL_DONE) { 1407 ohci_soft_itd_t *next; 1408 1409 opipe = (struct ohci_pipe *)xfer->pipe; 1410 opipe->u.iso.inuse -= xfer->nframes; 1411 uedir = UE_GET_DIR(xfer->pipe->endpoint->edesc-> 1412 bEndpointAddress); 1413 xfer->status = USBD_NORMAL_COMPLETION; 1414 actlen = 0; 1415 for (i = 0, sitd = xfer->hcpriv;; 1416 sitd = next) { 1417 next = sitd->nextitd; 1418 if (OHCI_ITD_GET_CC(le32toh(sitd-> 1419 itd.itd_flags)) != OHCI_CC_NO_ERROR) 1420 xfer->status = USBD_IOERROR; 1421 /* For input, update frlengths with actual */ 1422 /* XXX anything necessary for output? */ 1423 if (uedir == UE_DIR_IN && 1424 xfer->status == USBD_NORMAL_COMPLETION) { 1425 iframes = OHCI_ITD_GET_FC(le32toh( 1426 sitd->itd.itd_flags)); 1427 for (j = 0; j < iframes; i++, j++) { 1428 len = le16toh(sitd-> 1429 itd.itd_offset[j]); 1430 len = 1431 (OHCI_ITD_PSW_GET_CC(len) == 1432 OHCI_CC_NOT_ACCESSED) ? 0 : 1433 OHCI_ITD_PSW_LENGTH(len); 1434 xfer->frlengths[i] = len; 1435 actlen += len; 1436 } 1437 } 1438 if (sitd->flags & OHCI_CALL_DONE) 1439 break; 1440 ohci_free_sitd(sc, sitd); 1441 } 1442 ohci_free_sitd(sc, sitd); 1443 if (uedir == UE_DIR_IN && 1444 xfer->status == USBD_NORMAL_COMPLETION) 1445 xfer->actlen = actlen; 1446 1447 s = splusb(); 1448 usb_transfer_complete(xfer); 1449 splx(s); 1450 } 1451 } 1452 1453 #ifdef USB_USE_SOFTINTR 1454 if (sc->sc_softwake) { 1455 sc->sc_softwake = 0; 1456 wakeup(&sc->sc_softwake); 1457 } 1458 #endif /* USB_USE_SOFTINTR */ 1459 1460 sc->sc_bus.intr_context--; 1461 DPRINTFN(10,("ohci_softintr: done:\n")); 1462 } 1463 1464 void 1465 ohci_device_ctrl_done(usbd_xfer_handle xfer) 1466 { 1467 DPRINTFN(10,("ohci_device_ctrl_done: xfer=%p\n", xfer)); 1468 1469 #ifdef DIAGNOSTIC 1470 if (!(xfer->rqflags & URQ_REQUEST)) { 1471 panic("ohci_device_ctrl_done: not a request"); 1472 } 1473 #endif 1474 xfer->hcpriv = NULL; 1475 } 1476 1477 void 1478 ohci_device_intr_done(usbd_xfer_handle xfer) 1479 { 1480 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1481 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1482 ohci_soft_ed_t *sed = opipe->sed; 1483 ohci_soft_td_t *data, *tail; 1484 1485 1486 DPRINTFN(10,("ohci_device_intr_done: xfer=%p, actlen=%d\n", 1487 xfer, xfer->actlen)); 1488 1489 xfer->hcpriv = NULL; 1490 1491 if (xfer->pipe->repeat) { 1492 data = opipe->tail.td; 1493 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 1494 if (tail == NULL) { 1495 xfer->status = USBD_NOMEM; 1496 return; 1497 } 1498 tail->xfer = NULL; 1499 1500 data->td.td_flags = htole32( 1501 OHCI_TD_IN | OHCI_TD_NOCC | 1502 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 1503 if (xfer->flags & USBD_SHORT_XFER_OK) 1504 data->td.td_flags |= htole32(OHCI_TD_R); 1505 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf, 0)); 1506 data->nexttd = tail; 1507 data->td.td_nexttd = htole32(tail->physaddr); 1508 data->td.td_be = htole32(le32toh(data->td.td_cbp) + 1509 xfer->length - 1); 1510 data->len = xfer->length; 1511 data->xfer = xfer; 1512 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1513 xfer->hcpriv = data; 1514 xfer->actlen = 0; 1515 1516 sed->ed.ed_tailp = htole32(tail->physaddr); 1517 opipe->tail.td = tail; 1518 } 1519 } 1520 1521 void 1522 ohci_device_bulk_done(usbd_xfer_handle xfer) 1523 { 1524 DPRINTFN(10,("ohci_device_bulk_done: xfer=%p, actlen=%d\n", 1525 xfer, xfer->actlen)); 1526 1527 xfer->hcpriv = NULL; 1528 } 1529 1530 void 1531 ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer) 1532 { 1533 usbd_pipe_handle pipe; 1534 u_char *p; 1535 int i, m; 1536 int hstatus; 1537 1538 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1539 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n", 1540 sc, xfer, hstatus)); 1541 1542 if (xfer == NULL) { 1543 /* Just ignore the change. */ 1544 return; 1545 } 1546 1547 pipe = xfer->pipe; 1548 1549 p = KERNADDR(&xfer->dmabuf, 0); 1550 m = min(sc->sc_noport, xfer->length * 8 - 1); 1551 memset(p, 0, xfer->length); 1552 for (i = 1; i <= m; i++) { 1553 /* Pick out CHANGE bits from the status reg. */ 1554 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1555 p[i/8] |= 1 << (i%8); 1556 } 1557 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 1558 xfer->actlen = xfer->length; 1559 xfer->status = USBD_NORMAL_COMPLETION; 1560 1561 usb_transfer_complete(xfer); 1562 } 1563 1564 void 1565 ohci_root_intr_done(usbd_xfer_handle xfer) 1566 { 1567 xfer->hcpriv = NULL; 1568 } 1569 1570 void 1571 ohci_root_ctrl_done(usbd_xfer_handle xfer) 1572 { 1573 xfer->hcpriv = NULL; 1574 } 1575 1576 /* 1577 * Wait here until controller claims to have an interrupt. 1578 * Then call ohci_intr and return. Use timeout to avoid waiting 1579 * too long. 1580 */ 1581 void 1582 ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer) 1583 { 1584 int timo = xfer->timeout; 1585 int usecs; 1586 u_int32_t intrs; 1587 1588 xfer->status = USBD_IN_PROGRESS; 1589 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 1590 usb_delay_ms(&sc->sc_bus, 1); 1591 if (sc->sc_dying) 1592 break; 1593 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 1594 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs)); 1595 #ifdef OHCI_DEBUG 1596 if (ohcidebug > 15) 1597 ohci_dumpregs(sc); 1598 #endif 1599 if (intrs) { 1600 ohci_intr1(sc); 1601 if (xfer->status != USBD_IN_PROGRESS) 1602 return; 1603 } 1604 } 1605 1606 /* Timeout */ 1607 DPRINTF(("ohci_waitintr: timeout\n")); 1608 xfer->status = USBD_TIMEOUT; 1609 usb_transfer_complete(xfer); 1610 /* XXX should free TD */ 1611 } 1612 1613 void 1614 ohci_poll(struct usbd_bus *bus) 1615 { 1616 ohci_softc_t *sc = (ohci_softc_t *)bus; 1617 #ifdef OHCI_DEBUG 1618 static int last; 1619 int new; 1620 new = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1621 if (new != last) { 1622 DPRINTFN(10,("ohci_poll: intrs=0x%04x\n", new)); 1623 last = new; 1624 } 1625 #endif 1626 1627 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) 1628 ohci_intr1(sc); 1629 } 1630 1631 usbd_status 1632 ohci_device_request(usbd_xfer_handle xfer) 1633 { 1634 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1635 usb_device_request_t *req = &xfer->request; 1636 usbd_device_handle dev = opipe->pipe.device; 1637 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1638 int addr = dev->address; 1639 ohci_soft_td_t *setup, *stat, *next, *tail; 1640 ohci_soft_ed_t *sed; 1641 int isread; 1642 int len; 1643 usbd_status err; 1644 int s; 1645 1646 isread = req->bmRequestType & UT_READ; 1647 len = UGETW(req->wLength); 1648 1649 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 1650 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 1651 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1652 UGETW(req->wIndex), len, addr, 1653 opipe->pipe.endpoint->edesc->bEndpointAddress)); 1654 1655 setup = opipe->tail.td; 1656 stat = ohci_alloc_std(sc); 1657 if (stat == NULL) { 1658 err = USBD_NOMEM; 1659 goto bad1; 1660 } 1661 tail = ohci_alloc_std(sc); 1662 if (tail == NULL) { 1663 err = USBD_NOMEM; 1664 goto bad2; 1665 } 1666 tail->xfer = NULL; 1667 1668 sed = opipe->sed; 1669 opipe->u.ctl.length = len; 1670 1671 /* Update device address and length since they may have changed 1672 during the setup of the control pipe in usbd_new_device(). */ 1673 /* XXX This only needs to be done once, but it's too early in open. */ 1674 /* XXXX Should not touch ED here! */ 1675 sed->ed.ed_flags = htole32( 1676 (le32toh(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) | 1677 OHCI_ED_SET_FA(addr) | 1678 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize))); 1679 1680 next = stat; 1681 1682 /* Set up data transaction */ 1683 if (len != 0) { 1684 ohci_soft_td_t *std = stat; 1685 1686 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 1687 std, &stat); 1688 stat = stat->nexttd; /* point at free TD */ 1689 if (err) 1690 goto bad3; 1691 /* Start toggle at 1 and then use the carried toggle. */ 1692 std->td.td_flags &= htole32(~OHCI_TD_TOGGLE_MASK); 1693 std->td.td_flags |= htole32(OHCI_TD_TOGGLE_1); 1694 } 1695 1696 memcpy(KERNADDR(&opipe->u.ctl.reqdma, 0), req, sizeof *req); 1697 1698 setup->td.td_flags = htole32(OHCI_TD_SETUP | OHCI_TD_NOCC | 1699 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1700 setup->td.td_cbp = htole32(DMAADDR(&opipe->u.ctl.reqdma, 0)); 1701 setup->nexttd = next; 1702 setup->td.td_nexttd = htole32(next->physaddr); 1703 setup->td.td_be = htole32(le32toh(setup->td.td_cbp) + sizeof *req - 1); 1704 setup->len = 0; 1705 setup->xfer = xfer; 1706 setup->flags = 0; 1707 xfer->hcpriv = setup; 1708 1709 stat->td.td_flags = htole32( 1710 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | 1711 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1712 stat->td.td_cbp = 0; 1713 stat->nexttd = tail; 1714 stat->td.td_nexttd = htole32(tail->physaddr); 1715 stat->td.td_be = 0; 1716 stat->flags = OHCI_CALL_DONE; 1717 stat->len = 0; 1718 stat->xfer = xfer; 1719 1720 #ifdef OHCI_DEBUG 1721 if (ohcidebug > 5) { 1722 DPRINTF(("ohci_device_request:\n")); 1723 ohci_dump_ed(sed); 1724 ohci_dump_tds(setup); 1725 } 1726 #endif 1727 1728 /* Insert ED in schedule */ 1729 s = splusb(); 1730 sed->ed.ed_tailp = htole32(tail->physaddr); 1731 opipe->tail.td = tail; 1732 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1733 if (xfer->timeout && !sc->sc_bus.use_polling) { 1734 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 1735 ohci_timeout, xfer); 1736 } 1737 splx(s); 1738 1739 #ifdef OHCI_DEBUG 1740 if (ohcidebug > 20) { 1741 delay(10000); 1742 DPRINTF(("ohci_device_request: status=%x\n", 1743 OREAD4(sc, OHCI_COMMAND_STATUS))); 1744 ohci_dumpregs(sc); 1745 printf("ctrl head:\n"); 1746 ohci_dump_ed(sc->sc_ctrl_head); 1747 printf("sed:\n"); 1748 ohci_dump_ed(sed); 1749 ohci_dump_tds(setup); 1750 } 1751 #endif 1752 1753 return (USBD_NORMAL_COMPLETION); 1754 1755 bad3: 1756 ohci_free_std(sc, tail); 1757 bad2: 1758 ohci_free_std(sc, stat); 1759 bad1: 1760 return (err); 1761 } 1762 1763 /* 1764 * Add an ED to the schedule. Called at splusb(). 1765 */ 1766 void 1767 ohci_add_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1768 { 1769 DPRINTFN(8,("ohci_add_ed: sed=%p head=%p\n", sed, head)); 1770 1771 SPLUSBCHECK; 1772 sed->next = head->next; 1773 sed->ed.ed_nexted = head->ed.ed_nexted; 1774 head->next = sed; 1775 head->ed.ed_nexted = htole32(sed->physaddr); 1776 } 1777 1778 /* 1779 * Remove an ED from the schedule. Called at splusb(). 1780 */ 1781 void 1782 ohci_rem_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1783 { 1784 ohci_soft_ed_t *p; 1785 1786 SPLUSBCHECK; 1787 1788 /* XXX */ 1789 for (p = head; p != NULL && p->next != sed; p = p->next) 1790 ; 1791 if (p == NULL) 1792 panic("ohci_rem_ed: ED not found"); 1793 p->next = sed->next; 1794 p->ed.ed_nexted = sed->ed.ed_nexted; 1795 } 1796 1797 /* 1798 * When a transfer is completed the TD is added to the done queue by 1799 * the host controller. This queue is the processed by software. 1800 * Unfortunately the queue contains the physical address of the TD 1801 * and we have no simple way to translate this back to a kernel address. 1802 * To make the translation possible (and fast) we use a hash table of 1803 * TDs currently in the schedule. The physical address is used as the 1804 * hash value. 1805 */ 1806 1807 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1808 /* Called at splusb() */ 1809 void 1810 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1811 { 1812 int h = HASH(std->physaddr); 1813 1814 SPLUSBCHECK; 1815 1816 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1817 } 1818 1819 /* Called at splusb() */ 1820 void 1821 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1822 { 1823 SPLUSBCHECK; 1824 1825 LIST_REMOVE(std, hnext); 1826 } 1827 1828 ohci_soft_td_t * 1829 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a) 1830 { 1831 int h = HASH(a); 1832 ohci_soft_td_t *std; 1833 1834 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1835 std != NULL; 1836 std = LIST_NEXT(std, hnext)) 1837 if (std->physaddr == a) 1838 return (std); 1839 return (NULL); 1840 } 1841 1842 /* Called at splusb() */ 1843 void 1844 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1845 { 1846 int h = HASH(sitd->physaddr); 1847 1848 SPLUSBCHECK; 1849 1850 DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n", 1851 sitd, (u_long)sitd->physaddr)); 1852 1853 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext); 1854 } 1855 1856 /* Called at splusb() */ 1857 void 1858 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1859 { 1860 SPLUSBCHECK; 1861 1862 DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n", 1863 sitd, (u_long)sitd->physaddr)); 1864 1865 LIST_REMOVE(sitd, hnext); 1866 } 1867 1868 ohci_soft_itd_t * 1869 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a) 1870 { 1871 int h = HASH(a); 1872 ohci_soft_itd_t *sitd; 1873 1874 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]); 1875 sitd != NULL; 1876 sitd = LIST_NEXT(sitd, hnext)) 1877 if (sitd->physaddr == a) 1878 return (sitd); 1879 return (NULL); 1880 } 1881 1882 void 1883 ohci_timeout(void *addr) 1884 { 1885 struct ohci_xfer *oxfer = addr; 1886 struct ohci_pipe *opipe = (struct ohci_pipe *)oxfer->xfer.pipe; 1887 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1888 1889 DPRINTF(("ohci_timeout: oxfer=%p\n", oxfer)); 1890 1891 if (sc->sc_dying) { 1892 ohci_abort_xfer(&oxfer->xfer, USBD_TIMEOUT); 1893 return; 1894 } 1895 1896 /* Execute the abort in a process context. */ 1897 usb_init_task(&oxfer->abort_task, ohci_timeout_task, addr); 1898 usb_add_task(oxfer->xfer.pipe->device, &oxfer->abort_task); 1899 } 1900 1901 void 1902 ohci_timeout_task(void *addr) 1903 { 1904 usbd_xfer_handle xfer = addr; 1905 int s; 1906 1907 DPRINTF(("ohci_timeout_task: xfer=%p\n", xfer)); 1908 1909 s = splusb(); 1910 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1911 splx(s); 1912 } 1913 1914 #ifdef OHCI_DEBUG 1915 void 1916 ohci_dump_tds(ohci_soft_td_t *std) 1917 { 1918 for (; std; std = std->nexttd) 1919 ohci_dump_td(std); 1920 } 1921 1922 void 1923 ohci_dump_td(ohci_soft_td_t *std) 1924 { 1925 char sbuf[128]; 1926 1927 bitmask_snprintf((u_int32_t)le32toh(std->td.td_flags), 1928 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 1929 sbuf, sizeof(sbuf)); 1930 1931 printf("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx " 1932 "nexttd=0x%08lx be=0x%08lx\n", 1933 std, (u_long)std->physaddr, sbuf, 1934 OHCI_TD_GET_DI(le32toh(std->td.td_flags)), 1935 OHCI_TD_GET_EC(le32toh(std->td.td_flags)), 1936 OHCI_TD_GET_CC(le32toh(std->td.td_flags)), 1937 (u_long)le32toh(std->td.td_cbp), 1938 (u_long)le32toh(std->td.td_nexttd), 1939 (u_long)le32toh(std->td.td_be)); 1940 } 1941 1942 void 1943 ohci_dump_itd(ohci_soft_itd_t *sitd) 1944 { 1945 int i; 1946 1947 printf("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n" 1948 "bp0=0x%08lx next=0x%08lx be=0x%08lx\n", 1949 sitd, (u_long)sitd->physaddr, 1950 OHCI_ITD_GET_SF(le32toh(sitd->itd.itd_flags)), 1951 OHCI_ITD_GET_DI(le32toh(sitd->itd.itd_flags)), 1952 OHCI_ITD_GET_FC(le32toh(sitd->itd.itd_flags)), 1953 OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags)), 1954 (u_long)le32toh(sitd->itd.itd_bp0), 1955 (u_long)le32toh(sitd->itd.itd_nextitd), 1956 (u_long)le32toh(sitd->itd.itd_be)); 1957 for (i = 0; i < OHCI_ITD_NOFFSET; i++) 1958 printf("offs[%d]=0x%04x ", i, 1959 (u_int)le16toh(sitd->itd.itd_offset[i])); 1960 printf("\n"); 1961 } 1962 1963 void 1964 ohci_dump_itds(ohci_soft_itd_t *sitd) 1965 { 1966 for (; sitd; sitd = sitd->nextitd) 1967 ohci_dump_itd(sitd); 1968 } 1969 1970 void 1971 ohci_dump_ed(ohci_soft_ed_t *sed) 1972 { 1973 char sbuf[128], sbuf2[128]; 1974 1975 bitmask_snprintf((u_int32_t)le32toh(sed->ed.ed_flags), 1976 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO", 1977 sbuf, sizeof(sbuf)); 1978 bitmask_snprintf((u_int32_t)le32toh(sed->ed.ed_headp), 1979 "\20\1HALT\2CARRY", sbuf2, sizeof(sbuf2)); 1980 1981 printf("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d flags=%s\ntailp=0x%08lx " 1982 "headflags=%s headp=0x%08lx nexted=0x%08lx\n", 1983 sed, (u_long)sed->physaddr, 1984 OHCI_ED_GET_FA(le32toh(sed->ed.ed_flags)), 1985 OHCI_ED_GET_EN(le32toh(sed->ed.ed_flags)), 1986 OHCI_ED_GET_MAXP(le32toh(sed->ed.ed_flags)), sbuf, 1987 (u_long)le32toh(sed->ed.ed_tailp), sbuf2, 1988 (u_long)le32toh(sed->ed.ed_headp), 1989 (u_long)le32toh(sed->ed.ed_nexted)); 1990 } 1991 #endif 1992 1993 usbd_status 1994 ohci_open(usbd_pipe_handle pipe) 1995 { 1996 usbd_device_handle dev = pipe->device; 1997 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1998 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1999 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2000 u_int8_t addr = dev->address; 2001 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 2002 ohci_soft_ed_t *sed; 2003 ohci_soft_td_t *std; 2004 ohci_soft_itd_t *sitd; 2005 ohci_physaddr_t tdphys; 2006 u_int32_t fmt; 2007 usbd_status err; 2008 int s; 2009 int ival; 2010 2011 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 2012 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 2013 2014 if (sc->sc_dying) 2015 return (USBD_IOERROR); 2016 2017 std = NULL; 2018 sed = NULL; 2019 2020 if (addr == sc->sc_addr) { 2021 switch (ed->bEndpointAddress) { 2022 case USB_CONTROL_ENDPOINT: 2023 pipe->methods = &ohci_root_ctrl_methods; 2024 break; 2025 case UE_DIR_IN | OHCI_INTR_ENDPT: 2026 pipe->methods = &ohci_root_intr_methods; 2027 break; 2028 default: 2029 return (USBD_INVAL); 2030 } 2031 } else { 2032 sed = ohci_alloc_sed(sc); 2033 if (sed == NULL) 2034 goto bad0; 2035 opipe->sed = sed; 2036 if (xfertype == UE_ISOCHRONOUS) { 2037 sitd = ohci_alloc_sitd(sc); 2038 if (sitd == NULL) 2039 goto bad1; 2040 opipe->tail.itd = sitd; 2041 tdphys = sitd->physaddr; 2042 fmt = OHCI_ED_FORMAT_ISO; 2043 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 2044 fmt |= OHCI_ED_DIR_IN; 2045 else 2046 fmt |= OHCI_ED_DIR_OUT; 2047 } else { 2048 std = ohci_alloc_std(sc); 2049 if (std == NULL) 2050 goto bad1; 2051 opipe->tail.td = std; 2052 tdphys = std->physaddr; 2053 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD; 2054 } 2055 sed->ed.ed_flags = htole32( 2056 OHCI_ED_SET_FA(addr) | 2057 OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) | 2058 (dev->speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) | 2059 fmt | 2060 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 2061 sed->ed.ed_headp = sed->ed.ed_tailp = htole32(tdphys); 2062 2063 switch (xfertype) { 2064 case UE_CONTROL: 2065 pipe->methods = &ohci_device_ctrl_methods; 2066 err = usb_allocmem(&sc->sc_bus, 2067 sizeof(usb_device_request_t), 2068 0, &opipe->u.ctl.reqdma); 2069 if (err) 2070 goto bad; 2071 s = splusb(); 2072 ohci_add_ed(sed, sc->sc_ctrl_head); 2073 splx(s); 2074 break; 2075 case UE_INTERRUPT: 2076 pipe->methods = &ohci_device_intr_methods; 2077 ival = pipe->interval; 2078 if (ival == USBD_DEFAULT_INTERVAL) 2079 ival = ed->bInterval; 2080 return (ohci_device_setintr(sc, opipe, ival)); 2081 case UE_ISOCHRONOUS: 2082 pipe->methods = &ohci_device_isoc_methods; 2083 return (ohci_setup_isoc(pipe)); 2084 case UE_BULK: 2085 pipe->methods = &ohci_device_bulk_methods; 2086 s = splusb(); 2087 ohci_add_ed(sed, sc->sc_bulk_head); 2088 splx(s); 2089 break; 2090 } 2091 } 2092 return (USBD_NORMAL_COMPLETION); 2093 2094 bad: 2095 if (std != NULL) 2096 ohci_free_std(sc, std); 2097 bad1: 2098 if (sed != NULL) 2099 ohci_free_sed(sc, sed); 2100 bad0: 2101 return (USBD_NOMEM); 2102 2103 } 2104 2105 /* 2106 * Close a reqular pipe. 2107 * Assumes that there are no pending transactions. 2108 */ 2109 void 2110 ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head) 2111 { 2112 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2113 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2114 ohci_soft_ed_t *sed = opipe->sed; 2115 int s; 2116 2117 s = splusb(); 2118 #ifdef DIAGNOSTIC 2119 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 2120 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2121 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) { 2122 ohci_soft_td_t *std; 2123 std = ohci_hash_find_td(sc, le32toh(sed->ed.ed_headp)); 2124 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 2125 "tl=0x%x pipe=%p, std=%p\n", sed, 2126 (int)le32toh(sed->ed.ed_headp), 2127 (int)le32toh(sed->ed.ed_tailp), 2128 pipe, std); 2129 #ifdef USB_DEBUG 2130 usbd_dump_pipe(&opipe->pipe); 2131 #endif 2132 #ifdef OHCI_DEBUG 2133 ohci_dump_ed(sed); 2134 if (std) 2135 ohci_dump_td(std); 2136 #endif 2137 usb_delay_ms(&sc->sc_bus, 2); 2138 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2139 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) 2140 printf("ohci_close_pipe: pipe still not empty\n"); 2141 } 2142 #endif 2143 ohci_rem_ed(sed, head); 2144 /* Make sure the host controller is not touching this ED */ 2145 usb_delay_ms(&sc->sc_bus, 1); 2146 splx(s); 2147 ohci_free_sed(sc, opipe->sed); 2148 } 2149 2150 /* 2151 * Abort a device request. 2152 * If this routine is called at splusb() it guarantees that the request 2153 * will be removed from the hardware scheduling and that the callback 2154 * for it will be called with USBD_CANCELLED status. 2155 * It's impossible to guarantee that the requested transfer will not 2156 * have happened since the hardware runs concurrently. 2157 * If the transaction has already happened we rely on the ordinary 2158 * interrupt processing to process it. 2159 */ 2160 void 2161 ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2162 { 2163 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2164 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 2165 ohci_soft_ed_t *sed = opipe->sed; 2166 ohci_soft_td_t *p, *n; 2167 ohci_physaddr_t headp; 2168 int s, hit; 2169 2170 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p sed=%p\n", xfer, opipe,sed)); 2171 2172 if (sc->sc_dying) { 2173 /* If we're dying, just do the software part. */ 2174 s = splusb(); 2175 xfer->status = status; /* make software ignore it */ 2176 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 2177 usb_transfer_complete(xfer); 2178 splx(s); 2179 } 2180 2181 if (xfer->device->bus->intr_context || !curproc) 2182 panic("ohci_abort_xfer: not in process context"); 2183 2184 /* 2185 * Step 1: Make interrupt routine and hardware ignore xfer. 2186 */ 2187 s = splusb(); 2188 xfer->status = status; /* make software ignore it */ 2189 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 2190 splx(s); 2191 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed)); 2192 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 2193 2194 /* 2195 * Step 2: Wait until we know hardware has finished any possible 2196 * use of the xfer. Also make sure the soft interrupt routine 2197 * has run. 2198 */ 2199 usb_delay_ms(opipe->pipe.device->bus, 20); /* Hardware finishes in 1ms */ 2200 s = splusb(); 2201 #ifdef USB_USE_SOFTINTR 2202 sc->sc_softwake = 1; 2203 #endif /* USB_USE_SOFTINTR */ 2204 usb_schedsoftintr(&sc->sc_bus); 2205 #ifdef USB_USE_SOFTINTR 2206 tsleep(&sc->sc_softwake, PZERO, "ohciab", 0); 2207 #endif /* USB_USE_SOFTINTR */ 2208 splx(s); 2209 2210 /* 2211 * Step 3: Remove any vestiges of the xfer from the hardware. 2212 * The complication here is that the hardware may have executed 2213 * beyond the xfer we're trying to abort. So as we're scanning 2214 * the TDs of this xfer we check if the hardware points to 2215 * any of them. 2216 */ 2217 s = splusb(); /* XXX why? */ 2218 p = xfer->hcpriv; 2219 #ifdef DIAGNOSTIC 2220 if (p == NULL) { 2221 splx(s); 2222 printf("ohci_abort_xfer: hcpriv is NULL\n"); 2223 return; 2224 } 2225 #endif 2226 #ifdef OHCI_DEBUG 2227 if (ohcidebug > 1) { 2228 DPRINTF(("ohci_abort_xfer: sed=\n")); 2229 ohci_dump_ed(sed); 2230 ohci_dump_tds(p); 2231 } 2232 #endif 2233 headp = le32toh(sed->ed.ed_headp) & OHCI_HEADMASK; 2234 hit = 0; 2235 for (; p->xfer == xfer; p = n) { 2236 hit |= headp == p->physaddr; 2237 n = p->nexttd; 2238 ohci_free_std(sc, p); 2239 } 2240 /* Zap headp register if hardware pointed inside the xfer. */ 2241 if (hit) { 2242 DPRINTFN(1,("ohci_abort_xfer: set hd=0x08%x, tl=0x%08x\n", 2243 (int)p->physaddr, (int)le32toh(sed->ed.ed_tailp))); 2244 sed->ed.ed_headp = htole32(p->physaddr); /* unlink TDs */ 2245 } else { 2246 DPRINTFN(1,("ohci_abort_xfer: no hit\n")); 2247 } 2248 2249 /* 2250 * Step 4: Turn on hardware again. 2251 */ 2252 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 2253 2254 /* 2255 * Step 5: Execute callback. 2256 */ 2257 usb_transfer_complete(xfer); 2258 2259 splx(s); 2260 } 2261 2262 /* 2263 * Data structures and routines to emulate the root hub. 2264 */ 2265 Static usb_device_descriptor_t ohci_devd = { 2266 USB_DEVICE_DESCRIPTOR_SIZE, 2267 UDESC_DEVICE, /* type */ 2268 {0x00, 0x01}, /* USB version */ 2269 UDCLASS_HUB, /* class */ 2270 UDSUBCLASS_HUB, /* subclass */ 2271 UDPROTO_FSHUB, 2272 64, /* max packet */ 2273 {0},{0},{0x00,0x01}, /* device id */ 2274 1,2,0, /* string indicies */ 2275 1 /* # of configurations */ 2276 }; 2277 2278 Static usb_config_descriptor_t ohci_confd = { 2279 USB_CONFIG_DESCRIPTOR_SIZE, 2280 UDESC_CONFIG, 2281 {USB_CONFIG_DESCRIPTOR_SIZE + 2282 USB_INTERFACE_DESCRIPTOR_SIZE + 2283 USB_ENDPOINT_DESCRIPTOR_SIZE}, 2284 1, 2285 1, 2286 0, 2287 UC_SELF_POWERED, 2288 0 /* max power */ 2289 }; 2290 2291 Static usb_interface_descriptor_t ohci_ifcd = { 2292 USB_INTERFACE_DESCRIPTOR_SIZE, 2293 UDESC_INTERFACE, 2294 0, 2295 0, 2296 1, 2297 UICLASS_HUB, 2298 UISUBCLASS_HUB, 2299 UIPROTO_FSHUB, 2300 0 2301 }; 2302 2303 Static usb_endpoint_descriptor_t ohci_endpd = { 2304 USB_ENDPOINT_DESCRIPTOR_SIZE, 2305 UDESC_ENDPOINT, 2306 UE_DIR_IN | OHCI_INTR_ENDPT, 2307 UE_INTERRUPT, 2308 {8, 0}, /* max packet */ 2309 255 2310 }; 2311 2312 Static usb_hub_descriptor_t ohci_hubd = { 2313 USB_HUB_DESCRIPTOR_SIZE, 2314 UDESC_HUB, 2315 0, 2316 {0,0}, 2317 0, 2318 0, 2319 {0}, 2320 }; 2321 2322 Static int 2323 ohci_str(usb_string_descriptor_t *p, int l, const char *s) 2324 { 2325 int i; 2326 2327 if (l == 0) 2328 return (0); 2329 p->bLength = 2 * strlen(s) + 2; 2330 if (l == 1) 2331 return (1); 2332 p->bDescriptorType = UDESC_STRING; 2333 l -= 2; 2334 for (i = 0; s[i] && l > 1; i++, l -= 2) 2335 USETW2(p->bString[i], 0, s[i]); 2336 return (2*i+2); 2337 } 2338 2339 /* 2340 * Simulate a hardware hub by handling all the necessary requests. 2341 */ 2342 Static usbd_status 2343 ohci_root_ctrl_transfer(usbd_xfer_handle xfer) 2344 { 2345 usbd_status err; 2346 2347 /* Insert last in queue. */ 2348 err = usb_insert_transfer(xfer); 2349 if (err) 2350 return (err); 2351 2352 /* Pipe isn't running, start first */ 2353 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2354 } 2355 2356 Static usbd_status 2357 ohci_root_ctrl_start(usbd_xfer_handle xfer) 2358 { 2359 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2360 usb_device_request_t *req; 2361 void *buf = NULL; 2362 int port, i; 2363 int s, len, value, index, l, totlen = 0; 2364 usb_port_status_t ps; 2365 usb_hub_descriptor_t hubd; 2366 usbd_status err; 2367 u_int32_t v; 2368 2369 if (sc->sc_dying) 2370 return (USBD_IOERROR); 2371 2372 #ifdef DIAGNOSTIC 2373 if (!(xfer->rqflags & URQ_REQUEST)) 2374 /* XXX panic */ 2375 return (USBD_INVAL); 2376 #endif 2377 req = &xfer->request; 2378 2379 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 2380 req->bmRequestType, req->bRequest)); 2381 2382 len = UGETW(req->wLength); 2383 value = UGETW(req->wValue); 2384 index = UGETW(req->wIndex); 2385 2386 if (len != 0) 2387 buf = KERNADDR(&xfer->dmabuf, 0); 2388 2389 #define C(x,y) ((x) | ((y) << 8)) 2390 switch(C(req->bRequest, req->bmRequestType)) { 2391 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 2392 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 2393 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 2394 /* 2395 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 2396 * for the integrated root hub. 2397 */ 2398 break; 2399 case C(UR_GET_CONFIG, UT_READ_DEVICE): 2400 if (len > 0) { 2401 *(u_int8_t *)buf = sc->sc_conf; 2402 totlen = 1; 2403 } 2404 break; 2405 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2406 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 2407 switch(value >> 8) { 2408 case UDESC_DEVICE: 2409 if ((value & 0xff) != 0) { 2410 err = USBD_IOERROR; 2411 goto ret; 2412 } 2413 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 2414 USETW(ohci_devd.idVendor, sc->sc_id_vendor); 2415 memcpy(buf, &ohci_devd, l); 2416 break; 2417 case UDESC_CONFIG: 2418 if ((value & 0xff) != 0) { 2419 err = USBD_IOERROR; 2420 goto ret; 2421 } 2422 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 2423 memcpy(buf, &ohci_confd, l); 2424 buf = (char *)buf + l; 2425 len -= l; 2426 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 2427 totlen += l; 2428 memcpy(buf, &ohci_ifcd, l); 2429 buf = (char *)buf + l; 2430 len -= l; 2431 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 2432 totlen += l; 2433 memcpy(buf, &ohci_endpd, l); 2434 break; 2435 case UDESC_STRING: 2436 if (len == 0) 2437 break; 2438 *(u_int8_t *)buf = 0; 2439 totlen = 1; 2440 switch (value & 0xff) { 2441 case 1: /* Vendor */ 2442 totlen = ohci_str(buf, len, sc->sc_vendor); 2443 break; 2444 case 2: /* Product */ 2445 totlen = ohci_str(buf, len, "OHCI root hub"); 2446 break; 2447 } 2448 break; 2449 default: 2450 err = USBD_IOERROR; 2451 goto ret; 2452 } 2453 break; 2454 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 2455 if (len > 0) { 2456 *(u_int8_t *)buf = 0; 2457 totlen = 1; 2458 } 2459 break; 2460 case C(UR_GET_STATUS, UT_READ_DEVICE): 2461 if (len > 1) { 2462 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 2463 totlen = 2; 2464 } 2465 break; 2466 case C(UR_GET_STATUS, UT_READ_INTERFACE): 2467 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 2468 if (len > 1) { 2469 USETW(((usb_status_t *)buf)->wStatus, 0); 2470 totlen = 2; 2471 } 2472 break; 2473 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 2474 if (value >= USB_MAX_DEVICES) { 2475 err = USBD_IOERROR; 2476 goto ret; 2477 } 2478 sc->sc_addr = value; 2479 break; 2480 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 2481 if (value != 0 && value != 1) { 2482 err = USBD_IOERROR; 2483 goto ret; 2484 } 2485 sc->sc_conf = value; 2486 break; 2487 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 2488 break; 2489 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 2490 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 2491 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 2492 err = USBD_IOERROR; 2493 goto ret; 2494 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 2495 break; 2496 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 2497 break; 2498 /* Hub requests */ 2499 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2500 break; 2501 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2502 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 2503 "port=%d feature=%d\n", 2504 index, value)); 2505 if (index < 1 || index > sc->sc_noport) { 2506 err = USBD_IOERROR; 2507 goto ret; 2508 } 2509 port = OHCI_RH_PORT_STATUS(index); 2510 switch(value) { 2511 case UHF_PORT_ENABLE: 2512 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2513 break; 2514 case UHF_PORT_SUSPEND: 2515 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2516 break; 2517 case UHF_PORT_POWER: 2518 /* Yes, writing to the LOW_SPEED bit clears power. */ 2519 OWRITE4(sc, port, UPS_LOW_SPEED); 2520 break; 2521 case UHF_C_PORT_CONNECTION: 2522 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2523 break; 2524 case UHF_C_PORT_ENABLE: 2525 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2526 break; 2527 case UHF_C_PORT_SUSPEND: 2528 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2529 break; 2530 case UHF_C_PORT_OVER_CURRENT: 2531 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2532 break; 2533 case UHF_C_PORT_RESET: 2534 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2535 break; 2536 default: 2537 err = USBD_IOERROR; 2538 goto ret; 2539 } 2540 switch(value) { 2541 case UHF_C_PORT_CONNECTION: 2542 case UHF_C_PORT_ENABLE: 2543 case UHF_C_PORT_SUSPEND: 2544 case UHF_C_PORT_OVER_CURRENT: 2545 case UHF_C_PORT_RESET: 2546 /* Enable RHSC interrupt if condition is cleared. */ 2547 if ((OREAD4(sc, port) >> 16) == 0) 2548 ohci_rhsc_able(sc, 1); 2549 break; 2550 default: 2551 break; 2552 } 2553 break; 2554 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2555 if ((value & 0xff) != 0) { 2556 err = USBD_IOERROR; 2557 goto ret; 2558 } 2559 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2560 hubd = ohci_hubd; 2561 hubd.bNbrPorts = sc->sc_noport; 2562 USETW(hubd.wHubCharacteristics, 2563 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2564 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2565 /* XXX overcurrent */ 2566 ); 2567 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2568 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2569 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2570 hubd.DeviceRemovable[i++] = (u_int8_t)v; 2571 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2572 l = min(len, hubd.bDescLength); 2573 totlen = l; 2574 memcpy(buf, &hubd, l); 2575 break; 2576 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2577 if (len != 4) { 2578 err = USBD_IOERROR; 2579 goto ret; 2580 } 2581 memset(buf, 0, len); /* ? XXX */ 2582 totlen = len; 2583 break; 2584 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2585 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 2586 index)); 2587 if (index < 1 || index > sc->sc_noport) { 2588 err = USBD_IOERROR; 2589 goto ret; 2590 } 2591 if (len != 4) { 2592 err = USBD_IOERROR; 2593 goto ret; 2594 } 2595 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2596 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 2597 v)); 2598 USETW(ps.wPortStatus, v); 2599 USETW(ps.wPortChange, v >> 16); 2600 l = min(len, sizeof ps); 2601 memcpy(buf, &ps, l); 2602 totlen = l; 2603 break; 2604 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2605 err = USBD_IOERROR; 2606 goto ret; 2607 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2608 break; 2609 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2610 if (index < 1 || index > sc->sc_noport) { 2611 err = USBD_IOERROR; 2612 goto ret; 2613 } 2614 port = OHCI_RH_PORT_STATUS(index); 2615 switch(value) { 2616 case UHF_PORT_ENABLE: 2617 OWRITE4(sc, port, UPS_PORT_ENABLED); 2618 break; 2619 case UHF_PORT_SUSPEND: 2620 OWRITE4(sc, port, UPS_SUSPEND); 2621 break; 2622 case UHF_PORT_RESET: 2623 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 2624 index)); 2625 OWRITE4(sc, port, UPS_RESET); 2626 for (i = 0; i < 5; i++) { 2627 usb_delay_ms(&sc->sc_bus, 2628 USB_PORT_ROOT_RESET_DELAY); 2629 if (sc->sc_dying) { 2630 err = USBD_IOERROR; 2631 goto ret; 2632 } 2633 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2634 break; 2635 } 2636 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 2637 index, OREAD4(sc, port))); 2638 break; 2639 case UHF_PORT_POWER: 2640 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 2641 "%d\n", index)); 2642 OWRITE4(sc, port, UPS_PORT_POWER); 2643 break; 2644 default: 2645 err = USBD_IOERROR; 2646 goto ret; 2647 } 2648 break; 2649 default: 2650 err = USBD_IOERROR; 2651 goto ret; 2652 } 2653 xfer->actlen = totlen; 2654 err = USBD_NORMAL_COMPLETION; 2655 ret: 2656 xfer->status = err; 2657 s = splusb(); 2658 usb_transfer_complete(xfer); 2659 splx(s); 2660 return (USBD_IN_PROGRESS); 2661 } 2662 2663 /* Abort a root control request. */ 2664 Static void 2665 ohci_root_ctrl_abort(usbd_xfer_handle xfer) 2666 { 2667 /* Nothing to do, all transfers are synchronous. */ 2668 } 2669 2670 /* Close the root pipe. */ 2671 Static void 2672 ohci_root_ctrl_close(usbd_pipe_handle pipe) 2673 { 2674 DPRINTF(("ohci_root_ctrl_close\n")); 2675 /* Nothing to do. */ 2676 } 2677 2678 Static usbd_status 2679 ohci_root_intr_transfer(usbd_xfer_handle xfer) 2680 { 2681 usbd_status err; 2682 2683 /* Insert last in queue. */ 2684 err = usb_insert_transfer(xfer); 2685 if (err) 2686 return (err); 2687 2688 /* Pipe isn't running, start first */ 2689 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2690 } 2691 2692 Static usbd_status 2693 ohci_root_intr_start(usbd_xfer_handle xfer) 2694 { 2695 usbd_pipe_handle pipe = xfer->pipe; 2696 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2697 2698 if (sc->sc_dying) 2699 return (USBD_IOERROR); 2700 2701 sc->sc_intrxfer = xfer; 2702 2703 return (USBD_IN_PROGRESS); 2704 } 2705 2706 /* Abort a root interrupt request. */ 2707 Static void 2708 ohci_root_intr_abort(usbd_xfer_handle xfer) 2709 { 2710 int s; 2711 2712 if (xfer->pipe->intrxfer == xfer) { 2713 DPRINTF(("ohci_root_intr_abort: remove\n")); 2714 xfer->pipe->intrxfer = NULL; 2715 } 2716 xfer->status = USBD_CANCELLED; 2717 s = splusb(); 2718 usb_transfer_complete(xfer); 2719 splx(s); 2720 } 2721 2722 /* Close the root pipe. */ 2723 Static void 2724 ohci_root_intr_close(usbd_pipe_handle pipe) 2725 { 2726 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2727 2728 DPRINTF(("ohci_root_intr_close\n")); 2729 2730 sc->sc_intrxfer = NULL; 2731 } 2732 2733 /************************/ 2734 2735 Static usbd_status 2736 ohci_device_ctrl_transfer(usbd_xfer_handle xfer) 2737 { 2738 usbd_status err; 2739 2740 /* Insert last in queue. */ 2741 err = usb_insert_transfer(xfer); 2742 if (err) 2743 return (err); 2744 2745 /* Pipe isn't running, start first */ 2746 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2747 } 2748 2749 Static usbd_status 2750 ohci_device_ctrl_start(usbd_xfer_handle xfer) 2751 { 2752 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2753 usbd_status err; 2754 2755 if (sc->sc_dying) 2756 return (USBD_IOERROR); 2757 2758 #ifdef DIAGNOSTIC 2759 if (!(xfer->rqflags & URQ_REQUEST)) { 2760 /* XXX panic */ 2761 printf("ohci_device_ctrl_transfer: not a request\n"); 2762 return (USBD_INVAL); 2763 } 2764 #endif 2765 2766 err = ohci_device_request(xfer); 2767 if (err) 2768 return (err); 2769 2770 if (sc->sc_bus.use_polling) 2771 ohci_waitintr(sc, xfer); 2772 return (USBD_IN_PROGRESS); 2773 } 2774 2775 /* Abort a device control request. */ 2776 Static void 2777 ohci_device_ctrl_abort(usbd_xfer_handle xfer) 2778 { 2779 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer)); 2780 ohci_abort_xfer(xfer, USBD_CANCELLED); 2781 } 2782 2783 /* Close a device control pipe. */ 2784 Static void 2785 ohci_device_ctrl_close(usbd_pipe_handle pipe) 2786 { 2787 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2788 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2789 2790 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe)); 2791 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2792 ohci_free_std(sc, opipe->tail.td); 2793 } 2794 2795 /************************/ 2796 2797 Static void 2798 ohci_device_clear_toggle(usbd_pipe_handle pipe) 2799 { 2800 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2801 2802 opipe->sed->ed.ed_headp &= htole32(~OHCI_TOGGLECARRY); 2803 } 2804 2805 Static void 2806 ohci_noop(usbd_pipe_handle pipe) 2807 { 2808 } 2809 2810 Static usbd_status 2811 ohci_device_bulk_transfer(usbd_xfer_handle xfer) 2812 { 2813 usbd_status err; 2814 2815 /* Insert last in queue. */ 2816 err = usb_insert_transfer(xfer); 2817 if (err) 2818 return (err); 2819 2820 /* Pipe isn't running, start first */ 2821 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2822 } 2823 2824 Static usbd_status 2825 ohci_device_bulk_start(usbd_xfer_handle xfer) 2826 { 2827 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2828 usbd_device_handle dev = opipe->pipe.device; 2829 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2830 int addr = dev->address; 2831 ohci_soft_td_t *data, *tail, *tdp; 2832 ohci_soft_ed_t *sed; 2833 int s, len, isread, endpt; 2834 usbd_status err; 2835 2836 if (sc->sc_dying) 2837 return (USBD_IOERROR); 2838 2839 #ifdef DIAGNOSTIC 2840 if (xfer->rqflags & URQ_REQUEST) { 2841 /* XXX panic */ 2842 printf("ohci_device_bulk_start: a request\n"); 2843 return (USBD_INVAL); 2844 } 2845 #endif 2846 2847 len = xfer->length; 2848 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 2849 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2850 sed = opipe->sed; 2851 2852 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d " 2853 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags, 2854 endpt)); 2855 2856 opipe->u.bulk.isread = isread; 2857 opipe->u.bulk.length = len; 2858 2859 /* Update device address */ 2860 sed->ed.ed_flags = htole32( 2861 (le32toh(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) | 2862 OHCI_ED_SET_FA(addr)); 2863 2864 /* Allocate a chain of new TDs (including a new tail). */ 2865 data = opipe->tail.td; 2866 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 2867 data, &tail); 2868 /* We want interrupt at the end of the transfer. */ 2869 tail->td.td_flags &= htole32(~OHCI_TD_INTR_MASK); 2870 tail->td.td_flags |= htole32(OHCI_TD_SET_DI(1)); 2871 tail->flags |= OHCI_CALL_DONE; 2872 tail = tail->nexttd; /* point at sentinel */ 2873 if (err) 2874 return (err); 2875 2876 tail->xfer = NULL; 2877 xfer->hcpriv = data; 2878 2879 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x " 2880 "td_cbp=0x%08x td_be=0x%08x\n", 2881 (int)le32toh(sed->ed.ed_flags), 2882 (int)le32toh(data->td.td_flags), 2883 (int)le32toh(data->td.td_cbp), 2884 (int)le32toh(data->td.td_be))); 2885 2886 #ifdef OHCI_DEBUG 2887 if (ohcidebug > 5) { 2888 ohci_dump_ed(sed); 2889 ohci_dump_tds(data); 2890 } 2891 #endif 2892 2893 /* Insert ED in schedule */ 2894 s = splusb(); 2895 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 2896 tdp->xfer = xfer; 2897 } 2898 sed->ed.ed_tailp = htole32(tail->physaddr); 2899 opipe->tail.td = tail; 2900 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 2901 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 2902 if (xfer->timeout && !sc->sc_bus.use_polling) { 2903 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2904 ohci_timeout, xfer); 2905 } 2906 2907 #if 0 2908 /* This goes wrong if we are too slow. */ 2909 if (ohcidebug > 10) { 2910 delay(10000); 2911 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2912 OREAD4(sc, OHCI_COMMAND_STATUS))); 2913 ohci_dump_ed(sed); 2914 ohci_dump_tds(data); 2915 } 2916 #endif 2917 2918 splx(s); 2919 2920 return (USBD_IN_PROGRESS); 2921 } 2922 2923 Static void 2924 ohci_device_bulk_abort(usbd_xfer_handle xfer) 2925 { 2926 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer)); 2927 ohci_abort_xfer(xfer, USBD_CANCELLED); 2928 } 2929 2930 /* 2931 * Close a device bulk pipe. 2932 */ 2933 Static void 2934 ohci_device_bulk_close(usbd_pipe_handle pipe) 2935 { 2936 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2937 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2938 2939 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe)); 2940 ohci_close_pipe(pipe, sc->sc_bulk_head); 2941 ohci_free_std(sc, opipe->tail.td); 2942 } 2943 2944 /************************/ 2945 2946 Static usbd_status 2947 ohci_device_intr_transfer(usbd_xfer_handle xfer) 2948 { 2949 usbd_status err; 2950 2951 /* Insert last in queue. */ 2952 err = usb_insert_transfer(xfer); 2953 if (err) 2954 return (err); 2955 2956 /* Pipe isn't running, start first */ 2957 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2958 } 2959 2960 Static usbd_status 2961 ohci_device_intr_start(usbd_xfer_handle xfer) 2962 { 2963 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2964 usbd_device_handle dev = opipe->pipe.device; 2965 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2966 ohci_soft_ed_t *sed = opipe->sed; 2967 ohci_soft_td_t *data, *tail; 2968 int len; 2969 int s; 2970 2971 if (sc->sc_dying) 2972 return (USBD_IOERROR); 2973 2974 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d " 2975 "flags=%d priv=%p\n", 2976 xfer, xfer->length, xfer->flags, xfer->priv)); 2977 2978 #ifdef DIAGNOSTIC 2979 if (xfer->rqflags & URQ_REQUEST) 2980 panic("ohci_device_intr_transfer: a request"); 2981 #endif 2982 2983 len = xfer->length; 2984 2985 data = opipe->tail.td; 2986 tail = ohci_alloc_std(sc); 2987 if (tail == NULL) 2988 return (USBD_NOMEM); 2989 tail->xfer = NULL; 2990 2991 data->td.td_flags = htole32( 2992 OHCI_TD_IN | OHCI_TD_NOCC | 2993 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 2994 if (xfer->flags & USBD_SHORT_XFER_OK) 2995 data->td.td_flags |= htole32(OHCI_TD_R); 2996 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf, 0)); 2997 data->nexttd = tail; 2998 data->td.td_nexttd = htole32(tail->physaddr); 2999 data->td.td_be = htole32(le32toh(data->td.td_cbp) + len - 1); 3000 data->len = len; 3001 data->xfer = xfer; 3002 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 3003 xfer->hcpriv = data; 3004 3005 #ifdef OHCI_DEBUG 3006 if (ohcidebug > 5) { 3007 DPRINTF(("ohci_device_intr_transfer:\n")); 3008 ohci_dump_ed(sed); 3009 ohci_dump_tds(data); 3010 } 3011 #endif 3012 3013 /* Insert ED in schedule */ 3014 s = splusb(); 3015 sed->ed.ed_tailp = htole32(tail->physaddr); 3016 opipe->tail.td = tail; 3017 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 3018 3019 #if 0 3020 /* 3021 * This goes horribly wrong, printing thousands of descriptors, 3022 * because false references are followed due to the fact that the 3023 * TD is gone. 3024 */ 3025 if (ohcidebug > 5) { 3026 usb_delay_ms(&sc->sc_bus, 5); 3027 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 3028 OREAD4(sc, OHCI_COMMAND_STATUS))); 3029 ohci_dump_ed(sed); 3030 ohci_dump_tds(data); 3031 } 3032 #endif 3033 splx(s); 3034 3035 return (USBD_IN_PROGRESS); 3036 } 3037 3038 /* Abort a device control request. */ 3039 Static void 3040 ohci_device_intr_abort(usbd_xfer_handle xfer) 3041 { 3042 if (xfer->pipe->intrxfer == xfer) { 3043 DPRINTF(("ohci_device_intr_abort: remove\n")); 3044 xfer->pipe->intrxfer = NULL; 3045 } 3046 ohci_abort_xfer(xfer, USBD_CANCELLED); 3047 } 3048 3049 /* Close a device interrupt pipe. */ 3050 Static void 3051 ohci_device_intr_close(usbd_pipe_handle pipe) 3052 { 3053 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3054 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3055 int nslots = opipe->u.intr.nslots; 3056 int pos = opipe->u.intr.pos; 3057 int j; 3058 ohci_soft_ed_t *p, *sed = opipe->sed; 3059 int s; 3060 3061 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 3062 pipe, nslots, pos)); 3063 s = splusb(); 3064 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 3065 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 3066 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) 3067 usb_delay_ms(&sc->sc_bus, 2); 3068 3069 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 3070 ; 3071 #ifdef DIAGNOSTIC 3072 if (p == NULL) 3073 panic("ohci_device_intr_close: ED not found"); 3074 #endif 3075 p->next = sed->next; 3076 p->ed.ed_nexted = sed->ed.ed_nexted; 3077 splx(s); 3078 3079 for (j = 0; j < nslots; j++) 3080 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 3081 3082 ohci_free_std(sc, opipe->tail.td); 3083 ohci_free_sed(sc, opipe->sed); 3084 } 3085 3086 Static usbd_status 3087 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival) 3088 { 3089 int i, j, s, best; 3090 u_int npoll, slow, shigh, nslots; 3091 u_int bestbw, bw; 3092 ohci_soft_ed_t *hsed, *sed = opipe->sed; 3093 3094 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 3095 if (ival == 0) { 3096 printf("ohci_setintr: 0 interval\n"); 3097 return (USBD_INVAL); 3098 } 3099 3100 npoll = OHCI_NO_INTRS; 3101 while (npoll > ival) 3102 npoll /= 2; 3103 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 3104 3105 /* 3106 * We now know which level in the tree the ED must go into. 3107 * Figure out which slot has most bandwidth left over. 3108 * Slots to examine: 3109 * npoll 3110 * 1 0 3111 * 2 1 2 3112 * 4 3 4 5 6 3113 * 8 7 8 9 10 11 12 13 14 3114 * N (N-1) .. (N-1+N-1) 3115 */ 3116 slow = npoll-1; 3117 shigh = slow + npoll; 3118 nslots = OHCI_NO_INTRS / npoll; 3119 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 3120 bw = 0; 3121 for (j = 0; j < nslots; j++) 3122 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 3123 if (bw < bestbw) { 3124 best = i; 3125 bestbw = bw; 3126 } 3127 } 3128 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 3129 best, slow, shigh, bestbw)); 3130 3131 s = splusb(); 3132 hsed = sc->sc_eds[best]; 3133 sed->next = hsed->next; 3134 sed->ed.ed_nexted = hsed->ed.ed_nexted; 3135 hsed->next = sed; 3136 hsed->ed.ed_nexted = htole32(sed->physaddr); 3137 splx(s); 3138 3139 for (j = 0; j < nslots; j++) 3140 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 3141 opipe->u.intr.nslots = nslots; 3142 opipe->u.intr.pos = best; 3143 3144 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 3145 return (USBD_NORMAL_COMPLETION); 3146 } 3147 3148 /***********************/ 3149 3150 usbd_status 3151 ohci_device_isoc_transfer(usbd_xfer_handle xfer) 3152 { 3153 usbd_status err; 3154 3155 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer)); 3156 3157 /* Put it on our queue, */ 3158 err = usb_insert_transfer(xfer); 3159 3160 /* bail out on error, */ 3161 if (err && err != USBD_IN_PROGRESS) 3162 return (err); 3163 3164 /* XXX should check inuse here */ 3165 3166 /* insert into schedule, */ 3167 ohci_device_isoc_enter(xfer); 3168 3169 /* and start if the pipe wasn't running */ 3170 if (!err) 3171 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 3172 3173 return (err); 3174 } 3175 3176 void 3177 ohci_device_isoc_enter(usbd_xfer_handle xfer) 3178 { 3179 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3180 usbd_device_handle dev = opipe->pipe.device; 3181 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 3182 ohci_soft_ed_t *sed = opipe->sed; 3183 struct iso *iso = &opipe->u.iso; 3184 ohci_soft_itd_t *sitd, *nsitd; 3185 ohci_physaddr_t buf, offs, noffs, bp0; 3186 int i, ncur, nframes; 3187 int s; 3188 3189 DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p " 3190 "nframes=%d\n", 3191 iso->inuse, iso->next, xfer, xfer->nframes)); 3192 3193 if (sc->sc_dying) 3194 return; 3195 3196 if (iso->next == -1) { 3197 /* Not in use yet, schedule it a few frames ahead. */ 3198 iso->next = le32toh(sc->sc_hcca->hcca_frame_number) + 5; 3199 DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n", 3200 iso->next)); 3201 } 3202 3203 sitd = opipe->tail.itd; 3204 buf = DMAADDR(&xfer->dmabuf, 0); 3205 bp0 = OHCI_PAGE(buf); 3206 offs = OHCI_PAGE_OFFSET(buf); 3207 nframes = xfer->nframes; 3208 xfer->hcpriv = sitd; 3209 for (i = ncur = 0; i < nframes; i++, ncur++) { 3210 noffs = offs + xfer->frlengths[i]; 3211 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ 3212 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */ 3213 3214 /* Allocate next ITD */ 3215 nsitd = ohci_alloc_sitd(sc); 3216 if (nsitd == NULL) { 3217 /* XXX what now? */ 3218 printf("%s: isoc TD alloc failed\n", 3219 USBDEVNAME(sc->sc_bus.bdev)); 3220 return; 3221 } 3222 3223 /* Fill current ITD */ 3224 sitd->itd.itd_flags = htole32( 3225 OHCI_ITD_NOCC | 3226 OHCI_ITD_SET_SF(iso->next) | 3227 OHCI_ITD_SET_DI(6) | /* delay intr a little */ 3228 OHCI_ITD_SET_FC(ncur)); 3229 sitd->itd.itd_bp0 = htole32(bp0); 3230 sitd->nextitd = nsitd; 3231 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 3232 sitd->itd.itd_be = htole32(bp0 + offs - 1); 3233 sitd->xfer = xfer; 3234 sitd->flags = 0; 3235 3236 sitd = nsitd; 3237 iso->next = iso->next + ncur; 3238 bp0 = OHCI_PAGE(buf + offs); 3239 ncur = 0; 3240 } 3241 sitd->itd.itd_offset[ncur] = htole16(OHCI_ITD_MK_OFFS(offs)); 3242 offs = noffs; 3243 } 3244 nsitd = ohci_alloc_sitd(sc); 3245 if (nsitd == NULL) { 3246 /* XXX what now? */ 3247 printf("%s: isoc TD alloc failed\n", 3248 USBDEVNAME(sc->sc_bus.bdev)); 3249 return; 3250 } 3251 /* Fixup last used ITD */ 3252 sitd->itd.itd_flags = htole32( 3253 OHCI_ITD_NOCC | 3254 OHCI_ITD_SET_SF(iso->next) | 3255 OHCI_ITD_SET_DI(0) | 3256 OHCI_ITD_SET_FC(ncur)); 3257 sitd->itd.itd_bp0 = htole32(bp0); 3258 sitd->nextitd = nsitd; 3259 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 3260 sitd->itd.itd_be = htole32(bp0 + offs - 1); 3261 sitd->xfer = xfer; 3262 sitd->flags = OHCI_CALL_DONE; 3263 3264 iso->next = iso->next + ncur; 3265 iso->inuse += nframes; 3266 3267 xfer->actlen = offs; /* XXX pretend we did it all */ 3268 3269 xfer->status = USBD_IN_PROGRESS; 3270 3271 #ifdef OHCI_DEBUG 3272 if (ohcidebug > 5) { 3273 DPRINTF(("ohci_device_isoc_enter: frame=%d\n", 3274 le32toh(sc->sc_hcca->hcca_frame_number))); 3275 ohci_dump_itds(xfer->hcpriv); 3276 ohci_dump_ed(sed); 3277 } 3278 #endif 3279 3280 s = splusb(); 3281 opipe->tail.itd = nsitd; 3282 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 3283 sed->ed.ed_tailp = htole32(nsitd->physaddr); 3284 splx(s); 3285 3286 #ifdef OHCI_DEBUG 3287 if (ohcidebug > 5) { 3288 delay(150000); 3289 DPRINTF(("ohci_device_isoc_enter: after frame=%d\n", 3290 le32toh(sc->sc_hcca->hcca_frame_number))); 3291 ohci_dump_itds(xfer->hcpriv); 3292 ohci_dump_ed(sed); 3293 } 3294 #endif 3295 } 3296 3297 usbd_status 3298 ohci_device_isoc_start(usbd_xfer_handle xfer) 3299 { 3300 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3301 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3302 3303 DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer)); 3304 3305 if (sc->sc_dying) 3306 return (USBD_IOERROR); 3307 3308 #ifdef DIAGNOSTIC 3309 if (xfer->status != USBD_IN_PROGRESS) 3310 printf("ohci_device_isoc_start: not in progress %p\n", xfer); 3311 #endif 3312 3313 /* XXX anything to do? */ 3314 3315 return (USBD_IN_PROGRESS); 3316 } 3317 3318 void 3319 ohci_device_isoc_abort(usbd_xfer_handle xfer) 3320 { 3321 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3322 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3323 ohci_soft_ed_t *sed; 3324 ohci_soft_itd_t *sitd; 3325 int s; 3326 3327 s = splusb(); 3328 3329 DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer)); 3330 3331 /* Transfer is already done. */ 3332 if (xfer->status != USBD_NOT_STARTED && 3333 xfer->status != USBD_IN_PROGRESS) { 3334 splx(s); 3335 printf("ohci_device_isoc_abort: early return\n"); 3336 return; 3337 } 3338 3339 /* Give xfer the requested abort code. */ 3340 xfer->status = USBD_CANCELLED; 3341 3342 sed = opipe->sed; 3343 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 3344 3345 sitd = xfer->hcpriv; 3346 #ifdef DIAGNOSTIC 3347 if (sitd == NULL) { 3348 splx(s); 3349 printf("ohci_device_isoc_abort: hcpriv==0\n"); 3350 return; 3351 } 3352 #endif 3353 for (; sitd->xfer == xfer; sitd = sitd->nextitd) { 3354 #ifdef DIAGNOSTIC 3355 DPRINTFN(1,("abort sets done sitd=%p\n", sitd)); 3356 sitd->isdone = 1; 3357 #endif 3358 } 3359 3360 splx(s); 3361 3362 usb_delay_ms(&sc->sc_bus, OHCI_ITD_NOFFSET); 3363 3364 s = splusb(); 3365 3366 /* Run callback. */ 3367 usb_transfer_complete(xfer); 3368 3369 sed->ed.ed_headp = htole32(sitd->physaddr); /* unlink TDs */ 3370 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 3371 3372 splx(s); 3373 } 3374 3375 void 3376 ohci_device_isoc_done(usbd_xfer_handle xfer) 3377 { 3378 3379 DPRINTFN(1,("ohci_device_isoc_done: xfer=%p\n", xfer)); 3380 3381 xfer->hcpriv = NULL; 3382 } 3383 3384 usbd_status 3385 ohci_setup_isoc(usbd_pipe_handle pipe) 3386 { 3387 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3388 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3389 struct iso *iso = &opipe->u.iso; 3390 int s; 3391 3392 iso->next = -1; 3393 iso->inuse = 0; 3394 3395 s = splusb(); 3396 ohci_add_ed(opipe->sed, sc->sc_isoc_head); 3397 splx(s); 3398 3399 return (USBD_NORMAL_COMPLETION); 3400 } 3401 3402 void 3403 ohci_device_isoc_close(usbd_pipe_handle pipe) 3404 { 3405 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3406 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3407 3408 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe)); 3409 ohci_close_pipe(pipe, sc->sc_isoc_head); 3410 #ifdef DIAGNOSTIC 3411 opipe->tail.itd->isdone = 1; 3412 #endif 3413 ohci_free_sitd(sc, opipe->tail.itd); 3414 } 3415
Indexes created Tue Sep 23 07:09:52 GMT 2025