ohci.c revision 1.15
1 /* $NetBSD: ohci.c,v 1.15 1998/12/26 12:53:01 augustss Exp $ */ 2 3 /* 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (augustss (at) carlstedt.se) at 9 * Carlstedt Research & Technology. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * USB Open Host Controller driver. 42 * 43 * OHCI spec: http://www.intel.com/design/usb/ohci11d.pdf 44 * USB spec: http://www.teleport.com/cgi-bin/mailmerge.cgi/~usb/cgiform.tpl 45 */ 46 47 #include <sys/param.h> 48 #include <sys/systm.h> 49 #include <sys/kernel.h> 50 #include <sys/malloc.h> 51 #if defined(__NetBSD__) 52 #include <sys/device.h> 53 #elif defined(__FreeBSD__) 54 #include <sys/module.h> 55 #include <sys/bus.h> 56 #endif 57 #include <sys/proc.h> 58 #include <sys/queue.h> 59 #include <sys/select.h> 60 61 #include <machine/bus.h> 62 63 #include <dev/usb/usb.h> 64 #include <dev/usb/usbdi.h> 65 #include <dev/usb/usbdivar.h> 66 #include <dev/usb/usb_quirks.h> 67 #include <dev/usb/usb_mem.h> 68 69 #include <dev/usb/ohcireg.h> 70 #include <dev/usb/ohcivar.h> 71 72 #if defined(__FreeBSD__) 73 #include <machine/clock.h> 74 #include "dev/usb/queue.addendum.h" 75 76 #define delay(d) DELAY(d) 77 78 #endif 79 80 struct ohci_pipe; 81 82 ohci_soft_ed_t *ohci_alloc_sed __P((ohci_softc_t *)); 83 void ohci_free_sed __P((ohci_softc_t *, ohci_soft_ed_t *)); 84 85 ohci_soft_td_t *ohci_alloc_std __P((ohci_softc_t *)); 86 void ohci_free_std __P((ohci_softc_t *, ohci_soft_td_t *)); 87 88 usbd_status ohci_open __P((usbd_pipe_handle)); 89 void ohci_poll __P((struct usbd_bus *)); 90 void ohci_waitintr __P((ohci_softc_t *, usbd_request_handle)); 91 void ohci_rhsc __P((ohci_softc_t *, usbd_request_handle)); 92 void ohci_process_done __P((ohci_softc_t *, ohci_physaddr_t)); 93 void ohci_ii_done __P((ohci_softc_t *, usbd_request_handle)); 94 void ohci_ctrl_done __P((ohci_softc_t *, usbd_request_handle)); 95 void ohci_intr_done __P((ohci_softc_t *, usbd_request_handle)); 96 void ohci_bulk_done __P((ohci_softc_t *, usbd_request_handle)); 97 98 usbd_status ohci_device_request __P((usbd_request_handle reqh)); 99 void ohci_add_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *)); 100 void ohci_rem_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *)); 101 void ohci_hash_add_td __P((ohci_softc_t *, ohci_soft_td_t *)); 102 void ohci_hash_rem_td __P((ohci_softc_t *, ohci_soft_td_t *)); 103 ohci_soft_td_t *ohci_hash_find_td __P((ohci_softc_t *, ohci_physaddr_t)); 104 105 usbd_status ohci_root_ctrl_transfer __P((usbd_request_handle)); 106 void ohci_root_ctrl_abort __P((usbd_request_handle)); 107 void ohci_root_ctrl_close __P((usbd_pipe_handle)); 108 109 usbd_status ohci_root_intr_transfer __P((usbd_request_handle)); 110 void ohci_root_intr_abort __P((usbd_request_handle)); 111 void ohci_root_intr_close __P((usbd_pipe_handle)); 112 113 usbd_status ohci_device_ctrl_transfer __P((usbd_request_handle)); 114 void ohci_device_ctrl_abort __P((usbd_request_handle)); 115 void ohci_device_ctrl_close __P((usbd_pipe_handle)); 116 117 usbd_status ohci_device_bulk_transfer __P((usbd_request_handle)); 118 void ohci_device_bulk_abort __P((usbd_request_handle)); 119 void ohci_device_bulk_close __P((usbd_pipe_handle)); 120 121 usbd_status ohci_device_intr_transfer __P((usbd_request_handle)); 122 void ohci_device_intr_abort __P((usbd_request_handle)); 123 void ohci_device_intr_close __P((usbd_pipe_handle)); 124 usbd_status ohci_device_setintr __P((ohci_softc_t *sc, 125 struct ohci_pipe *pipe, int ival)); 126 127 int ohci_str __P((usb_string_descriptor_t *, int, char *)); 128 129 void ohci_timeout __P((void *)); 130 void ohci_rhsc_able __P((ohci_softc_t *, int)); 131 132 #ifdef USB_DEBUG 133 ohci_softc_t *thesc; 134 void ohci_dumpregs __P((ohci_softc_t *)); 135 void ohci_dump_tds __P((ohci_soft_td_t *)); 136 void ohci_dump_td __P((ohci_soft_td_t *)); 137 void ohci_dump_ed __P((ohci_soft_ed_t *)); 138 #endif 139 140 #if defined(__NetBSD__) 141 #define OWRITE4(sc, r, x) bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)) 142 #define OREAD4(sc, r) bus_space_read_4((sc)->iot, (sc)->ioh, (r)) 143 #define OREAD2(sc, r) bus_space_read_2((sc)->iot, (sc)->ioh, (r)) 144 #elif defined(__FreeBSD__) 145 #define OWRITE4(sc, r, x) outl((sc)->sc_iobase + (r), (x)) 146 #define OREAD4(sc, r) inl((sc)->sc_iobase + (r)) 147 #define OREAD2(sc, r) inw((sc)->sc_iobase + (r)) 148 #endif 149 150 /* Reverse the bits in a value 0 .. 31 */ 151 static u_int8_t revbits[OHCI_NO_INTRS] = 152 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 153 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 154 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 155 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 156 157 struct ohci_pipe { 158 struct usbd_pipe pipe; 159 ohci_soft_ed_t *sed; 160 ohci_soft_td_t *tail; 161 /* Info needed for different pipe kinds. */ 162 union { 163 /* Control pipe */ 164 struct { 165 usb_dma_t datadma; 166 usb_dma_t reqdma; 167 u_int length; 168 ohci_soft_td_t *setup, *xfer, *stat; 169 } ctl; 170 /* Interrupt pipe */ 171 struct { 172 usb_dma_t datadma; 173 int nslots; 174 int pos; 175 } intr; 176 /* Bulk pipe */ 177 struct { 178 usb_dma_t datadma; 179 u_int length; 180 } bulk; 181 } u; 182 }; 183 184 #define OHCI_INTR_ENDPT 1 185 186 struct usbd_methods ohci_root_ctrl_methods = { 187 ohci_root_ctrl_transfer, 188 ohci_root_ctrl_abort, 189 ohci_root_ctrl_close, 190 0, 191 }; 192 193 struct usbd_methods ohci_root_intr_methods = { 194 ohci_root_intr_transfer, 195 ohci_root_intr_abort, 196 ohci_root_intr_close, 197 0, 198 }; 199 200 struct usbd_methods ohci_device_ctrl_methods = { 201 ohci_device_ctrl_transfer, 202 ohci_device_ctrl_abort, 203 ohci_device_ctrl_close, 204 0, 205 }; 206 207 struct usbd_methods ohci_device_intr_methods = { 208 ohci_device_intr_transfer, 209 ohci_device_intr_abort, 210 ohci_device_intr_close, 211 }; 212 213 struct usbd_methods ohci_device_bulk_methods = { 214 ohci_device_bulk_transfer, 215 ohci_device_bulk_abort, 216 ohci_device_bulk_close, 217 0, 218 }; 219 220 ohci_soft_ed_t * 221 ohci_alloc_sed(sc) 222 ohci_softc_t *sc; 223 { 224 ohci_soft_ed_t *sed; 225 usbd_status r; 226 int i, offs; 227 usb_dma_t dma; 228 229 if (!sc->sc_freeeds) { 230 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 231 sed = malloc(sizeof(ohci_soft_ed_t) * OHCI_ED_CHUNK, 232 M_USBDEV, M_NOWAIT); 233 if (!sed) 234 return 0; 235 r = usb_allocmem(sc->sc_dmatag, OHCI_ED_SIZE * OHCI_ED_CHUNK, 236 OHCI_ED_ALIGN, &dma); 237 if (r != USBD_NORMAL_COMPLETION) { 238 free(sed, M_USBDEV); 239 return 0; 240 } 241 for(i = 0; i < OHCI_ED_CHUNK; i++, sed++) { 242 offs = i * OHCI_ED_SIZE; 243 sed->physaddr = DMAADDR(&dma) + offs; 244 sed->ed = (ohci_ed_t *) 245 ((char *)KERNADDR(&dma) + offs); 246 sed->next = sc->sc_freeeds; 247 sc->sc_freeeds = sed; 248 } 249 } 250 sed = sc->sc_freeeds; 251 sc->sc_freeeds = sed->next; 252 memset(sed->ed, 0, OHCI_ED_SIZE); 253 sed->next = 0; 254 return sed; 255 } 256 257 void 258 ohci_free_sed(sc, sed) 259 ohci_softc_t *sc; 260 ohci_soft_ed_t *sed; 261 { 262 sed->next = sc->sc_freeeds; 263 sc->sc_freeeds = sed; 264 } 265 266 ohci_soft_td_t * 267 ohci_alloc_std(sc) 268 ohci_softc_t *sc; 269 { 270 ohci_soft_td_t *std; 271 usbd_status r; 272 int i, offs; 273 usb_dma_t dma; 274 275 if (!sc->sc_freetds) { 276 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 277 std = malloc(sizeof(ohci_soft_td_t) * OHCI_TD_CHUNK, 278 M_USBDEV, M_NOWAIT); 279 if (!std) 280 return 0; 281 r = usb_allocmem(sc->sc_dmatag, OHCI_TD_SIZE * OHCI_TD_CHUNK, 282 OHCI_TD_ALIGN, &dma); 283 if (r != USBD_NORMAL_COMPLETION) { 284 free(std, M_USBDEV); 285 return 0; 286 } 287 for(i = 0; i < OHCI_TD_CHUNK; i++, std++) { 288 offs = i * OHCI_TD_SIZE; 289 std->physaddr = DMAADDR(&dma) + offs; 290 std->td = (ohci_td_t *) 291 ((char *)KERNADDR(&dma) + offs); 292 std->nexttd = sc->sc_freetds; 293 sc->sc_freetds = std; 294 } 295 } 296 std = sc->sc_freetds; 297 sc->sc_freetds = std->nexttd; 298 memset(std->td, 0, OHCI_TD_SIZE); 299 std->nexttd = 0; 300 return (std); 301 } 302 303 void 304 ohci_free_std(sc, std) 305 ohci_softc_t *sc; 306 ohci_soft_td_t *std; 307 { 308 std->nexttd = sc->sc_freetds; 309 sc->sc_freetds = std; 310 } 311 312 usbd_status 313 ohci_init(sc) 314 ohci_softc_t *sc; 315 { 316 ohci_soft_ed_t *sed, *psed; 317 usbd_status r; 318 int rev; 319 int i; 320 u_int32_t s, ctl, ival, hcr, fm, per; 321 322 DPRINTF(("ohci_init: start\n")); 323 rev = OREAD4(sc, OHCI_REVISION); 324 printf("%s: OHCI version %d.%d%s\n", USBDEVNAME(sc->sc_bus.bdev), 325 OHCI_REV_HI(rev), OHCI_REV_LO(rev), 326 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 327 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 328 printf("%s: unsupported OHCI revision\n", 329 USBDEVNAME(sc->sc_bus.bdev)); 330 return (USBD_INVAL); 331 } 332 333 for (i = 0; i < OHCI_HASH_SIZE; i++) 334 LIST_INIT(&sc->sc_hash_tds[i]); 335 336 /* Allocate the HCCA area. */ 337 r = usb_allocmem(sc->sc_dmatag, OHCI_HCCA_SIZE, 338 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 339 if (r != USBD_NORMAL_COMPLETION) 340 return (r); 341 sc->sc_hcca = (struct ohci_hcca *)KERNADDR(&sc->sc_hccadma); 342 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 343 344 sc->sc_eintrs = OHCI_NORMAL_INTRS; 345 346 sc->sc_ctrl_head = ohci_alloc_sed(sc); 347 if (!sc->sc_ctrl_head) { 348 r = USBD_NOMEM; 349 goto bad1; 350 } 351 sc->sc_ctrl_head->ed->ed_flags |= OHCI_ED_SKIP; 352 sc->sc_bulk_head = ohci_alloc_sed(sc); 353 if (!sc->sc_bulk_head) { 354 r = USBD_NOMEM; 355 goto bad2; 356 } 357 sc->sc_bulk_head->ed->ed_flags |= OHCI_ED_SKIP; 358 359 /* Allocate all the dummy EDs that make up the interrupt tree. */ 360 for (i = 0; i < OHCI_NO_EDS; i++) { 361 sed = ohci_alloc_sed(sc); 362 if (!sed) { 363 while (--i >= 0) 364 ohci_free_sed(sc, sc->sc_eds[i]); 365 r = USBD_NOMEM; 366 goto bad3; 367 } 368 /* All ED fields are set to 0. */ 369 sc->sc_eds[i] = sed; 370 sed->ed->ed_flags |= OHCI_ED_SKIP; 371 if (i != 0) { 372 psed = sc->sc_eds[(i-1) / 2]; 373 sed->next = psed; 374 sed->ed->ed_nexted = psed->physaddr; 375 } 376 } 377 /* 378 * Fill HCCA interrupt table. The bit reversal is to get 379 * the tree set up properly to spread the interrupts. 380 */ 381 for (i = 0; i < OHCI_NO_INTRS; i++) 382 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 383 sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr; 384 385 /* Determine in what context we are running. */ 386 ctl = OREAD4(sc, OHCI_CONTROL); 387 if (ctl & OHCI_IR) { 388 /* SMM active, request change */ 389 DPRINTF(("ohci_init: SMM active, request owner change\n")); 390 s = OREAD4(sc, OHCI_COMMAND_STATUS); 391 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 392 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 393 delay(1000); 394 ctl = OREAD4(sc, OHCI_CONTROL); 395 } 396 if ((ctl & OHCI_IR) == 0) { 397 printf("%s: SMM does not respond, resetting\n", 398 USBDEVNAME(sc->sc_bus.bdev)); 399 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 400 goto reset; 401 } 402 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 403 /* BIOS started controller. */ 404 DPRINTF(("ohci_init: BIOS active\n")); 405 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 406 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL); 407 delay(USB_RESUME_DELAY * 1000); 408 } 409 } else { 410 DPRINTF(("ohci_init: cold started\n")); 411 reset: 412 /* Controller was cold started. */ 413 delay(USB_RESET_DELAY * 1000); 414 } 415 416 /* We now own the host controller and the bus has been reset. */ 417 ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL)); 418 419 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 420 /* Nominal time for a reset is 10 us. */ 421 for (i = 0; i < 10; i++) { 422 delay(10); 423 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 424 if (!hcr) 425 break; 426 } 427 if (hcr) { 428 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 429 r = USBD_IOERROR; 430 goto bad3; 431 } 432 #ifdef USB_DEBUG 433 thesc = sc; 434 if (ohcidebug > 15) 435 ohci_dumpregs(sc); 436 #endif 437 438 /* The controller is now in suspend state, we have 2ms to finish. */ 439 440 /* Set up HC registers. */ 441 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma)); 442 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 443 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 444 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 445 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 446 ctl = OREAD4(sc, OHCI_CONTROL); 447 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 448 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 449 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL; 450 /* And finally start it! */ 451 OWRITE4(sc, OHCI_CONTROL, ctl); 452 453 /* 454 * The controller is now OPERATIONAL. Set a some final 455 * registers that should be set earlier, but that the 456 * controller ignores when in the SUSPEND state. 457 */ 458 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 459 fm |= OHCI_FSMPS(ival) | ival; 460 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 461 per = OHCI_PERIODIC(ival); /* 90% periodic */ 462 OWRITE4(sc, OHCI_PERIODIC_START, per); 463 464 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 465 466 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 467 468 #ifdef USB_DEBUG 469 if (ohcidebug > 5) 470 ohci_dumpregs(sc); 471 #endif 472 473 /* Set up the bus struct. */ 474 sc->sc_bus.open_pipe = ohci_open; 475 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 476 sc->sc_bus.do_poll = ohci_poll; 477 478 return (USBD_NORMAL_COMPLETION); 479 480 bad3: 481 ohci_free_sed(sc, sc->sc_ctrl_head); 482 bad2: 483 ohci_free_sed(sc, sc->sc_bulk_head); 484 bad1: 485 usb_freemem(sc->sc_dmatag, &sc->sc_hccadma); 486 return (r); 487 } 488 489 #ifdef USB_DEBUG 490 void ohcidump(void); 491 void ohcidump(void) { ohci_dumpregs(thesc); } 492 493 void 494 ohci_dumpregs(sc) 495 ohci_softc_t *sc; 496 { 497 printf("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 498 OREAD4(sc, OHCI_REVISION), 499 OREAD4(sc, OHCI_CONTROL), 500 OREAD4(sc, OHCI_COMMAND_STATUS)); 501 printf(" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 502 OREAD4(sc, OHCI_INTERRUPT_STATUS), 503 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 504 OREAD4(sc, OHCI_INTERRUPT_DISABLE)); 505 printf(" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 506 OREAD4(sc, OHCI_HCCA), 507 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 508 OREAD4(sc, OHCI_CONTROL_HEAD_ED)); 509 printf(" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 510 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 511 OREAD4(sc, OHCI_BULK_HEAD_ED), 512 OREAD4(sc, OHCI_BULK_CURRENT_ED)); 513 printf(" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 514 OREAD4(sc, OHCI_DONE_HEAD), 515 OREAD4(sc, OHCI_FM_INTERVAL), 516 OREAD4(sc, OHCI_FM_REMAINING)); 517 printf(" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 518 OREAD4(sc, OHCI_FM_NUMBER), 519 OREAD4(sc, OHCI_PERIODIC_START), 520 OREAD4(sc, OHCI_LS_THRESHOLD)); 521 printf(" desca=0x%08x descb=0x%08x stat=0x%08x\n", 522 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 523 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 524 OREAD4(sc, OHCI_RH_STATUS)); 525 printf(" port1=0x%08x port2=0x%08x\n", 526 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 527 OREAD4(sc, OHCI_RH_PORT_STATUS(2))); 528 printf(" HCCA: frame_number=0x%04x done_head=0x%08x\n", 529 sc->sc_hcca->hcca_frame_number, 530 sc->sc_hcca->hcca_done_head); 531 } 532 #endif 533 534 int 535 ohci_intr(p) 536 void *p; 537 { 538 ohci_softc_t *sc = p; 539 u_int32_t intrs, eintrs; 540 ohci_physaddr_t done; 541 542 /* In case the interrupt occurs before initialization has completed. */ 543 if (sc->sc_hcca == NULL) { 544 #ifdef DIAGNOSTIC 545 printf("ohci_intr: sc->sc_hcca == NULL\n"); 546 #endif 547 return (0); 548 } 549 550 done = sc->sc_hcca->hcca_done_head; 551 if (done != 0) { 552 intrs = OHCI_WDH; 553 if (done & OHCI_DONE_INTRS) 554 intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS); 555 } else 556 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 557 if (!intrs) 558 return (0); 559 intrs &= ~OHCI_MIE; 560 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */ 561 eintrs = intrs & sc->sc_eintrs; 562 if (!eintrs) 563 return (0); 564 565 sc->sc_intrs++; 566 DPRINTFN(7, ("ohci_intr: sc=%p intrs=%x(%x) eintr=%x\n", 567 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 568 (u_int)eintrs)); 569 570 if (eintrs & OHCI_SO) { 571 printf("%s: scheduling overrun\n",USBDEVNAME(sc->sc_bus.bdev)); 572 /* XXX do what */ 573 intrs &= ~OHCI_SO; 574 } 575 if (eintrs & OHCI_WDH) { 576 ohci_process_done(sc, done &~ OHCI_DONE_INTRS); 577 sc->sc_hcca->hcca_done_head = 0; 578 intrs &= ~OHCI_WDH; 579 } 580 if (eintrs & OHCI_RD) { 581 /* XXX process resume detect */ 582 } 583 if (eintrs & OHCI_UE) { 584 printf("%s: unrecoverable error, controller halted\n", 585 USBDEVNAME(sc->sc_bus.bdev)); 586 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 587 /* XXX what else */ 588 } 589 if (eintrs & OHCI_RHSC) { 590 ohci_rhsc(sc, sc->sc_intrreqh); 591 intrs &= ~OHCI_RHSC; 592 593 /* 594 * Disable RHSC interrupt for now, because it will be 595 * on until the port has been reset. 596 */ 597 ohci_rhsc_able(sc, 0); 598 } 599 600 /* Block unprocessed interrupts. XXX */ 601 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, intrs); 602 sc->sc_eintrs &= ~intrs; 603 604 return (1); 605 } 606 607 void 608 ohci_rhsc_able(sc, on) 609 ohci_softc_t *sc; 610 int on; 611 { 612 DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on)); 613 if (on) { 614 sc->sc_eintrs |= OHCI_RHSC; 615 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 616 } else { 617 sc->sc_eintrs &= ~OHCI_RHSC; 618 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC); 619 } 620 } 621 622 #ifdef USB_DEBUG 623 char *ohci_cc_strs[] = { 624 "NO_ERROR", 625 "CRC", 626 "BIT_STUFFING", 627 "DATA_TOGGLE_MISMATCH", 628 "STALL", 629 "DEVICE_NOT_RESPONDING", 630 "PID_CHECK_FAILURE", 631 "UNEXPECTED_PID", 632 "DATA_OVERRUN", 633 "DATA_UNDERRUN", 634 "BUFFER_OVERRUN", 635 "BUFFER_UNDERRUN", 636 "NOT_ACCESSED", 637 }; 638 #endif 639 640 void 641 ohci_process_done(sc, done) 642 ohci_softc_t *sc; 643 ohci_physaddr_t done; 644 { 645 ohci_soft_td_t *std, *sdone; 646 usbd_request_handle reqh; 647 int len, cc; 648 649 DPRINTFN(10,("ohci_process_done: done=0x%08lx\n", (u_long)done)); 650 651 /* Reverse the done list. */ 652 for (sdone = 0; done; done = std->td->td_nexttd) { 653 std = ohci_hash_find_td(sc, done); 654 std->dnext = sdone; 655 sdone = std; 656 } 657 658 #ifdef USB_DEBUG 659 if (ohcidebug > 10) { 660 printf("ohci_process_done: TD done:\n"); 661 ohci_dump_tds(sdone); 662 } 663 #endif 664 665 for (std = sdone; std; std = std->dnext) { 666 reqh = std->reqh; 667 DPRINTFN(10, ("ohci_process_done: std=%p reqh=%p\n",std,reqh)); 668 cc = OHCI_TD_GET_CC(std->td->td_flags); 669 if (cc == OHCI_CC_NO_ERROR) { 670 if (std->td->td_cbp == 0) 671 len = std->len; 672 else 673 len = std->td->td_be - std->td->td_cbp + 1; 674 reqh->actlen += len; 675 reqh->status = USBD_NORMAL_COMPLETION; 676 /* 677 * Only do a callback on the last stage of a transfer. 678 * Others have hcpriv = 0. 679 */ 680 if (reqh->hcpriv == std) 681 ohci_ii_done(sc, reqh); 682 } else { 683 ohci_soft_td_t *p, *n; 684 struct ohci_pipe *opipe = 685 (struct ohci_pipe *)reqh->pipe; 686 DPRINTFN(-1,("ohci_process_done: error cc=%d (%s)\n", 687 OHCI_TD_GET_CC(std->td->td_flags), 688 ohci_cc_strs[OHCI_TD_GET_CC(std->td->td_flags)])); 689 /* 690 * Endpoint is halted. First unlink all the TDs 691 * belonging to the failed transfer, and then restart 692 * the endpoint. 693 */ 694 for (p = std->nexttd; p->reqh == reqh; p = n) { 695 n = p->nexttd; 696 ohci_hash_rem_td(sc, p); 697 ohci_free_std(sc, p); 698 } 699 opipe->sed->ed->ed_headp = p->physaddr;/* clear halt */ 700 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 701 702 if (cc == OHCI_CC_STALL) 703 reqh->status = USBD_STALLED; 704 else 705 reqh->status = USBD_IOERROR; 706 ohci_ii_done(sc, reqh); 707 } 708 ohci_hash_rem_td(sc, std); 709 ohci_free_std(sc, std); 710 } 711 } 712 713 void 714 ohci_ii_done(sc, reqh) 715 ohci_softc_t *sc; 716 usbd_request_handle reqh; 717 { 718 switch (reqh->pipe->endpoint->edesc->bmAttributes & UE_XFERTYPE) { 719 case UE_CONTROL: 720 ohci_ctrl_done(sc, reqh); 721 break; 722 case UE_INTERRUPT: 723 ohci_intr_done(sc, reqh); 724 break; 725 case UE_BULK: 726 ohci_bulk_done(sc, reqh); 727 break; 728 case UE_ISOCHRONOUS: 729 printf("ohci_process_done: ISO done?\n"); 730 break; 731 } 732 733 /* And finally execute callback. */ 734 reqh->xfercb(reqh); 735 } 736 737 void 738 ohci_ctrl_done(sc, reqh) 739 ohci_softc_t *sc; 740 usbd_request_handle reqh; 741 { 742 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe; 743 u_int len = opipe->u.ctl.length; 744 usb_dma_t *dma; 745 746 DPRINTFN(10,("ohci_ctrl_done: reqh=%p\n", reqh)); 747 748 if (!reqh->isreq) { 749 panic("ohci_ctrl_done: not a request\n"); 750 return; 751 } 752 753 if (len != 0) { 754 dma = &opipe->u.ctl.datadma; 755 if (reqh->request.bmRequestType & UT_READ) 756 memcpy(reqh->buffer, KERNADDR(dma), len); 757 usb_freemem(sc->sc_dmatag, dma); 758 } 759 usb_untimeout(ohci_timeout, reqh, reqh->timo_handle); 760 } 761 762 void 763 ohci_intr_done(sc, reqh) 764 ohci_softc_t *sc; 765 usbd_request_handle reqh; 766 { 767 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe; 768 usb_dma_t *dma; 769 ohci_soft_ed_t *sed = opipe->sed; 770 ohci_soft_td_t *xfer, *tail; 771 772 773 DPRINTFN(10,("ohci_intr_done: reqh=%p, actlen=%d\n", 774 reqh, reqh->actlen)); 775 776 dma = &opipe->u.intr.datadma; 777 memcpy(reqh->buffer, KERNADDR(dma), reqh->actlen); 778 779 if (reqh->pipe->intrreqh == reqh) { 780 xfer = opipe->tail; 781 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 782 if (!tail) { 783 reqh->status = USBD_NOMEM; 784 return; 785 } 786 tail->reqh = 0; 787 788 xfer->td->td_flags = OHCI_TD_IN | OHCI_TD_NOCC | 789 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY; 790 xfer->td->td_cbp = DMAADDR(dma); 791 xfer->nexttd = tail; 792 xfer->td->td_nexttd = tail->physaddr; 793 xfer->td->td_be = xfer->td->td_cbp + reqh->length - 1; 794 xfer->len = reqh->length; 795 xfer->reqh = reqh; 796 797 reqh->actlen = 0; 798 reqh->hcpriv = xfer; 799 800 ohci_hash_add_td(sc, xfer); 801 sed->ed->ed_tailp = tail->physaddr; 802 opipe->tail = tail; 803 } else { 804 usb_freemem(sc->sc_dmatag, dma); 805 } 806 } 807 808 void 809 ohci_bulk_done(sc, reqh) 810 ohci_softc_t *sc; 811 usbd_request_handle reqh; 812 { 813 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe; 814 usb_dma_t *dma; 815 816 817 DPRINTFN(10,("ohci_bulk_done: reqh=%p, actlen=%d\n", 818 reqh, reqh->actlen)); 819 820 dma = &opipe->u.bulk.datadma; 821 if (reqh->request.bmRequestType & UT_READ) 822 memcpy(reqh->buffer, KERNADDR(dma), reqh->actlen); 823 usb_freemem(sc->sc_dmatag, dma); 824 usb_untimeout(ohci_timeout, reqh, reqh->timo_handle); 825 } 826 827 void 828 ohci_rhsc(sc, reqh) 829 ohci_softc_t *sc; 830 usbd_request_handle reqh; 831 { 832 usbd_pipe_handle pipe; 833 struct ohci_pipe *opipe; 834 u_char *p; 835 int i, m; 836 int hstatus; 837 838 hstatus = OREAD4(sc, OHCI_RH_STATUS); 839 DPRINTF(("ohci_rhsc: sc=%p reqh=%p hstatus=0x%08x\n", 840 sc, reqh, hstatus)); 841 842 if (reqh == 0) { 843 /* Just ignore the change. */ 844 return; 845 } 846 847 pipe = reqh->pipe; 848 opipe = (struct ohci_pipe *)pipe; 849 850 p = KERNADDR(&opipe->u.intr.datadma); 851 m = min(sc->sc_noport, reqh->length * 8 - 1); 852 memset(p, 0, reqh->length); 853 for (i = 1; i <= m; i++) { 854 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 855 p[i/8] |= 1 << (i%8); 856 } 857 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 858 reqh->actlen = reqh->length; 859 reqh->status = USBD_NORMAL_COMPLETION; 860 reqh->xfercb(reqh); 861 862 if (reqh->pipe->intrreqh != reqh) { 863 sc->sc_intrreqh = 0; 864 usb_freemem(sc->sc_dmatag, &opipe->u.intr.datadma); 865 } 866 } 867 868 /* 869 * Wait here until controller claims to have an interrupt. 870 * Then call ohci_intr and return. Use timeout to avoid waiting 871 * too long. 872 */ 873 void 874 ohci_waitintr(sc, reqh) 875 ohci_softc_t *sc; 876 usbd_request_handle reqh; 877 { 878 int timo = reqh->timeout; 879 int usecs; 880 u_int32_t intrs; 881 882 reqh->status = USBD_IN_PROGRESS; 883 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 884 usbd_delay_ms(&sc->sc_bus, 1); 885 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 886 DPRINTFN(10,("ohci_waitintr: 0x%04x\n", intrs)); 887 #ifdef USB_DEBUG 888 if (ohcidebug > 15) 889 ohci_dumpregs(sc); 890 #endif 891 if (intrs) { 892 ohci_intr(sc); 893 if (reqh->status != USBD_IN_PROGRESS) 894 return; 895 } 896 } 897 898 /* Timeout */ 899 DPRINTF(("ohci_waitintr: timeout\n")); 900 reqh->status = USBD_TIMEOUT; 901 ohci_ii_done(sc, reqh); 902 /* XXX should free TD */ 903 } 904 905 void 906 ohci_poll(bus) 907 struct usbd_bus *bus; 908 { 909 ohci_softc_t *sc = (ohci_softc_t *)bus; 910 911 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) 912 ohci_intr(sc); 913 } 914 915 usbd_status 916 ohci_device_request(reqh) 917 usbd_request_handle reqh; 918 { 919 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe; 920 usb_device_request_t *req = &reqh->request; 921 usbd_device_handle dev = opipe->pipe.device; 922 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 923 int addr = dev->address; 924 ohci_soft_td_t *setup, *xfer = 0, *stat, *next, *tail; 925 ohci_soft_ed_t *sed; 926 usb_dma_t *dmap; 927 int isread; 928 int len; 929 usbd_status r; 930 int s; 931 932 isread = req->bmRequestType & UT_READ; 933 len = UGETW(req->wLength); 934 935 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 936 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 937 req->bmRequestType, req->bRequest, UGETW(req->wValue), 938 UGETW(req->wIndex), len, addr, 939 opipe->pipe.endpoint->edesc->bEndpointAddress)); 940 941 setup = opipe->tail; 942 stat = ohci_alloc_std(sc); 943 if (!stat) { 944 r = USBD_NOMEM; 945 goto bad1; 946 } 947 tail = ohci_alloc_std(sc); 948 if (!tail) { 949 r = USBD_NOMEM; 950 goto bad2; 951 } 952 tail->reqh = 0; 953 954 sed = opipe->sed; 955 dmap = &opipe->u.ctl.datadma; 956 opipe->u.ctl.length = len; 957 958 /* Update device address and length since they may have changed. */ 959 /* XXX This only needs to be done once, but it's too early in open. */ 960 sed->ed->ed_flags = 961 (sed->ed->ed_flags & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) | 962 OHCI_ED_SET_FA(addr) | 963 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize)); 964 965 /* Set up data transaction */ 966 if (len != 0) { 967 xfer = ohci_alloc_std(sc); 968 if (!xfer) { 969 r = USBD_NOMEM; 970 goto bad3; 971 } 972 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap); 973 if (r != USBD_NORMAL_COMPLETION) 974 goto bad4; 975 xfer->td->td_flags = 976 (isread ? OHCI_TD_IN : OHCI_TD_OUT) | OHCI_TD_NOCC | 977 OHCI_TD_TOGGLE_1 | OHCI_TD_NOINTR; 978 xfer->td->td_cbp = DMAADDR(dmap); 979 xfer->nexttd = stat; 980 xfer->td->td_nexttd = stat->physaddr; 981 xfer->td->td_be = xfer->td->td_cbp + len - 1; 982 xfer->len = len; 983 xfer->reqh = reqh; 984 985 next = xfer; 986 } else 987 next = stat; 988 989 memcpy(KERNADDR(&opipe->u.ctl.reqdma), req, sizeof *req); 990 if (!isread && len != 0) 991 memcpy(KERNADDR(dmap), reqh->buffer, len); 992 993 setup->td->td_flags = OHCI_TD_SETUP | OHCI_TD_NOCC | 994 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR; 995 setup->td->td_cbp = DMAADDR(&opipe->u.ctl.reqdma); 996 setup->nexttd = next; 997 setup->td->td_nexttd = next->physaddr; 998 setup->td->td_be = setup->td->td_cbp + sizeof *req - 1; 999 setup->len = 0; /* XXX The number of byte we count */ 1000 setup->reqh = reqh; 1001 1002 stat->td->td_flags = 1003 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | OHCI_TD_NOCC | 1004 OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1); 1005 stat->td->td_cbp = 0; 1006 stat->nexttd = tail; 1007 stat->td->td_nexttd = tail->physaddr; 1008 stat->td->td_be = 0; 1009 stat->len = 0; 1010 stat->reqh = reqh; 1011 1012 reqh->actlen = 0; 1013 reqh->hcpriv = stat; 1014 1015 #if USB_DEBUG 1016 if (ohcidebug > 5) { 1017 printf("ohci_device_request:\n"); 1018 ohci_dump_ed(sed); 1019 ohci_dump_tds(setup); 1020 } 1021 #endif 1022 1023 /* Insert ED in schedule */ 1024 s = splusb(); 1025 ohci_hash_add_td(sc, setup); 1026 if (len != 0) 1027 ohci_hash_add_td(sc, xfer); 1028 ohci_hash_add_td(sc, stat); 1029 sed->ed->ed_tailp = tail->physaddr; 1030 opipe->tail = tail; 1031 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1032 if (reqh->timeout && !sc->sc_bus.use_polling) { 1033 usb_timeout(ohci_timeout, reqh, 1034 MS_TO_TICKS(reqh->timeout), reqh->timo_handle); 1035 } 1036 splx(s); 1037 1038 #if USB_DEBUG 1039 if (ohcidebug > 5) { 1040 delay(5000); 1041 printf("ohci_device_request: status=%x\n", 1042 OREAD4(sc, OHCI_COMMAND_STATUS)); 1043 ohci_dump_ed(sed); 1044 ohci_dump_tds(setup); 1045 } 1046 #endif 1047 1048 return (USBD_NORMAL_COMPLETION); 1049 1050 bad4: 1051 ohci_free_std(sc, xfer); 1052 bad3: 1053 ohci_free_std(sc, tail); 1054 bad2: 1055 ohci_free_std(sc, stat); 1056 bad1: 1057 return (r); 1058 } 1059 1060 /* 1061 * Add an ED to the schedule. Called at splusb(). 1062 */ 1063 void 1064 ohci_add_ed(sed, head) 1065 ohci_soft_ed_t *sed; 1066 ohci_soft_ed_t *head; 1067 { 1068 sed->next = head->next; 1069 sed->ed->ed_nexted = head->ed->ed_nexted; 1070 head->next = sed; 1071 head->ed->ed_nexted = sed->physaddr; 1072 } 1073 1074 /* 1075 * Remove an ED from the schedule. Called at splusb(). 1076 */ 1077 void 1078 ohci_rem_ed(sed, head) 1079 ohci_soft_ed_t *sed; 1080 ohci_soft_ed_t *head; 1081 { 1082 ohci_soft_ed_t *p; 1083 1084 /* XXX */ 1085 for (p = head; p && p->next != sed; p = p->next) 1086 ; 1087 if (!p) 1088 panic("ohci_rem_ed: ED not found\n"); 1089 p->next = sed->next; 1090 p->ed->ed_nexted = sed->ed->ed_nexted; 1091 } 1092 1093 /* 1094 * When a transfer is completed the TD is added to the done queue by 1095 * the host controller. This queue is the processed by software. 1096 * Unfortunately the queue contains the physical address of the TD 1097 * and we have no simple way to translate this back to a kernel address. 1098 * To make the translation possible (and fast) we use a hash table of 1099 * TDs currently in the schedule. The physical address is used as the 1100 * hash value. 1101 */ 1102 1103 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1104 /* Called at splusb() */ 1105 void 1106 ohci_hash_add_td(sc, std) 1107 ohci_softc_t *sc; 1108 ohci_soft_td_t *std; 1109 { 1110 int h = HASH(std->physaddr); 1111 1112 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1113 } 1114 1115 /* Called at splusb() */ 1116 void 1117 ohci_hash_rem_td(sc, std) 1118 ohci_softc_t *sc; 1119 ohci_soft_td_t *std; 1120 { 1121 LIST_REMOVE(std, hnext); 1122 } 1123 1124 ohci_soft_td_t * 1125 ohci_hash_find_td(sc, a) 1126 ohci_softc_t *sc; 1127 ohci_physaddr_t a; 1128 { 1129 int h = HASH(a); 1130 ohci_soft_td_t *std; 1131 1132 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1133 std != 0; 1134 std = LIST_NEXT(std, hnext)) 1135 if (std->physaddr == a) 1136 return (std); 1137 panic("ohci_hash_find_td: addr 0x%08lx not found\n", (u_long)a); 1138 } 1139 1140 void 1141 ohci_timeout(addr) 1142 void *addr; 1143 { 1144 #if 0 1145 usbd_request_handle *reqh = addr; 1146 int s; 1147 1148 DPRINTF(("ohci_timeout: reqh=%p\n", reqh)); 1149 s = splusb(); 1150 /* XXX need to inactivate TD before calling interrupt routine */ 1151 ohci_XXX_done(reqh); 1152 splx(s); 1153 #endif 1154 } 1155 1156 #ifdef USB_DEBUG 1157 void 1158 ohci_dump_tds(std) 1159 ohci_soft_td_t *std; 1160 { 1161 for (; std; std = std->nexttd) 1162 ohci_dump_td(std); 1163 } 1164 1165 void 1166 ohci_dump_td(std) 1167 ohci_soft_td_t *std; 1168 { 1169 printf("TD(%p) at %08lx: %b delay=%d ec=%d cc=%d\ncbp=0x%08lx " 1170 "nexttd=0x%08lx be=0x%08lx\n", 1171 std, (u_long)std->physaddr, 1172 (u_long)std->td->td_flags, 1173 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 1174 OHCI_TD_GET_DI(std->td->td_flags), 1175 OHCI_TD_GET_EC(std->td->td_flags), 1176 OHCI_TD_GET_CC(std->td->td_flags), 1177 (u_long)std->td->td_cbp, 1178 (u_long)std->td->td_nexttd, (u_long)std->td->td_be); 1179 } 1180 1181 void 1182 ohci_dump_ed(sed) 1183 ohci_soft_ed_t *sed; 1184 { 1185 printf("ED(%p) at %08lx: addr=%d endpt=%d maxp=%d %b\ntailp=0x%08lx " 1186 "headp=%b nexted=0x%08lx\n", 1187 sed, (u_long)sed->physaddr, 1188 OHCI_ED_GET_FA(sed->ed->ed_flags), 1189 OHCI_ED_GET_EN(sed->ed->ed_flags), 1190 OHCI_ED_GET_MAXP(sed->ed->ed_flags), 1191 (u_long)sed->ed->ed_flags, 1192 "\20\14OUT\15IN\16LOWSPEED\17SKIP\18ISO", 1193 (u_long)sed->ed->ed_tailp, 1194 (u_long)sed->ed->ed_headp, "\20\1HALT\2CARRY", 1195 (u_long)sed->ed->ed_nexted); 1196 } 1197 #endif 1198 1199 usbd_status 1200 ohci_open(pipe) 1201 usbd_pipe_handle pipe; 1202 { 1203 usbd_device_handle dev = pipe->device; 1204 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1205 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1206 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1207 u_int8_t addr = dev->address; 1208 ohci_soft_ed_t *sed; 1209 ohci_soft_td_t *std; 1210 usbd_status r; 1211 int s; 1212 1213 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1214 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1215 if (addr == sc->sc_addr) { 1216 switch (ed->bEndpointAddress) { 1217 case USB_CONTROL_ENDPOINT: 1218 pipe->methods = &ohci_root_ctrl_methods; 1219 break; 1220 case UE_IN | OHCI_INTR_ENDPT: 1221 pipe->methods = &ohci_root_intr_methods; 1222 break; 1223 default: 1224 return (USBD_INVAL); 1225 } 1226 } else { 1227 sed = ohci_alloc_sed(sc); 1228 if (sed == 0) 1229 goto bad0; 1230 std = ohci_alloc_std(sc); 1231 if (std == 0) 1232 goto bad1; 1233 opipe->sed = sed; 1234 opipe->tail = std; 1235 sed->ed->ed_flags = 1236 OHCI_ED_SET_FA(addr) | 1237 OHCI_ED_SET_EN(ed->bEndpointAddress) | 1238 OHCI_ED_DIR_TD | 1239 (dev->lowspeed ? OHCI_ED_SPEED : 0) | 1240 ((ed->bmAttributes & UE_XFERTYPE) == UE_ISOCHRONOUS ? 1241 OHCI_ED_FORMAT_ISO : OHCI_ED_FORMAT_GEN) | 1242 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize)); 1243 sed->ed->ed_headp = sed->ed->ed_tailp = std->physaddr; 1244 1245 switch (ed->bmAttributes & UE_XFERTYPE) { 1246 case UE_CONTROL: 1247 pipe->methods = &ohci_device_ctrl_methods; 1248 r = usb_allocmem(sc->sc_dmatag, 1249 sizeof(usb_device_request_t), 1250 0, &opipe->u.ctl.reqdma); 1251 if (r != USBD_NORMAL_COMPLETION) 1252 goto bad; 1253 s = splusb(); 1254 ohci_add_ed(sed, sc->sc_ctrl_head); 1255 splx(s); 1256 break; 1257 case UE_INTERRUPT: 1258 pipe->methods = &ohci_device_intr_methods; 1259 return (ohci_device_setintr(sc, opipe, ed->bInterval)); 1260 case UE_ISOCHRONOUS: 1261 printf("ohci_open: open iso unimplemented\n"); 1262 return (USBD_XXX); 1263 case UE_BULK: 1264 pipe->methods = &ohci_device_bulk_methods; 1265 s = splusb(); 1266 ohci_add_ed(sed, sc->sc_bulk_head); 1267 splx(s); 1268 break; 1269 } 1270 } 1271 return (USBD_NORMAL_COMPLETION); 1272 1273 bad: 1274 ohci_free_std(sc, std); 1275 bad1: 1276 ohci_free_sed(sc, sed); 1277 bad0: 1278 return (USBD_NOMEM); 1279 1280 } 1281 1282 /* 1283 * Data structures and routines to emulate the root hub. 1284 */ 1285 usb_device_descriptor_t ohci_devd = { 1286 USB_DEVICE_DESCRIPTOR_SIZE, 1287 UDESC_DEVICE, /* type */ 1288 {0x00, 0x01}, /* USB version */ 1289 UCLASS_HUB, /* class */ 1290 USUBCLASS_HUB, /* subclass */ 1291 0, /* protocol */ 1292 64, /* max packet */ 1293 {0},{0},{0x00,0x01}, /* device id */ 1294 1,2,0, /* string indicies */ 1295 1 /* # of configurations */ 1296 }; 1297 1298 usb_config_descriptor_t ohci_confd = { 1299 USB_CONFIG_DESCRIPTOR_SIZE, 1300 UDESC_CONFIG, 1301 {USB_CONFIG_DESCRIPTOR_SIZE + 1302 USB_INTERFACE_DESCRIPTOR_SIZE + 1303 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1304 1, 1305 1, 1306 0, 1307 UC_SELF_POWERED, 1308 0 /* max power */ 1309 }; 1310 1311 usb_interface_descriptor_t ohci_ifcd = { 1312 USB_INTERFACE_DESCRIPTOR_SIZE, 1313 UDESC_INTERFACE, 1314 0, 1315 0, 1316 1, 1317 UCLASS_HUB, 1318 USUBCLASS_HUB, 1319 0, 1320 0 1321 }; 1322 1323 usb_endpoint_descriptor_t ohci_endpd = { 1324 USB_ENDPOINT_DESCRIPTOR_SIZE, 1325 UDESC_ENDPOINT, 1326 UE_IN | OHCI_INTR_ENDPT, 1327 UE_INTERRUPT, 1328 {8, 0}, /* max packet */ 1329 255 1330 }; 1331 1332 usb_hub_descriptor_t ohci_hubd = { 1333 USB_HUB_DESCRIPTOR_SIZE, 1334 UDESC_HUB, 1335 0, 1336 {0,0}, 1337 0, 1338 0, 1339 {0}, 1340 }; 1341 1342 int 1343 ohci_str(p, l, s) 1344 usb_string_descriptor_t *p; 1345 int l; 1346 char *s; 1347 { 1348 int i; 1349 1350 if (l == 0) 1351 return (0); 1352 p->bLength = 2 * strlen(s) + 2; 1353 if (l == 1) 1354 return (1); 1355 p->bDescriptorType = UDESC_STRING; 1356 l -= 2; 1357 for (i = 0; s[i] && l > 1; i++, l -= 2) 1358 USETW2(p->bString[i], 0, s[i]); 1359 return (2*i+2); 1360 } 1361 1362 /* 1363 * Simulate a hardware hub by handling all the necessary requests. 1364 */ 1365 usbd_status 1366 ohci_root_ctrl_transfer(reqh) 1367 usbd_request_handle reqh; 1368 { 1369 ohci_softc_t *sc = (ohci_softc_t *)reqh->pipe->device->bus; 1370 usb_device_request_t *req; 1371 void *buf; 1372 int port, i; 1373 int len, value, index, l, totlen = 0; 1374 usb_port_status_t ps; 1375 usb_hub_descriptor_t hubd; 1376 usbd_status r; 1377 u_int32_t v; 1378 1379 if (!reqh->isreq) 1380 /* XXX panic */ 1381 return (USBD_INVAL); 1382 req = &reqh->request; 1383 buf = reqh->buffer; 1384 1385 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 1386 req->bmRequestType, req->bRequest)); 1387 1388 len = UGETW(req->wLength); 1389 value = UGETW(req->wValue); 1390 index = UGETW(req->wIndex); 1391 #define C(x,y) ((x) | ((y) << 8)) 1392 switch(C(req->bRequest, req->bmRequestType)) { 1393 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 1394 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 1395 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 1396 /* 1397 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 1398 * for the integrated root hub. 1399 */ 1400 break; 1401 case C(UR_GET_CONFIG, UT_READ_DEVICE): 1402 if (len > 0) { 1403 *(u_int8_t *)buf = sc->sc_conf; 1404 totlen = 1; 1405 } 1406 break; 1407 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 1408 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 1409 switch(value >> 8) { 1410 case UDESC_DEVICE: 1411 if ((value & 0xff) != 0) { 1412 r = USBD_IOERROR; 1413 goto ret; 1414 } 1415 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1416 memcpy(buf, &ohci_devd, l); 1417 break; 1418 case UDESC_CONFIG: 1419 if ((value & 0xff) != 0) { 1420 r = USBD_IOERROR; 1421 goto ret; 1422 } 1423 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 1424 memcpy(buf, &ohci_confd, l); 1425 buf = (char *)buf + l; 1426 len -= l; 1427 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 1428 totlen += l; 1429 memcpy(buf, &ohci_ifcd, l); 1430 buf = (char *)buf + l; 1431 len -= l; 1432 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 1433 totlen += l; 1434 memcpy(buf, &ohci_endpd, l); 1435 break; 1436 case UDESC_STRING: 1437 if (len == 0) 1438 break; 1439 *(u_int8_t *)buf = 0; 1440 totlen = 1; 1441 switch (value & 0xff) { 1442 case 1: /* Vendor */ 1443 totlen = ohci_str(buf, len, sc->sc_vendor); 1444 break; 1445 case 2: /* Product */ 1446 totlen = ohci_str(buf, len, "OHCI root hub"); 1447 break; 1448 } 1449 break; 1450 default: 1451 r = USBD_IOERROR; 1452 goto ret; 1453 } 1454 break; 1455 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 1456 if (len > 0) { 1457 *(u_int8_t *)buf = 0; 1458 totlen = 1; 1459 } 1460 break; 1461 case C(UR_GET_STATUS, UT_READ_DEVICE): 1462 if (len > 1) { 1463 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 1464 totlen = 2; 1465 } 1466 break; 1467 case C(UR_GET_STATUS, UT_READ_INTERFACE): 1468 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 1469 if (len > 1) { 1470 USETW(((usb_status_t *)buf)->wStatus, 0); 1471 totlen = 2; 1472 } 1473 break; 1474 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 1475 if (value >= USB_MAX_DEVICES) { 1476 r = USBD_IOERROR; 1477 goto ret; 1478 } 1479 sc->sc_addr = value; 1480 break; 1481 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 1482 if (value != 0 && value != 1) { 1483 r = USBD_IOERROR; 1484 goto ret; 1485 } 1486 sc->sc_conf = value; 1487 break; 1488 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 1489 break; 1490 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 1491 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 1492 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 1493 r = USBD_IOERROR; 1494 goto ret; 1495 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 1496 break; 1497 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 1498 break; 1499 /* Hub requests */ 1500 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 1501 break; 1502 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 1503 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 1504 "port=%d feature=%d\n", 1505 index, value)); 1506 if (index < 1 || index > sc->sc_noport) { 1507 r = USBD_IOERROR; 1508 goto ret; 1509 } 1510 port = OHCI_RH_PORT_STATUS(index); 1511 switch(value) { 1512 case UHF_PORT_ENABLE: 1513 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 1514 break; 1515 case UHF_PORT_SUSPEND: 1516 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 1517 break; 1518 case UHF_PORT_POWER: 1519 OWRITE4(sc, port, UPS_LOW_SPEED); 1520 break; 1521 case UHF_C_PORT_CONNECTION: 1522 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 1523 break; 1524 case UHF_C_PORT_ENABLE: 1525 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 1526 break; 1527 case UHF_C_PORT_SUSPEND: 1528 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 1529 break; 1530 case UHF_C_PORT_OVER_CURRENT: 1531 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 1532 break; 1533 case UHF_C_PORT_RESET: 1534 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 1535 break; 1536 default: 1537 r = USBD_IOERROR; 1538 goto ret; 1539 } 1540 switch(value) { 1541 case UHF_C_PORT_CONNECTION: 1542 case UHF_C_PORT_ENABLE: 1543 case UHF_C_PORT_SUSPEND: 1544 case UHF_C_PORT_OVER_CURRENT: 1545 case UHF_C_PORT_RESET: 1546 /* Enable RHSC interrupt if condition is cleared. */ 1547 if ((OREAD4(sc, port) >> 16) == 0) 1548 ohci_rhsc_able(sc, 1); 1549 break; 1550 default: 1551 break; 1552 } 1553 break; 1554 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 1555 if (value != 0) { 1556 r = USBD_IOERROR; 1557 goto ret; 1558 } 1559 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 1560 hubd = ohci_hubd; 1561 hubd.bNbrPorts = sc->sc_noport; 1562 USETW(hubd.wHubCharacteristics, 1563 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 1564 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 1565 /* XXX overcurrent */ 1566 ); 1567 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 1568 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 1569 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 1570 hubd.DeviceRemovable[i++] = (u_int8_t)v; 1571 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 1572 l = min(len, hubd.bDescLength); 1573 totlen = l; 1574 memcpy(buf, &hubd, l); 1575 break; 1576 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 1577 if (len != 4) { 1578 r = USBD_IOERROR; 1579 goto ret; 1580 } 1581 memset(buf, 0, len); /* ? XXX */ 1582 totlen = len; 1583 break; 1584 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 1585 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 1586 index)); 1587 if (index < 1 || index > sc->sc_noport) { 1588 r = USBD_IOERROR; 1589 goto ret; 1590 } 1591 if (len != 4) { 1592 r = USBD_IOERROR; 1593 goto ret; 1594 } 1595 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 1596 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 1597 v)); 1598 USETW(ps.wPortStatus, v); 1599 USETW(ps.wPortChange, v >> 16); 1600 l = min(len, sizeof ps); 1601 memcpy(buf, &ps, l); 1602 totlen = l; 1603 break; 1604 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 1605 r = USBD_IOERROR; 1606 goto ret; 1607 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 1608 break; 1609 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 1610 if (index < 1 || index > sc->sc_noport) { 1611 r = USBD_IOERROR; 1612 goto ret; 1613 } 1614 port = OHCI_RH_PORT_STATUS(index); 1615 switch(value) { 1616 case UHF_PORT_ENABLE: 1617 OWRITE4(sc, port, UPS_PORT_ENABLED); 1618 break; 1619 case UHF_PORT_SUSPEND: 1620 OWRITE4(sc, port, UPS_SUSPEND); 1621 break; 1622 case UHF_PORT_RESET: 1623 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 1624 index)); 1625 OWRITE4(sc, port, UPS_RESET); 1626 for (i = 0; i < 10; i++) { 1627 usbd_delay_ms(&sc->sc_bus, 10); 1628 if ((OREAD4(sc, port) & UPS_RESET) == 0) 1629 break; 1630 } 1631 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 1632 index, OREAD4(sc, port))); 1633 break; 1634 case UHF_PORT_POWER: 1635 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 1636 "%d\n", index)); 1637 OWRITE4(sc, port, UPS_PORT_POWER); 1638 break; 1639 default: 1640 r = USBD_IOERROR; 1641 goto ret; 1642 } 1643 break; 1644 default: 1645 r = USBD_IOERROR; 1646 goto ret; 1647 } 1648 reqh->actlen = totlen; 1649 r = USBD_NORMAL_COMPLETION; 1650 ret: 1651 reqh->status = r; 1652 reqh->xfercb(reqh); 1653 return (USBD_IN_PROGRESS); 1654 } 1655 1656 /* Abort a root control request. */ 1657 void 1658 ohci_root_ctrl_abort(reqh) 1659 usbd_request_handle reqh; 1660 { 1661 /* Nothing to do, all transfers are synchronous. */ 1662 } 1663 1664 /* Close the root pipe. */ 1665 void 1666 ohci_root_ctrl_close(pipe) 1667 usbd_pipe_handle pipe; 1668 { 1669 DPRINTF(("ohci_root_ctrl_close\n")); 1670 } 1671 1672 usbd_status 1673 ohci_root_intr_transfer(reqh) 1674 usbd_request_handle reqh; 1675 { 1676 usbd_pipe_handle pipe = reqh->pipe; 1677 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 1678 struct ohci_pipe *upipe = (struct ohci_pipe *)pipe; 1679 usb_dma_t *dmap; 1680 usbd_status r; 1681 int len; 1682 1683 len = reqh->length; 1684 dmap = &upipe->u.intr.datadma; 1685 if (len == 0) 1686 return (USBD_INVAL); /* XXX should it be? */ 1687 1688 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap); 1689 if (r != USBD_NORMAL_COMPLETION) 1690 return (r); 1691 sc->sc_intrreqh = reqh; 1692 1693 return (USBD_IN_PROGRESS); 1694 } 1695 1696 /* Abort a root interrupt request. */ 1697 void 1698 ohci_root_intr_abort(reqh) 1699 usbd_request_handle reqh; 1700 { 1701 /* No need to abort. */ 1702 } 1703 1704 /* Close the root pipe. */ 1705 void 1706 ohci_root_intr_close(pipe) 1707 usbd_pipe_handle pipe; 1708 { 1709 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 1710 sc->sc_intrreqh = 0; 1711 1712 DPRINTF(("ohci_root_intr_close\n")); 1713 } 1714 1715 /************************/ 1716 1717 usbd_status 1718 ohci_device_ctrl_transfer(reqh) 1719 usbd_request_handle reqh; 1720 { 1721 ohci_softc_t *sc = (ohci_softc_t *)reqh->pipe->device->bus; 1722 usbd_status r; 1723 1724 if (!reqh->isreq) { 1725 /* XXX panic */ 1726 printf("ohci_device_ctrl_transfer: not a request\n"); 1727 return (USBD_INVAL); 1728 } 1729 1730 r = ohci_device_request(reqh); 1731 if (r != USBD_NORMAL_COMPLETION) 1732 return (r); 1733 1734 if (sc->sc_bus.use_polling) 1735 ohci_waitintr(sc, reqh); 1736 return (USBD_IN_PROGRESS); 1737 } 1738 1739 /* Abort a device control request. */ 1740 void 1741 ohci_device_ctrl_abort(reqh) 1742 usbd_request_handle reqh; 1743 { 1744 /* XXX inactivate */ 1745 usbd_delay_ms(reqh->pipe->device->bus, 1); /* make sure it is donw */ 1746 /* XXX call done */ 1747 } 1748 1749 /* Close a device control pipe. */ 1750 void 1751 ohci_device_ctrl_close(pipe) 1752 usbd_pipe_handle pipe; 1753 { 1754 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1755 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 1756 ohci_soft_ed_t *sed = opipe->sed; 1757 int s; 1758 1759 s = splusb(); 1760 sed->ed->ed_flags |= OHCI_ED_SKIP; 1761 if ((sed->ed->ed_tailp & OHCI_TAILMASK) != sed->ed->ed_headp) 1762 usbd_delay_ms(&sc->sc_bus, 2); 1763 ohci_rem_ed(sed, sc->sc_ctrl_head); 1764 splx(s); 1765 ohci_free_std(sc, opipe->tail); 1766 ohci_free_sed(sc, opipe->sed); 1767 /* XXX free other resources */ 1768 } 1769 1770 /************************/ 1771 1772 usbd_status 1773 ohci_device_bulk_transfer(reqh) 1774 usbd_request_handle reqh; 1775 { 1776 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe; 1777 usbd_device_handle dev = opipe->pipe.device; 1778 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1779 int addr = dev->address; 1780 ohci_soft_td_t *xfer, *tail; 1781 ohci_soft_ed_t *sed; 1782 usb_dma_t *dmap; 1783 usbd_status r; 1784 int s, len, isread; 1785 1786 if (reqh->isreq) { 1787 /* XXX panic */ 1788 printf("ohci_device_bulk_transfer: a request\n"); 1789 return (USBD_INVAL); 1790 } 1791 1792 len = reqh->length; 1793 dmap = &opipe->u.bulk.datadma; 1794 isread = reqh->pipe->endpoint->edesc->bEndpointAddress & UE_IN; 1795 sed = opipe->sed; 1796 1797 opipe->u.bulk.length = len; 1798 1799 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap); 1800 if (r != USBD_NORMAL_COMPLETION) 1801 goto ret1; 1802 1803 tail = ohci_alloc_std(sc); 1804 if (!tail) { 1805 r = USBD_NOMEM; 1806 goto ret2; 1807 } 1808 tail->reqh = 0; 1809 1810 /* Update device address */ 1811 sed->ed->ed_flags = 1812 (sed->ed->ed_flags & ~OHCI_ED_ADDRMASK) | 1813 OHCI_ED_SET_FA(addr); 1814 1815 /* Set up data transaction */ 1816 xfer = opipe->tail; 1817 xfer->td->td_flags = 1818 (isread ? OHCI_TD_IN : OHCI_TD_OUT) | OHCI_TD_NOCC | 1819 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY; 1820 xfer->td->td_cbp = DMAADDR(dmap); 1821 xfer->nexttd = tail; 1822 xfer->td->td_nexttd = tail->physaddr; 1823 xfer->td->td_be = xfer->td->td_cbp + len - 1; 1824 xfer->len = len; 1825 xfer->reqh = reqh; 1826 1827 reqh->actlen = 0; 1828 reqh->hcpriv = xfer; 1829 1830 if (!isread) 1831 memcpy(KERNADDR(dmap), reqh->buffer, len); 1832 1833 /* Insert ED in schedule */ 1834 s = splusb(); 1835 ohci_hash_add_td(sc, xfer); 1836 sed->ed->ed_tailp = tail->physaddr; 1837 opipe->tail = tail; 1838 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 1839 if (reqh->timeout && !sc->sc_bus.use_polling) { 1840 usb_timeout(ohci_timeout, reqh, 1841 MS_TO_TICKS(reqh->timeout), reqh->timo_handle); 1842 } 1843 splx(s); 1844 1845 return (USBD_IN_PROGRESS); 1846 1847 ret2: 1848 usb_freemem(sc->sc_dmatag, dmap); 1849 ret1: 1850 return (r); 1851 } 1852 1853 /* Abort a device bulk request. */ 1854 void 1855 ohci_device_bulk_abort(reqh) 1856 usbd_request_handle reqh; 1857 { 1858 #if 0 1859 sed->ed->ed_flags |= OHCI_ED_SKIP; 1860 if ((sed->ed->ed_tailp & OHCI_TAILMASK) != sed->ed->ed_headp) 1861 usbd_delay_ms(reqh->pipe->device->bus, 2); 1862 #endif 1863 /* XXX inactivate */ 1864 usbd_delay_ms(reqh->pipe->device->bus, 1); /* make sure it is done */ 1865 /* XXX call done */ 1866 } 1867 1868 /* Close a device bulk pipe. */ 1869 void 1870 ohci_device_bulk_close(pipe) 1871 usbd_pipe_handle pipe; 1872 { 1873 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1874 usbd_device_handle dev = opipe->pipe.device; 1875 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1876 int s; 1877 1878 s = splusb(); 1879 ohci_rem_ed(opipe->sed, sc->sc_bulk_head); 1880 splx(s); 1881 ohci_free_std(sc, opipe->tail); 1882 ohci_free_sed(sc, opipe->sed); 1883 /* XXX free other resources */ 1884 } 1885 1886 /************************/ 1887 1888 usbd_status 1889 ohci_device_intr_transfer(reqh) 1890 usbd_request_handle reqh; 1891 { 1892 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe; 1893 usbd_device_handle dev = opipe->pipe.device; 1894 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1895 ohci_soft_ed_t *sed = opipe->sed; 1896 ohci_soft_td_t *xfer, *tail; 1897 usb_dma_t *dmap; 1898 usbd_status r; 1899 int len; 1900 int s; 1901 1902 DPRINTFN(3, ("ohci_device_intr_transfer: reqh=%p buf=%p len=%d " 1903 "flags=%d priv=%p\n", 1904 reqh, reqh->buffer, reqh->length, reqh->flags, reqh->priv)); 1905 1906 if (reqh->isreq) 1907 panic("ohci_device_intr_transfer: a request\n"); 1908 1909 len = reqh->length; 1910 dmap = &opipe->u.intr.datadma; 1911 if (len == 0) 1912 return (USBD_INVAL); /* XXX should it be? */ 1913 1914 xfer = opipe->tail; 1915 tail = ohci_alloc_std(sc); 1916 if (!tail) { 1917 r = USBD_NOMEM; 1918 goto ret1; 1919 } 1920 tail->reqh = 0; 1921 1922 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap); 1923 if (r != USBD_NORMAL_COMPLETION) 1924 goto ret2; 1925 1926 xfer->td->td_flags = OHCI_TD_IN | OHCI_TD_NOCC | 1927 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY; 1928 xfer->td->td_cbp = DMAADDR(dmap); 1929 xfer->nexttd = tail; 1930 xfer->td->td_nexttd = tail->physaddr; 1931 xfer->td->td_be = xfer->td->td_cbp + len - 1; 1932 xfer->len = len; 1933 xfer->reqh = reqh; 1934 1935 reqh->actlen = 0; 1936 reqh->hcpriv = xfer; 1937 1938 #if USB_DEBUG 1939 if (ohcidebug > 5) { 1940 printf("ohci_device_intr_transfer:\n"); 1941 ohci_dump_ed(sed); 1942 ohci_dump_tds(xfer); 1943 } 1944 #endif 1945 1946 /* Insert ED in schedule */ 1947 s = splusb(); 1948 ohci_hash_add_td(sc, xfer); 1949 sed->ed->ed_tailp = tail->physaddr; 1950 opipe->tail = tail; 1951 #if 0 1952 if (reqh->timeout && !sc->sc_bus.use_polling) { 1953 usb_timeout(ohci_timeout, reqh, 1954 MS_TO_TICKS(reqh->timeout), reqh->timo_handle); 1955 } 1956 #endif 1957 sed->ed->ed_flags &= ~OHCI_ED_SKIP; 1958 splx(s); 1959 1960 #ifdef USB_DEBUG 1961 if (ohcidebug > 5) { 1962 delay(5000); 1963 printf("ohci_device_intr_transfer: status=%x\n", 1964 OREAD4(sc, OHCI_COMMAND_STATUS)); 1965 ohci_dump_ed(sed); 1966 ohci_dump_tds(xfer); 1967 } 1968 #endif 1969 1970 return (USBD_IN_PROGRESS); 1971 1972 ret2: 1973 ohci_free_std(sc, xfer); 1974 ret1: 1975 return (r); 1976 } 1977 1978 /* Abort a device control request. */ 1979 void 1980 ohci_device_intr_abort(reqh) 1981 usbd_request_handle reqh; 1982 { 1983 /* XXX inactivate */ 1984 usbd_delay_ms(reqh->pipe->device->bus, 1); /* make sure it is done */ 1985 if (reqh->pipe->intrreqh == reqh) { 1986 DPRINTF(("ohci_device_intr_abort: remove\n")); 1987 reqh->pipe->intrreqh = 0; 1988 ohci_intr_done((ohci_softc_t *)reqh->pipe->device->bus, reqh); 1989 } 1990 } 1991 1992 /* Close a device interrupt pipe. */ 1993 void 1994 ohci_device_intr_close(pipe) 1995 usbd_pipe_handle pipe; 1996 { 1997 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1998 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 1999 int nslots = opipe->u.intr.nslots; 2000 int pos = opipe->u.intr.pos; 2001 int j; 2002 ohci_soft_ed_t *p, *sed = opipe->sed; 2003 int s; 2004 2005 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 2006 pipe, nslots, pos)); 2007 s = splusb(); 2008 sed->ed->ed_flags |= OHCI_ED_SKIP; 2009 if ((sed->ed->ed_tailp & OHCI_TAILMASK) != sed->ed->ed_headp) 2010 usbd_delay_ms(&sc->sc_bus, 2); 2011 2012 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 2013 ; 2014 if (!p) 2015 panic("ohci_device_intr_close: ED not found\n"); 2016 p->next = sed->next; 2017 p->ed->ed_nexted = sed->ed->ed_nexted; 2018 splx(s); 2019 2020 for (j = 0; j < nslots; j++) 2021 --sc->sc_bws[pos * nslots + j]; 2022 2023 ohci_free_std(sc, opipe->tail); 2024 ohci_free_sed(sc, opipe->sed); 2025 /* XXX free other resources */ 2026 } 2027 2028 usbd_status 2029 ohci_device_setintr(sc, opipe, ival) 2030 ohci_softc_t *sc; 2031 struct ohci_pipe *opipe; 2032 int ival; 2033 { 2034 int i, j, s, best; 2035 u_int npoll, slow, shigh, nslots; 2036 u_int bestbw, bw; 2037 ohci_soft_ed_t *hsed, *sed = opipe->sed; 2038 2039 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 2040 if (ival == 0) { 2041 printf("ohci_setintr: 0 interval\n"); 2042 return (USBD_INVAL); 2043 } 2044 2045 npoll = OHCI_NO_INTRS; 2046 while (npoll > ival) 2047 npoll /= 2; 2048 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 2049 2050 /* 2051 * We now know which level in the tree the ED must go into. 2052 * Figure out which slot has most bandwidth left over. 2053 * Slots to examine: 2054 * npoll 2055 * 1 0 2056 * 2 1 2 2057 * 4 3 4 5 6 2058 * 8 7 8 9 10 11 12 13 14 2059 * N (N-1) .. (N-1+N-1) 2060 */ 2061 slow = npoll-1; 2062 shigh = slow + npoll; 2063 nslots = OHCI_NO_INTRS / npoll; 2064 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 2065 bw = 0; 2066 for (j = 0; j < nslots; j++) 2067 bw += sc->sc_bws[i * nslots + j]; 2068 if (bw < bestbw) { 2069 best = i; 2070 bestbw = bw; 2071 } 2072 } 2073 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 2074 best, slow, shigh, bestbw)); 2075 2076 s = splusb(); 2077 hsed = sc->sc_eds[best]; 2078 sed->next = hsed->next; 2079 sed->ed->ed_nexted = hsed->ed->ed_nexted; 2080 hsed->next = sed; 2081 hsed->ed->ed_nexted = sed->physaddr; 2082 splx(s); 2083 2084 for (j = 0; j < nslots; j++) 2085 ++sc->sc_bws[best * nslots + j]; 2086 opipe->u.intr.nslots = nslots; 2087 opipe->u.intr.pos = best; 2088 2089 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 2090 return (USBD_NORMAL_COMPLETION); 2091 } 2092 2093
Indexes created Tue Sep 23 07:09:52 GMT 2025