ohci.c revision 1.153
1 /* $NetBSD: ohci.c,v 1.153 2004/12/21 16:41:24 fvdl Exp $ */ 2 /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */ 3 4 /* 5 * Copyright (c) 1998 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Lennart Augustsson (lennart (at) augustsson.net) at 10 * Carlstedt Research & Technology. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. All advertising materials mentioning features or use of this software 21 * must display the following acknowledgement: 22 * This product includes software developed by the NetBSD 23 * Foundation, Inc. and its contributors. 24 * 4. Neither the name of The NetBSD Foundation nor the names of its 25 * contributors may be used to endorse or promote products derived 26 * from this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 29 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 30 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 31 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 32 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 33 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 34 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 35 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 36 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 37 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 * POSSIBILITY OF SUCH DAMAGE. 39 */ 40 41 /* 42 * USB Open Host Controller driver. 43 * 44 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html 45 * USB spec: http://www.usb.org/developers/docs/usbspec.zip 46 */ 47 48 #include <sys/cdefs.h> 49 __KERNEL_RCSID(0, "$NetBSD: ohci.c,v 1.153 2004/12/21 16:41:24 fvdl Exp $"); 50 51 #include <sys/param.h> 52 #include <sys/systm.h> 53 #include <sys/malloc.h> 54 #if defined(__NetBSD__) || defined(__OpenBSD__) 55 #include <sys/kernel.h> 56 #include <sys/device.h> 57 #include <sys/select.h> 58 #include <uvm/uvm_extern.h> 59 #elif defined(__FreeBSD__) 60 #include <sys/module.h> 61 #include <sys/bus.h> 62 #include <machine/bus_pio.h> 63 #include <machine/bus_memio.h> 64 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 65 #include <machine/cpu.h> 66 #endif 67 #endif 68 #include <sys/proc.h> 69 #include <sys/queue.h> 70 71 #include <machine/bus.h> 72 #include <machine/endian.h> 73 74 #include <dev/usb/usb.h> 75 #include <dev/usb/usbdi.h> 76 #include <dev/usb/usbdivar.h> 77 #include <dev/usb/usb_mem.h> 78 #include <dev/usb/usb_quirks.h> 79 80 #include <dev/usb/ohcireg.h> 81 #include <dev/usb/ohcivar.h> 82 83 #if defined(__FreeBSD__) 84 #include <machine/clock.h> 85 86 #define delay(d) DELAY(d) 87 #endif 88 89 #if defined(__OpenBSD__) 90 struct cfdriver ohci_cd = { 91 NULL, "ohci", DV_DULL 92 }; 93 #endif 94 95 #ifdef OHCI_DEBUG 96 #define DPRINTF(x) if (ohcidebug) logprintf x 97 #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x 98 int ohcidebug = 0; 99 #ifndef __NetBSD__ 100 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 101 #endif 102 #else 103 #define DPRINTF(x) 104 #define DPRINTFN(n,x) 105 #endif 106 107 /* 108 * The OHCI controller is little endian, so on big endian machines 109 * the data strored in memory needs to be swapped. 110 */ 111 #if defined(__FreeBSD__) || defined(__OpenBSD__) 112 #if BYTE_ORDER == BIG_ENDIAN 113 #define htole32(x) (bswap32(x)) 114 #define le32toh(x) (bswap32(x)) 115 #else 116 #define htole32(x) (x) 117 #define le32toh(x) (x) 118 #endif 119 #endif 120 121 struct ohci_pipe; 122 123 Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *); 124 Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *); 125 126 Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *); 127 Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *); 128 129 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *); 130 Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *); 131 132 #if 0 133 Static void ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *, 134 ohci_soft_td_t *); 135 #endif 136 Static usbd_status ohci_alloc_std_chain(struct ohci_pipe *, 137 ohci_softc_t *, int, int, usbd_xfer_handle, 138 ohci_soft_td_t *, ohci_soft_td_t **); 139 140 Static void ohci_shutdown(void *v); 141 Static void ohci_power(int, void *); 142 Static usbd_status ohci_open(usbd_pipe_handle); 143 Static void ohci_poll(struct usbd_bus *); 144 Static void ohci_softintr(void *); 145 Static void ohci_waitintr(ohci_softc_t *, usbd_xfer_handle); 146 Static void ohci_add_done(ohci_softc_t *, ohci_physaddr_t); 147 Static void ohci_rhsc(ohci_softc_t *, usbd_xfer_handle); 148 149 Static usbd_status ohci_device_request(usbd_xfer_handle xfer); 150 Static void ohci_add_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 151 Static void ohci_rem_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 152 Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *); 153 Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *); 154 Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t); 155 Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *); 156 Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *); 157 Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t); 158 159 Static usbd_status ohci_setup_isoc(usbd_pipe_handle pipe); 160 Static void ohci_device_isoc_enter(usbd_xfer_handle); 161 162 Static usbd_status ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 163 Static void ohci_freem(struct usbd_bus *, usb_dma_t *); 164 165 Static usbd_xfer_handle ohci_allocx(struct usbd_bus *); 166 Static void ohci_freex(struct usbd_bus *, usbd_xfer_handle); 167 168 Static usbd_status ohci_root_ctrl_transfer(usbd_xfer_handle); 169 Static usbd_status ohci_root_ctrl_start(usbd_xfer_handle); 170 Static void ohci_root_ctrl_abort(usbd_xfer_handle); 171 Static void ohci_root_ctrl_close(usbd_pipe_handle); 172 Static void ohci_root_ctrl_done(usbd_xfer_handle); 173 174 Static usbd_status ohci_root_intr_transfer(usbd_xfer_handle); 175 Static usbd_status ohci_root_intr_start(usbd_xfer_handle); 176 Static void ohci_root_intr_abort(usbd_xfer_handle); 177 Static void ohci_root_intr_close(usbd_pipe_handle); 178 Static void ohci_root_intr_done(usbd_xfer_handle); 179 180 Static usbd_status ohci_device_ctrl_transfer(usbd_xfer_handle); 181 Static usbd_status ohci_device_ctrl_start(usbd_xfer_handle); 182 Static void ohci_device_ctrl_abort(usbd_xfer_handle); 183 Static void ohci_device_ctrl_close(usbd_pipe_handle); 184 Static void ohci_device_ctrl_done(usbd_xfer_handle); 185 186 Static usbd_status ohci_device_bulk_transfer(usbd_xfer_handle); 187 Static usbd_status ohci_device_bulk_start(usbd_xfer_handle); 188 Static void ohci_device_bulk_abort(usbd_xfer_handle); 189 Static void ohci_device_bulk_close(usbd_pipe_handle); 190 Static void ohci_device_bulk_done(usbd_xfer_handle); 191 192 Static usbd_status ohci_device_intr_transfer(usbd_xfer_handle); 193 Static usbd_status ohci_device_intr_start(usbd_xfer_handle); 194 Static void ohci_device_intr_abort(usbd_xfer_handle); 195 Static void ohci_device_intr_close(usbd_pipe_handle); 196 Static void ohci_device_intr_done(usbd_xfer_handle); 197 198 Static usbd_status ohci_device_isoc_transfer(usbd_xfer_handle); 199 Static usbd_status ohci_device_isoc_start(usbd_xfer_handle); 200 Static void ohci_device_isoc_abort(usbd_xfer_handle); 201 Static void ohci_device_isoc_close(usbd_pipe_handle); 202 Static void ohci_device_isoc_done(usbd_xfer_handle); 203 204 Static usbd_status ohci_device_setintr(ohci_softc_t *sc, 205 struct ohci_pipe *pipe, int ival); 206 207 Static int ohci_str(usb_string_descriptor_t *, int, const char *); 208 209 Static void ohci_timeout(void *); 210 Static void ohci_timeout_task(void *); 211 Static void ohci_rhsc_able(ohci_softc_t *, int); 212 Static void ohci_rhsc_enable(void *); 213 214 Static void ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *); 215 Static void ohci_abort_xfer(usbd_xfer_handle, usbd_status); 216 217 Static void ohci_device_clear_toggle(usbd_pipe_handle pipe); 218 Static void ohci_noop(usbd_pipe_handle pipe); 219 220 #ifdef OHCI_DEBUG 221 Static void ohci_dumpregs(ohci_softc_t *); 222 Static void ohci_dump_tds(ohci_soft_td_t *); 223 Static void ohci_dump_td(ohci_soft_td_t *); 224 Static void ohci_dump_ed(ohci_soft_ed_t *); 225 Static void ohci_dump_itd(ohci_soft_itd_t *); 226 Static void ohci_dump_itds(ohci_soft_itd_t *); 227 #endif 228 229 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 230 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 231 #define OWRITE1(sc, r, x) \ 232 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 233 #define OWRITE2(sc, r, x) \ 234 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 235 #define OWRITE4(sc, r, x) \ 236 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 237 #define OREAD1(sc, r) (OBARR(sc), bus_space_read_1((sc)->iot, (sc)->ioh, (r))) 238 #define OREAD2(sc, r) (OBARR(sc), bus_space_read_2((sc)->iot, (sc)->ioh, (r))) 239 #define OREAD4(sc, r) (OBARR(sc), bus_space_read_4((sc)->iot, (sc)->ioh, (r))) 240 241 /* Reverse the bits in a value 0 .. 31 */ 242 Static u_int8_t revbits[OHCI_NO_INTRS] = 243 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 244 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 245 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 246 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 247 248 struct ohci_pipe { 249 struct usbd_pipe pipe; 250 ohci_soft_ed_t *sed; 251 union { 252 ohci_soft_td_t *td; 253 ohci_soft_itd_t *itd; 254 } tail; 255 /* Info needed for different pipe kinds. */ 256 union { 257 /* Control pipe */ 258 struct { 259 usb_dma_t reqdma; 260 u_int length; 261 ohci_soft_td_t *setup, *data, *stat; 262 } ctl; 263 /* Interrupt pipe */ 264 struct { 265 int nslots; 266 int pos; 267 } intr; 268 /* Bulk pipe */ 269 struct { 270 u_int length; 271 int isread; 272 } bulk; 273 /* Iso pipe */ 274 struct iso { 275 int next, inuse; 276 } iso; 277 } u; 278 }; 279 280 #define OHCI_INTR_ENDPT 1 281 282 Static struct usbd_bus_methods ohci_bus_methods = { 283 ohci_open, 284 ohci_softintr, 285 ohci_poll, 286 ohci_allocm, 287 ohci_freem, 288 ohci_allocx, 289 ohci_freex, 290 }; 291 292 Static struct usbd_pipe_methods ohci_root_ctrl_methods = { 293 ohci_root_ctrl_transfer, 294 ohci_root_ctrl_start, 295 ohci_root_ctrl_abort, 296 ohci_root_ctrl_close, 297 ohci_noop, 298 ohci_root_ctrl_done, 299 }; 300 301 Static struct usbd_pipe_methods ohci_root_intr_methods = { 302 ohci_root_intr_transfer, 303 ohci_root_intr_start, 304 ohci_root_intr_abort, 305 ohci_root_intr_close, 306 ohci_noop, 307 ohci_root_intr_done, 308 }; 309 310 Static struct usbd_pipe_methods ohci_device_ctrl_methods = { 311 ohci_device_ctrl_transfer, 312 ohci_device_ctrl_start, 313 ohci_device_ctrl_abort, 314 ohci_device_ctrl_close, 315 ohci_noop, 316 ohci_device_ctrl_done, 317 }; 318 319 Static struct usbd_pipe_methods ohci_device_intr_methods = { 320 ohci_device_intr_transfer, 321 ohci_device_intr_start, 322 ohci_device_intr_abort, 323 ohci_device_intr_close, 324 ohci_device_clear_toggle, 325 ohci_device_intr_done, 326 }; 327 328 Static struct usbd_pipe_methods ohci_device_bulk_methods = { 329 ohci_device_bulk_transfer, 330 ohci_device_bulk_start, 331 ohci_device_bulk_abort, 332 ohci_device_bulk_close, 333 ohci_device_clear_toggle, 334 ohci_device_bulk_done, 335 }; 336 337 Static struct usbd_pipe_methods ohci_device_isoc_methods = { 338 ohci_device_isoc_transfer, 339 ohci_device_isoc_start, 340 ohci_device_isoc_abort, 341 ohci_device_isoc_close, 342 ohci_noop, 343 ohci_device_isoc_done, 344 }; 345 346 #if defined(__NetBSD__) || defined(__OpenBSD__) 347 int 348 ohci_activate(device_ptr_t self, enum devact act) 349 { 350 struct ohci_softc *sc = (struct ohci_softc *)self; 351 int rv = 0; 352 353 switch (act) { 354 case DVACT_ACTIVATE: 355 return (EOPNOTSUPP); 356 357 case DVACT_DEACTIVATE: 358 if (sc->sc_child != NULL) 359 rv = config_deactivate(sc->sc_child); 360 sc->sc_dying = 1; 361 break; 362 } 363 return (rv); 364 } 365 366 int 367 ohci_detach(struct ohci_softc *sc, int flags) 368 { 369 int rv = 0; 370 371 if (sc->sc_child != NULL) 372 rv = config_detach(sc->sc_child, flags); 373 374 if (rv != 0) 375 return (rv); 376 377 usb_uncallout(sc->sc_tmo_rhsc, ohci_rhsc_enable, sc); 378 379 #if defined(__NetBSD__) || defined(__OpenBSD__) 380 powerhook_disestablish(sc->sc_powerhook); 381 shutdownhook_disestablish(sc->sc_shutdownhook); 382 #endif 383 384 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 385 386 /* free data structures XXX */ 387 388 return (rv); 389 } 390 #endif 391 392 ohci_soft_ed_t * 393 ohci_alloc_sed(ohci_softc_t *sc) 394 { 395 ohci_soft_ed_t *sed; 396 usbd_status err; 397 int i, offs; 398 usb_dma_t dma; 399 400 if (sc->sc_freeeds == NULL) { 401 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 402 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 403 OHCI_ED_ALIGN, &dma); 404 if (err) 405 return (0); 406 for(i = 0; i < OHCI_SED_CHUNK; i++) { 407 offs = i * OHCI_SED_SIZE; 408 sed = KERNADDR(&dma, offs); 409 sed->physaddr = DMAADDR(&dma, offs); 410 sed->next = sc->sc_freeeds; 411 sc->sc_freeeds = sed; 412 } 413 } 414 sed = sc->sc_freeeds; 415 sc->sc_freeeds = sed->next; 416 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 417 sed->next = 0; 418 return (sed); 419 } 420 421 void 422 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 423 { 424 sed->next = sc->sc_freeeds; 425 sc->sc_freeeds = sed; 426 } 427 428 ohci_soft_td_t * 429 ohci_alloc_std(ohci_softc_t *sc) 430 { 431 ohci_soft_td_t *std; 432 usbd_status err; 433 int i, offs; 434 usb_dma_t dma; 435 int s; 436 437 if (sc->sc_freetds == NULL) { 438 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 439 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 440 OHCI_TD_ALIGN, &dma); 441 if (err) 442 return (NULL); 443 s = splusb(); 444 for(i = 0; i < OHCI_STD_CHUNK; i++) { 445 offs = i * OHCI_STD_SIZE; 446 std = KERNADDR(&dma, offs); 447 std->physaddr = DMAADDR(&dma, offs); 448 std->nexttd = sc->sc_freetds; 449 sc->sc_freetds = std; 450 } 451 splx(s); 452 } 453 454 s = splusb(); 455 std = sc->sc_freetds; 456 sc->sc_freetds = std->nexttd; 457 memset(&std->td, 0, sizeof(ohci_td_t)); 458 std->nexttd = NULL; 459 std->xfer = NULL; 460 ohci_hash_add_td(sc, std); 461 splx(s); 462 463 return (std); 464 } 465 466 void 467 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std) 468 { 469 int s; 470 471 s = splusb(); 472 ohci_hash_rem_td(sc, std); 473 std->nexttd = sc->sc_freetds; 474 sc->sc_freetds = std; 475 splx(s); 476 } 477 478 usbd_status 479 ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc, 480 int alen, int rd, usbd_xfer_handle xfer, 481 ohci_soft_td_t *sp, ohci_soft_td_t **ep) 482 { 483 ohci_soft_td_t *next, *cur; 484 ohci_physaddr_t dataphys, dataphysend; 485 u_int32_t tdflags; 486 int len, curlen; 487 usb_dma_t *dma = &xfer->dmabuf; 488 u_int16_t flags = xfer->flags; 489 490 DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen)); 491 492 len = alen; 493 cur = sp; 494 dataphys = DMAADDR(dma, 0); 495 dataphysend = OHCI_PAGE(dataphys + len - 1); 496 tdflags = htole32( 497 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 498 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) | 499 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR); 500 501 for (;;) { 502 next = ohci_alloc_std(sc); 503 if (next == NULL) 504 goto nomem; 505 506 /* The OHCI hardware can handle at most one page crossing. */ 507 if (OHCI_PAGE(dataphys) == dataphysend || 508 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) { 509 /* we can handle it in this TD */ 510 curlen = len; 511 } else { 512 /* must use multiple TDs, fill as much as possible. */ 513 curlen = 2 * OHCI_PAGE_SIZE - 514 (dataphys & (OHCI_PAGE_SIZE-1)); 515 /* the length must be a multiple of the max size */ 516 curlen -= curlen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize); 517 #ifdef DIAGNOSTIC 518 if (curlen == 0) 519 panic("ohci_alloc_std: curlen == 0"); 520 #endif 521 } 522 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x " 523 "dataphysend=0x%08x len=%d curlen=%d\n", 524 dataphys, dataphysend, 525 len, curlen)); 526 len -= curlen; 527 528 cur->td.td_flags = tdflags; 529 cur->td.td_cbp = htole32(dataphys); 530 cur->nexttd = next; 531 cur->td.td_nexttd = htole32(next->physaddr); 532 cur->td.td_be = htole32(dataphys + curlen - 1); 533 cur->len = curlen; 534 cur->flags = OHCI_ADD_LEN; 535 cur->xfer = xfer; 536 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n", 537 dataphys, dataphys + curlen - 1)); 538 if (len == 0) 539 break; 540 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n")); 541 dataphys += curlen; 542 cur = next; 543 } 544 if ((flags & USBD_FORCE_SHORT_XFER) && 545 alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) { 546 /* Force a 0 length transfer at the end. */ 547 548 cur = next; 549 next = ohci_alloc_std(sc); 550 if (next == NULL) 551 goto nomem; 552 553 cur->td.td_flags = tdflags; 554 cur->td.td_cbp = 0; /* indicate 0 length packet */ 555 cur->nexttd = next; 556 cur->td.td_nexttd = htole32(next->physaddr); 557 cur->td.td_be = ~0; 558 cur->len = 0; 559 cur->flags = 0; 560 cur->xfer = xfer; 561 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n")); 562 } 563 *ep = cur; 564 565 return (USBD_NORMAL_COMPLETION); 566 567 nomem: 568 /* XXX free chain */ 569 return (USBD_NOMEM); 570 } 571 572 #if 0 573 Static void 574 ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std, 575 ohci_soft_td_t *stdend) 576 { 577 ohci_soft_td_t *p; 578 579 for (; std != stdend; std = p) { 580 p = std->nexttd; 581 ohci_free_std(sc, std); 582 } 583 } 584 #endif 585 586 ohci_soft_itd_t * 587 ohci_alloc_sitd(ohci_softc_t *sc) 588 { 589 ohci_soft_itd_t *sitd; 590 usbd_status err; 591 int i, s, offs; 592 usb_dma_t dma; 593 594 if (sc->sc_freeitds == NULL) { 595 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n")); 596 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK, 597 OHCI_ITD_ALIGN, &dma); 598 if (err) 599 return (NULL); 600 s = splusb(); 601 for(i = 0; i < OHCI_SITD_CHUNK; i++) { 602 offs = i * OHCI_SITD_SIZE; 603 sitd = KERNADDR(&dma, offs); 604 sitd->physaddr = DMAADDR(&dma, offs); 605 sitd->nextitd = sc->sc_freeitds; 606 sc->sc_freeitds = sitd; 607 } 608 splx(s); 609 } 610 611 s = splusb(); 612 sitd = sc->sc_freeitds; 613 sc->sc_freeitds = sitd->nextitd; 614 memset(&sitd->itd, 0, sizeof(ohci_itd_t)); 615 sitd->nextitd = NULL; 616 sitd->xfer = NULL; 617 ohci_hash_add_itd(sc, sitd); 618 splx(s); 619 620 #ifdef DIAGNOSTIC 621 sitd->isdone = 0; 622 #endif 623 624 return (sitd); 625 } 626 627 void 628 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 629 { 630 int s; 631 632 DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd)); 633 634 #ifdef DIAGNOSTIC 635 if (!sitd->isdone) { 636 panic("ohci_free_sitd: sitd=%p not done", sitd); 637 return; 638 } 639 /* Warn double free */ 640 sitd->isdone = 0; 641 #endif 642 643 s = splusb(); 644 ohci_hash_rem_itd(sc, sitd); 645 sitd->nextitd = sc->sc_freeitds; 646 sc->sc_freeitds = sitd; 647 splx(s); 648 } 649 650 usbd_status 651 ohci_init(ohci_softc_t *sc) 652 { 653 ohci_soft_ed_t *sed, *psed; 654 usbd_status err; 655 int i; 656 u_int32_t s, ctl, ival, hcr, fm, per, rev, desca; 657 658 DPRINTF(("ohci_init: start\n")); 659 #if defined(__OpenBSD__) 660 printf(","); 661 #else 662 printf("%s:", USBDEVNAME(sc->sc_bus.bdev)); 663 #endif 664 rev = OREAD4(sc, OHCI_REVISION); 665 printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev), 666 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 667 668 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 669 printf("%s: unsupported OHCI revision\n", 670 USBDEVNAME(sc->sc_bus.bdev)); 671 sc->sc_bus.usbrev = USBREV_UNKNOWN; 672 return (USBD_INVAL); 673 } 674 sc->sc_bus.usbrev = USBREV_1_0; 675 676 for (i = 0; i < OHCI_HASH_SIZE; i++) 677 LIST_INIT(&sc->sc_hash_tds[i]); 678 for (i = 0; i < OHCI_HASH_SIZE; i++) 679 LIST_INIT(&sc->sc_hash_itds[i]); 680 681 SIMPLEQ_INIT(&sc->sc_free_xfers); 682 683 #ifdef __NetBSD__ 684 usb_setup_reserve(sc, &sc->sc_dma_reserve, sc->sc_bus.dmatag, 685 USB_MEM_RESERVE); 686 #endif 687 688 /* XXX determine alignment by R/W */ 689 /* Allocate the HCCA area. */ 690 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 691 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 692 if (err) 693 return (err); 694 sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0); 695 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 696 697 sc->sc_eintrs = OHCI_NORMAL_INTRS; 698 699 /* Allocate dummy ED that starts the control list. */ 700 sc->sc_ctrl_head = ohci_alloc_sed(sc); 701 if (sc->sc_ctrl_head == NULL) { 702 err = USBD_NOMEM; 703 goto bad1; 704 } 705 sc->sc_ctrl_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 706 707 /* Allocate dummy ED that starts the bulk list. */ 708 sc->sc_bulk_head = ohci_alloc_sed(sc); 709 if (sc->sc_bulk_head == NULL) { 710 err = USBD_NOMEM; 711 goto bad2; 712 } 713 sc->sc_bulk_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 714 715 /* Allocate dummy ED that starts the isochronous list. */ 716 sc->sc_isoc_head = ohci_alloc_sed(sc); 717 if (sc->sc_isoc_head == NULL) { 718 err = USBD_NOMEM; 719 goto bad3; 720 } 721 sc->sc_isoc_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 722 723 /* Allocate all the dummy EDs that make up the interrupt tree. */ 724 for (i = 0; i < OHCI_NO_EDS; i++) { 725 sed = ohci_alloc_sed(sc); 726 if (sed == NULL) { 727 while (--i >= 0) 728 ohci_free_sed(sc, sc->sc_eds[i]); 729 err = USBD_NOMEM; 730 goto bad4; 731 } 732 /* All ED fields are set to 0. */ 733 sc->sc_eds[i] = sed; 734 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 735 if (i != 0) 736 psed = sc->sc_eds[(i-1) / 2]; 737 else 738 psed= sc->sc_isoc_head; 739 sed->next = psed; 740 sed->ed.ed_nexted = htole32(psed->physaddr); 741 } 742 /* 743 * Fill HCCA interrupt table. The bit reversal is to get 744 * the tree set up properly to spread the interrupts. 745 */ 746 for (i = 0; i < OHCI_NO_INTRS; i++) 747 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 748 htole32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 749 750 #ifdef OHCI_DEBUG 751 if (ohcidebug > 15) { 752 for (i = 0; i < OHCI_NO_EDS; i++) { 753 printf("ed#%d ", i); 754 ohci_dump_ed(sc->sc_eds[i]); 755 } 756 printf("iso "); 757 ohci_dump_ed(sc->sc_isoc_head); 758 } 759 #endif 760 761 /* Determine in what context we are running. */ 762 ctl = OREAD4(sc, OHCI_CONTROL); 763 if (ctl & OHCI_IR) { 764 /* SMM active, request change */ 765 DPRINTF(("ohci_init: SMM active, request owner change\n")); 766 s = OREAD4(sc, OHCI_COMMAND_STATUS); 767 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 768 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 769 usb_delay_ms(&sc->sc_bus, 1); 770 ctl = OREAD4(sc, OHCI_CONTROL); 771 } 772 if ((ctl & OHCI_IR) == 0) { 773 printf("%s: SMM does not respond, resetting\n", 774 USBDEVNAME(sc->sc_bus.bdev)); 775 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 776 goto reset; 777 } 778 #if 0 779 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */ 780 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 781 /* BIOS started controller. */ 782 DPRINTF(("ohci_init: BIOS active\n")); 783 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 784 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL); 785 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 786 } 787 #endif 788 } else { 789 DPRINTF(("ohci_init: cold started\n")); 790 reset: 791 /* Controller was cold started. */ 792 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 793 } 794 795 /* 796 * This reset should not be necessary according to the OHCI spec, but 797 * without it some controllers do not start. 798 */ 799 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 800 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 801 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 802 803 /* We now own the host controller and the bus has been reset. */ 804 ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL)); 805 806 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 807 /* Nominal time for a reset is 10 us. */ 808 for (i = 0; i < 10; i++) { 809 delay(10); 810 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 811 if (!hcr) 812 break; 813 } 814 if (hcr) { 815 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 816 err = USBD_IOERROR; 817 goto bad5; 818 } 819 #ifdef OHCI_DEBUG 820 if (ohcidebug > 15) 821 ohci_dumpregs(sc); 822 #endif 823 824 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 825 826 /* Set up HC registers. */ 827 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 828 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 829 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 830 /* disable all interrupts and then switch on all desired interrupts */ 831 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 832 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 833 /* switch on desired functional features */ 834 ctl = OREAD4(sc, OHCI_CONTROL); 835 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 836 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 837 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL; 838 /* And finally start it! */ 839 OWRITE4(sc, OHCI_CONTROL, ctl); 840 841 /* 842 * The controller is now OPERATIONAL. Set a some final 843 * registers that should be set earlier, but that the 844 * controller ignores when in the SUSPEND state. 845 */ 846 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 847 fm |= OHCI_FSMPS(ival) | ival; 848 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 849 per = OHCI_PERIODIC(ival); /* 90% periodic */ 850 OWRITE4(sc, OHCI_PERIODIC_START, per); 851 852 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */ 853 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 854 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP); 855 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 856 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY); 857 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca); 858 859 /* 860 * The AMD756 requires a delay before re-reading the register, 861 * otherwise it will occasionally report 0 ports. 862 */ 863 sc->sc_noport = 0; 864 for (i = 0; i < 10 && sc->sc_noport == 0; i++) { 865 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY); 866 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 867 } 868 869 #ifdef OHCI_DEBUG 870 if (ohcidebug > 5) 871 ohci_dumpregs(sc); 872 #endif 873 874 /* Set up the bus struct. */ 875 sc->sc_bus.methods = &ohci_bus_methods; 876 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 877 878 #if defined(__NetBSD__) || defined(__OpenBSD__) 879 sc->sc_control = sc->sc_intre = 0; 880 sc->sc_powerhook = powerhook_establish(ohci_power, sc); 881 sc->sc_shutdownhook = shutdownhook_establish(ohci_shutdown, sc); 882 #endif 883 884 usb_callout_init(sc->sc_tmo_rhsc); 885 886 return (USBD_NORMAL_COMPLETION); 887 888 bad5: 889 for (i = 0; i < OHCI_NO_EDS; i++) 890 ohci_free_sed(sc, sc->sc_eds[i]); 891 bad4: 892 ohci_free_sed(sc, sc->sc_isoc_head); 893 bad3: 894 ohci_free_sed(sc, sc->sc_bulk_head); 895 bad2: 896 ohci_free_sed(sc, sc->sc_ctrl_head); 897 bad1: 898 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 899 return (err); 900 } 901 902 usbd_status 903 ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 904 { 905 #if defined(__NetBSD__) || defined(__OpenBSD__) 906 struct ohci_softc *sc = (struct ohci_softc *)bus; 907 #endif 908 usbd_status status; 909 910 status = usb_allocmem(&sc->sc_bus, size, 0, dma); 911 #ifdef __NetBSD__ 912 if (status == USBD_NOMEM) 913 status = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size); 914 #endif 915 return status; 916 } 917 918 void 919 ohci_freem(struct usbd_bus *bus, usb_dma_t *dma) 920 { 921 #if defined(__NetBSD__) || defined(__OpenBSD__) 922 struct ohci_softc *sc = (struct ohci_softc *)bus; 923 #endif 924 #ifdef __NetBSD__ 925 if (dma->block->flags & USB_DMA_RESERVE) { 926 usb_reserve_freem(&((struct ohci_softc *)bus)->sc_dma_reserve, 927 dma); 928 return; 929 } 930 #endif 931 usb_freemem(&sc->sc_bus, dma); 932 } 933 934 usbd_xfer_handle 935 ohci_allocx(struct usbd_bus *bus) 936 { 937 struct ohci_softc *sc = (struct ohci_softc *)bus; 938 usbd_xfer_handle xfer; 939 940 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 941 if (xfer != NULL) { 942 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 943 #ifdef DIAGNOSTIC 944 if (xfer->busy_free != XFER_FREE) { 945 printf("ohci_allocx: xfer=%p not free, 0x%08x\n", xfer, 946 xfer->busy_free); 947 } 948 #endif 949 } else { 950 xfer = malloc(sizeof(struct ohci_xfer), M_USB, M_NOWAIT); 951 } 952 if (xfer != NULL) { 953 memset(xfer, 0, sizeof (struct ohci_xfer)); 954 #ifdef DIAGNOSTIC 955 xfer->busy_free = XFER_BUSY; 956 #endif 957 } 958 return (xfer); 959 } 960 961 void 962 ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 963 { 964 struct ohci_softc *sc = (struct ohci_softc *)bus; 965 966 #ifdef DIAGNOSTIC 967 if (xfer->busy_free != XFER_BUSY) { 968 printf("ohci_freex: xfer=%p not busy, 0x%08x\n", xfer, 969 xfer->busy_free); 970 return; 971 } 972 xfer->busy_free = XFER_FREE; 973 #endif 974 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 975 } 976 977 /* 978 * Shut down the controller when the system is going down. 979 */ 980 void 981 ohci_shutdown(void *v) 982 { 983 ohci_softc_t *sc = v; 984 985 DPRINTF(("ohci_shutdown: stopping the HC\n")); 986 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 987 } 988 989 /* 990 * Handle suspend/resume. 991 * 992 * We need to switch to polling mode here, because this routine is 993 * called from an intterupt context. This is all right since we 994 * are almost suspended anyway. 995 */ 996 void 997 ohci_power(int why, void *v) 998 { 999 ohci_softc_t *sc = v; 1000 u_int32_t ctl; 1001 int s; 1002 1003 #ifdef OHCI_DEBUG 1004 DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why)); 1005 ohci_dumpregs(sc); 1006 #endif 1007 1008 s = splhardusb(); 1009 switch (why) { 1010 case PWR_SUSPEND: 1011 case PWR_STANDBY: 1012 sc->sc_bus.use_polling++; 1013 ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK; 1014 if (sc->sc_control == 0) { 1015 /* 1016 * Preserve register values, in case that APM BIOS 1017 * does not recover them. 1018 */ 1019 sc->sc_control = ctl; 1020 sc->sc_intre = OREAD4(sc, OHCI_INTERRUPT_ENABLE); 1021 } 1022 ctl |= OHCI_HCFS_SUSPEND; 1023 OWRITE4(sc, OHCI_CONTROL, ctl); 1024 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1025 sc->sc_bus.use_polling--; 1026 break; 1027 case PWR_RESUME: 1028 sc->sc_bus.use_polling++; 1029 /* Some broken BIOSes do not recover these values */ 1030 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 1031 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 1032 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 1033 if (sc->sc_intre) 1034 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, 1035 sc->sc_intre & (OHCI_ALL_INTRS | OHCI_MIE)); 1036 if (sc->sc_control) 1037 ctl = sc->sc_control; 1038 else 1039 ctl = OREAD4(sc, OHCI_CONTROL); 1040 ctl |= OHCI_HCFS_RESUME; 1041 OWRITE4(sc, OHCI_CONTROL, ctl); 1042 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 1043 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL; 1044 OWRITE4(sc, OHCI_CONTROL, ctl); 1045 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 1046 sc->sc_control = sc->sc_intre = 0; 1047 sc->sc_bus.use_polling--; 1048 break; 1049 case PWR_SOFTSUSPEND: 1050 case PWR_SOFTSTANDBY: 1051 case PWR_SOFTRESUME: 1052 break; 1053 } 1054 splx(s); 1055 } 1056 1057 #ifdef OHCI_DEBUG 1058 void 1059 ohci_dumpregs(ohci_softc_t *sc) 1060 { 1061 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 1062 OREAD4(sc, OHCI_REVISION), 1063 OREAD4(sc, OHCI_CONTROL), 1064 OREAD4(sc, OHCI_COMMAND_STATUS))); 1065 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 1066 OREAD4(sc, OHCI_INTERRUPT_STATUS), 1067 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 1068 OREAD4(sc, OHCI_INTERRUPT_DISABLE))); 1069 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 1070 OREAD4(sc, OHCI_HCCA), 1071 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 1072 OREAD4(sc, OHCI_CONTROL_HEAD_ED))); 1073 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 1074 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 1075 OREAD4(sc, OHCI_BULK_HEAD_ED), 1076 OREAD4(sc, OHCI_BULK_CURRENT_ED))); 1077 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 1078 OREAD4(sc, OHCI_DONE_HEAD), 1079 OREAD4(sc, OHCI_FM_INTERVAL), 1080 OREAD4(sc, OHCI_FM_REMAINING))); 1081 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 1082 OREAD4(sc, OHCI_FM_NUMBER), 1083 OREAD4(sc, OHCI_PERIODIC_START), 1084 OREAD4(sc, OHCI_LS_THRESHOLD))); 1085 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n", 1086 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 1087 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 1088 OREAD4(sc, OHCI_RH_STATUS))); 1089 DPRINTF((" port1=0x%08x port2=0x%08x\n", 1090 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 1091 OREAD4(sc, OHCI_RH_PORT_STATUS(2)))); 1092 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n", 1093 le32toh(sc->sc_hcca->hcca_frame_number), 1094 le32toh(sc->sc_hcca->hcca_done_head))); 1095 } 1096 #endif 1097 1098 Static int ohci_intr1(ohci_softc_t *); 1099 1100 int 1101 ohci_intr(void *p) 1102 { 1103 ohci_softc_t *sc = p; 1104 1105 if (sc == NULL || sc->sc_dying) 1106 return (0); 1107 1108 /* If we get an interrupt while polling, then just ignore it. */ 1109 if (sc->sc_bus.use_polling) { 1110 #ifdef DIAGNOSTIC 1111 DPRINTFN(16, ("ohci_intr: ignored interrupt while polling\n")); 1112 #endif 1113 return (0); 1114 } 1115 1116 return (ohci_intr1(sc)); 1117 } 1118 1119 Static int 1120 ohci_intr1(ohci_softc_t *sc) 1121 { 1122 u_int32_t intrs, eintrs; 1123 ohci_physaddr_t done; 1124 1125 DPRINTFN(14,("ohci_intr1: enter\n")); 1126 1127 /* In case the interrupt occurs before initialization has completed. */ 1128 if (sc == NULL || sc->sc_hcca == NULL) { 1129 #ifdef DIAGNOSTIC 1130 printf("ohci_intr: sc->sc_hcca == NULL\n"); 1131 #endif 1132 return (0); 1133 } 1134 1135 intrs = 0; 1136 done = le32toh(sc->sc_hcca->hcca_done_head); 1137 if (done != 0) { 1138 if (done & ~OHCI_DONE_INTRS) 1139 intrs = OHCI_WDH; 1140 if (done & OHCI_DONE_INTRS) 1141 intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS); 1142 sc->sc_hcca->hcca_done_head = 0; 1143 } else 1144 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & ~OHCI_WDH; 1145 1146 if (!intrs) 1147 return (0); 1148 1149 intrs &= ~OHCI_MIE; 1150 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */ 1151 eintrs = intrs & sc->sc_eintrs; 1152 if (!eintrs) 1153 return (0); 1154 1155 sc->sc_bus.intr_context++; 1156 sc->sc_bus.no_intrs++; 1157 DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 1158 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 1159 (u_int)eintrs)); 1160 1161 if (eintrs & OHCI_SO) { 1162 sc->sc_overrun_cnt++; 1163 if (usbd_ratecheck(&sc->sc_overrun_ntc)) { 1164 printf("%s: %u scheduling overruns\n", 1165 USBDEVNAME(sc->sc_bus.bdev), sc->sc_overrun_cnt); 1166 sc->sc_overrun_cnt = 0; 1167 } 1168 /* XXX do what */ 1169 eintrs &= ~OHCI_SO; 1170 } 1171 if (eintrs & OHCI_WDH) { 1172 ohci_add_done(sc, done &~ OHCI_DONE_INTRS); 1173 usb_schedsoftintr(&sc->sc_bus); 1174 eintrs &= ~OHCI_WDH; 1175 } 1176 if (eintrs & OHCI_RD) { 1177 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev)); 1178 /* XXX process resume detect */ 1179 } 1180 if (eintrs & OHCI_UE) { 1181 printf("%s: unrecoverable error, controller halted\n", 1182 USBDEVNAME(sc->sc_bus.bdev)); 1183 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1184 /* XXX what else */ 1185 } 1186 if (eintrs & OHCI_RHSC) { 1187 ohci_rhsc(sc, sc->sc_intrxfer); 1188 /* 1189 * Disable RHSC interrupt for now, because it will be 1190 * on until the port has been reset. 1191 */ 1192 ohci_rhsc_able(sc, 0); 1193 /* Do not allow RHSC interrupts > 1 per second */ 1194 usb_callout(sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc); 1195 eintrs &= ~OHCI_RHSC; 1196 } 1197 1198 sc->sc_bus.intr_context--; 1199 1200 if (eintrs != 0) { 1201 /* Block unprocessed interrupts. XXX */ 1202 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs); 1203 sc->sc_eintrs &= ~eintrs; 1204 printf("%s: blocking intrs 0x%x\n", 1205 USBDEVNAME(sc->sc_bus.bdev), eintrs); 1206 } 1207 1208 return (1); 1209 } 1210 1211 void 1212 ohci_rhsc_able(ohci_softc_t *sc, int on) 1213 { 1214 DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on)); 1215 if (on) { 1216 sc->sc_eintrs |= OHCI_RHSC; 1217 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1218 } else { 1219 sc->sc_eintrs &= ~OHCI_RHSC; 1220 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC); 1221 } 1222 } 1223 1224 void 1225 ohci_rhsc_enable(void *v_sc) 1226 { 1227 ohci_softc_t *sc = v_sc; 1228 int s; 1229 1230 s = splhardusb(); 1231 ohci_rhsc_able(sc, 1); 1232 splx(s); 1233 } 1234 1235 #ifdef OHCI_DEBUG 1236 char *ohci_cc_strs[] = { 1237 "NO_ERROR", 1238 "CRC", 1239 "BIT_STUFFING", 1240 "DATA_TOGGLE_MISMATCH", 1241 "STALL", 1242 "DEVICE_NOT_RESPONDING", 1243 "PID_CHECK_FAILURE", 1244 "UNEXPECTED_PID", 1245 "DATA_OVERRUN", 1246 "DATA_UNDERRUN", 1247 "BUFFER_OVERRUN", 1248 "BUFFER_UNDERRUN", 1249 "reserved", 1250 "reserved", 1251 "NOT_ACCESSED", 1252 "NOT_ACCESSED", 1253 }; 1254 #endif 1255 1256 void 1257 ohci_add_done(ohci_softc_t *sc, ohci_physaddr_t done) 1258 { 1259 ohci_soft_itd_t *sitd, *sidone, **ip; 1260 ohci_soft_td_t *std, *sdone, **p; 1261 1262 /* Reverse the done list. */ 1263 for (sdone = NULL, sidone = NULL; done != 0; ) { 1264 std = ohci_hash_find_td(sc, done); 1265 if (std != NULL) { 1266 std->dnext = sdone; 1267 done = le32toh(std->td.td_nexttd); 1268 sdone = std; 1269 DPRINTFN(10,("add TD %p\n", std)); 1270 continue; 1271 } 1272 sitd = ohci_hash_find_itd(sc, done); 1273 if (sitd != NULL) { 1274 sitd->dnext = sidone; 1275 done = le32toh(sitd->itd.itd_nextitd); 1276 sidone = sitd; 1277 DPRINTFN(5,("add ITD %p\n", sitd)); 1278 continue; 1279 } 1280 panic("ohci_add_done: addr 0x%08lx not found", (u_long)done); 1281 } 1282 1283 /* sdone & sidone now hold the done lists. */ 1284 /* Put them on the already processed lists. */ 1285 for (p = &sc->sc_sdone; *p != NULL; p = &(*p)->dnext) 1286 ; 1287 *p = sdone; 1288 for (ip = &sc->sc_sidone; *ip != NULL; ip = &(*ip)->dnext) 1289 ; 1290 *ip = sidone; 1291 } 1292 1293 void 1294 ohci_softintr(void *v) 1295 { 1296 ohci_softc_t *sc = v; 1297 ohci_soft_itd_t *sitd, *sidone, *sitdnext; 1298 ohci_soft_td_t *std, *sdone, *stdnext; 1299 usbd_xfer_handle xfer; 1300 struct ohci_pipe *opipe; 1301 int len, cc, s; 1302 int i, j, actlen, iframes, uedir; 1303 1304 DPRINTFN(10,("ohci_softintr: enter\n")); 1305 1306 sc->sc_bus.intr_context++; 1307 1308 s = splhardusb(); 1309 sdone = sc->sc_sdone; 1310 sc->sc_sdone = NULL; 1311 sidone = sc->sc_sidone; 1312 sc->sc_sidone = NULL; 1313 splx(s); 1314 1315 DPRINTFN(10,("ohci_softintr: sdone=%p sidone=%p\n", sdone, sidone)); 1316 1317 #ifdef OHCI_DEBUG 1318 if (ohcidebug > 10) { 1319 DPRINTF(("ohci_process_done: TD done:\n")); 1320 ohci_dump_tds(sdone); 1321 } 1322 #endif 1323 1324 for (std = sdone; std; std = stdnext) { 1325 xfer = std->xfer; 1326 stdnext = std->dnext; 1327 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n", 1328 std, xfer, xfer ? xfer->hcpriv : 0)); 1329 if (xfer == NULL) { 1330 /* 1331 * xfer == NULL: There seems to be no xfer associated 1332 * with this TD. It is tailp that happened to end up on 1333 * the done queue. 1334 * Shouldn't happen, but some chips are broken(?). 1335 */ 1336 continue; 1337 } 1338 if (xfer->status == USBD_CANCELLED || 1339 xfer->status == USBD_TIMEOUT) { 1340 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1341 xfer)); 1342 /* Handled by abort routine. */ 1343 continue; 1344 } 1345 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 1346 1347 len = std->len; 1348 if (std->td.td_cbp != 0) 1349 len -= le32toh(std->td.td_be) - 1350 le32toh(std->td.td_cbp) + 1; 1351 DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", len, 1352 std->flags)); 1353 if (std->flags & OHCI_ADD_LEN) 1354 xfer->actlen += len; 1355 1356 cc = OHCI_TD_GET_CC(le32toh(std->td.td_flags)); 1357 if (cc == OHCI_CC_NO_ERROR) { 1358 if (std->flags & OHCI_CALL_DONE) { 1359 xfer->status = USBD_NORMAL_COMPLETION; 1360 s = splusb(); 1361 usb_transfer_complete(xfer); 1362 splx(s); 1363 } 1364 ohci_free_std(sc, std); 1365 } else { 1366 /* 1367 * Endpoint is halted. First unlink all the TDs 1368 * belonging to the failed transfer, and then restart 1369 * the endpoint. 1370 */ 1371 ohci_soft_td_t *p, *n; 1372 opipe = (struct ohci_pipe *)xfer->pipe; 1373 1374 DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n", 1375 OHCI_TD_GET_CC(le32toh(std->td.td_flags)), 1376 ohci_cc_strs[OHCI_TD_GET_CC(le32toh(std->td.td_flags))])); 1377 1378 /* remove TDs */ 1379 for (p = std; p->xfer == xfer; p = n) { 1380 n = p->nexttd; 1381 ohci_free_std(sc, p); 1382 } 1383 1384 /* clear halt */ 1385 opipe->sed->ed.ed_headp = htole32(p->physaddr); 1386 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1387 1388 if (cc == OHCI_CC_STALL) 1389 xfer->status = USBD_STALLED; 1390 else 1391 xfer->status = USBD_IOERROR; 1392 s = splusb(); 1393 usb_transfer_complete(xfer); 1394 splx(s); 1395 } 1396 } 1397 1398 #ifdef OHCI_DEBUG 1399 if (ohcidebug > 10) { 1400 DPRINTF(("ohci_softintr: ITD done:\n")); 1401 ohci_dump_itds(sidone); 1402 } 1403 #endif 1404 1405 for (sitd = sidone; sitd != NULL; sitd = sitdnext) { 1406 xfer = sitd->xfer; 1407 sitdnext = sitd->dnext; 1408 DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n", 1409 sitd, xfer, xfer ? xfer->hcpriv : 0)); 1410 if (xfer == NULL) 1411 continue; 1412 if (xfer->status == USBD_CANCELLED || 1413 xfer->status == USBD_TIMEOUT) { 1414 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1415 xfer)); 1416 /* Handled by abort routine. */ 1417 continue; 1418 } 1419 #ifdef DIAGNOSTIC 1420 if (sitd->isdone) 1421 printf("ohci_softintr: sitd=%p is done\n", sitd); 1422 sitd->isdone = 1; 1423 #endif 1424 if (sitd->flags & OHCI_CALL_DONE) { 1425 ohci_soft_itd_t *next; 1426 1427 opipe = (struct ohci_pipe *)xfer->pipe; 1428 opipe->u.iso.inuse -= xfer->nframes; 1429 uedir = UE_GET_DIR(xfer->pipe->endpoint->edesc-> 1430 bEndpointAddress); 1431 xfer->status = USBD_NORMAL_COMPLETION; 1432 actlen = 0; 1433 for (i = 0, sitd = xfer->hcpriv;; 1434 sitd = next) { 1435 next = sitd->nextitd; 1436 if (OHCI_ITD_GET_CC(le32toh(sitd-> 1437 itd.itd_flags)) != OHCI_CC_NO_ERROR) 1438 xfer->status = USBD_IOERROR; 1439 /* For input, update frlengths with actual */ 1440 /* XXX anything necessary for output? */ 1441 if (uedir == UE_DIR_IN && 1442 xfer->status == USBD_NORMAL_COMPLETION) { 1443 iframes = OHCI_ITD_GET_FC(le32toh( 1444 sitd->itd.itd_flags)); 1445 for (j = 0; j < iframes; i++, j++) { 1446 len = le16toh(sitd-> 1447 itd.itd_offset[j]); 1448 len = 1449 (OHCI_ITD_PSW_GET_CC(len) == 1450 OHCI_CC_NOT_ACCESSED) ? 0 : 1451 OHCI_ITD_PSW_LENGTH(len); 1452 xfer->frlengths[i] = len; 1453 actlen += len; 1454 } 1455 } 1456 if (sitd->flags & OHCI_CALL_DONE) 1457 break; 1458 ohci_free_sitd(sc, sitd); 1459 } 1460 ohci_free_sitd(sc, sitd); 1461 if (uedir == UE_DIR_IN && 1462 xfer->status == USBD_NORMAL_COMPLETION) 1463 xfer->actlen = actlen; 1464 xfer->hcpriv = NULL; 1465 1466 s = splusb(); 1467 usb_transfer_complete(xfer); 1468 splx(s); 1469 } 1470 } 1471 1472 #ifdef USB_USE_SOFTINTR 1473 if (sc->sc_softwake) { 1474 sc->sc_softwake = 0; 1475 wakeup(&sc->sc_softwake); 1476 } 1477 #endif /* USB_USE_SOFTINTR */ 1478 1479 sc->sc_bus.intr_context--; 1480 DPRINTFN(10,("ohci_softintr: done:\n")); 1481 } 1482 1483 void 1484 ohci_device_ctrl_done(usbd_xfer_handle xfer) 1485 { 1486 DPRINTFN(10,("ohci_device_ctrl_done: xfer=%p\n", xfer)); 1487 1488 #ifdef DIAGNOSTIC 1489 if (!(xfer->rqflags & URQ_REQUEST)) { 1490 panic("ohci_device_ctrl_done: not a request"); 1491 } 1492 #endif 1493 } 1494 1495 void 1496 ohci_device_intr_done(usbd_xfer_handle xfer) 1497 { 1498 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1499 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1500 ohci_soft_ed_t *sed = opipe->sed; 1501 ohci_soft_td_t *data, *tail; 1502 1503 1504 DPRINTFN(10,("ohci_device_intr_done: xfer=%p, actlen=%d\n", 1505 xfer, xfer->actlen)); 1506 1507 if (xfer->pipe->repeat) { 1508 data = opipe->tail.td; 1509 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 1510 if (tail == NULL) { 1511 xfer->status = USBD_NOMEM; 1512 return; 1513 } 1514 tail->xfer = NULL; 1515 1516 data->td.td_flags = htole32( 1517 OHCI_TD_IN | OHCI_TD_NOCC | 1518 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 1519 if (xfer->flags & USBD_SHORT_XFER_OK) 1520 data->td.td_flags |= htole32(OHCI_TD_R); 1521 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf, 0)); 1522 data->nexttd = tail; 1523 data->td.td_nexttd = htole32(tail->physaddr); 1524 data->td.td_be = htole32(le32toh(data->td.td_cbp) + 1525 xfer->length - 1); 1526 data->len = xfer->length; 1527 data->xfer = xfer; 1528 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1529 xfer->hcpriv = data; 1530 xfer->actlen = 0; 1531 1532 sed->ed.ed_tailp = htole32(tail->physaddr); 1533 opipe->tail.td = tail; 1534 } 1535 } 1536 1537 void 1538 ohci_device_bulk_done(usbd_xfer_handle xfer) 1539 { 1540 DPRINTFN(10,("ohci_device_bulk_done: xfer=%p, actlen=%d\n", 1541 xfer, xfer->actlen)); 1542 } 1543 1544 void 1545 ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer) 1546 { 1547 usbd_pipe_handle pipe; 1548 u_char *p; 1549 int i, m; 1550 int hstatus; 1551 1552 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1553 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n", 1554 sc, xfer, hstatus)); 1555 1556 if (xfer == NULL) { 1557 /* Just ignore the change. */ 1558 return; 1559 } 1560 1561 pipe = xfer->pipe; 1562 1563 p = KERNADDR(&xfer->dmabuf, 0); 1564 m = min(sc->sc_noport, xfer->length * 8 - 1); 1565 memset(p, 0, xfer->length); 1566 for (i = 1; i <= m; i++) { 1567 /* Pick out CHANGE bits from the status reg. */ 1568 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1569 p[i/8] |= 1 << (i%8); 1570 } 1571 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 1572 xfer->actlen = xfer->length; 1573 xfer->status = USBD_NORMAL_COMPLETION; 1574 1575 usb_transfer_complete(xfer); 1576 } 1577 1578 void 1579 ohci_root_intr_done(usbd_xfer_handle xfer) 1580 { 1581 } 1582 1583 void 1584 ohci_root_ctrl_done(usbd_xfer_handle xfer) 1585 { 1586 } 1587 1588 /* 1589 * Wait here until controller claims to have an interrupt. 1590 * Then call ohci_intr and return. Use timeout to avoid waiting 1591 * too long. 1592 */ 1593 void 1594 ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer) 1595 { 1596 int timo = xfer->timeout; 1597 int usecs; 1598 u_int32_t intrs; 1599 1600 xfer->status = USBD_IN_PROGRESS; 1601 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 1602 usb_delay_ms(&sc->sc_bus, 1); 1603 if (sc->sc_dying) 1604 break; 1605 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 1606 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs)); 1607 #ifdef OHCI_DEBUG 1608 if (ohcidebug > 15) 1609 ohci_dumpregs(sc); 1610 #endif 1611 if (intrs) { 1612 ohci_intr1(sc); 1613 if (xfer->status != USBD_IN_PROGRESS) 1614 return; 1615 } 1616 } 1617 1618 /* Timeout */ 1619 DPRINTF(("ohci_waitintr: timeout\n")); 1620 xfer->status = USBD_TIMEOUT; 1621 usb_transfer_complete(xfer); 1622 /* XXX should free TD */ 1623 } 1624 1625 void 1626 ohci_poll(struct usbd_bus *bus) 1627 { 1628 ohci_softc_t *sc = (ohci_softc_t *)bus; 1629 #ifdef OHCI_DEBUG 1630 static int last; 1631 int new; 1632 new = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1633 if (new != last) { 1634 DPRINTFN(10,("ohci_poll: intrs=0x%04x\n", new)); 1635 last = new; 1636 } 1637 #endif 1638 1639 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) 1640 ohci_intr1(sc); 1641 } 1642 1643 usbd_status 1644 ohci_device_request(usbd_xfer_handle xfer) 1645 { 1646 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1647 usb_device_request_t *req = &xfer->request; 1648 usbd_device_handle dev = opipe->pipe.device; 1649 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1650 int addr = dev->address; 1651 ohci_soft_td_t *setup, *stat, *next, *tail; 1652 ohci_soft_ed_t *sed; 1653 int isread; 1654 int len; 1655 usbd_status err; 1656 int s; 1657 1658 isread = req->bmRequestType & UT_READ; 1659 len = UGETW(req->wLength); 1660 1661 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 1662 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 1663 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1664 UGETW(req->wIndex), len, addr, 1665 opipe->pipe.endpoint->edesc->bEndpointAddress)); 1666 1667 setup = opipe->tail.td; 1668 stat = ohci_alloc_std(sc); 1669 if (stat == NULL) { 1670 err = USBD_NOMEM; 1671 goto bad1; 1672 } 1673 tail = ohci_alloc_std(sc); 1674 if (tail == NULL) { 1675 err = USBD_NOMEM; 1676 goto bad2; 1677 } 1678 tail->xfer = NULL; 1679 1680 sed = opipe->sed; 1681 opipe->u.ctl.length = len; 1682 1683 /* Update device address and length since they may have changed 1684 during the setup of the control pipe in usbd_new_device(). */ 1685 /* XXX This only needs to be done once, but it's too early in open. */ 1686 /* XXXX Should not touch ED here! */ 1687 sed->ed.ed_flags = htole32( 1688 (le32toh(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) | 1689 OHCI_ED_SET_FA(addr) | 1690 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize))); 1691 1692 next = stat; 1693 1694 /* Set up data transaction */ 1695 if (len != 0) { 1696 ohci_soft_td_t *std = stat; 1697 1698 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 1699 std, &stat); 1700 stat = stat->nexttd; /* point at free TD */ 1701 if (err) 1702 goto bad3; 1703 /* Start toggle at 1 and then use the carried toggle. */ 1704 std->td.td_flags &= htole32(~OHCI_TD_TOGGLE_MASK); 1705 std->td.td_flags |= htole32(OHCI_TD_TOGGLE_1); 1706 } 1707 1708 memcpy(KERNADDR(&opipe->u.ctl.reqdma, 0), req, sizeof *req); 1709 1710 setup->td.td_flags = htole32(OHCI_TD_SETUP | OHCI_TD_NOCC | 1711 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1712 setup->td.td_cbp = htole32(DMAADDR(&opipe->u.ctl.reqdma, 0)); 1713 setup->nexttd = next; 1714 setup->td.td_nexttd = htole32(next->physaddr); 1715 setup->td.td_be = htole32(le32toh(setup->td.td_cbp) + sizeof *req - 1); 1716 setup->len = 0; 1717 setup->xfer = xfer; 1718 setup->flags = 0; 1719 xfer->hcpriv = setup; 1720 1721 stat->td.td_flags = htole32( 1722 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | 1723 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1724 stat->td.td_cbp = 0; 1725 stat->nexttd = tail; 1726 stat->td.td_nexttd = htole32(tail->physaddr); 1727 stat->td.td_be = 0; 1728 stat->flags = OHCI_CALL_DONE; 1729 stat->len = 0; 1730 stat->xfer = xfer; 1731 1732 #ifdef OHCI_DEBUG 1733 if (ohcidebug > 5) { 1734 DPRINTF(("ohci_device_request:\n")); 1735 ohci_dump_ed(sed); 1736 ohci_dump_tds(setup); 1737 } 1738 #endif 1739 1740 /* Insert ED in schedule */ 1741 s = splusb(); 1742 sed->ed.ed_tailp = htole32(tail->physaddr); 1743 opipe->tail.td = tail; 1744 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1745 if (xfer->timeout && !sc->sc_bus.use_polling) { 1746 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 1747 ohci_timeout, xfer); 1748 } 1749 splx(s); 1750 1751 #ifdef OHCI_DEBUG 1752 if (ohcidebug > 20) { 1753 delay(10000); 1754 DPRINTF(("ohci_device_request: status=%x\n", 1755 OREAD4(sc, OHCI_COMMAND_STATUS))); 1756 ohci_dumpregs(sc); 1757 printf("ctrl head:\n"); 1758 ohci_dump_ed(sc->sc_ctrl_head); 1759 printf("sed:\n"); 1760 ohci_dump_ed(sed); 1761 ohci_dump_tds(setup); 1762 } 1763 #endif 1764 1765 return (USBD_NORMAL_COMPLETION); 1766 1767 bad3: 1768 ohci_free_std(sc, tail); 1769 bad2: 1770 ohci_free_std(sc, stat); 1771 bad1: 1772 return (err); 1773 } 1774 1775 /* 1776 * Add an ED to the schedule. Called at splusb(). 1777 */ 1778 void 1779 ohci_add_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1780 { 1781 DPRINTFN(8,("ohci_add_ed: sed=%p head=%p\n", sed, head)); 1782 1783 SPLUSBCHECK; 1784 sed->next = head->next; 1785 sed->ed.ed_nexted = head->ed.ed_nexted; 1786 head->next = sed; 1787 head->ed.ed_nexted = htole32(sed->physaddr); 1788 } 1789 1790 /* 1791 * Remove an ED from the schedule. Called at splusb(). 1792 */ 1793 void 1794 ohci_rem_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1795 { 1796 ohci_soft_ed_t *p; 1797 1798 SPLUSBCHECK; 1799 1800 /* XXX */ 1801 for (p = head; p != NULL && p->next != sed; p = p->next) 1802 ; 1803 if (p == NULL) 1804 panic("ohci_rem_ed: ED not found"); 1805 p->next = sed->next; 1806 p->ed.ed_nexted = sed->ed.ed_nexted; 1807 } 1808 1809 /* 1810 * When a transfer is completed the TD is added to the done queue by 1811 * the host controller. This queue is the processed by software. 1812 * Unfortunately the queue contains the physical address of the TD 1813 * and we have no simple way to translate this back to a kernel address. 1814 * To make the translation possible (and fast) we use a hash table of 1815 * TDs currently in the schedule. The physical address is used as the 1816 * hash value. 1817 */ 1818 1819 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1820 /* Called at splusb() */ 1821 void 1822 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1823 { 1824 int h = HASH(std->physaddr); 1825 1826 SPLUSBCHECK; 1827 1828 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1829 } 1830 1831 /* Called at splusb() */ 1832 void 1833 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1834 { 1835 SPLUSBCHECK; 1836 1837 LIST_REMOVE(std, hnext); 1838 } 1839 1840 ohci_soft_td_t * 1841 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a) 1842 { 1843 int h = HASH(a); 1844 ohci_soft_td_t *std; 1845 1846 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1847 std != NULL; 1848 std = LIST_NEXT(std, hnext)) 1849 if (std->physaddr == a) 1850 return (std); 1851 return (NULL); 1852 } 1853 1854 /* Called at splusb() */ 1855 void 1856 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1857 { 1858 int h = HASH(sitd->physaddr); 1859 1860 SPLUSBCHECK; 1861 1862 DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n", 1863 sitd, (u_long)sitd->physaddr)); 1864 1865 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext); 1866 } 1867 1868 /* Called at splusb() */ 1869 void 1870 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1871 { 1872 SPLUSBCHECK; 1873 1874 DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n", 1875 sitd, (u_long)sitd->physaddr)); 1876 1877 LIST_REMOVE(sitd, hnext); 1878 } 1879 1880 ohci_soft_itd_t * 1881 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a) 1882 { 1883 int h = HASH(a); 1884 ohci_soft_itd_t *sitd; 1885 1886 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]); 1887 sitd != NULL; 1888 sitd = LIST_NEXT(sitd, hnext)) 1889 if (sitd->physaddr == a) 1890 return (sitd); 1891 return (NULL); 1892 } 1893 1894 void 1895 ohci_timeout(void *addr) 1896 { 1897 struct ohci_xfer *oxfer = addr; 1898 struct ohci_pipe *opipe = (struct ohci_pipe *)oxfer->xfer.pipe; 1899 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1900 1901 DPRINTF(("ohci_timeout: oxfer=%p\n", oxfer)); 1902 1903 if (sc->sc_dying) { 1904 ohci_abort_xfer(&oxfer->xfer, USBD_TIMEOUT); 1905 return; 1906 } 1907 1908 /* Execute the abort in a process context. */ 1909 usb_init_task(&oxfer->abort_task, ohci_timeout_task, addr); 1910 usb_add_task(oxfer->xfer.pipe->device, &oxfer->abort_task); 1911 } 1912 1913 void 1914 ohci_timeout_task(void *addr) 1915 { 1916 usbd_xfer_handle xfer = addr; 1917 int s; 1918 1919 DPRINTF(("ohci_timeout_task: xfer=%p\n", xfer)); 1920 1921 s = splusb(); 1922 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1923 splx(s); 1924 } 1925 1926 #ifdef OHCI_DEBUG 1927 void 1928 ohci_dump_tds(ohci_soft_td_t *std) 1929 { 1930 for (; std; std = std->nexttd) 1931 ohci_dump_td(std); 1932 } 1933 1934 void 1935 ohci_dump_td(ohci_soft_td_t *std) 1936 { 1937 char sbuf[128]; 1938 1939 bitmask_snprintf((u_int32_t)le32toh(std->td.td_flags), 1940 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 1941 sbuf, sizeof(sbuf)); 1942 1943 printf("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx " 1944 "nexttd=0x%08lx be=0x%08lx\n", 1945 std, (u_long)std->physaddr, sbuf, 1946 OHCI_TD_GET_DI(le32toh(std->td.td_flags)), 1947 OHCI_TD_GET_EC(le32toh(std->td.td_flags)), 1948 OHCI_TD_GET_CC(le32toh(std->td.td_flags)), 1949 (u_long)le32toh(std->td.td_cbp), 1950 (u_long)le32toh(std->td.td_nexttd), 1951 (u_long)le32toh(std->td.td_be)); 1952 } 1953 1954 void 1955 ohci_dump_itd(ohci_soft_itd_t *sitd) 1956 { 1957 int i; 1958 1959 printf("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n" 1960 "bp0=0x%08lx next=0x%08lx be=0x%08lx\n", 1961 sitd, (u_long)sitd->physaddr, 1962 OHCI_ITD_GET_SF(le32toh(sitd->itd.itd_flags)), 1963 OHCI_ITD_GET_DI(le32toh(sitd->itd.itd_flags)), 1964 OHCI_ITD_GET_FC(le32toh(sitd->itd.itd_flags)), 1965 OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags)), 1966 (u_long)le32toh(sitd->itd.itd_bp0), 1967 (u_long)le32toh(sitd->itd.itd_nextitd), 1968 (u_long)le32toh(sitd->itd.itd_be)); 1969 for (i = 0; i < OHCI_ITD_NOFFSET; i++) 1970 printf("offs[%d]=0x%04x ", i, 1971 (u_int)le16toh(sitd->itd.itd_offset[i])); 1972 printf("\n"); 1973 } 1974 1975 void 1976 ohci_dump_itds(ohci_soft_itd_t *sitd) 1977 { 1978 for (; sitd; sitd = sitd->nextitd) 1979 ohci_dump_itd(sitd); 1980 } 1981 1982 void 1983 ohci_dump_ed(ohci_soft_ed_t *sed) 1984 { 1985 char sbuf[128], sbuf2[128]; 1986 1987 bitmask_snprintf((u_int32_t)le32toh(sed->ed.ed_flags), 1988 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO", 1989 sbuf, sizeof(sbuf)); 1990 bitmask_snprintf((u_int32_t)le32toh(sed->ed.ed_headp), 1991 "\20\1HALT\2CARRY", sbuf2, sizeof(sbuf2)); 1992 1993 printf("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d flags=%s\ntailp=0x%08lx " 1994 "headflags=%s headp=0x%08lx nexted=0x%08lx\n", 1995 sed, (u_long)sed->physaddr, 1996 OHCI_ED_GET_FA(le32toh(sed->ed.ed_flags)), 1997 OHCI_ED_GET_EN(le32toh(sed->ed.ed_flags)), 1998 OHCI_ED_GET_MAXP(le32toh(sed->ed.ed_flags)), sbuf, 1999 (u_long)le32toh(sed->ed.ed_tailp), sbuf2, 2000 (u_long)le32toh(sed->ed.ed_headp), 2001 (u_long)le32toh(sed->ed.ed_nexted)); 2002 } 2003 #endif 2004 2005 usbd_status 2006 ohci_open(usbd_pipe_handle pipe) 2007 { 2008 usbd_device_handle dev = pipe->device; 2009 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2010 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 2011 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2012 u_int8_t addr = dev->address; 2013 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 2014 ohci_soft_ed_t *sed; 2015 ohci_soft_td_t *std; 2016 ohci_soft_itd_t *sitd; 2017 ohci_physaddr_t tdphys; 2018 u_int32_t fmt; 2019 usbd_status err; 2020 int s; 2021 int ival; 2022 2023 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 2024 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 2025 2026 if (sc->sc_dying) 2027 return (USBD_IOERROR); 2028 2029 std = NULL; 2030 sed = NULL; 2031 2032 if (addr == sc->sc_addr) { 2033 switch (ed->bEndpointAddress) { 2034 case USB_CONTROL_ENDPOINT: 2035 pipe->methods = &ohci_root_ctrl_methods; 2036 break; 2037 case UE_DIR_IN | OHCI_INTR_ENDPT: 2038 pipe->methods = &ohci_root_intr_methods; 2039 break; 2040 default: 2041 return (USBD_INVAL); 2042 } 2043 } else { 2044 sed = ohci_alloc_sed(sc); 2045 if (sed == NULL) 2046 goto bad0; 2047 opipe->sed = sed; 2048 if (xfertype == UE_ISOCHRONOUS) { 2049 sitd = ohci_alloc_sitd(sc); 2050 if (sitd == NULL) 2051 goto bad1; 2052 opipe->tail.itd = sitd; 2053 tdphys = sitd->physaddr; 2054 fmt = OHCI_ED_FORMAT_ISO; 2055 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 2056 fmt |= OHCI_ED_DIR_IN; 2057 else 2058 fmt |= OHCI_ED_DIR_OUT; 2059 } else { 2060 std = ohci_alloc_std(sc); 2061 if (std == NULL) 2062 goto bad1; 2063 opipe->tail.td = std; 2064 tdphys = std->physaddr; 2065 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD; 2066 } 2067 sed->ed.ed_flags = htole32( 2068 OHCI_ED_SET_FA(addr) | 2069 OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) | 2070 (dev->speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) | 2071 fmt | 2072 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 2073 sed->ed.ed_headp = sed->ed.ed_tailp = htole32(tdphys); 2074 2075 switch (xfertype) { 2076 case UE_CONTROL: 2077 pipe->methods = &ohci_device_ctrl_methods; 2078 err = usb_allocmem(&sc->sc_bus, 2079 sizeof(usb_device_request_t), 2080 0, &opipe->u.ctl.reqdma); 2081 if (err) 2082 goto bad; 2083 s = splusb(); 2084 ohci_add_ed(sed, sc->sc_ctrl_head); 2085 splx(s); 2086 break; 2087 case UE_INTERRUPT: 2088 pipe->methods = &ohci_device_intr_methods; 2089 ival = pipe->interval; 2090 if (ival == USBD_DEFAULT_INTERVAL) 2091 ival = ed->bInterval; 2092 return (ohci_device_setintr(sc, opipe, ival)); 2093 case UE_ISOCHRONOUS: 2094 pipe->methods = &ohci_device_isoc_methods; 2095 return (ohci_setup_isoc(pipe)); 2096 case UE_BULK: 2097 pipe->methods = &ohci_device_bulk_methods; 2098 s = splusb(); 2099 ohci_add_ed(sed, sc->sc_bulk_head); 2100 splx(s); 2101 break; 2102 } 2103 } 2104 return (USBD_NORMAL_COMPLETION); 2105 2106 bad: 2107 if (std != NULL) 2108 ohci_free_std(sc, std); 2109 bad1: 2110 if (sed != NULL) 2111 ohci_free_sed(sc, sed); 2112 bad0: 2113 return (USBD_NOMEM); 2114 2115 } 2116 2117 /* 2118 * Close a reqular pipe. 2119 * Assumes that there are no pending transactions. 2120 */ 2121 void 2122 ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head) 2123 { 2124 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2125 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2126 ohci_soft_ed_t *sed = opipe->sed; 2127 int s; 2128 2129 s = splusb(); 2130 #ifdef DIAGNOSTIC 2131 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 2132 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2133 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) { 2134 ohci_soft_td_t *std; 2135 std = ohci_hash_find_td(sc, le32toh(sed->ed.ed_headp)); 2136 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 2137 "tl=0x%x pipe=%p, std=%p\n", sed, 2138 (int)le32toh(sed->ed.ed_headp), 2139 (int)le32toh(sed->ed.ed_tailp), 2140 pipe, std); 2141 #ifdef USB_DEBUG 2142 usbd_dump_pipe(&opipe->pipe); 2143 #endif 2144 #ifdef OHCI_DEBUG 2145 ohci_dump_ed(sed); 2146 if (std) 2147 ohci_dump_td(std); 2148 #endif 2149 usb_delay_ms(&sc->sc_bus, 2); 2150 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2151 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) 2152 printf("ohci_close_pipe: pipe still not empty\n"); 2153 } 2154 #endif 2155 ohci_rem_ed(sed, head); 2156 /* Make sure the host controller is not touching this ED */ 2157 usb_delay_ms(&sc->sc_bus, 1); 2158 splx(s); 2159 ohci_free_sed(sc, opipe->sed); 2160 } 2161 2162 /* 2163 * Abort a device request. 2164 * If this routine is called at splusb() it guarantees that the request 2165 * will be removed from the hardware scheduling and that the callback 2166 * for it will be called with USBD_CANCELLED status. 2167 * It's impossible to guarantee that the requested transfer will not 2168 * have happened since the hardware runs concurrently. 2169 * If the transaction has already happened we rely on the ordinary 2170 * interrupt processing to process it. 2171 */ 2172 void 2173 ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2174 { 2175 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2176 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 2177 ohci_soft_ed_t *sed = opipe->sed; 2178 ohci_soft_td_t *p, *n; 2179 ohci_physaddr_t headp; 2180 int s, hit; 2181 2182 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p sed=%p\n", xfer, opipe,sed)); 2183 2184 if (sc->sc_dying) { 2185 /* If we're dying, just do the software part. */ 2186 s = splusb(); 2187 xfer->status = status; /* make software ignore it */ 2188 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 2189 usb_transfer_complete(xfer); 2190 splx(s); 2191 } 2192 2193 if (xfer->device->bus->intr_context || !curproc) 2194 panic("ohci_abort_xfer: not in process context"); 2195 2196 /* 2197 * Step 1: Make interrupt routine and hardware ignore xfer. 2198 */ 2199 s = splusb(); 2200 xfer->status = status; /* make software ignore it */ 2201 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 2202 splx(s); 2203 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed)); 2204 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 2205 2206 /* 2207 * Step 2: Wait until we know hardware has finished any possible 2208 * use of the xfer. Also make sure the soft interrupt routine 2209 * has run. 2210 */ 2211 usb_delay_ms(opipe->pipe.device->bus, 20); /* Hardware finishes in 1ms */ 2212 s = splusb(); 2213 #ifdef USB_USE_SOFTINTR 2214 sc->sc_softwake = 1; 2215 #endif /* USB_USE_SOFTINTR */ 2216 usb_schedsoftintr(&sc->sc_bus); 2217 #ifdef USB_USE_SOFTINTR 2218 tsleep(&sc->sc_softwake, PZERO, "ohciab", 0); 2219 #endif /* USB_USE_SOFTINTR */ 2220 splx(s); 2221 2222 /* 2223 * Step 3: Remove any vestiges of the xfer from the hardware. 2224 * The complication here is that the hardware may have executed 2225 * beyond the xfer we're trying to abort. So as we're scanning 2226 * the TDs of this xfer we check if the hardware points to 2227 * any of them. 2228 */ 2229 s = splusb(); /* XXX why? */ 2230 p = xfer->hcpriv; 2231 #ifdef DIAGNOSTIC 2232 if (p == NULL) { 2233 splx(s); 2234 printf("ohci_abort_xfer: hcpriv is NULL\n"); 2235 return; 2236 } 2237 #endif 2238 #ifdef OHCI_DEBUG 2239 if (ohcidebug > 1) { 2240 DPRINTF(("ohci_abort_xfer: sed=\n")); 2241 ohci_dump_ed(sed); 2242 ohci_dump_tds(p); 2243 } 2244 #endif 2245 headp = le32toh(sed->ed.ed_headp) & OHCI_HEADMASK; 2246 hit = 0; 2247 for (; p->xfer == xfer; p = n) { 2248 hit |= headp == p->physaddr; 2249 n = p->nexttd; 2250 ohci_free_std(sc, p); 2251 } 2252 /* Zap headp register if hardware pointed inside the xfer. */ 2253 if (hit) { 2254 DPRINTFN(1,("ohci_abort_xfer: set hd=0x%08x, tl=0x%08x\n", 2255 (int)p->physaddr, (int)le32toh(sed->ed.ed_tailp))); 2256 sed->ed.ed_headp = htole32(p->physaddr); /* unlink TDs */ 2257 } else { 2258 DPRINTFN(1,("ohci_abort_xfer: no hit\n")); 2259 } 2260 2261 /* 2262 * Step 4: Turn on hardware again. 2263 */ 2264 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 2265 2266 /* 2267 * Step 5: Execute callback. 2268 */ 2269 usb_transfer_complete(xfer); 2270 2271 splx(s); 2272 } 2273 2274 /* 2275 * Data structures and routines to emulate the root hub. 2276 */ 2277 Static usb_device_descriptor_t ohci_devd = { 2278 USB_DEVICE_DESCRIPTOR_SIZE, 2279 UDESC_DEVICE, /* type */ 2280 {0x00, 0x01}, /* USB version */ 2281 UDCLASS_HUB, /* class */ 2282 UDSUBCLASS_HUB, /* subclass */ 2283 UDPROTO_FSHUB, 2284 64, /* max packet */ 2285 {0},{0},{0x00,0x01}, /* device id */ 2286 1,2,0, /* string indicies */ 2287 1 /* # of configurations */ 2288 }; 2289 2290 Static usb_config_descriptor_t ohci_confd = { 2291 USB_CONFIG_DESCRIPTOR_SIZE, 2292 UDESC_CONFIG, 2293 {USB_CONFIG_DESCRIPTOR_SIZE + 2294 USB_INTERFACE_DESCRIPTOR_SIZE + 2295 USB_ENDPOINT_DESCRIPTOR_SIZE}, 2296 1, 2297 1, 2298 0, 2299 UC_SELF_POWERED, 2300 0 /* max power */ 2301 }; 2302 2303 Static usb_interface_descriptor_t ohci_ifcd = { 2304 USB_INTERFACE_DESCRIPTOR_SIZE, 2305 UDESC_INTERFACE, 2306 0, 2307 0, 2308 1, 2309 UICLASS_HUB, 2310 UISUBCLASS_HUB, 2311 UIPROTO_FSHUB, 2312 0 2313 }; 2314 2315 Static usb_endpoint_descriptor_t ohci_endpd = { 2316 USB_ENDPOINT_DESCRIPTOR_SIZE, 2317 UDESC_ENDPOINT, 2318 UE_DIR_IN | OHCI_INTR_ENDPT, 2319 UE_INTERRUPT, 2320 {8, 0}, /* max packet */ 2321 255 2322 }; 2323 2324 Static usb_hub_descriptor_t ohci_hubd = { 2325 USB_HUB_DESCRIPTOR_SIZE, 2326 UDESC_HUB, 2327 0, 2328 {0,0}, 2329 0, 2330 0, 2331 {0}, 2332 }; 2333 2334 Static int 2335 ohci_str(usb_string_descriptor_t *p, int l, const char *s) 2336 { 2337 int i; 2338 2339 if (l == 0) 2340 return (0); 2341 p->bLength = 2 * strlen(s) + 2; 2342 if (l == 1) 2343 return (1); 2344 p->bDescriptorType = UDESC_STRING; 2345 l -= 2; 2346 for (i = 0; s[i] && l > 1; i++, l -= 2) 2347 USETW2(p->bString[i], 0, s[i]); 2348 return (2*i+2); 2349 } 2350 2351 /* 2352 * Simulate a hardware hub by handling all the necessary requests. 2353 */ 2354 Static usbd_status 2355 ohci_root_ctrl_transfer(usbd_xfer_handle xfer) 2356 { 2357 usbd_status err; 2358 2359 /* Insert last in queue. */ 2360 err = usb_insert_transfer(xfer); 2361 if (err) 2362 return (err); 2363 2364 /* Pipe isn't running, start first */ 2365 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2366 } 2367 2368 Static usbd_status 2369 ohci_root_ctrl_start(usbd_xfer_handle xfer) 2370 { 2371 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2372 usb_device_request_t *req; 2373 void *buf = NULL; 2374 int port, i; 2375 int s, len, value, index, l, totlen = 0; 2376 usb_port_status_t ps; 2377 usb_hub_descriptor_t hubd; 2378 usbd_status err; 2379 u_int32_t v; 2380 2381 if (sc->sc_dying) 2382 return (USBD_IOERROR); 2383 2384 #ifdef DIAGNOSTIC 2385 if (!(xfer->rqflags & URQ_REQUEST)) 2386 /* XXX panic */ 2387 return (USBD_INVAL); 2388 #endif 2389 req = &xfer->request; 2390 2391 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 2392 req->bmRequestType, req->bRequest)); 2393 2394 len = UGETW(req->wLength); 2395 value = UGETW(req->wValue); 2396 index = UGETW(req->wIndex); 2397 2398 if (len != 0) 2399 buf = KERNADDR(&xfer->dmabuf, 0); 2400 2401 #define C(x,y) ((x) | ((y) << 8)) 2402 switch(C(req->bRequest, req->bmRequestType)) { 2403 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 2404 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 2405 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 2406 /* 2407 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 2408 * for the integrated root hub. 2409 */ 2410 break; 2411 case C(UR_GET_CONFIG, UT_READ_DEVICE): 2412 if (len > 0) { 2413 *(u_int8_t *)buf = sc->sc_conf; 2414 totlen = 1; 2415 } 2416 break; 2417 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2418 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 2419 switch(value >> 8) { 2420 case UDESC_DEVICE: 2421 if ((value & 0xff) != 0) { 2422 err = USBD_IOERROR; 2423 goto ret; 2424 } 2425 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 2426 USETW(ohci_devd.idVendor, sc->sc_id_vendor); 2427 memcpy(buf, &ohci_devd, l); 2428 break; 2429 case UDESC_CONFIG: 2430 if ((value & 0xff) != 0) { 2431 err = USBD_IOERROR; 2432 goto ret; 2433 } 2434 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 2435 memcpy(buf, &ohci_confd, l); 2436 buf = (char *)buf + l; 2437 len -= l; 2438 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 2439 totlen += l; 2440 memcpy(buf, &ohci_ifcd, l); 2441 buf = (char *)buf + l; 2442 len -= l; 2443 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 2444 totlen += l; 2445 memcpy(buf, &ohci_endpd, l); 2446 break; 2447 case UDESC_STRING: 2448 if (len == 0) 2449 break; 2450 *(u_int8_t *)buf = 0; 2451 totlen = 1; 2452 switch (value & 0xff) { 2453 case 0: /* Language table */ 2454 totlen = ohci_str(buf, len, "\001"); 2455 break; 2456 case 1: /* Vendor */ 2457 totlen = ohci_str(buf, len, sc->sc_vendor); 2458 break; 2459 case 2: /* Product */ 2460 totlen = ohci_str(buf, len, "OHCI root hub"); 2461 break; 2462 } 2463 break; 2464 default: 2465 err = USBD_IOERROR; 2466 goto ret; 2467 } 2468 break; 2469 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 2470 if (len > 0) { 2471 *(u_int8_t *)buf = 0; 2472 totlen = 1; 2473 } 2474 break; 2475 case C(UR_GET_STATUS, UT_READ_DEVICE): 2476 if (len > 1) { 2477 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 2478 totlen = 2; 2479 } 2480 break; 2481 case C(UR_GET_STATUS, UT_READ_INTERFACE): 2482 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 2483 if (len > 1) { 2484 USETW(((usb_status_t *)buf)->wStatus, 0); 2485 totlen = 2; 2486 } 2487 break; 2488 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 2489 if (value >= USB_MAX_DEVICES) { 2490 err = USBD_IOERROR; 2491 goto ret; 2492 } 2493 sc->sc_addr = value; 2494 break; 2495 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 2496 if (value != 0 && value != 1) { 2497 err = USBD_IOERROR; 2498 goto ret; 2499 } 2500 sc->sc_conf = value; 2501 break; 2502 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 2503 break; 2504 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 2505 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 2506 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 2507 err = USBD_IOERROR; 2508 goto ret; 2509 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 2510 break; 2511 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 2512 break; 2513 /* Hub requests */ 2514 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2515 break; 2516 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2517 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 2518 "port=%d feature=%d\n", 2519 index, value)); 2520 if (index < 1 || index > sc->sc_noport) { 2521 err = USBD_IOERROR; 2522 goto ret; 2523 } 2524 port = OHCI_RH_PORT_STATUS(index); 2525 switch(value) { 2526 case UHF_PORT_ENABLE: 2527 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2528 break; 2529 case UHF_PORT_SUSPEND: 2530 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2531 break; 2532 case UHF_PORT_POWER: 2533 /* Yes, writing to the LOW_SPEED bit clears power. */ 2534 OWRITE4(sc, port, UPS_LOW_SPEED); 2535 break; 2536 case UHF_C_PORT_CONNECTION: 2537 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2538 break; 2539 case UHF_C_PORT_ENABLE: 2540 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2541 break; 2542 case UHF_C_PORT_SUSPEND: 2543 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2544 break; 2545 case UHF_C_PORT_OVER_CURRENT: 2546 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2547 break; 2548 case UHF_C_PORT_RESET: 2549 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2550 break; 2551 default: 2552 err = USBD_IOERROR; 2553 goto ret; 2554 } 2555 switch(value) { 2556 case UHF_C_PORT_CONNECTION: 2557 case UHF_C_PORT_ENABLE: 2558 case UHF_C_PORT_SUSPEND: 2559 case UHF_C_PORT_OVER_CURRENT: 2560 case UHF_C_PORT_RESET: 2561 /* Enable RHSC interrupt if condition is cleared. */ 2562 if ((OREAD4(sc, port) >> 16) == 0) 2563 ohci_rhsc_able(sc, 1); 2564 break; 2565 default: 2566 break; 2567 } 2568 break; 2569 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2570 if ((value & 0xff) != 0) { 2571 err = USBD_IOERROR; 2572 goto ret; 2573 } 2574 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2575 hubd = ohci_hubd; 2576 hubd.bNbrPorts = sc->sc_noport; 2577 USETW(hubd.wHubCharacteristics, 2578 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2579 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2580 /* XXX overcurrent */ 2581 ); 2582 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2583 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2584 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2585 hubd.DeviceRemovable[i++] = (u_int8_t)v; 2586 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2587 l = min(len, hubd.bDescLength); 2588 totlen = l; 2589 memcpy(buf, &hubd, l); 2590 break; 2591 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2592 if (len != 4) { 2593 err = USBD_IOERROR; 2594 goto ret; 2595 } 2596 memset(buf, 0, len); /* ? XXX */ 2597 totlen = len; 2598 break; 2599 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2600 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 2601 index)); 2602 if (index < 1 || index > sc->sc_noport) { 2603 err = USBD_IOERROR; 2604 goto ret; 2605 } 2606 if (len != 4) { 2607 err = USBD_IOERROR; 2608 goto ret; 2609 } 2610 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2611 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 2612 v)); 2613 USETW(ps.wPortStatus, v); 2614 USETW(ps.wPortChange, v >> 16); 2615 l = min(len, sizeof ps); 2616 memcpy(buf, &ps, l); 2617 totlen = l; 2618 break; 2619 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2620 err = USBD_IOERROR; 2621 goto ret; 2622 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2623 break; 2624 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2625 if (index < 1 || index > sc->sc_noport) { 2626 err = USBD_IOERROR; 2627 goto ret; 2628 } 2629 port = OHCI_RH_PORT_STATUS(index); 2630 switch(value) { 2631 case UHF_PORT_ENABLE: 2632 OWRITE4(sc, port, UPS_PORT_ENABLED); 2633 break; 2634 case UHF_PORT_SUSPEND: 2635 OWRITE4(sc, port, UPS_SUSPEND); 2636 break; 2637 case UHF_PORT_RESET: 2638 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 2639 index)); 2640 OWRITE4(sc, port, UPS_RESET); 2641 for (i = 0; i < 5; i++) { 2642 usb_delay_ms(&sc->sc_bus, 2643 USB_PORT_ROOT_RESET_DELAY); 2644 if (sc->sc_dying) { 2645 err = USBD_IOERROR; 2646 goto ret; 2647 } 2648 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2649 break; 2650 } 2651 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 2652 index, OREAD4(sc, port))); 2653 break; 2654 case UHF_PORT_POWER: 2655 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 2656 "%d\n", index)); 2657 OWRITE4(sc, port, UPS_PORT_POWER); 2658 break; 2659 default: 2660 err = USBD_IOERROR; 2661 goto ret; 2662 } 2663 break; 2664 default: 2665 err = USBD_IOERROR; 2666 goto ret; 2667 } 2668 xfer->actlen = totlen; 2669 err = USBD_NORMAL_COMPLETION; 2670 ret: 2671 xfer->status = err; 2672 s = splusb(); 2673 usb_transfer_complete(xfer); 2674 splx(s); 2675 return (USBD_IN_PROGRESS); 2676 } 2677 2678 /* Abort a root control request. */ 2679 Static void 2680 ohci_root_ctrl_abort(usbd_xfer_handle xfer) 2681 { 2682 /* Nothing to do, all transfers are synchronous. */ 2683 } 2684 2685 /* Close the root pipe. */ 2686 Static void 2687 ohci_root_ctrl_close(usbd_pipe_handle pipe) 2688 { 2689 DPRINTF(("ohci_root_ctrl_close\n")); 2690 /* Nothing to do. */ 2691 } 2692 2693 Static usbd_status 2694 ohci_root_intr_transfer(usbd_xfer_handle xfer) 2695 { 2696 usbd_status err; 2697 2698 /* Insert last in queue. */ 2699 err = usb_insert_transfer(xfer); 2700 if (err) 2701 return (err); 2702 2703 /* Pipe isn't running, start first */ 2704 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2705 } 2706 2707 Static usbd_status 2708 ohci_root_intr_start(usbd_xfer_handle xfer) 2709 { 2710 usbd_pipe_handle pipe = xfer->pipe; 2711 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2712 2713 if (sc->sc_dying) 2714 return (USBD_IOERROR); 2715 2716 sc->sc_intrxfer = xfer; 2717 2718 return (USBD_IN_PROGRESS); 2719 } 2720 2721 /* Abort a root interrupt request. */ 2722 Static void 2723 ohci_root_intr_abort(usbd_xfer_handle xfer) 2724 { 2725 int s; 2726 2727 if (xfer->pipe->intrxfer == xfer) { 2728 DPRINTF(("ohci_root_intr_abort: remove\n")); 2729 xfer->pipe->intrxfer = NULL; 2730 } 2731 xfer->status = USBD_CANCELLED; 2732 s = splusb(); 2733 usb_transfer_complete(xfer); 2734 splx(s); 2735 } 2736 2737 /* Close the root pipe. */ 2738 Static void 2739 ohci_root_intr_close(usbd_pipe_handle pipe) 2740 { 2741 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2742 2743 DPRINTF(("ohci_root_intr_close\n")); 2744 2745 sc->sc_intrxfer = NULL; 2746 } 2747 2748 /************************/ 2749 2750 Static usbd_status 2751 ohci_device_ctrl_transfer(usbd_xfer_handle xfer) 2752 { 2753 usbd_status err; 2754 2755 /* Insert last in queue. */ 2756 err = usb_insert_transfer(xfer); 2757 if (err) 2758 return (err); 2759 2760 /* Pipe isn't running, start first */ 2761 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2762 } 2763 2764 Static usbd_status 2765 ohci_device_ctrl_start(usbd_xfer_handle xfer) 2766 { 2767 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2768 usbd_status err; 2769 2770 if (sc->sc_dying) 2771 return (USBD_IOERROR); 2772 2773 #ifdef DIAGNOSTIC 2774 if (!(xfer->rqflags & URQ_REQUEST)) { 2775 /* XXX panic */ 2776 printf("ohci_device_ctrl_transfer: not a request\n"); 2777 return (USBD_INVAL); 2778 } 2779 #endif 2780 2781 err = ohci_device_request(xfer); 2782 if (err) 2783 return (err); 2784 2785 if (sc->sc_bus.use_polling) 2786 ohci_waitintr(sc, xfer); 2787 return (USBD_IN_PROGRESS); 2788 } 2789 2790 /* Abort a device control request. */ 2791 Static void 2792 ohci_device_ctrl_abort(usbd_xfer_handle xfer) 2793 { 2794 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer)); 2795 ohci_abort_xfer(xfer, USBD_CANCELLED); 2796 } 2797 2798 /* Close a device control pipe. */ 2799 Static void 2800 ohci_device_ctrl_close(usbd_pipe_handle pipe) 2801 { 2802 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2803 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2804 2805 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe)); 2806 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2807 ohci_free_std(sc, opipe->tail.td); 2808 } 2809 2810 /************************/ 2811 2812 Static void 2813 ohci_device_clear_toggle(usbd_pipe_handle pipe) 2814 { 2815 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2816 2817 opipe->sed->ed.ed_headp &= htole32(~OHCI_TOGGLECARRY); 2818 } 2819 2820 Static void 2821 ohci_noop(usbd_pipe_handle pipe) 2822 { 2823 } 2824 2825 Static usbd_status 2826 ohci_device_bulk_transfer(usbd_xfer_handle xfer) 2827 { 2828 usbd_status err; 2829 2830 /* Insert last in queue. */ 2831 err = usb_insert_transfer(xfer); 2832 if (err) 2833 return (err); 2834 2835 /* Pipe isn't running, start first */ 2836 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2837 } 2838 2839 Static usbd_status 2840 ohci_device_bulk_start(usbd_xfer_handle xfer) 2841 { 2842 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2843 usbd_device_handle dev = opipe->pipe.device; 2844 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2845 int addr = dev->address; 2846 ohci_soft_td_t *data, *tail, *tdp; 2847 ohci_soft_ed_t *sed; 2848 int s, len, isread, endpt; 2849 usbd_status err; 2850 2851 if (sc->sc_dying) 2852 return (USBD_IOERROR); 2853 2854 #ifdef DIAGNOSTIC 2855 if (xfer->rqflags & URQ_REQUEST) { 2856 /* XXX panic */ 2857 printf("ohci_device_bulk_start: a request\n"); 2858 return (USBD_INVAL); 2859 } 2860 #endif 2861 2862 len = xfer->length; 2863 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 2864 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2865 sed = opipe->sed; 2866 2867 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d " 2868 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags, 2869 endpt)); 2870 2871 opipe->u.bulk.isread = isread; 2872 opipe->u.bulk.length = len; 2873 2874 /* Update device address */ 2875 sed->ed.ed_flags = htole32( 2876 (le32toh(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) | 2877 OHCI_ED_SET_FA(addr)); 2878 2879 /* Allocate a chain of new TDs (including a new tail). */ 2880 data = opipe->tail.td; 2881 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 2882 data, &tail); 2883 /* We want interrupt at the end of the transfer. */ 2884 tail->td.td_flags &= htole32(~OHCI_TD_INTR_MASK); 2885 tail->td.td_flags |= htole32(OHCI_TD_SET_DI(1)); 2886 tail->flags |= OHCI_CALL_DONE; 2887 tail = tail->nexttd; /* point at sentinel */ 2888 if (err) 2889 return (err); 2890 2891 tail->xfer = NULL; 2892 xfer->hcpriv = data; 2893 2894 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x " 2895 "td_cbp=0x%08x td_be=0x%08x\n", 2896 (int)le32toh(sed->ed.ed_flags), 2897 (int)le32toh(data->td.td_flags), 2898 (int)le32toh(data->td.td_cbp), 2899 (int)le32toh(data->td.td_be))); 2900 2901 #ifdef OHCI_DEBUG 2902 if (ohcidebug > 5) { 2903 ohci_dump_ed(sed); 2904 ohci_dump_tds(data); 2905 } 2906 #endif 2907 2908 /* Insert ED in schedule */ 2909 s = splusb(); 2910 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 2911 tdp->xfer = xfer; 2912 } 2913 sed->ed.ed_tailp = htole32(tail->physaddr); 2914 opipe->tail.td = tail; 2915 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 2916 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 2917 if (xfer->timeout && !sc->sc_bus.use_polling) { 2918 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2919 ohci_timeout, xfer); 2920 } 2921 2922 #if 0 2923 /* This goes wrong if we are too slow. */ 2924 if (ohcidebug > 10) { 2925 delay(10000); 2926 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2927 OREAD4(sc, OHCI_COMMAND_STATUS))); 2928 ohci_dump_ed(sed); 2929 ohci_dump_tds(data); 2930 } 2931 #endif 2932 2933 splx(s); 2934 2935 return (USBD_IN_PROGRESS); 2936 } 2937 2938 Static void 2939 ohci_device_bulk_abort(usbd_xfer_handle xfer) 2940 { 2941 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer)); 2942 ohci_abort_xfer(xfer, USBD_CANCELLED); 2943 } 2944 2945 /* 2946 * Close a device bulk pipe. 2947 */ 2948 Static void 2949 ohci_device_bulk_close(usbd_pipe_handle pipe) 2950 { 2951 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2952 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2953 2954 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe)); 2955 ohci_close_pipe(pipe, sc->sc_bulk_head); 2956 ohci_free_std(sc, opipe->tail.td); 2957 } 2958 2959 /************************/ 2960 2961 Static usbd_status 2962 ohci_device_intr_transfer(usbd_xfer_handle xfer) 2963 { 2964 usbd_status err; 2965 2966 /* Insert last in queue. */ 2967 err = usb_insert_transfer(xfer); 2968 if (err) 2969 return (err); 2970 2971 /* Pipe isn't running, start first */ 2972 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2973 } 2974 2975 Static usbd_status 2976 ohci_device_intr_start(usbd_xfer_handle xfer) 2977 { 2978 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2979 usbd_device_handle dev = opipe->pipe.device; 2980 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2981 ohci_soft_ed_t *sed = opipe->sed; 2982 ohci_soft_td_t *data, *tail; 2983 int len; 2984 int s; 2985 2986 if (sc->sc_dying) 2987 return (USBD_IOERROR); 2988 2989 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d " 2990 "flags=%d priv=%p\n", 2991 xfer, xfer->length, xfer->flags, xfer->priv)); 2992 2993 #ifdef DIAGNOSTIC 2994 if (xfer->rqflags & URQ_REQUEST) 2995 panic("ohci_device_intr_transfer: a request"); 2996 #endif 2997 2998 len = xfer->length; 2999 3000 data = opipe->tail.td; 3001 tail = ohci_alloc_std(sc); 3002 if (tail == NULL) 3003 return (USBD_NOMEM); 3004 tail->xfer = NULL; 3005 3006 data->td.td_flags = htole32( 3007 OHCI_TD_IN | OHCI_TD_NOCC | 3008 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 3009 if (xfer->flags & USBD_SHORT_XFER_OK) 3010 data->td.td_flags |= htole32(OHCI_TD_R); 3011 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf, 0)); 3012 data->nexttd = tail; 3013 data->td.td_nexttd = htole32(tail->physaddr); 3014 data->td.td_be = htole32(le32toh(data->td.td_cbp) + len - 1); 3015 data->len = len; 3016 data->xfer = xfer; 3017 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 3018 xfer->hcpriv = data; 3019 3020 #ifdef OHCI_DEBUG 3021 if (ohcidebug > 5) { 3022 DPRINTF(("ohci_device_intr_transfer:\n")); 3023 ohci_dump_ed(sed); 3024 ohci_dump_tds(data); 3025 } 3026 #endif 3027 3028 /* Insert ED in schedule */ 3029 s = splusb(); 3030 sed->ed.ed_tailp = htole32(tail->physaddr); 3031 opipe->tail.td = tail; 3032 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 3033 3034 #if 0 3035 /* 3036 * This goes horribly wrong, printing thousands of descriptors, 3037 * because false references are followed due to the fact that the 3038 * TD is gone. 3039 */ 3040 if (ohcidebug > 5) { 3041 usb_delay_ms(&sc->sc_bus, 5); 3042 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 3043 OREAD4(sc, OHCI_COMMAND_STATUS))); 3044 ohci_dump_ed(sed); 3045 ohci_dump_tds(data); 3046 } 3047 #endif 3048 splx(s); 3049 3050 return (USBD_IN_PROGRESS); 3051 } 3052 3053 /* Abort a device control request. */ 3054 Static void 3055 ohci_device_intr_abort(usbd_xfer_handle xfer) 3056 { 3057 if (xfer->pipe->intrxfer == xfer) { 3058 DPRINTF(("ohci_device_intr_abort: remove\n")); 3059 xfer->pipe->intrxfer = NULL; 3060 } 3061 ohci_abort_xfer(xfer, USBD_CANCELLED); 3062 } 3063 3064 /* Close a device interrupt pipe. */ 3065 Static void 3066 ohci_device_intr_close(usbd_pipe_handle pipe) 3067 { 3068 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3069 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3070 int nslots = opipe->u.intr.nslots; 3071 int pos = opipe->u.intr.pos; 3072 int j; 3073 ohci_soft_ed_t *p, *sed = opipe->sed; 3074 int s; 3075 3076 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 3077 pipe, nslots, pos)); 3078 s = splusb(); 3079 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 3080 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 3081 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) 3082 usb_delay_ms(&sc->sc_bus, 2); 3083 3084 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 3085 ; 3086 #ifdef DIAGNOSTIC 3087 if (p == NULL) 3088 panic("ohci_device_intr_close: ED not found"); 3089 #endif 3090 p->next = sed->next; 3091 p->ed.ed_nexted = sed->ed.ed_nexted; 3092 splx(s); 3093 3094 for (j = 0; j < nslots; j++) 3095 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 3096 3097 ohci_free_std(sc, opipe->tail.td); 3098 ohci_free_sed(sc, opipe->sed); 3099 } 3100 3101 Static usbd_status 3102 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival) 3103 { 3104 int i, j, s, best; 3105 u_int npoll, slow, shigh, nslots; 3106 u_int bestbw, bw; 3107 ohci_soft_ed_t *hsed, *sed = opipe->sed; 3108 3109 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 3110 if (ival == 0) { 3111 printf("ohci_setintr: 0 interval\n"); 3112 return (USBD_INVAL); 3113 } 3114 3115 npoll = OHCI_NO_INTRS; 3116 while (npoll > ival) 3117 npoll /= 2; 3118 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 3119 3120 /* 3121 * We now know which level in the tree the ED must go into. 3122 * Figure out which slot has most bandwidth left over. 3123 * Slots to examine: 3124 * npoll 3125 * 1 0 3126 * 2 1 2 3127 * 4 3 4 5 6 3128 * 8 7 8 9 10 11 12 13 14 3129 * N (N-1) .. (N-1+N-1) 3130 */ 3131 slow = npoll-1; 3132 shigh = slow + npoll; 3133 nslots = OHCI_NO_INTRS / npoll; 3134 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 3135 bw = 0; 3136 for (j = 0; j < nslots; j++) 3137 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 3138 if (bw < bestbw) { 3139 best = i; 3140 bestbw = bw; 3141 } 3142 } 3143 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 3144 best, slow, shigh, bestbw)); 3145 3146 s = splusb(); 3147 hsed = sc->sc_eds[best]; 3148 sed->next = hsed->next; 3149 sed->ed.ed_nexted = hsed->ed.ed_nexted; 3150 hsed->next = sed; 3151 hsed->ed.ed_nexted = htole32(sed->physaddr); 3152 splx(s); 3153 3154 for (j = 0; j < nslots; j++) 3155 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 3156 opipe->u.intr.nslots = nslots; 3157 opipe->u.intr.pos = best; 3158 3159 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 3160 return (USBD_NORMAL_COMPLETION); 3161 } 3162 3163 /***********************/ 3164 3165 usbd_status 3166 ohci_device_isoc_transfer(usbd_xfer_handle xfer) 3167 { 3168 usbd_status err; 3169 3170 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer)); 3171 3172 /* Put it on our queue, */ 3173 err = usb_insert_transfer(xfer); 3174 3175 /* bail out on error, */ 3176 if (err && err != USBD_IN_PROGRESS) 3177 return (err); 3178 3179 /* XXX should check inuse here */ 3180 3181 /* insert into schedule, */ 3182 ohci_device_isoc_enter(xfer); 3183 3184 /* and start if the pipe wasn't running */ 3185 if (!err) 3186 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 3187 3188 return (err); 3189 } 3190 3191 void 3192 ohci_device_isoc_enter(usbd_xfer_handle xfer) 3193 { 3194 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3195 usbd_device_handle dev = opipe->pipe.device; 3196 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 3197 ohci_soft_ed_t *sed = opipe->sed; 3198 struct iso *iso = &opipe->u.iso; 3199 ohci_soft_itd_t *sitd, *nsitd; 3200 ohci_physaddr_t buf, offs, noffs, bp0; 3201 int i, ncur, nframes; 3202 int s; 3203 3204 DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p " 3205 "nframes=%d\n", 3206 iso->inuse, iso->next, xfer, xfer->nframes)); 3207 3208 if (sc->sc_dying) 3209 return; 3210 3211 if (iso->next == -1) { 3212 /* Not in use yet, schedule it a few frames ahead. */ 3213 iso->next = le32toh(sc->sc_hcca->hcca_frame_number) + 5; 3214 DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n", 3215 iso->next)); 3216 } 3217 3218 sitd = opipe->tail.itd; 3219 buf = DMAADDR(&xfer->dmabuf, 0); 3220 bp0 = OHCI_PAGE(buf); 3221 offs = OHCI_PAGE_OFFSET(buf); 3222 nframes = xfer->nframes; 3223 xfer->hcpriv = sitd; 3224 for (i = ncur = 0; i < nframes; i++, ncur++) { 3225 noffs = offs + xfer->frlengths[i]; 3226 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ 3227 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */ 3228 3229 /* Allocate next ITD */ 3230 nsitd = ohci_alloc_sitd(sc); 3231 if (nsitd == NULL) { 3232 /* XXX what now? */ 3233 printf("%s: isoc TD alloc failed\n", 3234 USBDEVNAME(sc->sc_bus.bdev)); 3235 return; 3236 } 3237 3238 /* Fill current ITD */ 3239 sitd->itd.itd_flags = htole32( 3240 OHCI_ITD_NOCC | 3241 OHCI_ITD_SET_SF(iso->next) | 3242 OHCI_ITD_SET_DI(6) | /* delay intr a little */ 3243 OHCI_ITD_SET_FC(ncur)); 3244 sitd->itd.itd_bp0 = htole32(bp0); 3245 sitd->nextitd = nsitd; 3246 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 3247 sitd->itd.itd_be = htole32(bp0 + offs - 1); 3248 sitd->xfer = xfer; 3249 sitd->flags = 0; 3250 3251 sitd = nsitd; 3252 iso->next = iso->next + ncur; 3253 bp0 = OHCI_PAGE(buf + offs); 3254 ncur = 0; 3255 } 3256 sitd->itd.itd_offset[ncur] = htole16(OHCI_ITD_MK_OFFS(offs)); 3257 offs = noffs; 3258 } 3259 nsitd = ohci_alloc_sitd(sc); 3260 if (nsitd == NULL) { 3261 /* XXX what now? */ 3262 printf("%s: isoc TD alloc failed\n", 3263 USBDEVNAME(sc->sc_bus.bdev)); 3264 return; 3265 } 3266 /* Fixup last used ITD */ 3267 sitd->itd.itd_flags = htole32( 3268 OHCI_ITD_NOCC | 3269 OHCI_ITD_SET_SF(iso->next) | 3270 OHCI_ITD_SET_DI(0) | 3271 OHCI_ITD_SET_FC(ncur)); 3272 sitd->itd.itd_bp0 = htole32(bp0); 3273 sitd->nextitd = nsitd; 3274 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 3275 sitd->itd.itd_be = htole32(bp0 + offs - 1); 3276 sitd->xfer = xfer; 3277 sitd->flags = OHCI_CALL_DONE; 3278 3279 iso->next = iso->next + ncur; 3280 iso->inuse += nframes; 3281 3282 xfer->actlen = offs; /* XXX pretend we did it all */ 3283 3284 xfer->status = USBD_IN_PROGRESS; 3285 3286 #ifdef OHCI_DEBUG 3287 if (ohcidebug > 5) { 3288 DPRINTF(("ohci_device_isoc_enter: frame=%d\n", 3289 le32toh(sc->sc_hcca->hcca_frame_number))); 3290 ohci_dump_itds(xfer->hcpriv); 3291 ohci_dump_ed(sed); 3292 } 3293 #endif 3294 3295 s = splusb(); 3296 sed->ed.ed_tailp = htole32(nsitd->physaddr); 3297 opipe->tail.itd = nsitd; 3298 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 3299 splx(s); 3300 3301 #ifdef OHCI_DEBUG 3302 if (ohcidebug > 5) { 3303 delay(150000); 3304 DPRINTF(("ohci_device_isoc_enter: after frame=%d\n", 3305 le32toh(sc->sc_hcca->hcca_frame_number))); 3306 ohci_dump_itds(xfer->hcpriv); 3307 ohci_dump_ed(sed); 3308 } 3309 #endif 3310 } 3311 3312 usbd_status 3313 ohci_device_isoc_start(usbd_xfer_handle xfer) 3314 { 3315 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3316 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3317 3318 DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer)); 3319 3320 if (sc->sc_dying) 3321 return (USBD_IOERROR); 3322 3323 #ifdef DIAGNOSTIC 3324 if (xfer->status != USBD_IN_PROGRESS) 3325 printf("ohci_device_isoc_start: not in progress %p\n", xfer); 3326 #endif 3327 3328 /* XXX anything to do? */ 3329 3330 return (USBD_IN_PROGRESS); 3331 } 3332 3333 void 3334 ohci_device_isoc_abort(usbd_xfer_handle xfer) 3335 { 3336 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3337 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3338 ohci_soft_ed_t *sed; 3339 ohci_soft_itd_t *sitd; 3340 int s; 3341 3342 s = splusb(); 3343 3344 DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer)); 3345 3346 /* Transfer is already done. */ 3347 if (xfer->status != USBD_NOT_STARTED && 3348 xfer->status != USBD_IN_PROGRESS) { 3349 splx(s); 3350 printf("ohci_device_isoc_abort: early return\n"); 3351 return; 3352 } 3353 3354 /* Give xfer the requested abort code. */ 3355 xfer->status = USBD_CANCELLED; 3356 3357 sed = opipe->sed; 3358 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 3359 3360 sitd = xfer->hcpriv; 3361 #ifdef DIAGNOSTIC 3362 if (sitd == NULL) { 3363 splx(s); 3364 printf("ohci_device_isoc_abort: hcpriv==0\n"); 3365 return; 3366 } 3367 #endif 3368 for (; sitd->xfer == xfer; sitd = sitd->nextitd) { 3369 #ifdef DIAGNOSTIC 3370 DPRINTFN(1,("abort sets done sitd=%p\n", sitd)); 3371 sitd->isdone = 1; 3372 #endif 3373 } 3374 3375 splx(s); 3376 3377 usb_delay_ms(&sc->sc_bus, OHCI_ITD_NOFFSET); 3378 3379 s = splusb(); 3380 3381 /* Run callback. */ 3382 usb_transfer_complete(xfer); 3383 3384 sed->ed.ed_headp = htole32(sitd->physaddr); /* unlink TDs */ 3385 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 3386 3387 splx(s); 3388 } 3389 3390 void 3391 ohci_device_isoc_done(usbd_xfer_handle xfer) 3392 { 3393 DPRINTFN(1,("ohci_device_isoc_done: xfer=%p\n", xfer)); 3394 } 3395 3396 usbd_status 3397 ohci_setup_isoc(usbd_pipe_handle pipe) 3398 { 3399 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3400 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3401 struct iso *iso = &opipe->u.iso; 3402 int s; 3403 3404 iso->next = -1; 3405 iso->inuse = 0; 3406 3407 s = splusb(); 3408 ohci_add_ed(opipe->sed, sc->sc_isoc_head); 3409 splx(s); 3410 3411 return (USBD_NORMAL_COMPLETION); 3412 } 3413 3414 void 3415 ohci_device_isoc_close(usbd_pipe_handle pipe) 3416 { 3417 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3418 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3419 3420 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe)); 3421 ohci_close_pipe(pipe, sc->sc_isoc_head); 3422 #ifdef DIAGNOSTIC 3423 opipe->tail.itd->isdone = 1; 3424 #endif 3425 ohci_free_sitd(sc, opipe->tail.itd); 3426 } 3427
Indexes created Wed Sep 24 02:09:48 GMT 2025