ohci.c revision 1.155
1 /* $NetBSD: ohci.c,v 1.155 2005/02/27 00:27:51 perry Exp $ */ 2 /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */ 3 4 /* 5 * Copyright (c) 1998 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Lennart Augustsson (lennart (at) augustsson.net) at 10 * Carlstedt Research & Technology. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. All advertising materials mentioning features or use of this software 21 * must display the following acknowledgement: 22 * This product includes software developed by the NetBSD 23 * Foundation, Inc. and its contributors. 24 * 4. Neither the name of The NetBSD Foundation nor the names of its 25 * contributors may be used to endorse or promote products derived 26 * from this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 29 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 30 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 31 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 32 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 33 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 34 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 35 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 36 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 37 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 * POSSIBILITY OF SUCH DAMAGE. 39 */ 40 41 /* 42 * USB Open Host Controller driver. 43 * 44 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html 45 * USB spec: http://www.usb.org/developers/docs/usbspec.zip 46 */ 47 48 #include <sys/cdefs.h> 49 __KERNEL_RCSID(0, "$NetBSD: ohci.c,v 1.155 2005/02/27 00:27:51 perry Exp $"); 50 51 #include <sys/param.h> 52 #include <sys/systm.h> 53 #include <sys/malloc.h> 54 #if defined(__NetBSD__) || defined(__OpenBSD__) 55 #include <sys/kernel.h> 56 #include <sys/device.h> 57 #include <sys/select.h> 58 #include <uvm/uvm_extern.h> 59 #elif defined(__FreeBSD__) 60 #include <sys/module.h> 61 #include <sys/bus.h> 62 #include <machine/bus_pio.h> 63 #include <machine/bus_memio.h> 64 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 65 #include <machine/cpu.h> 66 #endif 67 #endif 68 #include <sys/proc.h> 69 #include <sys/queue.h> 70 71 #include <machine/bus.h> 72 #include <machine/endian.h> 73 74 #include <dev/usb/usb.h> 75 #include <dev/usb/usbdi.h> 76 #include <dev/usb/usbdivar.h> 77 #include <dev/usb/usb_mem.h> 78 #include <dev/usb/usb_quirks.h> 79 80 #include <dev/usb/ohcireg.h> 81 #include <dev/usb/ohcivar.h> 82 83 #if defined(__FreeBSD__) 84 #include <machine/clock.h> 85 86 #define delay(d) DELAY(d) 87 #endif 88 89 #if defined(__OpenBSD__) 90 struct cfdriver ohci_cd = { 91 NULL, "ohci", DV_DULL 92 }; 93 #endif 94 95 #ifdef OHCI_DEBUG 96 #define DPRINTF(x) if (ohcidebug) logprintf x 97 #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x 98 int ohcidebug = 0; 99 #ifndef __NetBSD__ 100 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 101 #endif 102 #else 103 #define DPRINTF(x) 104 #define DPRINTFN(n,x) 105 #endif 106 107 /* 108 * The OHCI controller is little endian, so on big endian machines 109 * the data strored in memory needs to be swapped. 110 */ 111 #if defined(__FreeBSD__) || defined(__OpenBSD__) 112 #if BYTE_ORDER == BIG_ENDIAN 113 #define htole32(x) (bswap32(x)) 114 #define le32toh(x) (bswap32(x)) 115 #else 116 #define htole32(x) (x) 117 #define le32toh(x) (x) 118 #endif 119 #endif 120 121 struct ohci_pipe; 122 123 Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *); 124 Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *); 125 126 Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *); 127 Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *); 128 129 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *); 130 Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *); 131 132 #if 0 133 Static void ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *, 134 ohci_soft_td_t *); 135 #endif 136 Static usbd_status ohci_alloc_std_chain(struct ohci_pipe *, 137 ohci_softc_t *, int, int, usbd_xfer_handle, 138 ohci_soft_td_t *, ohci_soft_td_t **); 139 140 Static void ohci_shutdown(void *v); 141 Static void ohci_power(int, void *); 142 Static usbd_status ohci_open(usbd_pipe_handle); 143 Static void ohci_poll(struct usbd_bus *); 144 Static void ohci_softintr(void *); 145 Static void ohci_waitintr(ohci_softc_t *, usbd_xfer_handle); 146 Static void ohci_add_done(ohci_softc_t *, ohci_physaddr_t); 147 Static void ohci_rhsc(ohci_softc_t *, usbd_xfer_handle); 148 149 Static usbd_status ohci_device_request(usbd_xfer_handle xfer); 150 Static void ohci_add_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 151 Static void ohci_rem_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 152 Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *); 153 Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *); 154 Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t); 155 Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *); 156 Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *); 157 Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t); 158 159 Static usbd_status ohci_setup_isoc(usbd_pipe_handle pipe); 160 Static void ohci_device_isoc_enter(usbd_xfer_handle); 161 162 Static usbd_status ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 163 Static void ohci_freem(struct usbd_bus *, usb_dma_t *); 164 165 Static usbd_xfer_handle ohci_allocx(struct usbd_bus *); 166 Static void ohci_freex(struct usbd_bus *, usbd_xfer_handle); 167 168 Static usbd_status ohci_root_ctrl_transfer(usbd_xfer_handle); 169 Static usbd_status ohci_root_ctrl_start(usbd_xfer_handle); 170 Static void ohci_root_ctrl_abort(usbd_xfer_handle); 171 Static void ohci_root_ctrl_close(usbd_pipe_handle); 172 Static void ohci_root_ctrl_done(usbd_xfer_handle); 173 174 Static usbd_status ohci_root_intr_transfer(usbd_xfer_handle); 175 Static usbd_status ohci_root_intr_start(usbd_xfer_handle); 176 Static void ohci_root_intr_abort(usbd_xfer_handle); 177 Static void ohci_root_intr_close(usbd_pipe_handle); 178 Static void ohci_root_intr_done(usbd_xfer_handle); 179 180 Static usbd_status ohci_device_ctrl_transfer(usbd_xfer_handle); 181 Static usbd_status ohci_device_ctrl_start(usbd_xfer_handle); 182 Static void ohci_device_ctrl_abort(usbd_xfer_handle); 183 Static void ohci_device_ctrl_close(usbd_pipe_handle); 184 Static void ohci_device_ctrl_done(usbd_xfer_handle); 185 186 Static usbd_status ohci_device_bulk_transfer(usbd_xfer_handle); 187 Static usbd_status ohci_device_bulk_start(usbd_xfer_handle); 188 Static void ohci_device_bulk_abort(usbd_xfer_handle); 189 Static void ohci_device_bulk_close(usbd_pipe_handle); 190 Static void ohci_device_bulk_done(usbd_xfer_handle); 191 192 Static usbd_status ohci_device_intr_transfer(usbd_xfer_handle); 193 Static usbd_status ohci_device_intr_start(usbd_xfer_handle); 194 Static void ohci_device_intr_abort(usbd_xfer_handle); 195 Static void ohci_device_intr_close(usbd_pipe_handle); 196 Static void ohci_device_intr_done(usbd_xfer_handle); 197 198 Static usbd_status ohci_device_isoc_transfer(usbd_xfer_handle); 199 Static usbd_status ohci_device_isoc_start(usbd_xfer_handle); 200 Static void ohci_device_isoc_abort(usbd_xfer_handle); 201 Static void ohci_device_isoc_close(usbd_pipe_handle); 202 Static void ohci_device_isoc_done(usbd_xfer_handle); 203 204 Static usbd_status ohci_device_setintr(ohci_softc_t *sc, 205 struct ohci_pipe *pipe, int ival); 206 207 Static int ohci_str(usb_string_descriptor_t *, int, const char *); 208 209 Static void ohci_timeout(void *); 210 Static void ohci_timeout_task(void *); 211 Static void ohci_rhsc_able(ohci_softc_t *, int); 212 Static void ohci_rhsc_enable(void *); 213 214 Static void ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *); 215 Static void ohci_abort_xfer(usbd_xfer_handle, usbd_status); 216 217 Static void ohci_device_clear_toggle(usbd_pipe_handle pipe); 218 Static void ohci_noop(usbd_pipe_handle pipe); 219 220 #ifdef OHCI_DEBUG 221 Static void ohci_dumpregs(ohci_softc_t *); 222 Static void ohci_dump_tds(ohci_soft_td_t *); 223 Static void ohci_dump_td(ohci_soft_td_t *); 224 Static void ohci_dump_ed(ohci_soft_ed_t *); 225 Static void ohci_dump_itd(ohci_soft_itd_t *); 226 Static void ohci_dump_itds(ohci_soft_itd_t *); 227 #endif 228 229 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 230 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 231 #define OWRITE1(sc, r, x) \ 232 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 233 #define OWRITE2(sc, r, x) \ 234 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 235 #define OWRITE4(sc, r, x) \ 236 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 237 #define OREAD1(sc, r) (OBARR(sc), bus_space_read_1((sc)->iot, (sc)->ioh, (r))) 238 #define OREAD2(sc, r) (OBARR(sc), bus_space_read_2((sc)->iot, (sc)->ioh, (r))) 239 #define OREAD4(sc, r) (OBARR(sc), bus_space_read_4((sc)->iot, (sc)->ioh, (r))) 240 241 /* Reverse the bits in a value 0 .. 31 */ 242 Static u_int8_t revbits[OHCI_NO_INTRS] = 243 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 244 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 245 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 246 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 247 248 struct ohci_pipe { 249 struct usbd_pipe pipe; 250 ohci_soft_ed_t *sed; 251 union { 252 ohci_soft_td_t *td; 253 ohci_soft_itd_t *itd; 254 } tail; 255 /* Info needed for different pipe kinds. */ 256 union { 257 /* Control pipe */ 258 struct { 259 usb_dma_t reqdma; 260 u_int length; 261 ohci_soft_td_t *setup, *data, *stat; 262 } ctl; 263 /* Interrupt pipe */ 264 struct { 265 int nslots; 266 int pos; 267 } intr; 268 /* Bulk pipe */ 269 struct { 270 u_int length; 271 int isread; 272 } bulk; 273 /* Iso pipe */ 274 struct iso { 275 int next, inuse; 276 } iso; 277 } u; 278 }; 279 280 #define OHCI_INTR_ENDPT 1 281 282 Static struct usbd_bus_methods ohci_bus_methods = { 283 ohci_open, 284 ohci_softintr, 285 ohci_poll, 286 ohci_allocm, 287 ohci_freem, 288 ohci_allocx, 289 ohci_freex, 290 }; 291 292 Static struct usbd_pipe_methods ohci_root_ctrl_methods = { 293 ohci_root_ctrl_transfer, 294 ohci_root_ctrl_start, 295 ohci_root_ctrl_abort, 296 ohci_root_ctrl_close, 297 ohci_noop, 298 ohci_root_ctrl_done, 299 }; 300 301 Static struct usbd_pipe_methods ohci_root_intr_methods = { 302 ohci_root_intr_transfer, 303 ohci_root_intr_start, 304 ohci_root_intr_abort, 305 ohci_root_intr_close, 306 ohci_noop, 307 ohci_root_intr_done, 308 }; 309 310 Static struct usbd_pipe_methods ohci_device_ctrl_methods = { 311 ohci_device_ctrl_transfer, 312 ohci_device_ctrl_start, 313 ohci_device_ctrl_abort, 314 ohci_device_ctrl_close, 315 ohci_noop, 316 ohci_device_ctrl_done, 317 }; 318 319 Static struct usbd_pipe_methods ohci_device_intr_methods = { 320 ohci_device_intr_transfer, 321 ohci_device_intr_start, 322 ohci_device_intr_abort, 323 ohci_device_intr_close, 324 ohci_device_clear_toggle, 325 ohci_device_intr_done, 326 }; 327 328 Static struct usbd_pipe_methods ohci_device_bulk_methods = { 329 ohci_device_bulk_transfer, 330 ohci_device_bulk_start, 331 ohci_device_bulk_abort, 332 ohci_device_bulk_close, 333 ohci_device_clear_toggle, 334 ohci_device_bulk_done, 335 }; 336 337 Static struct usbd_pipe_methods ohci_device_isoc_methods = { 338 ohci_device_isoc_transfer, 339 ohci_device_isoc_start, 340 ohci_device_isoc_abort, 341 ohci_device_isoc_close, 342 ohci_noop, 343 ohci_device_isoc_done, 344 }; 345 346 #if defined(__NetBSD__) || defined(__OpenBSD__) 347 int 348 ohci_activate(device_ptr_t self, enum devact act) 349 { 350 struct ohci_softc *sc = (struct ohci_softc *)self; 351 int rv = 0; 352 353 switch (act) { 354 case DVACT_ACTIVATE: 355 return (EOPNOTSUPP); 356 357 case DVACT_DEACTIVATE: 358 if (sc->sc_child != NULL) 359 rv = config_deactivate(sc->sc_child); 360 sc->sc_dying = 1; 361 break; 362 } 363 return (rv); 364 } 365 366 int 367 ohci_detach(struct ohci_softc *sc, int flags) 368 { 369 int rv = 0; 370 371 if (sc->sc_child != NULL) 372 rv = config_detach(sc->sc_child, flags); 373 374 if (rv != 0) 375 return (rv); 376 377 usb_uncallout(sc->sc_tmo_rhsc, ohci_rhsc_enable, sc); 378 379 #if defined(__NetBSD__) || defined(__OpenBSD__) 380 powerhook_disestablish(sc->sc_powerhook); 381 shutdownhook_disestablish(sc->sc_shutdownhook); 382 #endif 383 384 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 385 386 /* free data structures XXX */ 387 388 return (rv); 389 } 390 #endif 391 392 ohci_soft_ed_t * 393 ohci_alloc_sed(ohci_softc_t *sc) 394 { 395 ohci_soft_ed_t *sed; 396 usbd_status err; 397 int i, offs; 398 usb_dma_t dma; 399 400 if (sc->sc_freeeds == NULL) { 401 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 402 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 403 OHCI_ED_ALIGN, &dma); 404 if (err) 405 return (0); 406 for(i = 0; i < OHCI_SED_CHUNK; i++) { 407 offs = i * OHCI_SED_SIZE; 408 sed = KERNADDR(&dma, offs); 409 sed->physaddr = DMAADDR(&dma, offs); 410 sed->next = sc->sc_freeeds; 411 sc->sc_freeeds = sed; 412 } 413 } 414 sed = sc->sc_freeeds; 415 sc->sc_freeeds = sed->next; 416 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 417 sed->next = 0; 418 return (sed); 419 } 420 421 void 422 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 423 { 424 sed->next = sc->sc_freeeds; 425 sc->sc_freeeds = sed; 426 } 427 428 ohci_soft_td_t * 429 ohci_alloc_std(ohci_softc_t *sc) 430 { 431 ohci_soft_td_t *std; 432 usbd_status err; 433 int i, offs; 434 usb_dma_t dma; 435 int s; 436 437 if (sc->sc_freetds == NULL) { 438 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 439 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 440 OHCI_TD_ALIGN, &dma); 441 if (err) 442 return (NULL); 443 s = splusb(); 444 for(i = 0; i < OHCI_STD_CHUNK; i++) { 445 offs = i * OHCI_STD_SIZE; 446 std = KERNADDR(&dma, offs); 447 std->physaddr = DMAADDR(&dma, offs); 448 std->nexttd = sc->sc_freetds; 449 sc->sc_freetds = std; 450 } 451 splx(s); 452 } 453 454 s = splusb(); 455 std = sc->sc_freetds; 456 sc->sc_freetds = std->nexttd; 457 memset(&std->td, 0, sizeof(ohci_td_t)); 458 std->nexttd = NULL; 459 std->xfer = NULL; 460 ohci_hash_add_td(sc, std); 461 splx(s); 462 463 return (std); 464 } 465 466 void 467 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std) 468 { 469 int s; 470 471 s = splusb(); 472 ohci_hash_rem_td(sc, std); 473 std->nexttd = sc->sc_freetds; 474 sc->sc_freetds = std; 475 splx(s); 476 } 477 478 usbd_status 479 ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc, 480 int alen, int rd, usbd_xfer_handle xfer, 481 ohci_soft_td_t *sp, ohci_soft_td_t **ep) 482 { 483 ohci_soft_td_t *next, *cur; 484 ohci_physaddr_t dataphys, dataphysend; 485 u_int32_t tdflags; 486 int len, curlen; 487 usb_dma_t *dma = &xfer->dmabuf; 488 u_int16_t flags = xfer->flags; 489 490 DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen)); 491 492 len = alen; 493 cur = sp; 494 dataphys = DMAADDR(dma, 0); 495 dataphysend = OHCI_PAGE(dataphys + len - 1); 496 tdflags = htole32( 497 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 498 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) | 499 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR); 500 501 for (;;) { 502 next = ohci_alloc_std(sc); 503 if (next == NULL) 504 goto nomem; 505 506 /* The OHCI hardware can handle at most one page crossing. */ 507 if (OHCI_PAGE(dataphys) == dataphysend || 508 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) { 509 /* we can handle it in this TD */ 510 curlen = len; 511 } else { 512 /* must use multiple TDs, fill as much as possible. */ 513 curlen = 2 * OHCI_PAGE_SIZE - 514 (dataphys & (OHCI_PAGE_SIZE-1)); 515 /* the length must be a multiple of the max size */ 516 curlen -= curlen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize); 517 #ifdef DIAGNOSTIC 518 if (curlen == 0) 519 panic("ohci_alloc_std: curlen == 0"); 520 #endif 521 } 522 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x " 523 "dataphysend=0x%08x len=%d curlen=%d\n", 524 dataphys, dataphysend, 525 len, curlen)); 526 len -= curlen; 527 528 cur->td.td_flags = tdflags; 529 cur->td.td_cbp = htole32(dataphys); 530 cur->nexttd = next; 531 cur->td.td_nexttd = htole32(next->physaddr); 532 cur->td.td_be = htole32(dataphys + curlen - 1); 533 cur->len = curlen; 534 cur->flags = OHCI_ADD_LEN; 535 cur->xfer = xfer; 536 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n", 537 dataphys, dataphys + curlen - 1)); 538 if (len == 0) 539 break; 540 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n")); 541 dataphys += curlen; 542 cur = next; 543 } 544 if ((flags & USBD_FORCE_SHORT_XFER) && 545 alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) { 546 /* Force a 0 length transfer at the end. */ 547 548 cur = next; 549 next = ohci_alloc_std(sc); 550 if (next == NULL) 551 goto nomem; 552 553 cur->td.td_flags = tdflags; 554 cur->td.td_cbp = 0; /* indicate 0 length packet */ 555 cur->nexttd = next; 556 cur->td.td_nexttd = htole32(next->physaddr); 557 cur->td.td_be = ~0; 558 cur->len = 0; 559 cur->flags = 0; 560 cur->xfer = xfer; 561 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n")); 562 } 563 *ep = cur; 564 565 return (USBD_NORMAL_COMPLETION); 566 567 nomem: 568 /* XXX free chain */ 569 return (USBD_NOMEM); 570 } 571 572 #if 0 573 Static void 574 ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std, 575 ohci_soft_td_t *stdend) 576 { 577 ohci_soft_td_t *p; 578 579 for (; std != stdend; std = p) { 580 p = std->nexttd; 581 ohci_free_std(sc, std); 582 } 583 } 584 #endif 585 586 ohci_soft_itd_t * 587 ohci_alloc_sitd(ohci_softc_t *sc) 588 { 589 ohci_soft_itd_t *sitd; 590 usbd_status err; 591 int i, s, offs; 592 usb_dma_t dma; 593 594 if (sc->sc_freeitds == NULL) { 595 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n")); 596 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK, 597 OHCI_ITD_ALIGN, &dma); 598 if (err) 599 return (NULL); 600 s = splusb(); 601 for(i = 0; i < OHCI_SITD_CHUNK; i++) { 602 offs = i * OHCI_SITD_SIZE; 603 sitd = KERNADDR(&dma, offs); 604 sitd->physaddr = DMAADDR(&dma, offs); 605 sitd->nextitd = sc->sc_freeitds; 606 sc->sc_freeitds = sitd; 607 } 608 splx(s); 609 } 610 611 s = splusb(); 612 sitd = sc->sc_freeitds; 613 sc->sc_freeitds = sitd->nextitd; 614 memset(&sitd->itd, 0, sizeof(ohci_itd_t)); 615 sitd->nextitd = NULL; 616 sitd->xfer = NULL; 617 ohci_hash_add_itd(sc, sitd); 618 splx(s); 619 620 #ifdef DIAGNOSTIC 621 sitd->isdone = 0; 622 #endif 623 624 return (sitd); 625 } 626 627 void 628 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 629 { 630 int s; 631 632 DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd)); 633 634 #ifdef DIAGNOSTIC 635 if (!sitd->isdone) { 636 panic("ohci_free_sitd: sitd=%p not done", sitd); 637 return; 638 } 639 /* Warn double free */ 640 sitd->isdone = 0; 641 #endif 642 643 s = splusb(); 644 ohci_hash_rem_itd(sc, sitd); 645 sitd->nextitd = sc->sc_freeitds; 646 sc->sc_freeitds = sitd; 647 splx(s); 648 } 649 650 usbd_status 651 ohci_init(ohci_softc_t *sc) 652 { 653 ohci_soft_ed_t *sed, *psed; 654 usbd_status err; 655 int i; 656 u_int32_t s, ctl, ival, hcr, fm, per, rev, desca; 657 658 DPRINTF(("ohci_init: start\n")); 659 #if defined(__OpenBSD__) 660 printf(","); 661 #else 662 printf("%s:", USBDEVNAME(sc->sc_bus.bdev)); 663 #endif 664 rev = OREAD4(sc, OHCI_REVISION); 665 printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev), 666 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 667 668 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 669 printf("%s: unsupported OHCI revision\n", 670 USBDEVNAME(sc->sc_bus.bdev)); 671 sc->sc_bus.usbrev = USBREV_UNKNOWN; 672 return (USBD_INVAL); 673 } 674 sc->sc_bus.usbrev = USBREV_1_0; 675 676 for (i = 0; i < OHCI_HASH_SIZE; i++) 677 LIST_INIT(&sc->sc_hash_tds[i]); 678 for (i = 0; i < OHCI_HASH_SIZE; i++) 679 LIST_INIT(&sc->sc_hash_itds[i]); 680 681 SIMPLEQ_INIT(&sc->sc_free_xfers); 682 683 #ifdef __NetBSD__ 684 usb_setup_reserve(sc, &sc->sc_dma_reserve, sc->sc_bus.dmatag, 685 USB_MEM_RESERVE); 686 #endif 687 688 /* XXX determine alignment by R/W */ 689 /* Allocate the HCCA area. */ 690 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 691 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 692 if (err) 693 return (err); 694 sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0); 695 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 696 697 sc->sc_eintrs = OHCI_NORMAL_INTRS; 698 699 /* Allocate dummy ED that starts the control list. */ 700 sc->sc_ctrl_head = ohci_alloc_sed(sc); 701 if (sc->sc_ctrl_head == NULL) { 702 err = USBD_NOMEM; 703 goto bad1; 704 } 705 sc->sc_ctrl_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 706 707 /* Allocate dummy ED that starts the bulk list. */ 708 sc->sc_bulk_head = ohci_alloc_sed(sc); 709 if (sc->sc_bulk_head == NULL) { 710 err = USBD_NOMEM; 711 goto bad2; 712 } 713 sc->sc_bulk_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 714 715 /* Allocate dummy ED that starts the isochronous list. */ 716 sc->sc_isoc_head = ohci_alloc_sed(sc); 717 if (sc->sc_isoc_head == NULL) { 718 err = USBD_NOMEM; 719 goto bad3; 720 } 721 sc->sc_isoc_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 722 723 /* Allocate all the dummy EDs that make up the interrupt tree. */ 724 for (i = 0; i < OHCI_NO_EDS; i++) { 725 sed = ohci_alloc_sed(sc); 726 if (sed == NULL) { 727 while (--i >= 0) 728 ohci_free_sed(sc, sc->sc_eds[i]); 729 err = USBD_NOMEM; 730 goto bad4; 731 } 732 /* All ED fields are set to 0. */ 733 sc->sc_eds[i] = sed; 734 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 735 if (i != 0) 736 psed = sc->sc_eds[(i-1) / 2]; 737 else 738 psed= sc->sc_isoc_head; 739 sed->next = psed; 740 sed->ed.ed_nexted = htole32(psed->physaddr); 741 } 742 /* 743 * Fill HCCA interrupt table. The bit reversal is to get 744 * the tree set up properly to spread the interrupts. 745 */ 746 for (i = 0; i < OHCI_NO_INTRS; i++) 747 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 748 htole32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 749 750 #ifdef OHCI_DEBUG 751 if (ohcidebug > 15) { 752 for (i = 0; i < OHCI_NO_EDS; i++) { 753 printf("ed#%d ", i); 754 ohci_dump_ed(sc->sc_eds[i]); 755 } 756 printf("iso "); 757 ohci_dump_ed(sc->sc_isoc_head); 758 } 759 #endif 760 761 /* Determine in what context we are running. */ 762 ctl = OREAD4(sc, OHCI_CONTROL); 763 if (ctl & OHCI_IR) { 764 /* SMM active, request change */ 765 DPRINTF(("ohci_init: SMM active, request owner change\n")); 766 s = OREAD4(sc, OHCI_COMMAND_STATUS); 767 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 768 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 769 usb_delay_ms(&sc->sc_bus, 1); 770 ctl = OREAD4(sc, OHCI_CONTROL); 771 } 772 if ((ctl & OHCI_IR) == 0) { 773 printf("%s: SMM does not respond, resetting\n", 774 USBDEVNAME(sc->sc_bus.bdev)); 775 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 776 goto reset; 777 } 778 #if 0 779 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */ 780 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 781 /* BIOS started controller. */ 782 DPRINTF(("ohci_init: BIOS active\n")); 783 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 784 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL); 785 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 786 } 787 #endif 788 } else { 789 DPRINTF(("ohci_init: cold started\n")); 790 reset: 791 /* Controller was cold started. */ 792 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 793 } 794 795 /* 796 * This reset should not be necessary according to the OHCI spec, but 797 * without it some controllers do not start. 798 */ 799 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 800 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 801 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 802 803 /* We now own the host controller and the bus has been reset. */ 804 ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL)); 805 806 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 807 /* Nominal time for a reset is 10 us. */ 808 for (i = 0; i < 10; i++) { 809 delay(10); 810 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 811 if (!hcr) 812 break; 813 } 814 if (hcr) { 815 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 816 err = USBD_IOERROR; 817 goto bad5; 818 } 819 #ifdef OHCI_DEBUG 820 if (ohcidebug > 15) 821 ohci_dumpregs(sc); 822 #endif 823 824 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 825 826 /* Set up HC registers. */ 827 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 828 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 829 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 830 /* disable all interrupts and then switch on all desired interrupts */ 831 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 832 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 833 /* switch on desired functional features */ 834 ctl = OREAD4(sc, OHCI_CONTROL); 835 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 836 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 837 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL; 838 /* And finally start it! */ 839 OWRITE4(sc, OHCI_CONTROL, ctl); 840 841 /* 842 * The controller is now OPERATIONAL. Set a some final 843 * registers that should be set earlier, but that the 844 * controller ignores when in the SUSPEND state. 845 */ 846 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 847 fm |= OHCI_FSMPS(ival) | ival; 848 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 849 per = OHCI_PERIODIC(ival); /* 90% periodic */ 850 OWRITE4(sc, OHCI_PERIODIC_START, per); 851 852 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */ 853 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 854 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP); 855 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 856 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY); 857 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca); 858 859 /* 860 * The AMD756 requires a delay before re-reading the register, 861 * otherwise it will occasionally report 0 ports. 862 */ 863 sc->sc_noport = 0; 864 for (i = 0; i < 10 && sc->sc_noport == 0; i++) { 865 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY); 866 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 867 } 868 869 #ifdef OHCI_DEBUG 870 if (ohcidebug > 5) 871 ohci_dumpregs(sc); 872 #endif 873 874 /* Set up the bus struct. */ 875 sc->sc_bus.methods = &ohci_bus_methods; 876 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 877 878 #if defined(__NetBSD__) || defined(__OpenBSD__) 879 sc->sc_control = sc->sc_intre = 0; 880 sc->sc_powerhook = powerhook_establish(ohci_power, sc); 881 sc->sc_shutdownhook = shutdownhook_establish(ohci_shutdown, sc); 882 #endif 883 884 usb_callout_init(sc->sc_tmo_rhsc); 885 886 return (USBD_NORMAL_COMPLETION); 887 888 bad5: 889 for (i = 0; i < OHCI_NO_EDS; i++) 890 ohci_free_sed(sc, sc->sc_eds[i]); 891 bad4: 892 ohci_free_sed(sc, sc->sc_isoc_head); 893 bad3: 894 ohci_free_sed(sc, sc->sc_bulk_head); 895 bad2: 896 ohci_free_sed(sc, sc->sc_ctrl_head); 897 bad1: 898 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 899 return (err); 900 } 901 902 usbd_status 903 ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 904 { 905 #if defined(__NetBSD__) || defined(__OpenBSD__) 906 struct ohci_softc *sc = (struct ohci_softc *)bus; 907 #endif 908 usbd_status status; 909 910 status = usb_allocmem(&sc->sc_bus, size, 0, dma); 911 #ifdef __NetBSD__ 912 if (status == USBD_NOMEM) 913 status = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size); 914 #endif 915 return status; 916 } 917 918 void 919 ohci_freem(struct usbd_bus *bus, usb_dma_t *dma) 920 { 921 #if defined(__NetBSD__) || defined(__OpenBSD__) 922 struct ohci_softc *sc = (struct ohci_softc *)bus; 923 #endif 924 #ifdef __NetBSD__ 925 if (dma->block->flags & USB_DMA_RESERVE) { 926 usb_reserve_freem(&((struct ohci_softc *)bus)->sc_dma_reserve, 927 dma); 928 return; 929 } 930 #endif 931 usb_freemem(&sc->sc_bus, dma); 932 } 933 934 usbd_xfer_handle 935 ohci_allocx(struct usbd_bus *bus) 936 { 937 struct ohci_softc *sc = (struct ohci_softc *)bus; 938 usbd_xfer_handle xfer; 939 940 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 941 if (xfer != NULL) { 942 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 943 #ifdef DIAGNOSTIC 944 if (xfer->busy_free != XFER_FREE) { 945 printf("ohci_allocx: xfer=%p not free, 0x%08x\n", xfer, 946 xfer->busy_free); 947 } 948 #endif 949 } else { 950 xfer = malloc(sizeof(struct ohci_xfer), M_USB, M_NOWAIT); 951 } 952 if (xfer != NULL) { 953 memset(xfer, 0, sizeof (struct ohci_xfer)); 954 #ifdef DIAGNOSTIC 955 xfer->busy_free = XFER_BUSY; 956 #endif 957 } 958 return (xfer); 959 } 960 961 void 962 ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 963 { 964 struct ohci_softc *sc = (struct ohci_softc *)bus; 965 966 #ifdef DIAGNOSTIC 967 if (xfer->busy_free != XFER_BUSY) { 968 printf("ohci_freex: xfer=%p not busy, 0x%08x\n", xfer, 969 xfer->busy_free); 970 return; 971 } 972 xfer->busy_free = XFER_FREE; 973 #endif 974 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 975 } 976 977 /* 978 * Shut down the controller when the system is going down. 979 */ 980 void 981 ohci_shutdown(void *v) 982 { 983 ohci_softc_t *sc = v; 984 985 DPRINTF(("ohci_shutdown: stopping the HC\n")); 986 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 987 } 988 989 /* 990 * Handle suspend/resume. 991 * 992 * We need to switch to polling mode here, because this routine is 993 * called from an intterupt context. This is all right since we 994 * are almost suspended anyway. 995 */ 996 void 997 ohci_power(int why, void *v) 998 { 999 ohci_softc_t *sc = v; 1000 u_int32_t ctl; 1001 int s; 1002 1003 #ifdef OHCI_DEBUG 1004 DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why)); 1005 ohci_dumpregs(sc); 1006 #endif 1007 1008 s = splhardusb(); 1009 switch (why) { 1010 case PWR_SUSPEND: 1011 case PWR_STANDBY: 1012 sc->sc_bus.use_polling++; 1013 ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK; 1014 if (sc->sc_control == 0) { 1015 /* 1016 * Preserve register values, in case that APM BIOS 1017 * does not recover them. 1018 */ 1019 sc->sc_control = ctl; 1020 sc->sc_intre = OREAD4(sc, OHCI_INTERRUPT_ENABLE); 1021 } 1022 ctl |= OHCI_HCFS_SUSPEND; 1023 OWRITE4(sc, OHCI_CONTROL, ctl); 1024 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1025 sc->sc_bus.use_polling--; 1026 break; 1027 case PWR_RESUME: 1028 sc->sc_bus.use_polling++; 1029 /* Some broken BIOSes do not recover these values */ 1030 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 1031 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 1032 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 1033 if (sc->sc_intre) 1034 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, 1035 sc->sc_intre & (OHCI_ALL_INTRS | OHCI_MIE)); 1036 if (sc->sc_control) 1037 ctl = sc->sc_control; 1038 else 1039 ctl = OREAD4(sc, OHCI_CONTROL); 1040 ctl |= OHCI_HCFS_RESUME; 1041 OWRITE4(sc, OHCI_CONTROL, ctl); 1042 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 1043 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL; 1044 OWRITE4(sc, OHCI_CONTROL, ctl); 1045 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 1046 sc->sc_control = sc->sc_intre = 0; 1047 sc->sc_bus.use_polling--; 1048 break; 1049 case PWR_SOFTSUSPEND: 1050 case PWR_SOFTSTANDBY: 1051 case PWR_SOFTRESUME: 1052 break; 1053 } 1054 splx(s); 1055 } 1056 1057 #ifdef OHCI_DEBUG 1058 void 1059 ohci_dumpregs(ohci_softc_t *sc) 1060 { 1061 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 1062 OREAD4(sc, OHCI_REVISION), 1063 OREAD4(sc, OHCI_CONTROL), 1064 OREAD4(sc, OHCI_COMMAND_STATUS))); 1065 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 1066 OREAD4(sc, OHCI_INTERRUPT_STATUS), 1067 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 1068 OREAD4(sc, OHCI_INTERRUPT_DISABLE))); 1069 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 1070 OREAD4(sc, OHCI_HCCA), 1071 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 1072 OREAD4(sc, OHCI_CONTROL_HEAD_ED))); 1073 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 1074 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 1075 OREAD4(sc, OHCI_BULK_HEAD_ED), 1076 OREAD4(sc, OHCI_BULK_CURRENT_ED))); 1077 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 1078 OREAD4(sc, OHCI_DONE_HEAD), 1079 OREAD4(sc, OHCI_FM_INTERVAL), 1080 OREAD4(sc, OHCI_FM_REMAINING))); 1081 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 1082 OREAD4(sc, OHCI_FM_NUMBER), 1083 OREAD4(sc, OHCI_PERIODIC_START), 1084 OREAD4(sc, OHCI_LS_THRESHOLD))); 1085 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n", 1086 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 1087 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 1088 OREAD4(sc, OHCI_RH_STATUS))); 1089 DPRINTF((" port1=0x%08x port2=0x%08x\n", 1090 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 1091 OREAD4(sc, OHCI_RH_PORT_STATUS(2)))); 1092 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n", 1093 le32toh(sc->sc_hcca->hcca_frame_number), 1094 le32toh(sc->sc_hcca->hcca_done_head))); 1095 } 1096 #endif 1097 1098 Static int ohci_intr1(ohci_softc_t *); 1099 1100 int 1101 ohci_intr(void *p) 1102 { 1103 ohci_softc_t *sc = p; 1104 1105 if (sc == NULL || sc->sc_dying) 1106 return (0); 1107 1108 /* If we get an interrupt while polling, then just ignore it. */ 1109 if (sc->sc_bus.use_polling) { 1110 #ifdef DIAGNOSTIC 1111 DPRINTFN(16, ("ohci_intr: ignored interrupt while polling\n")); 1112 #endif 1113 /* for level triggered intrs, should do something to ack */ 1114 OWRITE4(sc, OHCI_INTERRUPT_STATUS, 1115 OREAD4(sc, OHCI_INTERRUPT_STATUS)); 1116 1117 return (0); 1118 } 1119 1120 return (ohci_intr1(sc)); 1121 } 1122 1123 Static int 1124 ohci_intr1(ohci_softc_t *sc) 1125 { 1126 u_int32_t intrs, eintrs; 1127 ohci_physaddr_t done; 1128 1129 DPRINTFN(14,("ohci_intr1: enter\n")); 1130 1131 /* In case the interrupt occurs before initialization has completed. */ 1132 if (sc == NULL || sc->sc_hcca == NULL) { 1133 #ifdef DIAGNOSTIC 1134 printf("ohci_intr: sc->sc_hcca == NULL\n"); 1135 #endif 1136 return (0); 1137 } 1138 1139 intrs = 0; 1140 done = le32toh(sc->sc_hcca->hcca_done_head); 1141 if (done != 0) { 1142 if (done & ~OHCI_DONE_INTRS) 1143 intrs = OHCI_WDH; 1144 if (done & OHCI_DONE_INTRS) 1145 intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS); 1146 sc->sc_hcca->hcca_done_head = 0; 1147 } else 1148 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & ~OHCI_WDH; 1149 1150 if (!intrs) 1151 return (0); 1152 1153 intrs &= ~OHCI_MIE; 1154 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */ 1155 eintrs = intrs & sc->sc_eintrs; 1156 if (!eintrs) 1157 return (0); 1158 1159 sc->sc_bus.intr_context++; 1160 sc->sc_bus.no_intrs++; 1161 DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 1162 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 1163 (u_int)eintrs)); 1164 1165 if (eintrs & OHCI_SO) { 1166 sc->sc_overrun_cnt++; 1167 if (usbd_ratecheck(&sc->sc_overrun_ntc)) { 1168 printf("%s: %u scheduling overruns\n", 1169 USBDEVNAME(sc->sc_bus.bdev), sc->sc_overrun_cnt); 1170 sc->sc_overrun_cnt = 0; 1171 } 1172 /* XXX do what */ 1173 eintrs &= ~OHCI_SO; 1174 } 1175 if (eintrs & OHCI_WDH) { 1176 ohci_add_done(sc, done &~ OHCI_DONE_INTRS); 1177 usb_schedsoftintr(&sc->sc_bus); 1178 eintrs &= ~OHCI_WDH; 1179 } 1180 if (eintrs & OHCI_RD) { 1181 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev)); 1182 /* XXX process resume detect */ 1183 } 1184 if (eintrs & OHCI_UE) { 1185 printf("%s: unrecoverable error, controller halted\n", 1186 USBDEVNAME(sc->sc_bus.bdev)); 1187 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1188 /* XXX what else */ 1189 } 1190 if (eintrs & OHCI_RHSC) { 1191 ohci_rhsc(sc, sc->sc_intrxfer); 1192 /* 1193 * Disable RHSC interrupt for now, because it will be 1194 * on until the port has been reset. 1195 */ 1196 ohci_rhsc_able(sc, 0); 1197 /* Do not allow RHSC interrupts > 1 per second */ 1198 usb_callout(sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc); 1199 eintrs &= ~OHCI_RHSC; 1200 } 1201 1202 sc->sc_bus.intr_context--; 1203 1204 if (eintrs != 0) { 1205 /* Block unprocessed interrupts. XXX */ 1206 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs); 1207 sc->sc_eintrs &= ~eintrs; 1208 printf("%s: blocking intrs 0x%x\n", 1209 USBDEVNAME(sc->sc_bus.bdev), eintrs); 1210 } 1211 1212 return (1); 1213 } 1214 1215 void 1216 ohci_rhsc_able(ohci_softc_t *sc, int on) 1217 { 1218 DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on)); 1219 if (on) { 1220 sc->sc_eintrs |= OHCI_RHSC; 1221 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1222 } else { 1223 sc->sc_eintrs &= ~OHCI_RHSC; 1224 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC); 1225 } 1226 } 1227 1228 void 1229 ohci_rhsc_enable(void *v_sc) 1230 { 1231 ohci_softc_t *sc = v_sc; 1232 int s; 1233 1234 s = splhardusb(); 1235 ohci_rhsc_able(sc, 1); 1236 splx(s); 1237 } 1238 1239 #ifdef OHCI_DEBUG 1240 char *ohci_cc_strs[] = { 1241 "NO_ERROR", 1242 "CRC", 1243 "BIT_STUFFING", 1244 "DATA_TOGGLE_MISMATCH", 1245 "STALL", 1246 "DEVICE_NOT_RESPONDING", 1247 "PID_CHECK_FAILURE", 1248 "UNEXPECTED_PID", 1249 "DATA_OVERRUN", 1250 "DATA_UNDERRUN", 1251 "BUFFER_OVERRUN", 1252 "BUFFER_UNDERRUN", 1253 "reserved", 1254 "reserved", 1255 "NOT_ACCESSED", 1256 "NOT_ACCESSED", 1257 }; 1258 #endif 1259 1260 void 1261 ohci_add_done(ohci_softc_t *sc, ohci_physaddr_t done) 1262 { 1263 ohci_soft_itd_t *sitd, *sidone, **ip; 1264 ohci_soft_td_t *std, *sdone, **p; 1265 1266 /* Reverse the done list. */ 1267 for (sdone = NULL, sidone = NULL; done != 0; ) { 1268 std = ohci_hash_find_td(sc, done); 1269 if (std != NULL) { 1270 std->dnext = sdone; 1271 done = le32toh(std->td.td_nexttd); 1272 sdone = std; 1273 DPRINTFN(10,("add TD %p\n", std)); 1274 continue; 1275 } 1276 sitd = ohci_hash_find_itd(sc, done); 1277 if (sitd != NULL) { 1278 sitd->dnext = sidone; 1279 done = le32toh(sitd->itd.itd_nextitd); 1280 sidone = sitd; 1281 DPRINTFN(5,("add ITD %p\n", sitd)); 1282 continue; 1283 } 1284 panic("ohci_add_done: addr 0x%08lx not found", (u_long)done); 1285 } 1286 1287 /* sdone & sidone now hold the done lists. */ 1288 /* Put them on the already processed lists. */ 1289 for (p = &sc->sc_sdone; *p != NULL; p = &(*p)->dnext) 1290 ; 1291 *p = sdone; 1292 for (ip = &sc->sc_sidone; *ip != NULL; ip = &(*ip)->dnext) 1293 ; 1294 *ip = sidone; 1295 } 1296 1297 void 1298 ohci_softintr(void *v) 1299 { 1300 ohci_softc_t *sc = v; 1301 ohci_soft_itd_t *sitd, *sidone, *sitdnext; 1302 ohci_soft_td_t *std, *sdone, *stdnext; 1303 usbd_xfer_handle xfer; 1304 struct ohci_pipe *opipe; 1305 int len, cc, s; 1306 int i, j, actlen, iframes, uedir; 1307 1308 DPRINTFN(10,("ohci_softintr: enter\n")); 1309 1310 sc->sc_bus.intr_context++; 1311 1312 s = splhardusb(); 1313 sdone = sc->sc_sdone; 1314 sc->sc_sdone = NULL; 1315 sidone = sc->sc_sidone; 1316 sc->sc_sidone = NULL; 1317 splx(s); 1318 1319 DPRINTFN(10,("ohci_softintr: sdone=%p sidone=%p\n", sdone, sidone)); 1320 1321 #ifdef OHCI_DEBUG 1322 if (ohcidebug > 10) { 1323 DPRINTF(("ohci_process_done: TD done:\n")); 1324 ohci_dump_tds(sdone); 1325 } 1326 #endif 1327 1328 for (std = sdone; std; std = stdnext) { 1329 xfer = std->xfer; 1330 stdnext = std->dnext; 1331 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n", 1332 std, xfer, xfer ? xfer->hcpriv : 0)); 1333 if (xfer == NULL) { 1334 /* 1335 * xfer == NULL: There seems to be no xfer associated 1336 * with this TD. It is tailp that happened to end up on 1337 * the done queue. 1338 * Shouldn't happen, but some chips are broken(?). 1339 */ 1340 continue; 1341 } 1342 if (xfer->status == USBD_CANCELLED || 1343 xfer->status == USBD_TIMEOUT) { 1344 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1345 xfer)); 1346 /* Handled by abort routine. */ 1347 continue; 1348 } 1349 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 1350 1351 len = std->len; 1352 if (std->td.td_cbp != 0) 1353 len -= le32toh(std->td.td_be) - 1354 le32toh(std->td.td_cbp) + 1; 1355 DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", len, 1356 std->flags)); 1357 if (std->flags & OHCI_ADD_LEN) 1358 xfer->actlen += len; 1359 1360 cc = OHCI_TD_GET_CC(le32toh(std->td.td_flags)); 1361 if (cc == OHCI_CC_NO_ERROR) { 1362 if (std->flags & OHCI_CALL_DONE) { 1363 xfer->status = USBD_NORMAL_COMPLETION; 1364 s = splusb(); 1365 usb_transfer_complete(xfer); 1366 splx(s); 1367 } 1368 ohci_free_std(sc, std); 1369 } else { 1370 /* 1371 * Endpoint is halted. First unlink all the TDs 1372 * belonging to the failed transfer, and then restart 1373 * the endpoint. 1374 */ 1375 ohci_soft_td_t *p, *n; 1376 opipe = (struct ohci_pipe *)xfer->pipe; 1377 1378 DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n", 1379 OHCI_TD_GET_CC(le32toh(std->td.td_flags)), 1380 ohci_cc_strs[OHCI_TD_GET_CC(le32toh(std->td.td_flags))])); 1381 1382 /* remove TDs */ 1383 for (p = std; p->xfer == xfer; p = n) { 1384 n = p->nexttd; 1385 ohci_free_std(sc, p); 1386 } 1387 1388 /* clear halt */ 1389 opipe->sed->ed.ed_headp = htole32(p->physaddr); 1390 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1391 1392 if (cc == OHCI_CC_STALL) 1393 xfer->status = USBD_STALLED; 1394 else 1395 xfer->status = USBD_IOERROR; 1396 s = splusb(); 1397 usb_transfer_complete(xfer); 1398 splx(s); 1399 } 1400 } 1401 1402 #ifdef OHCI_DEBUG 1403 if (ohcidebug > 10) { 1404 DPRINTF(("ohci_softintr: ITD done:\n")); 1405 ohci_dump_itds(sidone); 1406 } 1407 #endif 1408 1409 for (sitd = sidone; sitd != NULL; sitd = sitdnext) { 1410 xfer = sitd->xfer; 1411 sitdnext = sitd->dnext; 1412 DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n", 1413 sitd, xfer, xfer ? xfer->hcpriv : 0)); 1414 if (xfer == NULL) 1415 continue; 1416 if (xfer->status == USBD_CANCELLED || 1417 xfer->status == USBD_TIMEOUT) { 1418 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1419 xfer)); 1420 /* Handled by abort routine. */ 1421 continue; 1422 } 1423 #ifdef DIAGNOSTIC 1424 if (sitd->isdone) 1425 printf("ohci_softintr: sitd=%p is done\n", sitd); 1426 sitd->isdone = 1; 1427 #endif 1428 if (sitd->flags & OHCI_CALL_DONE) { 1429 ohci_soft_itd_t *next; 1430 1431 opipe = (struct ohci_pipe *)xfer->pipe; 1432 opipe->u.iso.inuse -= xfer->nframes; 1433 uedir = UE_GET_DIR(xfer->pipe->endpoint->edesc-> 1434 bEndpointAddress); 1435 xfer->status = USBD_NORMAL_COMPLETION; 1436 actlen = 0; 1437 for (i = 0, sitd = xfer->hcpriv;; 1438 sitd = next) { 1439 next = sitd->nextitd; 1440 if (OHCI_ITD_GET_CC(le32toh(sitd-> 1441 itd.itd_flags)) != OHCI_CC_NO_ERROR) 1442 xfer->status = USBD_IOERROR; 1443 /* For input, update frlengths with actual */ 1444 /* XXX anything necessary for output? */ 1445 if (uedir == UE_DIR_IN && 1446 xfer->status == USBD_NORMAL_COMPLETION) { 1447 iframes = OHCI_ITD_GET_FC(le32toh( 1448 sitd->itd.itd_flags)); 1449 for (j = 0; j < iframes; i++, j++) { 1450 len = le16toh(sitd-> 1451 itd.itd_offset[j]); 1452 len = 1453 (OHCI_ITD_PSW_GET_CC(len) == 1454 OHCI_CC_NOT_ACCESSED) ? 0 : 1455 OHCI_ITD_PSW_LENGTH(len); 1456 xfer->frlengths[i] = len; 1457 actlen += len; 1458 } 1459 } 1460 if (sitd->flags & OHCI_CALL_DONE) 1461 break; 1462 ohci_free_sitd(sc, sitd); 1463 } 1464 ohci_free_sitd(sc, sitd); 1465 if (uedir == UE_DIR_IN && 1466 xfer->status == USBD_NORMAL_COMPLETION) 1467 xfer->actlen = actlen; 1468 xfer->hcpriv = NULL; 1469 1470 s = splusb(); 1471 usb_transfer_complete(xfer); 1472 splx(s); 1473 } 1474 } 1475 1476 #ifdef USB_USE_SOFTINTR 1477 if (sc->sc_softwake) { 1478 sc->sc_softwake = 0; 1479 wakeup(&sc->sc_softwake); 1480 } 1481 #endif /* USB_USE_SOFTINTR */ 1482 1483 sc->sc_bus.intr_context--; 1484 DPRINTFN(10,("ohci_softintr: done:\n")); 1485 } 1486 1487 void 1488 ohci_device_ctrl_done(usbd_xfer_handle xfer) 1489 { 1490 DPRINTFN(10,("ohci_device_ctrl_done: xfer=%p\n", xfer)); 1491 1492 #ifdef DIAGNOSTIC 1493 if (!(xfer->rqflags & URQ_REQUEST)) { 1494 panic("ohci_device_ctrl_done: not a request"); 1495 } 1496 #endif 1497 } 1498 1499 void 1500 ohci_device_intr_done(usbd_xfer_handle xfer) 1501 { 1502 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1503 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1504 ohci_soft_ed_t *sed = opipe->sed; 1505 ohci_soft_td_t *data, *tail; 1506 1507 1508 DPRINTFN(10,("ohci_device_intr_done: xfer=%p, actlen=%d\n", 1509 xfer, xfer->actlen)); 1510 1511 if (xfer->pipe->repeat) { 1512 data = opipe->tail.td; 1513 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 1514 if (tail == NULL) { 1515 xfer->status = USBD_NOMEM; 1516 return; 1517 } 1518 tail->xfer = NULL; 1519 1520 data->td.td_flags = htole32( 1521 OHCI_TD_IN | OHCI_TD_NOCC | 1522 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 1523 if (xfer->flags & USBD_SHORT_XFER_OK) 1524 data->td.td_flags |= htole32(OHCI_TD_R); 1525 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf, 0)); 1526 data->nexttd = tail; 1527 data->td.td_nexttd = htole32(tail->physaddr); 1528 data->td.td_be = htole32(le32toh(data->td.td_cbp) + 1529 xfer->length - 1); 1530 data->len = xfer->length; 1531 data->xfer = xfer; 1532 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1533 xfer->hcpriv = data; 1534 xfer->actlen = 0; 1535 1536 sed->ed.ed_tailp = htole32(tail->physaddr); 1537 opipe->tail.td = tail; 1538 } 1539 } 1540 1541 void 1542 ohci_device_bulk_done(usbd_xfer_handle xfer) 1543 { 1544 DPRINTFN(10,("ohci_device_bulk_done: xfer=%p, actlen=%d\n", 1545 xfer, xfer->actlen)); 1546 } 1547 1548 void 1549 ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer) 1550 { 1551 usbd_pipe_handle pipe; 1552 u_char *p; 1553 int i, m; 1554 int hstatus; 1555 1556 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1557 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n", 1558 sc, xfer, hstatus)); 1559 1560 if (xfer == NULL) { 1561 /* Just ignore the change. */ 1562 return; 1563 } 1564 1565 pipe = xfer->pipe; 1566 1567 p = KERNADDR(&xfer->dmabuf, 0); 1568 m = min(sc->sc_noport, xfer->length * 8 - 1); 1569 memset(p, 0, xfer->length); 1570 for (i = 1; i <= m; i++) { 1571 /* Pick out CHANGE bits from the status reg. */ 1572 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1573 p[i/8] |= 1 << (i%8); 1574 } 1575 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 1576 xfer->actlen = xfer->length; 1577 xfer->status = USBD_NORMAL_COMPLETION; 1578 1579 usb_transfer_complete(xfer); 1580 } 1581 1582 void 1583 ohci_root_intr_done(usbd_xfer_handle xfer) 1584 { 1585 } 1586 1587 void 1588 ohci_root_ctrl_done(usbd_xfer_handle xfer) 1589 { 1590 } 1591 1592 /* 1593 * Wait here until controller claims to have an interrupt. 1594 * Then call ohci_intr and return. Use timeout to avoid waiting 1595 * too long. 1596 */ 1597 void 1598 ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer) 1599 { 1600 int timo = xfer->timeout; 1601 int usecs; 1602 u_int32_t intrs; 1603 1604 xfer->status = USBD_IN_PROGRESS; 1605 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 1606 usb_delay_ms(&sc->sc_bus, 1); 1607 if (sc->sc_dying) 1608 break; 1609 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 1610 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs)); 1611 #ifdef OHCI_DEBUG 1612 if (ohcidebug > 15) 1613 ohci_dumpregs(sc); 1614 #endif 1615 if (intrs) { 1616 ohci_intr1(sc); 1617 if (xfer->status != USBD_IN_PROGRESS) 1618 return; 1619 } 1620 } 1621 1622 /* Timeout */ 1623 DPRINTF(("ohci_waitintr: timeout\n")); 1624 xfer->status = USBD_TIMEOUT; 1625 usb_transfer_complete(xfer); 1626 /* XXX should free TD */ 1627 } 1628 1629 void 1630 ohci_poll(struct usbd_bus *bus) 1631 { 1632 ohci_softc_t *sc = (ohci_softc_t *)bus; 1633 #ifdef OHCI_DEBUG 1634 static int last; 1635 int new; 1636 new = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1637 if (new != last) { 1638 DPRINTFN(10,("ohci_poll: intrs=0x%04x\n", new)); 1639 last = new; 1640 } 1641 #endif 1642 1643 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) 1644 ohci_intr1(sc); 1645 } 1646 1647 usbd_status 1648 ohci_device_request(usbd_xfer_handle xfer) 1649 { 1650 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1651 usb_device_request_t *req = &xfer->request; 1652 usbd_device_handle dev = opipe->pipe.device; 1653 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1654 int addr = dev->address; 1655 ohci_soft_td_t *setup, *stat, *next, *tail; 1656 ohci_soft_ed_t *sed; 1657 int isread; 1658 int len; 1659 usbd_status err; 1660 int s; 1661 1662 isread = req->bmRequestType & UT_READ; 1663 len = UGETW(req->wLength); 1664 1665 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 1666 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 1667 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1668 UGETW(req->wIndex), len, addr, 1669 opipe->pipe.endpoint->edesc->bEndpointAddress)); 1670 1671 setup = opipe->tail.td; 1672 stat = ohci_alloc_std(sc); 1673 if (stat == NULL) { 1674 err = USBD_NOMEM; 1675 goto bad1; 1676 } 1677 tail = ohci_alloc_std(sc); 1678 if (tail == NULL) { 1679 err = USBD_NOMEM; 1680 goto bad2; 1681 } 1682 tail->xfer = NULL; 1683 1684 sed = opipe->sed; 1685 opipe->u.ctl.length = len; 1686 1687 /* Update device address and length since they may have changed 1688 during the setup of the control pipe in usbd_new_device(). */ 1689 /* XXX This only needs to be done once, but it's too early in open. */ 1690 /* XXXX Should not touch ED here! */ 1691 sed->ed.ed_flags = htole32( 1692 (le32toh(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) | 1693 OHCI_ED_SET_FA(addr) | 1694 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize))); 1695 1696 next = stat; 1697 1698 /* Set up data transaction */ 1699 if (len != 0) { 1700 ohci_soft_td_t *std = stat; 1701 1702 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 1703 std, &stat); 1704 stat = stat->nexttd; /* point at free TD */ 1705 if (err) 1706 goto bad3; 1707 /* Start toggle at 1 and then use the carried toggle. */ 1708 std->td.td_flags &= htole32(~OHCI_TD_TOGGLE_MASK); 1709 std->td.td_flags |= htole32(OHCI_TD_TOGGLE_1); 1710 } 1711 1712 memcpy(KERNADDR(&opipe->u.ctl.reqdma, 0), req, sizeof *req); 1713 1714 setup->td.td_flags = htole32(OHCI_TD_SETUP | OHCI_TD_NOCC | 1715 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1716 setup->td.td_cbp = htole32(DMAADDR(&opipe->u.ctl.reqdma, 0)); 1717 setup->nexttd = next; 1718 setup->td.td_nexttd = htole32(next->physaddr); 1719 setup->td.td_be = htole32(le32toh(setup->td.td_cbp) + sizeof *req - 1); 1720 setup->len = 0; 1721 setup->xfer = xfer; 1722 setup->flags = 0; 1723 xfer->hcpriv = setup; 1724 1725 stat->td.td_flags = htole32( 1726 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | 1727 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1728 stat->td.td_cbp = 0; 1729 stat->nexttd = tail; 1730 stat->td.td_nexttd = htole32(tail->physaddr); 1731 stat->td.td_be = 0; 1732 stat->flags = OHCI_CALL_DONE; 1733 stat->len = 0; 1734 stat->xfer = xfer; 1735 1736 #ifdef OHCI_DEBUG 1737 if (ohcidebug > 5) { 1738 DPRINTF(("ohci_device_request:\n")); 1739 ohci_dump_ed(sed); 1740 ohci_dump_tds(setup); 1741 } 1742 #endif 1743 1744 /* Insert ED in schedule */ 1745 s = splusb(); 1746 sed->ed.ed_tailp = htole32(tail->physaddr); 1747 opipe->tail.td = tail; 1748 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1749 if (xfer->timeout && !sc->sc_bus.use_polling) { 1750 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 1751 ohci_timeout, xfer); 1752 } 1753 splx(s); 1754 1755 #ifdef OHCI_DEBUG 1756 if (ohcidebug > 20) { 1757 delay(10000); 1758 DPRINTF(("ohci_device_request: status=%x\n", 1759 OREAD4(sc, OHCI_COMMAND_STATUS))); 1760 ohci_dumpregs(sc); 1761 printf("ctrl head:\n"); 1762 ohci_dump_ed(sc->sc_ctrl_head); 1763 printf("sed:\n"); 1764 ohci_dump_ed(sed); 1765 ohci_dump_tds(setup); 1766 } 1767 #endif 1768 1769 return (USBD_NORMAL_COMPLETION); 1770 1771 bad3: 1772 ohci_free_std(sc, tail); 1773 bad2: 1774 ohci_free_std(sc, stat); 1775 bad1: 1776 return (err); 1777 } 1778 1779 /* 1780 * Add an ED to the schedule. Called at splusb(). 1781 */ 1782 void 1783 ohci_add_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1784 { 1785 DPRINTFN(8,("ohci_add_ed: sed=%p head=%p\n", sed, head)); 1786 1787 SPLUSBCHECK; 1788 sed->next = head->next; 1789 sed->ed.ed_nexted = head->ed.ed_nexted; 1790 head->next = sed; 1791 head->ed.ed_nexted = htole32(sed->physaddr); 1792 } 1793 1794 /* 1795 * Remove an ED from the schedule. Called at splusb(). 1796 */ 1797 void 1798 ohci_rem_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1799 { 1800 ohci_soft_ed_t *p; 1801 1802 SPLUSBCHECK; 1803 1804 /* XXX */ 1805 for (p = head; p != NULL && p->next != sed; p = p->next) 1806 ; 1807 if (p == NULL) 1808 panic("ohci_rem_ed: ED not found"); 1809 p->next = sed->next; 1810 p->ed.ed_nexted = sed->ed.ed_nexted; 1811 } 1812 1813 /* 1814 * When a transfer is completed the TD is added to the done queue by 1815 * the host controller. This queue is the processed by software. 1816 * Unfortunately the queue contains the physical address of the TD 1817 * and we have no simple way to translate this back to a kernel address. 1818 * To make the translation possible (and fast) we use a hash table of 1819 * TDs currently in the schedule. The physical address is used as the 1820 * hash value. 1821 */ 1822 1823 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1824 /* Called at splusb() */ 1825 void 1826 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1827 { 1828 int h = HASH(std->physaddr); 1829 1830 SPLUSBCHECK; 1831 1832 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1833 } 1834 1835 /* Called at splusb() */ 1836 void 1837 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1838 { 1839 SPLUSBCHECK; 1840 1841 LIST_REMOVE(std, hnext); 1842 } 1843 1844 ohci_soft_td_t * 1845 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a) 1846 { 1847 int h = HASH(a); 1848 ohci_soft_td_t *std; 1849 1850 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1851 std != NULL; 1852 std = LIST_NEXT(std, hnext)) 1853 if (std->physaddr == a) 1854 return (std); 1855 return (NULL); 1856 } 1857 1858 /* Called at splusb() */ 1859 void 1860 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1861 { 1862 int h = HASH(sitd->physaddr); 1863 1864 SPLUSBCHECK; 1865 1866 DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n", 1867 sitd, (u_long)sitd->physaddr)); 1868 1869 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext); 1870 } 1871 1872 /* Called at splusb() */ 1873 void 1874 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1875 { 1876 SPLUSBCHECK; 1877 1878 DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n", 1879 sitd, (u_long)sitd->physaddr)); 1880 1881 LIST_REMOVE(sitd, hnext); 1882 } 1883 1884 ohci_soft_itd_t * 1885 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a) 1886 { 1887 int h = HASH(a); 1888 ohci_soft_itd_t *sitd; 1889 1890 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]); 1891 sitd != NULL; 1892 sitd = LIST_NEXT(sitd, hnext)) 1893 if (sitd->physaddr == a) 1894 return (sitd); 1895 return (NULL); 1896 } 1897 1898 void 1899 ohci_timeout(void *addr) 1900 { 1901 struct ohci_xfer *oxfer = addr; 1902 struct ohci_pipe *opipe = (struct ohci_pipe *)oxfer->xfer.pipe; 1903 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1904 1905 DPRINTF(("ohci_timeout: oxfer=%p\n", oxfer)); 1906 1907 if (sc->sc_dying) { 1908 ohci_abort_xfer(&oxfer->xfer, USBD_TIMEOUT); 1909 return; 1910 } 1911 1912 /* Execute the abort in a process context. */ 1913 usb_init_task(&oxfer->abort_task, ohci_timeout_task, addr); 1914 usb_add_task(oxfer->xfer.pipe->device, &oxfer->abort_task); 1915 } 1916 1917 void 1918 ohci_timeout_task(void *addr) 1919 { 1920 usbd_xfer_handle xfer = addr; 1921 int s; 1922 1923 DPRINTF(("ohci_timeout_task: xfer=%p\n", xfer)); 1924 1925 s = splusb(); 1926 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1927 splx(s); 1928 } 1929 1930 #ifdef OHCI_DEBUG 1931 void 1932 ohci_dump_tds(ohci_soft_td_t *std) 1933 { 1934 for (; std; std = std->nexttd) 1935 ohci_dump_td(std); 1936 } 1937 1938 void 1939 ohci_dump_td(ohci_soft_td_t *std) 1940 { 1941 char sbuf[128]; 1942 1943 bitmask_snprintf((u_int32_t)le32toh(std->td.td_flags), 1944 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 1945 sbuf, sizeof(sbuf)); 1946 1947 printf("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx " 1948 "nexttd=0x%08lx be=0x%08lx\n", 1949 std, (u_long)std->physaddr, sbuf, 1950 OHCI_TD_GET_DI(le32toh(std->td.td_flags)), 1951 OHCI_TD_GET_EC(le32toh(std->td.td_flags)), 1952 OHCI_TD_GET_CC(le32toh(std->td.td_flags)), 1953 (u_long)le32toh(std->td.td_cbp), 1954 (u_long)le32toh(std->td.td_nexttd), 1955 (u_long)le32toh(std->td.td_be)); 1956 } 1957 1958 void 1959 ohci_dump_itd(ohci_soft_itd_t *sitd) 1960 { 1961 int i; 1962 1963 printf("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n" 1964 "bp0=0x%08lx next=0x%08lx be=0x%08lx\n", 1965 sitd, (u_long)sitd->physaddr, 1966 OHCI_ITD_GET_SF(le32toh(sitd->itd.itd_flags)), 1967 OHCI_ITD_GET_DI(le32toh(sitd->itd.itd_flags)), 1968 OHCI_ITD_GET_FC(le32toh(sitd->itd.itd_flags)), 1969 OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags)), 1970 (u_long)le32toh(sitd->itd.itd_bp0), 1971 (u_long)le32toh(sitd->itd.itd_nextitd), 1972 (u_long)le32toh(sitd->itd.itd_be)); 1973 for (i = 0; i < OHCI_ITD_NOFFSET; i++) 1974 printf("offs[%d]=0x%04x ", i, 1975 (u_int)le16toh(sitd->itd.itd_offset[i])); 1976 printf("\n"); 1977 } 1978 1979 void 1980 ohci_dump_itds(ohci_soft_itd_t *sitd) 1981 { 1982 for (; sitd; sitd = sitd->nextitd) 1983 ohci_dump_itd(sitd); 1984 } 1985 1986 void 1987 ohci_dump_ed(ohci_soft_ed_t *sed) 1988 { 1989 char sbuf[128], sbuf2[128]; 1990 1991 bitmask_snprintf((u_int32_t)le32toh(sed->ed.ed_flags), 1992 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO", 1993 sbuf, sizeof(sbuf)); 1994 bitmask_snprintf((u_int32_t)le32toh(sed->ed.ed_headp), 1995 "\20\1HALT\2CARRY", sbuf2, sizeof(sbuf2)); 1996 1997 printf("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d flags=%s\ntailp=0x%08lx " 1998 "headflags=%s headp=0x%08lx nexted=0x%08lx\n", 1999 sed, (u_long)sed->physaddr, 2000 OHCI_ED_GET_FA(le32toh(sed->ed.ed_flags)), 2001 OHCI_ED_GET_EN(le32toh(sed->ed.ed_flags)), 2002 OHCI_ED_GET_MAXP(le32toh(sed->ed.ed_flags)), sbuf, 2003 (u_long)le32toh(sed->ed.ed_tailp), sbuf2, 2004 (u_long)le32toh(sed->ed.ed_headp), 2005 (u_long)le32toh(sed->ed.ed_nexted)); 2006 } 2007 #endif 2008 2009 usbd_status 2010 ohci_open(usbd_pipe_handle pipe) 2011 { 2012 usbd_device_handle dev = pipe->device; 2013 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2014 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 2015 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2016 u_int8_t addr = dev->address; 2017 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 2018 ohci_soft_ed_t *sed; 2019 ohci_soft_td_t *std; 2020 ohci_soft_itd_t *sitd; 2021 ohci_physaddr_t tdphys; 2022 u_int32_t fmt; 2023 usbd_status err; 2024 int s; 2025 int ival; 2026 2027 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 2028 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 2029 2030 if (sc->sc_dying) 2031 return (USBD_IOERROR); 2032 2033 std = NULL; 2034 sed = NULL; 2035 2036 if (addr == sc->sc_addr) { 2037 switch (ed->bEndpointAddress) { 2038 case USB_CONTROL_ENDPOINT: 2039 pipe->methods = &ohci_root_ctrl_methods; 2040 break; 2041 case UE_DIR_IN | OHCI_INTR_ENDPT: 2042 pipe->methods = &ohci_root_intr_methods; 2043 break; 2044 default: 2045 return (USBD_INVAL); 2046 } 2047 } else { 2048 sed = ohci_alloc_sed(sc); 2049 if (sed == NULL) 2050 goto bad0; 2051 opipe->sed = sed; 2052 if (xfertype == UE_ISOCHRONOUS) { 2053 sitd = ohci_alloc_sitd(sc); 2054 if (sitd == NULL) 2055 goto bad1; 2056 opipe->tail.itd = sitd; 2057 tdphys = sitd->physaddr; 2058 fmt = OHCI_ED_FORMAT_ISO; 2059 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 2060 fmt |= OHCI_ED_DIR_IN; 2061 else 2062 fmt |= OHCI_ED_DIR_OUT; 2063 } else { 2064 std = ohci_alloc_std(sc); 2065 if (std == NULL) 2066 goto bad1; 2067 opipe->tail.td = std; 2068 tdphys = std->physaddr; 2069 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD; 2070 } 2071 sed->ed.ed_flags = htole32( 2072 OHCI_ED_SET_FA(addr) | 2073 OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) | 2074 (dev->speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) | 2075 fmt | 2076 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 2077 sed->ed.ed_headp = sed->ed.ed_tailp = htole32(tdphys); 2078 2079 switch (xfertype) { 2080 case UE_CONTROL: 2081 pipe->methods = &ohci_device_ctrl_methods; 2082 err = usb_allocmem(&sc->sc_bus, 2083 sizeof(usb_device_request_t), 2084 0, &opipe->u.ctl.reqdma); 2085 if (err) 2086 goto bad; 2087 s = splusb(); 2088 ohci_add_ed(sed, sc->sc_ctrl_head); 2089 splx(s); 2090 break; 2091 case UE_INTERRUPT: 2092 pipe->methods = &ohci_device_intr_methods; 2093 ival = pipe->interval; 2094 if (ival == USBD_DEFAULT_INTERVAL) 2095 ival = ed->bInterval; 2096 return (ohci_device_setintr(sc, opipe, ival)); 2097 case UE_ISOCHRONOUS: 2098 pipe->methods = &ohci_device_isoc_methods; 2099 return (ohci_setup_isoc(pipe)); 2100 case UE_BULK: 2101 pipe->methods = &ohci_device_bulk_methods; 2102 s = splusb(); 2103 ohci_add_ed(sed, sc->sc_bulk_head); 2104 splx(s); 2105 break; 2106 } 2107 } 2108 return (USBD_NORMAL_COMPLETION); 2109 2110 bad: 2111 if (std != NULL) 2112 ohci_free_std(sc, std); 2113 bad1: 2114 if (sed != NULL) 2115 ohci_free_sed(sc, sed); 2116 bad0: 2117 return (USBD_NOMEM); 2118 2119 } 2120 2121 /* 2122 * Close a reqular pipe. 2123 * Assumes that there are no pending transactions. 2124 */ 2125 void 2126 ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head) 2127 { 2128 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2129 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2130 ohci_soft_ed_t *sed = opipe->sed; 2131 int s; 2132 2133 s = splusb(); 2134 #ifdef DIAGNOSTIC 2135 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 2136 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2137 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) { 2138 ohci_soft_td_t *std; 2139 std = ohci_hash_find_td(sc, le32toh(sed->ed.ed_headp)); 2140 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 2141 "tl=0x%x pipe=%p, std=%p\n", sed, 2142 (int)le32toh(sed->ed.ed_headp), 2143 (int)le32toh(sed->ed.ed_tailp), 2144 pipe, std); 2145 #ifdef USB_DEBUG 2146 usbd_dump_pipe(&opipe->pipe); 2147 #endif 2148 #ifdef OHCI_DEBUG 2149 ohci_dump_ed(sed); 2150 if (std) 2151 ohci_dump_td(std); 2152 #endif 2153 usb_delay_ms(&sc->sc_bus, 2); 2154 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2155 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) 2156 printf("ohci_close_pipe: pipe still not empty\n"); 2157 } 2158 #endif 2159 ohci_rem_ed(sed, head); 2160 /* Make sure the host controller is not touching this ED */ 2161 usb_delay_ms(&sc->sc_bus, 1); 2162 splx(s); 2163 ohci_free_sed(sc, opipe->sed); 2164 } 2165 2166 /* 2167 * Abort a device request. 2168 * If this routine is called at splusb() it guarantees that the request 2169 * will be removed from the hardware scheduling and that the callback 2170 * for it will be called with USBD_CANCELLED status. 2171 * It's impossible to guarantee that the requested transfer will not 2172 * have happened since the hardware runs concurrently. 2173 * If the transaction has already happened we rely on the ordinary 2174 * interrupt processing to process it. 2175 */ 2176 void 2177 ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2178 { 2179 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2180 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 2181 ohci_soft_ed_t *sed = opipe->sed; 2182 ohci_soft_td_t *p, *n; 2183 ohci_physaddr_t headp; 2184 int s, hit; 2185 2186 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p sed=%p\n", xfer, opipe,sed)); 2187 2188 if (sc->sc_dying) { 2189 /* If we're dying, just do the software part. */ 2190 s = splusb(); 2191 xfer->status = status; /* make software ignore it */ 2192 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 2193 usb_transfer_complete(xfer); 2194 splx(s); 2195 } 2196 2197 if (xfer->device->bus->intr_context || !curproc) 2198 panic("ohci_abort_xfer: not in process context"); 2199 2200 /* 2201 * Step 1: Make interrupt routine and hardware ignore xfer. 2202 */ 2203 s = splusb(); 2204 xfer->status = status; /* make software ignore it */ 2205 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 2206 splx(s); 2207 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed)); 2208 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 2209 2210 /* 2211 * Step 2: Wait until we know hardware has finished any possible 2212 * use of the xfer. Also make sure the soft interrupt routine 2213 * has run. 2214 */ 2215 usb_delay_ms(opipe->pipe.device->bus, 20); /* Hardware finishes in 1ms */ 2216 s = splusb(); 2217 #ifdef USB_USE_SOFTINTR 2218 sc->sc_softwake = 1; 2219 #endif /* USB_USE_SOFTINTR */ 2220 usb_schedsoftintr(&sc->sc_bus); 2221 #ifdef USB_USE_SOFTINTR 2222 tsleep(&sc->sc_softwake, PZERO, "ohciab", 0); 2223 #endif /* USB_USE_SOFTINTR */ 2224 splx(s); 2225 2226 /* 2227 * Step 3: Remove any vestiges of the xfer from the hardware. 2228 * The complication here is that the hardware may have executed 2229 * beyond the xfer we're trying to abort. So as we're scanning 2230 * the TDs of this xfer we check if the hardware points to 2231 * any of them. 2232 */ 2233 s = splusb(); /* XXX why? */ 2234 p = xfer->hcpriv; 2235 #ifdef DIAGNOSTIC 2236 if (p == NULL) { 2237 splx(s); 2238 printf("ohci_abort_xfer: hcpriv is NULL\n"); 2239 return; 2240 } 2241 #endif 2242 #ifdef OHCI_DEBUG 2243 if (ohcidebug > 1) { 2244 DPRINTF(("ohci_abort_xfer: sed=\n")); 2245 ohci_dump_ed(sed); 2246 ohci_dump_tds(p); 2247 } 2248 #endif 2249 headp = le32toh(sed->ed.ed_headp) & OHCI_HEADMASK; 2250 hit = 0; 2251 for (; p->xfer == xfer; p = n) { 2252 hit |= headp == p->physaddr; 2253 n = p->nexttd; 2254 ohci_free_std(sc, p); 2255 } 2256 /* Zap headp register if hardware pointed inside the xfer. */ 2257 if (hit) { 2258 DPRINTFN(1,("ohci_abort_xfer: set hd=0x%08x, tl=0x%08x\n", 2259 (int)p->physaddr, (int)le32toh(sed->ed.ed_tailp))); 2260 sed->ed.ed_headp = htole32(p->physaddr); /* unlink TDs */ 2261 } else { 2262 DPRINTFN(1,("ohci_abort_xfer: no hit\n")); 2263 } 2264 2265 /* 2266 * Step 4: Turn on hardware again. 2267 */ 2268 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 2269 2270 /* 2271 * Step 5: Execute callback. 2272 */ 2273 usb_transfer_complete(xfer); 2274 2275 splx(s); 2276 } 2277 2278 /* 2279 * Data structures and routines to emulate the root hub. 2280 */ 2281 Static usb_device_descriptor_t ohci_devd = { 2282 USB_DEVICE_DESCRIPTOR_SIZE, 2283 UDESC_DEVICE, /* type */ 2284 {0x00, 0x01}, /* USB version */ 2285 UDCLASS_HUB, /* class */ 2286 UDSUBCLASS_HUB, /* subclass */ 2287 UDPROTO_FSHUB, 2288 64, /* max packet */ 2289 {0},{0},{0x00,0x01}, /* device id */ 2290 1,2,0, /* string indicies */ 2291 1 /* # of configurations */ 2292 }; 2293 2294 Static usb_config_descriptor_t ohci_confd = { 2295 USB_CONFIG_DESCRIPTOR_SIZE, 2296 UDESC_CONFIG, 2297 {USB_CONFIG_DESCRIPTOR_SIZE + 2298 USB_INTERFACE_DESCRIPTOR_SIZE + 2299 USB_ENDPOINT_DESCRIPTOR_SIZE}, 2300 1, 2301 1, 2302 0, 2303 UC_SELF_POWERED, 2304 0 /* max power */ 2305 }; 2306 2307 Static usb_interface_descriptor_t ohci_ifcd = { 2308 USB_INTERFACE_DESCRIPTOR_SIZE, 2309 UDESC_INTERFACE, 2310 0, 2311 0, 2312 1, 2313 UICLASS_HUB, 2314 UISUBCLASS_HUB, 2315 UIPROTO_FSHUB, 2316 0 2317 }; 2318 2319 Static usb_endpoint_descriptor_t ohci_endpd = { 2320 USB_ENDPOINT_DESCRIPTOR_SIZE, 2321 UDESC_ENDPOINT, 2322 UE_DIR_IN | OHCI_INTR_ENDPT, 2323 UE_INTERRUPT, 2324 {8, 0}, /* max packet */ 2325 255 2326 }; 2327 2328 Static usb_hub_descriptor_t ohci_hubd = { 2329 USB_HUB_DESCRIPTOR_SIZE, 2330 UDESC_HUB, 2331 0, 2332 {0,0}, 2333 0, 2334 0, 2335 {0}, 2336 }; 2337 2338 Static int 2339 ohci_str(usb_string_descriptor_t *p, int l, const char *s) 2340 { 2341 int i; 2342 2343 if (l == 0) 2344 return (0); 2345 p->bLength = 2 * strlen(s) + 2; 2346 if (l == 1) 2347 return (1); 2348 p->bDescriptorType = UDESC_STRING; 2349 l -= 2; 2350 for (i = 0; s[i] && l > 1; i++, l -= 2) 2351 USETW2(p->bString[i], 0, s[i]); 2352 return (2*i+2); 2353 } 2354 2355 /* 2356 * Simulate a hardware hub by handling all the necessary requests. 2357 */ 2358 Static usbd_status 2359 ohci_root_ctrl_transfer(usbd_xfer_handle xfer) 2360 { 2361 usbd_status err; 2362 2363 /* Insert last in queue. */ 2364 err = usb_insert_transfer(xfer); 2365 if (err) 2366 return (err); 2367 2368 /* Pipe isn't running, start first */ 2369 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2370 } 2371 2372 Static usbd_status 2373 ohci_root_ctrl_start(usbd_xfer_handle xfer) 2374 { 2375 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2376 usb_device_request_t *req; 2377 void *buf = NULL; 2378 int port, i; 2379 int s, len, value, index, l, totlen = 0; 2380 usb_port_status_t ps; 2381 usb_hub_descriptor_t hubd; 2382 usbd_status err; 2383 u_int32_t v; 2384 2385 if (sc->sc_dying) 2386 return (USBD_IOERROR); 2387 2388 #ifdef DIAGNOSTIC 2389 if (!(xfer->rqflags & URQ_REQUEST)) 2390 /* XXX panic */ 2391 return (USBD_INVAL); 2392 #endif 2393 req = &xfer->request; 2394 2395 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 2396 req->bmRequestType, req->bRequest)); 2397 2398 len = UGETW(req->wLength); 2399 value = UGETW(req->wValue); 2400 index = UGETW(req->wIndex); 2401 2402 if (len != 0) 2403 buf = KERNADDR(&xfer->dmabuf, 0); 2404 2405 #define C(x,y) ((x) | ((y) << 8)) 2406 switch(C(req->bRequest, req->bmRequestType)) { 2407 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 2408 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 2409 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 2410 /* 2411 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 2412 * for the integrated root hub. 2413 */ 2414 break; 2415 case C(UR_GET_CONFIG, UT_READ_DEVICE): 2416 if (len > 0) { 2417 *(u_int8_t *)buf = sc->sc_conf; 2418 totlen = 1; 2419 } 2420 break; 2421 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2422 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 2423 switch(value >> 8) { 2424 case UDESC_DEVICE: 2425 if ((value & 0xff) != 0) { 2426 err = USBD_IOERROR; 2427 goto ret; 2428 } 2429 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 2430 USETW(ohci_devd.idVendor, sc->sc_id_vendor); 2431 memcpy(buf, &ohci_devd, l); 2432 break; 2433 case UDESC_CONFIG: 2434 if ((value & 0xff) != 0) { 2435 err = USBD_IOERROR; 2436 goto ret; 2437 } 2438 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 2439 memcpy(buf, &ohci_confd, l); 2440 buf = (char *)buf + l; 2441 len -= l; 2442 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 2443 totlen += l; 2444 memcpy(buf, &ohci_ifcd, l); 2445 buf = (char *)buf + l; 2446 len -= l; 2447 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 2448 totlen += l; 2449 memcpy(buf, &ohci_endpd, l); 2450 break; 2451 case UDESC_STRING: 2452 if (len == 0) 2453 break; 2454 *(u_int8_t *)buf = 0; 2455 totlen = 1; 2456 switch (value & 0xff) { 2457 case 0: /* Language table */ 2458 totlen = ohci_str(buf, len, "\001"); 2459 break; 2460 case 1: /* Vendor */ 2461 totlen = ohci_str(buf, len, sc->sc_vendor); 2462 break; 2463 case 2: /* Product */ 2464 totlen = ohci_str(buf, len, "OHCI root hub"); 2465 break; 2466 } 2467 break; 2468 default: 2469 err = USBD_IOERROR; 2470 goto ret; 2471 } 2472 break; 2473 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 2474 if (len > 0) { 2475 *(u_int8_t *)buf = 0; 2476 totlen = 1; 2477 } 2478 break; 2479 case C(UR_GET_STATUS, UT_READ_DEVICE): 2480 if (len > 1) { 2481 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 2482 totlen = 2; 2483 } 2484 break; 2485 case C(UR_GET_STATUS, UT_READ_INTERFACE): 2486 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 2487 if (len > 1) { 2488 USETW(((usb_status_t *)buf)->wStatus, 0); 2489 totlen = 2; 2490 } 2491 break; 2492 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 2493 if (value >= USB_MAX_DEVICES) { 2494 err = USBD_IOERROR; 2495 goto ret; 2496 } 2497 sc->sc_addr = value; 2498 break; 2499 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 2500 if (value != 0 && value != 1) { 2501 err = USBD_IOERROR; 2502 goto ret; 2503 } 2504 sc->sc_conf = value; 2505 break; 2506 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 2507 break; 2508 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 2509 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 2510 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 2511 err = USBD_IOERROR; 2512 goto ret; 2513 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 2514 break; 2515 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 2516 break; 2517 /* Hub requests */ 2518 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2519 break; 2520 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2521 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 2522 "port=%d feature=%d\n", 2523 index, value)); 2524 if (index < 1 || index > sc->sc_noport) { 2525 err = USBD_IOERROR; 2526 goto ret; 2527 } 2528 port = OHCI_RH_PORT_STATUS(index); 2529 switch(value) { 2530 case UHF_PORT_ENABLE: 2531 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2532 break; 2533 case UHF_PORT_SUSPEND: 2534 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2535 break; 2536 case UHF_PORT_POWER: 2537 /* Yes, writing to the LOW_SPEED bit clears power. */ 2538 OWRITE4(sc, port, UPS_LOW_SPEED); 2539 break; 2540 case UHF_C_PORT_CONNECTION: 2541 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2542 break; 2543 case UHF_C_PORT_ENABLE: 2544 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2545 break; 2546 case UHF_C_PORT_SUSPEND: 2547 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2548 break; 2549 case UHF_C_PORT_OVER_CURRENT: 2550 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2551 break; 2552 case UHF_C_PORT_RESET: 2553 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2554 break; 2555 default: 2556 err = USBD_IOERROR; 2557 goto ret; 2558 } 2559 switch(value) { 2560 case UHF_C_PORT_CONNECTION: 2561 case UHF_C_PORT_ENABLE: 2562 case UHF_C_PORT_SUSPEND: 2563 case UHF_C_PORT_OVER_CURRENT: 2564 case UHF_C_PORT_RESET: 2565 /* Enable RHSC interrupt if condition is cleared. */ 2566 if ((OREAD4(sc, port) >> 16) == 0) 2567 ohci_rhsc_able(sc, 1); 2568 break; 2569 default: 2570 break; 2571 } 2572 break; 2573 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2574 if ((value & 0xff) != 0) { 2575 err = USBD_IOERROR; 2576 goto ret; 2577 } 2578 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2579 hubd = ohci_hubd; 2580 hubd.bNbrPorts = sc->sc_noport; 2581 USETW(hubd.wHubCharacteristics, 2582 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2583 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2584 /* XXX overcurrent */ 2585 ); 2586 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2587 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2588 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2589 hubd.DeviceRemovable[i++] = (u_int8_t)v; 2590 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2591 l = min(len, hubd.bDescLength); 2592 totlen = l; 2593 memcpy(buf, &hubd, l); 2594 break; 2595 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2596 if (len != 4) { 2597 err = USBD_IOERROR; 2598 goto ret; 2599 } 2600 memset(buf, 0, len); /* ? XXX */ 2601 totlen = len; 2602 break; 2603 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2604 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 2605 index)); 2606 if (index < 1 || index > sc->sc_noport) { 2607 err = USBD_IOERROR; 2608 goto ret; 2609 } 2610 if (len != 4) { 2611 err = USBD_IOERROR; 2612 goto ret; 2613 } 2614 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2615 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 2616 v)); 2617 USETW(ps.wPortStatus, v); 2618 USETW(ps.wPortChange, v >> 16); 2619 l = min(len, sizeof ps); 2620 memcpy(buf, &ps, l); 2621 totlen = l; 2622 break; 2623 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2624 err = USBD_IOERROR; 2625 goto ret; 2626 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2627 break; 2628 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2629 if (index < 1 || index > sc->sc_noport) { 2630 err = USBD_IOERROR; 2631 goto ret; 2632 } 2633 port = OHCI_RH_PORT_STATUS(index); 2634 switch(value) { 2635 case UHF_PORT_ENABLE: 2636 OWRITE4(sc, port, UPS_PORT_ENABLED); 2637 break; 2638 case UHF_PORT_SUSPEND: 2639 OWRITE4(sc, port, UPS_SUSPEND); 2640 break; 2641 case UHF_PORT_RESET: 2642 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 2643 index)); 2644 OWRITE4(sc, port, UPS_RESET); 2645 for (i = 0; i < 5; i++) { 2646 usb_delay_ms(&sc->sc_bus, 2647 USB_PORT_ROOT_RESET_DELAY); 2648 if (sc->sc_dying) { 2649 err = USBD_IOERROR; 2650 goto ret; 2651 } 2652 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2653 break; 2654 } 2655 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 2656 index, OREAD4(sc, port))); 2657 break; 2658 case UHF_PORT_POWER: 2659 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 2660 "%d\n", index)); 2661 OWRITE4(sc, port, UPS_PORT_POWER); 2662 break; 2663 default: 2664 err = USBD_IOERROR; 2665 goto ret; 2666 } 2667 break; 2668 default: 2669 err = USBD_IOERROR; 2670 goto ret; 2671 } 2672 xfer->actlen = totlen; 2673 err = USBD_NORMAL_COMPLETION; 2674 ret: 2675 xfer->status = err; 2676 s = splusb(); 2677 usb_transfer_complete(xfer); 2678 splx(s); 2679 return (USBD_IN_PROGRESS); 2680 } 2681 2682 /* Abort a root control request. */ 2683 Static void 2684 ohci_root_ctrl_abort(usbd_xfer_handle xfer) 2685 { 2686 /* Nothing to do, all transfers are synchronous. */ 2687 } 2688 2689 /* Close the root pipe. */ 2690 Static void 2691 ohci_root_ctrl_close(usbd_pipe_handle pipe) 2692 { 2693 DPRINTF(("ohci_root_ctrl_close\n")); 2694 /* Nothing to do. */ 2695 } 2696 2697 Static usbd_status 2698 ohci_root_intr_transfer(usbd_xfer_handle xfer) 2699 { 2700 usbd_status err; 2701 2702 /* Insert last in queue. */ 2703 err = usb_insert_transfer(xfer); 2704 if (err) 2705 return (err); 2706 2707 /* Pipe isn't running, start first */ 2708 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2709 } 2710 2711 Static usbd_status 2712 ohci_root_intr_start(usbd_xfer_handle xfer) 2713 { 2714 usbd_pipe_handle pipe = xfer->pipe; 2715 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2716 2717 if (sc->sc_dying) 2718 return (USBD_IOERROR); 2719 2720 sc->sc_intrxfer = xfer; 2721 2722 return (USBD_IN_PROGRESS); 2723 } 2724 2725 /* Abort a root interrupt request. */ 2726 Static void 2727 ohci_root_intr_abort(usbd_xfer_handle xfer) 2728 { 2729 int s; 2730 2731 if (xfer->pipe->intrxfer == xfer) { 2732 DPRINTF(("ohci_root_intr_abort: remove\n")); 2733 xfer->pipe->intrxfer = NULL; 2734 } 2735 xfer->status = USBD_CANCELLED; 2736 s = splusb(); 2737 usb_transfer_complete(xfer); 2738 splx(s); 2739 } 2740 2741 /* Close the root pipe. */ 2742 Static void 2743 ohci_root_intr_close(usbd_pipe_handle pipe) 2744 { 2745 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2746 2747 DPRINTF(("ohci_root_intr_close\n")); 2748 2749 sc->sc_intrxfer = NULL; 2750 } 2751 2752 /************************/ 2753 2754 Static usbd_status 2755 ohci_device_ctrl_transfer(usbd_xfer_handle xfer) 2756 { 2757 usbd_status err; 2758 2759 /* Insert last in queue. */ 2760 err = usb_insert_transfer(xfer); 2761 if (err) 2762 return (err); 2763 2764 /* Pipe isn't running, start first */ 2765 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2766 } 2767 2768 Static usbd_status 2769 ohci_device_ctrl_start(usbd_xfer_handle xfer) 2770 { 2771 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2772 usbd_status err; 2773 2774 if (sc->sc_dying) 2775 return (USBD_IOERROR); 2776 2777 #ifdef DIAGNOSTIC 2778 if (!(xfer->rqflags & URQ_REQUEST)) { 2779 /* XXX panic */ 2780 printf("ohci_device_ctrl_transfer: not a request\n"); 2781 return (USBD_INVAL); 2782 } 2783 #endif 2784 2785 err = ohci_device_request(xfer); 2786 if (err) 2787 return (err); 2788 2789 if (sc->sc_bus.use_polling) 2790 ohci_waitintr(sc, xfer); 2791 return (USBD_IN_PROGRESS); 2792 } 2793 2794 /* Abort a device control request. */ 2795 Static void 2796 ohci_device_ctrl_abort(usbd_xfer_handle xfer) 2797 { 2798 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer)); 2799 ohci_abort_xfer(xfer, USBD_CANCELLED); 2800 } 2801 2802 /* Close a device control pipe. */ 2803 Static void 2804 ohci_device_ctrl_close(usbd_pipe_handle pipe) 2805 { 2806 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2807 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2808 2809 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe)); 2810 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2811 ohci_free_std(sc, opipe->tail.td); 2812 } 2813 2814 /************************/ 2815 2816 Static void 2817 ohci_device_clear_toggle(usbd_pipe_handle pipe) 2818 { 2819 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2820 2821 opipe->sed->ed.ed_headp &= htole32(~OHCI_TOGGLECARRY); 2822 } 2823 2824 Static void 2825 ohci_noop(usbd_pipe_handle pipe) 2826 { 2827 } 2828 2829 Static usbd_status 2830 ohci_device_bulk_transfer(usbd_xfer_handle xfer) 2831 { 2832 usbd_status err; 2833 2834 /* Insert last in queue. */ 2835 err = usb_insert_transfer(xfer); 2836 if (err) 2837 return (err); 2838 2839 /* Pipe isn't running, start first */ 2840 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2841 } 2842 2843 Static usbd_status 2844 ohci_device_bulk_start(usbd_xfer_handle xfer) 2845 { 2846 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2847 usbd_device_handle dev = opipe->pipe.device; 2848 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2849 int addr = dev->address; 2850 ohci_soft_td_t *data, *tail, *tdp; 2851 ohci_soft_ed_t *sed; 2852 int s, len, isread, endpt; 2853 usbd_status err; 2854 2855 if (sc->sc_dying) 2856 return (USBD_IOERROR); 2857 2858 #ifdef DIAGNOSTIC 2859 if (xfer->rqflags & URQ_REQUEST) { 2860 /* XXX panic */ 2861 printf("ohci_device_bulk_start: a request\n"); 2862 return (USBD_INVAL); 2863 } 2864 #endif 2865 2866 len = xfer->length; 2867 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 2868 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2869 sed = opipe->sed; 2870 2871 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d " 2872 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags, 2873 endpt)); 2874 2875 opipe->u.bulk.isread = isread; 2876 opipe->u.bulk.length = len; 2877 2878 /* Update device address */ 2879 sed->ed.ed_flags = htole32( 2880 (le32toh(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) | 2881 OHCI_ED_SET_FA(addr)); 2882 2883 /* Allocate a chain of new TDs (including a new tail). */ 2884 data = opipe->tail.td; 2885 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 2886 data, &tail); 2887 /* We want interrupt at the end of the transfer. */ 2888 tail->td.td_flags &= htole32(~OHCI_TD_INTR_MASK); 2889 tail->td.td_flags |= htole32(OHCI_TD_SET_DI(1)); 2890 tail->flags |= OHCI_CALL_DONE; 2891 tail = tail->nexttd; /* point at sentinel */ 2892 if (err) 2893 return (err); 2894 2895 tail->xfer = NULL; 2896 xfer->hcpriv = data; 2897 2898 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x " 2899 "td_cbp=0x%08x td_be=0x%08x\n", 2900 (int)le32toh(sed->ed.ed_flags), 2901 (int)le32toh(data->td.td_flags), 2902 (int)le32toh(data->td.td_cbp), 2903 (int)le32toh(data->td.td_be))); 2904 2905 #ifdef OHCI_DEBUG 2906 if (ohcidebug > 5) { 2907 ohci_dump_ed(sed); 2908 ohci_dump_tds(data); 2909 } 2910 #endif 2911 2912 /* Insert ED in schedule */ 2913 s = splusb(); 2914 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 2915 tdp->xfer = xfer; 2916 } 2917 sed->ed.ed_tailp = htole32(tail->physaddr); 2918 opipe->tail.td = tail; 2919 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 2920 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 2921 if (xfer->timeout && !sc->sc_bus.use_polling) { 2922 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2923 ohci_timeout, xfer); 2924 } 2925 2926 #if 0 2927 /* This goes wrong if we are too slow. */ 2928 if (ohcidebug > 10) { 2929 delay(10000); 2930 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2931 OREAD4(sc, OHCI_COMMAND_STATUS))); 2932 ohci_dump_ed(sed); 2933 ohci_dump_tds(data); 2934 } 2935 #endif 2936 2937 splx(s); 2938 2939 return (USBD_IN_PROGRESS); 2940 } 2941 2942 Static void 2943 ohci_device_bulk_abort(usbd_xfer_handle xfer) 2944 { 2945 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer)); 2946 ohci_abort_xfer(xfer, USBD_CANCELLED); 2947 } 2948 2949 /* 2950 * Close a device bulk pipe. 2951 */ 2952 Static void 2953 ohci_device_bulk_close(usbd_pipe_handle pipe) 2954 { 2955 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2956 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2957 2958 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe)); 2959 ohci_close_pipe(pipe, sc->sc_bulk_head); 2960 ohci_free_std(sc, opipe->tail.td); 2961 } 2962 2963 /************************/ 2964 2965 Static usbd_status 2966 ohci_device_intr_transfer(usbd_xfer_handle xfer) 2967 { 2968 usbd_status err; 2969 2970 /* Insert last in queue. */ 2971 err = usb_insert_transfer(xfer); 2972 if (err) 2973 return (err); 2974 2975 /* Pipe isn't running, start first */ 2976 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2977 } 2978 2979 Static usbd_status 2980 ohci_device_intr_start(usbd_xfer_handle xfer) 2981 { 2982 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2983 usbd_device_handle dev = opipe->pipe.device; 2984 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2985 ohci_soft_ed_t *sed = opipe->sed; 2986 ohci_soft_td_t *data, *tail; 2987 int len; 2988 int s; 2989 2990 if (sc->sc_dying) 2991 return (USBD_IOERROR); 2992 2993 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d " 2994 "flags=%d priv=%p\n", 2995 xfer, xfer->length, xfer->flags, xfer->priv)); 2996 2997 #ifdef DIAGNOSTIC 2998 if (xfer->rqflags & URQ_REQUEST) 2999 panic("ohci_device_intr_transfer: a request"); 3000 #endif 3001 3002 len = xfer->length; 3003 3004 data = opipe->tail.td; 3005 tail = ohci_alloc_std(sc); 3006 if (tail == NULL) 3007 return (USBD_NOMEM); 3008 tail->xfer = NULL; 3009 3010 data->td.td_flags = htole32( 3011 OHCI_TD_IN | OHCI_TD_NOCC | 3012 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 3013 if (xfer->flags & USBD_SHORT_XFER_OK) 3014 data->td.td_flags |= htole32(OHCI_TD_R); 3015 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf, 0)); 3016 data->nexttd = tail; 3017 data->td.td_nexttd = htole32(tail->physaddr); 3018 data->td.td_be = htole32(le32toh(data->td.td_cbp) + len - 1); 3019 data->len = len; 3020 data->xfer = xfer; 3021 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 3022 xfer->hcpriv = data; 3023 3024 #ifdef OHCI_DEBUG 3025 if (ohcidebug > 5) { 3026 DPRINTF(("ohci_device_intr_transfer:\n")); 3027 ohci_dump_ed(sed); 3028 ohci_dump_tds(data); 3029 } 3030 #endif 3031 3032 /* Insert ED in schedule */ 3033 s = splusb(); 3034 sed->ed.ed_tailp = htole32(tail->physaddr); 3035 opipe->tail.td = tail; 3036 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 3037 3038 #if 0 3039 /* 3040 * This goes horribly wrong, printing thousands of descriptors, 3041 * because false references are followed due to the fact that the 3042 * TD is gone. 3043 */ 3044 if (ohcidebug > 5) { 3045 usb_delay_ms(&sc->sc_bus, 5); 3046 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 3047 OREAD4(sc, OHCI_COMMAND_STATUS))); 3048 ohci_dump_ed(sed); 3049 ohci_dump_tds(data); 3050 } 3051 #endif 3052 splx(s); 3053 3054 return (USBD_IN_PROGRESS); 3055 } 3056 3057 /* Abort a device control request. */ 3058 Static void 3059 ohci_device_intr_abort(usbd_xfer_handle xfer) 3060 { 3061 if (xfer->pipe->intrxfer == xfer) { 3062 DPRINTF(("ohci_device_intr_abort: remove\n")); 3063 xfer->pipe->intrxfer = NULL; 3064 } 3065 ohci_abort_xfer(xfer, USBD_CANCELLED); 3066 } 3067 3068 /* Close a device interrupt pipe. */ 3069 Static void 3070 ohci_device_intr_close(usbd_pipe_handle pipe) 3071 { 3072 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3073 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3074 int nslots = opipe->u.intr.nslots; 3075 int pos = opipe->u.intr.pos; 3076 int j; 3077 ohci_soft_ed_t *p, *sed = opipe->sed; 3078 int s; 3079 3080 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 3081 pipe, nslots, pos)); 3082 s = splusb(); 3083 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 3084 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 3085 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) 3086 usb_delay_ms(&sc->sc_bus, 2); 3087 3088 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 3089 ; 3090 #ifdef DIAGNOSTIC 3091 if (p == NULL) 3092 panic("ohci_device_intr_close: ED not found"); 3093 #endif 3094 p->next = sed->next; 3095 p->ed.ed_nexted = sed->ed.ed_nexted; 3096 splx(s); 3097 3098 for (j = 0; j < nslots; j++) 3099 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 3100 3101 ohci_free_std(sc, opipe->tail.td); 3102 ohci_free_sed(sc, opipe->sed); 3103 } 3104 3105 Static usbd_status 3106 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival) 3107 { 3108 int i, j, s, best; 3109 u_int npoll, slow, shigh, nslots; 3110 u_int bestbw, bw; 3111 ohci_soft_ed_t *hsed, *sed = opipe->sed; 3112 3113 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 3114 if (ival == 0) { 3115 printf("ohci_setintr: 0 interval\n"); 3116 return (USBD_INVAL); 3117 } 3118 3119 npoll = OHCI_NO_INTRS; 3120 while (npoll > ival) 3121 npoll /= 2; 3122 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 3123 3124 /* 3125 * We now know which level in the tree the ED must go into. 3126 * Figure out which slot has most bandwidth left over. 3127 * Slots to examine: 3128 * npoll 3129 * 1 0 3130 * 2 1 2 3131 * 4 3 4 5 6 3132 * 8 7 8 9 10 11 12 13 14 3133 * N (N-1) .. (N-1+N-1) 3134 */ 3135 slow = npoll-1; 3136 shigh = slow + npoll; 3137 nslots = OHCI_NO_INTRS / npoll; 3138 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 3139 bw = 0; 3140 for (j = 0; j < nslots; j++) 3141 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 3142 if (bw < bestbw) { 3143 best = i; 3144 bestbw = bw; 3145 } 3146 } 3147 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 3148 best, slow, shigh, bestbw)); 3149 3150 s = splusb(); 3151 hsed = sc->sc_eds[best]; 3152 sed->next = hsed->next; 3153 sed->ed.ed_nexted = hsed->ed.ed_nexted; 3154 hsed->next = sed; 3155 hsed->ed.ed_nexted = htole32(sed->physaddr); 3156 splx(s); 3157 3158 for (j = 0; j < nslots; j++) 3159 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 3160 opipe->u.intr.nslots = nslots; 3161 opipe->u.intr.pos = best; 3162 3163 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 3164 return (USBD_NORMAL_COMPLETION); 3165 } 3166 3167 /***********************/ 3168 3169 usbd_status 3170 ohci_device_isoc_transfer(usbd_xfer_handle xfer) 3171 { 3172 usbd_status err; 3173 3174 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer)); 3175 3176 /* Put it on our queue, */ 3177 err = usb_insert_transfer(xfer); 3178 3179 /* bail out on error, */ 3180 if (err && err != USBD_IN_PROGRESS) 3181 return (err); 3182 3183 /* XXX should check inuse here */ 3184 3185 /* insert into schedule, */ 3186 ohci_device_isoc_enter(xfer); 3187 3188 /* and start if the pipe wasn't running */ 3189 if (!err) 3190 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 3191 3192 return (err); 3193 } 3194 3195 void 3196 ohci_device_isoc_enter(usbd_xfer_handle xfer) 3197 { 3198 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3199 usbd_device_handle dev = opipe->pipe.device; 3200 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 3201 ohci_soft_ed_t *sed = opipe->sed; 3202 struct iso *iso = &opipe->u.iso; 3203 ohci_soft_itd_t *sitd, *nsitd; 3204 ohci_physaddr_t buf, offs, noffs, bp0; 3205 int i, ncur, nframes; 3206 int s; 3207 3208 DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p " 3209 "nframes=%d\n", 3210 iso->inuse, iso->next, xfer, xfer->nframes)); 3211 3212 if (sc->sc_dying) 3213 return; 3214 3215 if (iso->next == -1) { 3216 /* Not in use yet, schedule it a few frames ahead. */ 3217 iso->next = le32toh(sc->sc_hcca->hcca_frame_number) + 5; 3218 DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n", 3219 iso->next)); 3220 } 3221 3222 sitd = opipe->tail.itd; 3223 buf = DMAADDR(&xfer->dmabuf, 0); 3224 bp0 = OHCI_PAGE(buf); 3225 offs = OHCI_PAGE_OFFSET(buf); 3226 nframes = xfer->nframes; 3227 xfer->hcpriv = sitd; 3228 for (i = ncur = 0; i < nframes; i++, ncur++) { 3229 noffs = offs + xfer->frlengths[i]; 3230 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ 3231 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */ 3232 3233 /* Allocate next ITD */ 3234 nsitd = ohci_alloc_sitd(sc); 3235 if (nsitd == NULL) { 3236 /* XXX what now? */ 3237 printf("%s: isoc TD alloc failed\n", 3238 USBDEVNAME(sc->sc_bus.bdev)); 3239 return; 3240 } 3241 3242 /* Fill current ITD */ 3243 sitd->itd.itd_flags = htole32( 3244 OHCI_ITD_NOCC | 3245 OHCI_ITD_SET_SF(iso->next) | 3246 OHCI_ITD_SET_DI(6) | /* delay intr a little */ 3247 OHCI_ITD_SET_FC(ncur)); 3248 sitd->itd.itd_bp0 = htole32(bp0); 3249 sitd->nextitd = nsitd; 3250 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 3251 sitd->itd.itd_be = htole32(bp0 + offs - 1); 3252 sitd->xfer = xfer; 3253 sitd->flags = 0; 3254 3255 sitd = nsitd; 3256 iso->next = iso->next + ncur; 3257 bp0 = OHCI_PAGE(buf + offs); 3258 ncur = 0; 3259 } 3260 sitd->itd.itd_offset[ncur] = htole16(OHCI_ITD_MK_OFFS(offs)); 3261 offs = noffs; 3262 } 3263 nsitd = ohci_alloc_sitd(sc); 3264 if (nsitd == NULL) { 3265 /* XXX what now? */ 3266 printf("%s: isoc TD alloc failed\n", 3267 USBDEVNAME(sc->sc_bus.bdev)); 3268 return; 3269 } 3270 /* Fixup last used ITD */ 3271 sitd->itd.itd_flags = htole32( 3272 OHCI_ITD_NOCC | 3273 OHCI_ITD_SET_SF(iso->next) | 3274 OHCI_ITD_SET_DI(0) | 3275 OHCI_ITD_SET_FC(ncur)); 3276 sitd->itd.itd_bp0 = htole32(bp0); 3277 sitd->nextitd = nsitd; 3278 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 3279 sitd->itd.itd_be = htole32(bp0 + offs - 1); 3280 sitd->xfer = xfer; 3281 sitd->flags = OHCI_CALL_DONE; 3282 3283 iso->next = iso->next + ncur; 3284 iso->inuse += nframes; 3285 3286 xfer->actlen = offs; /* XXX pretend we did it all */ 3287 3288 xfer->status = USBD_IN_PROGRESS; 3289 3290 #ifdef OHCI_DEBUG 3291 if (ohcidebug > 5) { 3292 DPRINTF(("ohci_device_isoc_enter: frame=%d\n", 3293 le32toh(sc->sc_hcca->hcca_frame_number))); 3294 ohci_dump_itds(xfer->hcpriv); 3295 ohci_dump_ed(sed); 3296 } 3297 #endif 3298 3299 s = splusb(); 3300 sed->ed.ed_tailp = htole32(nsitd->physaddr); 3301 opipe->tail.itd = nsitd; 3302 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 3303 splx(s); 3304 3305 #ifdef OHCI_DEBUG 3306 if (ohcidebug > 5) { 3307 delay(150000); 3308 DPRINTF(("ohci_device_isoc_enter: after frame=%d\n", 3309 le32toh(sc->sc_hcca->hcca_frame_number))); 3310 ohci_dump_itds(xfer->hcpriv); 3311 ohci_dump_ed(sed); 3312 } 3313 #endif 3314 } 3315 3316 usbd_status 3317 ohci_device_isoc_start(usbd_xfer_handle xfer) 3318 { 3319 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3320 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3321 3322 DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer)); 3323 3324 if (sc->sc_dying) 3325 return (USBD_IOERROR); 3326 3327 #ifdef DIAGNOSTIC 3328 if (xfer->status != USBD_IN_PROGRESS) 3329 printf("ohci_device_isoc_start: not in progress %p\n", xfer); 3330 #endif 3331 3332 /* XXX anything to do? */ 3333 3334 return (USBD_IN_PROGRESS); 3335 } 3336 3337 void 3338 ohci_device_isoc_abort(usbd_xfer_handle xfer) 3339 { 3340 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3341 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3342 ohci_soft_ed_t *sed; 3343 ohci_soft_itd_t *sitd; 3344 int s; 3345 3346 s = splusb(); 3347 3348 DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer)); 3349 3350 /* Transfer is already done. */ 3351 if (xfer->status != USBD_NOT_STARTED && 3352 xfer->status != USBD_IN_PROGRESS) { 3353 splx(s); 3354 printf("ohci_device_isoc_abort: early return\n"); 3355 return; 3356 } 3357 3358 /* Give xfer the requested abort code. */ 3359 xfer->status = USBD_CANCELLED; 3360 3361 sed = opipe->sed; 3362 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 3363 3364 sitd = xfer->hcpriv; 3365 #ifdef DIAGNOSTIC 3366 if (sitd == NULL) { 3367 splx(s); 3368 printf("ohci_device_isoc_abort: hcpriv==0\n"); 3369 return; 3370 } 3371 #endif 3372 for (; sitd->xfer == xfer; sitd = sitd->nextitd) { 3373 #ifdef DIAGNOSTIC 3374 DPRINTFN(1,("abort sets done sitd=%p\n", sitd)); 3375 sitd->isdone = 1; 3376 #endif 3377 } 3378 3379 splx(s); 3380 3381 usb_delay_ms(&sc->sc_bus, OHCI_ITD_NOFFSET); 3382 3383 s = splusb(); 3384 3385 /* Run callback. */ 3386 usb_transfer_complete(xfer); 3387 3388 sed->ed.ed_headp = htole32(sitd->physaddr); /* unlink TDs */ 3389 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 3390 3391 splx(s); 3392 } 3393 3394 void 3395 ohci_device_isoc_done(usbd_xfer_handle xfer) 3396 { 3397 DPRINTFN(1,("ohci_device_isoc_done: xfer=%p\n", xfer)); 3398 } 3399 3400 usbd_status 3401 ohci_setup_isoc(usbd_pipe_handle pipe) 3402 { 3403 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3404 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3405 struct iso *iso = &opipe->u.iso; 3406 int s; 3407 3408 iso->next = -1; 3409 iso->inuse = 0; 3410 3411 s = splusb(); 3412 ohci_add_ed(opipe->sed, sc->sc_isoc_head); 3413 splx(s); 3414 3415 return (USBD_NORMAL_COMPLETION); 3416 } 3417 3418 void 3419 ohci_device_isoc_close(usbd_pipe_handle pipe) 3420 { 3421 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3422 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3423 3424 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe)); 3425 ohci_close_pipe(pipe, sc->sc_isoc_head); 3426 #ifdef DIAGNOSTIC 3427 opipe->tail.itd->isdone = 1; 3428 #endif 3429 ohci_free_sitd(sc, opipe->tail.itd); 3430 } 3431
Indexes created Tue Sep 23 07:09:52 GMT 2025