ohci.c revision 1.157.2.2
1 /* $NetBSD: ohci.c,v 1.157.2.2 2008/09/28 16:06:39 jdc Exp $ */ 2 /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */ 3 4 /* 5 * Copyright (c) 1998, 2004, 2005 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Lennart Augustsson (lennart (at) augustsson.net) at 10 * Carlstedt Research & Technology. 11 * This code is derived from software contributed to The NetBSD Foundation 12 * by Charles M. Hannum. 13 * 14 * Redistribution and use in source and binary forms, with or without 15 * modification, are permitted provided that the following conditions 16 * are met: 17 * 1. Redistributions of source code must retain the above copyright 18 * notice, this list of conditions and the following disclaimer. 19 * 2. Redistributions in binary form must reproduce the above copyright 20 * notice, this list of conditions and the following disclaimer in the 21 * documentation and/or other materials provided with the distribution. 22 * 3. All advertising materials mentioning features or use of this software 23 * must display the following acknowledgement: 24 * This product includes software developed by the NetBSD 25 * Foundation, Inc. and its contributors. 26 * 4. Neither the name of The NetBSD Foundation nor the names of its 27 * contributors may be used to endorse or promote products derived 28 * from this software without specific prior written permission. 29 * 30 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 31 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 32 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 33 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 34 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 35 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 36 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 37 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 38 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 39 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 40 * POSSIBILITY OF SUCH DAMAGE. 41 */ 42 43 /* 44 * USB Open Host Controller driver. 45 * 46 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html 47 * USB spec: http://www.usb.org/developers/docs/usbspec.zip 48 */ 49 50 #include <sys/cdefs.h> 51 __KERNEL_RCSID(0, "$NetBSD: ohci.c,v 1.157.2.2 2008/09/28 16:06:39 jdc Exp $"); 52 53 #include <sys/param.h> 54 #include <sys/systm.h> 55 #include <sys/malloc.h> 56 #if defined(__NetBSD__) || defined(__OpenBSD__) 57 #include <sys/kernel.h> 58 #include <sys/device.h> 59 #include <sys/select.h> 60 #include <uvm/uvm_extern.h> 61 #elif defined(__FreeBSD__) 62 #include <sys/module.h> 63 #include <sys/bus.h> 64 #include <machine/bus_pio.h> 65 #include <machine/bus_memio.h> 66 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 67 #include <machine/cpu.h> 68 #endif 69 #endif 70 #include <sys/proc.h> 71 #include <sys/queue.h> 72 73 #include <machine/bus.h> 74 #include <machine/endian.h> 75 76 #include <dev/usb/usb.h> 77 #include <dev/usb/usbdi.h> 78 #include <dev/usb/usbdivar.h> 79 #include <dev/usb/usb_mem.h> 80 #include <dev/usb/usb_quirks.h> 81 82 #include <dev/usb/ohcireg.h> 83 #include <dev/usb/ohcivar.h> 84 85 #if defined(__FreeBSD__) 86 #include <machine/clock.h> 87 88 #define delay(d) DELAY(d) 89 #endif 90 91 #if defined(__OpenBSD__) 92 struct cfdriver ohci_cd = { 93 NULL, "ohci", DV_DULL 94 }; 95 #endif 96 97 #ifdef OHCI_DEBUG 98 #define DPRINTF(x) if (ohcidebug) logprintf x 99 #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x 100 int ohcidebug = 0; 101 #ifndef __NetBSD__ 102 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 103 #endif 104 #else 105 #define DPRINTF(x) 106 #define DPRINTFN(n,x) 107 #endif 108 109 /* 110 * The OHCI controller is little endian, so on big endian machines 111 * the data strored in memory needs to be swapped. 112 */ 113 #if defined(__FreeBSD__) || defined(__OpenBSD__) 114 #if BYTE_ORDER == BIG_ENDIAN 115 #define htole32(x) (bswap32(x)) 116 #define le32toh(x) (bswap32(x)) 117 #else 118 #define htole32(x) (x) 119 #define le32toh(x) (x) 120 #endif 121 #endif 122 123 struct ohci_pipe; 124 125 Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *); 126 Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *); 127 128 Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *); 129 Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *); 130 131 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *); 132 Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *); 133 134 #if 0 135 Static void ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *, 136 ohci_soft_td_t *); 137 #endif 138 Static usbd_status ohci_alloc_std_chain(struct ohci_pipe *, 139 ohci_softc_t *, int, int, usbd_xfer_handle, 140 ohci_soft_td_t *, ohci_soft_td_t **); 141 142 Static void ohci_shutdown(void *v); 143 Static void ohci_power(int, void *); 144 Static usbd_status ohci_open(usbd_pipe_handle); 145 Static void ohci_poll(struct usbd_bus *); 146 Static void ohci_softintr(void *); 147 Static void ohci_waitintr(ohci_softc_t *, usbd_xfer_handle); 148 Static void ohci_rhsc(ohci_softc_t *, usbd_xfer_handle); 149 150 Static usbd_status ohci_device_request(usbd_xfer_handle xfer); 151 Static void ohci_add_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 152 Static void ohci_rem_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 153 Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *); 154 Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *); 155 Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t); 156 Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *); 157 Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *); 158 Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t); 159 160 Static usbd_status ohci_setup_isoc(usbd_pipe_handle pipe); 161 Static void ohci_device_isoc_enter(usbd_xfer_handle); 162 163 Static usbd_status ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 164 Static void ohci_freem(struct usbd_bus *, usb_dma_t *); 165 166 Static usbd_xfer_handle ohci_allocx(struct usbd_bus *); 167 Static void ohci_freex(struct usbd_bus *, usbd_xfer_handle); 168 169 Static usbd_status ohci_root_ctrl_transfer(usbd_xfer_handle); 170 Static usbd_status ohci_root_ctrl_start(usbd_xfer_handle); 171 Static void ohci_root_ctrl_abort(usbd_xfer_handle); 172 Static void ohci_root_ctrl_close(usbd_pipe_handle); 173 Static void ohci_root_ctrl_done(usbd_xfer_handle); 174 175 Static usbd_status ohci_root_intr_transfer(usbd_xfer_handle); 176 Static usbd_status ohci_root_intr_start(usbd_xfer_handle); 177 Static void ohci_root_intr_abort(usbd_xfer_handle); 178 Static void ohci_root_intr_close(usbd_pipe_handle); 179 Static void ohci_root_intr_done(usbd_xfer_handle); 180 181 Static usbd_status ohci_device_ctrl_transfer(usbd_xfer_handle); 182 Static usbd_status ohci_device_ctrl_start(usbd_xfer_handle); 183 Static void ohci_device_ctrl_abort(usbd_xfer_handle); 184 Static void ohci_device_ctrl_close(usbd_pipe_handle); 185 Static void ohci_device_ctrl_done(usbd_xfer_handle); 186 187 Static usbd_status ohci_device_bulk_transfer(usbd_xfer_handle); 188 Static usbd_status ohci_device_bulk_start(usbd_xfer_handle); 189 Static void ohci_device_bulk_abort(usbd_xfer_handle); 190 Static void ohci_device_bulk_close(usbd_pipe_handle); 191 Static void ohci_device_bulk_done(usbd_xfer_handle); 192 193 Static usbd_status ohci_device_intr_transfer(usbd_xfer_handle); 194 Static usbd_status ohci_device_intr_start(usbd_xfer_handle); 195 Static void ohci_device_intr_abort(usbd_xfer_handle); 196 Static void ohci_device_intr_close(usbd_pipe_handle); 197 Static void ohci_device_intr_done(usbd_xfer_handle); 198 199 Static usbd_status ohci_device_isoc_transfer(usbd_xfer_handle); 200 Static usbd_status ohci_device_isoc_start(usbd_xfer_handle); 201 Static void ohci_device_isoc_abort(usbd_xfer_handle); 202 Static void ohci_device_isoc_close(usbd_pipe_handle); 203 Static void ohci_device_isoc_done(usbd_xfer_handle); 204 205 Static usbd_status ohci_device_setintr(ohci_softc_t *sc, 206 struct ohci_pipe *pipe, int ival); 207 208 Static int ohci_str(usb_string_descriptor_t *, int, const char *); 209 210 Static void ohci_timeout(void *); 211 Static void ohci_timeout_task(void *); 212 Static void ohci_rhsc_enable(void *); 213 214 Static void ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *); 215 Static void ohci_abort_xfer(usbd_xfer_handle, usbd_status); 216 217 Static void ohci_device_clear_toggle(usbd_pipe_handle pipe); 218 Static void ohci_noop(usbd_pipe_handle pipe); 219 220 #ifdef OHCI_DEBUG 221 Static void ohci_dumpregs(ohci_softc_t *); 222 Static void ohci_dump_tds(ohci_soft_td_t *); 223 Static void ohci_dump_td(ohci_soft_td_t *); 224 Static void ohci_dump_ed(ohci_soft_ed_t *); 225 Static void ohci_dump_itd(ohci_soft_itd_t *); 226 Static void ohci_dump_itds(ohci_soft_itd_t *); 227 #endif 228 229 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 230 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 231 #define OWRITE1(sc, r, x) \ 232 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 233 #define OWRITE2(sc, r, x) \ 234 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 235 #define OWRITE4(sc, r, x) \ 236 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 237 #define OREAD1(sc, r) (OBARR(sc), bus_space_read_1((sc)->iot, (sc)->ioh, (r))) 238 #define OREAD2(sc, r) (OBARR(sc), bus_space_read_2((sc)->iot, (sc)->ioh, (r))) 239 #define OREAD4(sc, r) (OBARR(sc), bus_space_read_4((sc)->iot, (sc)->ioh, (r))) 240 241 /* Reverse the bits in a value 0 .. 31 */ 242 Static u_int8_t revbits[OHCI_NO_INTRS] = 243 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 244 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 245 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 246 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 247 248 struct ohci_pipe { 249 struct usbd_pipe pipe; 250 ohci_soft_ed_t *sed; 251 union { 252 ohci_soft_td_t *td; 253 ohci_soft_itd_t *itd; 254 } tail; 255 /* Info needed for different pipe kinds. */ 256 union { 257 /* Control pipe */ 258 struct { 259 usb_dma_t reqdma; 260 u_int length; 261 ohci_soft_td_t *setup, *data, *stat; 262 } ctl; 263 /* Interrupt pipe */ 264 struct { 265 int nslots; 266 int pos; 267 } intr; 268 /* Bulk pipe */ 269 struct { 270 u_int length; 271 int isread; 272 } bulk; 273 /* Iso pipe */ 274 struct iso { 275 int next, inuse; 276 } iso; 277 } u; 278 }; 279 280 #define OHCI_INTR_ENDPT 1 281 282 Static struct usbd_bus_methods ohci_bus_methods = { 283 ohci_open, 284 ohci_softintr, 285 ohci_poll, 286 ohci_allocm, 287 ohci_freem, 288 ohci_allocx, 289 ohci_freex, 290 }; 291 292 Static struct usbd_pipe_methods ohci_root_ctrl_methods = { 293 ohci_root_ctrl_transfer, 294 ohci_root_ctrl_start, 295 ohci_root_ctrl_abort, 296 ohci_root_ctrl_close, 297 ohci_noop, 298 ohci_root_ctrl_done, 299 }; 300 301 Static struct usbd_pipe_methods ohci_root_intr_methods = { 302 ohci_root_intr_transfer, 303 ohci_root_intr_start, 304 ohci_root_intr_abort, 305 ohci_root_intr_close, 306 ohci_noop, 307 ohci_root_intr_done, 308 }; 309 310 Static struct usbd_pipe_methods ohci_device_ctrl_methods = { 311 ohci_device_ctrl_transfer, 312 ohci_device_ctrl_start, 313 ohci_device_ctrl_abort, 314 ohci_device_ctrl_close, 315 ohci_noop, 316 ohci_device_ctrl_done, 317 }; 318 319 Static struct usbd_pipe_methods ohci_device_intr_methods = { 320 ohci_device_intr_transfer, 321 ohci_device_intr_start, 322 ohci_device_intr_abort, 323 ohci_device_intr_close, 324 ohci_device_clear_toggle, 325 ohci_device_intr_done, 326 }; 327 328 Static struct usbd_pipe_methods ohci_device_bulk_methods = { 329 ohci_device_bulk_transfer, 330 ohci_device_bulk_start, 331 ohci_device_bulk_abort, 332 ohci_device_bulk_close, 333 ohci_device_clear_toggle, 334 ohci_device_bulk_done, 335 }; 336 337 Static struct usbd_pipe_methods ohci_device_isoc_methods = { 338 ohci_device_isoc_transfer, 339 ohci_device_isoc_start, 340 ohci_device_isoc_abort, 341 ohci_device_isoc_close, 342 ohci_noop, 343 ohci_device_isoc_done, 344 }; 345 346 #if defined(__NetBSD__) || defined(__OpenBSD__) 347 int 348 ohci_activate(device_ptr_t self, enum devact act) 349 { 350 struct ohci_softc *sc = (struct ohci_softc *)self; 351 int rv = 0; 352 353 switch (act) { 354 case DVACT_ACTIVATE: 355 return (EOPNOTSUPP); 356 357 case DVACT_DEACTIVATE: 358 if (sc->sc_child != NULL) 359 rv = config_deactivate(sc->sc_child); 360 sc->sc_dying = 1; 361 break; 362 } 363 return (rv); 364 } 365 366 int 367 ohci_detach(struct ohci_softc *sc, int flags) 368 { 369 int rv = 0; 370 371 if (sc->sc_child != NULL) 372 rv = config_detach(sc->sc_child, flags); 373 374 if (rv != 0) 375 return (rv); 376 377 usb_uncallout(sc->sc_tmo_rhsc, ohci_rhsc_enable, sc); 378 379 #if defined(__NetBSD__) || defined(__OpenBSD__) 380 powerhook_disestablish(sc->sc_powerhook); 381 shutdownhook_disestablish(sc->sc_shutdownhook); 382 #endif 383 384 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 385 386 /* free data structures XXX */ 387 388 return (rv); 389 } 390 #endif 391 392 ohci_soft_ed_t * 393 ohci_alloc_sed(ohci_softc_t *sc) 394 { 395 ohci_soft_ed_t *sed; 396 usbd_status err; 397 int i, offs; 398 usb_dma_t dma; 399 400 if (sc->sc_freeeds == NULL) { 401 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 402 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 403 OHCI_ED_ALIGN, &dma); 404 if (err) 405 return (0); 406 for(i = 0; i < OHCI_SED_CHUNK; i++) { 407 offs = i * OHCI_SED_SIZE; 408 sed = KERNADDR(&dma, offs); 409 sed->physaddr = DMAADDR(&dma, offs); 410 sed->dma = dma; 411 sed->offs = offs; 412 sed->next = sc->sc_freeeds; 413 sc->sc_freeeds = sed; 414 } 415 } 416 sed = sc->sc_freeeds; 417 sc->sc_freeeds = sed->next; 418 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 419 sed->next = 0; 420 return (sed); 421 } 422 423 void 424 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 425 { 426 sed->next = sc->sc_freeeds; 427 sc->sc_freeeds = sed; 428 } 429 430 ohci_soft_td_t * 431 ohci_alloc_std(ohci_softc_t *sc) 432 { 433 ohci_soft_td_t *std; 434 usbd_status err; 435 int i, offs; 436 usb_dma_t dma; 437 int s; 438 439 if (sc->sc_freetds == NULL) { 440 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 441 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 442 OHCI_TD_ALIGN, &dma); 443 if (err) 444 return (NULL); 445 s = splusb(); 446 for(i = 0; i < OHCI_STD_CHUNK; i++) { 447 offs = i * OHCI_STD_SIZE; 448 std = KERNADDR(&dma, offs); 449 std->physaddr = DMAADDR(&dma, offs); 450 std->dma = dma; 451 std->offs = offs; 452 std->nexttd = sc->sc_freetds; 453 sc->sc_freetds = std; 454 } 455 splx(s); 456 } 457 458 s = splusb(); 459 std = sc->sc_freetds; 460 sc->sc_freetds = std->nexttd; 461 memset(&std->td, 0, sizeof(ohci_td_t)); 462 std->nexttd = NULL; 463 std->xfer = NULL; 464 ohci_hash_add_td(sc, std); 465 splx(s); 466 467 return (std); 468 } 469 470 void 471 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std) 472 { 473 int s; 474 475 s = splusb(); 476 ohci_hash_rem_td(sc, std); 477 std->nexttd = sc->sc_freetds; 478 sc->sc_freetds = std; 479 splx(s); 480 } 481 482 usbd_status 483 ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc, 484 int alen, int rd, usbd_xfer_handle xfer, 485 ohci_soft_td_t *sp, ohci_soft_td_t **ep) 486 { 487 ohci_soft_td_t *next, *cur; 488 ohci_physaddr_t dataphys, dataphysend; 489 u_int32_t tdflags; 490 int len, curlen; 491 usb_dma_t *dma = &xfer->dmabuf; 492 u_int16_t flags = xfer->flags; 493 494 DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen)); 495 496 len = alen; 497 cur = sp; 498 dataphys = DMAADDR(dma, 0); 499 dataphysend = OHCI_PAGE(dataphys + len - 1); 500 usb_syncmem(dma, 0, len, 501 rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 502 tdflags = htole32( 503 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 504 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) | 505 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR); 506 507 for (;;) { 508 next = ohci_alloc_std(sc); 509 if (next == NULL) 510 goto nomem; 511 512 /* The OHCI hardware can handle at most one page crossing. */ 513 if (OHCI_PAGE(dataphys) == dataphysend || 514 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) { 515 /* we can handle it in this TD */ 516 curlen = len; 517 } else { 518 /* must use multiple TDs, fill as much as possible. */ 519 curlen = 2 * OHCI_PAGE_SIZE - 520 (dataphys & (OHCI_PAGE_SIZE-1)); 521 /* the length must be a multiple of the max size */ 522 curlen -= curlen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize); 523 #ifdef DIAGNOSTIC 524 if (curlen == 0) 525 panic("ohci_alloc_std: curlen == 0"); 526 #endif 527 } 528 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x " 529 "dataphysend=0x%08x len=%d curlen=%d\n", 530 dataphys, dataphysend, 531 len, curlen)); 532 len -= curlen; 533 534 cur->td.td_flags = tdflags; 535 cur->td.td_cbp = htole32(dataphys); 536 cur->nexttd = next; 537 cur->td.td_nexttd = htole32(next->physaddr); 538 cur->td.td_be = htole32(dataphys + curlen - 1); 539 cur->len = curlen; 540 cur->flags = OHCI_ADD_LEN; 541 cur->xfer = xfer; 542 usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td), 543 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 544 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n", 545 dataphys, dataphys + curlen - 1)); 546 if (len == 0) 547 break; 548 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n")); 549 dataphys += curlen; 550 cur = next; 551 } 552 if ((flags & USBD_FORCE_SHORT_XFER) && 553 alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) { 554 /* Force a 0 length transfer at the end. */ 555 556 cur = next; 557 next = ohci_alloc_std(sc); 558 if (next == NULL) 559 goto nomem; 560 561 cur->td.td_flags = tdflags; 562 cur->td.td_cbp = 0; /* indicate 0 length packet */ 563 cur->nexttd = next; 564 cur->td.td_nexttd = htole32(next->physaddr); 565 cur->td.td_be = ~0; 566 cur->len = 0; 567 cur->flags = 0; 568 cur->xfer = xfer; 569 usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td), 570 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 571 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n")); 572 } 573 *ep = cur; 574 575 return (USBD_NORMAL_COMPLETION); 576 577 nomem: 578 /* XXX free chain */ 579 return (USBD_NOMEM); 580 } 581 582 #if 0 583 Static void 584 ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std, 585 ohci_soft_td_t *stdend) 586 { 587 ohci_soft_td_t *p; 588 589 for (; std != stdend; std = p) { 590 p = std->nexttd; 591 ohci_free_std(sc, std); 592 } 593 } 594 #endif 595 596 ohci_soft_itd_t * 597 ohci_alloc_sitd(ohci_softc_t *sc) 598 { 599 ohci_soft_itd_t *sitd; 600 usbd_status err; 601 int i, s, offs; 602 usb_dma_t dma; 603 604 if (sc->sc_freeitds == NULL) { 605 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n")); 606 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK, 607 OHCI_ITD_ALIGN, &dma); 608 if (err) 609 return (NULL); 610 s = splusb(); 611 for(i = 0; i < OHCI_SITD_CHUNK; i++) { 612 offs = i * OHCI_SITD_SIZE; 613 sitd = KERNADDR(&dma, offs); 614 sitd->physaddr = DMAADDR(&dma, offs); 615 sitd->dma = dma; 616 sitd->offs = offs; 617 sitd->nextitd = sc->sc_freeitds; 618 sc->sc_freeitds = sitd; 619 } 620 splx(s); 621 } 622 623 s = splusb(); 624 sitd = sc->sc_freeitds; 625 sc->sc_freeitds = sitd->nextitd; 626 memset(&sitd->itd, 0, sizeof(ohci_itd_t)); 627 sitd->nextitd = NULL; 628 sitd->xfer = NULL; 629 ohci_hash_add_itd(sc, sitd); 630 splx(s); 631 632 #ifdef DIAGNOSTIC 633 sitd->isdone = 0; 634 #endif 635 636 return (sitd); 637 } 638 639 void 640 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 641 { 642 int s; 643 644 DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd)); 645 646 #ifdef DIAGNOSTIC 647 if (!sitd->isdone) { 648 panic("ohci_free_sitd: sitd=%p not done", sitd); 649 return; 650 } 651 /* Warn double free */ 652 sitd->isdone = 0; 653 #endif 654 655 s = splusb(); 656 ohci_hash_rem_itd(sc, sitd); 657 sitd->nextitd = sc->sc_freeitds; 658 sc->sc_freeitds = sitd; 659 splx(s); 660 } 661 662 usbd_status 663 ohci_init(ohci_softc_t *sc) 664 { 665 ohci_soft_ed_t *sed, *psed; 666 usbd_status err; 667 int i; 668 u_int32_t s, ctl, ival, hcr, fm, per, rev, desca; 669 670 DPRINTF(("ohci_init: start\n")); 671 #if defined(__OpenBSD__) 672 printf(","); 673 #else 674 printf("%s:", USBDEVNAME(sc->sc_bus.bdev)); 675 #endif 676 rev = OREAD4(sc, OHCI_REVISION); 677 printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev), 678 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 679 680 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 681 printf("%s: unsupported OHCI revision\n", 682 USBDEVNAME(sc->sc_bus.bdev)); 683 sc->sc_bus.usbrev = USBREV_UNKNOWN; 684 return (USBD_INVAL); 685 } 686 sc->sc_bus.usbrev = USBREV_1_0; 687 688 for (i = 0; i < OHCI_HASH_SIZE; i++) 689 LIST_INIT(&sc->sc_hash_tds[i]); 690 for (i = 0; i < OHCI_HASH_SIZE; i++) 691 LIST_INIT(&sc->sc_hash_itds[i]); 692 693 SIMPLEQ_INIT(&sc->sc_free_xfers); 694 695 #ifdef __NetBSD__ 696 usb_setup_reserve(sc, &sc->sc_dma_reserve, sc->sc_bus.dmatag, 697 USB_MEM_RESERVE); 698 #endif 699 700 /* XXX determine alignment by R/W */ 701 /* Allocate the HCCA area. */ 702 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 703 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 704 if (err) 705 return (err); 706 sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0); 707 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 708 709 sc->sc_eintrs = OHCI_NORMAL_INTRS; 710 711 /* Allocate dummy ED that starts the control list. */ 712 sc->sc_ctrl_head = ohci_alloc_sed(sc); 713 if (sc->sc_ctrl_head == NULL) { 714 err = USBD_NOMEM; 715 goto bad1; 716 } 717 sc->sc_ctrl_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 718 719 /* Allocate dummy ED that starts the bulk list. */ 720 sc->sc_bulk_head = ohci_alloc_sed(sc); 721 if (sc->sc_bulk_head == NULL) { 722 err = USBD_NOMEM; 723 goto bad2; 724 } 725 sc->sc_bulk_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 726 usb_syncmem(&sc->sc_bulk_head->dma, sc->sc_bulk_head->offs, 727 sizeof(sc->sc_bulk_head->ed), 728 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 729 730 /* Allocate dummy ED that starts the isochronous list. */ 731 sc->sc_isoc_head = ohci_alloc_sed(sc); 732 if (sc->sc_isoc_head == NULL) { 733 err = USBD_NOMEM; 734 goto bad3; 735 } 736 sc->sc_isoc_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 737 usb_syncmem(&sc->sc_isoc_head->dma, sc->sc_isoc_head->offs, 738 sizeof(sc->sc_isoc_head->ed), 739 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 740 741 /* Allocate all the dummy EDs that make up the interrupt tree. */ 742 for (i = 0; i < OHCI_NO_EDS; i++) { 743 sed = ohci_alloc_sed(sc); 744 if (sed == NULL) { 745 while (--i >= 0) 746 ohci_free_sed(sc, sc->sc_eds[i]); 747 err = USBD_NOMEM; 748 goto bad4; 749 } 750 /* All ED fields are set to 0. */ 751 sc->sc_eds[i] = sed; 752 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 753 if (i != 0) 754 psed = sc->sc_eds[(i-1) / 2]; 755 else 756 psed= sc->sc_isoc_head; 757 sed->next = psed; 758 sed->ed.ed_nexted = htole32(psed->physaddr); 759 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 760 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 761 } 762 /* 763 * Fill HCCA interrupt table. The bit reversal is to get 764 * the tree set up properly to spread the interrupts. 765 */ 766 for (i = 0; i < OHCI_NO_INTRS; i++) 767 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 768 htole32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 769 usb_syncmem(&sc->sc_hccadma, 0, OHCI_HCCA_SIZE, 770 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 771 772 #ifdef OHCI_DEBUG 773 if (ohcidebug > 15) { 774 for (i = 0; i < OHCI_NO_EDS; i++) { 775 printf("ed#%d ", i); 776 ohci_dump_ed(sc->sc_eds[i]); 777 } 778 printf("iso "); 779 ohci_dump_ed(sc->sc_isoc_head); 780 } 781 #endif 782 783 /* Determine in what context we are running. */ 784 ctl = OREAD4(sc, OHCI_CONTROL); 785 if (ctl & OHCI_IR) { 786 /* SMM active, request change */ 787 DPRINTF(("ohci_init: SMM active, request owner change\n")); 788 s = OREAD4(sc, OHCI_COMMAND_STATUS); 789 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 790 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 791 usb_delay_ms(&sc->sc_bus, 1); 792 ctl = OREAD4(sc, OHCI_CONTROL); 793 } 794 if ((ctl & OHCI_IR) == 0) { 795 printf("%s: SMM does not respond, resetting\n", 796 USBDEVNAME(sc->sc_bus.bdev)); 797 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 798 goto reset; 799 } 800 #if 0 801 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */ 802 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 803 /* BIOS started controller. */ 804 DPRINTF(("ohci_init: BIOS active\n")); 805 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 806 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL); 807 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 808 } 809 #endif 810 } else { 811 DPRINTF(("ohci_init: cold started\n")); 812 reset: 813 /* Controller was cold started. */ 814 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 815 } 816 817 /* 818 * This reset should not be necessary according to the OHCI spec, but 819 * without it some controllers do not start. 820 */ 821 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 822 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 823 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 824 825 /* We now own the host controller and the bus has been reset. */ 826 ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL)); 827 828 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 829 /* Nominal time for a reset is 10 us. */ 830 for (i = 0; i < 10; i++) { 831 delay(10); 832 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 833 if (!hcr) 834 break; 835 } 836 if (hcr) { 837 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 838 err = USBD_IOERROR; 839 goto bad5; 840 } 841 #ifdef OHCI_DEBUG 842 if (ohcidebug > 15) 843 ohci_dumpregs(sc); 844 #endif 845 846 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 847 848 /* Set up HC registers. */ 849 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 850 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 851 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 852 /* disable all interrupts and then switch on all desired interrupts */ 853 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 854 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 855 /* switch on desired functional features */ 856 ctl = OREAD4(sc, OHCI_CONTROL); 857 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 858 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 859 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL; 860 /* And finally start it! */ 861 OWRITE4(sc, OHCI_CONTROL, ctl); 862 863 /* 864 * The controller is now OPERATIONAL. Set a some final 865 * registers that should be set earlier, but that the 866 * controller ignores when in the SUSPEND state. 867 */ 868 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 869 fm |= OHCI_FSMPS(ival) | ival; 870 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 871 per = OHCI_PERIODIC(ival); /* 90% periodic */ 872 OWRITE4(sc, OHCI_PERIODIC_START, per); 873 874 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */ 875 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 876 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP); 877 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 878 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY); 879 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca); 880 881 /* 882 * The AMD756 requires a delay before re-reading the register, 883 * otherwise it will occasionally report 0 ports. 884 */ 885 sc->sc_noport = 0; 886 for (i = 0; i < 10 && sc->sc_noport == 0; i++) { 887 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY); 888 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 889 } 890 891 #ifdef OHCI_DEBUG 892 if (ohcidebug > 5) 893 ohci_dumpregs(sc); 894 #endif 895 896 /* Set up the bus struct. */ 897 sc->sc_bus.methods = &ohci_bus_methods; 898 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 899 900 #if defined(__NetBSD__) || defined(__OpenBSD__) 901 sc->sc_control = sc->sc_intre = 0; 902 sc->sc_powerhook = powerhook_establish(ohci_power, sc); 903 sc->sc_shutdownhook = shutdownhook_establish(ohci_shutdown, sc); 904 #endif 905 906 usb_callout_init(sc->sc_tmo_rhsc); 907 908 return (USBD_NORMAL_COMPLETION); 909 910 bad5: 911 for (i = 0; i < OHCI_NO_EDS; i++) 912 ohci_free_sed(sc, sc->sc_eds[i]); 913 bad4: 914 ohci_free_sed(sc, sc->sc_isoc_head); 915 bad3: 916 ohci_free_sed(sc, sc->sc_bulk_head); 917 bad2: 918 ohci_free_sed(sc, sc->sc_ctrl_head); 919 bad1: 920 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 921 return (err); 922 } 923 924 usbd_status 925 ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 926 { 927 #if defined(__NetBSD__) || defined(__OpenBSD__) 928 struct ohci_softc *sc = (struct ohci_softc *)bus; 929 #endif 930 usbd_status status; 931 932 status = usb_allocmem(&sc->sc_bus, size, 0, dma); 933 #ifdef __NetBSD__ 934 if (status == USBD_NOMEM) 935 status = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size); 936 #endif 937 return status; 938 } 939 940 void 941 ohci_freem(struct usbd_bus *bus, usb_dma_t *dma) 942 { 943 #if defined(__NetBSD__) || defined(__OpenBSD__) 944 struct ohci_softc *sc = (struct ohci_softc *)bus; 945 #endif 946 #ifdef __NetBSD__ 947 if (dma->block->flags & USB_DMA_RESERVE) { 948 usb_reserve_freem(&((struct ohci_softc *)bus)->sc_dma_reserve, 949 dma); 950 return; 951 } 952 #endif 953 usb_freemem(&sc->sc_bus, dma); 954 } 955 956 usbd_xfer_handle 957 ohci_allocx(struct usbd_bus *bus) 958 { 959 struct ohci_softc *sc = (struct ohci_softc *)bus; 960 usbd_xfer_handle xfer; 961 962 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 963 if (xfer != NULL) { 964 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 965 #ifdef DIAGNOSTIC 966 if (xfer->busy_free != XFER_FREE) { 967 printf("ohci_allocx: xfer=%p not free, 0x%08x\n", xfer, 968 xfer->busy_free); 969 } 970 #endif 971 } else { 972 xfer = malloc(sizeof(struct ohci_xfer), M_USB, M_NOWAIT); 973 } 974 if (xfer != NULL) { 975 memset(xfer, 0, sizeof (struct ohci_xfer)); 976 #ifdef DIAGNOSTIC 977 xfer->busy_free = XFER_BUSY; 978 #endif 979 } 980 return (xfer); 981 } 982 983 void 984 ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 985 { 986 struct ohci_softc *sc = (struct ohci_softc *)bus; 987 988 #ifdef DIAGNOSTIC 989 if (xfer->busy_free != XFER_BUSY) { 990 printf("ohci_freex: xfer=%p not busy, 0x%08x\n", xfer, 991 xfer->busy_free); 992 return; 993 } 994 xfer->busy_free = XFER_FREE; 995 #endif 996 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 997 } 998 999 /* 1000 * Shut down the controller when the system is going down. 1001 */ 1002 void 1003 ohci_shutdown(void *v) 1004 { 1005 ohci_softc_t *sc = v; 1006 1007 DPRINTF(("ohci_shutdown: stopping the HC\n")); 1008 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1009 } 1010 1011 /* 1012 * Handle suspend/resume. 1013 * 1014 * We need to switch to polling mode here, because this routine is 1015 * called from an intterupt context. This is all right since we 1016 * are almost suspended anyway. 1017 */ 1018 void 1019 ohci_power(int why, void *v) 1020 { 1021 ohci_softc_t *sc = v; 1022 u_int32_t ctl; 1023 int s; 1024 1025 #ifdef OHCI_DEBUG 1026 DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why)); 1027 ohci_dumpregs(sc); 1028 #endif 1029 1030 s = splhardusb(); 1031 switch (why) { 1032 case PWR_SUSPEND: 1033 case PWR_STANDBY: 1034 sc->sc_bus.use_polling++; 1035 ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK; 1036 if (sc->sc_control == 0) { 1037 /* 1038 * Preserve register values, in case that APM BIOS 1039 * does not recover them. 1040 */ 1041 sc->sc_control = ctl; 1042 sc->sc_intre = OREAD4(sc, OHCI_INTERRUPT_ENABLE); 1043 } 1044 ctl |= OHCI_HCFS_SUSPEND; 1045 OWRITE4(sc, OHCI_CONTROL, ctl); 1046 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1047 sc->sc_bus.use_polling--; 1048 break; 1049 case PWR_RESUME: 1050 sc->sc_bus.use_polling++; 1051 /* Some broken BIOSes do not recover these values */ 1052 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 1053 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 1054 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 1055 if (sc->sc_intre) 1056 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, 1057 sc->sc_intre & (OHCI_ALL_INTRS | OHCI_MIE)); 1058 if (sc->sc_control) 1059 ctl = sc->sc_control; 1060 else 1061 ctl = OREAD4(sc, OHCI_CONTROL); 1062 ctl |= OHCI_HCFS_RESUME; 1063 OWRITE4(sc, OHCI_CONTROL, ctl); 1064 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 1065 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL; 1066 OWRITE4(sc, OHCI_CONTROL, ctl); 1067 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 1068 sc->sc_control = sc->sc_intre = 0; 1069 sc->sc_bus.use_polling--; 1070 break; 1071 case PWR_SOFTSUSPEND: 1072 case PWR_SOFTSTANDBY: 1073 case PWR_SOFTRESUME: 1074 break; 1075 } 1076 splx(s); 1077 } 1078 1079 #ifdef OHCI_DEBUG 1080 void 1081 ohci_dumpregs(ohci_softc_t *sc) 1082 { 1083 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 1084 OREAD4(sc, OHCI_REVISION), 1085 OREAD4(sc, OHCI_CONTROL), 1086 OREAD4(sc, OHCI_COMMAND_STATUS))); 1087 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 1088 OREAD4(sc, OHCI_INTERRUPT_STATUS), 1089 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 1090 OREAD4(sc, OHCI_INTERRUPT_DISABLE))); 1091 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 1092 OREAD4(sc, OHCI_HCCA), 1093 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 1094 OREAD4(sc, OHCI_CONTROL_HEAD_ED))); 1095 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 1096 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 1097 OREAD4(sc, OHCI_BULK_HEAD_ED), 1098 OREAD4(sc, OHCI_BULK_CURRENT_ED))); 1099 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 1100 OREAD4(sc, OHCI_DONE_HEAD), 1101 OREAD4(sc, OHCI_FM_INTERVAL), 1102 OREAD4(sc, OHCI_FM_REMAINING))); 1103 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 1104 OREAD4(sc, OHCI_FM_NUMBER), 1105 OREAD4(sc, OHCI_PERIODIC_START), 1106 OREAD4(sc, OHCI_LS_THRESHOLD))); 1107 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n", 1108 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 1109 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 1110 OREAD4(sc, OHCI_RH_STATUS))); 1111 DPRINTF((" port1=0x%08x port2=0x%08x\n", 1112 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 1113 OREAD4(sc, OHCI_RH_PORT_STATUS(2)))); 1114 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n", 1115 le32toh(sc->sc_hcca->hcca_frame_number), 1116 le32toh(sc->sc_hcca->hcca_done_head))); 1117 } 1118 #endif 1119 1120 Static int ohci_intr1(ohci_softc_t *); 1121 1122 int 1123 ohci_intr(void *p) 1124 { 1125 ohci_softc_t *sc = p; 1126 1127 if (sc == NULL || sc->sc_dying) 1128 return (0); 1129 1130 /* If we get an interrupt while polling, then just ignore it. */ 1131 if (sc->sc_bus.use_polling) { 1132 #ifdef DIAGNOSTIC 1133 DPRINTFN(16, ("ohci_intr: ignored interrupt while polling\n")); 1134 #endif 1135 /* for level triggered intrs, should do something to ack */ 1136 OWRITE4(sc, OHCI_INTERRUPT_STATUS, 1137 OREAD4(sc, OHCI_INTERRUPT_STATUS)); 1138 1139 return (0); 1140 } 1141 1142 return (ohci_intr1(sc)); 1143 } 1144 1145 Static int 1146 ohci_intr1(ohci_softc_t *sc) 1147 { 1148 u_int32_t intrs, eintrs; 1149 1150 DPRINTFN(14,("ohci_intr1: enter\n")); 1151 1152 /* In case the interrupt occurs before initialization has completed. */ 1153 if (sc == NULL || sc->sc_hcca == NULL) { 1154 #ifdef DIAGNOSTIC 1155 printf("ohci_intr: sc->sc_hcca == NULL\n"); 1156 #endif 1157 return (0); 1158 } 1159 1160 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1161 if (!intrs) 1162 return (0); 1163 1164 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs & ~(OHCI_MIE|OHCI_WDH)); /* Acknowledge */ 1165 eintrs = intrs & sc->sc_eintrs; 1166 if (!eintrs) 1167 return (0); 1168 1169 sc->sc_bus.intr_context++; 1170 sc->sc_bus.no_intrs++; 1171 DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 1172 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 1173 (u_int)eintrs)); 1174 1175 if (eintrs & OHCI_SO) { 1176 sc->sc_overrun_cnt++; 1177 if (usbd_ratecheck(&sc->sc_overrun_ntc)) { 1178 printf("%s: %u scheduling overruns\n", 1179 USBDEVNAME(sc->sc_bus.bdev), sc->sc_overrun_cnt); 1180 sc->sc_overrun_cnt = 0; 1181 } 1182 /* XXX do what */ 1183 eintrs &= ~OHCI_SO; 1184 } 1185 if (eintrs & OHCI_WDH) { 1186 /* 1187 * We block the interrupt below, and reenable it later from 1188 * ohci_softintr(). 1189 */ 1190 usb_schedsoftintr(&sc->sc_bus); 1191 } 1192 if (eintrs & OHCI_RD) { 1193 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev)); 1194 /* XXX process resume detect */ 1195 } 1196 if (eintrs & OHCI_UE) { 1197 printf("%s: unrecoverable error, controller halted\n", 1198 USBDEVNAME(sc->sc_bus.bdev)); 1199 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1200 /* XXX what else */ 1201 } 1202 if (eintrs & OHCI_RHSC) { 1203 /* 1204 * We block the interrupt below, and reenable it later from 1205 * a timeout. 1206 */ 1207 ohci_rhsc(sc, sc->sc_intrxfer); 1208 /* Do not allow RHSC interrupts > 1 per second */ 1209 usb_callout(sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc); 1210 } 1211 1212 sc->sc_bus.intr_context--; 1213 1214 if (eintrs != 0) { 1215 /* Block unprocessed interrupts. */ 1216 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs); 1217 sc->sc_eintrs &= ~eintrs; 1218 DPRINTFN(1, ("%s: blocking intrs 0x%x\n", 1219 USBDEVNAME(sc->sc_bus.bdev), eintrs)); 1220 } 1221 1222 return (1); 1223 } 1224 1225 void 1226 ohci_rhsc_enable(void *v_sc) 1227 { 1228 ohci_softc_t *sc = v_sc; 1229 int s; 1230 1231 s = splhardusb(); 1232 sc->sc_eintrs |= OHCI_RHSC; 1233 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1234 splx(s); 1235 } 1236 1237 #ifdef OHCI_DEBUG 1238 char *ohci_cc_strs[] = { 1239 "NO_ERROR", 1240 "CRC", 1241 "BIT_STUFFING", 1242 "DATA_TOGGLE_MISMATCH", 1243 "STALL", 1244 "DEVICE_NOT_RESPONDING", 1245 "PID_CHECK_FAILURE", 1246 "UNEXPECTED_PID", 1247 "DATA_OVERRUN", 1248 "DATA_UNDERRUN", 1249 "BUFFER_OVERRUN", 1250 "BUFFER_UNDERRUN", 1251 "reserved", 1252 "reserved", 1253 "NOT_ACCESSED", 1254 "NOT_ACCESSED", 1255 }; 1256 #endif 1257 1258 void 1259 ohci_softintr(void *v) 1260 { 1261 ohci_softc_t *sc = v; 1262 ohci_soft_itd_t *sitd, *sidone, *sitdnext; 1263 ohci_soft_td_t *std, *sdone, *stdnext; 1264 usbd_xfer_handle xfer; 1265 struct ohci_pipe *opipe; 1266 int len, cc, s; 1267 int i, j, actlen, iframes, uedir; 1268 ohci_physaddr_t done; 1269 1270 DPRINTFN(10,("ohci_softintr: enter\n")); 1271 1272 sc->sc_bus.intr_context++; 1273 1274 s = splhardusb(); 1275 usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head), 1276 sizeof(sc->sc_hcca->hcca_done_head), 1277 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1278 done = le32toh(sc->sc_hcca->hcca_done_head) & ~OHCI_DONE_INTRS; 1279 usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head), sizeof(sc->sc_hcca->hcca_done_head), 1280 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1281 sc->sc_hcca->hcca_done_head = 0; 1282 OWRITE4(sc, OHCI_INTERRUPT_STATUS, OHCI_WDH); 1283 sc->sc_eintrs |= OHCI_WDH; 1284 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_WDH); 1285 splx(s); 1286 1287 /* Reverse the done list. */ 1288 for (sdone = NULL, sidone = NULL; done != 0; ) { 1289 std = ohci_hash_find_td(sc, done); 1290 if (std != NULL) { 1291 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 1292 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1293 std->dnext = sdone; 1294 done = le32toh(std->td.td_nexttd); 1295 sdone = std; 1296 DPRINTFN(10,("add TD %p\n", std)); 1297 continue; 1298 } 1299 sitd = ohci_hash_find_itd(sc, done); 1300 if (sitd != NULL) { 1301 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 1302 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1303 sitd->dnext = sidone; 1304 done = le32toh(sitd->itd.itd_nextitd); 1305 sidone = sitd; 1306 DPRINTFN(5,("add ITD %p\n", sitd)); 1307 continue; 1308 } 1309 panic("ohci_softintr: addr 0x%08lx not found", (u_long)done); 1310 } 1311 1312 DPRINTFN(10,("ohci_softintr: sdone=%p sidone=%p\n", sdone, sidone)); 1313 1314 #ifdef OHCI_DEBUG 1315 if (ohcidebug > 10) { 1316 DPRINTF(("ohci_process_done: TD done:\n")); 1317 ohci_dump_tds(sdone); 1318 } 1319 #endif 1320 1321 for (std = sdone; std; std = stdnext) { 1322 xfer = std->xfer; 1323 stdnext = std->dnext; 1324 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n", 1325 std, xfer, xfer ? xfer->hcpriv : 0)); 1326 if (xfer == NULL) { 1327 /* 1328 * xfer == NULL: There seems to be no xfer associated 1329 * with this TD. It is tailp that happened to end up on 1330 * the done queue. 1331 * Shouldn't happen, but some chips are broken(?). 1332 */ 1333 continue; 1334 } 1335 if (xfer->status == USBD_CANCELLED || 1336 xfer->status == USBD_TIMEOUT) { 1337 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1338 xfer)); 1339 /* Handled by abort routine. */ 1340 continue; 1341 } 1342 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 1343 1344 len = std->len; 1345 if (std->td.td_cbp != 0) 1346 len -= le32toh(std->td.td_be) - 1347 le32toh(std->td.td_cbp) + 1; 1348 DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", len, 1349 std->flags)); 1350 if (std->flags & OHCI_ADD_LEN) 1351 xfer->actlen += len; 1352 1353 cc = OHCI_TD_GET_CC(le32toh(std->td.td_flags)); 1354 if (cc == OHCI_CC_NO_ERROR) { 1355 if (std->flags & OHCI_CALL_DONE) { 1356 xfer->status = USBD_NORMAL_COMPLETION; 1357 s = splusb(); 1358 usb_transfer_complete(xfer); 1359 splx(s); 1360 } 1361 ohci_free_std(sc, std); 1362 } else { 1363 /* 1364 * Endpoint is halted. First unlink all the TDs 1365 * belonging to the failed transfer, and then restart 1366 * the endpoint. 1367 */ 1368 ohci_soft_td_t *p, *n; 1369 opipe = (struct ohci_pipe *)xfer->pipe; 1370 1371 DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n", 1372 OHCI_TD_GET_CC(le32toh(std->td.td_flags)), 1373 ohci_cc_strs[OHCI_TD_GET_CC(le32toh(std->td.td_flags))])); 1374 1375 /* remove TDs */ 1376 for (p = std; p->xfer == xfer; p = n) { 1377 n = p->nexttd; 1378 ohci_free_std(sc, p); 1379 } 1380 1381 /* clear halt */ 1382 opipe->sed->ed.ed_headp = htole32(p->physaddr); 1383 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1384 1385 if (cc == OHCI_CC_STALL) 1386 xfer->status = USBD_STALLED; 1387 else 1388 xfer->status = USBD_IOERROR; 1389 s = splusb(); 1390 usb_transfer_complete(xfer); 1391 splx(s); 1392 } 1393 } 1394 1395 #ifdef OHCI_DEBUG 1396 if (ohcidebug > 10) { 1397 DPRINTF(("ohci_softintr: ITD done:\n")); 1398 ohci_dump_itds(sidone); 1399 } 1400 #endif 1401 1402 for (sitd = sidone; sitd != NULL; sitd = sitdnext) { 1403 xfer = sitd->xfer; 1404 sitdnext = sitd->dnext; 1405 DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n", 1406 sitd, xfer, xfer ? xfer->hcpriv : 0)); 1407 if (xfer == NULL) 1408 continue; 1409 if (xfer->status == USBD_CANCELLED || 1410 xfer->status == USBD_TIMEOUT) { 1411 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1412 xfer)); 1413 /* Handled by abort routine. */ 1414 continue; 1415 } 1416 #ifdef DIAGNOSTIC 1417 if (sitd->isdone) 1418 printf("ohci_softintr: sitd=%p is done\n", sitd); 1419 sitd->isdone = 1; 1420 #endif 1421 if (sitd->flags & OHCI_CALL_DONE) { 1422 ohci_soft_itd_t *next; 1423 1424 opipe = (struct ohci_pipe *)xfer->pipe; 1425 opipe->u.iso.inuse -= xfer->nframes; 1426 uedir = UE_GET_DIR(xfer->pipe->endpoint->edesc-> 1427 bEndpointAddress); 1428 xfer->status = USBD_NORMAL_COMPLETION; 1429 actlen = 0; 1430 for (i = 0, sitd = xfer->hcpriv;; 1431 sitd = next) { 1432 next = sitd->nextitd; 1433 if (OHCI_ITD_GET_CC(le32toh(sitd-> 1434 itd.itd_flags)) != OHCI_CC_NO_ERROR) 1435 xfer->status = USBD_IOERROR; 1436 /* For input, update frlengths with actual */ 1437 /* XXX anything necessary for output? */ 1438 if (uedir == UE_DIR_IN && 1439 xfer->status == USBD_NORMAL_COMPLETION) { 1440 iframes = OHCI_ITD_GET_FC(le32toh( 1441 sitd->itd.itd_flags)); 1442 for (j = 0; j < iframes; i++, j++) { 1443 len = le16toh(sitd-> 1444 itd.itd_offset[j]); 1445 len = 1446 (OHCI_ITD_PSW_GET_CC(len) == 1447 OHCI_CC_NOT_ACCESSED) ? 0 : 1448 OHCI_ITD_PSW_LENGTH(len); 1449 xfer->frlengths[i] = len; 1450 actlen += len; 1451 } 1452 } 1453 if (sitd->flags & OHCI_CALL_DONE) 1454 break; 1455 ohci_free_sitd(sc, sitd); 1456 } 1457 ohci_free_sitd(sc, sitd); 1458 if (uedir == UE_DIR_IN && 1459 xfer->status == USBD_NORMAL_COMPLETION) 1460 xfer->actlen = actlen; 1461 xfer->hcpriv = NULL; 1462 1463 s = splusb(); 1464 usb_transfer_complete(xfer); 1465 splx(s); 1466 } 1467 } 1468 1469 #ifdef USB_USE_SOFTINTR 1470 if (sc->sc_softwake) { 1471 sc->sc_softwake = 0; 1472 wakeup(&sc->sc_softwake); 1473 } 1474 #endif /* USB_USE_SOFTINTR */ 1475 1476 sc->sc_bus.intr_context--; 1477 DPRINTFN(10,("ohci_softintr: done:\n")); 1478 } 1479 1480 void 1481 ohci_device_ctrl_done(usbd_xfer_handle xfer) 1482 { 1483 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1484 int len = UGETW(xfer->request.wLength); 1485 int isread = (xfer->request.bmRequestType & UT_READ); 1486 1487 DPRINTFN(10,("ohci_device_ctrl_done: xfer=%p\n", xfer)); 1488 1489 #ifdef DIAGNOSTIC 1490 if (!(xfer->rqflags & URQ_REQUEST)) { 1491 panic("ohci_device_ctrl_done: not a request"); 1492 } 1493 #endif 1494 if (len) 1495 usb_syncmem(&xfer->dmabuf, 0, len, 1496 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1497 usb_syncmem(&opipe->u.ctl.reqdma, 0, 1498 sizeof(usb_device_request_t), BUS_DMASYNC_POSTWRITE); 1499 } 1500 1501 void 1502 ohci_device_intr_done(usbd_xfer_handle xfer) 1503 { 1504 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1505 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1506 ohci_soft_ed_t *sed = opipe->sed; 1507 ohci_soft_td_t *data, *tail; 1508 int isread = 1509 (UE_GET_DIR(xfer->pipe->endpoint->edesc->bEndpointAddress) == UE_DIR_IN); 1510 1511 1512 DPRINTFN(10,("ohci_device_intr_done: xfer=%p, actlen=%d\n", 1513 xfer, xfer->actlen)); 1514 1515 usb_syncmem(&xfer->dmabuf, 0, xfer->length, 1516 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1517 if (xfer->pipe->repeat) { 1518 data = opipe->tail.td; 1519 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 1520 if (tail == NULL) { 1521 xfer->status = USBD_NOMEM; 1522 return; 1523 } 1524 tail->xfer = NULL; 1525 1526 data->td.td_flags = htole32( 1527 OHCI_TD_IN | OHCI_TD_NOCC | 1528 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 1529 if (xfer->flags & USBD_SHORT_XFER_OK) 1530 data->td.td_flags |= htole32(OHCI_TD_R); 1531 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf, 0)); 1532 data->nexttd = tail; 1533 data->td.td_nexttd = htole32(tail->physaddr); 1534 data->td.td_be = htole32(le32toh(data->td.td_cbp) + 1535 xfer->length - 1); 1536 data->len = xfer->length; 1537 data->xfer = xfer; 1538 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1539 usb_syncmem(&data->dma, data->offs, sizeof(data->td), 1540 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1541 xfer->hcpriv = data; 1542 xfer->actlen = 0; 1543 1544 sed->ed.ed_tailp = htole32(tail->physaddr); 1545 usb_syncmem(&sed->dma, 1546 sed->offs + offsetof(ohci_ed_t, ed_tailp), 1547 sizeof(sed->ed.ed_tailp), 1548 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1549 opipe->tail.td = tail; 1550 } 1551 } 1552 1553 void 1554 ohci_device_bulk_done(usbd_xfer_handle xfer) 1555 { 1556 int isread = 1557 (UE_GET_DIR(xfer->pipe->endpoint->edesc->bEndpointAddress) == UE_DIR_IN); 1558 1559 DPRINTFN(10,("ohci_device_bulk_done: xfer=%p, actlen=%d\n", 1560 xfer, xfer->actlen)); 1561 usb_syncmem(&xfer->dmabuf, 0, xfer->length, 1562 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1563 } 1564 1565 void 1566 ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer) 1567 { 1568 usbd_pipe_handle pipe; 1569 u_char *p; 1570 int i, m; 1571 int hstatus; 1572 1573 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1574 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n", 1575 sc, xfer, hstatus)); 1576 1577 if (xfer == NULL) { 1578 /* Just ignore the change. */ 1579 return; 1580 } 1581 1582 pipe = xfer->pipe; 1583 1584 p = KERNADDR(&xfer->dmabuf, 0); 1585 m = min(sc->sc_noport, xfer->length * 8 - 1); 1586 memset(p, 0, xfer->length); 1587 for (i = 1; i <= m; i++) { 1588 /* Pick out CHANGE bits from the status reg. */ 1589 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1590 p[i/8] |= 1 << (i%8); 1591 } 1592 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 1593 xfer->actlen = xfer->length; 1594 xfer->status = USBD_NORMAL_COMPLETION; 1595 1596 usb_transfer_complete(xfer); 1597 } 1598 1599 void 1600 ohci_root_intr_done(usbd_xfer_handle xfer) 1601 { 1602 } 1603 1604 void 1605 ohci_root_ctrl_done(usbd_xfer_handle xfer) 1606 { 1607 } 1608 1609 /* 1610 * Wait here until controller claims to have an interrupt. 1611 * Then call ohci_intr and return. Use timeout to avoid waiting 1612 * too long. 1613 */ 1614 void 1615 ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer) 1616 { 1617 int timo = xfer->timeout; 1618 int usecs; 1619 u_int32_t intrs; 1620 1621 xfer->status = USBD_IN_PROGRESS; 1622 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 1623 usb_delay_ms(&sc->sc_bus, 1); 1624 if (sc->sc_dying) 1625 break; 1626 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 1627 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs)); 1628 #ifdef OHCI_DEBUG 1629 if (ohcidebug > 15) 1630 ohci_dumpregs(sc); 1631 #endif 1632 if (intrs) { 1633 ohci_intr1(sc); 1634 if (xfer->status != USBD_IN_PROGRESS) 1635 return; 1636 } 1637 } 1638 1639 /* Timeout */ 1640 DPRINTF(("ohci_waitintr: timeout\n")); 1641 xfer->status = USBD_TIMEOUT; 1642 usb_transfer_complete(xfer); 1643 /* XXX should free TD */ 1644 } 1645 1646 void 1647 ohci_poll(struct usbd_bus *bus) 1648 { 1649 ohci_softc_t *sc = (ohci_softc_t *)bus; 1650 #ifdef OHCI_DEBUG 1651 static int last; 1652 int new; 1653 new = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1654 if (new != last) { 1655 DPRINTFN(10,("ohci_poll: intrs=0x%04x\n", new)); 1656 last = new; 1657 } 1658 #endif 1659 1660 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) 1661 ohci_intr1(sc); 1662 } 1663 1664 usbd_status 1665 ohci_device_request(usbd_xfer_handle xfer) 1666 { 1667 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1668 usb_device_request_t *req = &xfer->request; 1669 usbd_device_handle dev = opipe->pipe.device; 1670 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1671 int addr = dev->address; 1672 ohci_soft_td_t *setup, *stat, *next, *tail; 1673 ohci_soft_ed_t *sed; 1674 int isread; 1675 int len; 1676 usbd_status err; 1677 int s; 1678 1679 isread = req->bmRequestType & UT_READ; 1680 len = UGETW(req->wLength); 1681 1682 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 1683 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 1684 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1685 UGETW(req->wIndex), len, addr, 1686 opipe->pipe.endpoint->edesc->bEndpointAddress)); 1687 1688 setup = opipe->tail.td; 1689 stat = ohci_alloc_std(sc); 1690 if (stat == NULL) { 1691 err = USBD_NOMEM; 1692 goto bad1; 1693 } 1694 tail = ohci_alloc_std(sc); 1695 if (tail == NULL) { 1696 err = USBD_NOMEM; 1697 goto bad2; 1698 } 1699 tail->xfer = NULL; 1700 1701 sed = opipe->sed; 1702 opipe->u.ctl.length = len; 1703 1704 /* Update device address and length since they may have changed 1705 during the setup of the control pipe in usbd_new_device(). */ 1706 /* XXX This only needs to be done once, but it's too early in open. */ 1707 /* XXXX Should not touch ED here! */ 1708 1709 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 1710 sizeof(sed->ed.ed_flags), 1711 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1712 sed->ed.ed_flags = htole32( 1713 (le32toh(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) | 1714 OHCI_ED_SET_FA(addr) | 1715 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize))); 1716 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 1717 sizeof(sed->ed.ed_flags), 1718 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1719 1720 next = stat; 1721 1722 /* Set up data transaction */ 1723 if (len != 0) { 1724 ohci_soft_td_t *std = stat; 1725 1726 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 1727 std, &stat); 1728 stat = stat->nexttd; /* point at free TD */ 1729 if (err) 1730 goto bad3; 1731 /* Start toggle at 1 and then use the carried toggle. */ 1732 std->td.td_flags &= htole32(~OHCI_TD_TOGGLE_MASK); 1733 std->td.td_flags |= htole32(OHCI_TD_TOGGLE_1); 1734 usb_syncmem(&std->dma, 1735 std->offs + offsetof(ohci_td_t, td_flags), 1736 sizeof(std->td.td_flags), 1737 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1738 } 1739 1740 memcpy(KERNADDR(&opipe->u.ctl.reqdma, 0), req, sizeof *req); 1741 usb_syncmem(&opipe->u.ctl.reqdma, 0, sizeof *req, BUS_DMASYNC_PREWRITE); 1742 1743 setup->td.td_flags = htole32(OHCI_TD_SETUP | OHCI_TD_NOCC | 1744 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1745 setup->td.td_cbp = htole32(DMAADDR(&opipe->u.ctl.reqdma, 0)); 1746 setup->nexttd = next; 1747 setup->td.td_nexttd = htole32(next->physaddr); 1748 setup->td.td_be = htole32(le32toh(setup->td.td_cbp) + sizeof *req - 1); 1749 setup->len = 0; 1750 setup->xfer = xfer; 1751 setup->flags = 0; 1752 xfer->hcpriv = setup; 1753 usb_syncmem(&setup->dma, setup->offs, sizeof(setup->td), 1754 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1755 1756 stat->td.td_flags = htole32( 1757 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | 1758 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1759 stat->td.td_cbp = 0; 1760 stat->nexttd = tail; 1761 stat->td.td_nexttd = htole32(tail->physaddr); 1762 stat->td.td_be = 0; 1763 stat->flags = OHCI_CALL_DONE; 1764 stat->len = 0; 1765 stat->xfer = xfer; 1766 usb_syncmem(&stat->dma, stat->offs, sizeof(stat->td), 1767 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1768 1769 #ifdef OHCI_DEBUG 1770 if (ohcidebug > 5) { 1771 DPRINTF(("ohci_device_request:\n")); 1772 ohci_dump_ed(sed); 1773 ohci_dump_tds(setup); 1774 } 1775 #endif 1776 1777 /* Insert ED in schedule */ 1778 s = splusb(); 1779 sed->ed.ed_tailp = htole32(tail->physaddr); 1780 usb_syncmem(&sed->dma, 1781 sed->offs + offsetof(ohci_ed_t, ed_tailp), 1782 sizeof(sed->ed.ed_tailp), 1783 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1784 opipe->tail.td = tail; 1785 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1786 if (xfer->timeout && !sc->sc_bus.use_polling) { 1787 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 1788 ohci_timeout, xfer); 1789 } 1790 splx(s); 1791 1792 #ifdef OHCI_DEBUG 1793 if (ohcidebug > 20) { 1794 delay(10000); 1795 DPRINTF(("ohci_device_request: status=%x\n", 1796 OREAD4(sc, OHCI_COMMAND_STATUS))); 1797 ohci_dumpregs(sc); 1798 printf("ctrl head:\n"); 1799 ohci_dump_ed(sc->sc_ctrl_head); 1800 printf("sed:\n"); 1801 ohci_dump_ed(sed); 1802 ohci_dump_tds(setup); 1803 } 1804 #endif 1805 1806 return (USBD_NORMAL_COMPLETION); 1807 1808 bad3: 1809 ohci_free_std(sc, tail); 1810 bad2: 1811 ohci_free_std(sc, stat); 1812 bad1: 1813 return (err); 1814 } 1815 1816 /* 1817 * Add an ED to the schedule. Called at splusb(). 1818 */ 1819 void 1820 ohci_add_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1821 { 1822 DPRINTFN(8,("ohci_add_ed: sed=%p head=%p\n", sed, head)); 1823 1824 SPLUSBCHECK; 1825 usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted), 1826 sizeof(head->ed.ed_nexted), 1827 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1828 sed->next = head->next; 1829 sed->ed.ed_nexted = head->ed.ed_nexted; 1830 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted), 1831 sizeof(sed->ed.ed_nexted), 1832 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1833 head->next = sed; 1834 head->ed.ed_nexted = htole32(sed->physaddr); 1835 usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted), 1836 sizeof(head->ed.ed_nexted), 1837 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1838 } 1839 1840 /* 1841 * Remove an ED from the schedule. Called at splusb(). 1842 */ 1843 void 1844 ohci_rem_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1845 { 1846 ohci_soft_ed_t *p; 1847 1848 SPLUSBCHECK; 1849 1850 /* XXX */ 1851 for (p = head; p != NULL && p->next != sed; p = p->next) 1852 ; 1853 if (p == NULL) 1854 panic("ohci_rem_ed: ED not found"); 1855 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted), 1856 sizeof(sed->ed.ed_nexted), 1857 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1858 p->next = sed->next; 1859 p->ed.ed_nexted = sed->ed.ed_nexted; 1860 usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted), 1861 sizeof(p->ed.ed_nexted), 1862 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1863 } 1864 1865 /* 1866 * When a transfer is completed the TD is added to the done queue by 1867 * the host controller. This queue is the processed by software. 1868 * Unfortunately the queue contains the physical address of the TD 1869 * and we have no simple way to translate this back to a kernel address. 1870 * To make the translation possible (and fast) we use a hash table of 1871 * TDs currently in the schedule. The physical address is used as the 1872 * hash value. 1873 */ 1874 1875 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1876 /* Called at splusb() */ 1877 void 1878 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1879 { 1880 int h = HASH(std->physaddr); 1881 1882 SPLUSBCHECK; 1883 1884 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1885 } 1886 1887 /* Called at splusb() */ 1888 void 1889 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1890 { 1891 SPLUSBCHECK; 1892 1893 LIST_REMOVE(std, hnext); 1894 } 1895 1896 ohci_soft_td_t * 1897 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a) 1898 { 1899 int h = HASH(a); 1900 ohci_soft_td_t *std; 1901 1902 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1903 std != NULL; 1904 std = LIST_NEXT(std, hnext)) 1905 if (std->physaddr == a) 1906 return (std); 1907 return (NULL); 1908 } 1909 1910 /* Called at splusb() */ 1911 void 1912 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1913 { 1914 int h = HASH(sitd->physaddr); 1915 1916 SPLUSBCHECK; 1917 1918 DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n", 1919 sitd, (u_long)sitd->physaddr)); 1920 1921 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext); 1922 } 1923 1924 /* Called at splusb() */ 1925 void 1926 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1927 { 1928 SPLUSBCHECK; 1929 1930 DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n", 1931 sitd, (u_long)sitd->physaddr)); 1932 1933 LIST_REMOVE(sitd, hnext); 1934 } 1935 1936 ohci_soft_itd_t * 1937 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a) 1938 { 1939 int h = HASH(a); 1940 ohci_soft_itd_t *sitd; 1941 1942 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]); 1943 sitd != NULL; 1944 sitd = LIST_NEXT(sitd, hnext)) 1945 if (sitd->physaddr == a) 1946 return (sitd); 1947 return (NULL); 1948 } 1949 1950 void 1951 ohci_timeout(void *addr) 1952 { 1953 struct ohci_xfer *oxfer = addr; 1954 struct ohci_pipe *opipe = (struct ohci_pipe *)oxfer->xfer.pipe; 1955 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1956 1957 DPRINTF(("ohci_timeout: oxfer=%p\n", oxfer)); 1958 1959 if (sc->sc_dying) { 1960 ohci_abort_xfer(&oxfer->xfer, USBD_TIMEOUT); 1961 return; 1962 } 1963 1964 /* Execute the abort in a process context. */ 1965 usb_init_task(&oxfer->abort_task, ohci_timeout_task, addr); 1966 usb_add_task(oxfer->xfer.pipe->device, &oxfer->abort_task); 1967 } 1968 1969 void 1970 ohci_timeout_task(void *addr) 1971 { 1972 usbd_xfer_handle xfer = addr; 1973 int s; 1974 1975 DPRINTF(("ohci_timeout_task: xfer=%p\n", xfer)); 1976 1977 s = splusb(); 1978 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1979 splx(s); 1980 } 1981 1982 #ifdef OHCI_DEBUG 1983 void 1984 ohci_dump_tds(ohci_soft_td_t *std) 1985 { 1986 for (; std; std = std->nexttd) 1987 ohci_dump_td(std); 1988 } 1989 1990 void 1991 ohci_dump_td(ohci_soft_td_t *std) 1992 { 1993 char sbuf[128]; 1994 1995 bitmask_snprintf((u_int32_t)le32toh(std->td.td_flags), 1996 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 1997 sbuf, sizeof(sbuf)); 1998 1999 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 2000 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2001 printf("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx " 2002 "nexttd=0x%08lx be=0x%08lx\n", 2003 std, (u_long)std->physaddr, sbuf, 2004 OHCI_TD_GET_DI(le32toh(std->td.td_flags)), 2005 OHCI_TD_GET_EC(le32toh(std->td.td_flags)), 2006 OHCI_TD_GET_CC(le32toh(std->td.td_flags)), 2007 (u_long)le32toh(std->td.td_cbp), 2008 (u_long)le32toh(std->td.td_nexttd), 2009 (u_long)le32toh(std->td.td_be)); 2010 } 2011 2012 void 2013 ohci_dump_itd(ohci_soft_itd_t *sitd) 2014 { 2015 int i; 2016 2017 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 2018 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2019 printf("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n" 2020 "bp0=0x%08lx next=0x%08lx be=0x%08lx\n", 2021 sitd, (u_long)sitd->physaddr, 2022 OHCI_ITD_GET_SF(le32toh(sitd->itd.itd_flags)), 2023 OHCI_ITD_GET_DI(le32toh(sitd->itd.itd_flags)), 2024 OHCI_ITD_GET_FC(le32toh(sitd->itd.itd_flags)), 2025 OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags)), 2026 (u_long)le32toh(sitd->itd.itd_bp0), 2027 (u_long)le32toh(sitd->itd.itd_nextitd), 2028 (u_long)le32toh(sitd->itd.itd_be)); 2029 for (i = 0; i < OHCI_ITD_NOFFSET; i++) 2030 printf("offs[%d]=0x%04x ", i, 2031 (u_int)le16toh(sitd->itd.itd_offset[i])); 2032 printf("\n"); 2033 } 2034 2035 void 2036 ohci_dump_itds(ohci_soft_itd_t *sitd) 2037 { 2038 for (; sitd; sitd = sitd->nextitd) 2039 ohci_dump_itd(sitd); 2040 } 2041 2042 void 2043 ohci_dump_ed(ohci_soft_ed_t *sed) 2044 { 2045 char sbuf[128], sbuf2[128]; 2046 2047 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 2048 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2049 bitmask_snprintf((u_int32_t)le32toh(sed->ed.ed_flags), 2050 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO", 2051 sbuf, sizeof(sbuf)); 2052 bitmask_snprintf((u_int32_t)le32toh(sed->ed.ed_headp), 2053 "\20\1HALT\2CARRY", sbuf2, sizeof(sbuf2)); 2054 2055 printf("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d flags=%s\ntailp=0x%08lx " 2056 "headflags=%s headp=0x%08lx nexted=0x%08lx\n", 2057 sed, (u_long)sed->physaddr, 2058 OHCI_ED_GET_FA(le32toh(sed->ed.ed_flags)), 2059 OHCI_ED_GET_EN(le32toh(sed->ed.ed_flags)), 2060 OHCI_ED_GET_MAXP(le32toh(sed->ed.ed_flags)), sbuf, 2061 (u_long)le32toh(sed->ed.ed_tailp), sbuf2, 2062 (u_long)le32toh(sed->ed.ed_headp), 2063 (u_long)le32toh(sed->ed.ed_nexted)); 2064 } 2065 #endif 2066 2067 usbd_status 2068 ohci_open(usbd_pipe_handle pipe) 2069 { 2070 usbd_device_handle dev = pipe->device; 2071 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2072 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 2073 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2074 u_int8_t addr = dev->address; 2075 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 2076 ohci_soft_ed_t *sed; 2077 ohci_soft_td_t *std; 2078 ohci_soft_itd_t *sitd; 2079 ohci_physaddr_t tdphys; 2080 u_int32_t fmt; 2081 usbd_status err; 2082 int s; 2083 int ival; 2084 2085 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 2086 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 2087 2088 if (sc->sc_dying) 2089 return (USBD_IOERROR); 2090 2091 std = NULL; 2092 sed = NULL; 2093 2094 if (addr == sc->sc_addr) { 2095 switch (ed->bEndpointAddress) { 2096 case USB_CONTROL_ENDPOINT: 2097 pipe->methods = &ohci_root_ctrl_methods; 2098 break; 2099 case UE_DIR_IN | OHCI_INTR_ENDPT: 2100 pipe->methods = &ohci_root_intr_methods; 2101 break; 2102 default: 2103 return (USBD_INVAL); 2104 } 2105 } else { 2106 sed = ohci_alloc_sed(sc); 2107 if (sed == NULL) 2108 goto bad0; 2109 opipe->sed = sed; 2110 if (xfertype == UE_ISOCHRONOUS) { 2111 sitd = ohci_alloc_sitd(sc); 2112 if (sitd == NULL) 2113 goto bad1; 2114 opipe->tail.itd = sitd; 2115 tdphys = sitd->physaddr; 2116 fmt = OHCI_ED_FORMAT_ISO; 2117 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 2118 fmt |= OHCI_ED_DIR_IN; 2119 else 2120 fmt |= OHCI_ED_DIR_OUT; 2121 } else { 2122 std = ohci_alloc_std(sc); 2123 if (std == NULL) 2124 goto bad1; 2125 opipe->tail.td = std; 2126 tdphys = std->physaddr; 2127 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD; 2128 } 2129 sed->ed.ed_flags = htole32( 2130 OHCI_ED_SET_FA(addr) | 2131 OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) | 2132 (dev->speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) | 2133 fmt | 2134 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 2135 sed->ed.ed_headp = sed->ed.ed_tailp = htole32(tdphys); 2136 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 2137 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2138 2139 switch (xfertype) { 2140 case UE_CONTROL: 2141 pipe->methods = &ohci_device_ctrl_methods; 2142 err = usb_allocmem(&sc->sc_bus, 2143 sizeof(usb_device_request_t), 2144 0, &opipe->u.ctl.reqdma); 2145 if (err) 2146 goto bad; 2147 s = splusb(); 2148 ohci_add_ed(sed, sc->sc_ctrl_head); 2149 splx(s); 2150 break; 2151 case UE_INTERRUPT: 2152 pipe->methods = &ohci_device_intr_methods; 2153 ival = pipe->interval; 2154 if (ival == USBD_DEFAULT_INTERVAL) 2155 ival = ed->bInterval; 2156 return (ohci_device_setintr(sc, opipe, ival)); 2157 case UE_ISOCHRONOUS: 2158 pipe->methods = &ohci_device_isoc_methods; 2159 return (ohci_setup_isoc(pipe)); 2160 case UE_BULK: 2161 pipe->methods = &ohci_device_bulk_methods; 2162 s = splusb(); 2163 ohci_add_ed(sed, sc->sc_bulk_head); 2164 splx(s); 2165 break; 2166 } 2167 } 2168 return (USBD_NORMAL_COMPLETION); 2169 2170 bad: 2171 if (std != NULL) 2172 ohci_free_std(sc, std); 2173 bad1: 2174 if (sed != NULL) 2175 ohci_free_sed(sc, sed); 2176 bad0: 2177 return (USBD_NOMEM); 2178 2179 } 2180 2181 /* 2182 * Close a reqular pipe. 2183 * Assumes that there are no pending transactions. 2184 */ 2185 void 2186 ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head) 2187 { 2188 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2189 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2190 ohci_soft_ed_t *sed = opipe->sed; 2191 int s; 2192 2193 s = splusb(); 2194 #ifdef DIAGNOSTIC 2195 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 2196 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2197 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) { 2198 ohci_soft_td_t *std; 2199 std = ohci_hash_find_td(sc, le32toh(sed->ed.ed_headp)); 2200 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 2201 "tl=0x%x pipe=%p, std=%p\n", sed, 2202 (int)le32toh(sed->ed.ed_headp), 2203 (int)le32toh(sed->ed.ed_tailp), 2204 pipe, std); 2205 #ifdef USB_DEBUG 2206 usbd_dump_pipe(&opipe->pipe); 2207 #endif 2208 #ifdef OHCI_DEBUG 2209 ohci_dump_ed(sed); 2210 if (std) 2211 ohci_dump_td(std); 2212 #endif 2213 usb_delay_ms(&sc->sc_bus, 2); 2214 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2215 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) 2216 printf("ohci_close_pipe: pipe still not empty\n"); 2217 } 2218 #endif 2219 ohci_rem_ed(sed, head); 2220 /* Make sure the host controller is not touching this ED */ 2221 usb_delay_ms(&sc->sc_bus, 1); 2222 splx(s); 2223 ohci_free_sed(sc, opipe->sed); 2224 } 2225 2226 /* 2227 * Abort a device request. 2228 * If this routine is called at splusb() it guarantees that the request 2229 * will be removed from the hardware scheduling and that the callback 2230 * for it will be called with USBD_CANCELLED status. 2231 * It's impossible to guarantee that the requested transfer will not 2232 * have happened since the hardware runs concurrently. 2233 * If the transaction has already happened we rely on the ordinary 2234 * interrupt processing to process it. 2235 */ 2236 void 2237 ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2238 { 2239 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2240 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 2241 ohci_soft_ed_t *sed = opipe->sed; 2242 ohci_soft_td_t *p, *n; 2243 ohci_physaddr_t headp; 2244 int s, hit; 2245 int wake; 2246 2247 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p sed=%p\n", xfer, opipe,sed)); 2248 2249 if (sc->sc_dying) { 2250 /* If we're dying, just do the software part. */ 2251 s = splusb(); 2252 xfer->status = status; /* make software ignore it */ 2253 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 2254 usb_transfer_complete(xfer); 2255 splx(s); 2256 } 2257 2258 if (xfer->device->bus->intr_context || !curproc) 2259 panic("ohci_abort_xfer: not in process context"); 2260 2261 /* 2262 * If an abort is already in progress then just wait for it to 2263 * complete and return. 2264 */ 2265 if (xfer->hcflags & UXFER_ABORTING) { 2266 DPRINTFN(2, ("ohci_abort_xfer: already aborting\n")); 2267 #ifdef DIAGNOSTIC 2268 if (status == USBD_TIMEOUT) 2269 printf("0hci_abort_xfer: TIMEOUT while aborting\n"); 2270 #endif 2271 /* Override the status which might be USBD_TIMEOUT. */ 2272 xfer->status = status; 2273 DPRINTFN(2, ("ohci_abort_xfer: waiting for abort to finish\n")); 2274 xfer->hcflags |= UXFER_ABORTWAIT; 2275 while (xfer->hcflags & UXFER_ABORTING) 2276 tsleep(&xfer->hcflags, PZERO, "ohciaw", 0); 2277 return; 2278 } 2279 xfer->hcflags |= UXFER_ABORTING; 2280 2281 /* 2282 * Step 1: Make interrupt routine and hardware ignore xfer. 2283 */ 2284 s = splusb(); 2285 xfer->status = status; /* make software ignore it */ 2286 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 2287 splx(s); 2288 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed)); 2289 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2290 sizeof(sed->ed.ed_flags), 2291 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2292 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 2293 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2294 sizeof(sed->ed.ed_flags), 2295 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2296 2297 /* 2298 * Step 2: Wait until we know hardware has finished any possible 2299 * use of the xfer. Also make sure the soft interrupt routine 2300 * has run. 2301 */ 2302 usb_delay_ms(opipe->pipe.device->bus, 20); /* Hardware finishes in 1ms */ 2303 s = splusb(); 2304 #ifdef USB_USE_SOFTINTR 2305 sc->sc_softwake = 1; 2306 #endif /* USB_USE_SOFTINTR */ 2307 usb_schedsoftintr(&sc->sc_bus); 2308 #ifdef USB_USE_SOFTINTR 2309 tsleep(&sc->sc_softwake, PZERO, "ohciab", 0); 2310 #endif /* USB_USE_SOFTINTR */ 2311 splx(s); 2312 2313 /* 2314 * Step 3: Remove any vestiges of the xfer from the hardware. 2315 * The complication here is that the hardware may have executed 2316 * beyond the xfer we're trying to abort. So as we're scanning 2317 * the TDs of this xfer we check if the hardware points to 2318 * any of them. 2319 */ 2320 s = splusb(); /* XXX why? */ 2321 p = xfer->hcpriv; 2322 #ifdef DIAGNOSTIC 2323 if (p == NULL) { 2324 xfer->hcflags &= ~UXFER_ABORTING; /* XXX */ 2325 splx(s); 2326 printf("ohci_abort_xfer: hcpriv is NULL\n"); 2327 return; 2328 } 2329 #endif 2330 #ifdef OHCI_DEBUG 2331 if (ohcidebug > 1) { 2332 DPRINTF(("ohci_abort_xfer: sed=\n")); 2333 ohci_dump_ed(sed); 2334 ohci_dump_tds(p); 2335 } 2336 #endif 2337 headp = le32toh(sed->ed.ed_headp) & OHCI_HEADMASK; 2338 hit = 0; 2339 for (; p->xfer == xfer; p = n) { 2340 hit |= headp == p->physaddr; 2341 n = p->nexttd; 2342 ohci_free_std(sc, p); 2343 } 2344 /* Zap headp register if hardware pointed inside the xfer. */ 2345 if (hit) { 2346 DPRINTFN(1,("ohci_abort_xfer: set hd=0x%08x, tl=0x%08x\n", 2347 (int)p->physaddr, (int)le32toh(sed->ed.ed_tailp))); 2348 sed->ed.ed_headp = htole32(p->physaddr); /* unlink TDs */ 2349 usb_syncmem(&sed->dma, 2350 sed->offs + offsetof(ohci_ed_t, ed_headp), 2351 sizeof(sed->ed.ed_headp), 2352 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2353 } else { 2354 DPRINTFN(1,("ohci_abort_xfer: no hit\n")); 2355 } 2356 2357 /* 2358 * Step 4: Turn on hardware again. 2359 */ 2360 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2361 sizeof(sed->ed.ed_flags), 2362 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2363 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 2364 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2365 sizeof(sed->ed.ed_flags), 2366 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2367 2368 /* 2369 * Step 5: Execute callback. 2370 */ 2371 wake = xfer->hcflags & UXFER_ABORTWAIT; 2372 xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT); 2373 usb_transfer_complete(xfer); 2374 if (wake) 2375 wakeup(&xfer->hcflags); 2376 2377 splx(s); 2378 } 2379 2380 /* 2381 * Data structures and routines to emulate the root hub. 2382 */ 2383 Static usb_device_descriptor_t ohci_devd = { 2384 USB_DEVICE_DESCRIPTOR_SIZE, 2385 UDESC_DEVICE, /* type */ 2386 {0x00, 0x01}, /* USB version */ 2387 UDCLASS_HUB, /* class */ 2388 UDSUBCLASS_HUB, /* subclass */ 2389 UDPROTO_FSHUB, 2390 64, /* max packet */ 2391 {0},{0},{0x00,0x01}, /* device id */ 2392 1,2,0, /* string indicies */ 2393 1 /* # of configurations */ 2394 }; 2395 2396 Static usb_config_descriptor_t ohci_confd = { 2397 USB_CONFIG_DESCRIPTOR_SIZE, 2398 UDESC_CONFIG, 2399 {USB_CONFIG_DESCRIPTOR_SIZE + 2400 USB_INTERFACE_DESCRIPTOR_SIZE + 2401 USB_ENDPOINT_DESCRIPTOR_SIZE}, 2402 1, 2403 1, 2404 0, 2405 UC_SELF_POWERED, 2406 0 /* max power */ 2407 }; 2408 2409 Static usb_interface_descriptor_t ohci_ifcd = { 2410 USB_INTERFACE_DESCRIPTOR_SIZE, 2411 UDESC_INTERFACE, 2412 0, 2413 0, 2414 1, 2415 UICLASS_HUB, 2416 UISUBCLASS_HUB, 2417 UIPROTO_FSHUB, 2418 0 2419 }; 2420 2421 Static usb_endpoint_descriptor_t ohci_endpd = { 2422 USB_ENDPOINT_DESCRIPTOR_SIZE, 2423 UDESC_ENDPOINT, 2424 UE_DIR_IN | OHCI_INTR_ENDPT, 2425 UE_INTERRUPT, 2426 {8, 0}, /* max packet */ 2427 255 2428 }; 2429 2430 Static usb_hub_descriptor_t ohci_hubd = { 2431 USB_HUB_DESCRIPTOR_SIZE, 2432 UDESC_HUB, 2433 0, 2434 {0,0}, 2435 0, 2436 0, 2437 {0}, 2438 }; 2439 2440 Static int 2441 ohci_str(usb_string_descriptor_t *p, int l, const char *s) 2442 { 2443 int i; 2444 2445 if (l == 0) 2446 return (0); 2447 p->bLength = 2 * strlen(s) + 2; 2448 if (l == 1) 2449 return (1); 2450 p->bDescriptorType = UDESC_STRING; 2451 l -= 2; 2452 for (i = 0; s[i] && l > 1; i++, l -= 2) 2453 USETW2(p->bString[i], 0, s[i]); 2454 return (2*i+2); 2455 } 2456 2457 /* 2458 * Simulate a hardware hub by handling all the necessary requests. 2459 */ 2460 Static usbd_status 2461 ohci_root_ctrl_transfer(usbd_xfer_handle xfer) 2462 { 2463 usbd_status err; 2464 2465 /* Insert last in queue. */ 2466 err = usb_insert_transfer(xfer); 2467 if (err) 2468 return (err); 2469 2470 /* Pipe isn't running, start first */ 2471 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2472 } 2473 2474 Static usbd_status 2475 ohci_root_ctrl_start(usbd_xfer_handle xfer) 2476 { 2477 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2478 usb_device_request_t *req; 2479 void *buf = NULL; 2480 int port, i; 2481 int s, len, value, index, l, totlen = 0; 2482 usb_port_status_t ps; 2483 usb_hub_descriptor_t hubd; 2484 usbd_status err; 2485 u_int32_t v; 2486 2487 if (sc->sc_dying) 2488 return (USBD_IOERROR); 2489 2490 #ifdef DIAGNOSTIC 2491 if (!(xfer->rqflags & URQ_REQUEST)) 2492 /* XXX panic */ 2493 return (USBD_INVAL); 2494 #endif 2495 req = &xfer->request; 2496 2497 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 2498 req->bmRequestType, req->bRequest)); 2499 2500 len = UGETW(req->wLength); 2501 value = UGETW(req->wValue); 2502 index = UGETW(req->wIndex); 2503 2504 if (len != 0) 2505 buf = KERNADDR(&xfer->dmabuf, 0); 2506 2507 #define C(x,y) ((x) | ((y) << 8)) 2508 switch(C(req->bRequest, req->bmRequestType)) { 2509 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 2510 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 2511 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 2512 /* 2513 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 2514 * for the integrated root hub. 2515 */ 2516 break; 2517 case C(UR_GET_CONFIG, UT_READ_DEVICE): 2518 if (len > 0) { 2519 *(u_int8_t *)buf = sc->sc_conf; 2520 totlen = 1; 2521 } 2522 break; 2523 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2524 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 2525 switch(value >> 8) { 2526 case UDESC_DEVICE: 2527 if ((value & 0xff) != 0) { 2528 err = USBD_IOERROR; 2529 goto ret; 2530 } 2531 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 2532 USETW(ohci_devd.idVendor, sc->sc_id_vendor); 2533 memcpy(buf, &ohci_devd, l); 2534 break; 2535 case UDESC_CONFIG: 2536 if ((value & 0xff) != 0) { 2537 err = USBD_IOERROR; 2538 goto ret; 2539 } 2540 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 2541 memcpy(buf, &ohci_confd, l); 2542 buf = (char *)buf + l; 2543 len -= l; 2544 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 2545 totlen += l; 2546 memcpy(buf, &ohci_ifcd, l); 2547 buf = (char *)buf + l; 2548 len -= l; 2549 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 2550 totlen += l; 2551 memcpy(buf, &ohci_endpd, l); 2552 break; 2553 case UDESC_STRING: 2554 if (len == 0) 2555 break; 2556 *(u_int8_t *)buf = 0; 2557 totlen = 1; 2558 switch (value & 0xff) { 2559 case 0: /* Language table */ 2560 totlen = ohci_str(buf, len, "\001"); 2561 break; 2562 case 1: /* Vendor */ 2563 totlen = ohci_str(buf, len, sc->sc_vendor); 2564 break; 2565 case 2: /* Product */ 2566 totlen = ohci_str(buf, len, "OHCI root hub"); 2567 break; 2568 } 2569 break; 2570 default: 2571 err = USBD_IOERROR; 2572 goto ret; 2573 } 2574 break; 2575 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 2576 if (len > 0) { 2577 *(u_int8_t *)buf = 0; 2578 totlen = 1; 2579 } 2580 break; 2581 case C(UR_GET_STATUS, UT_READ_DEVICE): 2582 if (len > 1) { 2583 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 2584 totlen = 2; 2585 } 2586 break; 2587 case C(UR_GET_STATUS, UT_READ_INTERFACE): 2588 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 2589 if (len > 1) { 2590 USETW(((usb_status_t *)buf)->wStatus, 0); 2591 totlen = 2; 2592 } 2593 break; 2594 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 2595 if (value >= USB_MAX_DEVICES) { 2596 err = USBD_IOERROR; 2597 goto ret; 2598 } 2599 sc->sc_addr = value; 2600 break; 2601 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 2602 if (value != 0 && value != 1) { 2603 err = USBD_IOERROR; 2604 goto ret; 2605 } 2606 sc->sc_conf = value; 2607 break; 2608 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 2609 break; 2610 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 2611 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 2612 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 2613 err = USBD_IOERROR; 2614 goto ret; 2615 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 2616 break; 2617 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 2618 break; 2619 /* Hub requests */ 2620 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2621 break; 2622 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2623 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 2624 "port=%d feature=%d\n", 2625 index, value)); 2626 if (index < 1 || index > sc->sc_noport) { 2627 err = USBD_IOERROR; 2628 goto ret; 2629 } 2630 port = OHCI_RH_PORT_STATUS(index); 2631 switch(value) { 2632 case UHF_PORT_ENABLE: 2633 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2634 break; 2635 case UHF_PORT_SUSPEND: 2636 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2637 break; 2638 case UHF_PORT_POWER: 2639 /* Yes, writing to the LOW_SPEED bit clears power. */ 2640 OWRITE4(sc, port, UPS_LOW_SPEED); 2641 break; 2642 case UHF_C_PORT_CONNECTION: 2643 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2644 break; 2645 case UHF_C_PORT_ENABLE: 2646 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2647 break; 2648 case UHF_C_PORT_SUSPEND: 2649 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2650 break; 2651 case UHF_C_PORT_OVER_CURRENT: 2652 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2653 break; 2654 case UHF_C_PORT_RESET: 2655 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2656 break; 2657 default: 2658 err = USBD_IOERROR; 2659 goto ret; 2660 } 2661 switch(value) { 2662 case UHF_C_PORT_CONNECTION: 2663 case UHF_C_PORT_ENABLE: 2664 case UHF_C_PORT_SUSPEND: 2665 case UHF_C_PORT_OVER_CURRENT: 2666 case UHF_C_PORT_RESET: 2667 /* Enable RHSC interrupt if condition is cleared. */ 2668 if ((OREAD4(sc, port) >> 16) == 0) 2669 ohci_rhsc_enable(sc); 2670 break; 2671 default: 2672 break; 2673 } 2674 break; 2675 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2676 if ((value & 0xff) != 0) { 2677 err = USBD_IOERROR; 2678 goto ret; 2679 } 2680 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2681 hubd = ohci_hubd; 2682 hubd.bNbrPorts = sc->sc_noport; 2683 USETW(hubd.wHubCharacteristics, 2684 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2685 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2686 /* XXX overcurrent */ 2687 ); 2688 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2689 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2690 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2691 hubd.DeviceRemovable[i++] = (u_int8_t)v; 2692 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2693 l = min(len, hubd.bDescLength); 2694 totlen = l; 2695 memcpy(buf, &hubd, l); 2696 break; 2697 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2698 if (len != 4) { 2699 err = USBD_IOERROR; 2700 goto ret; 2701 } 2702 memset(buf, 0, len); /* ? XXX */ 2703 totlen = len; 2704 break; 2705 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2706 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 2707 index)); 2708 if (index < 1 || index > sc->sc_noport) { 2709 err = USBD_IOERROR; 2710 goto ret; 2711 } 2712 if (len != 4) { 2713 err = USBD_IOERROR; 2714 goto ret; 2715 } 2716 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2717 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 2718 v)); 2719 USETW(ps.wPortStatus, v); 2720 USETW(ps.wPortChange, v >> 16); 2721 l = min(len, sizeof ps); 2722 memcpy(buf, &ps, l); 2723 totlen = l; 2724 break; 2725 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2726 err = USBD_IOERROR; 2727 goto ret; 2728 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2729 break; 2730 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2731 if (index < 1 || index > sc->sc_noport) { 2732 err = USBD_IOERROR; 2733 goto ret; 2734 } 2735 port = OHCI_RH_PORT_STATUS(index); 2736 switch(value) { 2737 case UHF_PORT_ENABLE: 2738 OWRITE4(sc, port, UPS_PORT_ENABLED); 2739 break; 2740 case UHF_PORT_SUSPEND: 2741 OWRITE4(sc, port, UPS_SUSPEND); 2742 break; 2743 case UHF_PORT_RESET: 2744 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 2745 index)); 2746 OWRITE4(sc, port, UPS_RESET); 2747 for (i = 0; i < 5; i++) { 2748 usb_delay_ms(&sc->sc_bus, 2749 USB_PORT_ROOT_RESET_DELAY); 2750 if (sc->sc_dying) { 2751 err = USBD_IOERROR; 2752 goto ret; 2753 } 2754 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2755 break; 2756 } 2757 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 2758 index, OREAD4(sc, port))); 2759 break; 2760 case UHF_PORT_POWER: 2761 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 2762 "%d\n", index)); 2763 OWRITE4(sc, port, UPS_PORT_POWER); 2764 break; 2765 default: 2766 err = USBD_IOERROR; 2767 goto ret; 2768 } 2769 break; 2770 default: 2771 err = USBD_IOERROR; 2772 goto ret; 2773 } 2774 xfer->actlen = totlen; 2775 err = USBD_NORMAL_COMPLETION; 2776 ret: 2777 xfer->status = err; 2778 s = splusb(); 2779 usb_transfer_complete(xfer); 2780 splx(s); 2781 return (USBD_IN_PROGRESS); 2782 } 2783 2784 /* Abort a root control request. */ 2785 Static void 2786 ohci_root_ctrl_abort(usbd_xfer_handle xfer) 2787 { 2788 /* Nothing to do, all transfers are synchronous. */ 2789 } 2790 2791 /* Close the root pipe. */ 2792 Static void 2793 ohci_root_ctrl_close(usbd_pipe_handle pipe) 2794 { 2795 DPRINTF(("ohci_root_ctrl_close\n")); 2796 /* Nothing to do. */ 2797 } 2798 2799 Static usbd_status 2800 ohci_root_intr_transfer(usbd_xfer_handle xfer) 2801 { 2802 usbd_status err; 2803 2804 /* Insert last in queue. */ 2805 err = usb_insert_transfer(xfer); 2806 if (err) 2807 return (err); 2808 2809 /* Pipe isn't running, start first */ 2810 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2811 } 2812 2813 Static usbd_status 2814 ohci_root_intr_start(usbd_xfer_handle xfer) 2815 { 2816 usbd_pipe_handle pipe = xfer->pipe; 2817 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2818 2819 if (sc->sc_dying) 2820 return (USBD_IOERROR); 2821 2822 sc->sc_intrxfer = xfer; 2823 2824 return (USBD_IN_PROGRESS); 2825 } 2826 2827 /* Abort a root interrupt request. */ 2828 Static void 2829 ohci_root_intr_abort(usbd_xfer_handle xfer) 2830 { 2831 int s; 2832 2833 if (xfer->pipe->intrxfer == xfer) { 2834 DPRINTF(("ohci_root_intr_abort: remove\n")); 2835 xfer->pipe->intrxfer = NULL; 2836 } 2837 xfer->status = USBD_CANCELLED; 2838 s = splusb(); 2839 usb_transfer_complete(xfer); 2840 splx(s); 2841 } 2842 2843 /* Close the root pipe. */ 2844 Static void 2845 ohci_root_intr_close(usbd_pipe_handle pipe) 2846 { 2847 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2848 2849 DPRINTF(("ohci_root_intr_close\n")); 2850 2851 sc->sc_intrxfer = NULL; 2852 } 2853 2854 /************************/ 2855 2856 Static usbd_status 2857 ohci_device_ctrl_transfer(usbd_xfer_handle xfer) 2858 { 2859 usbd_status err; 2860 2861 /* Insert last in queue. */ 2862 err = usb_insert_transfer(xfer); 2863 if (err) 2864 return (err); 2865 2866 /* Pipe isn't running, start first */ 2867 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2868 } 2869 2870 Static usbd_status 2871 ohci_device_ctrl_start(usbd_xfer_handle xfer) 2872 { 2873 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2874 usbd_status err; 2875 2876 if (sc->sc_dying) 2877 return (USBD_IOERROR); 2878 2879 #ifdef DIAGNOSTIC 2880 if (!(xfer->rqflags & URQ_REQUEST)) { 2881 /* XXX panic */ 2882 printf("ohci_device_ctrl_transfer: not a request\n"); 2883 return (USBD_INVAL); 2884 } 2885 #endif 2886 2887 err = ohci_device_request(xfer); 2888 if (err) 2889 return (err); 2890 2891 if (sc->sc_bus.use_polling) 2892 ohci_waitintr(sc, xfer); 2893 return (USBD_IN_PROGRESS); 2894 } 2895 2896 /* Abort a device control request. */ 2897 Static void 2898 ohci_device_ctrl_abort(usbd_xfer_handle xfer) 2899 { 2900 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer)); 2901 ohci_abort_xfer(xfer, USBD_CANCELLED); 2902 } 2903 2904 /* Close a device control pipe. */ 2905 Static void 2906 ohci_device_ctrl_close(usbd_pipe_handle pipe) 2907 { 2908 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2909 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2910 2911 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe)); 2912 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2913 ohci_free_std(sc, opipe->tail.td); 2914 } 2915 2916 /************************/ 2917 2918 Static void 2919 ohci_device_clear_toggle(usbd_pipe_handle pipe) 2920 { 2921 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2922 2923 opipe->sed->ed.ed_headp &= htole32(~OHCI_TOGGLECARRY); 2924 } 2925 2926 Static void 2927 ohci_noop(usbd_pipe_handle pipe) 2928 { 2929 } 2930 2931 Static usbd_status 2932 ohci_device_bulk_transfer(usbd_xfer_handle xfer) 2933 { 2934 usbd_status err; 2935 2936 /* Insert last in queue. */ 2937 err = usb_insert_transfer(xfer); 2938 if (err) 2939 return (err); 2940 2941 /* Pipe isn't running, start first */ 2942 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2943 } 2944 2945 Static usbd_status 2946 ohci_device_bulk_start(usbd_xfer_handle xfer) 2947 { 2948 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2949 usbd_device_handle dev = opipe->pipe.device; 2950 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2951 int addr = dev->address; 2952 ohci_soft_td_t *data, *tail, *tdp; 2953 ohci_soft_ed_t *sed; 2954 int s, len, isread, endpt; 2955 usbd_status err; 2956 2957 if (sc->sc_dying) 2958 return (USBD_IOERROR); 2959 2960 #ifdef DIAGNOSTIC 2961 if (xfer->rqflags & URQ_REQUEST) { 2962 /* XXX panic */ 2963 printf("ohci_device_bulk_start: a request\n"); 2964 return (USBD_INVAL); 2965 } 2966 #endif 2967 2968 len = xfer->length; 2969 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 2970 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2971 sed = opipe->sed; 2972 2973 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d " 2974 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags, 2975 endpt)); 2976 2977 opipe->u.bulk.isread = isread; 2978 opipe->u.bulk.length = len; 2979 2980 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 2981 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2982 /* Update device address */ 2983 sed->ed.ed_flags = htole32( 2984 (le32toh(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) | 2985 OHCI_ED_SET_FA(addr)); 2986 2987 /* Allocate a chain of new TDs (including a new tail). */ 2988 data = opipe->tail.td; 2989 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 2990 data, &tail); 2991 /* We want interrupt at the end of the transfer. */ 2992 tail->td.td_flags &= htole32(~OHCI_TD_INTR_MASK); 2993 tail->td.td_flags |= htole32(OHCI_TD_SET_DI(1)); 2994 tail->flags |= OHCI_CALL_DONE; 2995 tail = tail->nexttd; /* point at sentinel */ 2996 usb_syncmem(&tail->dma, tail->offs + offsetof(ohci_td_t, td_flags), 2997 sizeof(tail->td.td_flags), 2998 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2999 if (err) 3000 return (err); 3001 3002 tail->xfer = NULL; 3003 xfer->hcpriv = data; 3004 3005 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x " 3006 "td_cbp=0x%08x td_be=0x%08x\n", 3007 (int)le32toh(sed->ed.ed_flags), 3008 (int)le32toh(data->td.td_flags), 3009 (int)le32toh(data->td.td_cbp), 3010 (int)le32toh(data->td.td_be))); 3011 3012 #ifdef OHCI_DEBUG 3013 if (ohcidebug > 5) { 3014 ohci_dump_ed(sed); 3015 ohci_dump_tds(data); 3016 } 3017 #endif 3018 3019 /* Insert ED in schedule */ 3020 s = splusb(); 3021 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 3022 tdp->xfer = xfer; 3023 } 3024 sed->ed.ed_tailp = htole32(tail->physaddr); 3025 opipe->tail.td = tail; 3026 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 3027 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3028 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3029 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 3030 if (xfer->timeout && !sc->sc_bus.use_polling) { 3031 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 3032 ohci_timeout, xfer); 3033 } 3034 3035 #if 0 3036 /* This goes wrong if we are too slow. */ 3037 if (ohcidebug > 10) { 3038 delay(10000); 3039 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 3040 OREAD4(sc, OHCI_COMMAND_STATUS))); 3041 ohci_dump_ed(sed); 3042 ohci_dump_tds(data); 3043 } 3044 #endif 3045 3046 splx(s); 3047 3048 return (USBD_IN_PROGRESS); 3049 } 3050 3051 Static void 3052 ohci_device_bulk_abort(usbd_xfer_handle xfer) 3053 { 3054 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer)); 3055 ohci_abort_xfer(xfer, USBD_CANCELLED); 3056 } 3057 3058 /* 3059 * Close a device bulk pipe. 3060 */ 3061 Static void 3062 ohci_device_bulk_close(usbd_pipe_handle pipe) 3063 { 3064 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3065 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3066 3067 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe)); 3068 ohci_close_pipe(pipe, sc->sc_bulk_head); 3069 ohci_free_std(sc, opipe->tail.td); 3070 } 3071 3072 /************************/ 3073 3074 Static usbd_status 3075 ohci_device_intr_transfer(usbd_xfer_handle xfer) 3076 { 3077 usbd_status err; 3078 3079 /* Insert last in queue. */ 3080 err = usb_insert_transfer(xfer); 3081 if (err) 3082 return (err); 3083 3084 /* Pipe isn't running, start first */ 3085 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 3086 } 3087 3088 Static usbd_status 3089 ohci_device_intr_start(usbd_xfer_handle xfer) 3090 { 3091 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3092 usbd_device_handle dev = opipe->pipe.device; 3093 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 3094 ohci_soft_ed_t *sed = opipe->sed; 3095 ohci_soft_td_t *data, *tail; 3096 int len; 3097 int s; 3098 3099 if (sc->sc_dying) 3100 return (USBD_IOERROR); 3101 3102 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d " 3103 "flags=%d priv=%p\n", 3104 xfer, xfer->length, xfer->flags, xfer->priv)); 3105 3106 #ifdef DIAGNOSTIC 3107 if (xfer->rqflags & URQ_REQUEST) 3108 panic("ohci_device_intr_transfer: a request"); 3109 #endif 3110 3111 len = xfer->length; 3112 3113 data = opipe->tail.td; 3114 tail = ohci_alloc_std(sc); 3115 if (tail == NULL) 3116 return (USBD_NOMEM); 3117 tail->xfer = NULL; 3118 3119 data->td.td_flags = htole32( 3120 OHCI_TD_IN | OHCI_TD_NOCC | 3121 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 3122 if (xfer->flags & USBD_SHORT_XFER_OK) 3123 data->td.td_flags |= htole32(OHCI_TD_R); 3124 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf, 0)); 3125 data->nexttd = tail; 3126 data->td.td_nexttd = htole32(tail->physaddr); 3127 data->td.td_be = htole32(le32toh(data->td.td_cbp) + len - 1); 3128 data->len = len; 3129 data->xfer = xfer; 3130 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 3131 usb_syncmem(&data->dma, data->offs, sizeof(data->td), 3132 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3133 xfer->hcpriv = data; 3134 3135 #ifdef OHCI_DEBUG 3136 if (ohcidebug > 5) { 3137 DPRINTF(("ohci_device_intr_transfer:\n")); 3138 ohci_dump_ed(sed); 3139 ohci_dump_tds(data); 3140 } 3141 #endif 3142 3143 /* Insert ED in schedule */ 3144 s = splusb(); 3145 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3146 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3147 sed->ed.ed_tailp = htole32(tail->physaddr); 3148 opipe->tail.td = tail; 3149 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 3150 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3151 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3152 3153 #if 0 3154 /* 3155 * This goes horribly wrong, printing thousands of descriptors, 3156 * because false references are followed due to the fact that the 3157 * TD is gone. 3158 */ 3159 if (ohcidebug > 5) { 3160 usb_delay_ms(&sc->sc_bus, 5); 3161 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 3162 OREAD4(sc, OHCI_COMMAND_STATUS))); 3163 ohci_dump_ed(sed); 3164 ohci_dump_tds(data); 3165 } 3166 #endif 3167 splx(s); 3168 3169 return (USBD_IN_PROGRESS); 3170 } 3171 3172 /* Abort a device control request. */ 3173 Static void 3174 ohci_device_intr_abort(usbd_xfer_handle xfer) 3175 { 3176 if (xfer->pipe->intrxfer == xfer) { 3177 DPRINTF(("ohci_device_intr_abort: remove\n")); 3178 xfer->pipe->intrxfer = NULL; 3179 } 3180 ohci_abort_xfer(xfer, USBD_CANCELLED); 3181 } 3182 3183 /* Close a device interrupt pipe. */ 3184 Static void 3185 ohci_device_intr_close(usbd_pipe_handle pipe) 3186 { 3187 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3188 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3189 int nslots = opipe->u.intr.nslots; 3190 int pos = opipe->u.intr.pos; 3191 int j; 3192 ohci_soft_ed_t *p, *sed = opipe->sed; 3193 int s; 3194 3195 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 3196 pipe, nslots, pos)); 3197 s = splusb(); 3198 usb_syncmem(&sed->dma, sed->offs, 3199 sizeof(sed->ed), BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3200 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 3201 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3202 sizeof(sed->ed.ed_flags), 3203 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3204 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 3205 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) 3206 usb_delay_ms(&sc->sc_bus, 2); 3207 3208 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 3209 ; 3210 #ifdef DIAGNOSTIC 3211 if (p == NULL) 3212 panic("ohci_device_intr_close: ED not found"); 3213 #endif 3214 p->next = sed->next; 3215 p->ed.ed_nexted = sed->ed.ed_nexted; 3216 usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted), 3217 sizeof(p->ed.ed_nexted), 3218 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3219 splx(s); 3220 3221 for (j = 0; j < nslots; j++) 3222 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 3223 3224 ohci_free_std(sc, opipe->tail.td); 3225 ohci_free_sed(sc, opipe->sed); 3226 } 3227 3228 Static usbd_status 3229 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival) 3230 { 3231 int i, j, s, best; 3232 u_int npoll, slow, shigh, nslots; 3233 u_int bestbw, bw; 3234 ohci_soft_ed_t *hsed, *sed = opipe->sed; 3235 3236 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 3237 if (ival == 0) { 3238 printf("ohci_setintr: 0 interval\n"); 3239 return (USBD_INVAL); 3240 } 3241 3242 npoll = OHCI_NO_INTRS; 3243 while (npoll > ival) 3244 npoll /= 2; 3245 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 3246 3247 /* 3248 * We now know which level in the tree the ED must go into. 3249 * Figure out which slot has most bandwidth left over. 3250 * Slots to examine: 3251 * npoll 3252 * 1 0 3253 * 2 1 2 3254 * 4 3 4 5 6 3255 * 8 7 8 9 10 11 12 13 14 3256 * N (N-1) .. (N-1+N-1) 3257 */ 3258 slow = npoll-1; 3259 shigh = slow + npoll; 3260 nslots = OHCI_NO_INTRS / npoll; 3261 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 3262 bw = 0; 3263 for (j = 0; j < nslots; j++) 3264 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 3265 if (bw < bestbw) { 3266 best = i; 3267 bestbw = bw; 3268 } 3269 } 3270 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 3271 best, slow, shigh, bestbw)); 3272 3273 s = splusb(); 3274 hsed = sc->sc_eds[best]; 3275 sed->next = hsed->next; 3276 usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags), 3277 sizeof(hsed->ed.ed_flags), 3278 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3279 sed->ed.ed_nexted = hsed->ed.ed_nexted; 3280 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3281 sizeof(sed->ed.ed_flags), 3282 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3283 hsed->next = sed; 3284 hsed->ed.ed_nexted = htole32(sed->physaddr); 3285 usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags), 3286 sizeof(hsed->ed.ed_flags), 3287 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3288 splx(s); 3289 3290 for (j = 0; j < nslots; j++) 3291 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 3292 opipe->u.intr.nslots = nslots; 3293 opipe->u.intr.pos = best; 3294 3295 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 3296 return (USBD_NORMAL_COMPLETION); 3297 } 3298 3299 /***********************/ 3300 3301 usbd_status 3302 ohci_device_isoc_transfer(usbd_xfer_handle xfer) 3303 { 3304 usbd_status err; 3305 3306 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer)); 3307 3308 /* Put it on our queue, */ 3309 err = usb_insert_transfer(xfer); 3310 3311 /* bail out on error, */ 3312 if (err && err != USBD_IN_PROGRESS) 3313 return (err); 3314 3315 /* XXX should check inuse here */ 3316 3317 /* insert into schedule, */ 3318 ohci_device_isoc_enter(xfer); 3319 3320 /* and start if the pipe wasn't running */ 3321 if (!err) 3322 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 3323 3324 return (err); 3325 } 3326 3327 void 3328 ohci_device_isoc_enter(usbd_xfer_handle xfer) 3329 { 3330 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3331 usbd_device_handle dev = opipe->pipe.device; 3332 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 3333 ohci_soft_ed_t *sed = opipe->sed; 3334 struct iso *iso = &opipe->u.iso; 3335 ohci_soft_itd_t *sitd, *nsitd; 3336 ohci_physaddr_t buf, offs, noffs, bp0; 3337 int i, ncur, nframes; 3338 int s; 3339 3340 DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p " 3341 "nframes=%d\n", 3342 iso->inuse, iso->next, xfer, xfer->nframes)); 3343 3344 if (sc->sc_dying) 3345 return; 3346 3347 if (iso->next == -1) { 3348 /* Not in use yet, schedule it a few frames ahead. */ 3349 iso->next = le32toh(sc->sc_hcca->hcca_frame_number) + 5; 3350 DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n", 3351 iso->next)); 3352 } 3353 3354 sitd = opipe->tail.itd; 3355 buf = DMAADDR(&xfer->dmabuf, 0); 3356 bp0 = OHCI_PAGE(buf); 3357 offs = OHCI_PAGE_OFFSET(buf); 3358 nframes = xfer->nframes; 3359 xfer->hcpriv = sitd; 3360 for (i = ncur = 0; i < nframes; i++, ncur++) { 3361 noffs = offs + xfer->frlengths[i]; 3362 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ 3363 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */ 3364 3365 /* Allocate next ITD */ 3366 nsitd = ohci_alloc_sitd(sc); 3367 if (nsitd == NULL) { 3368 /* XXX what now? */ 3369 printf("%s: isoc TD alloc failed\n", 3370 USBDEVNAME(sc->sc_bus.bdev)); 3371 return; 3372 } 3373 3374 /* Fill current ITD */ 3375 sitd->itd.itd_flags = htole32( 3376 OHCI_ITD_NOCC | 3377 OHCI_ITD_SET_SF(iso->next) | 3378 OHCI_ITD_SET_DI(6) | /* delay intr a little */ 3379 OHCI_ITD_SET_FC(ncur)); 3380 sitd->itd.itd_bp0 = htole32(bp0); 3381 sitd->nextitd = nsitd; 3382 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 3383 sitd->itd.itd_be = htole32(bp0 + offs - 1); 3384 sitd->xfer = xfer; 3385 sitd->flags = 0; 3386 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 3387 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3388 3389 sitd = nsitd; 3390 iso->next = iso->next + ncur; 3391 bp0 = OHCI_PAGE(buf + offs); 3392 ncur = 0; 3393 } 3394 sitd->itd.itd_offset[ncur] = htole16(OHCI_ITD_MK_OFFS(offs)); 3395 offs = noffs; 3396 } 3397 nsitd = ohci_alloc_sitd(sc); 3398 if (nsitd == NULL) { 3399 /* XXX what now? */ 3400 printf("%s: isoc TD alloc failed\n", 3401 USBDEVNAME(sc->sc_bus.bdev)); 3402 return; 3403 } 3404 /* Fixup last used ITD */ 3405 sitd->itd.itd_flags = htole32( 3406 OHCI_ITD_NOCC | 3407 OHCI_ITD_SET_SF(iso->next) | 3408 OHCI_ITD_SET_DI(0) | 3409 OHCI_ITD_SET_FC(ncur)); 3410 sitd->itd.itd_bp0 = htole32(bp0); 3411 sitd->nextitd = nsitd; 3412 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 3413 sitd->itd.itd_be = htole32(bp0 + offs - 1); 3414 sitd->xfer = xfer; 3415 sitd->flags = OHCI_CALL_DONE; 3416 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 3417 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3418 3419 iso->next = iso->next + ncur; 3420 iso->inuse += nframes; 3421 3422 xfer->actlen = offs; /* XXX pretend we did it all */ 3423 3424 xfer->status = USBD_IN_PROGRESS; 3425 3426 #ifdef OHCI_DEBUG 3427 if (ohcidebug > 5) { 3428 DPRINTF(("ohci_device_isoc_enter: frame=%d\n", 3429 le32toh(sc->sc_hcca->hcca_frame_number))); 3430 ohci_dump_itds(xfer->hcpriv); 3431 ohci_dump_ed(sed); 3432 } 3433 #endif 3434 3435 s = splusb(); 3436 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3437 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3438 sed->ed.ed_tailp = htole32(nsitd->physaddr); 3439 opipe->tail.itd = nsitd; 3440 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 3441 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3442 sizeof(sed->ed.ed_flags), 3443 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3444 splx(s); 3445 3446 #ifdef OHCI_DEBUG 3447 if (ohcidebug > 5) { 3448 delay(150000); 3449 DPRINTF(("ohci_device_isoc_enter: after frame=%d\n", 3450 le32toh(sc->sc_hcca->hcca_frame_number))); 3451 ohci_dump_itds(xfer->hcpriv); 3452 ohci_dump_ed(sed); 3453 } 3454 #endif 3455 } 3456 3457 usbd_status 3458 ohci_device_isoc_start(usbd_xfer_handle xfer) 3459 { 3460 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3461 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3462 3463 DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer)); 3464 3465 if (sc->sc_dying) 3466 return (USBD_IOERROR); 3467 3468 #ifdef DIAGNOSTIC 3469 if (xfer->status != USBD_IN_PROGRESS) 3470 printf("ohci_device_isoc_start: not in progress %p\n", xfer); 3471 #endif 3472 3473 /* XXX anything to do? */ 3474 3475 return (USBD_IN_PROGRESS); 3476 } 3477 3478 void 3479 ohci_device_isoc_abort(usbd_xfer_handle xfer) 3480 { 3481 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3482 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3483 ohci_soft_ed_t *sed; 3484 ohci_soft_itd_t *sitd; 3485 int s; 3486 3487 s = splusb(); 3488 3489 DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer)); 3490 3491 /* Transfer is already done. */ 3492 if (xfer->status != USBD_NOT_STARTED && 3493 xfer->status != USBD_IN_PROGRESS) { 3494 splx(s); 3495 printf("ohci_device_isoc_abort: early return\n"); 3496 return; 3497 } 3498 3499 /* Give xfer the requested abort code. */ 3500 xfer->status = USBD_CANCELLED; 3501 3502 sed = opipe->sed; 3503 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3504 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3505 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 3506 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3507 sizeof(sed->ed.ed_flags), 3508 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3509 3510 sitd = xfer->hcpriv; 3511 #ifdef DIAGNOSTIC 3512 if (sitd == NULL) { 3513 splx(s); 3514 printf("ohci_device_isoc_abort: hcpriv==0\n"); 3515 return; 3516 } 3517 #endif 3518 for (; sitd->xfer == xfer; sitd = sitd->nextitd) { 3519 #ifdef DIAGNOSTIC 3520 DPRINTFN(1,("abort sets done sitd=%p\n", sitd)); 3521 sitd->isdone = 1; 3522 #endif 3523 } 3524 3525 splx(s); 3526 3527 usb_delay_ms(&sc->sc_bus, OHCI_ITD_NOFFSET); 3528 3529 s = splusb(); 3530 3531 /* Run callback. */ 3532 usb_transfer_complete(xfer); 3533 3534 sed->ed.ed_headp = htole32(sitd->physaddr); /* unlink TDs */ 3535 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 3536 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3537 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3538 3539 splx(s); 3540 } 3541 3542 void 3543 ohci_device_isoc_done(usbd_xfer_handle xfer) 3544 { 3545 DPRINTFN(1,("ohci_device_isoc_done: xfer=%p\n", xfer)); 3546 } 3547 3548 usbd_status 3549 ohci_setup_isoc(usbd_pipe_handle pipe) 3550 { 3551 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3552 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3553 struct iso *iso = &opipe->u.iso; 3554 int s; 3555 3556 iso->next = -1; 3557 iso->inuse = 0; 3558 3559 s = splusb(); 3560 ohci_add_ed(opipe->sed, sc->sc_isoc_head); 3561 splx(s); 3562 3563 return (USBD_NORMAL_COMPLETION); 3564 } 3565 3566 void 3567 ohci_device_isoc_close(usbd_pipe_handle pipe) 3568 { 3569 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3570 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3571 3572 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe)); 3573 ohci_close_pipe(pipe, sc->sc_isoc_head); 3574 #ifdef DIAGNOSTIC 3575 opipe->tail.itd->isdone = 1; 3576 #endif 3577 ohci_free_sitd(sc, opipe->tail.itd); 3578 } 3579
Indexes created Fri Oct 03 02:09:57 GMT 2025