ohci.c revision 1.158
1 /* $NetBSD: ohci.c,v 1.158 2005/04/17 14:46:49 toshii Exp $ */ 2 /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */ 3 4 /* 5 * Copyright (c) 1998, 2004, 2005 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Lennart Augustsson (lennart (at) augustsson.net) at 10 * Carlstedt Research & Technology. 11 * This code is derived from software contributed to The NetBSD Foundation 12 * by Charles M. Hannum. 13 * 14 * Redistribution and use in source and binary forms, with or without 15 * modification, are permitted provided that the following conditions 16 * are met: 17 * 1. Redistributions of source code must retain the above copyright 18 * notice, this list of conditions and the following disclaimer. 19 * 2. Redistributions in binary form must reproduce the above copyright 20 * notice, this list of conditions and the following disclaimer in the 21 * documentation and/or other materials provided with the distribution. 22 * 3. All advertising materials mentioning features or use of this software 23 * must display the following acknowledgement: 24 * This product includes software developed by the NetBSD 25 * Foundation, Inc. and its contributors. 26 * 4. Neither the name of The NetBSD Foundation nor the names of its 27 * contributors may be used to endorse or promote products derived 28 * from this software without specific prior written permission. 29 * 30 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 31 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 32 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 33 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 34 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 35 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 36 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 37 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 38 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 39 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 40 * POSSIBILITY OF SUCH DAMAGE. 41 */ 42 43 /* 44 * USB Open Host Controller driver. 45 * 46 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html 47 * USB spec: http://www.usb.org/developers/docs/usbspec.zip 48 */ 49 50 #include <sys/cdefs.h> 51 __KERNEL_RCSID(0, "$NetBSD: ohci.c,v 1.158 2005/04/17 14:46:49 toshii Exp $"); 52 53 #include <sys/param.h> 54 #include <sys/systm.h> 55 #include <sys/malloc.h> 56 #if defined(__NetBSD__) || defined(__OpenBSD__) 57 #include <sys/kernel.h> 58 #include <sys/device.h> 59 #include <sys/select.h> 60 #include <uvm/uvm_extern.h> 61 #elif defined(__FreeBSD__) 62 #include <sys/module.h> 63 #include <sys/bus.h> 64 #include <machine/bus_pio.h> 65 #include <machine/bus_memio.h> 66 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 67 #include <machine/cpu.h> 68 #endif 69 #endif 70 #include <sys/proc.h> 71 #include <sys/queue.h> 72 73 #include <machine/bus.h> 74 #include <machine/endian.h> 75 76 #include <dev/usb/usb.h> 77 #include <dev/usb/usbdi.h> 78 #include <dev/usb/usbdivar.h> 79 #include <dev/usb/usb_mem.h> 80 #include <dev/usb/usb_quirks.h> 81 82 #include <dev/usb/ohcireg.h> 83 #include <dev/usb/ohcivar.h> 84 85 #if defined(__FreeBSD__) 86 #include <machine/clock.h> 87 88 #define delay(d) DELAY(d) 89 #endif 90 91 #if defined(__OpenBSD__) 92 struct cfdriver ohci_cd = { 93 NULL, "ohci", DV_DULL 94 }; 95 #endif 96 97 #ifdef OHCI_DEBUG 98 #define DPRINTF(x) if (ohcidebug) logprintf x 99 #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x 100 int ohcidebug = 0; 101 #ifndef __NetBSD__ 102 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 103 #endif 104 #else 105 #define DPRINTF(x) 106 #define DPRINTFN(n,x) 107 #endif 108 109 /* 110 * The OHCI controller is little endian, so on big endian machines 111 * the data strored in memory needs to be swapped. 112 */ 113 #if defined(__FreeBSD__) || defined(__OpenBSD__) 114 #if BYTE_ORDER == BIG_ENDIAN 115 #define htole32(x) (bswap32(x)) 116 #define le32toh(x) (bswap32(x)) 117 #else 118 #define htole32(x) (x) 119 #define le32toh(x) (x) 120 #endif 121 #endif 122 123 struct ohci_pipe; 124 125 Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *); 126 Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *); 127 128 Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *); 129 Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *); 130 131 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *); 132 Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *); 133 134 #if 0 135 Static void ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *, 136 ohci_soft_td_t *); 137 #endif 138 Static usbd_status ohci_alloc_std_chain(struct ohci_pipe *, 139 ohci_softc_t *, int, int, usbd_xfer_handle, 140 ohci_soft_td_t *, ohci_soft_td_t **); 141 142 Static void ohci_shutdown(void *v); 143 Static void ohci_power(int, void *); 144 Static usbd_status ohci_open(usbd_pipe_handle); 145 Static void ohci_poll(struct usbd_bus *); 146 Static void ohci_softintr(void *); 147 Static void ohci_waitintr(ohci_softc_t *, usbd_xfer_handle); 148 Static void ohci_rhsc(ohci_softc_t *, usbd_xfer_handle); 149 150 Static usbd_status ohci_device_request(usbd_xfer_handle xfer); 151 Static void ohci_add_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 152 Static void ohci_rem_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 153 Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *); 154 Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *); 155 Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t); 156 Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *); 157 Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *); 158 Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t); 159 160 Static usbd_status ohci_setup_isoc(usbd_pipe_handle pipe); 161 Static void ohci_device_isoc_enter(usbd_xfer_handle); 162 163 Static usbd_status ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 164 Static void ohci_freem(struct usbd_bus *, usb_dma_t *); 165 166 Static usbd_xfer_handle ohci_allocx(struct usbd_bus *); 167 Static void ohci_freex(struct usbd_bus *, usbd_xfer_handle); 168 169 Static usbd_status ohci_root_ctrl_transfer(usbd_xfer_handle); 170 Static usbd_status ohci_root_ctrl_start(usbd_xfer_handle); 171 Static void ohci_root_ctrl_abort(usbd_xfer_handle); 172 Static void ohci_root_ctrl_close(usbd_pipe_handle); 173 Static void ohci_root_ctrl_done(usbd_xfer_handle); 174 175 Static usbd_status ohci_root_intr_transfer(usbd_xfer_handle); 176 Static usbd_status ohci_root_intr_start(usbd_xfer_handle); 177 Static void ohci_root_intr_abort(usbd_xfer_handle); 178 Static void ohci_root_intr_close(usbd_pipe_handle); 179 Static void ohci_root_intr_done(usbd_xfer_handle); 180 181 Static usbd_status ohci_device_ctrl_transfer(usbd_xfer_handle); 182 Static usbd_status ohci_device_ctrl_start(usbd_xfer_handle); 183 Static void ohci_device_ctrl_abort(usbd_xfer_handle); 184 Static void ohci_device_ctrl_close(usbd_pipe_handle); 185 Static void ohci_device_ctrl_done(usbd_xfer_handle); 186 187 Static usbd_status ohci_device_bulk_transfer(usbd_xfer_handle); 188 Static usbd_status ohci_device_bulk_start(usbd_xfer_handle); 189 Static void ohci_device_bulk_abort(usbd_xfer_handle); 190 Static void ohci_device_bulk_close(usbd_pipe_handle); 191 Static void ohci_device_bulk_done(usbd_xfer_handle); 192 193 Static usbd_status ohci_device_intr_transfer(usbd_xfer_handle); 194 Static usbd_status ohci_device_intr_start(usbd_xfer_handle); 195 Static void ohci_device_intr_abort(usbd_xfer_handle); 196 Static void ohci_device_intr_close(usbd_pipe_handle); 197 Static void ohci_device_intr_done(usbd_xfer_handle); 198 199 Static usbd_status ohci_device_isoc_transfer(usbd_xfer_handle); 200 Static usbd_status ohci_device_isoc_start(usbd_xfer_handle); 201 Static void ohci_device_isoc_abort(usbd_xfer_handle); 202 Static void ohci_device_isoc_close(usbd_pipe_handle); 203 Static void ohci_device_isoc_done(usbd_xfer_handle); 204 205 Static usbd_status ohci_device_setintr(ohci_softc_t *sc, 206 struct ohci_pipe *pipe, int ival); 207 208 Static int ohci_str(usb_string_descriptor_t *, int, const char *); 209 210 Static void ohci_timeout(void *); 211 Static void ohci_timeout_task(void *); 212 Static void ohci_rhsc_enable(void *); 213 214 Static void ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *); 215 Static void ohci_abort_xfer(usbd_xfer_handle, usbd_status); 216 217 Static void ohci_device_clear_toggle(usbd_pipe_handle pipe); 218 Static void ohci_noop(usbd_pipe_handle pipe); 219 220 #ifdef OHCI_DEBUG 221 Static void ohci_dumpregs(ohci_softc_t *); 222 Static void ohci_dump_tds(ohci_soft_td_t *); 223 Static void ohci_dump_td(ohci_soft_td_t *); 224 Static void ohci_dump_ed(ohci_soft_ed_t *); 225 Static void ohci_dump_itd(ohci_soft_itd_t *); 226 Static void ohci_dump_itds(ohci_soft_itd_t *); 227 #endif 228 229 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 230 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 231 #define OWRITE1(sc, r, x) \ 232 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 233 #define OWRITE2(sc, r, x) \ 234 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 235 #define OWRITE4(sc, r, x) \ 236 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 237 #define OREAD1(sc, r) (OBARR(sc), bus_space_read_1((sc)->iot, (sc)->ioh, (r))) 238 #define OREAD2(sc, r) (OBARR(sc), bus_space_read_2((sc)->iot, (sc)->ioh, (r))) 239 #define OREAD4(sc, r) (OBARR(sc), bus_space_read_4((sc)->iot, (sc)->ioh, (r))) 240 241 /* Reverse the bits in a value 0 .. 31 */ 242 Static u_int8_t revbits[OHCI_NO_INTRS] = 243 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 244 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 245 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 246 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 247 248 struct ohci_pipe { 249 struct usbd_pipe pipe; 250 ohci_soft_ed_t *sed; 251 union { 252 ohci_soft_td_t *td; 253 ohci_soft_itd_t *itd; 254 } tail; 255 /* Info needed for different pipe kinds. */ 256 union { 257 /* Control pipe */ 258 struct { 259 usb_dma_t reqdma; 260 u_int length; 261 ohci_soft_td_t *setup, *data, *stat; 262 } ctl; 263 /* Interrupt pipe */ 264 struct { 265 int nslots; 266 int pos; 267 } intr; 268 /* Bulk pipe */ 269 struct { 270 u_int length; 271 int isread; 272 } bulk; 273 /* Iso pipe */ 274 struct iso { 275 int next, inuse; 276 } iso; 277 } u; 278 }; 279 280 #define OHCI_INTR_ENDPT 1 281 282 Static struct usbd_bus_methods ohci_bus_methods = { 283 ohci_open, 284 ohci_softintr, 285 ohci_poll, 286 ohci_allocm, 287 ohci_freem, 288 ohci_allocx, 289 ohci_freex, 290 }; 291 292 Static struct usbd_pipe_methods ohci_root_ctrl_methods = { 293 ohci_root_ctrl_transfer, 294 ohci_root_ctrl_start, 295 ohci_root_ctrl_abort, 296 ohci_root_ctrl_close, 297 ohci_noop, 298 ohci_root_ctrl_done, 299 }; 300 301 Static struct usbd_pipe_methods ohci_root_intr_methods = { 302 ohci_root_intr_transfer, 303 ohci_root_intr_start, 304 ohci_root_intr_abort, 305 ohci_root_intr_close, 306 ohci_noop, 307 ohci_root_intr_done, 308 }; 309 310 Static struct usbd_pipe_methods ohci_device_ctrl_methods = { 311 ohci_device_ctrl_transfer, 312 ohci_device_ctrl_start, 313 ohci_device_ctrl_abort, 314 ohci_device_ctrl_close, 315 ohci_noop, 316 ohci_device_ctrl_done, 317 }; 318 319 Static struct usbd_pipe_methods ohci_device_intr_methods = { 320 ohci_device_intr_transfer, 321 ohci_device_intr_start, 322 ohci_device_intr_abort, 323 ohci_device_intr_close, 324 ohci_device_clear_toggle, 325 ohci_device_intr_done, 326 }; 327 328 Static struct usbd_pipe_methods ohci_device_bulk_methods = { 329 ohci_device_bulk_transfer, 330 ohci_device_bulk_start, 331 ohci_device_bulk_abort, 332 ohci_device_bulk_close, 333 ohci_device_clear_toggle, 334 ohci_device_bulk_done, 335 }; 336 337 Static struct usbd_pipe_methods ohci_device_isoc_methods = { 338 ohci_device_isoc_transfer, 339 ohci_device_isoc_start, 340 ohci_device_isoc_abort, 341 ohci_device_isoc_close, 342 ohci_noop, 343 ohci_device_isoc_done, 344 }; 345 346 #if defined(__NetBSD__) || defined(__OpenBSD__) 347 int 348 ohci_activate(device_ptr_t self, enum devact act) 349 { 350 struct ohci_softc *sc = (struct ohci_softc *)self; 351 int rv = 0; 352 353 switch (act) { 354 case DVACT_ACTIVATE: 355 return (EOPNOTSUPP); 356 357 case DVACT_DEACTIVATE: 358 if (sc->sc_child != NULL) 359 rv = config_deactivate(sc->sc_child); 360 sc->sc_dying = 1; 361 break; 362 } 363 return (rv); 364 } 365 366 int 367 ohci_detach(struct ohci_softc *sc, int flags) 368 { 369 int rv = 0; 370 371 if (sc->sc_child != NULL) 372 rv = config_detach(sc->sc_child, flags); 373 374 if (rv != 0) 375 return (rv); 376 377 usb_uncallout(sc->sc_tmo_rhsc, ohci_rhsc_enable, sc); 378 379 #if defined(__NetBSD__) || defined(__OpenBSD__) 380 powerhook_disestablish(sc->sc_powerhook); 381 shutdownhook_disestablish(sc->sc_shutdownhook); 382 #endif 383 384 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 385 386 /* free data structures XXX */ 387 388 return (rv); 389 } 390 #endif 391 392 ohci_soft_ed_t * 393 ohci_alloc_sed(ohci_softc_t *sc) 394 { 395 ohci_soft_ed_t *sed; 396 usbd_status err; 397 int i, offs; 398 usb_dma_t dma; 399 400 if (sc->sc_freeeds == NULL) { 401 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 402 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 403 OHCI_ED_ALIGN, &dma); 404 if (err) 405 return (0); 406 for(i = 0; i < OHCI_SED_CHUNK; i++) { 407 offs = i * OHCI_SED_SIZE; 408 sed = KERNADDR(&dma, offs); 409 sed->physaddr = DMAADDR(&dma, offs); 410 sed->next = sc->sc_freeeds; 411 sc->sc_freeeds = sed; 412 } 413 } 414 sed = sc->sc_freeeds; 415 sc->sc_freeeds = sed->next; 416 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 417 sed->next = 0; 418 return (sed); 419 } 420 421 void 422 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 423 { 424 sed->next = sc->sc_freeeds; 425 sc->sc_freeeds = sed; 426 } 427 428 ohci_soft_td_t * 429 ohci_alloc_std(ohci_softc_t *sc) 430 { 431 ohci_soft_td_t *std; 432 usbd_status err; 433 int i, offs; 434 usb_dma_t dma; 435 int s; 436 437 if (sc->sc_freetds == NULL) { 438 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 439 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 440 OHCI_TD_ALIGN, &dma); 441 if (err) 442 return (NULL); 443 s = splusb(); 444 for(i = 0; i < OHCI_STD_CHUNK; i++) { 445 offs = i * OHCI_STD_SIZE; 446 std = KERNADDR(&dma, offs); 447 std->physaddr = DMAADDR(&dma, offs); 448 std->nexttd = sc->sc_freetds; 449 sc->sc_freetds = std; 450 } 451 splx(s); 452 } 453 454 s = splusb(); 455 std = sc->sc_freetds; 456 sc->sc_freetds = std->nexttd; 457 memset(&std->td, 0, sizeof(ohci_td_t)); 458 std->nexttd = NULL; 459 std->xfer = NULL; 460 ohci_hash_add_td(sc, std); 461 splx(s); 462 463 return (std); 464 } 465 466 void 467 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std) 468 { 469 int s; 470 471 s = splusb(); 472 ohci_hash_rem_td(sc, std); 473 std->nexttd = sc->sc_freetds; 474 sc->sc_freetds = std; 475 splx(s); 476 } 477 478 usbd_status 479 ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc, 480 int alen, int rd, usbd_xfer_handle xfer, 481 ohci_soft_td_t *sp, ohci_soft_td_t **ep) 482 { 483 ohci_soft_td_t *next, *cur; 484 ohci_physaddr_t dataphys, dataphysend; 485 u_int32_t tdflags; 486 int len, curlen; 487 usb_dma_t *dma = &xfer->dmabuf; 488 u_int16_t flags = xfer->flags; 489 490 DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen)); 491 492 len = alen; 493 cur = sp; 494 dataphys = DMAADDR(dma, 0); 495 dataphysend = OHCI_PAGE(dataphys + len - 1); 496 tdflags = htole32( 497 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 498 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) | 499 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR); 500 501 for (;;) { 502 next = ohci_alloc_std(sc); 503 if (next == NULL) 504 goto nomem; 505 506 /* The OHCI hardware can handle at most one page crossing. */ 507 if (OHCI_PAGE(dataphys) == dataphysend || 508 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) { 509 /* we can handle it in this TD */ 510 curlen = len; 511 } else { 512 /* must use multiple TDs, fill as much as possible. */ 513 curlen = 2 * OHCI_PAGE_SIZE - 514 (dataphys & (OHCI_PAGE_SIZE-1)); 515 /* the length must be a multiple of the max size */ 516 curlen -= curlen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize); 517 #ifdef DIAGNOSTIC 518 if (curlen == 0) 519 panic("ohci_alloc_std: curlen == 0"); 520 #endif 521 } 522 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x " 523 "dataphysend=0x%08x len=%d curlen=%d\n", 524 dataphys, dataphysend, 525 len, curlen)); 526 len -= curlen; 527 528 cur->td.td_flags = tdflags; 529 cur->td.td_cbp = htole32(dataphys); 530 cur->nexttd = next; 531 cur->td.td_nexttd = htole32(next->physaddr); 532 cur->td.td_be = htole32(dataphys + curlen - 1); 533 cur->len = curlen; 534 cur->flags = OHCI_ADD_LEN; 535 cur->xfer = xfer; 536 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n", 537 dataphys, dataphys + curlen - 1)); 538 if (len == 0) 539 break; 540 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n")); 541 dataphys += curlen; 542 cur = next; 543 } 544 if ((flags & USBD_FORCE_SHORT_XFER) && 545 alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) { 546 /* Force a 0 length transfer at the end. */ 547 548 cur = next; 549 next = ohci_alloc_std(sc); 550 if (next == NULL) 551 goto nomem; 552 553 cur->td.td_flags = tdflags; 554 cur->td.td_cbp = 0; /* indicate 0 length packet */ 555 cur->nexttd = next; 556 cur->td.td_nexttd = htole32(next->physaddr); 557 cur->td.td_be = ~0; 558 cur->len = 0; 559 cur->flags = 0; 560 cur->xfer = xfer; 561 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n")); 562 } 563 *ep = cur; 564 565 return (USBD_NORMAL_COMPLETION); 566 567 nomem: 568 /* XXX free chain */ 569 return (USBD_NOMEM); 570 } 571 572 #if 0 573 Static void 574 ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std, 575 ohci_soft_td_t *stdend) 576 { 577 ohci_soft_td_t *p; 578 579 for (; std != stdend; std = p) { 580 p = std->nexttd; 581 ohci_free_std(sc, std); 582 } 583 } 584 #endif 585 586 ohci_soft_itd_t * 587 ohci_alloc_sitd(ohci_softc_t *sc) 588 { 589 ohci_soft_itd_t *sitd; 590 usbd_status err; 591 int i, s, offs; 592 usb_dma_t dma; 593 594 if (sc->sc_freeitds == NULL) { 595 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n")); 596 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK, 597 OHCI_ITD_ALIGN, &dma); 598 if (err) 599 return (NULL); 600 s = splusb(); 601 for(i = 0; i < OHCI_SITD_CHUNK; i++) { 602 offs = i * OHCI_SITD_SIZE; 603 sitd = KERNADDR(&dma, offs); 604 sitd->physaddr = DMAADDR(&dma, offs); 605 sitd->nextitd = sc->sc_freeitds; 606 sc->sc_freeitds = sitd; 607 } 608 splx(s); 609 } 610 611 s = splusb(); 612 sitd = sc->sc_freeitds; 613 sc->sc_freeitds = sitd->nextitd; 614 memset(&sitd->itd, 0, sizeof(ohci_itd_t)); 615 sitd->nextitd = NULL; 616 sitd->xfer = NULL; 617 ohci_hash_add_itd(sc, sitd); 618 splx(s); 619 620 #ifdef DIAGNOSTIC 621 sitd->isdone = 0; 622 #endif 623 624 return (sitd); 625 } 626 627 void 628 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 629 { 630 int s; 631 632 DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd)); 633 634 #ifdef DIAGNOSTIC 635 if (!sitd->isdone) { 636 panic("ohci_free_sitd: sitd=%p not done", sitd); 637 return; 638 } 639 /* Warn double free */ 640 sitd->isdone = 0; 641 #endif 642 643 s = splusb(); 644 ohci_hash_rem_itd(sc, sitd); 645 sitd->nextitd = sc->sc_freeitds; 646 sc->sc_freeitds = sitd; 647 splx(s); 648 } 649 650 usbd_status 651 ohci_init(ohci_softc_t *sc) 652 { 653 ohci_soft_ed_t *sed, *psed; 654 usbd_status err; 655 int i; 656 u_int32_t s, ctl, ival, hcr, fm, per, rev, desca; 657 658 DPRINTF(("ohci_init: start\n")); 659 #if defined(__OpenBSD__) 660 printf(","); 661 #else 662 printf("%s:", USBDEVNAME(sc->sc_bus.bdev)); 663 #endif 664 rev = OREAD4(sc, OHCI_REVISION); 665 printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev), 666 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 667 668 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 669 printf("%s: unsupported OHCI revision\n", 670 USBDEVNAME(sc->sc_bus.bdev)); 671 sc->sc_bus.usbrev = USBREV_UNKNOWN; 672 return (USBD_INVAL); 673 } 674 sc->sc_bus.usbrev = USBREV_1_0; 675 676 for (i = 0; i < OHCI_HASH_SIZE; i++) 677 LIST_INIT(&sc->sc_hash_tds[i]); 678 for (i = 0; i < OHCI_HASH_SIZE; i++) 679 LIST_INIT(&sc->sc_hash_itds[i]); 680 681 SIMPLEQ_INIT(&sc->sc_free_xfers); 682 683 #ifdef __NetBSD__ 684 usb_setup_reserve(sc, &sc->sc_dma_reserve, sc->sc_bus.dmatag, 685 USB_MEM_RESERVE); 686 #endif 687 688 /* XXX determine alignment by R/W */ 689 /* Allocate the HCCA area. */ 690 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 691 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 692 if (err) 693 return (err); 694 sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0); 695 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 696 697 sc->sc_eintrs = OHCI_NORMAL_INTRS; 698 699 /* Allocate dummy ED that starts the control list. */ 700 sc->sc_ctrl_head = ohci_alloc_sed(sc); 701 if (sc->sc_ctrl_head == NULL) { 702 err = USBD_NOMEM; 703 goto bad1; 704 } 705 sc->sc_ctrl_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 706 707 /* Allocate dummy ED that starts the bulk list. */ 708 sc->sc_bulk_head = ohci_alloc_sed(sc); 709 if (sc->sc_bulk_head == NULL) { 710 err = USBD_NOMEM; 711 goto bad2; 712 } 713 sc->sc_bulk_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 714 715 /* Allocate dummy ED that starts the isochronous list. */ 716 sc->sc_isoc_head = ohci_alloc_sed(sc); 717 if (sc->sc_isoc_head == NULL) { 718 err = USBD_NOMEM; 719 goto bad3; 720 } 721 sc->sc_isoc_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 722 723 /* Allocate all the dummy EDs that make up the interrupt tree. */ 724 for (i = 0; i < OHCI_NO_EDS; i++) { 725 sed = ohci_alloc_sed(sc); 726 if (sed == NULL) { 727 while (--i >= 0) 728 ohci_free_sed(sc, sc->sc_eds[i]); 729 err = USBD_NOMEM; 730 goto bad4; 731 } 732 /* All ED fields are set to 0. */ 733 sc->sc_eds[i] = sed; 734 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 735 if (i != 0) 736 psed = sc->sc_eds[(i-1) / 2]; 737 else 738 psed= sc->sc_isoc_head; 739 sed->next = psed; 740 sed->ed.ed_nexted = htole32(psed->physaddr); 741 } 742 /* 743 * Fill HCCA interrupt table. The bit reversal is to get 744 * the tree set up properly to spread the interrupts. 745 */ 746 for (i = 0; i < OHCI_NO_INTRS; i++) 747 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 748 htole32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 749 750 #ifdef OHCI_DEBUG 751 if (ohcidebug > 15) { 752 for (i = 0; i < OHCI_NO_EDS; i++) { 753 printf("ed#%d ", i); 754 ohci_dump_ed(sc->sc_eds[i]); 755 } 756 printf("iso "); 757 ohci_dump_ed(sc->sc_isoc_head); 758 } 759 #endif 760 761 /* Determine in what context we are running. */ 762 ctl = OREAD4(sc, OHCI_CONTROL); 763 if (ctl & OHCI_IR) { 764 /* SMM active, request change */ 765 DPRINTF(("ohci_init: SMM active, request owner change\n")); 766 s = OREAD4(sc, OHCI_COMMAND_STATUS); 767 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 768 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 769 usb_delay_ms(&sc->sc_bus, 1); 770 ctl = OREAD4(sc, OHCI_CONTROL); 771 } 772 if ((ctl & OHCI_IR) == 0) { 773 printf("%s: SMM does not respond, resetting\n", 774 USBDEVNAME(sc->sc_bus.bdev)); 775 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 776 goto reset; 777 } 778 #if 0 779 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */ 780 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 781 /* BIOS started controller. */ 782 DPRINTF(("ohci_init: BIOS active\n")); 783 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 784 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL); 785 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 786 } 787 #endif 788 } else { 789 DPRINTF(("ohci_init: cold started\n")); 790 reset: 791 /* Controller was cold started. */ 792 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 793 } 794 795 /* 796 * This reset should not be necessary according to the OHCI spec, but 797 * without it some controllers do not start. 798 */ 799 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 800 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 801 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 802 803 /* We now own the host controller and the bus has been reset. */ 804 ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL)); 805 806 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 807 /* Nominal time for a reset is 10 us. */ 808 for (i = 0; i < 10; i++) { 809 delay(10); 810 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 811 if (!hcr) 812 break; 813 } 814 if (hcr) { 815 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 816 err = USBD_IOERROR; 817 goto bad5; 818 } 819 #ifdef OHCI_DEBUG 820 if (ohcidebug > 15) 821 ohci_dumpregs(sc); 822 #endif 823 824 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 825 826 /* Set up HC registers. */ 827 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 828 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 829 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 830 /* disable all interrupts and then switch on all desired interrupts */ 831 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 832 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 833 /* switch on desired functional features */ 834 ctl = OREAD4(sc, OHCI_CONTROL); 835 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 836 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 837 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL; 838 /* And finally start it! */ 839 OWRITE4(sc, OHCI_CONTROL, ctl); 840 841 /* 842 * The controller is now OPERATIONAL. Set a some final 843 * registers that should be set earlier, but that the 844 * controller ignores when in the SUSPEND state. 845 */ 846 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 847 fm |= OHCI_FSMPS(ival) | ival; 848 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 849 per = OHCI_PERIODIC(ival); /* 90% periodic */ 850 OWRITE4(sc, OHCI_PERIODIC_START, per); 851 852 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */ 853 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 854 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP); 855 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 856 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY); 857 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca); 858 859 /* 860 * The AMD756 requires a delay before re-reading the register, 861 * otherwise it will occasionally report 0 ports. 862 */ 863 sc->sc_noport = 0; 864 for (i = 0; i < 10 && sc->sc_noport == 0; i++) { 865 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY); 866 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 867 } 868 869 #ifdef OHCI_DEBUG 870 if (ohcidebug > 5) 871 ohci_dumpregs(sc); 872 #endif 873 874 /* Set up the bus struct. */ 875 sc->sc_bus.methods = &ohci_bus_methods; 876 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 877 878 #if defined(__NetBSD__) || defined(__OpenBSD__) 879 sc->sc_control = sc->sc_intre = 0; 880 sc->sc_powerhook = powerhook_establish(ohci_power, sc); 881 sc->sc_shutdownhook = shutdownhook_establish(ohci_shutdown, sc); 882 #endif 883 884 usb_callout_init(sc->sc_tmo_rhsc); 885 886 return (USBD_NORMAL_COMPLETION); 887 888 bad5: 889 for (i = 0; i < OHCI_NO_EDS; i++) 890 ohci_free_sed(sc, sc->sc_eds[i]); 891 bad4: 892 ohci_free_sed(sc, sc->sc_isoc_head); 893 bad3: 894 ohci_free_sed(sc, sc->sc_bulk_head); 895 bad2: 896 ohci_free_sed(sc, sc->sc_ctrl_head); 897 bad1: 898 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 899 return (err); 900 } 901 902 usbd_status 903 ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 904 { 905 #if defined(__NetBSD__) || defined(__OpenBSD__) 906 struct ohci_softc *sc = (struct ohci_softc *)bus; 907 #endif 908 usbd_status status; 909 910 status = usb_allocmem(&sc->sc_bus, size, 0, dma); 911 #ifdef __NetBSD__ 912 if (status == USBD_NOMEM) 913 status = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size); 914 #endif 915 return status; 916 } 917 918 void 919 ohci_freem(struct usbd_bus *bus, usb_dma_t *dma) 920 { 921 #if defined(__NetBSD__) || defined(__OpenBSD__) 922 struct ohci_softc *sc = (struct ohci_softc *)bus; 923 #endif 924 #ifdef __NetBSD__ 925 if (dma->block->flags & USB_DMA_RESERVE) { 926 usb_reserve_freem(&((struct ohci_softc *)bus)->sc_dma_reserve, 927 dma); 928 return; 929 } 930 #endif 931 usb_freemem(&sc->sc_bus, dma); 932 } 933 934 usbd_xfer_handle 935 ohci_allocx(struct usbd_bus *bus) 936 { 937 struct ohci_softc *sc = (struct ohci_softc *)bus; 938 usbd_xfer_handle xfer; 939 940 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 941 if (xfer != NULL) { 942 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 943 #ifdef DIAGNOSTIC 944 if (xfer->busy_free != XFER_FREE) { 945 printf("ohci_allocx: xfer=%p not free, 0x%08x\n", xfer, 946 xfer->busy_free); 947 } 948 #endif 949 } else { 950 xfer = malloc(sizeof(struct ohci_xfer), M_USB, M_NOWAIT); 951 } 952 if (xfer != NULL) { 953 memset(xfer, 0, sizeof (struct ohci_xfer)); 954 #ifdef DIAGNOSTIC 955 xfer->busy_free = XFER_BUSY; 956 #endif 957 } 958 return (xfer); 959 } 960 961 void 962 ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 963 { 964 struct ohci_softc *sc = (struct ohci_softc *)bus; 965 966 #ifdef DIAGNOSTIC 967 if (xfer->busy_free != XFER_BUSY) { 968 printf("ohci_freex: xfer=%p not busy, 0x%08x\n", xfer, 969 xfer->busy_free); 970 return; 971 } 972 xfer->busy_free = XFER_FREE; 973 #endif 974 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 975 } 976 977 /* 978 * Shut down the controller when the system is going down. 979 */ 980 void 981 ohci_shutdown(void *v) 982 { 983 ohci_softc_t *sc = v; 984 985 DPRINTF(("ohci_shutdown: stopping the HC\n")); 986 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 987 } 988 989 /* 990 * Handle suspend/resume. 991 * 992 * We need to switch to polling mode here, because this routine is 993 * called from an intterupt context. This is all right since we 994 * are almost suspended anyway. 995 */ 996 void 997 ohci_power(int why, void *v) 998 { 999 ohci_softc_t *sc = v; 1000 u_int32_t ctl; 1001 int s; 1002 1003 #ifdef OHCI_DEBUG 1004 DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why)); 1005 ohci_dumpregs(sc); 1006 #endif 1007 1008 s = splhardusb(); 1009 switch (why) { 1010 case PWR_SUSPEND: 1011 case PWR_STANDBY: 1012 sc->sc_bus.use_polling++; 1013 ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK; 1014 if (sc->sc_control == 0) { 1015 /* 1016 * Preserve register values, in case that APM BIOS 1017 * does not recover them. 1018 */ 1019 sc->sc_control = ctl; 1020 sc->sc_intre = OREAD4(sc, OHCI_INTERRUPT_ENABLE); 1021 } 1022 ctl |= OHCI_HCFS_SUSPEND; 1023 OWRITE4(sc, OHCI_CONTROL, ctl); 1024 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1025 sc->sc_bus.use_polling--; 1026 break; 1027 case PWR_RESUME: 1028 sc->sc_bus.use_polling++; 1029 /* Some broken BIOSes do not recover these values */ 1030 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 1031 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 1032 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 1033 if (sc->sc_intre) 1034 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, 1035 sc->sc_intre & (OHCI_ALL_INTRS | OHCI_MIE)); 1036 if (sc->sc_control) 1037 ctl = sc->sc_control; 1038 else 1039 ctl = OREAD4(sc, OHCI_CONTROL); 1040 ctl |= OHCI_HCFS_RESUME; 1041 OWRITE4(sc, OHCI_CONTROL, ctl); 1042 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 1043 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL; 1044 OWRITE4(sc, OHCI_CONTROL, ctl); 1045 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 1046 sc->sc_control = sc->sc_intre = 0; 1047 sc->sc_bus.use_polling--; 1048 break; 1049 case PWR_SOFTSUSPEND: 1050 case PWR_SOFTSTANDBY: 1051 case PWR_SOFTRESUME: 1052 break; 1053 } 1054 splx(s); 1055 } 1056 1057 #ifdef OHCI_DEBUG 1058 void 1059 ohci_dumpregs(ohci_softc_t *sc) 1060 { 1061 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 1062 OREAD4(sc, OHCI_REVISION), 1063 OREAD4(sc, OHCI_CONTROL), 1064 OREAD4(sc, OHCI_COMMAND_STATUS))); 1065 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 1066 OREAD4(sc, OHCI_INTERRUPT_STATUS), 1067 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 1068 OREAD4(sc, OHCI_INTERRUPT_DISABLE))); 1069 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 1070 OREAD4(sc, OHCI_HCCA), 1071 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 1072 OREAD4(sc, OHCI_CONTROL_HEAD_ED))); 1073 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 1074 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 1075 OREAD4(sc, OHCI_BULK_HEAD_ED), 1076 OREAD4(sc, OHCI_BULK_CURRENT_ED))); 1077 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 1078 OREAD4(sc, OHCI_DONE_HEAD), 1079 OREAD4(sc, OHCI_FM_INTERVAL), 1080 OREAD4(sc, OHCI_FM_REMAINING))); 1081 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 1082 OREAD4(sc, OHCI_FM_NUMBER), 1083 OREAD4(sc, OHCI_PERIODIC_START), 1084 OREAD4(sc, OHCI_LS_THRESHOLD))); 1085 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n", 1086 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 1087 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 1088 OREAD4(sc, OHCI_RH_STATUS))); 1089 DPRINTF((" port1=0x%08x port2=0x%08x\n", 1090 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 1091 OREAD4(sc, OHCI_RH_PORT_STATUS(2)))); 1092 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n", 1093 le32toh(sc->sc_hcca->hcca_frame_number), 1094 le32toh(sc->sc_hcca->hcca_done_head))); 1095 } 1096 #endif 1097 1098 Static int ohci_intr1(ohci_softc_t *); 1099 1100 int 1101 ohci_intr(void *p) 1102 { 1103 ohci_softc_t *sc = p; 1104 1105 if (sc == NULL || sc->sc_dying) 1106 return (0); 1107 1108 /* If we get an interrupt while polling, then just ignore it. */ 1109 if (sc->sc_bus.use_polling) { 1110 #ifdef DIAGNOSTIC 1111 DPRINTFN(16, ("ohci_intr: ignored interrupt while polling\n")); 1112 #endif 1113 /* for level triggered intrs, should do something to ack */ 1114 OWRITE4(sc, OHCI_INTERRUPT_STATUS, 1115 OREAD4(sc, OHCI_INTERRUPT_STATUS)); 1116 1117 return (0); 1118 } 1119 1120 return (ohci_intr1(sc)); 1121 } 1122 1123 Static int 1124 ohci_intr1(ohci_softc_t *sc) 1125 { 1126 u_int32_t intrs, eintrs; 1127 1128 DPRINTFN(14,("ohci_intr1: enter\n")); 1129 1130 /* In case the interrupt occurs before initialization has completed. */ 1131 if (sc == NULL || sc->sc_hcca == NULL) { 1132 #ifdef DIAGNOSTIC 1133 printf("ohci_intr: sc->sc_hcca == NULL\n"); 1134 #endif 1135 return (0); 1136 } 1137 1138 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1139 if (!intrs) 1140 return (0); 1141 1142 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs & ~(OHCI_MIE|OHCI_WDH)); /* Acknowledge */ 1143 eintrs = intrs & sc->sc_eintrs; 1144 if (!eintrs) 1145 return (0); 1146 1147 sc->sc_bus.intr_context++; 1148 sc->sc_bus.no_intrs++; 1149 DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 1150 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 1151 (u_int)eintrs)); 1152 1153 if (eintrs & OHCI_SO) { 1154 sc->sc_overrun_cnt++; 1155 if (usbd_ratecheck(&sc->sc_overrun_ntc)) { 1156 printf("%s: %u scheduling overruns\n", 1157 USBDEVNAME(sc->sc_bus.bdev), sc->sc_overrun_cnt); 1158 sc->sc_overrun_cnt = 0; 1159 } 1160 /* XXX do what */ 1161 eintrs &= ~OHCI_SO; 1162 } 1163 if (eintrs & OHCI_WDH) { 1164 /* 1165 * We block the interrupt below, and reenable it later from 1166 * ohci_softintr(). 1167 */ 1168 usb_schedsoftintr(&sc->sc_bus); 1169 } 1170 if (eintrs & OHCI_RD) { 1171 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev)); 1172 /* XXX process resume detect */ 1173 } 1174 if (eintrs & OHCI_UE) { 1175 printf("%s: unrecoverable error, controller halted\n", 1176 USBDEVNAME(sc->sc_bus.bdev)); 1177 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1178 /* XXX what else */ 1179 } 1180 if (eintrs & OHCI_RHSC) { 1181 /* 1182 * We block the interrupt below, and reenable it later from 1183 * a timeout. 1184 */ 1185 ohci_rhsc(sc, sc->sc_intrxfer); 1186 /* Do not allow RHSC interrupts > 1 per second */ 1187 usb_callout(sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc); 1188 } 1189 1190 sc->sc_bus.intr_context--; 1191 1192 if (eintrs != 0) { 1193 /* Block unprocessed interrupts. */ 1194 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs); 1195 sc->sc_eintrs &= ~eintrs; 1196 DPRINTFN(1, ("%s: blocking intrs 0x%x\n", 1197 USBDEVNAME(sc->sc_bus.bdev), eintrs)); 1198 } 1199 1200 return (1); 1201 } 1202 1203 void 1204 ohci_rhsc_enable(void *v_sc) 1205 { 1206 ohci_softc_t *sc = v_sc; 1207 int s; 1208 1209 s = splhardusb(); 1210 sc->sc_eintrs |= OHCI_RHSC; 1211 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1212 splx(s); 1213 } 1214 1215 #ifdef OHCI_DEBUG 1216 char *ohci_cc_strs[] = { 1217 "NO_ERROR", 1218 "CRC", 1219 "BIT_STUFFING", 1220 "DATA_TOGGLE_MISMATCH", 1221 "STALL", 1222 "DEVICE_NOT_RESPONDING", 1223 "PID_CHECK_FAILURE", 1224 "UNEXPECTED_PID", 1225 "DATA_OVERRUN", 1226 "DATA_UNDERRUN", 1227 "BUFFER_OVERRUN", 1228 "BUFFER_UNDERRUN", 1229 "reserved", 1230 "reserved", 1231 "NOT_ACCESSED", 1232 "NOT_ACCESSED", 1233 }; 1234 #endif 1235 1236 void 1237 ohci_softintr(void *v) 1238 { 1239 ohci_softc_t *sc = v; 1240 ohci_soft_itd_t *sitd, *sidone, *sitdnext; 1241 ohci_soft_td_t *std, *sdone, *stdnext; 1242 usbd_xfer_handle xfer; 1243 struct ohci_pipe *opipe; 1244 int len, cc, s; 1245 int i, j, actlen, iframes, uedir; 1246 ohci_physaddr_t done; 1247 1248 DPRINTFN(10,("ohci_softintr: enter\n")); 1249 1250 sc->sc_bus.intr_context++; 1251 1252 s = splhardusb(); 1253 done = le32toh(sc->sc_hcca->hcca_done_head) & ~OHCI_DONE_INTRS; 1254 sc->sc_hcca->hcca_done_head = 0; 1255 OWRITE4(sc, OHCI_INTERRUPT_STATUS, OHCI_WDH); 1256 sc->sc_eintrs |= OHCI_WDH; 1257 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_WDH); 1258 splx(s); 1259 1260 /* Reverse the done list. */ 1261 for (sdone = NULL, sidone = NULL; done != 0; ) { 1262 std = ohci_hash_find_td(sc, done); 1263 if (std != NULL) { 1264 std->dnext = sdone; 1265 done = le32toh(std->td.td_nexttd); 1266 sdone = std; 1267 DPRINTFN(10,("add TD %p\n", std)); 1268 continue; 1269 } 1270 sitd = ohci_hash_find_itd(sc, done); 1271 if (sitd != NULL) { 1272 sitd->dnext = sidone; 1273 done = le32toh(sitd->itd.itd_nextitd); 1274 sidone = sitd; 1275 DPRINTFN(5,("add ITD %p\n", sitd)); 1276 continue; 1277 } 1278 panic("ohci_softintr: addr 0x%08lx not found", (u_long)done); 1279 } 1280 1281 DPRINTFN(10,("ohci_softintr: sdone=%p sidone=%p\n", sdone, sidone)); 1282 1283 #ifdef OHCI_DEBUG 1284 if (ohcidebug > 10) { 1285 DPRINTF(("ohci_process_done: TD done:\n")); 1286 ohci_dump_tds(sdone); 1287 } 1288 #endif 1289 1290 for (std = sdone; std; std = stdnext) { 1291 xfer = std->xfer; 1292 stdnext = std->dnext; 1293 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n", 1294 std, xfer, xfer ? xfer->hcpriv : 0)); 1295 if (xfer == NULL) { 1296 /* 1297 * xfer == NULL: There seems to be no xfer associated 1298 * with this TD. It is tailp that happened to end up on 1299 * the done queue. 1300 * Shouldn't happen, but some chips are broken(?). 1301 */ 1302 continue; 1303 } 1304 if (xfer->status == USBD_CANCELLED || 1305 xfer->status == USBD_TIMEOUT) { 1306 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1307 xfer)); 1308 /* Handled by abort routine. */ 1309 continue; 1310 } 1311 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 1312 1313 len = std->len; 1314 if (std->td.td_cbp != 0) 1315 len -= le32toh(std->td.td_be) - 1316 le32toh(std->td.td_cbp) + 1; 1317 DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", len, 1318 std->flags)); 1319 if (std->flags & OHCI_ADD_LEN) 1320 xfer->actlen += len; 1321 1322 cc = OHCI_TD_GET_CC(le32toh(std->td.td_flags)); 1323 if (cc == OHCI_CC_NO_ERROR) { 1324 if (std->flags & OHCI_CALL_DONE) { 1325 xfer->status = USBD_NORMAL_COMPLETION; 1326 s = splusb(); 1327 usb_transfer_complete(xfer); 1328 splx(s); 1329 } 1330 ohci_free_std(sc, std); 1331 } else { 1332 /* 1333 * Endpoint is halted. First unlink all the TDs 1334 * belonging to the failed transfer, and then restart 1335 * the endpoint. 1336 */ 1337 ohci_soft_td_t *p, *n; 1338 opipe = (struct ohci_pipe *)xfer->pipe; 1339 1340 DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n", 1341 OHCI_TD_GET_CC(le32toh(std->td.td_flags)), 1342 ohci_cc_strs[OHCI_TD_GET_CC(le32toh(std->td.td_flags))])); 1343 1344 /* remove TDs */ 1345 for (p = std; p->xfer == xfer; p = n) { 1346 n = p->nexttd; 1347 ohci_free_std(sc, p); 1348 } 1349 1350 /* clear halt */ 1351 opipe->sed->ed.ed_headp = htole32(p->physaddr); 1352 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1353 1354 if (cc == OHCI_CC_STALL) 1355 xfer->status = USBD_STALLED; 1356 else 1357 xfer->status = USBD_IOERROR; 1358 s = splusb(); 1359 usb_transfer_complete(xfer); 1360 splx(s); 1361 } 1362 } 1363 1364 #ifdef OHCI_DEBUG 1365 if (ohcidebug > 10) { 1366 DPRINTF(("ohci_softintr: ITD done:\n")); 1367 ohci_dump_itds(sidone); 1368 } 1369 #endif 1370 1371 for (sitd = sidone; sitd != NULL; sitd = sitdnext) { 1372 xfer = sitd->xfer; 1373 sitdnext = sitd->dnext; 1374 DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n", 1375 sitd, xfer, xfer ? xfer->hcpriv : 0)); 1376 if (xfer == NULL) 1377 continue; 1378 if (xfer->status == USBD_CANCELLED || 1379 xfer->status == USBD_TIMEOUT) { 1380 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1381 xfer)); 1382 /* Handled by abort routine. */ 1383 continue; 1384 } 1385 #ifdef DIAGNOSTIC 1386 if (sitd->isdone) 1387 printf("ohci_softintr: sitd=%p is done\n", sitd); 1388 sitd->isdone = 1; 1389 #endif 1390 if (sitd->flags & OHCI_CALL_DONE) { 1391 ohci_soft_itd_t *next; 1392 1393 opipe = (struct ohci_pipe *)xfer->pipe; 1394 opipe->u.iso.inuse -= xfer->nframes; 1395 uedir = UE_GET_DIR(xfer->pipe->endpoint->edesc-> 1396 bEndpointAddress); 1397 xfer->status = USBD_NORMAL_COMPLETION; 1398 actlen = 0; 1399 for (i = 0, sitd = xfer->hcpriv;; 1400 sitd = next) { 1401 next = sitd->nextitd; 1402 if (OHCI_ITD_GET_CC(le32toh(sitd-> 1403 itd.itd_flags)) != OHCI_CC_NO_ERROR) 1404 xfer->status = USBD_IOERROR; 1405 /* For input, update frlengths with actual */ 1406 /* XXX anything necessary for output? */ 1407 if (uedir == UE_DIR_IN && 1408 xfer->status == USBD_NORMAL_COMPLETION) { 1409 iframes = OHCI_ITD_GET_FC(le32toh( 1410 sitd->itd.itd_flags)); 1411 for (j = 0; j < iframes; i++, j++) { 1412 len = le16toh(sitd-> 1413 itd.itd_offset[j]); 1414 if ((OHCI_ITD_PSW_GET_CC(len) & 1415 OHCI_CC_NOT_ACCESSED_MASK) 1416 == OHCI_CC_NOT_ACCESSED) 1417 len = 0; 1418 else 1419 len = OHCI_ITD_PSW_LENGTH(len); 1420 xfer->frlengths[i] = len; 1421 actlen += len; 1422 } 1423 } 1424 if (sitd->flags & OHCI_CALL_DONE) 1425 break; 1426 ohci_free_sitd(sc, sitd); 1427 } 1428 ohci_free_sitd(sc, sitd); 1429 if (uedir == UE_DIR_IN && 1430 xfer->status == USBD_NORMAL_COMPLETION) 1431 xfer->actlen = actlen; 1432 xfer->hcpriv = NULL; 1433 1434 s = splusb(); 1435 usb_transfer_complete(xfer); 1436 splx(s); 1437 } 1438 } 1439 1440 #ifdef USB_USE_SOFTINTR 1441 if (sc->sc_softwake) { 1442 sc->sc_softwake = 0; 1443 wakeup(&sc->sc_softwake); 1444 } 1445 #endif /* USB_USE_SOFTINTR */ 1446 1447 sc->sc_bus.intr_context--; 1448 DPRINTFN(10,("ohci_softintr: done:\n")); 1449 } 1450 1451 void 1452 ohci_device_ctrl_done(usbd_xfer_handle xfer) 1453 { 1454 DPRINTFN(10,("ohci_device_ctrl_done: xfer=%p\n", xfer)); 1455 1456 #ifdef DIAGNOSTIC 1457 if (!(xfer->rqflags & URQ_REQUEST)) { 1458 panic("ohci_device_ctrl_done: not a request"); 1459 } 1460 #endif 1461 } 1462 1463 void 1464 ohci_device_intr_done(usbd_xfer_handle xfer) 1465 { 1466 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1467 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1468 ohci_soft_ed_t *sed = opipe->sed; 1469 ohci_soft_td_t *data, *tail; 1470 1471 1472 DPRINTFN(10,("ohci_device_intr_done: xfer=%p, actlen=%d\n", 1473 xfer, xfer->actlen)); 1474 1475 if (xfer->pipe->repeat) { 1476 data = opipe->tail.td; 1477 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 1478 if (tail == NULL) { 1479 xfer->status = USBD_NOMEM; 1480 return; 1481 } 1482 tail->xfer = NULL; 1483 1484 data->td.td_flags = htole32( 1485 OHCI_TD_IN | OHCI_TD_NOCC | 1486 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 1487 if (xfer->flags & USBD_SHORT_XFER_OK) 1488 data->td.td_flags |= htole32(OHCI_TD_R); 1489 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf, 0)); 1490 data->nexttd = tail; 1491 data->td.td_nexttd = htole32(tail->physaddr); 1492 data->td.td_be = htole32(le32toh(data->td.td_cbp) + 1493 xfer->length - 1); 1494 data->len = xfer->length; 1495 data->xfer = xfer; 1496 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1497 xfer->hcpriv = data; 1498 xfer->actlen = 0; 1499 1500 sed->ed.ed_tailp = htole32(tail->physaddr); 1501 opipe->tail.td = tail; 1502 } 1503 } 1504 1505 void 1506 ohci_device_bulk_done(usbd_xfer_handle xfer) 1507 { 1508 DPRINTFN(10,("ohci_device_bulk_done: xfer=%p, actlen=%d\n", 1509 xfer, xfer->actlen)); 1510 } 1511 1512 void 1513 ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer) 1514 { 1515 usbd_pipe_handle pipe; 1516 u_char *p; 1517 int i, m; 1518 int hstatus; 1519 1520 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1521 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n", 1522 sc, xfer, hstatus)); 1523 1524 if (xfer == NULL) { 1525 /* Just ignore the change. */ 1526 return; 1527 } 1528 1529 pipe = xfer->pipe; 1530 1531 p = KERNADDR(&xfer->dmabuf, 0); 1532 m = min(sc->sc_noport, xfer->length * 8 - 1); 1533 memset(p, 0, xfer->length); 1534 for (i = 1; i <= m; i++) { 1535 /* Pick out CHANGE bits from the status reg. */ 1536 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1537 p[i/8] |= 1 << (i%8); 1538 } 1539 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 1540 xfer->actlen = xfer->length; 1541 xfer->status = USBD_NORMAL_COMPLETION; 1542 1543 usb_transfer_complete(xfer); 1544 } 1545 1546 void 1547 ohci_root_intr_done(usbd_xfer_handle xfer) 1548 { 1549 } 1550 1551 void 1552 ohci_root_ctrl_done(usbd_xfer_handle xfer) 1553 { 1554 } 1555 1556 /* 1557 * Wait here until controller claims to have an interrupt. 1558 * Then call ohci_intr and return. Use timeout to avoid waiting 1559 * too long. 1560 */ 1561 void 1562 ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer) 1563 { 1564 int timo = xfer->timeout; 1565 int usecs; 1566 u_int32_t intrs; 1567 1568 xfer->status = USBD_IN_PROGRESS; 1569 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 1570 usb_delay_ms(&sc->sc_bus, 1); 1571 if (sc->sc_dying) 1572 break; 1573 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 1574 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs)); 1575 #ifdef OHCI_DEBUG 1576 if (ohcidebug > 15) 1577 ohci_dumpregs(sc); 1578 #endif 1579 if (intrs) { 1580 ohci_intr1(sc); 1581 if (xfer->status != USBD_IN_PROGRESS) 1582 return; 1583 } 1584 } 1585 1586 /* Timeout */ 1587 DPRINTF(("ohci_waitintr: timeout\n")); 1588 xfer->status = USBD_TIMEOUT; 1589 usb_transfer_complete(xfer); 1590 /* XXX should free TD */ 1591 } 1592 1593 void 1594 ohci_poll(struct usbd_bus *bus) 1595 { 1596 ohci_softc_t *sc = (ohci_softc_t *)bus; 1597 #ifdef OHCI_DEBUG 1598 static int last; 1599 int new; 1600 new = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1601 if (new != last) { 1602 DPRINTFN(10,("ohci_poll: intrs=0x%04x\n", new)); 1603 last = new; 1604 } 1605 #endif 1606 1607 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) 1608 ohci_intr1(sc); 1609 } 1610 1611 usbd_status 1612 ohci_device_request(usbd_xfer_handle xfer) 1613 { 1614 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1615 usb_device_request_t *req = &xfer->request; 1616 usbd_device_handle dev = opipe->pipe.device; 1617 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1618 int addr = dev->address; 1619 ohci_soft_td_t *setup, *stat, *next, *tail; 1620 ohci_soft_ed_t *sed; 1621 int isread; 1622 int len; 1623 usbd_status err; 1624 int s; 1625 1626 isread = req->bmRequestType & UT_READ; 1627 len = UGETW(req->wLength); 1628 1629 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 1630 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 1631 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1632 UGETW(req->wIndex), len, addr, 1633 opipe->pipe.endpoint->edesc->bEndpointAddress)); 1634 1635 setup = opipe->tail.td; 1636 stat = ohci_alloc_std(sc); 1637 if (stat == NULL) { 1638 err = USBD_NOMEM; 1639 goto bad1; 1640 } 1641 tail = ohci_alloc_std(sc); 1642 if (tail == NULL) { 1643 err = USBD_NOMEM; 1644 goto bad2; 1645 } 1646 tail->xfer = NULL; 1647 1648 sed = opipe->sed; 1649 opipe->u.ctl.length = len; 1650 1651 /* Update device address and length since they may have changed 1652 during the setup of the control pipe in usbd_new_device(). */ 1653 /* XXX This only needs to be done once, but it's too early in open. */ 1654 /* XXXX Should not touch ED here! */ 1655 sed->ed.ed_flags = htole32( 1656 (le32toh(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) | 1657 OHCI_ED_SET_FA(addr) | 1658 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize))); 1659 1660 next = stat; 1661 1662 /* Set up data transaction */ 1663 if (len != 0) { 1664 ohci_soft_td_t *std = stat; 1665 1666 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 1667 std, &stat); 1668 stat = stat->nexttd; /* point at free TD */ 1669 if (err) 1670 goto bad3; 1671 /* Start toggle at 1 and then use the carried toggle. */ 1672 std->td.td_flags &= htole32(~OHCI_TD_TOGGLE_MASK); 1673 std->td.td_flags |= htole32(OHCI_TD_TOGGLE_1); 1674 } 1675 1676 memcpy(KERNADDR(&opipe->u.ctl.reqdma, 0), req, sizeof *req); 1677 1678 setup->td.td_flags = htole32(OHCI_TD_SETUP | OHCI_TD_NOCC | 1679 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1680 setup->td.td_cbp = htole32(DMAADDR(&opipe->u.ctl.reqdma, 0)); 1681 setup->nexttd = next; 1682 setup->td.td_nexttd = htole32(next->physaddr); 1683 setup->td.td_be = htole32(le32toh(setup->td.td_cbp) + sizeof *req - 1); 1684 setup->len = 0; 1685 setup->xfer = xfer; 1686 setup->flags = 0; 1687 xfer->hcpriv = setup; 1688 1689 stat->td.td_flags = htole32( 1690 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | 1691 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1692 stat->td.td_cbp = 0; 1693 stat->nexttd = tail; 1694 stat->td.td_nexttd = htole32(tail->physaddr); 1695 stat->td.td_be = 0; 1696 stat->flags = OHCI_CALL_DONE; 1697 stat->len = 0; 1698 stat->xfer = xfer; 1699 1700 #ifdef OHCI_DEBUG 1701 if (ohcidebug > 5) { 1702 DPRINTF(("ohci_device_request:\n")); 1703 ohci_dump_ed(sed); 1704 ohci_dump_tds(setup); 1705 } 1706 #endif 1707 1708 /* Insert ED in schedule */ 1709 s = splusb(); 1710 sed->ed.ed_tailp = htole32(tail->physaddr); 1711 opipe->tail.td = tail; 1712 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1713 if (xfer->timeout && !sc->sc_bus.use_polling) { 1714 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 1715 ohci_timeout, xfer); 1716 } 1717 splx(s); 1718 1719 #ifdef OHCI_DEBUG 1720 if (ohcidebug > 20) { 1721 delay(10000); 1722 DPRINTF(("ohci_device_request: status=%x\n", 1723 OREAD4(sc, OHCI_COMMAND_STATUS))); 1724 ohci_dumpregs(sc); 1725 printf("ctrl head:\n"); 1726 ohci_dump_ed(sc->sc_ctrl_head); 1727 printf("sed:\n"); 1728 ohci_dump_ed(sed); 1729 ohci_dump_tds(setup); 1730 } 1731 #endif 1732 1733 return (USBD_NORMAL_COMPLETION); 1734 1735 bad3: 1736 ohci_free_std(sc, tail); 1737 bad2: 1738 ohci_free_std(sc, stat); 1739 bad1: 1740 return (err); 1741 } 1742 1743 /* 1744 * Add an ED to the schedule. Called at splusb(). 1745 */ 1746 void 1747 ohci_add_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1748 { 1749 DPRINTFN(8,("ohci_add_ed: sed=%p head=%p\n", sed, head)); 1750 1751 SPLUSBCHECK; 1752 sed->next = head->next; 1753 sed->ed.ed_nexted = head->ed.ed_nexted; 1754 head->next = sed; 1755 head->ed.ed_nexted = htole32(sed->physaddr); 1756 } 1757 1758 /* 1759 * Remove an ED from the schedule. Called at splusb(). 1760 */ 1761 void 1762 ohci_rem_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1763 { 1764 ohci_soft_ed_t *p; 1765 1766 SPLUSBCHECK; 1767 1768 /* XXX */ 1769 for (p = head; p != NULL && p->next != sed; p = p->next) 1770 ; 1771 if (p == NULL) 1772 panic("ohci_rem_ed: ED not found"); 1773 p->next = sed->next; 1774 p->ed.ed_nexted = sed->ed.ed_nexted; 1775 } 1776 1777 /* 1778 * When a transfer is completed the TD is added to the done queue by 1779 * the host controller. This queue is the processed by software. 1780 * Unfortunately the queue contains the physical address of the TD 1781 * and we have no simple way to translate this back to a kernel address. 1782 * To make the translation possible (and fast) we use a hash table of 1783 * TDs currently in the schedule. The physical address is used as the 1784 * hash value. 1785 */ 1786 1787 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1788 /* Called at splusb() */ 1789 void 1790 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1791 { 1792 int h = HASH(std->physaddr); 1793 1794 SPLUSBCHECK; 1795 1796 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1797 } 1798 1799 /* Called at splusb() */ 1800 void 1801 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1802 { 1803 SPLUSBCHECK; 1804 1805 LIST_REMOVE(std, hnext); 1806 } 1807 1808 ohci_soft_td_t * 1809 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a) 1810 { 1811 int h = HASH(a); 1812 ohci_soft_td_t *std; 1813 1814 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1815 std != NULL; 1816 std = LIST_NEXT(std, hnext)) 1817 if (std->physaddr == a) 1818 return (std); 1819 return (NULL); 1820 } 1821 1822 /* Called at splusb() */ 1823 void 1824 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1825 { 1826 int h = HASH(sitd->physaddr); 1827 1828 SPLUSBCHECK; 1829 1830 DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n", 1831 sitd, (u_long)sitd->physaddr)); 1832 1833 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext); 1834 } 1835 1836 /* Called at splusb() */ 1837 void 1838 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1839 { 1840 SPLUSBCHECK; 1841 1842 DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n", 1843 sitd, (u_long)sitd->physaddr)); 1844 1845 LIST_REMOVE(sitd, hnext); 1846 } 1847 1848 ohci_soft_itd_t * 1849 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a) 1850 { 1851 int h = HASH(a); 1852 ohci_soft_itd_t *sitd; 1853 1854 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]); 1855 sitd != NULL; 1856 sitd = LIST_NEXT(sitd, hnext)) 1857 if (sitd->physaddr == a) 1858 return (sitd); 1859 return (NULL); 1860 } 1861 1862 void 1863 ohci_timeout(void *addr) 1864 { 1865 struct ohci_xfer *oxfer = addr; 1866 struct ohci_pipe *opipe = (struct ohci_pipe *)oxfer->xfer.pipe; 1867 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1868 1869 DPRINTF(("ohci_timeout: oxfer=%p\n", oxfer)); 1870 1871 if (sc->sc_dying) { 1872 ohci_abort_xfer(&oxfer->xfer, USBD_TIMEOUT); 1873 return; 1874 } 1875 1876 /* Execute the abort in a process context. */ 1877 usb_init_task(&oxfer->abort_task, ohci_timeout_task, addr); 1878 usb_add_task(oxfer->xfer.pipe->device, &oxfer->abort_task); 1879 } 1880 1881 void 1882 ohci_timeout_task(void *addr) 1883 { 1884 usbd_xfer_handle xfer = addr; 1885 int s; 1886 1887 DPRINTF(("ohci_timeout_task: xfer=%p\n", xfer)); 1888 1889 s = splusb(); 1890 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1891 splx(s); 1892 } 1893 1894 #ifdef OHCI_DEBUG 1895 void 1896 ohci_dump_tds(ohci_soft_td_t *std) 1897 { 1898 for (; std; std = std->nexttd) 1899 ohci_dump_td(std); 1900 } 1901 1902 void 1903 ohci_dump_td(ohci_soft_td_t *std) 1904 { 1905 char sbuf[128]; 1906 1907 bitmask_snprintf((u_int32_t)le32toh(std->td.td_flags), 1908 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 1909 sbuf, sizeof(sbuf)); 1910 1911 printf("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx " 1912 "nexttd=0x%08lx be=0x%08lx\n", 1913 std, (u_long)std->physaddr, sbuf, 1914 OHCI_TD_GET_DI(le32toh(std->td.td_flags)), 1915 OHCI_TD_GET_EC(le32toh(std->td.td_flags)), 1916 OHCI_TD_GET_CC(le32toh(std->td.td_flags)), 1917 (u_long)le32toh(std->td.td_cbp), 1918 (u_long)le32toh(std->td.td_nexttd), 1919 (u_long)le32toh(std->td.td_be)); 1920 } 1921 1922 void 1923 ohci_dump_itd(ohci_soft_itd_t *sitd) 1924 { 1925 int i; 1926 1927 printf("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n" 1928 "bp0=0x%08lx next=0x%08lx be=0x%08lx\n", 1929 sitd, (u_long)sitd->physaddr, 1930 OHCI_ITD_GET_SF(le32toh(sitd->itd.itd_flags)), 1931 OHCI_ITD_GET_DI(le32toh(sitd->itd.itd_flags)), 1932 OHCI_ITD_GET_FC(le32toh(sitd->itd.itd_flags)), 1933 OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags)), 1934 (u_long)le32toh(sitd->itd.itd_bp0), 1935 (u_long)le32toh(sitd->itd.itd_nextitd), 1936 (u_long)le32toh(sitd->itd.itd_be)); 1937 for (i = 0; i < OHCI_ITD_NOFFSET; i++) 1938 printf("offs[%d]=0x%04x ", i, 1939 (u_int)le16toh(sitd->itd.itd_offset[i])); 1940 printf("\n"); 1941 } 1942 1943 void 1944 ohci_dump_itds(ohci_soft_itd_t *sitd) 1945 { 1946 for (; sitd; sitd = sitd->nextitd) 1947 ohci_dump_itd(sitd); 1948 } 1949 1950 void 1951 ohci_dump_ed(ohci_soft_ed_t *sed) 1952 { 1953 char sbuf[128], sbuf2[128]; 1954 1955 bitmask_snprintf((u_int32_t)le32toh(sed->ed.ed_flags), 1956 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO", 1957 sbuf, sizeof(sbuf)); 1958 bitmask_snprintf((u_int32_t)le32toh(sed->ed.ed_headp), 1959 "\20\1HALT\2CARRY", sbuf2, sizeof(sbuf2)); 1960 1961 printf("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d flags=%s\ntailp=0x%08lx " 1962 "headflags=%s headp=0x%08lx nexted=0x%08lx\n", 1963 sed, (u_long)sed->physaddr, 1964 OHCI_ED_GET_FA(le32toh(sed->ed.ed_flags)), 1965 OHCI_ED_GET_EN(le32toh(sed->ed.ed_flags)), 1966 OHCI_ED_GET_MAXP(le32toh(sed->ed.ed_flags)), sbuf, 1967 (u_long)le32toh(sed->ed.ed_tailp), sbuf2, 1968 (u_long)le32toh(sed->ed.ed_headp), 1969 (u_long)le32toh(sed->ed.ed_nexted)); 1970 } 1971 #endif 1972 1973 usbd_status 1974 ohci_open(usbd_pipe_handle pipe) 1975 { 1976 usbd_device_handle dev = pipe->device; 1977 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1978 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1979 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1980 u_int8_t addr = dev->address; 1981 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1982 ohci_soft_ed_t *sed; 1983 ohci_soft_td_t *std; 1984 ohci_soft_itd_t *sitd; 1985 ohci_physaddr_t tdphys; 1986 u_int32_t fmt; 1987 usbd_status err; 1988 int s; 1989 int ival; 1990 1991 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1992 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1993 1994 if (sc->sc_dying) 1995 return (USBD_IOERROR); 1996 1997 std = NULL; 1998 sed = NULL; 1999 2000 if (addr == sc->sc_addr) { 2001 switch (ed->bEndpointAddress) { 2002 case USB_CONTROL_ENDPOINT: 2003 pipe->methods = &ohci_root_ctrl_methods; 2004 break; 2005 case UE_DIR_IN | OHCI_INTR_ENDPT: 2006 pipe->methods = &ohci_root_intr_methods; 2007 break; 2008 default: 2009 return (USBD_INVAL); 2010 } 2011 } else { 2012 sed = ohci_alloc_sed(sc); 2013 if (sed == NULL) 2014 goto bad0; 2015 opipe->sed = sed; 2016 if (xfertype == UE_ISOCHRONOUS) { 2017 sitd = ohci_alloc_sitd(sc); 2018 if (sitd == NULL) 2019 goto bad1; 2020 opipe->tail.itd = sitd; 2021 tdphys = sitd->physaddr; 2022 fmt = OHCI_ED_FORMAT_ISO; 2023 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 2024 fmt |= OHCI_ED_DIR_IN; 2025 else 2026 fmt |= OHCI_ED_DIR_OUT; 2027 } else { 2028 std = ohci_alloc_std(sc); 2029 if (std == NULL) 2030 goto bad1; 2031 opipe->tail.td = std; 2032 tdphys = std->physaddr; 2033 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD; 2034 } 2035 sed->ed.ed_flags = htole32( 2036 OHCI_ED_SET_FA(addr) | 2037 OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) | 2038 (dev->speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) | 2039 fmt | 2040 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 2041 sed->ed.ed_headp = sed->ed.ed_tailp = htole32(tdphys); 2042 2043 switch (xfertype) { 2044 case UE_CONTROL: 2045 pipe->methods = &ohci_device_ctrl_methods; 2046 err = usb_allocmem(&sc->sc_bus, 2047 sizeof(usb_device_request_t), 2048 0, &opipe->u.ctl.reqdma); 2049 if (err) 2050 goto bad; 2051 s = splusb(); 2052 ohci_add_ed(sed, sc->sc_ctrl_head); 2053 splx(s); 2054 break; 2055 case UE_INTERRUPT: 2056 pipe->methods = &ohci_device_intr_methods; 2057 ival = pipe->interval; 2058 if (ival == USBD_DEFAULT_INTERVAL) 2059 ival = ed->bInterval; 2060 return (ohci_device_setintr(sc, opipe, ival)); 2061 case UE_ISOCHRONOUS: 2062 pipe->methods = &ohci_device_isoc_methods; 2063 return (ohci_setup_isoc(pipe)); 2064 case UE_BULK: 2065 pipe->methods = &ohci_device_bulk_methods; 2066 s = splusb(); 2067 ohci_add_ed(sed, sc->sc_bulk_head); 2068 splx(s); 2069 break; 2070 } 2071 } 2072 return (USBD_NORMAL_COMPLETION); 2073 2074 bad: 2075 if (std != NULL) 2076 ohci_free_std(sc, std); 2077 bad1: 2078 if (sed != NULL) 2079 ohci_free_sed(sc, sed); 2080 bad0: 2081 return (USBD_NOMEM); 2082 2083 } 2084 2085 /* 2086 * Close a reqular pipe. 2087 * Assumes that there are no pending transactions. 2088 */ 2089 void 2090 ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head) 2091 { 2092 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2093 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2094 ohci_soft_ed_t *sed = opipe->sed; 2095 int s; 2096 2097 s = splusb(); 2098 #ifdef DIAGNOSTIC 2099 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 2100 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2101 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) { 2102 ohci_soft_td_t *std; 2103 std = ohci_hash_find_td(sc, le32toh(sed->ed.ed_headp)); 2104 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 2105 "tl=0x%x pipe=%p, std=%p\n", sed, 2106 (int)le32toh(sed->ed.ed_headp), 2107 (int)le32toh(sed->ed.ed_tailp), 2108 pipe, std); 2109 #ifdef USB_DEBUG 2110 usbd_dump_pipe(&opipe->pipe); 2111 #endif 2112 #ifdef OHCI_DEBUG 2113 ohci_dump_ed(sed); 2114 if (std) 2115 ohci_dump_td(std); 2116 #endif 2117 usb_delay_ms(&sc->sc_bus, 2); 2118 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2119 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) 2120 printf("ohci_close_pipe: pipe still not empty\n"); 2121 } 2122 #endif 2123 ohci_rem_ed(sed, head); 2124 /* Make sure the host controller is not touching this ED */ 2125 usb_delay_ms(&sc->sc_bus, 1); 2126 splx(s); 2127 ohci_free_sed(sc, opipe->sed); 2128 } 2129 2130 /* 2131 * Abort a device request. 2132 * If this routine is called at splusb() it guarantees that the request 2133 * will be removed from the hardware scheduling and that the callback 2134 * for it will be called with USBD_CANCELLED status. 2135 * It's impossible to guarantee that the requested transfer will not 2136 * have happened since the hardware runs concurrently. 2137 * If the transaction has already happened we rely on the ordinary 2138 * interrupt processing to process it. 2139 */ 2140 void 2141 ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2142 { 2143 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2144 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 2145 ohci_soft_ed_t *sed = opipe->sed; 2146 ohci_soft_td_t *p, *n; 2147 ohci_physaddr_t headp; 2148 int s, hit; 2149 2150 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p sed=%p\n", xfer, opipe,sed)); 2151 2152 if (sc->sc_dying) { 2153 /* If we're dying, just do the software part. */ 2154 s = splusb(); 2155 xfer->status = status; /* make software ignore it */ 2156 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 2157 usb_transfer_complete(xfer); 2158 splx(s); 2159 } 2160 2161 if (xfer->device->bus->intr_context || !curproc) 2162 panic("ohci_abort_xfer: not in process context"); 2163 2164 /* 2165 * Step 1: Make interrupt routine and hardware ignore xfer. 2166 */ 2167 s = splusb(); 2168 xfer->status = status; /* make software ignore it */ 2169 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 2170 splx(s); 2171 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed)); 2172 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 2173 2174 /* 2175 * Step 2: Wait until we know hardware has finished any possible 2176 * use of the xfer. Also make sure the soft interrupt routine 2177 * has run. 2178 */ 2179 usb_delay_ms(opipe->pipe.device->bus, 20); /* Hardware finishes in 1ms */ 2180 s = splusb(); 2181 #ifdef USB_USE_SOFTINTR 2182 sc->sc_softwake = 1; 2183 #endif /* USB_USE_SOFTINTR */ 2184 usb_schedsoftintr(&sc->sc_bus); 2185 #ifdef USB_USE_SOFTINTR 2186 tsleep(&sc->sc_softwake, PZERO, "ohciab", 0); 2187 #endif /* USB_USE_SOFTINTR */ 2188 splx(s); 2189 2190 /* 2191 * Step 3: Remove any vestiges of the xfer from the hardware. 2192 * The complication here is that the hardware may have executed 2193 * beyond the xfer we're trying to abort. So as we're scanning 2194 * the TDs of this xfer we check if the hardware points to 2195 * any of them. 2196 */ 2197 s = splusb(); /* XXX why? */ 2198 p = xfer->hcpriv; 2199 #ifdef DIAGNOSTIC 2200 if (p == NULL) { 2201 splx(s); 2202 printf("ohci_abort_xfer: hcpriv is NULL\n"); 2203 return; 2204 } 2205 #endif 2206 #ifdef OHCI_DEBUG 2207 if (ohcidebug > 1) { 2208 DPRINTF(("ohci_abort_xfer: sed=\n")); 2209 ohci_dump_ed(sed); 2210 ohci_dump_tds(p); 2211 } 2212 #endif 2213 headp = le32toh(sed->ed.ed_headp) & OHCI_HEADMASK; 2214 hit = 0; 2215 for (; p->xfer == xfer; p = n) { 2216 hit |= headp == p->physaddr; 2217 n = p->nexttd; 2218 ohci_free_std(sc, p); 2219 } 2220 /* Zap headp register if hardware pointed inside the xfer. */ 2221 if (hit) { 2222 DPRINTFN(1,("ohci_abort_xfer: set hd=0x%08x, tl=0x%08x\n", 2223 (int)p->physaddr, (int)le32toh(sed->ed.ed_tailp))); 2224 sed->ed.ed_headp = htole32(p->physaddr); /* unlink TDs */ 2225 } else { 2226 DPRINTFN(1,("ohci_abort_xfer: no hit\n")); 2227 } 2228 2229 /* 2230 * Step 4: Turn on hardware again. 2231 */ 2232 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 2233 2234 /* 2235 * Step 5: Execute callback. 2236 */ 2237 usb_transfer_complete(xfer); 2238 2239 splx(s); 2240 } 2241 2242 /* 2243 * Data structures and routines to emulate the root hub. 2244 */ 2245 Static usb_device_descriptor_t ohci_devd = { 2246 USB_DEVICE_DESCRIPTOR_SIZE, 2247 UDESC_DEVICE, /* type */ 2248 {0x00, 0x01}, /* USB version */ 2249 UDCLASS_HUB, /* class */ 2250 UDSUBCLASS_HUB, /* subclass */ 2251 UDPROTO_FSHUB, 2252 64, /* max packet */ 2253 {0},{0},{0x00,0x01}, /* device id */ 2254 1,2,0, /* string indicies */ 2255 1 /* # of configurations */ 2256 }; 2257 2258 Static usb_config_descriptor_t ohci_confd = { 2259 USB_CONFIG_DESCRIPTOR_SIZE, 2260 UDESC_CONFIG, 2261 {USB_CONFIG_DESCRIPTOR_SIZE + 2262 USB_INTERFACE_DESCRIPTOR_SIZE + 2263 USB_ENDPOINT_DESCRIPTOR_SIZE}, 2264 1, 2265 1, 2266 0, 2267 UC_SELF_POWERED, 2268 0 /* max power */ 2269 }; 2270 2271 Static usb_interface_descriptor_t ohci_ifcd = { 2272 USB_INTERFACE_DESCRIPTOR_SIZE, 2273 UDESC_INTERFACE, 2274 0, 2275 0, 2276 1, 2277 UICLASS_HUB, 2278 UISUBCLASS_HUB, 2279 UIPROTO_FSHUB, 2280 0 2281 }; 2282 2283 Static usb_endpoint_descriptor_t ohci_endpd = { 2284 USB_ENDPOINT_DESCRIPTOR_SIZE, 2285 UDESC_ENDPOINT, 2286 UE_DIR_IN | OHCI_INTR_ENDPT, 2287 UE_INTERRUPT, 2288 {8, 0}, /* max packet */ 2289 255 2290 }; 2291 2292 Static usb_hub_descriptor_t ohci_hubd = { 2293 USB_HUB_DESCRIPTOR_SIZE, 2294 UDESC_HUB, 2295 0, 2296 {0,0}, 2297 0, 2298 0, 2299 {0}, 2300 }; 2301 2302 Static int 2303 ohci_str(usb_string_descriptor_t *p, int l, const char *s) 2304 { 2305 int i; 2306 2307 if (l == 0) 2308 return (0); 2309 p->bLength = 2 * strlen(s) + 2; 2310 if (l == 1) 2311 return (1); 2312 p->bDescriptorType = UDESC_STRING; 2313 l -= 2; 2314 for (i = 0; s[i] && l > 1; i++, l -= 2) 2315 USETW2(p->bString[i], 0, s[i]); 2316 return (2*i+2); 2317 } 2318 2319 /* 2320 * Simulate a hardware hub by handling all the necessary requests. 2321 */ 2322 Static usbd_status 2323 ohci_root_ctrl_transfer(usbd_xfer_handle xfer) 2324 { 2325 usbd_status err; 2326 2327 /* Insert last in queue. */ 2328 err = usb_insert_transfer(xfer); 2329 if (err) 2330 return (err); 2331 2332 /* Pipe isn't running, start first */ 2333 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2334 } 2335 2336 Static usbd_status 2337 ohci_root_ctrl_start(usbd_xfer_handle xfer) 2338 { 2339 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2340 usb_device_request_t *req; 2341 void *buf = NULL; 2342 int port, i; 2343 int s, len, value, index, l, totlen = 0; 2344 usb_port_status_t ps; 2345 usb_hub_descriptor_t hubd; 2346 usbd_status err; 2347 u_int32_t v; 2348 2349 if (sc->sc_dying) 2350 return (USBD_IOERROR); 2351 2352 #ifdef DIAGNOSTIC 2353 if (!(xfer->rqflags & URQ_REQUEST)) 2354 /* XXX panic */ 2355 return (USBD_INVAL); 2356 #endif 2357 req = &xfer->request; 2358 2359 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 2360 req->bmRequestType, req->bRequest)); 2361 2362 len = UGETW(req->wLength); 2363 value = UGETW(req->wValue); 2364 index = UGETW(req->wIndex); 2365 2366 if (len != 0) 2367 buf = KERNADDR(&xfer->dmabuf, 0); 2368 2369 #define C(x,y) ((x) | ((y) << 8)) 2370 switch(C(req->bRequest, req->bmRequestType)) { 2371 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 2372 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 2373 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 2374 /* 2375 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 2376 * for the integrated root hub. 2377 */ 2378 break; 2379 case C(UR_GET_CONFIG, UT_READ_DEVICE): 2380 if (len > 0) { 2381 *(u_int8_t *)buf = sc->sc_conf; 2382 totlen = 1; 2383 } 2384 break; 2385 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2386 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 2387 switch(value >> 8) { 2388 case UDESC_DEVICE: 2389 if ((value & 0xff) != 0) { 2390 err = USBD_IOERROR; 2391 goto ret; 2392 } 2393 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 2394 USETW(ohci_devd.idVendor, sc->sc_id_vendor); 2395 memcpy(buf, &ohci_devd, l); 2396 break; 2397 case UDESC_CONFIG: 2398 if ((value & 0xff) != 0) { 2399 err = USBD_IOERROR; 2400 goto ret; 2401 } 2402 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 2403 memcpy(buf, &ohci_confd, l); 2404 buf = (char *)buf + l; 2405 len -= l; 2406 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 2407 totlen += l; 2408 memcpy(buf, &ohci_ifcd, l); 2409 buf = (char *)buf + l; 2410 len -= l; 2411 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 2412 totlen += l; 2413 memcpy(buf, &ohci_endpd, l); 2414 break; 2415 case UDESC_STRING: 2416 if (len == 0) 2417 break; 2418 *(u_int8_t *)buf = 0; 2419 totlen = 1; 2420 switch (value & 0xff) { 2421 case 0: /* Language table */ 2422 totlen = ohci_str(buf, len, "\001"); 2423 break; 2424 case 1: /* Vendor */ 2425 totlen = ohci_str(buf, len, sc->sc_vendor); 2426 break; 2427 case 2: /* Product */ 2428 totlen = ohci_str(buf, len, "OHCI root hub"); 2429 break; 2430 } 2431 break; 2432 default: 2433 err = USBD_IOERROR; 2434 goto ret; 2435 } 2436 break; 2437 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 2438 if (len > 0) { 2439 *(u_int8_t *)buf = 0; 2440 totlen = 1; 2441 } 2442 break; 2443 case C(UR_GET_STATUS, UT_READ_DEVICE): 2444 if (len > 1) { 2445 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 2446 totlen = 2; 2447 } 2448 break; 2449 case C(UR_GET_STATUS, UT_READ_INTERFACE): 2450 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 2451 if (len > 1) { 2452 USETW(((usb_status_t *)buf)->wStatus, 0); 2453 totlen = 2; 2454 } 2455 break; 2456 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 2457 if (value >= USB_MAX_DEVICES) { 2458 err = USBD_IOERROR; 2459 goto ret; 2460 } 2461 sc->sc_addr = value; 2462 break; 2463 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 2464 if (value != 0 && value != 1) { 2465 err = USBD_IOERROR; 2466 goto ret; 2467 } 2468 sc->sc_conf = value; 2469 break; 2470 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 2471 break; 2472 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 2473 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 2474 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 2475 err = USBD_IOERROR; 2476 goto ret; 2477 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 2478 break; 2479 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 2480 break; 2481 /* Hub requests */ 2482 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2483 break; 2484 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2485 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 2486 "port=%d feature=%d\n", 2487 index, value)); 2488 if (index < 1 || index > sc->sc_noport) { 2489 err = USBD_IOERROR; 2490 goto ret; 2491 } 2492 port = OHCI_RH_PORT_STATUS(index); 2493 switch(value) { 2494 case UHF_PORT_ENABLE: 2495 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2496 break; 2497 case UHF_PORT_SUSPEND: 2498 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2499 break; 2500 case UHF_PORT_POWER: 2501 /* Yes, writing to the LOW_SPEED bit clears power. */ 2502 OWRITE4(sc, port, UPS_LOW_SPEED); 2503 break; 2504 case UHF_C_PORT_CONNECTION: 2505 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2506 break; 2507 case UHF_C_PORT_ENABLE: 2508 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2509 break; 2510 case UHF_C_PORT_SUSPEND: 2511 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2512 break; 2513 case UHF_C_PORT_OVER_CURRENT: 2514 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2515 break; 2516 case UHF_C_PORT_RESET: 2517 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2518 break; 2519 default: 2520 err = USBD_IOERROR; 2521 goto ret; 2522 } 2523 switch(value) { 2524 case UHF_C_PORT_CONNECTION: 2525 case UHF_C_PORT_ENABLE: 2526 case UHF_C_PORT_SUSPEND: 2527 case UHF_C_PORT_OVER_CURRENT: 2528 case UHF_C_PORT_RESET: 2529 /* Enable RHSC interrupt if condition is cleared. */ 2530 if ((OREAD4(sc, port) >> 16) == 0) 2531 ohci_rhsc_enable(sc); 2532 break; 2533 default: 2534 break; 2535 } 2536 break; 2537 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2538 if ((value & 0xff) != 0) { 2539 err = USBD_IOERROR; 2540 goto ret; 2541 } 2542 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2543 hubd = ohci_hubd; 2544 hubd.bNbrPorts = sc->sc_noport; 2545 USETW(hubd.wHubCharacteristics, 2546 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2547 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2548 /* XXX overcurrent */ 2549 ); 2550 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2551 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2552 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2553 hubd.DeviceRemovable[i++] = (u_int8_t)v; 2554 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2555 l = min(len, hubd.bDescLength); 2556 totlen = l; 2557 memcpy(buf, &hubd, l); 2558 break; 2559 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2560 if (len != 4) { 2561 err = USBD_IOERROR; 2562 goto ret; 2563 } 2564 memset(buf, 0, len); /* ? XXX */ 2565 totlen = len; 2566 break; 2567 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2568 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 2569 index)); 2570 if (index < 1 || index > sc->sc_noport) { 2571 err = USBD_IOERROR; 2572 goto ret; 2573 } 2574 if (len != 4) { 2575 err = USBD_IOERROR; 2576 goto ret; 2577 } 2578 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2579 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 2580 v)); 2581 USETW(ps.wPortStatus, v); 2582 USETW(ps.wPortChange, v >> 16); 2583 l = min(len, sizeof ps); 2584 memcpy(buf, &ps, l); 2585 totlen = l; 2586 break; 2587 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2588 err = USBD_IOERROR; 2589 goto ret; 2590 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2591 break; 2592 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2593 if (index < 1 || index > sc->sc_noport) { 2594 err = USBD_IOERROR; 2595 goto ret; 2596 } 2597 port = OHCI_RH_PORT_STATUS(index); 2598 switch(value) { 2599 case UHF_PORT_ENABLE: 2600 OWRITE4(sc, port, UPS_PORT_ENABLED); 2601 break; 2602 case UHF_PORT_SUSPEND: 2603 OWRITE4(sc, port, UPS_SUSPEND); 2604 break; 2605 case UHF_PORT_RESET: 2606 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 2607 index)); 2608 OWRITE4(sc, port, UPS_RESET); 2609 for (i = 0; i < 5; i++) { 2610 usb_delay_ms(&sc->sc_bus, 2611 USB_PORT_ROOT_RESET_DELAY); 2612 if (sc->sc_dying) { 2613 err = USBD_IOERROR; 2614 goto ret; 2615 } 2616 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2617 break; 2618 } 2619 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 2620 index, OREAD4(sc, port))); 2621 break; 2622 case UHF_PORT_POWER: 2623 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 2624 "%d\n", index)); 2625 OWRITE4(sc, port, UPS_PORT_POWER); 2626 break; 2627 default: 2628 err = USBD_IOERROR; 2629 goto ret; 2630 } 2631 break; 2632 default: 2633 err = USBD_IOERROR; 2634 goto ret; 2635 } 2636 xfer->actlen = totlen; 2637 err = USBD_NORMAL_COMPLETION; 2638 ret: 2639 xfer->status = err; 2640 s = splusb(); 2641 usb_transfer_complete(xfer); 2642 splx(s); 2643 return (USBD_IN_PROGRESS); 2644 } 2645 2646 /* Abort a root control request. */ 2647 Static void 2648 ohci_root_ctrl_abort(usbd_xfer_handle xfer) 2649 { 2650 /* Nothing to do, all transfers are synchronous. */ 2651 } 2652 2653 /* Close the root pipe. */ 2654 Static void 2655 ohci_root_ctrl_close(usbd_pipe_handle pipe) 2656 { 2657 DPRINTF(("ohci_root_ctrl_close\n")); 2658 /* Nothing to do. */ 2659 } 2660 2661 Static usbd_status 2662 ohci_root_intr_transfer(usbd_xfer_handle xfer) 2663 { 2664 usbd_status err; 2665 2666 /* Insert last in queue. */ 2667 err = usb_insert_transfer(xfer); 2668 if (err) 2669 return (err); 2670 2671 /* Pipe isn't running, start first */ 2672 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2673 } 2674 2675 Static usbd_status 2676 ohci_root_intr_start(usbd_xfer_handle xfer) 2677 { 2678 usbd_pipe_handle pipe = xfer->pipe; 2679 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2680 2681 if (sc->sc_dying) 2682 return (USBD_IOERROR); 2683 2684 sc->sc_intrxfer = xfer; 2685 2686 return (USBD_IN_PROGRESS); 2687 } 2688 2689 /* Abort a root interrupt request. */ 2690 Static void 2691 ohci_root_intr_abort(usbd_xfer_handle xfer) 2692 { 2693 int s; 2694 2695 if (xfer->pipe->intrxfer == xfer) { 2696 DPRINTF(("ohci_root_intr_abort: remove\n")); 2697 xfer->pipe->intrxfer = NULL; 2698 } 2699 xfer->status = USBD_CANCELLED; 2700 s = splusb(); 2701 usb_transfer_complete(xfer); 2702 splx(s); 2703 } 2704 2705 /* Close the root pipe. */ 2706 Static void 2707 ohci_root_intr_close(usbd_pipe_handle pipe) 2708 { 2709 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2710 2711 DPRINTF(("ohci_root_intr_close\n")); 2712 2713 sc->sc_intrxfer = NULL; 2714 } 2715 2716 /************************/ 2717 2718 Static usbd_status 2719 ohci_device_ctrl_transfer(usbd_xfer_handle xfer) 2720 { 2721 usbd_status err; 2722 2723 /* Insert last in queue. */ 2724 err = usb_insert_transfer(xfer); 2725 if (err) 2726 return (err); 2727 2728 /* Pipe isn't running, start first */ 2729 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2730 } 2731 2732 Static usbd_status 2733 ohci_device_ctrl_start(usbd_xfer_handle xfer) 2734 { 2735 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2736 usbd_status err; 2737 2738 if (sc->sc_dying) 2739 return (USBD_IOERROR); 2740 2741 #ifdef DIAGNOSTIC 2742 if (!(xfer->rqflags & URQ_REQUEST)) { 2743 /* XXX panic */ 2744 printf("ohci_device_ctrl_transfer: not a request\n"); 2745 return (USBD_INVAL); 2746 } 2747 #endif 2748 2749 err = ohci_device_request(xfer); 2750 if (err) 2751 return (err); 2752 2753 if (sc->sc_bus.use_polling) 2754 ohci_waitintr(sc, xfer); 2755 return (USBD_IN_PROGRESS); 2756 } 2757 2758 /* Abort a device control request. */ 2759 Static void 2760 ohci_device_ctrl_abort(usbd_xfer_handle xfer) 2761 { 2762 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer)); 2763 ohci_abort_xfer(xfer, USBD_CANCELLED); 2764 } 2765 2766 /* Close a device control pipe. */ 2767 Static void 2768 ohci_device_ctrl_close(usbd_pipe_handle pipe) 2769 { 2770 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2771 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2772 2773 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe)); 2774 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2775 ohci_free_std(sc, opipe->tail.td); 2776 } 2777 2778 /************************/ 2779 2780 Static void 2781 ohci_device_clear_toggle(usbd_pipe_handle pipe) 2782 { 2783 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2784 2785 opipe->sed->ed.ed_headp &= htole32(~OHCI_TOGGLECARRY); 2786 } 2787 2788 Static void 2789 ohci_noop(usbd_pipe_handle pipe) 2790 { 2791 } 2792 2793 Static usbd_status 2794 ohci_device_bulk_transfer(usbd_xfer_handle xfer) 2795 { 2796 usbd_status err; 2797 2798 /* Insert last in queue. */ 2799 err = usb_insert_transfer(xfer); 2800 if (err) 2801 return (err); 2802 2803 /* Pipe isn't running, start first */ 2804 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2805 } 2806 2807 Static usbd_status 2808 ohci_device_bulk_start(usbd_xfer_handle xfer) 2809 { 2810 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2811 usbd_device_handle dev = opipe->pipe.device; 2812 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2813 int addr = dev->address; 2814 ohci_soft_td_t *data, *tail, *tdp; 2815 ohci_soft_ed_t *sed; 2816 int s, len, isread, endpt; 2817 usbd_status err; 2818 2819 if (sc->sc_dying) 2820 return (USBD_IOERROR); 2821 2822 #ifdef DIAGNOSTIC 2823 if (xfer->rqflags & URQ_REQUEST) { 2824 /* XXX panic */ 2825 printf("ohci_device_bulk_start: a request\n"); 2826 return (USBD_INVAL); 2827 } 2828 #endif 2829 2830 len = xfer->length; 2831 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 2832 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2833 sed = opipe->sed; 2834 2835 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d " 2836 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags, 2837 endpt)); 2838 2839 opipe->u.bulk.isread = isread; 2840 opipe->u.bulk.length = len; 2841 2842 /* Update device address */ 2843 sed->ed.ed_flags = htole32( 2844 (le32toh(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) | 2845 OHCI_ED_SET_FA(addr)); 2846 2847 /* Allocate a chain of new TDs (including a new tail). */ 2848 data = opipe->tail.td; 2849 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 2850 data, &tail); 2851 /* We want interrupt at the end of the transfer. */ 2852 tail->td.td_flags &= htole32(~OHCI_TD_INTR_MASK); 2853 tail->td.td_flags |= htole32(OHCI_TD_SET_DI(1)); 2854 tail->flags |= OHCI_CALL_DONE; 2855 tail = tail->nexttd; /* point at sentinel */ 2856 if (err) 2857 return (err); 2858 2859 tail->xfer = NULL; 2860 xfer->hcpriv = data; 2861 2862 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x " 2863 "td_cbp=0x%08x td_be=0x%08x\n", 2864 (int)le32toh(sed->ed.ed_flags), 2865 (int)le32toh(data->td.td_flags), 2866 (int)le32toh(data->td.td_cbp), 2867 (int)le32toh(data->td.td_be))); 2868 2869 #ifdef OHCI_DEBUG 2870 if (ohcidebug > 5) { 2871 ohci_dump_ed(sed); 2872 ohci_dump_tds(data); 2873 } 2874 #endif 2875 2876 /* Insert ED in schedule */ 2877 s = splusb(); 2878 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 2879 tdp->xfer = xfer; 2880 } 2881 sed->ed.ed_tailp = htole32(tail->physaddr); 2882 opipe->tail.td = tail; 2883 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 2884 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 2885 if (xfer->timeout && !sc->sc_bus.use_polling) { 2886 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2887 ohci_timeout, xfer); 2888 } 2889 2890 #if 0 2891 /* This goes wrong if we are too slow. */ 2892 if (ohcidebug > 10) { 2893 delay(10000); 2894 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2895 OREAD4(sc, OHCI_COMMAND_STATUS))); 2896 ohci_dump_ed(sed); 2897 ohci_dump_tds(data); 2898 } 2899 #endif 2900 2901 splx(s); 2902 2903 return (USBD_IN_PROGRESS); 2904 } 2905 2906 Static void 2907 ohci_device_bulk_abort(usbd_xfer_handle xfer) 2908 { 2909 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer)); 2910 ohci_abort_xfer(xfer, USBD_CANCELLED); 2911 } 2912 2913 /* 2914 * Close a device bulk pipe. 2915 */ 2916 Static void 2917 ohci_device_bulk_close(usbd_pipe_handle pipe) 2918 { 2919 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2920 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2921 2922 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe)); 2923 ohci_close_pipe(pipe, sc->sc_bulk_head); 2924 ohci_free_std(sc, opipe->tail.td); 2925 } 2926 2927 /************************/ 2928 2929 Static usbd_status 2930 ohci_device_intr_transfer(usbd_xfer_handle xfer) 2931 { 2932 usbd_status err; 2933 2934 /* Insert last in queue. */ 2935 err = usb_insert_transfer(xfer); 2936 if (err) 2937 return (err); 2938 2939 /* Pipe isn't running, start first */ 2940 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2941 } 2942 2943 Static usbd_status 2944 ohci_device_intr_start(usbd_xfer_handle xfer) 2945 { 2946 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2947 usbd_device_handle dev = opipe->pipe.device; 2948 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2949 ohci_soft_ed_t *sed = opipe->sed; 2950 ohci_soft_td_t *data, *tail; 2951 int len; 2952 int s; 2953 2954 if (sc->sc_dying) 2955 return (USBD_IOERROR); 2956 2957 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d " 2958 "flags=%d priv=%p\n", 2959 xfer, xfer->length, xfer->flags, xfer->priv)); 2960 2961 #ifdef DIAGNOSTIC 2962 if (xfer->rqflags & URQ_REQUEST) 2963 panic("ohci_device_intr_transfer: a request"); 2964 #endif 2965 2966 len = xfer->length; 2967 2968 data = opipe->tail.td; 2969 tail = ohci_alloc_std(sc); 2970 if (tail == NULL) 2971 return (USBD_NOMEM); 2972 tail->xfer = NULL; 2973 2974 data->td.td_flags = htole32( 2975 OHCI_TD_IN | OHCI_TD_NOCC | 2976 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 2977 if (xfer->flags & USBD_SHORT_XFER_OK) 2978 data->td.td_flags |= htole32(OHCI_TD_R); 2979 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf, 0)); 2980 data->nexttd = tail; 2981 data->td.td_nexttd = htole32(tail->physaddr); 2982 data->td.td_be = htole32(le32toh(data->td.td_cbp) + len - 1); 2983 data->len = len; 2984 data->xfer = xfer; 2985 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 2986 xfer->hcpriv = data; 2987 2988 #ifdef OHCI_DEBUG 2989 if (ohcidebug > 5) { 2990 DPRINTF(("ohci_device_intr_transfer:\n")); 2991 ohci_dump_ed(sed); 2992 ohci_dump_tds(data); 2993 } 2994 #endif 2995 2996 /* Insert ED in schedule */ 2997 s = splusb(); 2998 sed->ed.ed_tailp = htole32(tail->physaddr); 2999 opipe->tail.td = tail; 3000 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 3001 3002 #if 0 3003 /* 3004 * This goes horribly wrong, printing thousands of descriptors, 3005 * because false references are followed due to the fact that the 3006 * TD is gone. 3007 */ 3008 if (ohcidebug > 5) { 3009 usb_delay_ms(&sc->sc_bus, 5); 3010 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 3011 OREAD4(sc, OHCI_COMMAND_STATUS))); 3012 ohci_dump_ed(sed); 3013 ohci_dump_tds(data); 3014 } 3015 #endif 3016 splx(s); 3017 3018 return (USBD_IN_PROGRESS); 3019 } 3020 3021 /* Abort a device control request. */ 3022 Static void 3023 ohci_device_intr_abort(usbd_xfer_handle xfer) 3024 { 3025 if (xfer->pipe->intrxfer == xfer) { 3026 DPRINTF(("ohci_device_intr_abort: remove\n")); 3027 xfer->pipe->intrxfer = NULL; 3028 } 3029 ohci_abort_xfer(xfer, USBD_CANCELLED); 3030 } 3031 3032 /* Close a device interrupt pipe. */ 3033 Static void 3034 ohci_device_intr_close(usbd_pipe_handle pipe) 3035 { 3036 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3037 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3038 int nslots = opipe->u.intr.nslots; 3039 int pos = opipe->u.intr.pos; 3040 int j; 3041 ohci_soft_ed_t *p, *sed = opipe->sed; 3042 int s; 3043 3044 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 3045 pipe, nslots, pos)); 3046 s = splusb(); 3047 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 3048 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 3049 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) 3050 usb_delay_ms(&sc->sc_bus, 2); 3051 3052 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 3053 ; 3054 #ifdef DIAGNOSTIC 3055 if (p == NULL) 3056 panic("ohci_device_intr_close: ED not found"); 3057 #endif 3058 p->next = sed->next; 3059 p->ed.ed_nexted = sed->ed.ed_nexted; 3060 splx(s); 3061 3062 for (j = 0; j < nslots; j++) 3063 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 3064 3065 ohci_free_std(sc, opipe->tail.td); 3066 ohci_free_sed(sc, opipe->sed); 3067 } 3068 3069 Static usbd_status 3070 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival) 3071 { 3072 int i, j, s, best; 3073 u_int npoll, slow, shigh, nslots; 3074 u_int bestbw, bw; 3075 ohci_soft_ed_t *hsed, *sed = opipe->sed; 3076 3077 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 3078 if (ival == 0) { 3079 printf("ohci_setintr: 0 interval\n"); 3080 return (USBD_INVAL); 3081 } 3082 3083 npoll = OHCI_NO_INTRS; 3084 while (npoll > ival) 3085 npoll /= 2; 3086 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 3087 3088 /* 3089 * We now know which level in the tree the ED must go into. 3090 * Figure out which slot has most bandwidth left over. 3091 * Slots to examine: 3092 * npoll 3093 * 1 0 3094 * 2 1 2 3095 * 4 3 4 5 6 3096 * 8 7 8 9 10 11 12 13 14 3097 * N (N-1) .. (N-1+N-1) 3098 */ 3099 slow = npoll-1; 3100 shigh = slow + npoll; 3101 nslots = OHCI_NO_INTRS / npoll; 3102 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 3103 bw = 0; 3104 for (j = 0; j < nslots; j++) 3105 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 3106 if (bw < bestbw) { 3107 best = i; 3108 bestbw = bw; 3109 } 3110 } 3111 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 3112 best, slow, shigh, bestbw)); 3113 3114 s = splusb(); 3115 hsed = sc->sc_eds[best]; 3116 sed->next = hsed->next; 3117 sed->ed.ed_nexted = hsed->ed.ed_nexted; 3118 hsed->next = sed; 3119 hsed->ed.ed_nexted = htole32(sed->physaddr); 3120 splx(s); 3121 3122 for (j = 0; j < nslots; j++) 3123 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 3124 opipe->u.intr.nslots = nslots; 3125 opipe->u.intr.pos = best; 3126 3127 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 3128 return (USBD_NORMAL_COMPLETION); 3129 } 3130 3131 /***********************/ 3132 3133 usbd_status 3134 ohci_device_isoc_transfer(usbd_xfer_handle xfer) 3135 { 3136 usbd_status err; 3137 3138 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer)); 3139 3140 /* Put it on our queue, */ 3141 err = usb_insert_transfer(xfer); 3142 3143 /* bail out on error, */ 3144 if (err && err != USBD_IN_PROGRESS) 3145 return (err); 3146 3147 /* XXX should check inuse here */ 3148 3149 /* insert into schedule, */ 3150 ohci_device_isoc_enter(xfer); 3151 3152 /* and start if the pipe wasn't running */ 3153 if (!err) 3154 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 3155 3156 return (err); 3157 } 3158 3159 void 3160 ohci_device_isoc_enter(usbd_xfer_handle xfer) 3161 { 3162 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3163 usbd_device_handle dev = opipe->pipe.device; 3164 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 3165 ohci_soft_ed_t *sed = opipe->sed; 3166 struct iso *iso = &opipe->u.iso; 3167 ohci_soft_itd_t *sitd, *nsitd; 3168 ohci_physaddr_t buf, offs, noffs, bp0; 3169 int i, ncur, nframes; 3170 int s; 3171 3172 DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p " 3173 "nframes=%d\n", 3174 iso->inuse, iso->next, xfer, xfer->nframes)); 3175 3176 if (sc->sc_dying) 3177 return; 3178 3179 if (iso->next == -1) { 3180 /* Not in use yet, schedule it a few frames ahead. */ 3181 iso->next = le32toh(sc->sc_hcca->hcca_frame_number) + 5; 3182 DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n", 3183 iso->next)); 3184 } 3185 3186 sitd = opipe->tail.itd; 3187 buf = DMAADDR(&xfer->dmabuf, 0); 3188 bp0 = OHCI_PAGE(buf); 3189 offs = OHCI_PAGE_OFFSET(buf); 3190 nframes = xfer->nframes; 3191 xfer->hcpriv = sitd; 3192 for (i = ncur = 0; i < nframes; i++, ncur++) { 3193 noffs = offs + xfer->frlengths[i]; 3194 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ 3195 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */ 3196 3197 /* Allocate next ITD */ 3198 nsitd = ohci_alloc_sitd(sc); 3199 if (nsitd == NULL) { 3200 /* XXX what now? */ 3201 printf("%s: isoc TD alloc failed\n", 3202 USBDEVNAME(sc->sc_bus.bdev)); 3203 return; 3204 } 3205 3206 /* Fill current ITD */ 3207 sitd->itd.itd_flags = htole32( 3208 OHCI_ITD_NOCC | 3209 OHCI_ITD_SET_SF(iso->next) | 3210 OHCI_ITD_SET_DI(6) | /* delay intr a little */ 3211 OHCI_ITD_SET_FC(ncur)); 3212 sitd->itd.itd_bp0 = htole32(bp0); 3213 sitd->nextitd = nsitd; 3214 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 3215 sitd->itd.itd_be = htole32(bp0 + offs - 1); 3216 sitd->xfer = xfer; 3217 sitd->flags = 0; 3218 3219 sitd = nsitd; 3220 iso->next = iso->next + ncur; 3221 bp0 = OHCI_PAGE(buf + offs); 3222 ncur = 0; 3223 } 3224 sitd->itd.itd_offset[ncur] = htole16(OHCI_ITD_MK_OFFS(offs)); 3225 offs = noffs; 3226 } 3227 nsitd = ohci_alloc_sitd(sc); 3228 if (nsitd == NULL) { 3229 /* XXX what now? */ 3230 printf("%s: isoc TD alloc failed\n", 3231 USBDEVNAME(sc->sc_bus.bdev)); 3232 return; 3233 } 3234 /* Fixup last used ITD */ 3235 sitd->itd.itd_flags = htole32( 3236 OHCI_ITD_NOCC | 3237 OHCI_ITD_SET_SF(iso->next) | 3238 OHCI_ITD_SET_DI(0) | 3239 OHCI_ITD_SET_FC(ncur)); 3240 sitd->itd.itd_bp0 = htole32(bp0); 3241 sitd->nextitd = nsitd; 3242 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 3243 sitd->itd.itd_be = htole32(bp0 + offs - 1); 3244 sitd->xfer = xfer; 3245 sitd->flags = OHCI_CALL_DONE; 3246 3247 iso->next = iso->next + ncur; 3248 iso->inuse += nframes; 3249 3250 xfer->actlen = offs; /* XXX pretend we did it all */ 3251 3252 xfer->status = USBD_IN_PROGRESS; 3253 3254 #ifdef OHCI_DEBUG 3255 if (ohcidebug > 5) { 3256 DPRINTF(("ohci_device_isoc_enter: frame=%d\n", 3257 le32toh(sc->sc_hcca->hcca_frame_number))); 3258 ohci_dump_itds(xfer->hcpriv); 3259 ohci_dump_ed(sed); 3260 } 3261 #endif 3262 3263 s = splusb(); 3264 sed->ed.ed_tailp = htole32(nsitd->physaddr); 3265 opipe->tail.itd = nsitd; 3266 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 3267 splx(s); 3268 3269 #ifdef OHCI_DEBUG 3270 if (ohcidebug > 5) { 3271 delay(150000); 3272 DPRINTF(("ohci_device_isoc_enter: after frame=%d\n", 3273 le32toh(sc->sc_hcca->hcca_frame_number))); 3274 ohci_dump_itds(xfer->hcpriv); 3275 ohci_dump_ed(sed); 3276 } 3277 #endif 3278 } 3279 3280 usbd_status 3281 ohci_device_isoc_start(usbd_xfer_handle xfer) 3282 { 3283 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3284 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3285 3286 DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer)); 3287 3288 if (sc->sc_dying) 3289 return (USBD_IOERROR); 3290 3291 #ifdef DIAGNOSTIC 3292 if (xfer->status != USBD_IN_PROGRESS) 3293 printf("ohci_device_isoc_start: not in progress %p\n", xfer); 3294 #endif 3295 3296 /* XXX anything to do? */ 3297 3298 return (USBD_IN_PROGRESS); 3299 } 3300 3301 void 3302 ohci_device_isoc_abort(usbd_xfer_handle xfer) 3303 { 3304 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3305 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3306 ohci_soft_ed_t *sed; 3307 ohci_soft_itd_t *sitd; 3308 int s; 3309 3310 s = splusb(); 3311 3312 DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer)); 3313 3314 /* Transfer is already done. */ 3315 if (xfer->status != USBD_NOT_STARTED && 3316 xfer->status != USBD_IN_PROGRESS) { 3317 splx(s); 3318 printf("ohci_device_isoc_abort: early return\n"); 3319 return; 3320 } 3321 3322 /* Give xfer the requested abort code. */ 3323 xfer->status = USBD_CANCELLED; 3324 3325 sed = opipe->sed; 3326 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 3327 3328 sitd = xfer->hcpriv; 3329 #ifdef DIAGNOSTIC 3330 if (sitd == NULL) { 3331 splx(s); 3332 printf("ohci_device_isoc_abort: hcpriv==0\n"); 3333 return; 3334 } 3335 #endif 3336 for (; sitd->xfer == xfer; sitd = sitd->nextitd) { 3337 #ifdef DIAGNOSTIC 3338 DPRINTFN(1,("abort sets done sitd=%p\n", sitd)); 3339 sitd->isdone = 1; 3340 #endif 3341 } 3342 3343 splx(s); 3344 3345 usb_delay_ms(&sc->sc_bus, OHCI_ITD_NOFFSET); 3346 3347 s = splusb(); 3348 3349 /* Run callback. */ 3350 usb_transfer_complete(xfer); 3351 3352 sed->ed.ed_headp = htole32(sitd->physaddr); /* unlink TDs */ 3353 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 3354 3355 splx(s); 3356 } 3357 3358 void 3359 ohci_device_isoc_done(usbd_xfer_handle xfer) 3360 { 3361 DPRINTFN(1,("ohci_device_isoc_done: xfer=%p\n", xfer)); 3362 } 3363 3364 usbd_status 3365 ohci_setup_isoc(usbd_pipe_handle pipe) 3366 { 3367 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3368 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3369 struct iso *iso = &opipe->u.iso; 3370 int s; 3371 3372 iso->next = -1; 3373 iso->inuse = 0; 3374 3375 s = splusb(); 3376 ohci_add_ed(opipe->sed, sc->sc_isoc_head); 3377 splx(s); 3378 3379 return (USBD_NORMAL_COMPLETION); 3380 } 3381 3382 void 3383 ohci_device_isoc_close(usbd_pipe_handle pipe) 3384 { 3385 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3386 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3387 3388 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe)); 3389 ohci_close_pipe(pipe, sc->sc_isoc_head); 3390 #ifdef DIAGNOSTIC 3391 opipe->tail.itd->isdone = 1; 3392 #endif 3393 ohci_free_sitd(sc, opipe->tail.itd); 3394 } 3395
Indexes created Tue Sep 23 13:09:54 GMT 2025