Home | History | Annotate | Line # | Download | only in usb
ohci.c revision 1.16
      1 /*	$NetBSD: ohci.c,v 1.16 1998/12/28 12:56:19 augustss Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1998 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Lennart Augustsson (augustss (at) carlstedt.se) at
      9  * Carlstedt Research & Technology.
     10  *
     11  * Redistribution and use in source and binary forms, with or without
     12  * modification, are permitted provided that the following conditions
     13  * are met:
     14  * 1. Redistributions of source code must retain the above copyright
     15  *    notice, this list of conditions and the following disclaimer.
     16  * 2. Redistributions in binary form must reproduce the above copyright
     17  *    notice, this list of conditions and the following disclaimer in the
     18  *    documentation and/or other materials provided with the distribution.
     19  * 3. All advertising materials mentioning features or use of this software
     20  *    must display the following acknowledgement:
     21  *        This product includes software developed by the NetBSD
     22  *        Foundation, Inc. and its contributors.
     23  * 4. Neither the name of The NetBSD Foundation nor the names of its
     24  *    contributors may be used to endorse or promote products derived
     25  *    from this software without specific prior written permission.
     26  *
     27  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     28  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     29  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     30  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     31  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     32  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     33  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     34  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     35  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     36  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     37  * POSSIBILITY OF SUCH DAMAGE.
     38  */
     39 
     40 /*
     41  * USB Open Host Controller driver.
     42  *
     43  * OHCI spec: http://www.intel.com/design/usb/ohci11d.pdf
     44  * USB spec: http://www.teleport.com/cgi-bin/mailmerge.cgi/~usb/cgiform.tpl
     45  */
     46 
     47 #include <sys/param.h>
     48 #include <sys/systm.h>
     49 #include <sys/kernel.h>
     50 #include <sys/malloc.h>
     51 #if defined(__NetBSD__)
     52 #include <sys/device.h>
     53 #elif defined(__FreeBSD__)
     54 #include <sys/module.h>
     55 #include <sys/bus.h>
     56 #endif
     57 #include <sys/proc.h>
     58 #include <sys/queue.h>
     59 #include <sys/select.h>
     60 
     61 #include <machine/bus.h>
     62 #include <machine/endian.h>
     63 
     64 #include <dev/usb/usb.h>
     65 #include <dev/usb/usbdi.h>
     66 #include <dev/usb/usbdivar.h>
     67 #include <dev/usb/usb_quirks.h>
     68 #include <dev/usb/usb_mem.h>
     69 
     70 #include <dev/usb/ohcireg.h>
     71 #include <dev/usb/ohcivar.h>
     72 
     73 #if defined(__FreeBSD__)
     74 #include <machine/clock.h>
     75 #include "dev/usb/queue.addendum.h"
     76 
     77 #define delay(d)                DELAY(d)
     78 
     79 #endif
     80 
     81 /*
     82  * The OHCI controller is little endian, so on big endian machines
     83  * the data strored in memory needs to be swapped.
     84  */
     85 #if BYTE_ORDER == BIG_ENDIAN
     86 #define LE(x) (bswap32(x))
     87 #else
     88 #define LE(x) (x)
     89 #endif
     90 
     91 struct ohci_pipe;
     92 
     93 ohci_soft_ed_t *ohci_alloc_sed __P((ohci_softc_t *));
     94 void		ohci_free_sed __P((ohci_softc_t *, ohci_soft_ed_t *));
     95 
     96 ohci_soft_td_t *ohci_alloc_std __P((ohci_softc_t *));
     97 void		ohci_free_std __P((ohci_softc_t *, ohci_soft_td_t *));
     98 
     99 usbd_status	ohci_open __P((usbd_pipe_handle));
    100 void		ohci_poll __P((struct usbd_bus *));
    101 void		ohci_waitintr __P((ohci_softc_t *, usbd_request_handle));
    102 void		ohci_rhsc __P((ohci_softc_t *, usbd_request_handle));
    103 void		ohci_process_done __P((ohci_softc_t *, ohci_physaddr_t));
    104 void		ohci_ii_done __P((ohci_softc_t *, usbd_request_handle));
    105 void		ohci_ctrl_done __P((ohci_softc_t *, usbd_request_handle));
    106 void		ohci_intr_done __P((ohci_softc_t *, usbd_request_handle));
    107 void		ohci_bulk_done __P((ohci_softc_t *, usbd_request_handle));
    108 
    109 usbd_status	ohci_device_request __P((usbd_request_handle reqh));
    110 void		ohci_add_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *));
    111 void		ohci_rem_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *));
    112 void		ohci_hash_add_td __P((ohci_softc_t *, ohci_soft_td_t *));
    113 void		ohci_hash_rem_td __P((ohci_softc_t *, ohci_soft_td_t *));
    114 ohci_soft_td_t *ohci_hash_find_td __P((ohci_softc_t *, ohci_physaddr_t));
    115 
    116 usbd_status	ohci_root_ctrl_transfer __P((usbd_request_handle));
    117 void		ohci_root_ctrl_abort __P((usbd_request_handle));
    118 void		ohci_root_ctrl_close __P((usbd_pipe_handle));
    119 
    120 usbd_status	ohci_root_intr_transfer __P((usbd_request_handle));
    121 void		ohci_root_intr_abort __P((usbd_request_handle));
    122 void		ohci_root_intr_close __P((usbd_pipe_handle));
    123 
    124 usbd_status	ohci_device_ctrl_transfer __P((usbd_request_handle));
    125 void		ohci_device_ctrl_abort __P((usbd_request_handle));
    126 void		ohci_device_ctrl_close __P((usbd_pipe_handle));
    127 
    128 usbd_status	ohci_device_bulk_transfer __P((usbd_request_handle));
    129 void		ohci_device_bulk_abort __P((usbd_request_handle));
    130 void		ohci_device_bulk_close __P((usbd_pipe_handle));
    131 
    132 usbd_status	ohci_device_intr_transfer __P((usbd_request_handle));
    133 void		ohci_device_intr_abort __P((usbd_request_handle));
    134 void		ohci_device_intr_close __P((usbd_pipe_handle));
    135 usbd_status	ohci_device_setintr __P((ohci_softc_t *sc,
    136 					 struct ohci_pipe *pipe, int ival));
    137 
    138 int		ohci_str __P((usb_string_descriptor_t *, int, char *));
    139 
    140 void		ohci_timeout __P((void *));
    141 void		ohci_rhsc_able __P((ohci_softc_t *, int));
    142 
    143 #ifdef USB_DEBUG
    144 ohci_softc_t   *thesc;
    145 void		ohci_dumpregs __P((ohci_softc_t *));
    146 void		ohci_dump_tds __P((ohci_soft_td_t *));
    147 void		ohci_dump_td __P((ohci_soft_td_t *));
    148 void		ohci_dump_ed __P((ohci_soft_ed_t *));
    149 #endif
    150 
    151 #if defined(__NetBSD__)
    152 #define OWRITE4(sc, r, x) bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x))
    153 #define OREAD4(sc, r) bus_space_read_4((sc)->iot, (sc)->ioh, (r))
    154 #define OREAD2(sc, r) bus_space_read_2((sc)->iot, (sc)->ioh, (r))
    155 #elif defined(__FreeBSD__)
    156 #define OWRITE4(sc, r, x) outl((sc)->sc_iobase + (r), (x))
    157 #define OREAD4(sc, r) inl((sc)->sc_iobase + (r))
    158 #define OREAD2(sc, r) inw((sc)->sc_iobase + (r))
    159 #endif
    160 
    161 /* Reverse the bits in a value 0 .. 31 */
    162 static u_int8_t revbits[OHCI_NO_INTRS] =
    163   { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c,
    164     0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e,
    165     0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d,
    166     0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f };
    167 
    168 struct ohci_pipe {
    169 	struct usbd_pipe pipe;
    170 	ohci_soft_ed_t *sed;
    171 	ohci_soft_td_t *tail;
    172 	/* Info needed for different pipe kinds. */
    173 	union {
    174 		/* Control pipe */
    175 		struct {
    176 			usb_dma_t datadma;
    177 			usb_dma_t reqdma;
    178 			u_int length;
    179 			ohci_soft_td_t *setup, *xfer, *stat;
    180 		} ctl;
    181 		/* Interrupt pipe */
    182 		struct {
    183 			usb_dma_t datadma;
    184 			int nslots;
    185 			int pos;
    186 		} intr;
    187 		/* Bulk pipe */
    188 		struct {
    189 			usb_dma_t datadma;
    190 			u_int length;
    191 		} bulk;
    192 	} u;
    193 };
    194 
    195 #define OHCI_INTR_ENDPT 1
    196 
    197 struct usbd_methods ohci_root_ctrl_methods = {
    198 	ohci_root_ctrl_transfer,
    199 	ohci_root_ctrl_abort,
    200 	ohci_root_ctrl_close,
    201 	0,
    202 };
    203 
    204 struct usbd_methods ohci_root_intr_methods = {
    205 	ohci_root_intr_transfer,
    206 	ohci_root_intr_abort,
    207 	ohci_root_intr_close,
    208 	0,
    209 };
    210 
    211 struct usbd_methods ohci_device_ctrl_methods = {
    212 	ohci_device_ctrl_transfer,
    213 	ohci_device_ctrl_abort,
    214 	ohci_device_ctrl_close,
    215 	0,
    216 };
    217 
    218 struct usbd_methods ohci_device_intr_methods = {
    219 	ohci_device_intr_transfer,
    220 	ohci_device_intr_abort,
    221 	ohci_device_intr_close,
    222 };
    223 
    224 struct usbd_methods ohci_device_bulk_methods = {
    225 	ohci_device_bulk_transfer,
    226 	ohci_device_bulk_abort,
    227 	ohci_device_bulk_close,
    228 	0,
    229 };
    230 
    231 ohci_soft_ed_t *
    232 ohci_alloc_sed(sc)
    233 	ohci_softc_t *sc;
    234 {
    235 	ohci_soft_ed_t *sed;
    236 	usbd_status r;
    237 	int i, offs;
    238 	usb_dma_t dma;
    239 
    240 	if (!sc->sc_freeeds) {
    241 		DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n"));
    242 		sed = malloc(sizeof(ohci_soft_ed_t) * OHCI_ED_CHUNK,
    243 			     M_USBDEV, M_NOWAIT);
    244 		if (!sed)
    245 			return 0;
    246 		r = usb_allocmem(sc->sc_dmatag, OHCI_ED_SIZE * OHCI_ED_CHUNK,
    247 				 OHCI_ED_ALIGN, &dma);
    248 		if (r != USBD_NORMAL_COMPLETION) {
    249 			free(sed, M_USBDEV);
    250 			return 0;
    251 		}
    252 		for(i = 0; i < OHCI_ED_CHUNK; i++, sed++) {
    253 			offs = i * OHCI_ED_SIZE;
    254 			sed->physaddr = DMAADDR(&dma) + offs;
    255 			sed->ed = (ohci_ed_t *)
    256 					((char *)KERNADDR(&dma) + offs);
    257 			sed->next = sc->sc_freeeds;
    258 			sc->sc_freeeds = sed;
    259 		}
    260 	}
    261 	sed = sc->sc_freeeds;
    262 	sc->sc_freeeds = sed->next;
    263 	memset(sed->ed, 0, OHCI_ED_SIZE);
    264 	sed->next = 0;
    265 	return sed;
    266 }
    267 
    268 void
    269 ohci_free_sed(sc, sed)
    270 	ohci_softc_t *sc;
    271 	ohci_soft_ed_t *sed;
    272 {
    273 	sed->next = sc->sc_freeeds;
    274 	sc->sc_freeeds = sed;
    275 }
    276 
    277 ohci_soft_td_t *
    278 ohci_alloc_std(sc)
    279 	ohci_softc_t *sc;
    280 {
    281 	ohci_soft_td_t *std;
    282 	usbd_status r;
    283 	int i, offs;
    284 	usb_dma_t dma;
    285 
    286 	if (!sc->sc_freetds) {
    287 		DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n"));
    288 		std = malloc(sizeof(ohci_soft_td_t) * OHCI_TD_CHUNK,
    289 			     M_USBDEV, M_NOWAIT);
    290 		if (!std)
    291 			return 0;
    292 		r = usb_allocmem(sc->sc_dmatag, OHCI_TD_SIZE * OHCI_TD_CHUNK,
    293 				 OHCI_TD_ALIGN, &dma);
    294 		if (r != USBD_NORMAL_COMPLETION) {
    295 			free(std, M_USBDEV);
    296 			return 0;
    297 		}
    298 		for(i = 0; i < OHCI_TD_CHUNK; i++, std++) {
    299 			offs = i * OHCI_TD_SIZE;
    300 			std->physaddr = DMAADDR(&dma) + offs;
    301 			std->td = (ohci_td_t *)
    302 					((char *)KERNADDR(&dma) + offs);
    303 			std->nexttd = sc->sc_freetds;
    304 			sc->sc_freetds = std;
    305 		}
    306 	}
    307 	std = sc->sc_freetds;
    308 	sc->sc_freetds = std->nexttd;
    309 	memset(std->td, 0, OHCI_TD_SIZE);
    310 	std->nexttd = 0;
    311 	return (std);
    312 }
    313 
    314 void
    315 ohci_free_std(sc, std)
    316 	ohci_softc_t *sc;
    317 	ohci_soft_td_t *std;
    318 {
    319 	std->nexttd = sc->sc_freetds;
    320 	sc->sc_freetds = std;
    321 }
    322 
    323 usbd_status
    324 ohci_init(sc)
    325 	ohci_softc_t *sc;
    326 {
    327 	ohci_soft_ed_t *sed, *psed;
    328 	usbd_status r;
    329 	int rev;
    330 	int i;
    331 	u_int32_t s, ctl, ival, hcr, fm, per;
    332 
    333 #ifdef macppc
    334 	/* XXX without reset, keyboard and mouse are never attached */
    335 	printf("%s: resetting\n", sc->sc_bus.bdev.dv_xname);
    336 	OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
    337 	delay(USB_RESET_DELAY * 10000);
    338 #endif
    339 
    340 	DPRINTF(("ohci_init: start\n"));
    341 	rev = OREAD4(sc, OHCI_REVISION);
    342 	printf("%s: OHCI version %d.%d%s\n", USBDEVNAME(sc->sc_bus.bdev),
    343 	       OHCI_REV_HI(rev), OHCI_REV_LO(rev),
    344 	       OHCI_REV_LEGACY(rev) ? ", legacy support" : "");
    345 	if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) {
    346 		printf("%s: unsupported OHCI revision\n",
    347 		       USBDEVNAME(sc->sc_bus.bdev));
    348 		return (USBD_INVAL);
    349 	}
    350 
    351 	for (i = 0; i < OHCI_HASH_SIZE; i++)
    352 		LIST_INIT(&sc->sc_hash_tds[i]);
    353 
    354 	/* Allocate the HCCA area. */
    355 	r = usb_allocmem(sc->sc_dmatag, OHCI_HCCA_SIZE,
    356 			 OHCI_HCCA_ALIGN, &sc->sc_hccadma);
    357 	if (r != USBD_NORMAL_COMPLETION)
    358 		return (r);
    359 	sc->sc_hcca = (struct ohci_hcca *)KERNADDR(&sc->sc_hccadma);
    360 	memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE);
    361 
    362 	sc->sc_eintrs = OHCI_NORMAL_INTRS;
    363 
    364 	sc->sc_ctrl_head = ohci_alloc_sed(sc);
    365 	if (!sc->sc_ctrl_head) {
    366 		r = USBD_NOMEM;
    367 		goto bad1;
    368 	}
    369 	sc->sc_ctrl_head->ed->ed_flags |= LE(OHCI_ED_SKIP);
    370 	sc->sc_bulk_head = ohci_alloc_sed(sc);
    371 	if (!sc->sc_bulk_head) {
    372 		r = USBD_NOMEM;
    373 		goto bad2;
    374 	}
    375 	sc->sc_bulk_head->ed->ed_flags |= LE(OHCI_ED_SKIP);
    376 
    377 	/* Allocate all the dummy EDs that make up the interrupt tree. */
    378 	for (i = 0; i < OHCI_NO_EDS; i++) {
    379 		sed = ohci_alloc_sed(sc);
    380 		if (!sed) {
    381 			while (--i >= 0)
    382 				ohci_free_sed(sc, sc->sc_eds[i]);
    383 			r = USBD_NOMEM;
    384 			goto bad3;
    385 		}
    386 		/* All ED fields are set to 0. */
    387 		sc->sc_eds[i] = sed;
    388 		sed->ed->ed_flags |= LE(OHCI_ED_SKIP);
    389 		if (i != 0) {
    390 			psed = sc->sc_eds[(i-1) / 2];
    391 			sed->next = psed;
    392 			sed->ed->ed_nexted = LE(psed->physaddr);
    393 		}
    394 	}
    395 	/*
    396 	 * Fill HCCA interrupt table.  The bit reversal is to get
    397 	 * the tree set up properly to spread the interrupts.
    398 	 */
    399 	for (i = 0; i < OHCI_NO_INTRS; i++)
    400 		sc->sc_hcca->hcca_interrupt_table[revbits[i]] =
    401 			LE(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr);
    402 
    403 	/* Determine in what context we are running. */
    404 	ctl = OREAD4(sc, OHCI_CONTROL);
    405 	if (ctl & OHCI_IR) {
    406 		/* SMM active, request change */
    407 		DPRINTF(("ohci_init: SMM active, request owner change\n"));
    408 		s = OREAD4(sc, OHCI_COMMAND_STATUS);
    409 		OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR);
    410 		for (i = 0; i < 100 && (ctl & OHCI_IR); i++) {
    411 			delay(1000);
    412 			ctl = OREAD4(sc, OHCI_CONTROL);
    413 		}
    414 		if ((ctl & OHCI_IR) == 0) {
    415 			printf("%s: SMM does not respond, resetting\n",
    416 			       USBDEVNAME(sc->sc_bus.bdev));
    417 			OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
    418 			goto reset;
    419 		}
    420 	} else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) {
    421 		/* BIOS started controller. */
    422 		DPRINTF(("ohci_init: BIOS active\n"));
    423 		if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) {
    424 			OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL);
    425 			delay(USB_RESUME_DELAY * 1000);
    426 		}
    427 	} else {
    428 		DPRINTF(("ohci_init: cold started\n"));
    429 	reset:
    430 		/* Controller was cold started. */
    431 		delay(USB_BUS_RESET_DELAY * 1000);
    432 	}
    433 
    434 	/*
    435 	 * This reset should be necessary according to the OHCI spec, but
    436 	 * without it some controller don't start.
    437 	 */
    438 	DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev)));
    439 	OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
    440 	delay(USB_BUS_RESET_DELAY * 1000);
    441 
    442 	/* We now own the host controller and the bus has been reset. */
    443 	ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL));
    444 
    445 	OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */
    446 	/* Nominal time for a reset is 10 us. */
    447 	for (i = 0; i < 10; i++) {
    448 		delay(10);
    449 		hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR;
    450 		if (!hcr)
    451 			break;
    452 	}
    453 	if (hcr) {
    454 		printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev));
    455 		r = USBD_IOERROR;
    456 		goto bad3;
    457 	}
    458 #ifdef USB_DEBUG
    459 	thesc = sc;
    460 	if (ohcidebug > 15)
    461 		ohci_dumpregs(sc);
    462 #endif
    463 
    464 	/* The controller is now in suspend state, we have 2ms to finish. */
    465 
    466 	/* Set up HC registers. */
    467 	OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma));
    468 	OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
    469 	OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
    470 	OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
    471 	OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE);
    472 	ctl = OREAD4(sc, OHCI_CONTROL);
    473 	ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR);
    474 	ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE |
    475 		OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL;
    476 	/* And finally start it! */
    477 	OWRITE4(sc, OHCI_CONTROL, ctl);
    478 
    479 	/*
    480 	 * The controller is now OPERATIONAL.  Set a some final
    481 	 * registers that should be set earlier, but that the
    482 	 * controller ignores when in the SUSPEND state.
    483 	 */
    484 	fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT;
    485 	fm |= OHCI_FSMPS(ival) | ival;
    486 	OWRITE4(sc, OHCI_FM_INTERVAL, fm);
    487 	per = OHCI_PERIODIC(ival); /* 90% periodic */
    488 	OWRITE4(sc, OHCI_PERIODIC_START, per);
    489 
    490 	OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC);	/* Enable port power */
    491 
    492 	sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A));
    493 
    494 #ifdef USB_DEBUG
    495 	if (ohcidebug > 5)
    496 		ohci_dumpregs(sc);
    497 #endif
    498 
    499 	/* Set up the bus struct. */
    500 	sc->sc_bus.open_pipe = ohci_open;
    501 	sc->sc_bus.pipe_size = sizeof(struct ohci_pipe);
    502 	sc->sc_bus.do_poll = ohci_poll;
    503 
    504 	return (USBD_NORMAL_COMPLETION);
    505 
    506  bad3:
    507 	ohci_free_sed(sc, sc->sc_ctrl_head);
    508  bad2:
    509 	ohci_free_sed(sc, sc->sc_bulk_head);
    510  bad1:
    511 	usb_freemem(sc->sc_dmatag, &sc->sc_hccadma);
    512 	return (r);
    513 }
    514 
    515 #ifdef USB_DEBUG
    516 void ohcidump(void);
    517 void ohcidump(void) { ohci_dumpregs(thesc); }
    518 
    519 void
    520 ohci_dumpregs(sc)
    521 	ohci_softc_t *sc;
    522 {
    523 	printf("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n",
    524 	       OREAD4(sc, OHCI_REVISION),
    525 	       OREAD4(sc, OHCI_CONTROL),
    526 	       OREAD4(sc, OHCI_COMMAND_STATUS));
    527 	printf("               intrstat=0x%08x intre=0x%08x intrd=0x%08x\n",
    528 	       OREAD4(sc, OHCI_INTERRUPT_STATUS),
    529 	       OREAD4(sc, OHCI_INTERRUPT_ENABLE),
    530 	       OREAD4(sc, OHCI_INTERRUPT_DISABLE));
    531 	printf("               hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n",
    532 	       OREAD4(sc, OHCI_HCCA),
    533 	       OREAD4(sc, OHCI_PERIOD_CURRENT_ED),
    534 	       OREAD4(sc, OHCI_CONTROL_HEAD_ED));
    535 	printf("               ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n",
    536 	       OREAD4(sc, OHCI_CONTROL_CURRENT_ED),
    537 	       OREAD4(sc, OHCI_BULK_HEAD_ED),
    538 	       OREAD4(sc, OHCI_BULK_CURRENT_ED));
    539 	printf("               done=0x%08x fmival=0x%08x fmrem=0x%08x\n",
    540 	       OREAD4(sc, OHCI_DONE_HEAD),
    541 	       OREAD4(sc, OHCI_FM_INTERVAL),
    542 	       OREAD4(sc, OHCI_FM_REMAINING));
    543 	printf("               fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n",
    544 	       OREAD4(sc, OHCI_FM_NUMBER),
    545 	       OREAD4(sc, OHCI_PERIODIC_START),
    546 	       OREAD4(sc, OHCI_LS_THRESHOLD));
    547 	printf("               desca=0x%08x descb=0x%08x stat=0x%08x\n",
    548 	       OREAD4(sc, OHCI_RH_DESCRIPTOR_A),
    549 	       OREAD4(sc, OHCI_RH_DESCRIPTOR_B),
    550 	       OREAD4(sc, OHCI_RH_STATUS));
    551 	printf("               port1=0x%08x port2=0x%08x\n",
    552 	       OREAD4(sc, OHCI_RH_PORT_STATUS(1)),
    553 	       OREAD4(sc, OHCI_RH_PORT_STATUS(2)));
    554 	printf("         HCCA: frame_number=0x%04x done_head=0x%08x\n",
    555 	       LE(sc->sc_hcca->hcca_frame_number),
    556 	       LE(sc->sc_hcca->hcca_done_head));
    557 }
    558 #endif
    559 
    560 int
    561 ohci_intr(p)
    562 	void *p;
    563 {
    564 	ohci_softc_t *sc = p;
    565 	u_int32_t intrs, eintrs;
    566 	ohci_physaddr_t done;
    567 
    568 	/* In case the interrupt occurs before initialization has completed. */
    569 	if (sc->sc_hcca == NULL) {
    570 #ifdef DIAGNOSTIC
    571 		printf("ohci_intr: sc->sc_hcca == NULL\n");
    572 #endif
    573 		return (0);
    574 	}
    575 
    576 	done = LE(sc->sc_hcca->hcca_done_head);
    577 	if (done != 0) {
    578 		intrs = OHCI_WDH;
    579 		if (done & OHCI_DONE_INTRS)
    580 			intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS);
    581 	} else
    582 		intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS);
    583 	if (!intrs)
    584 		return (0);
    585 	intrs &= ~OHCI_MIE;
    586 	OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */
    587 	eintrs = intrs & sc->sc_eintrs;
    588 	if (!eintrs)
    589 		return (0);
    590 
    591 	sc->sc_intrs++;
    592 	DPRINTFN(7, ("ohci_intr: sc=%p intrs=%x(%x) eintr=%x\n",
    593 		     sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS),
    594 		     (u_int)eintrs));
    595 
    596 	if (eintrs & OHCI_SO) {
    597 		printf("%s: scheduling overrun\n",USBDEVNAME(sc->sc_bus.bdev));
    598 		/* XXX do what */
    599 		intrs &= ~OHCI_SO;
    600 	}
    601 	if (eintrs & OHCI_WDH) {
    602 		ohci_process_done(sc, done &~ OHCI_DONE_INTRS);
    603 		sc->sc_hcca->hcca_done_head = 0;
    604 		intrs &= ~OHCI_WDH;
    605 	}
    606 	if (eintrs & OHCI_RD) {
    607 		/* XXX process resume detect */
    608 	}
    609 	if (eintrs & OHCI_UE) {
    610 		printf("%s: unrecoverable error, controller halted\n",
    611 		       USBDEVNAME(sc->sc_bus.bdev));
    612 		OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
    613 		/* XXX what else */
    614 	}
    615 	if (eintrs & OHCI_RHSC) {
    616 		ohci_rhsc(sc, sc->sc_intrreqh);
    617 		intrs &= ~OHCI_RHSC;
    618 
    619 		/*
    620 		 * Disable RHSC interrupt for now, because it will be
    621 		 * on until the port has been reset.
    622 		 */
    623 		ohci_rhsc_able(sc, 0);
    624 	}
    625 
    626 	/* Block unprocessed interrupts. XXX */
    627 	OWRITE4(sc, OHCI_INTERRUPT_DISABLE, intrs);
    628 	sc->sc_eintrs &= ~intrs;
    629 
    630 	return (1);
    631 }
    632 
    633 void
    634 ohci_rhsc_able(sc, on)
    635 	ohci_softc_t *sc;
    636 	int on;
    637 {
    638 	DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on));
    639 	if (on) {
    640 		sc->sc_eintrs |= OHCI_RHSC;
    641 		OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC);
    642 	} else {
    643 		sc->sc_eintrs &= ~OHCI_RHSC;
    644 		OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC);
    645 	}
    646 }
    647 
    648 #ifdef USB_DEBUG
    649 char *ohci_cc_strs[] = {
    650 	"NO_ERROR",
    651 	"CRC",
    652 	"BIT_STUFFING",
    653 	"DATA_TOGGLE_MISMATCH",
    654 	"STALL",
    655 	"DEVICE_NOT_RESPONDING",
    656 	"PID_CHECK_FAILURE",
    657 	"UNEXPECTED_PID",
    658 	"DATA_OVERRUN",
    659 	"DATA_UNDERRUN",
    660 	"BUFFER_OVERRUN",
    661 	"BUFFER_UNDERRUN",
    662 	"NOT_ACCESSED",
    663 };
    664 #endif
    665 
    666 void
    667 ohci_process_done(sc, done)
    668 	ohci_softc_t *sc;
    669 	ohci_physaddr_t done;
    670 {
    671 	ohci_soft_td_t *std, *sdone;
    672 	usbd_request_handle reqh;
    673 	int len, cc;
    674 
    675 	DPRINTFN(10,("ohci_process_done: done=0x%08lx\n", (u_long)done));
    676 
    677 	/* Reverse the done list. */
    678 	for (sdone = 0; done; done = LE(std->td->td_nexttd)) {
    679 		std = ohci_hash_find_td(sc, done);
    680 		std->dnext = sdone;
    681 		sdone = std;
    682 	}
    683 
    684 #ifdef USB_DEBUG
    685 	if (ohcidebug > 10) {
    686 		printf("ohci_process_done: TD done:\n");
    687 		ohci_dump_tds(sdone);
    688 	}
    689 #endif
    690 
    691 	for (std = sdone; std; std = std->dnext) {
    692 		reqh = std->reqh;
    693 		DPRINTFN(10, ("ohci_process_done: std=%p reqh=%p\n",std,reqh));
    694 		cc = OHCI_TD_GET_CC(LE(std->td->td_flags));
    695 		if (cc == OHCI_CC_NO_ERROR) {
    696 			if (std->td->td_cbp == 0)
    697 				len = std->len;
    698 			else
    699 				len = LE(std->td->td_be) -
    700 				      LE(std->td->td_cbp) + 1;
    701 			reqh->actlen += len;
    702 			reqh->status = USBD_NORMAL_COMPLETION;
    703 			/*
    704 			 * Only do a callback on the last stage of a transfer.
    705 			 * Others have hcpriv = 0.
    706 			 */
    707 			if (reqh->hcpriv == std)
    708 				ohci_ii_done(sc, reqh);
    709 		} else {
    710 			ohci_soft_td_t *p, *n;
    711 			struct ohci_pipe *opipe =
    712 				(struct ohci_pipe *)reqh->pipe;
    713 			DPRINTFN(-1,("ohci_process_done: error cc=%d (%s)\n",
    714 			 OHCI_TD_GET_CC(LE(std->td->td_flags)),
    715 			 ohci_cc_strs[OHCI_TD_GET_CC(LE(std->td->td_flags))]));
    716 			/*
    717 			 * Endpoint is halted.  First unlink all the TDs
    718 			 * belonging to the failed transfer, and then restart
    719 			 * the endpoint.
    720 			 */
    721 			for (p = std->nexttd; p->reqh == reqh; p = n) {
    722 				n = p->nexttd;
    723 				ohci_hash_rem_td(sc, p);
    724 				ohci_free_std(sc, p);
    725 			}
    726 			/* clear halt */
    727 			opipe->sed->ed->ed_headp = LE(p->physaddr);
    728 			OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
    729 
    730 			if (cc == OHCI_CC_STALL)
    731 				reqh->status = USBD_STALLED;
    732 			else
    733 				reqh->status = USBD_IOERROR;
    734 			ohci_ii_done(sc, reqh);
    735 		}
    736 		ohci_hash_rem_td(sc, std);
    737 		ohci_free_std(sc, std);
    738 	}
    739 }
    740 
    741 void
    742 ohci_ii_done(sc, reqh)
    743 	ohci_softc_t *sc;
    744 	usbd_request_handle reqh;
    745 {
    746 	switch (reqh->pipe->endpoint->edesc->bmAttributes & UE_XFERTYPE) {
    747 	case UE_CONTROL:
    748 		ohci_ctrl_done(sc, reqh);
    749 		break;
    750 	case UE_INTERRUPT:
    751 		ohci_intr_done(sc, reqh);
    752 		break;
    753 	case UE_BULK:
    754 		ohci_bulk_done(sc, reqh);
    755 		break;
    756 	case UE_ISOCHRONOUS:
    757 		printf("ohci_process_done: ISO done?\n");
    758 		break;
    759 	}
    760 
    761 	/* And finally execute callback. */
    762 	reqh->xfercb(reqh);
    763 }
    764 
    765 void
    766 ohci_ctrl_done(sc, reqh)
    767 	ohci_softc_t *sc;
    768 	usbd_request_handle reqh;
    769 {
    770 	struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
    771 	u_int len = opipe->u.ctl.length;
    772 	usb_dma_t *dma;
    773 
    774 	DPRINTFN(10,("ohci_ctrl_done: reqh=%p\n", reqh));
    775 
    776 	if (!reqh->isreq) {
    777 		panic("ohci_ctrl_done: not a request\n");
    778 		return;
    779 	}
    780 
    781 	if (len != 0) {
    782 		dma = &opipe->u.ctl.datadma;
    783 		if (reqh->request.bmRequestType & UT_READ)
    784 			memcpy(reqh->buffer, KERNADDR(dma), len);
    785 		usb_freemem(sc->sc_dmatag, dma);
    786 	}
    787 	usb_untimeout(ohci_timeout, reqh, reqh->timo_handle);
    788 }
    789 
    790 void
    791 ohci_intr_done(sc, reqh)
    792 	ohci_softc_t *sc;
    793 	usbd_request_handle reqh;
    794 {
    795 	struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
    796 	usb_dma_t *dma;
    797 	ohci_soft_ed_t *sed = opipe->sed;
    798 	ohci_soft_td_t *xfer, *tail;
    799 
    800 
    801 	DPRINTFN(10,("ohci_intr_done: reqh=%p, actlen=%d\n",
    802 		     reqh, reqh->actlen));
    803 
    804 	dma = &opipe->u.intr.datadma;
    805 	memcpy(reqh->buffer, KERNADDR(dma), reqh->actlen);
    806 
    807 	if (reqh->pipe->intrreqh == reqh) {
    808 		xfer = opipe->tail;
    809 		tail = ohci_alloc_std(sc); /* XXX should reuse TD */
    810 		if (!tail) {
    811 			reqh->status = USBD_NOMEM;
    812 			return;
    813 		}
    814 		tail->reqh = 0;
    815 
    816 		xfer->td->td_flags = LE(
    817 			OHCI_TD_IN | OHCI_TD_NOCC |
    818 			OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
    819 		xfer->td->td_cbp = LE(DMAADDR(dma));
    820 		xfer->nexttd = tail;
    821 		xfer->td->td_nexttd = LE(tail->physaddr);
    822 		xfer->td->td_be = LE(LE(xfer->td->td_cbp) + reqh->length - 1);
    823 		xfer->len = reqh->length;
    824 		xfer->reqh = reqh;
    825 
    826 		reqh->actlen = 0;
    827 		reqh->hcpriv = xfer;
    828 
    829 		ohci_hash_add_td(sc, xfer);
    830 		sed->ed->ed_tailp = LE(tail->physaddr);
    831 		opipe->tail = tail;
    832 	} else {
    833 		usb_freemem(sc->sc_dmatag, dma);
    834 	}
    835 }
    836 
    837 void
    838 ohci_bulk_done(sc, reqh)
    839 	ohci_softc_t *sc;
    840 	usbd_request_handle reqh;
    841 {
    842 	struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
    843 	usb_dma_t *dma;
    844 
    845 
    846 	DPRINTFN(10,("ohci_bulk_done: reqh=%p, actlen=%d\n",
    847 		     reqh, reqh->actlen));
    848 
    849 	dma = &opipe->u.bulk.datadma;
    850 	if (reqh->request.bmRequestType & UT_READ)
    851 		memcpy(reqh->buffer, KERNADDR(dma), reqh->actlen);
    852 	usb_freemem(sc->sc_dmatag, dma);
    853 	usb_untimeout(ohci_timeout, reqh, reqh->timo_handle);
    854 }
    855 
    856 void
    857 ohci_rhsc(sc, reqh)
    858 	ohci_softc_t *sc;
    859 	usbd_request_handle reqh;
    860 {
    861 	usbd_pipe_handle pipe;
    862 	struct ohci_pipe *opipe;
    863 	u_char *p;
    864 	int i, m;
    865 	int hstatus;
    866 
    867 	hstatus = OREAD4(sc, OHCI_RH_STATUS);
    868 	DPRINTF(("ohci_rhsc: sc=%p reqh=%p hstatus=0x%08x\n",
    869 		 sc, reqh, hstatus));
    870 
    871 	if (reqh == 0) {
    872 		/* Just ignore the change. */
    873 		return;
    874 	}
    875 
    876 	pipe = reqh->pipe;
    877 	opipe = (struct ohci_pipe *)pipe;
    878 
    879 	p = KERNADDR(&opipe->u.intr.datadma);
    880 	m = min(sc->sc_noport, reqh->length * 8 - 1);
    881 	memset(p, 0, reqh->length);
    882 	for (i = 1; i <= m; i++) {
    883 		if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16)
    884 			p[i/8] |= 1 << (i%8);
    885 	}
    886 	DPRINTF(("ohci_rhsc: change=0x%02x\n", *p));
    887 	reqh->actlen = reqh->length;
    888 	reqh->status = USBD_NORMAL_COMPLETION;
    889 	reqh->xfercb(reqh);
    890 
    891 	if (reqh->pipe->intrreqh != reqh) {
    892 		sc->sc_intrreqh = 0;
    893 		usb_freemem(sc->sc_dmatag, &opipe->u.intr.datadma);
    894 	}
    895 }
    896 
    897 /*
    898  * Wait here until controller claims to have an interrupt.
    899  * Then call ohci_intr and return.  Use timeout to avoid waiting
    900  * too long.
    901  */
    902 void
    903 ohci_waitintr(sc, reqh)
    904 	ohci_softc_t *sc;
    905 	usbd_request_handle reqh;
    906 {
    907 	int timo = reqh->timeout;
    908 	int usecs;
    909 	u_int32_t intrs;
    910 
    911 	reqh->status = USBD_IN_PROGRESS;
    912 	for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) {
    913 		usbd_delay_ms(&sc->sc_bus, 1);
    914 		intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs;
    915 		DPRINTFN(10,("ohci_waitintr: 0x%04x\n", intrs));
    916 #ifdef USB_DEBUG
    917 		if (ohcidebug > 15)
    918 			ohci_dumpregs(sc);
    919 #endif
    920 		if (intrs) {
    921 			ohci_intr(sc);
    922 			if (reqh->status != USBD_IN_PROGRESS)
    923 				return;
    924 		}
    925 	}
    926 
    927 	/* Timeout */
    928 	DPRINTF(("ohci_waitintr: timeout\n"));
    929 	reqh->status = USBD_TIMEOUT;
    930 	ohci_ii_done(sc, reqh);
    931 	/* XXX should free TD */
    932 }
    933 
    934 void
    935 ohci_poll(bus)
    936 	struct usbd_bus *bus;
    937 {
    938 	ohci_softc_t *sc = (ohci_softc_t *)bus;
    939 
    940 	if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs)
    941 		ohci_intr(sc);
    942 }
    943 
    944 usbd_status
    945 ohci_device_request(reqh)
    946 	usbd_request_handle reqh;
    947 {
    948 	struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
    949 	usb_device_request_t *req = &reqh->request;
    950 	usbd_device_handle dev = opipe->pipe.device;
    951 	ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
    952 	int addr = dev->address;
    953 	ohci_soft_td_t *setup, *xfer = 0, *stat, *next, *tail;
    954 	ohci_soft_ed_t *sed;
    955 	usb_dma_t *dmap;
    956 	int isread;
    957 	int len;
    958 	usbd_status r;
    959 	int s;
    960 
    961 	isread = req->bmRequestType & UT_READ;
    962 	len = UGETW(req->wLength);
    963 
    964 	DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, "
    965 		    "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
    966 		    req->bmRequestType, req->bRequest, UGETW(req->wValue),
    967 		    UGETW(req->wIndex), len, addr,
    968 		    opipe->pipe.endpoint->edesc->bEndpointAddress));
    969 
    970 	setup = opipe->tail;
    971 	stat = ohci_alloc_std(sc);
    972 	if (!stat) {
    973 		r = USBD_NOMEM;
    974 		goto bad1;
    975 	}
    976 	tail = ohci_alloc_std(sc);
    977 	if (!tail) {
    978 		r = USBD_NOMEM;
    979 		goto bad2;
    980 	}
    981 	tail->reqh = 0;
    982 
    983 	sed = opipe->sed;
    984 	dmap = &opipe->u.ctl.datadma;
    985 	opipe->u.ctl.length = len;
    986 
    987 	/* Update device address and length since they may have changed. */
    988 	/* XXX This only needs to be done once, but it's too early in open. */
    989 	sed->ed->ed_flags = LE(
    990 	 (LE(sed->ed->ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) |
    991 	 OHCI_ED_SET_FA(addr) |
    992 	 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize)));
    993 
    994 	/* Set up data transaction */
    995 	if (len != 0) {
    996 		xfer = ohci_alloc_std(sc);
    997 		if (!xfer) {
    998 			r = USBD_NOMEM;
    999 			goto bad3;
   1000 		}
   1001 		r = usb_allocmem(sc->sc_dmatag, len, 0, dmap);
   1002 		if (r != USBD_NORMAL_COMPLETION)
   1003 			goto bad4;
   1004 		xfer->td->td_flags = LE(
   1005 			(isread ? OHCI_TD_IN : OHCI_TD_OUT) | OHCI_TD_NOCC |
   1006 			OHCI_TD_TOGGLE_1 | OHCI_TD_NOINTR);
   1007 		xfer->td->td_cbp = LE(DMAADDR(dmap));
   1008 		xfer->nexttd = stat;
   1009 		xfer->td->td_nexttd = LE(stat->physaddr);
   1010 		xfer->td->td_be = LE(LE(xfer->td->td_cbp) + len - 1);
   1011 		xfer->len = len;
   1012 		xfer->reqh = reqh;
   1013 
   1014 		next = xfer;
   1015 	} else
   1016 		next = stat;
   1017 
   1018 	memcpy(KERNADDR(&opipe->u.ctl.reqdma), req, sizeof *req);
   1019 	if (!isread && len != 0)
   1020 		memcpy(KERNADDR(dmap), reqh->buffer, len);
   1021 
   1022 	setup->td->td_flags = LE(OHCI_TD_SETUP | OHCI_TD_NOCC |
   1023 				 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR);
   1024 	setup->td->td_cbp = LE(DMAADDR(&opipe->u.ctl.reqdma));
   1025 	setup->nexttd = next;
   1026 	setup->td->td_nexttd = LE(next->physaddr);
   1027 	setup->td->td_be = LE(LE(setup->td->td_cbp) + sizeof *req - 1);
   1028 	setup->len = 0;		/* XXX The number of byte we count */
   1029 	setup->reqh = reqh;
   1030 
   1031 	stat->td->td_flags = LE(
   1032 		(isread ? OHCI_TD_OUT : OHCI_TD_IN) | OHCI_TD_NOCC |
   1033 		OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1));
   1034 	stat->td->td_cbp = 0;
   1035 	stat->nexttd = tail;
   1036 	stat->td->td_nexttd = LE(tail->physaddr);
   1037 	stat->td->td_be = 0;
   1038 	stat->len = 0;
   1039 	stat->reqh = reqh;
   1040 
   1041 	reqh->actlen = 0;
   1042 	reqh->hcpriv = stat;
   1043 
   1044 #if USB_DEBUG
   1045 	if (ohcidebug > 5) {
   1046 		printf("ohci_device_request:\n");
   1047 		ohci_dump_ed(sed);
   1048 		ohci_dump_tds(setup);
   1049 	}
   1050 #endif
   1051 
   1052 	/* Insert ED in schedule */
   1053 	s = splusb();
   1054 	ohci_hash_add_td(sc, setup);
   1055 	if (len != 0)
   1056 		ohci_hash_add_td(sc, xfer);
   1057 	ohci_hash_add_td(sc, stat);
   1058 	sed->ed->ed_tailp = LE(tail->physaddr);
   1059 	opipe->tail = tail;
   1060 	OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
   1061 	if (reqh->timeout && !sc->sc_bus.use_polling) {
   1062                 usb_timeout(ohci_timeout, reqh,
   1063 			    MS_TO_TICKS(reqh->timeout), reqh->timo_handle);
   1064 	}
   1065 	splx(s);
   1066 
   1067 #if USB_DEBUG
   1068 	if (ohcidebug > 5) {
   1069 		delay(5000);
   1070 		printf("ohci_device_request: status=%x\n",
   1071 		       OREAD4(sc, OHCI_COMMAND_STATUS));
   1072 		ohci_dump_ed(sed);
   1073 		ohci_dump_tds(setup);
   1074 	}
   1075 #endif
   1076 
   1077 	return (USBD_NORMAL_COMPLETION);
   1078 
   1079  bad4:
   1080 	ohci_free_std(sc, xfer);
   1081  bad3:
   1082 	ohci_free_std(sc, tail);
   1083  bad2:
   1084 	ohci_free_std(sc, stat);
   1085  bad1:
   1086 	return (r);
   1087 }
   1088 
   1089 /*
   1090  * Add an ED to the schedule.  Called at splusb().
   1091  */
   1092 void
   1093 ohci_add_ed(sed, head)
   1094 	ohci_soft_ed_t *sed;
   1095 	ohci_soft_ed_t *head;
   1096 {
   1097 	sed->next = head->next;
   1098 	sed->ed->ed_nexted = head->ed->ed_nexted;
   1099 	head->next = sed;
   1100 	head->ed->ed_nexted = LE(sed->physaddr);
   1101 }
   1102 
   1103 /*
   1104  * Remove an ED from the schedule.  Called at splusb().
   1105  */
   1106 void
   1107 ohci_rem_ed(sed, head)
   1108 	ohci_soft_ed_t *sed;
   1109 	ohci_soft_ed_t *head;
   1110 {
   1111 	ohci_soft_ed_t *p;
   1112 
   1113 	/* XXX */
   1114 	for (p = head; p && p->next != sed; p = p->next)
   1115 		;
   1116 	if (!p)
   1117 		panic("ohci_rem_ed: ED not found\n");
   1118 	p->next = sed->next;
   1119 	p->ed->ed_nexted = sed->ed->ed_nexted;
   1120 }
   1121 
   1122 /*
   1123  * When a transfer is completed the TD is added to the done queue by
   1124  * the host controller.  This queue is the processed by software.
   1125  * Unfortunately the queue contains the physical address of the TD
   1126  * and we have no simple way to translate this back to a kernel address.
   1127  * To make the translation possible (and fast) we use a hash table of
   1128  * TDs currently in the schedule.  The physical address is used as the
   1129  * hash value.
   1130  */
   1131 
   1132 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE)
   1133 /* Called at splusb() */
   1134 void
   1135 ohci_hash_add_td(sc, std)
   1136 	ohci_softc_t *sc;
   1137 	ohci_soft_td_t *std;
   1138 {
   1139 	int h = HASH(std->physaddr);
   1140 
   1141 	LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext);
   1142 }
   1143 
   1144 /* Called at splusb() */
   1145 void
   1146 ohci_hash_rem_td(sc, std)
   1147 	ohci_softc_t *sc;
   1148 	ohci_soft_td_t *std;
   1149 {
   1150 	LIST_REMOVE(std, hnext);
   1151 }
   1152 
   1153 ohci_soft_td_t *
   1154 ohci_hash_find_td(sc, a)
   1155 	ohci_softc_t *sc;
   1156 	ohci_physaddr_t a;
   1157 {
   1158 	int h = HASH(a);
   1159 	ohci_soft_td_t *std;
   1160 
   1161 	for (std = LIST_FIRST(&sc->sc_hash_tds[h]);
   1162 	     std != 0;
   1163 	     std = LIST_NEXT(std, hnext))
   1164 		if (std->physaddr == a)
   1165 			return (std);
   1166 	panic("ohci_hash_find_td: addr 0x%08lx not found\n", (u_long)a);
   1167 }
   1168 
   1169 void
   1170 ohci_timeout(addr)
   1171 	void *addr;
   1172 {
   1173 #if 0
   1174 	usbd_request_handle *reqh = addr;
   1175 	int s;
   1176 
   1177 	DPRINTF(("ohci_timeout: reqh=%p\n", reqh));
   1178 	s = splusb();
   1179 	/* XXX need to inactivate TD before calling interrupt routine */
   1180 	ohci_XXX_done(reqh);
   1181 	splx(s);
   1182 #endif
   1183 }
   1184 
   1185 #ifdef USB_DEBUG
   1186 void
   1187 ohci_dump_tds(std)
   1188 	ohci_soft_td_t *std;
   1189 {
   1190 	for (; std; std = std->nexttd)
   1191 		ohci_dump_td(std);
   1192 }
   1193 
   1194 void
   1195 ohci_dump_td(std)
   1196 	ohci_soft_td_t *std;
   1197 {
   1198 	printf("TD(%p) at %08lx: %b delay=%d ec=%d cc=%d\ncbp=0x%08lx "
   1199 	       "nexttd=0x%08lx be=0x%08lx\n",
   1200 	       std, (u_long)std->physaddr,
   1201 	       (u_long)LE(std->td->td_flags),
   1202 	       "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE",
   1203 	       OHCI_TD_GET_DI(LE(std->td->td_flags)),
   1204 	       OHCI_TD_GET_EC(LE(std->td->td_flags)),
   1205 	       OHCI_TD_GET_CC(LE(std->td->td_flags)),
   1206 	       (u_long)LE(std->td->td_cbp),
   1207 	       (u_long)LE(std->td->td_nexttd), (u_long)LE(std->td->td_be));
   1208 }
   1209 
   1210 void
   1211 ohci_dump_ed(sed)
   1212 	ohci_soft_ed_t *sed;
   1213 {
   1214 	printf("ED(%p) at %08lx: addr=%d endpt=%d maxp=%d %b\ntailp=0x%08lx "
   1215 	       "headp=%b nexted=0x%08lx\n",
   1216 	       sed, (u_long)sed->physaddr,
   1217 	       OHCI_ED_GET_FA(LE(sed->ed->ed_flags)),
   1218 	       OHCI_ED_GET_EN(LE(sed->ed->ed_flags)),
   1219 	       OHCI_ED_GET_MAXP(LE(sed->ed->ed_flags)),
   1220 	       (u_long)LE(sed->ed->ed_flags),
   1221 	       "\20\14OUT\15IN\16LOWSPEED\17SKIP\18ISO",
   1222 	       (u_long)LE(sed->ed->ed_tailp),
   1223 	       (u_long)LE(sed->ed->ed_headp), "\20\1HALT\2CARRY",
   1224 	       (u_long)LE(sed->ed->ed_nexted));
   1225 }
   1226 #endif
   1227 
   1228 usbd_status
   1229 ohci_open(pipe)
   1230 	usbd_pipe_handle pipe;
   1231 {
   1232 	usbd_device_handle dev = pipe->device;
   1233 	ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
   1234 	usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
   1235 	struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
   1236 	u_int8_t addr = dev->address;
   1237 	ohci_soft_ed_t *sed;
   1238 	ohci_soft_td_t *std;
   1239 	usbd_status r;
   1240 	int s;
   1241 
   1242 	DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
   1243 		     pipe, addr, ed->bEndpointAddress, sc->sc_addr));
   1244 	if (addr == sc->sc_addr) {
   1245 		switch (ed->bEndpointAddress) {
   1246 		case USB_CONTROL_ENDPOINT:
   1247 			pipe->methods = &ohci_root_ctrl_methods;
   1248 			break;
   1249 		case UE_IN | OHCI_INTR_ENDPT:
   1250 			pipe->methods = &ohci_root_intr_methods;
   1251 			break;
   1252 		default:
   1253 			return (USBD_INVAL);
   1254 		}
   1255 	} else {
   1256 		sed = ohci_alloc_sed(sc);
   1257 		if (sed == 0)
   1258 			goto bad0;
   1259 	        std = ohci_alloc_std(sc);
   1260 		if (std == 0)
   1261 			goto bad1;
   1262 		opipe->sed = sed;
   1263 		opipe->tail = std;
   1264 		sed->ed->ed_flags = LE(
   1265 			OHCI_ED_SET_FA(addr) |
   1266 			OHCI_ED_SET_EN(ed->bEndpointAddress) |
   1267 			OHCI_ED_DIR_TD |
   1268 			(dev->lowspeed ? OHCI_ED_SPEED : 0) |
   1269 			((ed->bmAttributes & UE_XFERTYPE) == UE_ISOCHRONOUS ?
   1270 			 OHCI_ED_FORMAT_ISO : OHCI_ED_FORMAT_GEN) |
   1271 			OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize)));
   1272 		sed->ed->ed_headp = sed->ed->ed_tailp = LE(std->physaddr);
   1273 
   1274 		switch (ed->bmAttributes & UE_XFERTYPE) {
   1275 		case UE_CONTROL:
   1276 			pipe->methods = &ohci_device_ctrl_methods;
   1277 			r = usb_allocmem(sc->sc_dmatag,
   1278 					 sizeof(usb_device_request_t),
   1279 					 0, &opipe->u.ctl.reqdma);
   1280 			if (r != USBD_NORMAL_COMPLETION)
   1281 				goto bad;
   1282 			s = splusb();
   1283 			ohci_add_ed(sed, sc->sc_ctrl_head);
   1284 			splx(s);
   1285 			break;
   1286 		case UE_INTERRUPT:
   1287 			pipe->methods = &ohci_device_intr_methods;
   1288 			return (ohci_device_setintr(sc, opipe, ed->bInterval));
   1289 		case UE_ISOCHRONOUS:
   1290 			printf("ohci_open: open iso unimplemented\n");
   1291 			return (USBD_XXX);
   1292 		case UE_BULK:
   1293 			pipe->methods = &ohci_device_bulk_methods;
   1294 			s = splusb();
   1295 			ohci_add_ed(sed, sc->sc_bulk_head);
   1296 			splx(s);
   1297 			break;
   1298 		}
   1299 	}
   1300 	return (USBD_NORMAL_COMPLETION);
   1301 
   1302  bad:
   1303 	ohci_free_std(sc, std);
   1304  bad1:
   1305 	ohci_free_sed(sc, sed);
   1306  bad0:
   1307 	return (USBD_NOMEM);
   1308 
   1309 }
   1310 
   1311 /*
   1312  * Data structures and routines to emulate the root hub.
   1313  */
   1314 usb_device_descriptor_t ohci_devd = {
   1315 	USB_DEVICE_DESCRIPTOR_SIZE,
   1316 	UDESC_DEVICE,		/* type */
   1317 	{0x00, 0x01},		/* USB version */
   1318 	UCLASS_HUB,		/* class */
   1319 	USUBCLASS_HUB,		/* subclass */
   1320 	0,			/* protocol */
   1321 	64,			/* max packet */
   1322 	{0},{0},{0x00,0x01},	/* device id */
   1323 	1,2,0,			/* string indicies */
   1324 	1			/* # of configurations */
   1325 };
   1326 
   1327 usb_config_descriptor_t ohci_confd = {
   1328 	USB_CONFIG_DESCRIPTOR_SIZE,
   1329 	UDESC_CONFIG,
   1330 	{USB_CONFIG_DESCRIPTOR_SIZE +
   1331 	 USB_INTERFACE_DESCRIPTOR_SIZE +
   1332 	 USB_ENDPOINT_DESCRIPTOR_SIZE},
   1333 	1,
   1334 	1,
   1335 	0,
   1336 	UC_SELF_POWERED,
   1337 	0			/* max power */
   1338 };
   1339 
   1340 usb_interface_descriptor_t ohci_ifcd = {
   1341 	USB_INTERFACE_DESCRIPTOR_SIZE,
   1342 	UDESC_INTERFACE,
   1343 	0,
   1344 	0,
   1345 	1,
   1346 	UCLASS_HUB,
   1347 	USUBCLASS_HUB,
   1348 	0,
   1349 	0
   1350 };
   1351 
   1352 usb_endpoint_descriptor_t ohci_endpd = {
   1353 	USB_ENDPOINT_DESCRIPTOR_SIZE,
   1354 	UDESC_ENDPOINT,
   1355 	UE_IN | OHCI_INTR_ENDPT,
   1356 	UE_INTERRUPT,
   1357 	{8, 0},			/* max packet */
   1358 	255
   1359 };
   1360 
   1361 usb_hub_descriptor_t ohci_hubd = {
   1362 	USB_HUB_DESCRIPTOR_SIZE,
   1363 	UDESC_HUB,
   1364 	0,
   1365 	{0,0},
   1366 	0,
   1367 	0,
   1368 	{0},
   1369 };
   1370 
   1371 int
   1372 ohci_str(p, l, s)
   1373 	usb_string_descriptor_t *p;
   1374 	int l;
   1375 	char *s;
   1376 {
   1377 	int i;
   1378 
   1379 	if (l == 0)
   1380 		return (0);
   1381 	p->bLength = 2 * strlen(s) + 2;
   1382 	if (l == 1)
   1383 		return (1);
   1384 	p->bDescriptorType = UDESC_STRING;
   1385 	l -= 2;
   1386 	for (i = 0; s[i] && l > 1; i++, l -= 2)
   1387 		USETW2(p->bString[i], 0, s[i]);
   1388 	return (2*i+2);
   1389 }
   1390 
   1391 /*
   1392  * Simulate a hardware hub by handling all the necessary requests.
   1393  */
   1394 usbd_status
   1395 ohci_root_ctrl_transfer(reqh)
   1396 	usbd_request_handle reqh;
   1397 {
   1398 	ohci_softc_t *sc = (ohci_softc_t *)reqh->pipe->device->bus;
   1399 	usb_device_request_t *req;
   1400 	void *buf;
   1401 	int port, i;
   1402 	int len, value, index, l, totlen = 0;
   1403 	usb_port_status_t ps;
   1404 	usb_hub_descriptor_t hubd;
   1405 	usbd_status r;
   1406 	u_int32_t v;
   1407 
   1408 	if (!reqh->isreq)
   1409 		/* XXX panic */
   1410 		return (USBD_INVAL);
   1411 	req = &reqh->request;
   1412 	buf = reqh->buffer;
   1413 
   1414 	DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n",
   1415 		    req->bmRequestType, req->bRequest));
   1416 
   1417 	len = UGETW(req->wLength);
   1418 	value = UGETW(req->wValue);
   1419 	index = UGETW(req->wIndex);
   1420 #define C(x,y) ((x) | ((y) << 8))
   1421 	switch(C(req->bRequest, req->bmRequestType)) {
   1422 	case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
   1423 	case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
   1424 	case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
   1425 		/*
   1426 		 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
   1427 		 * for the integrated root hub.
   1428 		 */
   1429 		break;
   1430 	case C(UR_GET_CONFIG, UT_READ_DEVICE):
   1431 		if (len > 0) {
   1432 			*(u_int8_t *)buf = sc->sc_conf;
   1433 			totlen = 1;
   1434 		}
   1435 		break;
   1436 	case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
   1437 		DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value));
   1438 		switch(value >> 8) {
   1439 		case UDESC_DEVICE:
   1440 			if ((value & 0xff) != 0) {
   1441 				r = USBD_IOERROR;
   1442 				goto ret;
   1443 			}
   1444 			totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
   1445 			memcpy(buf, &ohci_devd, l);
   1446 			break;
   1447 		case UDESC_CONFIG:
   1448 			if ((value & 0xff) != 0) {
   1449 				r = USBD_IOERROR;
   1450 				goto ret;
   1451 			}
   1452 			totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
   1453 			memcpy(buf, &ohci_confd, l);
   1454 			buf = (char *)buf + l;
   1455 			len -= l;
   1456 			l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
   1457 			totlen += l;
   1458 			memcpy(buf, &ohci_ifcd, l);
   1459 			buf = (char *)buf + l;
   1460 			len -= l;
   1461 			l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
   1462 			totlen += l;
   1463 			memcpy(buf, &ohci_endpd, l);
   1464 			break;
   1465 		case UDESC_STRING:
   1466 			if (len == 0)
   1467 				break;
   1468 			*(u_int8_t *)buf = 0;
   1469 			totlen = 1;
   1470 			switch (value & 0xff) {
   1471 			case 1: /* Vendor */
   1472 				totlen = ohci_str(buf, len, sc->sc_vendor);
   1473 				break;
   1474 			case 2: /* Product */
   1475 				totlen = ohci_str(buf, len, "OHCI root hub");
   1476 				break;
   1477 			}
   1478 			break;
   1479 		default:
   1480 			r = USBD_IOERROR;
   1481 			goto ret;
   1482 		}
   1483 		break;
   1484 	case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
   1485 		if (len > 0) {
   1486 			*(u_int8_t *)buf = 0;
   1487 			totlen = 1;
   1488 		}
   1489 		break;
   1490 	case C(UR_GET_STATUS, UT_READ_DEVICE):
   1491 		if (len > 1) {
   1492 			USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
   1493 			totlen = 2;
   1494 		}
   1495 		break;
   1496 	case C(UR_GET_STATUS, UT_READ_INTERFACE):
   1497 	case C(UR_GET_STATUS, UT_READ_ENDPOINT):
   1498 		if (len > 1) {
   1499 			USETW(((usb_status_t *)buf)->wStatus, 0);
   1500 			totlen = 2;
   1501 		}
   1502 		break;
   1503 	case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
   1504 		if (value >= USB_MAX_DEVICES) {
   1505 			r = USBD_IOERROR;
   1506 			goto ret;
   1507 		}
   1508 		sc->sc_addr = value;
   1509 		break;
   1510 	case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
   1511 		if (value != 0 && value != 1) {
   1512 			r = USBD_IOERROR;
   1513 			goto ret;
   1514 		}
   1515 		sc->sc_conf = value;
   1516 		break;
   1517 	case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
   1518 		break;
   1519 	case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
   1520 	case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
   1521 	case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
   1522 		r = USBD_IOERROR;
   1523 		goto ret;
   1524 	case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
   1525 		break;
   1526 	case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
   1527 		break;
   1528 	/* Hub requests */
   1529 	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
   1530 		break;
   1531 	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
   1532 		DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
   1533 			     "port=%d feature=%d\n",
   1534 			     index, value));
   1535 		if (index < 1 || index > sc->sc_noport) {
   1536 			r = USBD_IOERROR;
   1537 			goto ret;
   1538 		}
   1539 		port = OHCI_RH_PORT_STATUS(index);
   1540 		switch(value) {
   1541 		case UHF_PORT_ENABLE:
   1542 			OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS);
   1543 			break;
   1544 		case UHF_PORT_SUSPEND:
   1545 			OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR);
   1546 			break;
   1547 		case UHF_PORT_POWER:
   1548 			OWRITE4(sc, port, UPS_LOW_SPEED);
   1549 			break;
   1550 		case UHF_C_PORT_CONNECTION:
   1551 			OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16);
   1552 			break;
   1553 		case UHF_C_PORT_ENABLE:
   1554 			OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16);
   1555 			break;
   1556 		case UHF_C_PORT_SUSPEND:
   1557 			OWRITE4(sc, port, UPS_C_SUSPEND << 16);
   1558 			break;
   1559 		case UHF_C_PORT_OVER_CURRENT:
   1560 			OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16);
   1561 			break;
   1562 		case UHF_C_PORT_RESET:
   1563 			OWRITE4(sc, port, UPS_C_PORT_RESET << 16);
   1564 			break;
   1565 		default:
   1566 			r = USBD_IOERROR;
   1567 			goto ret;
   1568 		}
   1569 		switch(value) {
   1570 		case UHF_C_PORT_CONNECTION:
   1571 		case UHF_C_PORT_ENABLE:
   1572 		case UHF_C_PORT_SUSPEND:
   1573 		case UHF_C_PORT_OVER_CURRENT:
   1574 		case UHF_C_PORT_RESET:
   1575 			/* Enable RHSC interrupt if condition is cleared. */
   1576 			if ((OREAD4(sc, port) >> 16) == 0)
   1577 				ohci_rhsc_able(sc, 1);
   1578 			break;
   1579 		default:
   1580 			break;
   1581 		}
   1582 		break;
   1583 	case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
   1584 		if (value != 0) {
   1585 			r = USBD_IOERROR;
   1586 			goto ret;
   1587 		}
   1588 		v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
   1589 		hubd = ohci_hubd;
   1590 		hubd.bNbrPorts = sc->sc_noport;
   1591 		USETW(hubd.wHubCharacteristics,
   1592 		      (v & OHCI_NPS ? UHD_PWR_NO_SWITCH :
   1593 		       v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL)
   1594 		      /* XXX overcurrent */
   1595 		      );
   1596 		hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v);
   1597 		v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
   1598 		for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
   1599 			hubd.DeviceRemovable[i++] = (u_int8_t)v;
   1600 		hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
   1601 		l = min(len, hubd.bDescLength);
   1602 		totlen = l;
   1603 		memcpy(buf, &hubd, l);
   1604 		break;
   1605 	case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
   1606 		if (len != 4) {
   1607 			r = USBD_IOERROR;
   1608 			goto ret;
   1609 		}
   1610 		memset(buf, 0, len); /* ? XXX */
   1611 		totlen = len;
   1612 		break;
   1613 	case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
   1614 		DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n",
   1615 			    index));
   1616 		if (index < 1 || index > sc->sc_noport) {
   1617 			r = USBD_IOERROR;
   1618 			goto ret;
   1619 		}
   1620 		if (len != 4) {
   1621 			r = USBD_IOERROR;
   1622 			goto ret;
   1623 		}
   1624 		v = OREAD4(sc, OHCI_RH_PORT_STATUS(index));
   1625 		DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n",
   1626 			    v));
   1627 		USETW(ps.wPortStatus, v);
   1628 		USETW(ps.wPortChange, v >> 16);
   1629 		l = min(len, sizeof ps);
   1630 		memcpy(buf, &ps, l);
   1631 		totlen = l;
   1632 		break;
   1633 	case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
   1634 		r = USBD_IOERROR;
   1635 		goto ret;
   1636 	case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
   1637 		break;
   1638 	case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
   1639 		if (index < 1 || index > sc->sc_noport) {
   1640 			r = USBD_IOERROR;
   1641 			goto ret;
   1642 		}
   1643 		port = OHCI_RH_PORT_STATUS(index);
   1644 		switch(value) {
   1645 		case UHF_PORT_ENABLE:
   1646 			OWRITE4(sc, port, UPS_PORT_ENABLED);
   1647 			break;
   1648 		case UHF_PORT_SUSPEND:
   1649 			OWRITE4(sc, port, UPS_SUSPEND);
   1650 			break;
   1651 		case UHF_PORT_RESET:
   1652 			DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n",
   1653 				    index));
   1654 			OWRITE4(sc, port, UPS_RESET);
   1655 			for (i = 0; i < 10; i++) {
   1656 				usbd_delay_ms(&sc->sc_bus, 10);
   1657 				if ((OREAD4(sc, port) & UPS_RESET) == 0)
   1658 					break;
   1659 			}
   1660 			DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n",
   1661 				    index, OREAD4(sc, port)));
   1662 			break;
   1663 		case UHF_PORT_POWER:
   1664 			DPRINTFN(2,("ohci_root_ctrl_transfer: set port power "
   1665 				    "%d\n", index));
   1666 			OWRITE4(sc, port, UPS_PORT_POWER);
   1667 			break;
   1668 		default:
   1669 			r = USBD_IOERROR;
   1670 			goto ret;
   1671 		}
   1672 		break;
   1673 	default:
   1674 		r = USBD_IOERROR;
   1675 		goto ret;
   1676 	}
   1677 	reqh->actlen = totlen;
   1678 	r = USBD_NORMAL_COMPLETION;
   1679  ret:
   1680 	reqh->status = r;
   1681 	reqh->xfercb(reqh);
   1682 	return (USBD_IN_PROGRESS);
   1683 }
   1684 
   1685 /* Abort a root control request. */
   1686 void
   1687 ohci_root_ctrl_abort(reqh)
   1688 	usbd_request_handle reqh;
   1689 {
   1690 	/* Nothing to do, all transfers are synchronous. */
   1691 }
   1692 
   1693 /* Close the root pipe. */
   1694 void
   1695 ohci_root_ctrl_close(pipe)
   1696 	usbd_pipe_handle pipe;
   1697 {
   1698 	DPRINTF(("ohci_root_ctrl_close\n"));
   1699 }
   1700 
   1701 usbd_status
   1702 ohci_root_intr_transfer(reqh)
   1703 	usbd_request_handle reqh;
   1704 {
   1705 	usbd_pipe_handle pipe = reqh->pipe;
   1706 	ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
   1707 	struct ohci_pipe *upipe = (struct ohci_pipe *)pipe;
   1708 	usb_dma_t *dmap;
   1709 	usbd_status r;
   1710 	int len;
   1711 
   1712 	len = reqh->length;
   1713 	dmap = &upipe->u.intr.datadma;
   1714 	if (len == 0)
   1715 		return (USBD_INVAL); /* XXX should it be? */
   1716 
   1717 	r = usb_allocmem(sc->sc_dmatag, len, 0, dmap);
   1718 	if (r != USBD_NORMAL_COMPLETION)
   1719 		return (r);
   1720 	sc->sc_intrreqh = reqh;
   1721 
   1722 	return (USBD_IN_PROGRESS);
   1723 }
   1724 
   1725 /* Abort a root interrupt request. */
   1726 void
   1727 ohci_root_intr_abort(reqh)
   1728 	usbd_request_handle reqh;
   1729 {
   1730 	/* No need to abort. */
   1731 }
   1732 
   1733 /* Close the root pipe. */
   1734 void
   1735 ohci_root_intr_close(pipe)
   1736 	usbd_pipe_handle pipe;
   1737 {
   1738 	ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
   1739 	sc->sc_intrreqh = 0;
   1740 
   1741 	DPRINTF(("ohci_root_intr_close\n"));
   1742 }
   1743 
   1744 /************************/
   1745 
   1746 usbd_status
   1747 ohci_device_ctrl_transfer(reqh)
   1748 	usbd_request_handle reqh;
   1749 {
   1750 	ohci_softc_t *sc = (ohci_softc_t *)reqh->pipe->device->bus;
   1751 	usbd_status r;
   1752 
   1753 	if (!reqh->isreq) {
   1754 		/* XXX panic */
   1755 		printf("ohci_device_ctrl_transfer: not a request\n");
   1756 		return (USBD_INVAL);
   1757 	}
   1758 
   1759 	r = ohci_device_request(reqh);
   1760 	if (r != USBD_NORMAL_COMPLETION)
   1761 		return (r);
   1762 
   1763 	if (sc->sc_bus.use_polling)
   1764 		ohci_waitintr(sc, reqh);
   1765 	return (USBD_IN_PROGRESS);
   1766 }
   1767 
   1768 /* Abort a device control request. */
   1769 void
   1770 ohci_device_ctrl_abort(reqh)
   1771 	usbd_request_handle reqh;
   1772 {
   1773 	/* XXX inactivate */
   1774 	usbd_delay_ms(reqh->pipe->device->bus, 1); /* make sure it is donw */
   1775 	/* XXX call done */
   1776 }
   1777 
   1778 /* Close a device control pipe. */
   1779 void
   1780 ohci_device_ctrl_close(pipe)
   1781 	usbd_pipe_handle pipe;
   1782 {
   1783 	struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
   1784 	ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
   1785 	ohci_soft_ed_t *sed = opipe->sed;
   1786 	int s;
   1787 
   1788 	s = splusb();
   1789 	sed->ed->ed_flags |= LE(OHCI_ED_SKIP);
   1790 	if ((LE(sed->ed->ed_tailp) & OHCI_TAILMASK) != LE(sed->ed->ed_headp))
   1791 		usbd_delay_ms(&sc->sc_bus, 2);
   1792 	ohci_rem_ed(sed, sc->sc_ctrl_head);
   1793 	splx(s);
   1794 	ohci_free_std(sc, opipe->tail);
   1795 	ohci_free_sed(sc, opipe->sed);
   1796 	/* XXX free other resources */
   1797 }
   1798 
   1799 /************************/
   1800 
   1801 usbd_status
   1802 ohci_device_bulk_transfer(reqh)
   1803 	usbd_request_handle reqh;
   1804 {
   1805 	struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
   1806 	usbd_device_handle dev = opipe->pipe.device;
   1807 	ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
   1808 	int addr = dev->address;
   1809 	ohci_soft_td_t *xfer, *tail;
   1810 	ohci_soft_ed_t *sed;
   1811 	usb_dma_t *dmap;
   1812 	usbd_status r;
   1813 	int s, len, isread;
   1814 
   1815 	if (reqh->isreq) {
   1816 		/* XXX panic */
   1817 		printf("ohci_device_bulk_transfer: a request\n");
   1818 		return (USBD_INVAL);
   1819 	}
   1820 
   1821 	len = reqh->length;
   1822 	dmap = &opipe->u.bulk.datadma;
   1823 	isread = reqh->pipe->endpoint->edesc->bEndpointAddress & UE_IN;
   1824 	sed = opipe->sed;
   1825 
   1826 	opipe->u.bulk.length = len;
   1827 
   1828 	r = usb_allocmem(sc->sc_dmatag, len, 0, dmap);
   1829 	if (r != USBD_NORMAL_COMPLETION)
   1830 		goto ret1;
   1831 
   1832 	tail = ohci_alloc_std(sc);
   1833 	if (!tail) {
   1834 		r = USBD_NOMEM;
   1835 		goto ret2;
   1836 	}
   1837 	tail->reqh = 0;
   1838 
   1839 	/* Update device address */
   1840 	sed->ed->ed_flags = LE(
   1841 		(LE(sed->ed->ed_flags) & ~OHCI_ED_ADDRMASK) |
   1842 		OHCI_ED_SET_FA(addr));
   1843 
   1844 	/* Set up data transaction */
   1845 	xfer = opipe->tail;
   1846 	xfer->td->td_flags = LE(
   1847 		(isread ? OHCI_TD_IN : OHCI_TD_OUT) | OHCI_TD_NOCC |
   1848 		OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
   1849 	xfer->td->td_cbp = LE(DMAADDR(dmap));
   1850 	xfer->nexttd = tail;
   1851 	xfer->td->td_nexttd = LE(tail->physaddr);
   1852 	xfer->td->td_be = LE(LE(xfer->td->td_cbp) + len - 1);
   1853 	xfer->len = len;
   1854 	xfer->reqh = reqh;
   1855 
   1856 	reqh->actlen = 0;
   1857 	reqh->hcpriv = xfer;
   1858 
   1859 	if (!isread)
   1860 		memcpy(KERNADDR(dmap), reqh->buffer, len);
   1861 
   1862 	/* Insert ED in schedule */
   1863 	s = splusb();
   1864 	ohci_hash_add_td(sc, xfer);
   1865 	sed->ed->ed_tailp = LE(tail->physaddr);
   1866 	opipe->tail = tail;
   1867 	OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
   1868 	if (reqh->timeout && !sc->sc_bus.use_polling) {
   1869                 usb_timeout(ohci_timeout, reqh,
   1870 			    MS_TO_TICKS(reqh->timeout), reqh->timo_handle);
   1871 	}
   1872 	splx(s);
   1873 
   1874 	return (USBD_IN_PROGRESS);
   1875 
   1876  ret2:
   1877 	usb_freemem(sc->sc_dmatag, dmap);
   1878  ret1:
   1879 	return (r);
   1880 }
   1881 
   1882 /* Abort a device bulk request. */
   1883 void
   1884 ohci_device_bulk_abort(reqh)
   1885 	usbd_request_handle reqh;
   1886 {
   1887 #if 0
   1888 	sed->ed->ed_flags |= LE(OHCI_ED_SKIP);
   1889 	if ((LE(sed->ed->ed_tailp) & OHCI_TAILMASK) != LE(sed->ed->ed_headp))
   1890 		usbd_delay_ms(reqh->pipe->device->bus, 2);
   1891 #endif
   1892 	/* XXX inactivate */
   1893 	usbd_delay_ms(reqh->pipe->device->bus, 1); /* make sure it is done */
   1894 	/* XXX call done */
   1895 }
   1896 
   1897 /* Close a device bulk pipe. */
   1898 void
   1899 ohci_device_bulk_close(pipe)
   1900 	usbd_pipe_handle pipe;
   1901 {
   1902 	struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
   1903 	usbd_device_handle dev = opipe->pipe.device;
   1904 	ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
   1905 	int s;
   1906 
   1907 	s = splusb();
   1908 	ohci_rem_ed(opipe->sed, sc->sc_bulk_head);
   1909 	splx(s);
   1910 	ohci_free_std(sc, opipe->tail);
   1911 	ohci_free_sed(sc, opipe->sed);
   1912 	/* XXX free other resources */
   1913 }
   1914 
   1915 /************************/
   1916 
   1917 usbd_status
   1918 ohci_device_intr_transfer(reqh)
   1919 	usbd_request_handle reqh;
   1920 {
   1921 	struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
   1922 	usbd_device_handle dev = opipe->pipe.device;
   1923 	ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
   1924 	ohci_soft_ed_t *sed = opipe->sed;
   1925 	ohci_soft_td_t *xfer, *tail;
   1926 	usb_dma_t *dmap;
   1927 	usbd_status r;
   1928 	int len;
   1929 	int s;
   1930 
   1931 	DPRINTFN(3, ("ohci_device_intr_transfer: reqh=%p buf=%p len=%d "
   1932 		     "flags=%d priv=%p\n",
   1933 		 reqh, reqh->buffer, reqh->length, reqh->flags, reqh->priv));
   1934 
   1935 	if (reqh->isreq)
   1936 		panic("ohci_device_intr_transfer: a request\n");
   1937 
   1938 	len = reqh->length;
   1939 	dmap = &opipe->u.intr.datadma;
   1940 	if (len == 0)
   1941 		return (USBD_INVAL); /* XXX should it be? */
   1942 
   1943 	xfer = opipe->tail;
   1944 	tail = ohci_alloc_std(sc);
   1945 	if (!tail) {
   1946 		r = USBD_NOMEM;
   1947 		goto ret1;
   1948 	}
   1949 	tail->reqh = 0;
   1950 
   1951 	r = usb_allocmem(sc->sc_dmatag, len, 0, dmap);
   1952 	if (r != USBD_NORMAL_COMPLETION)
   1953 		goto ret2;
   1954 
   1955 	xfer->td->td_flags = LE(
   1956 		OHCI_TD_IN | OHCI_TD_NOCC |
   1957 		OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
   1958 	xfer->td->td_cbp = LE(DMAADDR(dmap));
   1959 	xfer->nexttd = tail;
   1960 	xfer->td->td_nexttd = LE(tail->physaddr);
   1961 	xfer->td->td_be = LE(LE(xfer->td->td_cbp) + len - 1);
   1962 	xfer->len = len;
   1963 	xfer->reqh = reqh;
   1964 
   1965 	reqh->actlen = 0;
   1966 	reqh->hcpriv = xfer;
   1967 
   1968 #if USB_DEBUG
   1969 	if (ohcidebug > 5) {
   1970 		printf("ohci_device_intr_transfer:\n");
   1971 		ohci_dump_ed(sed);
   1972 		ohci_dump_tds(xfer);
   1973 	}
   1974 #endif
   1975 
   1976 	/* Insert ED in schedule */
   1977 	s = splusb();
   1978 	ohci_hash_add_td(sc, xfer);
   1979 	sed->ed->ed_tailp = LE(tail->physaddr);
   1980 	opipe->tail = tail;
   1981 #if 0
   1982 	if (reqh->timeout && !sc->sc_bus.use_polling) {
   1983                 usb_timeout(ohci_timeout, reqh,
   1984 			    MS_TO_TICKS(reqh->timeout), reqh->timo_handle);
   1985 	}
   1986 #endif
   1987 	sed->ed->ed_flags &= LE(~OHCI_ED_SKIP);
   1988 	splx(s);
   1989 
   1990 #ifdef USB_DEBUG
   1991 	if (ohcidebug > 5) {
   1992 		delay(5000);
   1993 		printf("ohci_device_intr_transfer: status=%x\n",
   1994 		       OREAD4(sc, OHCI_COMMAND_STATUS));
   1995 		ohci_dump_ed(sed);
   1996 		ohci_dump_tds(xfer);
   1997 	}
   1998 #endif
   1999 
   2000 	return (USBD_IN_PROGRESS);
   2001 
   2002  ret2:
   2003 	ohci_free_std(sc, xfer);
   2004  ret1:
   2005 	return (r);
   2006 }
   2007 
   2008 /* Abort a device control request. */
   2009 void
   2010 ohci_device_intr_abort(reqh)
   2011 	usbd_request_handle reqh;
   2012 {
   2013 	/* XXX inactivate */
   2014 	usbd_delay_ms(reqh->pipe->device->bus, 1); /* make sure it is done */
   2015 	if (reqh->pipe->intrreqh == reqh) {
   2016 		DPRINTF(("ohci_device_intr_abort: remove\n"));
   2017 		reqh->pipe->intrreqh = 0;
   2018 		ohci_intr_done((ohci_softc_t *)reqh->pipe->device->bus, reqh);
   2019 	}
   2020 }
   2021 
   2022 /* Close a device interrupt pipe. */
   2023 void
   2024 ohci_device_intr_close(pipe)
   2025 	usbd_pipe_handle pipe;
   2026 {
   2027 	struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
   2028 	ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
   2029 	int nslots = opipe->u.intr.nslots;
   2030 	int pos = opipe->u.intr.pos;
   2031 	int j;
   2032 	ohci_soft_ed_t *p, *sed = opipe->sed;
   2033 	int s;
   2034 
   2035 	DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n",
   2036 		    pipe, nslots, pos));
   2037 	s = splusb();
   2038 	sed->ed->ed_flags |= LE(OHCI_ED_SKIP);
   2039 	if ((sed->ed->ed_tailp & LE(OHCI_TAILMASK)) != sed->ed->ed_headp)
   2040 		usbd_delay_ms(&sc->sc_bus, 2);
   2041 
   2042 	for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next)
   2043 		;
   2044 	if (!p)
   2045 		panic("ohci_device_intr_close: ED not found\n");
   2046 	p->next = sed->next;
   2047 	p->ed->ed_nexted = sed->ed->ed_nexted;
   2048 	splx(s);
   2049 
   2050 	for (j = 0; j < nslots; j++)
   2051 		--sc->sc_bws[pos * nslots + j];
   2052 
   2053 	ohci_free_std(sc, opipe->tail);
   2054 	ohci_free_sed(sc, opipe->sed);
   2055 	/* XXX free other resources */
   2056 }
   2057 
   2058 usbd_status
   2059 ohci_device_setintr(sc, opipe, ival)
   2060 	ohci_softc_t *sc;
   2061 	struct ohci_pipe *opipe;
   2062 	int ival;
   2063 {
   2064 	int i, j, s, best;
   2065 	u_int npoll, slow, shigh, nslots;
   2066 	u_int bestbw, bw;
   2067 	ohci_soft_ed_t *hsed, *sed = opipe->sed;
   2068 
   2069 	DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe));
   2070 	if (ival == 0) {
   2071 		printf("ohci_setintr: 0 interval\n");
   2072 		return (USBD_INVAL);
   2073 	}
   2074 
   2075 	npoll = OHCI_NO_INTRS;
   2076 	while (npoll > ival)
   2077 		npoll /= 2;
   2078 	DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll));
   2079 
   2080 	/*
   2081 	 * We now know which level in the tree the ED must go into.
   2082 	 * Figure out which slot has most bandwidth left over.
   2083 	 * Slots to examine:
   2084 	 * npoll
   2085 	 * 1	0
   2086 	 * 2	1 2
   2087 	 * 4	3 4 5 6
   2088 	 * 8	7 8 9 10 11 12 13 14
   2089 	 * N    (N-1) .. (N-1+N-1)
   2090 	 */
   2091 	slow = npoll-1;
   2092 	shigh = slow + npoll;
   2093 	nslots = OHCI_NO_INTRS / npoll;
   2094 	for (best = i = slow, bestbw = ~0; i < shigh; i++) {
   2095 		bw = 0;
   2096 		for (j = 0; j < nslots; j++)
   2097 			bw += sc->sc_bws[i * nslots + j];
   2098 		if (bw < bestbw) {
   2099 			best = i;
   2100 			bestbw = bw;
   2101 		}
   2102 	}
   2103 	DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n",
   2104 		     best, slow, shigh, bestbw));
   2105 
   2106 	s = splusb();
   2107 	hsed = sc->sc_eds[best];
   2108 	sed->next = hsed->next;
   2109 	sed->ed->ed_nexted = hsed->ed->ed_nexted;
   2110 	hsed->next = sed;
   2111 	hsed->ed->ed_nexted = LE(sed->physaddr);
   2112 	splx(s);
   2113 
   2114 	for (j = 0; j < nslots; j++)
   2115 		++sc->sc_bws[best * nslots + j];
   2116 	opipe->u.intr.nslots = nslots;
   2117 	opipe->u.intr.pos = best;
   2118 
   2119 	DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe));
   2120 	return (USBD_NORMAL_COMPLETION);
   2121 }
   2122 
   2123