ohci.c revision 1.160
1 /* $NetBSD: ohci.c,v 1.160 2005/05/01 00:45:55 augustss Exp $ */ 2 /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */ 3 4 /* 5 * Copyright (c) 1998, 2004, 2005 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Lennart Augustsson (lennart (at) augustsson.net) at 10 * Carlstedt Research & Technology. 11 * This code is derived from software contributed to The NetBSD Foundation 12 * by Charles M. Hannum. 13 * 14 * Redistribution and use in source and binary forms, with or without 15 * modification, are permitted provided that the following conditions 16 * are met: 17 * 1. Redistributions of source code must retain the above copyright 18 * notice, this list of conditions and the following disclaimer. 19 * 2. Redistributions in binary form must reproduce the above copyright 20 * notice, this list of conditions and the following disclaimer in the 21 * documentation and/or other materials provided with the distribution. 22 * 3. All advertising materials mentioning features or use of this software 23 * must display the following acknowledgement: 24 * This product includes software developed by the NetBSD 25 * Foundation, Inc. and its contributors. 26 * 4. Neither the name of The NetBSD Foundation nor the names of its 27 * contributors may be used to endorse or promote products derived 28 * from this software without specific prior written permission. 29 * 30 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 31 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 32 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 33 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 34 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 35 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 36 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 37 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 38 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 39 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 40 * POSSIBILITY OF SUCH DAMAGE. 41 */ 42 43 /* 44 * USB Open Host Controller driver. 45 * 46 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html 47 * USB spec: http://www.usb.org/developers/docs/usbspec.zip 48 */ 49 50 #include <sys/cdefs.h> 51 __KERNEL_RCSID(0, "$NetBSD: ohci.c,v 1.160 2005/05/01 00:45:55 augustss Exp $"); 52 53 #include <sys/param.h> 54 #include <sys/systm.h> 55 #include <sys/malloc.h> 56 #if defined(__NetBSD__) || defined(__OpenBSD__) 57 #include <sys/kernel.h> 58 #include <sys/device.h> 59 #include <sys/select.h> 60 #include <uvm/uvm_extern.h> 61 #elif defined(__FreeBSD__) 62 #include <sys/module.h> 63 #include <sys/bus.h> 64 #include <machine/bus_pio.h> 65 #include <machine/bus_memio.h> 66 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 67 #include <machine/cpu.h> 68 #endif 69 #endif 70 #include <sys/proc.h> 71 #include <sys/queue.h> 72 73 #include <machine/bus.h> 74 #include <machine/endian.h> 75 76 #include <dev/usb/usb.h> 77 #include <dev/usb/usbdi.h> 78 #include <dev/usb/usbdivar.h> 79 #include <dev/usb/usb_mem.h> 80 #include <dev/usb/usb_quirks.h> 81 82 #include <dev/usb/ohcireg.h> 83 #include <dev/usb/ohcivar.h> 84 85 #if defined(__FreeBSD__) 86 #include <machine/clock.h> 87 88 #define delay(d) DELAY(d) 89 #endif 90 91 #if defined(__OpenBSD__) 92 struct cfdriver ohci_cd = { 93 NULL, "ohci", DV_DULL 94 }; 95 #endif 96 97 #ifdef OHCI_DEBUG 98 #define DPRINTF(x) if (ohcidebug) logprintf x 99 #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x 100 int ohcidebug = 0; 101 #ifndef __NetBSD__ 102 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 103 #endif 104 #else 105 #define DPRINTF(x) 106 #define DPRINTFN(n,x) 107 #endif 108 109 /* 110 * The OHCI controller is little endian, so on big endian machines 111 * the data strored in memory needs to be swapped. 112 */ 113 #if defined(__FreeBSD__) || defined(__OpenBSD__) 114 #if BYTE_ORDER == BIG_ENDIAN 115 #define htole32(x) (bswap32(x)) 116 #define le32toh(x) (bswap32(x)) 117 #else 118 #define htole32(x) (x) 119 #define le32toh(x) (x) 120 #endif 121 #endif 122 123 struct ohci_pipe; 124 125 Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *); 126 Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *); 127 128 Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *); 129 Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *); 130 131 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *); 132 Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *); 133 134 #if 0 135 Static void ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *, 136 ohci_soft_td_t *); 137 #endif 138 Static usbd_status ohci_alloc_std_chain(struct ohci_pipe *, 139 ohci_softc_t *, int, int, usbd_xfer_handle, 140 ohci_soft_td_t *, ohci_soft_td_t **); 141 142 Static void ohci_shutdown(void *v); 143 Static void ohci_power(int, void *); 144 Static usbd_status ohci_open(usbd_pipe_handle); 145 Static void ohci_poll(struct usbd_bus *); 146 Static void ohci_softintr(void *); 147 Static void ohci_waitintr(ohci_softc_t *, usbd_xfer_handle); 148 Static void ohci_rhsc(ohci_softc_t *, usbd_xfer_handle); 149 150 Static usbd_status ohci_device_request(usbd_xfer_handle xfer); 151 Static void ohci_add_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 152 Static void ohci_rem_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 153 Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *); 154 Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *); 155 Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t); 156 Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *); 157 Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *); 158 Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t); 159 160 Static usbd_status ohci_setup_isoc(usbd_pipe_handle pipe); 161 Static void ohci_device_isoc_enter(usbd_xfer_handle); 162 163 Static usbd_status ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 164 Static void ohci_freem(struct usbd_bus *, usb_dma_t *); 165 166 Static usbd_xfer_handle ohci_allocx(struct usbd_bus *); 167 Static void ohci_freex(struct usbd_bus *, usbd_xfer_handle); 168 169 Static usbd_status ohci_root_ctrl_transfer(usbd_xfer_handle); 170 Static usbd_status ohci_root_ctrl_start(usbd_xfer_handle); 171 Static void ohci_root_ctrl_abort(usbd_xfer_handle); 172 Static void ohci_root_ctrl_close(usbd_pipe_handle); 173 Static void ohci_root_ctrl_done(usbd_xfer_handle); 174 175 Static usbd_status ohci_root_intr_transfer(usbd_xfer_handle); 176 Static usbd_status ohci_root_intr_start(usbd_xfer_handle); 177 Static void ohci_root_intr_abort(usbd_xfer_handle); 178 Static void ohci_root_intr_close(usbd_pipe_handle); 179 Static void ohci_root_intr_done(usbd_xfer_handle); 180 181 Static usbd_status ohci_device_ctrl_transfer(usbd_xfer_handle); 182 Static usbd_status ohci_device_ctrl_start(usbd_xfer_handle); 183 Static void ohci_device_ctrl_abort(usbd_xfer_handle); 184 Static void ohci_device_ctrl_close(usbd_pipe_handle); 185 Static void ohci_device_ctrl_done(usbd_xfer_handle); 186 187 Static usbd_status ohci_device_bulk_transfer(usbd_xfer_handle); 188 Static usbd_status ohci_device_bulk_start(usbd_xfer_handle); 189 Static void ohci_device_bulk_abort(usbd_xfer_handle); 190 Static void ohci_device_bulk_close(usbd_pipe_handle); 191 Static void ohci_device_bulk_done(usbd_xfer_handle); 192 193 Static usbd_status ohci_device_intr_transfer(usbd_xfer_handle); 194 Static usbd_status ohci_device_intr_start(usbd_xfer_handle); 195 Static void ohci_device_intr_abort(usbd_xfer_handle); 196 Static void ohci_device_intr_close(usbd_pipe_handle); 197 Static void ohci_device_intr_done(usbd_xfer_handle); 198 199 Static usbd_status ohci_device_isoc_transfer(usbd_xfer_handle); 200 Static usbd_status ohci_device_isoc_start(usbd_xfer_handle); 201 Static void ohci_device_isoc_abort(usbd_xfer_handle); 202 Static void ohci_device_isoc_close(usbd_pipe_handle); 203 Static void ohci_device_isoc_done(usbd_xfer_handle); 204 205 Static usbd_status ohci_device_setintr(ohci_softc_t *sc, 206 struct ohci_pipe *pipe, int ival); 207 208 Static int ohci_str(usb_string_descriptor_t *, int, const char *); 209 210 Static void ohci_timeout(void *); 211 Static void ohci_timeout_task(void *); 212 Static void ohci_rhsc_enable(void *); 213 214 Static void ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *); 215 Static void ohci_abort_xfer(usbd_xfer_handle, usbd_status); 216 217 Static void ohci_device_clear_toggle(usbd_pipe_handle pipe); 218 Static void ohci_noop(usbd_pipe_handle pipe); 219 220 #ifdef OHCI_DEBUG 221 Static void ohci_dumpregs(ohci_softc_t *); 222 Static void ohci_dump_tds(ohci_soft_td_t *); 223 Static void ohci_dump_td(ohci_soft_td_t *); 224 Static void ohci_dump_ed(ohci_soft_ed_t *); 225 Static void ohci_dump_itd(ohci_soft_itd_t *); 226 Static void ohci_dump_itds(ohci_soft_itd_t *); 227 #endif 228 229 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 230 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 231 #define OWRITE1(sc, r, x) \ 232 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 233 #define OWRITE2(sc, r, x) \ 234 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 235 #define OWRITE4(sc, r, x) \ 236 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 237 #define OREAD1(sc, r) (OBARR(sc), bus_space_read_1((sc)->iot, (sc)->ioh, (r))) 238 #define OREAD2(sc, r) (OBARR(sc), bus_space_read_2((sc)->iot, (sc)->ioh, (r))) 239 #define OREAD4(sc, r) (OBARR(sc), bus_space_read_4((sc)->iot, (sc)->ioh, (r))) 240 241 /* Reverse the bits in a value 0 .. 31 */ 242 Static u_int8_t revbits[OHCI_NO_INTRS] = 243 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 244 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 245 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 246 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 247 248 struct ohci_pipe { 249 struct usbd_pipe pipe; 250 ohci_soft_ed_t *sed; 251 union { 252 ohci_soft_td_t *td; 253 ohci_soft_itd_t *itd; 254 } tail; 255 /* Info needed for different pipe kinds. */ 256 union { 257 /* Control pipe */ 258 struct { 259 usb_dma_t reqdma; 260 u_int length; 261 ohci_soft_td_t *setup, *data, *stat; 262 } ctl; 263 /* Interrupt pipe */ 264 struct { 265 int nslots; 266 int pos; 267 } intr; 268 /* Bulk pipe */ 269 struct { 270 u_int length; 271 int isread; 272 } bulk; 273 /* Iso pipe */ 274 struct iso { 275 int next, inuse; 276 } iso; 277 } u; 278 }; 279 280 #define OHCI_INTR_ENDPT 1 281 282 Static struct usbd_bus_methods ohci_bus_methods = { 283 ohci_open, 284 ohci_softintr, 285 ohci_poll, 286 ohci_allocm, 287 ohci_freem, 288 ohci_allocx, 289 ohci_freex, 290 }; 291 292 Static struct usbd_pipe_methods ohci_root_ctrl_methods = { 293 ohci_root_ctrl_transfer, 294 ohci_root_ctrl_start, 295 ohci_root_ctrl_abort, 296 ohci_root_ctrl_close, 297 ohci_noop, 298 ohci_root_ctrl_done, 299 }; 300 301 Static struct usbd_pipe_methods ohci_root_intr_methods = { 302 ohci_root_intr_transfer, 303 ohci_root_intr_start, 304 ohci_root_intr_abort, 305 ohci_root_intr_close, 306 ohci_noop, 307 ohci_root_intr_done, 308 }; 309 310 Static struct usbd_pipe_methods ohci_device_ctrl_methods = { 311 ohci_device_ctrl_transfer, 312 ohci_device_ctrl_start, 313 ohci_device_ctrl_abort, 314 ohci_device_ctrl_close, 315 ohci_noop, 316 ohci_device_ctrl_done, 317 }; 318 319 Static struct usbd_pipe_methods ohci_device_intr_methods = { 320 ohci_device_intr_transfer, 321 ohci_device_intr_start, 322 ohci_device_intr_abort, 323 ohci_device_intr_close, 324 ohci_device_clear_toggle, 325 ohci_device_intr_done, 326 }; 327 328 Static struct usbd_pipe_methods ohci_device_bulk_methods = { 329 ohci_device_bulk_transfer, 330 ohci_device_bulk_start, 331 ohci_device_bulk_abort, 332 ohci_device_bulk_close, 333 ohci_device_clear_toggle, 334 ohci_device_bulk_done, 335 }; 336 337 Static struct usbd_pipe_methods ohci_device_isoc_methods = { 338 ohci_device_isoc_transfer, 339 ohci_device_isoc_start, 340 ohci_device_isoc_abort, 341 ohci_device_isoc_close, 342 ohci_noop, 343 ohci_device_isoc_done, 344 }; 345 346 #if defined(__NetBSD__) || defined(__OpenBSD__) 347 int 348 ohci_activate(device_ptr_t self, enum devact act) 349 { 350 struct ohci_softc *sc = (struct ohci_softc *)self; 351 int rv = 0; 352 353 switch (act) { 354 case DVACT_ACTIVATE: 355 return (EOPNOTSUPP); 356 357 case DVACT_DEACTIVATE: 358 if (sc->sc_child != NULL) 359 rv = config_deactivate(sc->sc_child); 360 sc->sc_dying = 1; 361 break; 362 } 363 return (rv); 364 } 365 366 int 367 ohci_detach(struct ohci_softc *sc, int flags) 368 { 369 int rv = 0; 370 371 if (sc->sc_child != NULL) 372 rv = config_detach(sc->sc_child, flags); 373 374 if (rv != 0) 375 return (rv); 376 377 usb_uncallout(sc->sc_tmo_rhsc, ohci_rhsc_enable, sc); 378 379 #if defined(__NetBSD__) || defined(__OpenBSD__) 380 powerhook_disestablish(sc->sc_powerhook); 381 shutdownhook_disestablish(sc->sc_shutdownhook); 382 #endif 383 384 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 385 386 /* free data structures XXX */ 387 388 return (rv); 389 } 390 #endif 391 392 ohci_soft_ed_t * 393 ohci_alloc_sed(ohci_softc_t *sc) 394 { 395 ohci_soft_ed_t *sed; 396 usbd_status err; 397 int i, offs; 398 usb_dma_t dma; 399 400 if (sc->sc_freeeds == NULL) { 401 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 402 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 403 OHCI_ED_ALIGN, &dma); 404 if (err) 405 return (0); 406 for(i = 0; i < OHCI_SED_CHUNK; i++) { 407 offs = i * OHCI_SED_SIZE; 408 sed = KERNADDR(&dma, offs); 409 sed->physaddr = DMAADDR(&dma, offs); 410 sed->next = sc->sc_freeeds; 411 sc->sc_freeeds = sed; 412 } 413 } 414 sed = sc->sc_freeeds; 415 sc->sc_freeeds = sed->next; 416 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 417 sed->next = 0; 418 return (sed); 419 } 420 421 void 422 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 423 { 424 sed->next = sc->sc_freeeds; 425 sc->sc_freeeds = sed; 426 } 427 428 ohci_soft_td_t * 429 ohci_alloc_std(ohci_softc_t *sc) 430 { 431 ohci_soft_td_t *std; 432 usbd_status err; 433 int i, offs; 434 usb_dma_t dma; 435 int s; 436 437 if (sc->sc_freetds == NULL) { 438 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 439 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 440 OHCI_TD_ALIGN, &dma); 441 if (err) 442 return (NULL); 443 s = splusb(); 444 for(i = 0; i < OHCI_STD_CHUNK; i++) { 445 offs = i * OHCI_STD_SIZE; 446 std = KERNADDR(&dma, offs); 447 std->physaddr = DMAADDR(&dma, offs); 448 std->nexttd = sc->sc_freetds; 449 sc->sc_freetds = std; 450 } 451 splx(s); 452 } 453 454 s = splusb(); 455 std = sc->sc_freetds; 456 sc->sc_freetds = std->nexttd; 457 memset(&std->td, 0, sizeof(ohci_td_t)); 458 std->nexttd = NULL; 459 std->xfer = NULL; 460 ohci_hash_add_td(sc, std); 461 splx(s); 462 463 return (std); 464 } 465 466 void 467 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std) 468 { 469 int s; 470 471 s = splusb(); 472 ohci_hash_rem_td(sc, std); 473 std->nexttd = sc->sc_freetds; 474 sc->sc_freetds = std; 475 splx(s); 476 } 477 478 usbd_status 479 ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc, 480 int alen, int rd, usbd_xfer_handle xfer, 481 ohci_soft_td_t *sp, ohci_soft_td_t **ep) 482 { 483 ohci_soft_td_t *next, *cur; 484 ohci_physaddr_t dataphys, dataphysend; 485 u_int32_t tdflags; 486 int len, curlen; 487 usb_dma_t *dma = &xfer->dmabuf; 488 u_int16_t flags = xfer->flags; 489 490 DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen)); 491 492 len = alen; 493 cur = sp; 494 dataphys = DMAADDR(dma, 0); 495 dataphysend = OHCI_PAGE(dataphys + len - 1); 496 tdflags = htole32( 497 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 498 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) | 499 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR); 500 501 for (;;) { 502 next = ohci_alloc_std(sc); 503 if (next == NULL) 504 goto nomem; 505 506 /* The OHCI hardware can handle at most one page crossing. */ 507 if (OHCI_PAGE(dataphys) == dataphysend || 508 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) { 509 /* we can handle it in this TD */ 510 curlen = len; 511 } else { 512 /* must use multiple TDs, fill as much as possible. */ 513 curlen = 2 * OHCI_PAGE_SIZE - 514 (dataphys & (OHCI_PAGE_SIZE-1)); 515 /* the length must be a multiple of the max size */ 516 curlen -= curlen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize); 517 #ifdef DIAGNOSTIC 518 if (curlen == 0) 519 panic("ohci_alloc_std: curlen == 0"); 520 #endif 521 } 522 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x " 523 "dataphysend=0x%08x len=%d curlen=%d\n", 524 dataphys, dataphysend, 525 len, curlen)); 526 len -= curlen; 527 528 cur->td.td_flags = tdflags; 529 cur->td.td_cbp = htole32(dataphys); 530 cur->nexttd = next; 531 cur->td.td_nexttd = htole32(next->physaddr); 532 cur->td.td_be = htole32(dataphys + curlen - 1); 533 cur->len = curlen; 534 cur->flags = OHCI_ADD_LEN; 535 cur->xfer = xfer; 536 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n", 537 dataphys, dataphys + curlen - 1)); 538 if (len == 0) 539 break; 540 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n")); 541 dataphys += curlen; 542 cur = next; 543 } 544 if ((flags & USBD_FORCE_SHORT_XFER) && 545 alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) { 546 /* Force a 0 length transfer at the end. */ 547 548 cur = next; 549 next = ohci_alloc_std(sc); 550 if (next == NULL) 551 goto nomem; 552 553 cur->td.td_flags = tdflags; 554 cur->td.td_cbp = 0; /* indicate 0 length packet */ 555 cur->nexttd = next; 556 cur->td.td_nexttd = htole32(next->physaddr); 557 cur->td.td_be = ~0; 558 cur->len = 0; 559 cur->flags = 0; 560 cur->xfer = xfer; 561 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n")); 562 } 563 *ep = cur; 564 565 return (USBD_NORMAL_COMPLETION); 566 567 nomem: 568 /* XXX free chain */ 569 return (USBD_NOMEM); 570 } 571 572 #if 0 573 Static void 574 ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std, 575 ohci_soft_td_t *stdend) 576 { 577 ohci_soft_td_t *p; 578 579 for (; std != stdend; std = p) { 580 p = std->nexttd; 581 ohci_free_std(sc, std); 582 } 583 } 584 #endif 585 586 ohci_soft_itd_t * 587 ohci_alloc_sitd(ohci_softc_t *sc) 588 { 589 ohci_soft_itd_t *sitd; 590 usbd_status err; 591 int i, s, offs; 592 usb_dma_t dma; 593 594 if (sc->sc_freeitds == NULL) { 595 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n")); 596 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK, 597 OHCI_ITD_ALIGN, &dma); 598 if (err) 599 return (NULL); 600 s = splusb(); 601 for(i = 0; i < OHCI_SITD_CHUNK; i++) { 602 offs = i * OHCI_SITD_SIZE; 603 sitd = KERNADDR(&dma, offs); 604 sitd->physaddr = DMAADDR(&dma, offs); 605 sitd->nextitd = sc->sc_freeitds; 606 sc->sc_freeitds = sitd; 607 } 608 splx(s); 609 } 610 611 s = splusb(); 612 sitd = sc->sc_freeitds; 613 sc->sc_freeitds = sitd->nextitd; 614 memset(&sitd->itd, 0, sizeof(ohci_itd_t)); 615 sitd->nextitd = NULL; 616 sitd->xfer = NULL; 617 ohci_hash_add_itd(sc, sitd); 618 splx(s); 619 620 #ifdef DIAGNOSTIC 621 sitd->isdone = 0; 622 #endif 623 624 return (sitd); 625 } 626 627 void 628 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 629 { 630 int s; 631 632 DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd)); 633 634 #ifdef DIAGNOSTIC 635 if (!sitd->isdone) { 636 panic("ohci_free_sitd: sitd=%p not done", sitd); 637 return; 638 } 639 /* Warn double free */ 640 sitd->isdone = 0; 641 #endif 642 643 s = splusb(); 644 ohci_hash_rem_itd(sc, sitd); 645 sitd->nextitd = sc->sc_freeitds; 646 sc->sc_freeitds = sitd; 647 splx(s); 648 } 649 650 usbd_status 651 ohci_init(ohci_softc_t *sc) 652 { 653 ohci_soft_ed_t *sed, *psed; 654 usbd_status err; 655 int i; 656 u_int32_t s, ctl, ival, hcr, fm, per, rev, desca; 657 658 DPRINTF(("ohci_init: start\n")); 659 #if defined(__OpenBSD__) 660 printf(","); 661 #else 662 printf("%s:", USBDEVNAME(sc->sc_bus.bdev)); 663 #endif 664 rev = OREAD4(sc, OHCI_REVISION); 665 printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev), 666 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 667 668 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 669 printf("%s: unsupported OHCI revision\n", 670 USBDEVNAME(sc->sc_bus.bdev)); 671 sc->sc_bus.usbrev = USBREV_UNKNOWN; 672 return (USBD_INVAL); 673 } 674 sc->sc_bus.usbrev = USBREV_1_0; 675 676 for (i = 0; i < OHCI_HASH_SIZE; i++) 677 LIST_INIT(&sc->sc_hash_tds[i]); 678 for (i = 0; i < OHCI_HASH_SIZE; i++) 679 LIST_INIT(&sc->sc_hash_itds[i]); 680 681 SIMPLEQ_INIT(&sc->sc_free_xfers); 682 683 #ifdef __NetBSD__ 684 usb_setup_reserve(sc, &sc->sc_dma_reserve, sc->sc_bus.dmatag, 685 USB_MEM_RESERVE); 686 #endif 687 688 /* XXX determine alignment by R/W */ 689 /* Allocate the HCCA area. */ 690 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 691 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 692 if (err) 693 return (err); 694 sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0); 695 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 696 697 sc->sc_eintrs = OHCI_NORMAL_INTRS; 698 699 /* Allocate dummy ED that starts the control list. */ 700 sc->sc_ctrl_head = ohci_alloc_sed(sc); 701 if (sc->sc_ctrl_head == NULL) { 702 err = USBD_NOMEM; 703 goto bad1; 704 } 705 sc->sc_ctrl_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 706 707 /* Allocate dummy ED that starts the bulk list. */ 708 sc->sc_bulk_head = ohci_alloc_sed(sc); 709 if (sc->sc_bulk_head == NULL) { 710 err = USBD_NOMEM; 711 goto bad2; 712 } 713 sc->sc_bulk_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 714 715 /* Allocate dummy ED that starts the isochronous list. */ 716 sc->sc_isoc_head = ohci_alloc_sed(sc); 717 if (sc->sc_isoc_head == NULL) { 718 err = USBD_NOMEM; 719 goto bad3; 720 } 721 sc->sc_isoc_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 722 723 /* Allocate all the dummy EDs that make up the interrupt tree. */ 724 for (i = 0; i < OHCI_NO_EDS; i++) { 725 sed = ohci_alloc_sed(sc); 726 if (sed == NULL) { 727 while (--i >= 0) 728 ohci_free_sed(sc, sc->sc_eds[i]); 729 err = USBD_NOMEM; 730 goto bad4; 731 } 732 /* All ED fields are set to 0. */ 733 sc->sc_eds[i] = sed; 734 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 735 if (i != 0) 736 psed = sc->sc_eds[(i-1) / 2]; 737 else 738 psed= sc->sc_isoc_head; 739 sed->next = psed; 740 sed->ed.ed_nexted = htole32(psed->physaddr); 741 } 742 /* 743 * Fill HCCA interrupt table. The bit reversal is to get 744 * the tree set up properly to spread the interrupts. 745 */ 746 for (i = 0; i < OHCI_NO_INTRS; i++) 747 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 748 htole32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 749 750 #ifdef OHCI_DEBUG 751 if (ohcidebug > 15) { 752 for (i = 0; i < OHCI_NO_EDS; i++) { 753 printf("ed#%d ", i); 754 ohci_dump_ed(sc->sc_eds[i]); 755 } 756 printf("iso "); 757 ohci_dump_ed(sc->sc_isoc_head); 758 } 759 #endif 760 761 /* Determine in what context we are running. */ 762 ctl = OREAD4(sc, OHCI_CONTROL); 763 if (ctl & OHCI_IR) { 764 /* SMM active, request change */ 765 DPRINTF(("ohci_init: SMM active, request owner change\n")); 766 if ((sc->sc_intre & (OHCI_OC | OHCI_MIE)) == 767 (OHCI_OC | OHCI_MIE)) 768 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_MIE); 769 s = OREAD4(sc, OHCI_COMMAND_STATUS); 770 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 771 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 772 usb_delay_ms(&sc->sc_bus, 1); 773 ctl = OREAD4(sc, OHCI_CONTROL); 774 } 775 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_MIE); 776 if ((ctl & OHCI_IR) == 0) { 777 printf("%s: SMM does not respond, resetting\n", 778 USBDEVNAME(sc->sc_bus.bdev)); 779 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 780 goto reset; 781 } 782 #if 0 783 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */ 784 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 785 /* BIOS started controller. */ 786 DPRINTF(("ohci_init: BIOS active\n")); 787 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 788 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL); 789 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 790 } 791 #endif 792 } else { 793 DPRINTF(("ohci_init: cold started\n")); 794 reset: 795 /* Controller was cold started. */ 796 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 797 } 798 799 /* 800 * This reset should not be necessary according to the OHCI spec, but 801 * without it some controllers do not start. 802 */ 803 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 804 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 805 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 806 807 /* We now own the host controller and the bus has been reset. */ 808 ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL)); 809 810 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 811 /* Nominal time for a reset is 10 us. */ 812 for (i = 0; i < 10; i++) { 813 delay(10); 814 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 815 if (!hcr) 816 break; 817 } 818 if (hcr) { 819 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 820 err = USBD_IOERROR; 821 goto bad5; 822 } 823 #ifdef OHCI_DEBUG 824 if (ohcidebug > 15) 825 ohci_dumpregs(sc); 826 #endif 827 828 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 829 830 /* Set up HC registers. */ 831 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 832 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 833 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 834 /* disable all interrupts and then switch on all desired interrupts */ 835 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 836 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 837 /* switch on desired functional features */ 838 ctl = OREAD4(sc, OHCI_CONTROL); 839 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 840 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 841 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL; 842 /* And finally start it! */ 843 OWRITE4(sc, OHCI_CONTROL, ctl); 844 845 /* 846 * The controller is now OPERATIONAL. Set a some final 847 * registers that should be set earlier, but that the 848 * controller ignores when in the SUSPEND state. 849 */ 850 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 851 fm |= OHCI_FSMPS(ival) | ival; 852 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 853 per = OHCI_PERIODIC(ival); /* 90% periodic */ 854 OWRITE4(sc, OHCI_PERIODIC_START, per); 855 856 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */ 857 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 858 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP); 859 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 860 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY); 861 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca); 862 863 /* 864 * The AMD756 requires a delay before re-reading the register, 865 * otherwise it will occasionally report 0 ports. 866 */ 867 sc->sc_noport = 0; 868 for (i = 0; i < 10 && sc->sc_noport == 0; i++) { 869 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY); 870 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 871 } 872 873 #ifdef OHCI_DEBUG 874 if (ohcidebug > 5) 875 ohci_dumpregs(sc); 876 #endif 877 878 /* Set up the bus struct. */ 879 sc->sc_bus.methods = &ohci_bus_methods; 880 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 881 882 #if defined(__NetBSD__) || defined(__OpenBSD__) 883 sc->sc_control = sc->sc_intre = 0; 884 sc->sc_powerhook = powerhook_establish(ohci_power, sc); 885 sc->sc_shutdownhook = shutdownhook_establish(ohci_shutdown, sc); 886 #endif 887 888 usb_callout_init(sc->sc_tmo_rhsc); 889 890 return (USBD_NORMAL_COMPLETION); 891 892 bad5: 893 for (i = 0; i < OHCI_NO_EDS; i++) 894 ohci_free_sed(sc, sc->sc_eds[i]); 895 bad4: 896 ohci_free_sed(sc, sc->sc_isoc_head); 897 bad3: 898 ohci_free_sed(sc, sc->sc_bulk_head); 899 bad2: 900 ohci_free_sed(sc, sc->sc_ctrl_head); 901 bad1: 902 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 903 return (err); 904 } 905 906 usbd_status 907 ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 908 { 909 #if defined(__NetBSD__) || defined(__OpenBSD__) 910 struct ohci_softc *sc = (struct ohci_softc *)bus; 911 #endif 912 usbd_status status; 913 914 status = usb_allocmem(&sc->sc_bus, size, 0, dma); 915 #ifdef __NetBSD__ 916 if (status == USBD_NOMEM) 917 status = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size); 918 #endif 919 return status; 920 } 921 922 void 923 ohci_freem(struct usbd_bus *bus, usb_dma_t *dma) 924 { 925 #if defined(__NetBSD__) || defined(__OpenBSD__) 926 struct ohci_softc *sc = (struct ohci_softc *)bus; 927 #endif 928 #ifdef __NetBSD__ 929 if (dma->block->flags & USB_DMA_RESERVE) { 930 usb_reserve_freem(&((struct ohci_softc *)bus)->sc_dma_reserve, 931 dma); 932 return; 933 } 934 #endif 935 usb_freemem(&sc->sc_bus, dma); 936 } 937 938 usbd_xfer_handle 939 ohci_allocx(struct usbd_bus *bus) 940 { 941 struct ohci_softc *sc = (struct ohci_softc *)bus; 942 usbd_xfer_handle xfer; 943 944 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 945 if (xfer != NULL) { 946 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 947 #ifdef DIAGNOSTIC 948 if (xfer->busy_free != XFER_FREE) { 949 printf("ohci_allocx: xfer=%p not free, 0x%08x\n", xfer, 950 xfer->busy_free); 951 } 952 #endif 953 } else { 954 xfer = malloc(sizeof(struct ohci_xfer), M_USB, M_NOWAIT); 955 } 956 if (xfer != NULL) { 957 memset(xfer, 0, sizeof (struct ohci_xfer)); 958 #ifdef DIAGNOSTIC 959 xfer->busy_free = XFER_BUSY; 960 #endif 961 } 962 return (xfer); 963 } 964 965 void 966 ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 967 { 968 struct ohci_softc *sc = (struct ohci_softc *)bus; 969 970 #ifdef DIAGNOSTIC 971 if (xfer->busy_free != XFER_BUSY) { 972 printf("ohci_freex: xfer=%p not busy, 0x%08x\n", xfer, 973 xfer->busy_free); 974 return; 975 } 976 xfer->busy_free = XFER_FREE; 977 #endif 978 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 979 } 980 981 /* 982 * Shut down the controller when the system is going down. 983 */ 984 void 985 ohci_shutdown(void *v) 986 { 987 ohci_softc_t *sc = v; 988 989 DPRINTF(("ohci_shutdown: stopping the HC\n")); 990 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 991 } 992 993 /* 994 * Handle suspend/resume. 995 * 996 * We need to switch to polling mode here, because this routine is 997 * called from an intterupt context. This is all right since we 998 * are almost suspended anyway. 999 */ 1000 void 1001 ohci_power(int why, void *v) 1002 { 1003 ohci_softc_t *sc = v; 1004 u_int32_t ctl; 1005 int s; 1006 1007 #ifdef OHCI_DEBUG 1008 DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why)); 1009 ohci_dumpregs(sc); 1010 #endif 1011 1012 s = splhardusb(); 1013 switch (why) { 1014 case PWR_SUSPEND: 1015 case PWR_STANDBY: 1016 sc->sc_bus.use_polling++; 1017 ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK; 1018 if (sc->sc_control == 0) { 1019 /* 1020 * Preserve register values, in case that APM BIOS 1021 * does not recover them. 1022 */ 1023 sc->sc_control = ctl; 1024 sc->sc_intre = OREAD4(sc, OHCI_INTERRUPT_ENABLE); 1025 } 1026 ctl |= OHCI_HCFS_SUSPEND; 1027 OWRITE4(sc, OHCI_CONTROL, ctl); 1028 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1029 sc->sc_bus.use_polling--; 1030 break; 1031 case PWR_RESUME: 1032 sc->sc_bus.use_polling++; 1033 /* Some broken BIOSes do not recover these values */ 1034 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 1035 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 1036 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 1037 if (sc->sc_intre) 1038 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, 1039 sc->sc_intre & (OHCI_ALL_INTRS | OHCI_MIE)); 1040 if (sc->sc_control) 1041 ctl = sc->sc_control; 1042 else 1043 ctl = OREAD4(sc, OHCI_CONTROL); 1044 ctl |= OHCI_HCFS_RESUME; 1045 OWRITE4(sc, OHCI_CONTROL, ctl); 1046 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 1047 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL; 1048 OWRITE4(sc, OHCI_CONTROL, ctl); 1049 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 1050 sc->sc_control = sc->sc_intre = 0; 1051 sc->sc_bus.use_polling--; 1052 break; 1053 case PWR_SOFTSUSPEND: 1054 case PWR_SOFTSTANDBY: 1055 case PWR_SOFTRESUME: 1056 break; 1057 } 1058 splx(s); 1059 } 1060 1061 #ifdef OHCI_DEBUG 1062 void 1063 ohci_dumpregs(ohci_softc_t *sc) 1064 { 1065 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 1066 OREAD4(sc, OHCI_REVISION), 1067 OREAD4(sc, OHCI_CONTROL), 1068 OREAD4(sc, OHCI_COMMAND_STATUS))); 1069 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 1070 OREAD4(sc, OHCI_INTERRUPT_STATUS), 1071 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 1072 OREAD4(sc, OHCI_INTERRUPT_DISABLE))); 1073 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 1074 OREAD4(sc, OHCI_HCCA), 1075 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 1076 OREAD4(sc, OHCI_CONTROL_HEAD_ED))); 1077 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 1078 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 1079 OREAD4(sc, OHCI_BULK_HEAD_ED), 1080 OREAD4(sc, OHCI_BULK_CURRENT_ED))); 1081 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 1082 OREAD4(sc, OHCI_DONE_HEAD), 1083 OREAD4(sc, OHCI_FM_INTERVAL), 1084 OREAD4(sc, OHCI_FM_REMAINING))); 1085 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 1086 OREAD4(sc, OHCI_FM_NUMBER), 1087 OREAD4(sc, OHCI_PERIODIC_START), 1088 OREAD4(sc, OHCI_LS_THRESHOLD))); 1089 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n", 1090 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 1091 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 1092 OREAD4(sc, OHCI_RH_STATUS))); 1093 DPRINTF((" port1=0x%08x port2=0x%08x\n", 1094 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 1095 OREAD4(sc, OHCI_RH_PORT_STATUS(2)))); 1096 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n", 1097 le32toh(sc->sc_hcca->hcca_frame_number), 1098 le32toh(sc->sc_hcca->hcca_done_head))); 1099 } 1100 #endif 1101 1102 Static int ohci_intr1(ohci_softc_t *); 1103 1104 int 1105 ohci_intr(void *p) 1106 { 1107 ohci_softc_t *sc = p; 1108 1109 if (sc == NULL || sc->sc_dying) 1110 return (0); 1111 1112 /* If we get an interrupt while polling, then just ignore it. */ 1113 if (sc->sc_bus.use_polling) { 1114 #ifdef DIAGNOSTIC 1115 DPRINTFN(16, ("ohci_intr: ignored interrupt while polling\n")); 1116 #endif 1117 /* for level triggered intrs, should do something to ack */ 1118 OWRITE4(sc, OHCI_INTERRUPT_STATUS, 1119 OREAD4(sc, OHCI_INTERRUPT_STATUS)); 1120 1121 return (0); 1122 } 1123 1124 return (ohci_intr1(sc)); 1125 } 1126 1127 Static int 1128 ohci_intr1(ohci_softc_t *sc) 1129 { 1130 u_int32_t intrs, eintrs; 1131 1132 DPRINTFN(14,("ohci_intr1: enter\n")); 1133 1134 /* In case the interrupt occurs before initialization has completed. */ 1135 if (sc == NULL || sc->sc_hcca == NULL) { 1136 #ifdef DIAGNOSTIC 1137 printf("ohci_intr: sc->sc_hcca == NULL\n"); 1138 #endif 1139 return (0); 1140 } 1141 1142 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1143 if (!intrs) 1144 return (0); 1145 1146 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs & ~(OHCI_MIE|OHCI_WDH)); /* Acknowledge */ 1147 eintrs = intrs & sc->sc_eintrs; 1148 if (!eintrs) 1149 return (0); 1150 1151 sc->sc_bus.intr_context++; 1152 sc->sc_bus.no_intrs++; 1153 DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 1154 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 1155 (u_int)eintrs)); 1156 1157 if (eintrs & OHCI_SO) { 1158 sc->sc_overrun_cnt++; 1159 if (usbd_ratecheck(&sc->sc_overrun_ntc)) { 1160 printf("%s: %u scheduling overruns\n", 1161 USBDEVNAME(sc->sc_bus.bdev), sc->sc_overrun_cnt); 1162 sc->sc_overrun_cnt = 0; 1163 } 1164 /* XXX do what */ 1165 eintrs &= ~OHCI_SO; 1166 } 1167 if (eintrs & OHCI_WDH) { 1168 /* 1169 * We block the interrupt below, and reenable it later from 1170 * ohci_softintr(). 1171 */ 1172 usb_schedsoftintr(&sc->sc_bus); 1173 } 1174 if (eintrs & OHCI_RD) { 1175 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev)); 1176 /* XXX process resume detect */ 1177 } 1178 if (eintrs & OHCI_UE) { 1179 printf("%s: unrecoverable error, controller halted\n", 1180 USBDEVNAME(sc->sc_bus.bdev)); 1181 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1182 /* XXX what else */ 1183 } 1184 if (eintrs & OHCI_RHSC) { 1185 /* 1186 * We block the interrupt below, and reenable it later from 1187 * a timeout. 1188 */ 1189 ohci_rhsc(sc, sc->sc_intrxfer); 1190 /* Do not allow RHSC interrupts > 1 per second */ 1191 usb_callout(sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc); 1192 } 1193 1194 sc->sc_bus.intr_context--; 1195 1196 if (eintrs != 0) { 1197 /* Block unprocessed interrupts. */ 1198 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs); 1199 sc->sc_eintrs &= ~eintrs; 1200 DPRINTFN(1, ("%s: blocking intrs 0x%x\n", 1201 USBDEVNAME(sc->sc_bus.bdev), eintrs)); 1202 } 1203 1204 return (1); 1205 } 1206 1207 void 1208 ohci_rhsc_enable(void *v_sc) 1209 { 1210 ohci_softc_t *sc = v_sc; 1211 int s; 1212 1213 s = splhardusb(); 1214 sc->sc_eintrs |= OHCI_RHSC; 1215 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1216 splx(s); 1217 } 1218 1219 #ifdef OHCI_DEBUG 1220 char *ohci_cc_strs[] = { 1221 "NO_ERROR", 1222 "CRC", 1223 "BIT_STUFFING", 1224 "DATA_TOGGLE_MISMATCH", 1225 "STALL", 1226 "DEVICE_NOT_RESPONDING", 1227 "PID_CHECK_FAILURE", 1228 "UNEXPECTED_PID", 1229 "DATA_OVERRUN", 1230 "DATA_UNDERRUN", 1231 "BUFFER_OVERRUN", 1232 "BUFFER_UNDERRUN", 1233 "reserved", 1234 "reserved", 1235 "NOT_ACCESSED", 1236 "NOT_ACCESSED", 1237 }; 1238 #endif 1239 1240 void 1241 ohci_softintr(void *v) 1242 { 1243 ohci_softc_t *sc = v; 1244 ohci_soft_itd_t *sitd, *sidone, *sitdnext; 1245 ohci_soft_td_t *std, *sdone, *stdnext; 1246 usbd_xfer_handle xfer; 1247 struct ohci_pipe *opipe; 1248 int len, cc, s; 1249 int i, j, actlen, iframes, uedir; 1250 ohci_physaddr_t done; 1251 1252 DPRINTFN(10,("ohci_softintr: enter\n")); 1253 1254 sc->sc_bus.intr_context++; 1255 1256 s = splhardusb(); 1257 done = le32toh(sc->sc_hcca->hcca_done_head) & ~OHCI_DONE_INTRS; 1258 sc->sc_hcca->hcca_done_head = 0; 1259 OWRITE4(sc, OHCI_INTERRUPT_STATUS, OHCI_WDH); 1260 sc->sc_eintrs |= OHCI_WDH; 1261 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_WDH); 1262 splx(s); 1263 1264 /* Reverse the done list. */ 1265 for (sdone = NULL, sidone = NULL; done != 0; ) { 1266 std = ohci_hash_find_td(sc, done); 1267 if (std != NULL) { 1268 std->dnext = sdone; 1269 done = le32toh(std->td.td_nexttd); 1270 sdone = std; 1271 DPRINTFN(10,("add TD %p\n", std)); 1272 continue; 1273 } 1274 sitd = ohci_hash_find_itd(sc, done); 1275 if (sitd != NULL) { 1276 sitd->dnext = sidone; 1277 done = le32toh(sitd->itd.itd_nextitd); 1278 sidone = sitd; 1279 DPRINTFN(5,("add ITD %p\n", sitd)); 1280 continue; 1281 } 1282 panic("ohci_softintr: addr 0x%08lx not found", (u_long)done); 1283 } 1284 1285 DPRINTFN(10,("ohci_softintr: sdone=%p sidone=%p\n", sdone, sidone)); 1286 1287 #ifdef OHCI_DEBUG 1288 if (ohcidebug > 10) { 1289 DPRINTF(("ohci_process_done: TD done:\n")); 1290 ohci_dump_tds(sdone); 1291 } 1292 #endif 1293 1294 for (std = sdone; std; std = stdnext) { 1295 xfer = std->xfer; 1296 stdnext = std->dnext; 1297 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n", 1298 std, xfer, xfer ? xfer->hcpriv : 0)); 1299 if (xfer == NULL) { 1300 /* 1301 * xfer == NULL: There seems to be no xfer associated 1302 * with this TD. It is tailp that happened to end up on 1303 * the done queue. 1304 * Shouldn't happen, but some chips are broken(?). 1305 */ 1306 continue; 1307 } 1308 if (xfer->status == USBD_CANCELLED || 1309 xfer->status == USBD_TIMEOUT) { 1310 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1311 xfer)); 1312 /* Handled by abort routine. */ 1313 continue; 1314 } 1315 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 1316 1317 len = std->len; 1318 if (std->td.td_cbp != 0) 1319 len -= le32toh(std->td.td_be) - 1320 le32toh(std->td.td_cbp) + 1; 1321 DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", len, 1322 std->flags)); 1323 if (std->flags & OHCI_ADD_LEN) 1324 xfer->actlen += len; 1325 1326 cc = OHCI_TD_GET_CC(le32toh(std->td.td_flags)); 1327 if (cc == OHCI_CC_NO_ERROR) { 1328 if (std->flags & OHCI_CALL_DONE) { 1329 xfer->status = USBD_NORMAL_COMPLETION; 1330 s = splusb(); 1331 usb_transfer_complete(xfer); 1332 splx(s); 1333 } 1334 ohci_free_std(sc, std); 1335 } else { 1336 /* 1337 * Endpoint is halted. First unlink all the TDs 1338 * belonging to the failed transfer, and then restart 1339 * the endpoint. 1340 */ 1341 ohci_soft_td_t *p, *n; 1342 opipe = (struct ohci_pipe *)xfer->pipe; 1343 1344 DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n", 1345 OHCI_TD_GET_CC(le32toh(std->td.td_flags)), 1346 ohci_cc_strs[OHCI_TD_GET_CC(le32toh(std->td.td_flags))])); 1347 1348 /* remove TDs */ 1349 for (p = std; p->xfer == xfer; p = n) { 1350 n = p->nexttd; 1351 ohci_free_std(sc, p); 1352 } 1353 1354 /* clear halt */ 1355 opipe->sed->ed.ed_headp = htole32(p->physaddr); 1356 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1357 1358 if (cc == OHCI_CC_STALL) 1359 xfer->status = USBD_STALLED; 1360 else 1361 xfer->status = USBD_IOERROR; 1362 s = splusb(); 1363 usb_transfer_complete(xfer); 1364 splx(s); 1365 } 1366 } 1367 1368 #ifdef OHCI_DEBUG 1369 if (ohcidebug > 10) { 1370 DPRINTF(("ohci_softintr: ITD done:\n")); 1371 ohci_dump_itds(sidone); 1372 } 1373 #endif 1374 1375 for (sitd = sidone; sitd != NULL; sitd = sitdnext) { 1376 xfer = sitd->xfer; 1377 sitdnext = sitd->dnext; 1378 DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n", 1379 sitd, xfer, xfer ? xfer->hcpriv : 0)); 1380 if (xfer == NULL) 1381 continue; 1382 if (xfer->status == USBD_CANCELLED || 1383 xfer->status == USBD_TIMEOUT) { 1384 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1385 xfer)); 1386 /* Handled by abort routine. */ 1387 continue; 1388 } 1389 #ifdef DIAGNOSTIC 1390 if (sitd->isdone) 1391 printf("ohci_softintr: sitd=%p is done\n", sitd); 1392 sitd->isdone = 1; 1393 #endif 1394 if (sitd->flags & OHCI_CALL_DONE) { 1395 ohci_soft_itd_t *next; 1396 1397 opipe = (struct ohci_pipe *)xfer->pipe; 1398 opipe->u.iso.inuse -= xfer->nframes; 1399 uedir = UE_GET_DIR(xfer->pipe->endpoint->edesc-> 1400 bEndpointAddress); 1401 xfer->status = USBD_NORMAL_COMPLETION; 1402 actlen = 0; 1403 for (i = 0, sitd = xfer->hcpriv;; 1404 sitd = next) { 1405 next = sitd->nextitd; 1406 if (OHCI_ITD_GET_CC(le32toh(sitd-> 1407 itd.itd_flags)) != OHCI_CC_NO_ERROR) 1408 xfer->status = USBD_IOERROR; 1409 /* For input, update frlengths with actual */ 1410 /* XXX anything necessary for output? */ 1411 if (uedir == UE_DIR_IN && 1412 xfer->status == USBD_NORMAL_COMPLETION) { 1413 iframes = OHCI_ITD_GET_FC(le32toh( 1414 sitd->itd.itd_flags)); 1415 for (j = 0; j < iframes; i++, j++) { 1416 len = le16toh(sitd-> 1417 itd.itd_offset[j]); 1418 if ((OHCI_ITD_PSW_GET_CC(len) & 1419 OHCI_CC_NOT_ACCESSED_MASK) 1420 == OHCI_CC_NOT_ACCESSED) 1421 len = 0; 1422 else 1423 len = OHCI_ITD_PSW_LENGTH(len); 1424 xfer->frlengths[i] = len; 1425 actlen += len; 1426 } 1427 } 1428 if (sitd->flags & OHCI_CALL_DONE) 1429 break; 1430 ohci_free_sitd(sc, sitd); 1431 } 1432 ohci_free_sitd(sc, sitd); 1433 if (uedir == UE_DIR_IN && 1434 xfer->status == USBD_NORMAL_COMPLETION) 1435 xfer->actlen = actlen; 1436 xfer->hcpriv = NULL; 1437 1438 s = splusb(); 1439 usb_transfer_complete(xfer); 1440 splx(s); 1441 } 1442 } 1443 1444 #ifdef USB_USE_SOFTINTR 1445 if (sc->sc_softwake) { 1446 sc->sc_softwake = 0; 1447 wakeup(&sc->sc_softwake); 1448 } 1449 #endif /* USB_USE_SOFTINTR */ 1450 1451 sc->sc_bus.intr_context--; 1452 DPRINTFN(10,("ohci_softintr: done:\n")); 1453 } 1454 1455 void 1456 ohci_device_ctrl_done(usbd_xfer_handle xfer) 1457 { 1458 DPRINTFN(10,("ohci_device_ctrl_done: xfer=%p\n", xfer)); 1459 1460 #ifdef DIAGNOSTIC 1461 if (!(xfer->rqflags & URQ_REQUEST)) { 1462 panic("ohci_device_ctrl_done: not a request"); 1463 } 1464 #endif 1465 } 1466 1467 void 1468 ohci_device_intr_done(usbd_xfer_handle xfer) 1469 { 1470 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1471 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1472 ohci_soft_ed_t *sed = opipe->sed; 1473 ohci_soft_td_t *data, *tail; 1474 1475 1476 DPRINTFN(10,("ohci_device_intr_done: xfer=%p, actlen=%d\n", 1477 xfer, xfer->actlen)); 1478 1479 if (xfer->pipe->repeat) { 1480 data = opipe->tail.td; 1481 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 1482 if (tail == NULL) { 1483 xfer->status = USBD_NOMEM; 1484 return; 1485 } 1486 tail->xfer = NULL; 1487 1488 data->td.td_flags = htole32( 1489 OHCI_TD_IN | OHCI_TD_NOCC | 1490 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 1491 if (xfer->flags & USBD_SHORT_XFER_OK) 1492 data->td.td_flags |= htole32(OHCI_TD_R); 1493 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf, 0)); 1494 data->nexttd = tail; 1495 data->td.td_nexttd = htole32(tail->physaddr); 1496 data->td.td_be = htole32(le32toh(data->td.td_cbp) + 1497 xfer->length - 1); 1498 data->len = xfer->length; 1499 data->xfer = xfer; 1500 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1501 xfer->hcpriv = data; 1502 xfer->actlen = 0; 1503 1504 sed->ed.ed_tailp = htole32(tail->physaddr); 1505 opipe->tail.td = tail; 1506 } 1507 } 1508 1509 void 1510 ohci_device_bulk_done(usbd_xfer_handle xfer) 1511 { 1512 DPRINTFN(10,("ohci_device_bulk_done: xfer=%p, actlen=%d\n", 1513 xfer, xfer->actlen)); 1514 } 1515 1516 void 1517 ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer) 1518 { 1519 usbd_pipe_handle pipe; 1520 u_char *p; 1521 int i, m; 1522 int hstatus; 1523 1524 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1525 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n", 1526 sc, xfer, hstatus)); 1527 1528 if (xfer == NULL) { 1529 /* Just ignore the change. */ 1530 return; 1531 } 1532 1533 pipe = xfer->pipe; 1534 1535 p = KERNADDR(&xfer->dmabuf, 0); 1536 m = min(sc->sc_noport, xfer->length * 8 - 1); 1537 memset(p, 0, xfer->length); 1538 for (i = 1; i <= m; i++) { 1539 /* Pick out CHANGE bits from the status reg. */ 1540 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1541 p[i/8] |= 1 << (i%8); 1542 } 1543 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 1544 xfer->actlen = xfer->length; 1545 xfer->status = USBD_NORMAL_COMPLETION; 1546 1547 usb_transfer_complete(xfer); 1548 } 1549 1550 void 1551 ohci_root_intr_done(usbd_xfer_handle xfer) 1552 { 1553 } 1554 1555 void 1556 ohci_root_ctrl_done(usbd_xfer_handle xfer) 1557 { 1558 } 1559 1560 /* 1561 * Wait here until controller claims to have an interrupt. 1562 * Then call ohci_intr and return. Use timeout to avoid waiting 1563 * too long. 1564 */ 1565 void 1566 ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer) 1567 { 1568 int timo = xfer->timeout; 1569 int usecs; 1570 u_int32_t intrs; 1571 1572 xfer->status = USBD_IN_PROGRESS; 1573 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 1574 usb_delay_ms(&sc->sc_bus, 1); 1575 if (sc->sc_dying) 1576 break; 1577 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 1578 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs)); 1579 #ifdef OHCI_DEBUG 1580 if (ohcidebug > 15) 1581 ohci_dumpregs(sc); 1582 #endif 1583 if (intrs) { 1584 ohci_intr1(sc); 1585 if (xfer->status != USBD_IN_PROGRESS) 1586 return; 1587 } 1588 } 1589 1590 /* Timeout */ 1591 DPRINTF(("ohci_waitintr: timeout\n")); 1592 xfer->status = USBD_TIMEOUT; 1593 usb_transfer_complete(xfer); 1594 /* XXX should free TD */ 1595 } 1596 1597 void 1598 ohci_poll(struct usbd_bus *bus) 1599 { 1600 ohci_softc_t *sc = (ohci_softc_t *)bus; 1601 #ifdef OHCI_DEBUG 1602 static int last; 1603 int new; 1604 new = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1605 if (new != last) { 1606 DPRINTFN(10,("ohci_poll: intrs=0x%04x\n", new)); 1607 last = new; 1608 } 1609 #endif 1610 1611 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) 1612 ohci_intr1(sc); 1613 } 1614 1615 usbd_status 1616 ohci_device_request(usbd_xfer_handle xfer) 1617 { 1618 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1619 usb_device_request_t *req = &xfer->request; 1620 usbd_device_handle dev = opipe->pipe.device; 1621 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1622 int addr = dev->address; 1623 ohci_soft_td_t *setup, *stat, *next, *tail; 1624 ohci_soft_ed_t *sed; 1625 int isread; 1626 int len; 1627 usbd_status err; 1628 int s; 1629 1630 isread = req->bmRequestType & UT_READ; 1631 len = UGETW(req->wLength); 1632 1633 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 1634 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 1635 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1636 UGETW(req->wIndex), len, addr, 1637 opipe->pipe.endpoint->edesc->bEndpointAddress)); 1638 1639 setup = opipe->tail.td; 1640 stat = ohci_alloc_std(sc); 1641 if (stat == NULL) { 1642 err = USBD_NOMEM; 1643 goto bad1; 1644 } 1645 tail = ohci_alloc_std(sc); 1646 if (tail == NULL) { 1647 err = USBD_NOMEM; 1648 goto bad2; 1649 } 1650 tail->xfer = NULL; 1651 1652 sed = opipe->sed; 1653 opipe->u.ctl.length = len; 1654 1655 /* Update device address and length since they may have changed 1656 during the setup of the control pipe in usbd_new_device(). */ 1657 /* XXX This only needs to be done once, but it's too early in open. */ 1658 /* XXXX Should not touch ED here! */ 1659 sed->ed.ed_flags = htole32( 1660 (le32toh(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) | 1661 OHCI_ED_SET_FA(addr) | 1662 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize))); 1663 1664 next = stat; 1665 1666 /* Set up data transaction */ 1667 if (len != 0) { 1668 ohci_soft_td_t *std = stat; 1669 1670 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 1671 std, &stat); 1672 stat = stat->nexttd; /* point at free TD */ 1673 if (err) 1674 goto bad3; 1675 /* Start toggle at 1 and then use the carried toggle. */ 1676 std->td.td_flags &= htole32(~OHCI_TD_TOGGLE_MASK); 1677 std->td.td_flags |= htole32(OHCI_TD_TOGGLE_1); 1678 } 1679 1680 memcpy(KERNADDR(&opipe->u.ctl.reqdma, 0), req, sizeof *req); 1681 1682 setup->td.td_flags = htole32(OHCI_TD_SETUP | OHCI_TD_NOCC | 1683 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1684 setup->td.td_cbp = htole32(DMAADDR(&opipe->u.ctl.reqdma, 0)); 1685 setup->nexttd = next; 1686 setup->td.td_nexttd = htole32(next->physaddr); 1687 setup->td.td_be = htole32(le32toh(setup->td.td_cbp) + sizeof *req - 1); 1688 setup->len = 0; 1689 setup->xfer = xfer; 1690 setup->flags = 0; 1691 xfer->hcpriv = setup; 1692 1693 stat->td.td_flags = htole32( 1694 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | 1695 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1696 stat->td.td_cbp = 0; 1697 stat->nexttd = tail; 1698 stat->td.td_nexttd = htole32(tail->physaddr); 1699 stat->td.td_be = 0; 1700 stat->flags = OHCI_CALL_DONE; 1701 stat->len = 0; 1702 stat->xfer = xfer; 1703 1704 #ifdef OHCI_DEBUG 1705 if (ohcidebug > 5) { 1706 DPRINTF(("ohci_device_request:\n")); 1707 ohci_dump_ed(sed); 1708 ohci_dump_tds(setup); 1709 } 1710 #endif 1711 1712 /* Insert ED in schedule */ 1713 s = splusb(); 1714 sed->ed.ed_tailp = htole32(tail->physaddr); 1715 opipe->tail.td = tail; 1716 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1717 if (xfer->timeout && !sc->sc_bus.use_polling) { 1718 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 1719 ohci_timeout, xfer); 1720 } 1721 splx(s); 1722 1723 #ifdef OHCI_DEBUG 1724 if (ohcidebug > 20) { 1725 delay(10000); 1726 DPRINTF(("ohci_device_request: status=%x\n", 1727 OREAD4(sc, OHCI_COMMAND_STATUS))); 1728 ohci_dumpregs(sc); 1729 printf("ctrl head:\n"); 1730 ohci_dump_ed(sc->sc_ctrl_head); 1731 printf("sed:\n"); 1732 ohci_dump_ed(sed); 1733 ohci_dump_tds(setup); 1734 } 1735 #endif 1736 1737 return (USBD_NORMAL_COMPLETION); 1738 1739 bad3: 1740 ohci_free_std(sc, tail); 1741 bad2: 1742 ohci_free_std(sc, stat); 1743 bad1: 1744 return (err); 1745 } 1746 1747 /* 1748 * Add an ED to the schedule. Called at splusb(). 1749 */ 1750 void 1751 ohci_add_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1752 { 1753 DPRINTFN(8,("ohci_add_ed: sed=%p head=%p\n", sed, head)); 1754 1755 SPLUSBCHECK; 1756 sed->next = head->next; 1757 sed->ed.ed_nexted = head->ed.ed_nexted; 1758 head->next = sed; 1759 head->ed.ed_nexted = htole32(sed->physaddr); 1760 } 1761 1762 /* 1763 * Remove an ED from the schedule. Called at splusb(). 1764 */ 1765 void 1766 ohci_rem_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1767 { 1768 ohci_soft_ed_t *p; 1769 1770 SPLUSBCHECK; 1771 1772 /* XXX */ 1773 for (p = head; p != NULL && p->next != sed; p = p->next) 1774 ; 1775 if (p == NULL) 1776 panic("ohci_rem_ed: ED not found"); 1777 p->next = sed->next; 1778 p->ed.ed_nexted = sed->ed.ed_nexted; 1779 } 1780 1781 /* 1782 * When a transfer is completed the TD is added to the done queue by 1783 * the host controller. This queue is the processed by software. 1784 * Unfortunately the queue contains the physical address of the TD 1785 * and we have no simple way to translate this back to a kernel address. 1786 * To make the translation possible (and fast) we use a hash table of 1787 * TDs currently in the schedule. The physical address is used as the 1788 * hash value. 1789 */ 1790 1791 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1792 /* Called at splusb() */ 1793 void 1794 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1795 { 1796 int h = HASH(std->physaddr); 1797 1798 SPLUSBCHECK; 1799 1800 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1801 } 1802 1803 /* Called at splusb() */ 1804 void 1805 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1806 { 1807 SPLUSBCHECK; 1808 1809 LIST_REMOVE(std, hnext); 1810 } 1811 1812 ohci_soft_td_t * 1813 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a) 1814 { 1815 int h = HASH(a); 1816 ohci_soft_td_t *std; 1817 1818 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1819 std != NULL; 1820 std = LIST_NEXT(std, hnext)) 1821 if (std->physaddr == a) 1822 return (std); 1823 return (NULL); 1824 } 1825 1826 /* Called at splusb() */ 1827 void 1828 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1829 { 1830 int h = HASH(sitd->physaddr); 1831 1832 SPLUSBCHECK; 1833 1834 DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n", 1835 sitd, (u_long)sitd->physaddr)); 1836 1837 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext); 1838 } 1839 1840 /* Called at splusb() */ 1841 void 1842 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1843 { 1844 SPLUSBCHECK; 1845 1846 DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n", 1847 sitd, (u_long)sitd->physaddr)); 1848 1849 LIST_REMOVE(sitd, hnext); 1850 } 1851 1852 ohci_soft_itd_t * 1853 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a) 1854 { 1855 int h = HASH(a); 1856 ohci_soft_itd_t *sitd; 1857 1858 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]); 1859 sitd != NULL; 1860 sitd = LIST_NEXT(sitd, hnext)) 1861 if (sitd->physaddr == a) 1862 return (sitd); 1863 return (NULL); 1864 } 1865 1866 void 1867 ohci_timeout(void *addr) 1868 { 1869 struct ohci_xfer *oxfer = addr; 1870 struct ohci_pipe *opipe = (struct ohci_pipe *)oxfer->xfer.pipe; 1871 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1872 1873 DPRINTF(("ohci_timeout: oxfer=%p\n", oxfer)); 1874 1875 if (sc->sc_dying) { 1876 ohci_abort_xfer(&oxfer->xfer, USBD_TIMEOUT); 1877 return; 1878 } 1879 1880 /* Execute the abort in a process context. */ 1881 usb_init_task(&oxfer->abort_task, ohci_timeout_task, addr); 1882 usb_add_task(oxfer->xfer.pipe->device, &oxfer->abort_task); 1883 } 1884 1885 void 1886 ohci_timeout_task(void *addr) 1887 { 1888 usbd_xfer_handle xfer = addr; 1889 int s; 1890 1891 DPRINTF(("ohci_timeout_task: xfer=%p\n", xfer)); 1892 1893 s = splusb(); 1894 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1895 splx(s); 1896 } 1897 1898 #ifdef OHCI_DEBUG 1899 void 1900 ohci_dump_tds(ohci_soft_td_t *std) 1901 { 1902 for (; std; std = std->nexttd) 1903 ohci_dump_td(std); 1904 } 1905 1906 void 1907 ohci_dump_td(ohci_soft_td_t *std) 1908 { 1909 char sbuf[128]; 1910 1911 bitmask_snprintf((u_int32_t)le32toh(std->td.td_flags), 1912 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 1913 sbuf, sizeof(sbuf)); 1914 1915 printf("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx " 1916 "nexttd=0x%08lx be=0x%08lx\n", 1917 std, (u_long)std->physaddr, sbuf, 1918 OHCI_TD_GET_DI(le32toh(std->td.td_flags)), 1919 OHCI_TD_GET_EC(le32toh(std->td.td_flags)), 1920 OHCI_TD_GET_CC(le32toh(std->td.td_flags)), 1921 (u_long)le32toh(std->td.td_cbp), 1922 (u_long)le32toh(std->td.td_nexttd), 1923 (u_long)le32toh(std->td.td_be)); 1924 } 1925 1926 void 1927 ohci_dump_itd(ohci_soft_itd_t *sitd) 1928 { 1929 int i; 1930 1931 printf("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n" 1932 "bp0=0x%08lx next=0x%08lx be=0x%08lx\n", 1933 sitd, (u_long)sitd->physaddr, 1934 OHCI_ITD_GET_SF(le32toh(sitd->itd.itd_flags)), 1935 OHCI_ITD_GET_DI(le32toh(sitd->itd.itd_flags)), 1936 OHCI_ITD_GET_FC(le32toh(sitd->itd.itd_flags)), 1937 OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags)), 1938 (u_long)le32toh(sitd->itd.itd_bp0), 1939 (u_long)le32toh(sitd->itd.itd_nextitd), 1940 (u_long)le32toh(sitd->itd.itd_be)); 1941 for (i = 0; i < OHCI_ITD_NOFFSET; i++) 1942 printf("offs[%d]=0x%04x ", i, 1943 (u_int)le16toh(sitd->itd.itd_offset[i])); 1944 printf("\n"); 1945 } 1946 1947 void 1948 ohci_dump_itds(ohci_soft_itd_t *sitd) 1949 { 1950 for (; sitd; sitd = sitd->nextitd) 1951 ohci_dump_itd(sitd); 1952 } 1953 1954 void 1955 ohci_dump_ed(ohci_soft_ed_t *sed) 1956 { 1957 char sbuf[128], sbuf2[128]; 1958 1959 bitmask_snprintf((u_int32_t)le32toh(sed->ed.ed_flags), 1960 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO", 1961 sbuf, sizeof(sbuf)); 1962 bitmask_snprintf((u_int32_t)le32toh(sed->ed.ed_headp), 1963 "\20\1HALT\2CARRY", sbuf2, sizeof(sbuf2)); 1964 1965 printf("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d flags=%s\ntailp=0x%08lx " 1966 "headflags=%s headp=0x%08lx nexted=0x%08lx\n", 1967 sed, (u_long)sed->physaddr, 1968 OHCI_ED_GET_FA(le32toh(sed->ed.ed_flags)), 1969 OHCI_ED_GET_EN(le32toh(sed->ed.ed_flags)), 1970 OHCI_ED_GET_MAXP(le32toh(sed->ed.ed_flags)), sbuf, 1971 (u_long)le32toh(sed->ed.ed_tailp), sbuf2, 1972 (u_long)le32toh(sed->ed.ed_headp), 1973 (u_long)le32toh(sed->ed.ed_nexted)); 1974 } 1975 #endif 1976 1977 usbd_status 1978 ohci_open(usbd_pipe_handle pipe) 1979 { 1980 usbd_device_handle dev = pipe->device; 1981 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1982 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1983 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1984 u_int8_t addr = dev->address; 1985 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1986 ohci_soft_ed_t *sed; 1987 ohci_soft_td_t *std; 1988 ohci_soft_itd_t *sitd; 1989 ohci_physaddr_t tdphys; 1990 u_int32_t fmt; 1991 usbd_status err; 1992 int s; 1993 int ival; 1994 1995 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1996 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1997 1998 if (sc->sc_dying) 1999 return (USBD_IOERROR); 2000 2001 std = NULL; 2002 sed = NULL; 2003 2004 if (addr == sc->sc_addr) { 2005 switch (ed->bEndpointAddress) { 2006 case USB_CONTROL_ENDPOINT: 2007 pipe->methods = &ohci_root_ctrl_methods; 2008 break; 2009 case UE_DIR_IN | OHCI_INTR_ENDPT: 2010 pipe->methods = &ohci_root_intr_methods; 2011 break; 2012 default: 2013 return (USBD_INVAL); 2014 } 2015 } else { 2016 sed = ohci_alloc_sed(sc); 2017 if (sed == NULL) 2018 goto bad0; 2019 opipe->sed = sed; 2020 if (xfertype == UE_ISOCHRONOUS) { 2021 sitd = ohci_alloc_sitd(sc); 2022 if (sitd == NULL) 2023 goto bad1; 2024 opipe->tail.itd = sitd; 2025 tdphys = sitd->physaddr; 2026 fmt = OHCI_ED_FORMAT_ISO; 2027 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 2028 fmt |= OHCI_ED_DIR_IN; 2029 else 2030 fmt |= OHCI_ED_DIR_OUT; 2031 } else { 2032 std = ohci_alloc_std(sc); 2033 if (std == NULL) 2034 goto bad1; 2035 opipe->tail.td = std; 2036 tdphys = std->physaddr; 2037 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD; 2038 } 2039 sed->ed.ed_flags = htole32( 2040 OHCI_ED_SET_FA(addr) | 2041 OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) | 2042 (dev->speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) | 2043 fmt | 2044 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 2045 sed->ed.ed_headp = sed->ed.ed_tailp = htole32(tdphys); 2046 2047 switch (xfertype) { 2048 case UE_CONTROL: 2049 pipe->methods = &ohci_device_ctrl_methods; 2050 err = usb_allocmem(&sc->sc_bus, 2051 sizeof(usb_device_request_t), 2052 0, &opipe->u.ctl.reqdma); 2053 if (err) 2054 goto bad; 2055 s = splusb(); 2056 ohci_add_ed(sed, sc->sc_ctrl_head); 2057 splx(s); 2058 break; 2059 case UE_INTERRUPT: 2060 pipe->methods = &ohci_device_intr_methods; 2061 ival = pipe->interval; 2062 if (ival == USBD_DEFAULT_INTERVAL) 2063 ival = ed->bInterval; 2064 return (ohci_device_setintr(sc, opipe, ival)); 2065 case UE_ISOCHRONOUS: 2066 pipe->methods = &ohci_device_isoc_methods; 2067 return (ohci_setup_isoc(pipe)); 2068 case UE_BULK: 2069 pipe->methods = &ohci_device_bulk_methods; 2070 s = splusb(); 2071 ohci_add_ed(sed, sc->sc_bulk_head); 2072 splx(s); 2073 break; 2074 } 2075 } 2076 return (USBD_NORMAL_COMPLETION); 2077 2078 bad: 2079 if (std != NULL) 2080 ohci_free_std(sc, std); 2081 bad1: 2082 if (sed != NULL) 2083 ohci_free_sed(sc, sed); 2084 bad0: 2085 return (USBD_NOMEM); 2086 2087 } 2088 2089 /* 2090 * Close a reqular pipe. 2091 * Assumes that there are no pending transactions. 2092 */ 2093 void 2094 ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head) 2095 { 2096 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2097 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2098 ohci_soft_ed_t *sed = opipe->sed; 2099 int s; 2100 2101 s = splusb(); 2102 #ifdef DIAGNOSTIC 2103 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 2104 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2105 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) { 2106 ohci_soft_td_t *std; 2107 std = ohci_hash_find_td(sc, le32toh(sed->ed.ed_headp)); 2108 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 2109 "tl=0x%x pipe=%p, std=%p\n", sed, 2110 (int)le32toh(sed->ed.ed_headp), 2111 (int)le32toh(sed->ed.ed_tailp), 2112 pipe, std); 2113 #ifdef USB_DEBUG 2114 usbd_dump_pipe(&opipe->pipe); 2115 #endif 2116 #ifdef OHCI_DEBUG 2117 ohci_dump_ed(sed); 2118 if (std) 2119 ohci_dump_td(std); 2120 #endif 2121 usb_delay_ms(&sc->sc_bus, 2); 2122 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2123 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) 2124 printf("ohci_close_pipe: pipe still not empty\n"); 2125 } 2126 #endif 2127 ohci_rem_ed(sed, head); 2128 /* Make sure the host controller is not touching this ED */ 2129 usb_delay_ms(&sc->sc_bus, 1); 2130 splx(s); 2131 ohci_free_sed(sc, opipe->sed); 2132 } 2133 2134 /* 2135 * Abort a device request. 2136 * If this routine is called at splusb() it guarantees that the request 2137 * will be removed from the hardware scheduling and that the callback 2138 * for it will be called with USBD_CANCELLED status. 2139 * It's impossible to guarantee that the requested transfer will not 2140 * have happened since the hardware runs concurrently. 2141 * If the transaction has already happened we rely on the ordinary 2142 * interrupt processing to process it. 2143 */ 2144 void 2145 ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2146 { 2147 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2148 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 2149 ohci_soft_ed_t *sed = opipe->sed; 2150 ohci_soft_td_t *p, *n; 2151 ohci_physaddr_t headp; 2152 int s, hit; 2153 int wake; 2154 2155 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p sed=%p\n", xfer, opipe,sed)); 2156 2157 if (sc->sc_dying) { 2158 /* If we're dying, just do the software part. */ 2159 s = splusb(); 2160 xfer->status = status; /* make software ignore it */ 2161 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 2162 usb_transfer_complete(xfer); 2163 splx(s); 2164 } 2165 2166 if (xfer->device->bus->intr_context || !curproc) 2167 panic("ohci_abort_xfer: not in process context"); 2168 2169 /* 2170 * If an abort is already in progress then just wait for it to 2171 * complete and return. 2172 */ 2173 if (xfer->hcflags & UXFER_ABORTING) { 2174 DPRINTFN(2, ("ohci_abort_xfer: already aborting\n")); 2175 #ifdef DIAGNOSTIC 2176 if (status == USBD_TIMEOUT) 2177 printf("0hci_abort_xfer: TIMEOUT while aborting\n"); 2178 #endif 2179 /* Override the status which might be USBD_TIMEOUT. */ 2180 xfer->status = status; 2181 DPRINTFN(2, ("ohci_abort_xfer: waiting for abort to finish\n")); 2182 xfer->hcflags |= UXFER_ABORTWAIT; 2183 while (xfer->hcflags & UXFER_ABORTING) 2184 tsleep(&xfer->hcflags, PZERO, "ohciaw", 0); 2185 return; 2186 } 2187 xfer->hcflags |= UXFER_ABORTING; 2188 2189 /* 2190 * Step 1: Make interrupt routine and hardware ignore xfer. 2191 */ 2192 s = splusb(); 2193 xfer->status = status; /* make software ignore it */ 2194 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 2195 splx(s); 2196 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed)); 2197 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 2198 2199 /* 2200 * Step 2: Wait until we know hardware has finished any possible 2201 * use of the xfer. Also make sure the soft interrupt routine 2202 * has run. 2203 */ 2204 usb_delay_ms(opipe->pipe.device->bus, 20); /* Hardware finishes in 1ms */ 2205 s = splusb(); 2206 #ifdef USB_USE_SOFTINTR 2207 sc->sc_softwake = 1; 2208 #endif /* USB_USE_SOFTINTR */ 2209 usb_schedsoftintr(&sc->sc_bus); 2210 #ifdef USB_USE_SOFTINTR 2211 tsleep(&sc->sc_softwake, PZERO, "ohciab", 0); 2212 #endif /* USB_USE_SOFTINTR */ 2213 splx(s); 2214 2215 /* 2216 * Step 3: Remove any vestiges of the xfer from the hardware. 2217 * The complication here is that the hardware may have executed 2218 * beyond the xfer we're trying to abort. So as we're scanning 2219 * the TDs of this xfer we check if the hardware points to 2220 * any of them. 2221 */ 2222 s = splusb(); /* XXX why? */ 2223 p = xfer->hcpriv; 2224 #ifdef DIAGNOSTIC 2225 if (p == NULL) { 2226 xfer->hcflags &= ~UXFER_ABORTING; /* XXX */ 2227 splx(s); 2228 printf("ohci_abort_xfer: hcpriv is NULL\n"); 2229 return; 2230 } 2231 #endif 2232 #ifdef OHCI_DEBUG 2233 if (ohcidebug > 1) { 2234 DPRINTF(("ohci_abort_xfer: sed=\n")); 2235 ohci_dump_ed(sed); 2236 ohci_dump_tds(p); 2237 } 2238 #endif 2239 headp = le32toh(sed->ed.ed_headp) & OHCI_HEADMASK; 2240 hit = 0; 2241 for (; p->xfer == xfer; p = n) { 2242 hit |= headp == p->physaddr; 2243 n = p->nexttd; 2244 ohci_free_std(sc, p); 2245 } 2246 /* Zap headp register if hardware pointed inside the xfer. */ 2247 if (hit) { 2248 DPRINTFN(1,("ohci_abort_xfer: set hd=0x%08x, tl=0x%08x\n", 2249 (int)p->physaddr, (int)le32toh(sed->ed.ed_tailp))); 2250 sed->ed.ed_headp = htole32(p->physaddr); /* unlink TDs */ 2251 } else { 2252 DPRINTFN(1,("ohci_abort_xfer: no hit\n")); 2253 } 2254 2255 /* 2256 * Step 4: Turn on hardware again. 2257 */ 2258 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 2259 2260 /* 2261 * Step 5: Execute callback. 2262 */ 2263 wake = xfer->hcflags & UXFER_ABORTWAIT; 2264 xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT); 2265 usb_transfer_complete(xfer); 2266 if (wake) 2267 wakeup(&xfer->hcflags); 2268 2269 splx(s); 2270 } 2271 2272 /* 2273 * Data structures and routines to emulate the root hub. 2274 */ 2275 Static usb_device_descriptor_t ohci_devd = { 2276 USB_DEVICE_DESCRIPTOR_SIZE, 2277 UDESC_DEVICE, /* type */ 2278 {0x00, 0x01}, /* USB version */ 2279 UDCLASS_HUB, /* class */ 2280 UDSUBCLASS_HUB, /* subclass */ 2281 UDPROTO_FSHUB, 2282 64, /* max packet */ 2283 {0},{0},{0x00,0x01}, /* device id */ 2284 1,2,0, /* string indicies */ 2285 1 /* # of configurations */ 2286 }; 2287 2288 Static usb_config_descriptor_t ohci_confd = { 2289 USB_CONFIG_DESCRIPTOR_SIZE, 2290 UDESC_CONFIG, 2291 {USB_CONFIG_DESCRIPTOR_SIZE + 2292 USB_INTERFACE_DESCRIPTOR_SIZE + 2293 USB_ENDPOINT_DESCRIPTOR_SIZE}, 2294 1, 2295 1, 2296 0, 2297 UC_SELF_POWERED, 2298 0 /* max power */ 2299 }; 2300 2301 Static usb_interface_descriptor_t ohci_ifcd = { 2302 USB_INTERFACE_DESCRIPTOR_SIZE, 2303 UDESC_INTERFACE, 2304 0, 2305 0, 2306 1, 2307 UICLASS_HUB, 2308 UISUBCLASS_HUB, 2309 UIPROTO_FSHUB, 2310 0 2311 }; 2312 2313 Static usb_endpoint_descriptor_t ohci_endpd = { 2314 USB_ENDPOINT_DESCRIPTOR_SIZE, 2315 UDESC_ENDPOINT, 2316 UE_DIR_IN | OHCI_INTR_ENDPT, 2317 UE_INTERRUPT, 2318 {8, 0}, /* max packet */ 2319 255 2320 }; 2321 2322 Static usb_hub_descriptor_t ohci_hubd = { 2323 USB_HUB_DESCRIPTOR_SIZE, 2324 UDESC_HUB, 2325 0, 2326 {0,0}, 2327 0, 2328 0, 2329 {0}, 2330 }; 2331 2332 Static int 2333 ohci_str(usb_string_descriptor_t *p, int l, const char *s) 2334 { 2335 int i; 2336 2337 if (l == 0) 2338 return (0); 2339 p->bLength = 2 * strlen(s) + 2; 2340 if (l == 1) 2341 return (1); 2342 p->bDescriptorType = UDESC_STRING; 2343 l -= 2; 2344 for (i = 0; s[i] && l > 1; i++, l -= 2) 2345 USETW2(p->bString[i], 0, s[i]); 2346 return (2*i+2); 2347 } 2348 2349 /* 2350 * Simulate a hardware hub by handling all the necessary requests. 2351 */ 2352 Static usbd_status 2353 ohci_root_ctrl_transfer(usbd_xfer_handle xfer) 2354 { 2355 usbd_status err; 2356 2357 /* Insert last in queue. */ 2358 err = usb_insert_transfer(xfer); 2359 if (err) 2360 return (err); 2361 2362 /* Pipe isn't running, start first */ 2363 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2364 } 2365 2366 Static usbd_status 2367 ohci_root_ctrl_start(usbd_xfer_handle xfer) 2368 { 2369 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2370 usb_device_request_t *req; 2371 void *buf = NULL; 2372 int port, i; 2373 int s, len, value, index, l, totlen = 0; 2374 usb_port_status_t ps; 2375 usb_hub_descriptor_t hubd; 2376 usbd_status err; 2377 u_int32_t v; 2378 2379 if (sc->sc_dying) 2380 return (USBD_IOERROR); 2381 2382 #ifdef DIAGNOSTIC 2383 if (!(xfer->rqflags & URQ_REQUEST)) 2384 /* XXX panic */ 2385 return (USBD_INVAL); 2386 #endif 2387 req = &xfer->request; 2388 2389 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 2390 req->bmRequestType, req->bRequest)); 2391 2392 len = UGETW(req->wLength); 2393 value = UGETW(req->wValue); 2394 index = UGETW(req->wIndex); 2395 2396 if (len != 0) 2397 buf = KERNADDR(&xfer->dmabuf, 0); 2398 2399 #define C(x,y) ((x) | ((y) << 8)) 2400 switch(C(req->bRequest, req->bmRequestType)) { 2401 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 2402 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 2403 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 2404 /* 2405 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 2406 * for the integrated root hub. 2407 */ 2408 break; 2409 case C(UR_GET_CONFIG, UT_READ_DEVICE): 2410 if (len > 0) { 2411 *(u_int8_t *)buf = sc->sc_conf; 2412 totlen = 1; 2413 } 2414 break; 2415 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2416 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 2417 switch(value >> 8) { 2418 case UDESC_DEVICE: 2419 if ((value & 0xff) != 0) { 2420 err = USBD_IOERROR; 2421 goto ret; 2422 } 2423 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 2424 USETW(ohci_devd.idVendor, sc->sc_id_vendor); 2425 memcpy(buf, &ohci_devd, l); 2426 break; 2427 case UDESC_CONFIG: 2428 if ((value & 0xff) != 0) { 2429 err = USBD_IOERROR; 2430 goto ret; 2431 } 2432 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 2433 memcpy(buf, &ohci_confd, l); 2434 buf = (char *)buf + l; 2435 len -= l; 2436 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 2437 totlen += l; 2438 memcpy(buf, &ohci_ifcd, l); 2439 buf = (char *)buf + l; 2440 len -= l; 2441 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 2442 totlen += l; 2443 memcpy(buf, &ohci_endpd, l); 2444 break; 2445 case UDESC_STRING: 2446 if (len == 0) 2447 break; 2448 *(u_int8_t *)buf = 0; 2449 totlen = 1; 2450 switch (value & 0xff) { 2451 case 0: /* Language table */ 2452 totlen = ohci_str(buf, len, "\001"); 2453 break; 2454 case 1: /* Vendor */ 2455 totlen = ohci_str(buf, len, sc->sc_vendor); 2456 break; 2457 case 2: /* Product */ 2458 totlen = ohci_str(buf, len, "OHCI root hub"); 2459 break; 2460 } 2461 break; 2462 default: 2463 err = USBD_IOERROR; 2464 goto ret; 2465 } 2466 break; 2467 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 2468 if (len > 0) { 2469 *(u_int8_t *)buf = 0; 2470 totlen = 1; 2471 } 2472 break; 2473 case C(UR_GET_STATUS, UT_READ_DEVICE): 2474 if (len > 1) { 2475 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 2476 totlen = 2; 2477 } 2478 break; 2479 case C(UR_GET_STATUS, UT_READ_INTERFACE): 2480 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 2481 if (len > 1) { 2482 USETW(((usb_status_t *)buf)->wStatus, 0); 2483 totlen = 2; 2484 } 2485 break; 2486 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 2487 if (value >= USB_MAX_DEVICES) { 2488 err = USBD_IOERROR; 2489 goto ret; 2490 } 2491 sc->sc_addr = value; 2492 break; 2493 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 2494 if (value != 0 && value != 1) { 2495 err = USBD_IOERROR; 2496 goto ret; 2497 } 2498 sc->sc_conf = value; 2499 break; 2500 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 2501 break; 2502 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 2503 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 2504 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 2505 err = USBD_IOERROR; 2506 goto ret; 2507 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 2508 break; 2509 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 2510 break; 2511 /* Hub requests */ 2512 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2513 break; 2514 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2515 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 2516 "port=%d feature=%d\n", 2517 index, value)); 2518 if (index < 1 || index > sc->sc_noport) { 2519 err = USBD_IOERROR; 2520 goto ret; 2521 } 2522 port = OHCI_RH_PORT_STATUS(index); 2523 switch(value) { 2524 case UHF_PORT_ENABLE: 2525 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2526 break; 2527 case UHF_PORT_SUSPEND: 2528 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2529 break; 2530 case UHF_PORT_POWER: 2531 /* Yes, writing to the LOW_SPEED bit clears power. */ 2532 OWRITE4(sc, port, UPS_LOW_SPEED); 2533 break; 2534 case UHF_C_PORT_CONNECTION: 2535 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2536 break; 2537 case UHF_C_PORT_ENABLE: 2538 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2539 break; 2540 case UHF_C_PORT_SUSPEND: 2541 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2542 break; 2543 case UHF_C_PORT_OVER_CURRENT: 2544 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2545 break; 2546 case UHF_C_PORT_RESET: 2547 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2548 break; 2549 default: 2550 err = USBD_IOERROR; 2551 goto ret; 2552 } 2553 switch(value) { 2554 case UHF_C_PORT_CONNECTION: 2555 case UHF_C_PORT_ENABLE: 2556 case UHF_C_PORT_SUSPEND: 2557 case UHF_C_PORT_OVER_CURRENT: 2558 case UHF_C_PORT_RESET: 2559 /* Enable RHSC interrupt if condition is cleared. */ 2560 if ((OREAD4(sc, port) >> 16) == 0) 2561 ohci_rhsc_enable(sc); 2562 break; 2563 default: 2564 break; 2565 } 2566 break; 2567 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2568 if ((value & 0xff) != 0) { 2569 err = USBD_IOERROR; 2570 goto ret; 2571 } 2572 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2573 hubd = ohci_hubd; 2574 hubd.bNbrPorts = sc->sc_noport; 2575 USETW(hubd.wHubCharacteristics, 2576 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2577 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2578 /* XXX overcurrent */ 2579 ); 2580 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2581 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2582 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2583 hubd.DeviceRemovable[i++] = (u_int8_t)v; 2584 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2585 l = min(len, hubd.bDescLength); 2586 totlen = l; 2587 memcpy(buf, &hubd, l); 2588 break; 2589 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2590 if (len != 4) { 2591 err = USBD_IOERROR; 2592 goto ret; 2593 } 2594 memset(buf, 0, len); /* ? XXX */ 2595 totlen = len; 2596 break; 2597 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2598 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 2599 index)); 2600 if (index < 1 || index > sc->sc_noport) { 2601 err = USBD_IOERROR; 2602 goto ret; 2603 } 2604 if (len != 4) { 2605 err = USBD_IOERROR; 2606 goto ret; 2607 } 2608 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2609 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 2610 v)); 2611 USETW(ps.wPortStatus, v); 2612 USETW(ps.wPortChange, v >> 16); 2613 l = min(len, sizeof ps); 2614 memcpy(buf, &ps, l); 2615 totlen = l; 2616 break; 2617 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2618 err = USBD_IOERROR; 2619 goto ret; 2620 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2621 break; 2622 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2623 if (index < 1 || index > sc->sc_noport) { 2624 err = USBD_IOERROR; 2625 goto ret; 2626 } 2627 port = OHCI_RH_PORT_STATUS(index); 2628 switch(value) { 2629 case UHF_PORT_ENABLE: 2630 OWRITE4(sc, port, UPS_PORT_ENABLED); 2631 break; 2632 case UHF_PORT_SUSPEND: 2633 OWRITE4(sc, port, UPS_SUSPEND); 2634 break; 2635 case UHF_PORT_RESET: 2636 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 2637 index)); 2638 OWRITE4(sc, port, UPS_RESET); 2639 for (i = 0; i < 5; i++) { 2640 usb_delay_ms(&sc->sc_bus, 2641 USB_PORT_ROOT_RESET_DELAY); 2642 if (sc->sc_dying) { 2643 err = USBD_IOERROR; 2644 goto ret; 2645 } 2646 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2647 break; 2648 } 2649 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 2650 index, OREAD4(sc, port))); 2651 break; 2652 case UHF_PORT_POWER: 2653 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 2654 "%d\n", index)); 2655 OWRITE4(sc, port, UPS_PORT_POWER); 2656 break; 2657 default: 2658 err = USBD_IOERROR; 2659 goto ret; 2660 } 2661 break; 2662 default: 2663 err = USBD_IOERROR; 2664 goto ret; 2665 } 2666 xfer->actlen = totlen; 2667 err = USBD_NORMAL_COMPLETION; 2668 ret: 2669 xfer->status = err; 2670 s = splusb(); 2671 usb_transfer_complete(xfer); 2672 splx(s); 2673 return (USBD_IN_PROGRESS); 2674 } 2675 2676 /* Abort a root control request. */ 2677 Static void 2678 ohci_root_ctrl_abort(usbd_xfer_handle xfer) 2679 { 2680 /* Nothing to do, all transfers are synchronous. */ 2681 } 2682 2683 /* Close the root pipe. */ 2684 Static void 2685 ohci_root_ctrl_close(usbd_pipe_handle pipe) 2686 { 2687 DPRINTF(("ohci_root_ctrl_close\n")); 2688 /* Nothing to do. */ 2689 } 2690 2691 Static usbd_status 2692 ohci_root_intr_transfer(usbd_xfer_handle xfer) 2693 { 2694 usbd_status err; 2695 2696 /* Insert last in queue. */ 2697 err = usb_insert_transfer(xfer); 2698 if (err) 2699 return (err); 2700 2701 /* Pipe isn't running, start first */ 2702 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2703 } 2704 2705 Static usbd_status 2706 ohci_root_intr_start(usbd_xfer_handle xfer) 2707 { 2708 usbd_pipe_handle pipe = xfer->pipe; 2709 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2710 2711 if (sc->sc_dying) 2712 return (USBD_IOERROR); 2713 2714 sc->sc_intrxfer = xfer; 2715 2716 return (USBD_IN_PROGRESS); 2717 } 2718 2719 /* Abort a root interrupt request. */ 2720 Static void 2721 ohci_root_intr_abort(usbd_xfer_handle xfer) 2722 { 2723 int s; 2724 2725 if (xfer->pipe->intrxfer == xfer) { 2726 DPRINTF(("ohci_root_intr_abort: remove\n")); 2727 xfer->pipe->intrxfer = NULL; 2728 } 2729 xfer->status = USBD_CANCELLED; 2730 s = splusb(); 2731 usb_transfer_complete(xfer); 2732 splx(s); 2733 } 2734 2735 /* Close the root pipe. */ 2736 Static void 2737 ohci_root_intr_close(usbd_pipe_handle pipe) 2738 { 2739 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2740 2741 DPRINTF(("ohci_root_intr_close\n")); 2742 2743 sc->sc_intrxfer = NULL; 2744 } 2745 2746 /************************/ 2747 2748 Static usbd_status 2749 ohci_device_ctrl_transfer(usbd_xfer_handle xfer) 2750 { 2751 usbd_status err; 2752 2753 /* Insert last in queue. */ 2754 err = usb_insert_transfer(xfer); 2755 if (err) 2756 return (err); 2757 2758 /* Pipe isn't running, start first */ 2759 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2760 } 2761 2762 Static usbd_status 2763 ohci_device_ctrl_start(usbd_xfer_handle xfer) 2764 { 2765 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2766 usbd_status err; 2767 2768 if (sc->sc_dying) 2769 return (USBD_IOERROR); 2770 2771 #ifdef DIAGNOSTIC 2772 if (!(xfer->rqflags & URQ_REQUEST)) { 2773 /* XXX panic */ 2774 printf("ohci_device_ctrl_transfer: not a request\n"); 2775 return (USBD_INVAL); 2776 } 2777 #endif 2778 2779 err = ohci_device_request(xfer); 2780 if (err) 2781 return (err); 2782 2783 if (sc->sc_bus.use_polling) 2784 ohci_waitintr(sc, xfer); 2785 return (USBD_IN_PROGRESS); 2786 } 2787 2788 /* Abort a device control request. */ 2789 Static void 2790 ohci_device_ctrl_abort(usbd_xfer_handle xfer) 2791 { 2792 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer)); 2793 ohci_abort_xfer(xfer, USBD_CANCELLED); 2794 } 2795 2796 /* Close a device control pipe. */ 2797 Static void 2798 ohci_device_ctrl_close(usbd_pipe_handle pipe) 2799 { 2800 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2801 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2802 2803 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe)); 2804 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2805 ohci_free_std(sc, opipe->tail.td); 2806 } 2807 2808 /************************/ 2809 2810 Static void 2811 ohci_device_clear_toggle(usbd_pipe_handle pipe) 2812 { 2813 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2814 2815 opipe->sed->ed.ed_headp &= htole32(~OHCI_TOGGLECARRY); 2816 } 2817 2818 Static void 2819 ohci_noop(usbd_pipe_handle pipe) 2820 { 2821 } 2822 2823 Static usbd_status 2824 ohci_device_bulk_transfer(usbd_xfer_handle xfer) 2825 { 2826 usbd_status err; 2827 2828 /* Insert last in queue. */ 2829 err = usb_insert_transfer(xfer); 2830 if (err) 2831 return (err); 2832 2833 /* Pipe isn't running, start first */ 2834 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2835 } 2836 2837 Static usbd_status 2838 ohci_device_bulk_start(usbd_xfer_handle xfer) 2839 { 2840 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2841 usbd_device_handle dev = opipe->pipe.device; 2842 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2843 int addr = dev->address; 2844 ohci_soft_td_t *data, *tail, *tdp; 2845 ohci_soft_ed_t *sed; 2846 int s, len, isread, endpt; 2847 usbd_status err; 2848 2849 if (sc->sc_dying) 2850 return (USBD_IOERROR); 2851 2852 #ifdef DIAGNOSTIC 2853 if (xfer->rqflags & URQ_REQUEST) { 2854 /* XXX panic */ 2855 printf("ohci_device_bulk_start: a request\n"); 2856 return (USBD_INVAL); 2857 } 2858 #endif 2859 2860 len = xfer->length; 2861 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 2862 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2863 sed = opipe->sed; 2864 2865 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d " 2866 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags, 2867 endpt)); 2868 2869 opipe->u.bulk.isread = isread; 2870 opipe->u.bulk.length = len; 2871 2872 /* Update device address */ 2873 sed->ed.ed_flags = htole32( 2874 (le32toh(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) | 2875 OHCI_ED_SET_FA(addr)); 2876 2877 /* Allocate a chain of new TDs (including a new tail). */ 2878 data = opipe->tail.td; 2879 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 2880 data, &tail); 2881 /* We want interrupt at the end of the transfer. */ 2882 tail->td.td_flags &= htole32(~OHCI_TD_INTR_MASK); 2883 tail->td.td_flags |= htole32(OHCI_TD_SET_DI(1)); 2884 tail->flags |= OHCI_CALL_DONE; 2885 tail = tail->nexttd; /* point at sentinel */ 2886 if (err) 2887 return (err); 2888 2889 tail->xfer = NULL; 2890 xfer->hcpriv = data; 2891 2892 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x " 2893 "td_cbp=0x%08x td_be=0x%08x\n", 2894 (int)le32toh(sed->ed.ed_flags), 2895 (int)le32toh(data->td.td_flags), 2896 (int)le32toh(data->td.td_cbp), 2897 (int)le32toh(data->td.td_be))); 2898 2899 #ifdef OHCI_DEBUG 2900 if (ohcidebug > 5) { 2901 ohci_dump_ed(sed); 2902 ohci_dump_tds(data); 2903 } 2904 #endif 2905 2906 /* Insert ED in schedule */ 2907 s = splusb(); 2908 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 2909 tdp->xfer = xfer; 2910 } 2911 sed->ed.ed_tailp = htole32(tail->physaddr); 2912 opipe->tail.td = tail; 2913 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 2914 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 2915 if (xfer->timeout && !sc->sc_bus.use_polling) { 2916 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2917 ohci_timeout, xfer); 2918 } 2919 2920 #if 0 2921 /* This goes wrong if we are too slow. */ 2922 if (ohcidebug > 10) { 2923 delay(10000); 2924 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2925 OREAD4(sc, OHCI_COMMAND_STATUS))); 2926 ohci_dump_ed(sed); 2927 ohci_dump_tds(data); 2928 } 2929 #endif 2930 2931 splx(s); 2932 2933 return (USBD_IN_PROGRESS); 2934 } 2935 2936 Static void 2937 ohci_device_bulk_abort(usbd_xfer_handle xfer) 2938 { 2939 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer)); 2940 ohci_abort_xfer(xfer, USBD_CANCELLED); 2941 } 2942 2943 /* 2944 * Close a device bulk pipe. 2945 */ 2946 Static void 2947 ohci_device_bulk_close(usbd_pipe_handle pipe) 2948 { 2949 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2950 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2951 2952 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe)); 2953 ohci_close_pipe(pipe, sc->sc_bulk_head); 2954 ohci_free_std(sc, opipe->tail.td); 2955 } 2956 2957 /************************/ 2958 2959 Static usbd_status 2960 ohci_device_intr_transfer(usbd_xfer_handle xfer) 2961 { 2962 usbd_status err; 2963 2964 /* Insert last in queue. */ 2965 err = usb_insert_transfer(xfer); 2966 if (err) 2967 return (err); 2968 2969 /* Pipe isn't running, start first */ 2970 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2971 } 2972 2973 Static usbd_status 2974 ohci_device_intr_start(usbd_xfer_handle xfer) 2975 { 2976 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2977 usbd_device_handle dev = opipe->pipe.device; 2978 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2979 ohci_soft_ed_t *sed = opipe->sed; 2980 ohci_soft_td_t *data, *tail; 2981 int len; 2982 int s; 2983 2984 if (sc->sc_dying) 2985 return (USBD_IOERROR); 2986 2987 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d " 2988 "flags=%d priv=%p\n", 2989 xfer, xfer->length, xfer->flags, xfer->priv)); 2990 2991 #ifdef DIAGNOSTIC 2992 if (xfer->rqflags & URQ_REQUEST) 2993 panic("ohci_device_intr_transfer: a request"); 2994 #endif 2995 2996 len = xfer->length; 2997 2998 data = opipe->tail.td; 2999 tail = ohci_alloc_std(sc); 3000 if (tail == NULL) 3001 return (USBD_NOMEM); 3002 tail->xfer = NULL; 3003 3004 data->td.td_flags = htole32( 3005 OHCI_TD_IN | OHCI_TD_NOCC | 3006 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 3007 if (xfer->flags & USBD_SHORT_XFER_OK) 3008 data->td.td_flags |= htole32(OHCI_TD_R); 3009 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf, 0)); 3010 data->nexttd = tail; 3011 data->td.td_nexttd = htole32(tail->physaddr); 3012 data->td.td_be = htole32(le32toh(data->td.td_cbp) + len - 1); 3013 data->len = len; 3014 data->xfer = xfer; 3015 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 3016 xfer->hcpriv = data; 3017 3018 #ifdef OHCI_DEBUG 3019 if (ohcidebug > 5) { 3020 DPRINTF(("ohci_device_intr_transfer:\n")); 3021 ohci_dump_ed(sed); 3022 ohci_dump_tds(data); 3023 } 3024 #endif 3025 3026 /* Insert ED in schedule */ 3027 s = splusb(); 3028 sed->ed.ed_tailp = htole32(tail->physaddr); 3029 opipe->tail.td = tail; 3030 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 3031 3032 #if 0 3033 /* 3034 * This goes horribly wrong, printing thousands of descriptors, 3035 * because false references are followed due to the fact that the 3036 * TD is gone. 3037 */ 3038 if (ohcidebug > 5) { 3039 usb_delay_ms(&sc->sc_bus, 5); 3040 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 3041 OREAD4(sc, OHCI_COMMAND_STATUS))); 3042 ohci_dump_ed(sed); 3043 ohci_dump_tds(data); 3044 } 3045 #endif 3046 splx(s); 3047 3048 return (USBD_IN_PROGRESS); 3049 } 3050 3051 /* Abort a device control request. */ 3052 Static void 3053 ohci_device_intr_abort(usbd_xfer_handle xfer) 3054 { 3055 if (xfer->pipe->intrxfer == xfer) { 3056 DPRINTF(("ohci_device_intr_abort: remove\n")); 3057 xfer->pipe->intrxfer = NULL; 3058 } 3059 ohci_abort_xfer(xfer, USBD_CANCELLED); 3060 } 3061 3062 /* Close a device interrupt pipe. */ 3063 Static void 3064 ohci_device_intr_close(usbd_pipe_handle pipe) 3065 { 3066 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3067 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3068 int nslots = opipe->u.intr.nslots; 3069 int pos = opipe->u.intr.pos; 3070 int j; 3071 ohci_soft_ed_t *p, *sed = opipe->sed; 3072 int s; 3073 3074 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 3075 pipe, nslots, pos)); 3076 s = splusb(); 3077 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 3078 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 3079 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) 3080 usb_delay_ms(&sc->sc_bus, 2); 3081 3082 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 3083 ; 3084 #ifdef DIAGNOSTIC 3085 if (p == NULL) 3086 panic("ohci_device_intr_close: ED not found"); 3087 #endif 3088 p->next = sed->next; 3089 p->ed.ed_nexted = sed->ed.ed_nexted; 3090 splx(s); 3091 3092 for (j = 0; j < nslots; j++) 3093 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 3094 3095 ohci_free_std(sc, opipe->tail.td); 3096 ohci_free_sed(sc, opipe->sed); 3097 } 3098 3099 Static usbd_status 3100 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival) 3101 { 3102 int i, j, s, best; 3103 u_int npoll, slow, shigh, nslots; 3104 u_int bestbw, bw; 3105 ohci_soft_ed_t *hsed, *sed = opipe->sed; 3106 3107 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 3108 if (ival == 0) { 3109 printf("ohci_setintr: 0 interval\n"); 3110 return (USBD_INVAL); 3111 } 3112 3113 npoll = OHCI_NO_INTRS; 3114 while (npoll > ival) 3115 npoll /= 2; 3116 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 3117 3118 /* 3119 * We now know which level in the tree the ED must go into. 3120 * Figure out which slot has most bandwidth left over. 3121 * Slots to examine: 3122 * npoll 3123 * 1 0 3124 * 2 1 2 3125 * 4 3 4 5 6 3126 * 8 7 8 9 10 11 12 13 14 3127 * N (N-1) .. (N-1+N-1) 3128 */ 3129 slow = npoll-1; 3130 shigh = slow + npoll; 3131 nslots = OHCI_NO_INTRS / npoll; 3132 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 3133 bw = 0; 3134 for (j = 0; j < nslots; j++) 3135 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 3136 if (bw < bestbw) { 3137 best = i; 3138 bestbw = bw; 3139 } 3140 } 3141 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 3142 best, slow, shigh, bestbw)); 3143 3144 s = splusb(); 3145 hsed = sc->sc_eds[best]; 3146 sed->next = hsed->next; 3147 sed->ed.ed_nexted = hsed->ed.ed_nexted; 3148 hsed->next = sed; 3149 hsed->ed.ed_nexted = htole32(sed->physaddr); 3150 splx(s); 3151 3152 for (j = 0; j < nslots; j++) 3153 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 3154 opipe->u.intr.nslots = nslots; 3155 opipe->u.intr.pos = best; 3156 3157 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 3158 return (USBD_NORMAL_COMPLETION); 3159 } 3160 3161 /***********************/ 3162 3163 usbd_status 3164 ohci_device_isoc_transfer(usbd_xfer_handle xfer) 3165 { 3166 usbd_status err; 3167 3168 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer)); 3169 3170 /* Put it on our queue, */ 3171 err = usb_insert_transfer(xfer); 3172 3173 /* bail out on error, */ 3174 if (err && err != USBD_IN_PROGRESS) 3175 return (err); 3176 3177 /* XXX should check inuse here */ 3178 3179 /* insert into schedule, */ 3180 ohci_device_isoc_enter(xfer); 3181 3182 /* and start if the pipe wasn't running */ 3183 if (!err) 3184 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 3185 3186 return (err); 3187 } 3188 3189 void 3190 ohci_device_isoc_enter(usbd_xfer_handle xfer) 3191 { 3192 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3193 usbd_device_handle dev = opipe->pipe.device; 3194 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 3195 ohci_soft_ed_t *sed = opipe->sed; 3196 struct iso *iso = &opipe->u.iso; 3197 ohci_soft_itd_t *sitd, *nsitd; 3198 ohci_physaddr_t buf, offs, noffs, bp0; 3199 int i, ncur, nframes; 3200 int s; 3201 3202 DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p " 3203 "nframes=%d\n", 3204 iso->inuse, iso->next, xfer, xfer->nframes)); 3205 3206 if (sc->sc_dying) 3207 return; 3208 3209 if (iso->next == -1) { 3210 /* Not in use yet, schedule it a few frames ahead. */ 3211 iso->next = le32toh(sc->sc_hcca->hcca_frame_number) + 5; 3212 DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n", 3213 iso->next)); 3214 } 3215 3216 sitd = opipe->tail.itd; 3217 buf = DMAADDR(&xfer->dmabuf, 0); 3218 bp0 = OHCI_PAGE(buf); 3219 offs = OHCI_PAGE_OFFSET(buf); 3220 nframes = xfer->nframes; 3221 xfer->hcpriv = sitd; 3222 for (i = ncur = 0; i < nframes; i++, ncur++) { 3223 noffs = offs + xfer->frlengths[i]; 3224 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ 3225 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */ 3226 3227 /* Allocate next ITD */ 3228 nsitd = ohci_alloc_sitd(sc); 3229 if (nsitd == NULL) { 3230 /* XXX what now? */ 3231 printf("%s: isoc TD alloc failed\n", 3232 USBDEVNAME(sc->sc_bus.bdev)); 3233 return; 3234 } 3235 3236 /* Fill current ITD */ 3237 sitd->itd.itd_flags = htole32( 3238 OHCI_ITD_NOCC | 3239 OHCI_ITD_SET_SF(iso->next) | 3240 OHCI_ITD_SET_DI(6) | /* delay intr a little */ 3241 OHCI_ITD_SET_FC(ncur)); 3242 sitd->itd.itd_bp0 = htole32(bp0); 3243 sitd->nextitd = nsitd; 3244 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 3245 sitd->itd.itd_be = htole32(bp0 + offs - 1); 3246 sitd->xfer = xfer; 3247 sitd->flags = 0; 3248 3249 sitd = nsitd; 3250 iso->next = iso->next + ncur; 3251 bp0 = OHCI_PAGE(buf + offs); 3252 ncur = 0; 3253 } 3254 sitd->itd.itd_offset[ncur] = htole16(OHCI_ITD_MK_OFFS(offs)); 3255 offs = noffs; 3256 } 3257 nsitd = ohci_alloc_sitd(sc); 3258 if (nsitd == NULL) { 3259 /* XXX what now? */ 3260 printf("%s: isoc TD alloc failed\n", 3261 USBDEVNAME(sc->sc_bus.bdev)); 3262 return; 3263 } 3264 /* Fixup last used ITD */ 3265 sitd->itd.itd_flags = htole32( 3266 OHCI_ITD_NOCC | 3267 OHCI_ITD_SET_SF(iso->next) | 3268 OHCI_ITD_SET_DI(0) | 3269 OHCI_ITD_SET_FC(ncur)); 3270 sitd->itd.itd_bp0 = htole32(bp0); 3271 sitd->nextitd = nsitd; 3272 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 3273 sitd->itd.itd_be = htole32(bp0 + offs - 1); 3274 sitd->xfer = xfer; 3275 sitd->flags = OHCI_CALL_DONE; 3276 3277 iso->next = iso->next + ncur; 3278 iso->inuse += nframes; 3279 3280 xfer->actlen = offs; /* XXX pretend we did it all */ 3281 3282 xfer->status = USBD_IN_PROGRESS; 3283 3284 #ifdef OHCI_DEBUG 3285 if (ohcidebug > 5) { 3286 DPRINTF(("ohci_device_isoc_enter: frame=%d\n", 3287 le32toh(sc->sc_hcca->hcca_frame_number))); 3288 ohci_dump_itds(xfer->hcpriv); 3289 ohci_dump_ed(sed); 3290 } 3291 #endif 3292 3293 s = splusb(); 3294 sed->ed.ed_tailp = htole32(nsitd->physaddr); 3295 opipe->tail.itd = nsitd; 3296 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 3297 splx(s); 3298 3299 #ifdef OHCI_DEBUG 3300 if (ohcidebug > 5) { 3301 delay(150000); 3302 DPRINTF(("ohci_device_isoc_enter: after frame=%d\n", 3303 le32toh(sc->sc_hcca->hcca_frame_number))); 3304 ohci_dump_itds(xfer->hcpriv); 3305 ohci_dump_ed(sed); 3306 } 3307 #endif 3308 } 3309 3310 usbd_status 3311 ohci_device_isoc_start(usbd_xfer_handle xfer) 3312 { 3313 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3314 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3315 3316 DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer)); 3317 3318 if (sc->sc_dying) 3319 return (USBD_IOERROR); 3320 3321 #ifdef DIAGNOSTIC 3322 if (xfer->status != USBD_IN_PROGRESS) 3323 printf("ohci_device_isoc_start: not in progress %p\n", xfer); 3324 #endif 3325 3326 /* XXX anything to do? */ 3327 3328 return (USBD_IN_PROGRESS); 3329 } 3330 3331 void 3332 ohci_device_isoc_abort(usbd_xfer_handle xfer) 3333 { 3334 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3335 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3336 ohci_soft_ed_t *sed; 3337 ohci_soft_itd_t *sitd; 3338 int s; 3339 3340 s = splusb(); 3341 3342 DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer)); 3343 3344 /* Transfer is already done. */ 3345 if (xfer->status != USBD_NOT_STARTED && 3346 xfer->status != USBD_IN_PROGRESS) { 3347 splx(s); 3348 printf("ohci_device_isoc_abort: early return\n"); 3349 return; 3350 } 3351 3352 /* Give xfer the requested abort code. */ 3353 xfer->status = USBD_CANCELLED; 3354 3355 sed = opipe->sed; 3356 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 3357 3358 sitd = xfer->hcpriv; 3359 #ifdef DIAGNOSTIC 3360 if (sitd == NULL) { 3361 splx(s); 3362 printf("ohci_device_isoc_abort: hcpriv==0\n"); 3363 return; 3364 } 3365 #endif 3366 for (; sitd->xfer == xfer; sitd = sitd->nextitd) { 3367 #ifdef DIAGNOSTIC 3368 DPRINTFN(1,("abort sets done sitd=%p\n", sitd)); 3369 sitd->isdone = 1; 3370 #endif 3371 } 3372 3373 splx(s); 3374 3375 usb_delay_ms(&sc->sc_bus, OHCI_ITD_NOFFSET); 3376 3377 s = splusb(); 3378 3379 /* Run callback. */ 3380 usb_transfer_complete(xfer); 3381 3382 sed->ed.ed_headp = htole32(sitd->physaddr); /* unlink TDs */ 3383 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 3384 3385 splx(s); 3386 } 3387 3388 void 3389 ohci_device_isoc_done(usbd_xfer_handle xfer) 3390 { 3391 DPRINTFN(1,("ohci_device_isoc_done: xfer=%p\n", xfer)); 3392 } 3393 3394 usbd_status 3395 ohci_setup_isoc(usbd_pipe_handle pipe) 3396 { 3397 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3398 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3399 struct iso *iso = &opipe->u.iso; 3400 int s; 3401 3402 iso->next = -1; 3403 iso->inuse = 0; 3404 3405 s = splusb(); 3406 ohci_add_ed(opipe->sed, sc->sc_isoc_head); 3407 splx(s); 3408 3409 return (USBD_NORMAL_COMPLETION); 3410 } 3411 3412 void 3413 ohci_device_isoc_close(usbd_pipe_handle pipe) 3414 { 3415 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3416 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3417 3418 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe)); 3419 ohci_close_pipe(pipe, sc->sc_isoc_head); 3420 #ifdef DIAGNOSTIC 3421 opipe->tail.itd->isdone = 1; 3422 #endif 3423 ohci_free_sitd(sc, opipe->tail.itd); 3424 } 3425
Indexes created Tue Sep 23 14:10:03 GMT 2025