ohci.c revision 1.162
1 /* $NetBSD: ohci.c,v 1.162 2005/05/01 01:10:06 augustss Exp $ */ 2 /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */ 3 4 /* 5 * Copyright (c) 1998, 2004, 2005 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Lennart Augustsson (lennart (at) augustsson.net) at 10 * Carlstedt Research & Technology. 11 * This code is derived from software contributed to The NetBSD Foundation 12 * by Charles M. Hannum. 13 * 14 * Redistribution and use in source and binary forms, with or without 15 * modification, are permitted provided that the following conditions 16 * are met: 17 * 1. Redistributions of source code must retain the above copyright 18 * notice, this list of conditions and the following disclaimer. 19 * 2. Redistributions in binary form must reproduce the above copyright 20 * notice, this list of conditions and the following disclaimer in the 21 * documentation and/or other materials provided with the distribution. 22 * 3. All advertising materials mentioning features or use of this software 23 * must display the following acknowledgement: 24 * This product includes software developed by the NetBSD 25 * Foundation, Inc. and its contributors. 26 * 4. Neither the name of The NetBSD Foundation nor the names of its 27 * contributors may be used to endorse or promote products derived 28 * from this software without specific prior written permission. 29 * 30 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 31 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 32 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 33 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 34 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 35 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 36 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 37 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 38 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 39 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 40 * POSSIBILITY OF SUCH DAMAGE. 41 */ 42 43 /* 44 * USB Open Host Controller driver. 45 * 46 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html 47 * USB spec: http://www.usb.org/developers/docs/usbspec.zip 48 */ 49 50 #include <sys/cdefs.h> 51 __KERNEL_RCSID(0, "$NetBSD: ohci.c,v 1.162 2005/05/01 01:10:06 augustss Exp $"); 52 53 #include <sys/param.h> 54 #include <sys/systm.h> 55 #include <sys/malloc.h> 56 #if defined(__NetBSD__) || defined(__OpenBSD__) 57 #include <sys/kernel.h> 58 #include <sys/device.h> 59 #include <sys/select.h> 60 #include <uvm/uvm_extern.h> 61 #elif defined(__FreeBSD__) 62 #include <sys/module.h> 63 #include <sys/bus.h> 64 #include <machine/bus_pio.h> 65 #include <machine/bus_memio.h> 66 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 67 #include <machine/cpu.h> 68 #endif 69 #endif 70 #include <sys/proc.h> 71 #include <sys/queue.h> 72 73 #include <machine/bus.h> 74 #include <machine/endian.h> 75 76 #include <dev/usb/usb.h> 77 #include <dev/usb/usbdi.h> 78 #include <dev/usb/usbdivar.h> 79 #include <dev/usb/usb_mem.h> 80 #include <dev/usb/usb_quirks.h> 81 82 #include <dev/usb/ohcireg.h> 83 #include <dev/usb/ohcivar.h> 84 85 #if defined(__FreeBSD__) 86 #include <machine/clock.h> 87 88 #define delay(d) DELAY(d) 89 #endif 90 91 #if defined(__OpenBSD__) 92 struct cfdriver ohci_cd = { 93 NULL, "ohci", DV_DULL 94 }; 95 #endif 96 97 #ifdef OHCI_DEBUG 98 #define DPRINTF(x) if (ohcidebug) logprintf x 99 #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x 100 int ohcidebug = 0; 101 #ifndef __NetBSD__ 102 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 103 #endif 104 #else 105 #define DPRINTF(x) 106 #define DPRINTFN(n,x) 107 #endif 108 109 /* 110 * The OHCI controller is little endian, so on big endian machines 111 * the data stored in memory needs to be swapped. 112 */ 113 #if defined(__FreeBSD__) || defined(__OpenBSD__) 114 #if BYTE_ORDER == BIG_ENDIAN 115 #define htole32(x) (bswap32(x)) 116 #define le32toh(x) (bswap32(x)) 117 #else 118 #define htole32(x) (x) 119 #define le32toh(x) (x) 120 #endif 121 #endif 122 123 struct ohci_pipe; 124 125 Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *); 126 Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *); 127 128 Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *); 129 Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *); 130 131 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *); 132 Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *); 133 134 #if 0 135 Static void ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *, 136 ohci_soft_td_t *); 137 #endif 138 Static usbd_status ohci_alloc_std_chain(struct ohci_pipe *, 139 ohci_softc_t *, int, int, usbd_xfer_handle, 140 ohci_soft_td_t *, ohci_soft_td_t **); 141 142 Static void ohci_shutdown(void *v); 143 Static void ohci_power(int, void *); 144 Static usbd_status ohci_open(usbd_pipe_handle); 145 Static void ohci_poll(struct usbd_bus *); 146 Static void ohci_softintr(void *); 147 Static void ohci_waitintr(ohci_softc_t *, usbd_xfer_handle); 148 Static void ohci_rhsc(ohci_softc_t *, usbd_xfer_handle); 149 150 Static usbd_status ohci_device_request(usbd_xfer_handle xfer); 151 Static void ohci_add_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 152 Static void ohci_rem_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 153 Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *); 154 Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *); 155 Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t); 156 Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *); 157 Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *); 158 Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t); 159 160 Static usbd_status ohci_setup_isoc(usbd_pipe_handle pipe); 161 Static void ohci_device_isoc_enter(usbd_xfer_handle); 162 163 Static usbd_status ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 164 Static void ohci_freem(struct usbd_bus *, usb_dma_t *); 165 166 Static usbd_xfer_handle ohci_allocx(struct usbd_bus *); 167 Static void ohci_freex(struct usbd_bus *, usbd_xfer_handle); 168 169 Static usbd_status ohci_root_ctrl_transfer(usbd_xfer_handle); 170 Static usbd_status ohci_root_ctrl_start(usbd_xfer_handle); 171 Static void ohci_root_ctrl_abort(usbd_xfer_handle); 172 Static void ohci_root_ctrl_close(usbd_pipe_handle); 173 Static void ohci_root_ctrl_done(usbd_xfer_handle); 174 175 Static usbd_status ohci_root_intr_transfer(usbd_xfer_handle); 176 Static usbd_status ohci_root_intr_start(usbd_xfer_handle); 177 Static void ohci_root_intr_abort(usbd_xfer_handle); 178 Static void ohci_root_intr_close(usbd_pipe_handle); 179 Static void ohci_root_intr_done(usbd_xfer_handle); 180 181 Static usbd_status ohci_device_ctrl_transfer(usbd_xfer_handle); 182 Static usbd_status ohci_device_ctrl_start(usbd_xfer_handle); 183 Static void ohci_device_ctrl_abort(usbd_xfer_handle); 184 Static void ohci_device_ctrl_close(usbd_pipe_handle); 185 Static void ohci_device_ctrl_done(usbd_xfer_handle); 186 187 Static usbd_status ohci_device_bulk_transfer(usbd_xfer_handle); 188 Static usbd_status ohci_device_bulk_start(usbd_xfer_handle); 189 Static void ohci_device_bulk_abort(usbd_xfer_handle); 190 Static void ohci_device_bulk_close(usbd_pipe_handle); 191 Static void ohci_device_bulk_done(usbd_xfer_handle); 192 193 Static usbd_status ohci_device_intr_transfer(usbd_xfer_handle); 194 Static usbd_status ohci_device_intr_start(usbd_xfer_handle); 195 Static void ohci_device_intr_abort(usbd_xfer_handle); 196 Static void ohci_device_intr_close(usbd_pipe_handle); 197 Static void ohci_device_intr_done(usbd_xfer_handle); 198 199 Static usbd_status ohci_device_isoc_transfer(usbd_xfer_handle); 200 Static usbd_status ohci_device_isoc_start(usbd_xfer_handle); 201 Static void ohci_device_isoc_abort(usbd_xfer_handle); 202 Static void ohci_device_isoc_close(usbd_pipe_handle); 203 Static void ohci_device_isoc_done(usbd_xfer_handle); 204 205 Static usbd_status ohci_device_setintr(ohci_softc_t *sc, 206 struct ohci_pipe *pipe, int ival); 207 208 Static int ohci_str(usb_string_descriptor_t *, int, const char *); 209 210 Static void ohci_timeout(void *); 211 Static void ohci_timeout_task(void *); 212 Static void ohci_rhsc_enable(void *); 213 214 Static void ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *); 215 Static void ohci_abort_xfer(usbd_xfer_handle, usbd_status); 216 217 Static void ohci_device_clear_toggle(usbd_pipe_handle pipe); 218 Static void ohci_noop(usbd_pipe_handle pipe); 219 220 #ifdef OHCI_DEBUG 221 Static void ohci_dumpregs(ohci_softc_t *); 222 Static void ohci_dump_tds(ohci_soft_td_t *); 223 Static void ohci_dump_td(ohci_soft_td_t *); 224 Static void ohci_dump_ed(ohci_soft_ed_t *); 225 Static void ohci_dump_itd(ohci_soft_itd_t *); 226 Static void ohci_dump_itds(ohci_soft_itd_t *); 227 #endif 228 229 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 230 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 231 #define OWRITE1(sc, r, x) \ 232 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 233 #define OWRITE2(sc, r, x) \ 234 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 235 #define OWRITE4(sc, r, x) \ 236 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 237 #define OREAD1(sc, r) (OBARR(sc), bus_space_read_1((sc)->iot, (sc)->ioh, (r))) 238 #define OREAD2(sc, r) (OBARR(sc), bus_space_read_2((sc)->iot, (sc)->ioh, (r))) 239 #define OREAD4(sc, r) (OBARR(sc), bus_space_read_4((sc)->iot, (sc)->ioh, (r))) 240 241 /* Reverse the bits in a value 0 .. 31 */ 242 Static u_int8_t revbits[OHCI_NO_INTRS] = 243 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 244 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 245 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 246 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 247 248 struct ohci_pipe { 249 struct usbd_pipe pipe; 250 ohci_soft_ed_t *sed; 251 union { 252 ohci_soft_td_t *td; 253 ohci_soft_itd_t *itd; 254 } tail; 255 /* Info needed for different pipe kinds. */ 256 union { 257 /* Control pipe */ 258 struct { 259 usb_dma_t reqdma; 260 u_int length; 261 ohci_soft_td_t *setup, *data, *stat; 262 } ctl; 263 /* Interrupt pipe */ 264 struct { 265 int nslots; 266 int pos; 267 } intr; 268 /* Bulk pipe */ 269 struct { 270 u_int length; 271 int isread; 272 } bulk; 273 /* Iso pipe */ 274 struct iso { 275 int next, inuse; 276 } iso; 277 } u; 278 }; 279 280 #define OHCI_INTR_ENDPT 1 281 282 Static struct usbd_bus_methods ohci_bus_methods = { 283 ohci_open, 284 ohci_softintr, 285 ohci_poll, 286 ohci_allocm, 287 ohci_freem, 288 ohci_allocx, 289 ohci_freex, 290 }; 291 292 Static struct usbd_pipe_methods ohci_root_ctrl_methods = { 293 ohci_root_ctrl_transfer, 294 ohci_root_ctrl_start, 295 ohci_root_ctrl_abort, 296 ohci_root_ctrl_close, 297 ohci_noop, 298 ohci_root_ctrl_done, 299 }; 300 301 Static struct usbd_pipe_methods ohci_root_intr_methods = { 302 ohci_root_intr_transfer, 303 ohci_root_intr_start, 304 ohci_root_intr_abort, 305 ohci_root_intr_close, 306 ohci_noop, 307 ohci_root_intr_done, 308 }; 309 310 Static struct usbd_pipe_methods ohci_device_ctrl_methods = { 311 ohci_device_ctrl_transfer, 312 ohci_device_ctrl_start, 313 ohci_device_ctrl_abort, 314 ohci_device_ctrl_close, 315 ohci_noop, 316 ohci_device_ctrl_done, 317 }; 318 319 Static struct usbd_pipe_methods ohci_device_intr_methods = { 320 ohci_device_intr_transfer, 321 ohci_device_intr_start, 322 ohci_device_intr_abort, 323 ohci_device_intr_close, 324 ohci_device_clear_toggle, 325 ohci_device_intr_done, 326 }; 327 328 Static struct usbd_pipe_methods ohci_device_bulk_methods = { 329 ohci_device_bulk_transfer, 330 ohci_device_bulk_start, 331 ohci_device_bulk_abort, 332 ohci_device_bulk_close, 333 ohci_device_clear_toggle, 334 ohci_device_bulk_done, 335 }; 336 337 Static struct usbd_pipe_methods ohci_device_isoc_methods = { 338 ohci_device_isoc_transfer, 339 ohci_device_isoc_start, 340 ohci_device_isoc_abort, 341 ohci_device_isoc_close, 342 ohci_noop, 343 ohci_device_isoc_done, 344 }; 345 346 #if defined(__NetBSD__) || defined(__OpenBSD__) 347 int 348 ohci_activate(device_ptr_t self, enum devact act) 349 { 350 struct ohci_softc *sc = (struct ohci_softc *)self; 351 int rv = 0; 352 353 switch (act) { 354 case DVACT_ACTIVATE: 355 return (EOPNOTSUPP); 356 357 case DVACT_DEACTIVATE: 358 if (sc->sc_child != NULL) 359 rv = config_deactivate(sc->sc_child); 360 sc->sc_dying = 1; 361 break; 362 } 363 return (rv); 364 } 365 366 int 367 ohci_detach(struct ohci_softc *sc, int flags) 368 { 369 int rv = 0; 370 371 if (sc->sc_child != NULL) 372 rv = config_detach(sc->sc_child, flags); 373 374 if (rv != 0) 375 return (rv); 376 377 usb_uncallout(sc->sc_tmo_rhsc, ohci_rhsc_enable, sc); 378 379 #if defined(__NetBSD__) || defined(__OpenBSD__) 380 powerhook_disestablish(sc->sc_powerhook); 381 shutdownhook_disestablish(sc->sc_shutdownhook); 382 #endif 383 384 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 385 386 /* free data structures XXX */ 387 388 return (rv); 389 } 390 #endif 391 392 ohci_soft_ed_t * 393 ohci_alloc_sed(ohci_softc_t *sc) 394 { 395 ohci_soft_ed_t *sed; 396 usbd_status err; 397 int i, offs; 398 usb_dma_t dma; 399 400 if (sc->sc_freeeds == NULL) { 401 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 402 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 403 OHCI_ED_ALIGN, &dma); 404 if (err) 405 return (0); 406 for(i = 0; i < OHCI_SED_CHUNK; i++) { 407 offs = i * OHCI_SED_SIZE; 408 sed = KERNADDR(&dma, offs); 409 sed->physaddr = DMAADDR(&dma, offs); 410 sed->next = sc->sc_freeeds; 411 sc->sc_freeeds = sed; 412 } 413 } 414 sed = sc->sc_freeeds; 415 sc->sc_freeeds = sed->next; 416 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 417 sed->next = 0; 418 return (sed); 419 } 420 421 void 422 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 423 { 424 sed->next = sc->sc_freeeds; 425 sc->sc_freeeds = sed; 426 } 427 428 ohci_soft_td_t * 429 ohci_alloc_std(ohci_softc_t *sc) 430 { 431 ohci_soft_td_t *std; 432 usbd_status err; 433 int i, offs; 434 usb_dma_t dma; 435 int s; 436 437 if (sc->sc_freetds == NULL) { 438 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 439 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 440 OHCI_TD_ALIGN, &dma); 441 if (err) 442 return (NULL); 443 s = splusb(); 444 for(i = 0; i < OHCI_STD_CHUNK; i++) { 445 offs = i * OHCI_STD_SIZE; 446 std = KERNADDR(&dma, offs); 447 std->physaddr = DMAADDR(&dma, offs); 448 std->nexttd = sc->sc_freetds; 449 sc->sc_freetds = std; 450 } 451 splx(s); 452 } 453 454 s = splusb(); 455 std = sc->sc_freetds; 456 sc->sc_freetds = std->nexttd; 457 memset(&std->td, 0, sizeof(ohci_td_t)); 458 std->nexttd = NULL; 459 std->xfer = NULL; 460 ohci_hash_add_td(sc, std); 461 splx(s); 462 463 return (std); 464 } 465 466 void 467 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std) 468 { 469 int s; 470 471 s = splusb(); 472 ohci_hash_rem_td(sc, std); 473 std->nexttd = sc->sc_freetds; 474 sc->sc_freetds = std; 475 splx(s); 476 } 477 478 usbd_status 479 ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc, 480 int alen, int rd, usbd_xfer_handle xfer, 481 ohci_soft_td_t *sp, ohci_soft_td_t **ep) 482 { 483 ohci_soft_td_t *next, *cur; 484 ohci_physaddr_t dataphys, dataphysend; 485 u_int32_t tdflags; 486 int len, curlen; 487 usb_dma_t *dma = &xfer->dmabuf; 488 u_int16_t flags = xfer->flags; 489 490 DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen)); 491 492 len = alen; 493 cur = sp; 494 dataphys = DMAADDR(dma, 0); 495 dataphysend = OHCI_PAGE(dataphys + len - 1); 496 tdflags = htole32( 497 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 498 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) | 499 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR); 500 501 for (;;) { 502 next = ohci_alloc_std(sc); 503 if (next == NULL) 504 goto nomem; 505 506 /* The OHCI hardware can handle at most one page crossing. */ 507 if (OHCI_PAGE(dataphys) == dataphysend || 508 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) { 509 /* we can handle it in this TD */ 510 curlen = len; 511 } else { 512 /* must use multiple TDs, fill as much as possible. */ 513 curlen = 2 * OHCI_PAGE_SIZE - 514 (dataphys & (OHCI_PAGE_SIZE-1)); 515 /* the length must be a multiple of the max size */ 516 curlen -= curlen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize); 517 #ifdef DIAGNOSTIC 518 if (curlen == 0) 519 panic("ohci_alloc_std: curlen == 0"); 520 #endif 521 } 522 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x " 523 "dataphysend=0x%08x len=%d curlen=%d\n", 524 dataphys, dataphysend, 525 len, curlen)); 526 len -= curlen; 527 528 cur->td.td_flags = tdflags; 529 cur->td.td_cbp = htole32(dataphys); 530 cur->nexttd = next; 531 cur->td.td_nexttd = htole32(next->physaddr); 532 cur->td.td_be = htole32(dataphys + curlen - 1); 533 cur->len = curlen; 534 cur->flags = OHCI_ADD_LEN; 535 cur->xfer = xfer; 536 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n", 537 dataphys, dataphys + curlen - 1)); 538 if (len == 0) 539 break; 540 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n")); 541 dataphys += curlen; 542 cur = next; 543 } 544 if ((flags & USBD_FORCE_SHORT_XFER) && 545 alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) { 546 /* Force a 0 length transfer at the end. */ 547 548 cur = next; 549 next = ohci_alloc_std(sc); 550 if (next == NULL) 551 goto nomem; 552 553 cur->td.td_flags = tdflags; 554 cur->td.td_cbp = 0; /* indicate 0 length packet */ 555 cur->nexttd = next; 556 cur->td.td_nexttd = htole32(next->physaddr); 557 cur->td.td_be = ~0; 558 cur->len = 0; 559 cur->flags = 0; 560 cur->xfer = xfer; 561 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n")); 562 } 563 *ep = cur; 564 565 return (USBD_NORMAL_COMPLETION); 566 567 nomem: 568 /* XXX free chain */ 569 return (USBD_NOMEM); 570 } 571 572 #if 0 573 Static void 574 ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std, 575 ohci_soft_td_t *stdend) 576 { 577 ohci_soft_td_t *p; 578 579 for (; std != stdend; std = p) { 580 p = std->nexttd; 581 ohci_free_std(sc, std); 582 } 583 } 584 #endif 585 586 ohci_soft_itd_t * 587 ohci_alloc_sitd(ohci_softc_t *sc) 588 { 589 ohci_soft_itd_t *sitd; 590 usbd_status err; 591 int i, s, offs; 592 usb_dma_t dma; 593 594 if (sc->sc_freeitds == NULL) { 595 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n")); 596 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK, 597 OHCI_ITD_ALIGN, &dma); 598 if (err) 599 return (NULL); 600 s = splusb(); 601 for(i = 0; i < OHCI_SITD_CHUNK; i++) { 602 offs = i * OHCI_SITD_SIZE; 603 sitd = KERNADDR(&dma, offs); 604 sitd->physaddr = DMAADDR(&dma, offs); 605 sitd->nextitd = sc->sc_freeitds; 606 sc->sc_freeitds = sitd; 607 } 608 splx(s); 609 } 610 611 s = splusb(); 612 sitd = sc->sc_freeitds; 613 sc->sc_freeitds = sitd->nextitd; 614 memset(&sitd->itd, 0, sizeof(ohci_itd_t)); 615 sitd->nextitd = NULL; 616 sitd->xfer = NULL; 617 ohci_hash_add_itd(sc, sitd); 618 splx(s); 619 620 #ifdef DIAGNOSTIC 621 sitd->isdone = 0; 622 #endif 623 624 return (sitd); 625 } 626 627 void 628 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 629 { 630 int s; 631 632 DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd)); 633 634 #ifdef DIAGNOSTIC 635 if (!sitd->isdone) { 636 panic("ohci_free_sitd: sitd=%p not done", sitd); 637 return; 638 } 639 /* Warn double free */ 640 sitd->isdone = 0; 641 #endif 642 643 s = splusb(); 644 ohci_hash_rem_itd(sc, sitd); 645 sitd->nextitd = sc->sc_freeitds; 646 sc->sc_freeitds = sitd; 647 splx(s); 648 } 649 650 usbd_status 651 ohci_init(ohci_softc_t *sc) 652 { 653 ohci_soft_ed_t *sed, *psed; 654 usbd_status err; 655 int i; 656 u_int32_t s, ctl, rwc, ival, hcr, fm, per, rev, desca, descb; 657 658 DPRINTF(("ohci_init: start\n")); 659 #if defined(__OpenBSD__) 660 printf(","); 661 #else 662 printf("%s:", USBDEVNAME(sc->sc_bus.bdev)); 663 #endif 664 rev = OREAD4(sc, OHCI_REVISION); 665 printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev), 666 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 667 668 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 669 printf("%s: unsupported OHCI revision\n", 670 USBDEVNAME(sc->sc_bus.bdev)); 671 sc->sc_bus.usbrev = USBREV_UNKNOWN; 672 return (USBD_INVAL); 673 } 674 sc->sc_bus.usbrev = USBREV_1_0; 675 676 for (i = 0; i < OHCI_HASH_SIZE; i++) 677 LIST_INIT(&sc->sc_hash_tds[i]); 678 for (i = 0; i < OHCI_HASH_SIZE; i++) 679 LIST_INIT(&sc->sc_hash_itds[i]); 680 681 SIMPLEQ_INIT(&sc->sc_free_xfers); 682 683 #ifdef __NetBSD__ 684 usb_setup_reserve(sc, &sc->sc_dma_reserve, sc->sc_bus.dmatag, 685 USB_MEM_RESERVE); 686 #endif 687 688 /* XXX determine alignment by R/W */ 689 /* Allocate the HCCA area. */ 690 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 691 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 692 if (err) 693 return (err); 694 sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0); 695 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 696 697 sc->sc_eintrs = OHCI_NORMAL_INTRS; 698 699 /* Allocate dummy ED that starts the control list. */ 700 sc->sc_ctrl_head = ohci_alloc_sed(sc); 701 if (sc->sc_ctrl_head == NULL) { 702 err = USBD_NOMEM; 703 goto bad1; 704 } 705 sc->sc_ctrl_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 706 707 /* Allocate dummy ED that starts the bulk list. */ 708 sc->sc_bulk_head = ohci_alloc_sed(sc); 709 if (sc->sc_bulk_head == NULL) { 710 err = USBD_NOMEM; 711 goto bad2; 712 } 713 sc->sc_bulk_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 714 715 /* Allocate dummy ED that starts the isochronous list. */ 716 sc->sc_isoc_head = ohci_alloc_sed(sc); 717 if (sc->sc_isoc_head == NULL) { 718 err = USBD_NOMEM; 719 goto bad3; 720 } 721 sc->sc_isoc_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 722 723 /* Allocate all the dummy EDs that make up the interrupt tree. */ 724 for (i = 0; i < OHCI_NO_EDS; i++) { 725 sed = ohci_alloc_sed(sc); 726 if (sed == NULL) { 727 while (--i >= 0) 728 ohci_free_sed(sc, sc->sc_eds[i]); 729 err = USBD_NOMEM; 730 goto bad4; 731 } 732 /* All ED fields are set to 0. */ 733 sc->sc_eds[i] = sed; 734 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 735 if (i != 0) 736 psed = sc->sc_eds[(i-1) / 2]; 737 else 738 psed= sc->sc_isoc_head; 739 sed->next = psed; 740 sed->ed.ed_nexted = htole32(psed->physaddr); 741 } 742 /* 743 * Fill HCCA interrupt table. The bit reversal is to get 744 * the tree set up properly to spread the interrupts. 745 */ 746 for (i = 0; i < OHCI_NO_INTRS; i++) 747 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 748 htole32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 749 750 #ifdef OHCI_DEBUG 751 if (ohcidebug > 15) { 752 for (i = 0; i < OHCI_NO_EDS; i++) { 753 printf("ed#%d ", i); 754 ohci_dump_ed(sc->sc_eds[i]); 755 } 756 printf("iso "); 757 ohci_dump_ed(sc->sc_isoc_head); 758 } 759 #endif 760 761 /* Preserve values programmed by SMM/BIOS but lost over reset. */ 762 ctl = OREAD4(sc, OHCI_CONTROL); 763 rwc = ctl & OHCI_RWC; 764 fm = OREAD4(sc, OHCI_FM_INTERVAL); 765 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 766 descb = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 767 768 /* Determine in what context we are running. */ 769 if (ctl & OHCI_IR) { 770 /* SMM active, request change */ 771 DPRINTF(("ohci_init: SMM active, request owner change\n")); 772 if ((sc->sc_intre & (OHCI_OC | OHCI_MIE)) == 773 (OHCI_OC | OHCI_MIE)) 774 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_MIE); 775 s = OREAD4(sc, OHCI_COMMAND_STATUS); 776 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 777 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 778 usb_delay_ms(&sc->sc_bus, 1); 779 ctl = OREAD4(sc, OHCI_CONTROL); 780 } 781 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_MIE); 782 if ((ctl & OHCI_IR) == 0) { 783 printf("%s: SMM does not respond, resetting\n", 784 USBDEVNAME(sc->sc_bus.bdev)); 785 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 786 goto reset; 787 } 788 #if 0 789 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */ 790 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 791 /* BIOS started controller. */ 792 DPRINTF(("ohci_init: BIOS active\n")); 793 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 794 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL | rwc); 795 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 796 } 797 #endif 798 } else { 799 DPRINTF(("ohci_init: cold started\n")); 800 reset: 801 /* Controller was cold started. */ 802 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 803 } 804 805 /* 806 * This reset should not be necessary according to the OHCI spec, but 807 * without it some controllers do not start. 808 */ 809 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 810 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 811 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 812 813 /* We now own the host controller and the bus has been reset. */ 814 815 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 816 /* Nominal time for a reset is 10 us. */ 817 for (i = 0; i < 10; i++) { 818 delay(10); 819 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 820 if (!hcr) 821 break; 822 } 823 if (hcr) { 824 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 825 err = USBD_IOERROR; 826 goto bad5; 827 } 828 #ifdef OHCI_DEBUG 829 if (ohcidebug > 15) 830 ohci_dumpregs(sc); 831 #endif 832 833 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 834 835 /* Set up HC registers. */ 836 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 837 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 838 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 839 /* disable all interrupts and then switch on all desired interrupts */ 840 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 841 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 842 /* switch on desired functional features */ 843 ctl = OREAD4(sc, OHCI_CONTROL); 844 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 845 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 846 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL | rwc; 847 /* And finally start it! */ 848 OWRITE4(sc, OHCI_CONTROL, ctl); 849 850 /* 851 * The controller is now OPERATIONAL. Set a some final 852 * registers that should be set earlier, but that the 853 * controller ignores when in the SUSPEND state. 854 */ 855 ival = OHCI_GET_IVAL(fm); 856 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 857 fm |= OHCI_FSMPS(ival) | ival; 858 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 859 per = OHCI_PERIODIC(ival); /* 90% periodic */ 860 OWRITE4(sc, OHCI_PERIODIC_START, per); 861 862 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */ 863 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP); 864 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 865 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY); 866 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca); 867 868 /* 869 * The AMD756 requires a delay before re-reading the register, 870 * otherwise it will occasionally report 0 ports. 871 */ 872 sc->sc_noport = 0; 873 for (i = 0; i < 10 && sc->sc_noport == 0; i++) { 874 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY); 875 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 876 } 877 878 #ifdef OHCI_DEBUG 879 if (ohcidebug > 5) 880 ohci_dumpregs(sc); 881 #endif 882 883 /* Set up the bus struct. */ 884 sc->sc_bus.methods = &ohci_bus_methods; 885 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 886 887 #if defined(__NetBSD__) || defined(__OpenBSD__) 888 sc->sc_control = sc->sc_intre = 0; 889 sc->sc_powerhook = powerhook_establish(ohci_power, sc); 890 sc->sc_shutdownhook = shutdownhook_establish(ohci_shutdown, sc); 891 #endif 892 893 usb_callout_init(sc->sc_tmo_rhsc); 894 895 return (USBD_NORMAL_COMPLETION); 896 897 bad5: 898 for (i = 0; i < OHCI_NO_EDS; i++) 899 ohci_free_sed(sc, sc->sc_eds[i]); 900 bad4: 901 ohci_free_sed(sc, sc->sc_isoc_head); 902 bad3: 903 ohci_free_sed(sc, sc->sc_bulk_head); 904 bad2: 905 ohci_free_sed(sc, sc->sc_ctrl_head); 906 bad1: 907 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 908 return (err); 909 } 910 911 usbd_status 912 ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 913 { 914 #if defined(__NetBSD__) || defined(__OpenBSD__) 915 struct ohci_softc *sc = (struct ohci_softc *)bus; 916 #endif 917 usbd_status status; 918 919 status = usb_allocmem(&sc->sc_bus, size, 0, dma); 920 #ifdef __NetBSD__ 921 if (status == USBD_NOMEM) 922 status = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size); 923 #endif 924 return status; 925 } 926 927 void 928 ohci_freem(struct usbd_bus *bus, usb_dma_t *dma) 929 { 930 #if defined(__NetBSD__) || defined(__OpenBSD__) 931 struct ohci_softc *sc = (struct ohci_softc *)bus; 932 #endif 933 #ifdef __NetBSD__ 934 if (dma->block->flags & USB_DMA_RESERVE) { 935 usb_reserve_freem(&((struct ohci_softc *)bus)->sc_dma_reserve, 936 dma); 937 return; 938 } 939 #endif 940 usb_freemem(&sc->sc_bus, dma); 941 } 942 943 usbd_xfer_handle 944 ohci_allocx(struct usbd_bus *bus) 945 { 946 struct ohci_softc *sc = (struct ohci_softc *)bus; 947 usbd_xfer_handle xfer; 948 949 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 950 if (xfer != NULL) { 951 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 952 #ifdef DIAGNOSTIC 953 if (xfer->busy_free != XFER_FREE) { 954 printf("ohci_allocx: xfer=%p not free, 0x%08x\n", xfer, 955 xfer->busy_free); 956 } 957 #endif 958 } else { 959 xfer = malloc(sizeof(struct ohci_xfer), M_USB, M_NOWAIT); 960 } 961 if (xfer != NULL) { 962 memset(xfer, 0, sizeof (struct ohci_xfer)); 963 #ifdef DIAGNOSTIC 964 xfer->busy_free = XFER_BUSY; 965 #endif 966 } 967 return (xfer); 968 } 969 970 void 971 ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 972 { 973 struct ohci_softc *sc = (struct ohci_softc *)bus; 974 975 #ifdef DIAGNOSTIC 976 if (xfer->busy_free != XFER_BUSY) { 977 printf("ohci_freex: xfer=%p not busy, 0x%08x\n", xfer, 978 xfer->busy_free); 979 return; 980 } 981 xfer->busy_free = XFER_FREE; 982 #endif 983 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 984 } 985 986 /* 987 * Shut down the controller when the system is going down. 988 */ 989 void 990 ohci_shutdown(void *v) 991 { 992 ohci_softc_t *sc = v; 993 994 DPRINTF(("ohci_shutdown: stopping the HC\n")); 995 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 996 } 997 998 /* 999 * Handle suspend/resume. 1000 * 1001 * We need to switch to polling mode here, because this routine is 1002 * called from an interupt context. This is all right since we 1003 * are almost suspended anyway. 1004 */ 1005 void 1006 ohci_power(int why, void *v) 1007 { 1008 ohci_softc_t *sc = v; 1009 u_int32_t ctl; 1010 int s; 1011 1012 #ifdef OHCI_DEBUG 1013 DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why)); 1014 ohci_dumpregs(sc); 1015 #endif 1016 1017 s = splhardusb(); 1018 switch (why) { 1019 case PWR_SUSPEND: 1020 case PWR_STANDBY: 1021 sc->sc_bus.use_polling++; 1022 ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK; 1023 if (sc->sc_control == 0) { 1024 /* 1025 * Preserve register values, in case that APM BIOS 1026 * does not recover them. 1027 */ 1028 sc->sc_control = ctl; 1029 sc->sc_intre = OREAD4(sc, OHCI_INTERRUPT_ENABLE); 1030 } 1031 ctl |= OHCI_HCFS_SUSPEND; 1032 OWRITE4(sc, OHCI_CONTROL, ctl); 1033 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1034 sc->sc_bus.use_polling--; 1035 break; 1036 case PWR_RESUME: 1037 sc->sc_bus.use_polling++; 1038 /* Some broken BIOSes do not recover these values */ 1039 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 1040 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 1041 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 1042 if (sc->sc_intre) 1043 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, 1044 sc->sc_intre & (OHCI_ALL_INTRS | OHCI_MIE)); 1045 if (sc->sc_control) 1046 ctl = sc->sc_control; 1047 else 1048 ctl = OREAD4(sc, OHCI_CONTROL); 1049 ctl |= OHCI_HCFS_RESUME; 1050 OWRITE4(sc, OHCI_CONTROL, ctl); 1051 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 1052 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL; 1053 OWRITE4(sc, OHCI_CONTROL, ctl); 1054 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 1055 sc->sc_control = sc->sc_intre = 0; 1056 sc->sc_bus.use_polling--; 1057 break; 1058 case PWR_SOFTSUSPEND: 1059 case PWR_SOFTSTANDBY: 1060 case PWR_SOFTRESUME: 1061 break; 1062 } 1063 splx(s); 1064 } 1065 1066 #ifdef OHCI_DEBUG 1067 void 1068 ohci_dumpregs(ohci_softc_t *sc) 1069 { 1070 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 1071 OREAD4(sc, OHCI_REVISION), 1072 OREAD4(sc, OHCI_CONTROL), 1073 OREAD4(sc, OHCI_COMMAND_STATUS))); 1074 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 1075 OREAD4(sc, OHCI_INTERRUPT_STATUS), 1076 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 1077 OREAD4(sc, OHCI_INTERRUPT_DISABLE))); 1078 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 1079 OREAD4(sc, OHCI_HCCA), 1080 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 1081 OREAD4(sc, OHCI_CONTROL_HEAD_ED))); 1082 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 1083 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 1084 OREAD4(sc, OHCI_BULK_HEAD_ED), 1085 OREAD4(sc, OHCI_BULK_CURRENT_ED))); 1086 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 1087 OREAD4(sc, OHCI_DONE_HEAD), 1088 OREAD4(sc, OHCI_FM_INTERVAL), 1089 OREAD4(sc, OHCI_FM_REMAINING))); 1090 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 1091 OREAD4(sc, OHCI_FM_NUMBER), 1092 OREAD4(sc, OHCI_PERIODIC_START), 1093 OREAD4(sc, OHCI_LS_THRESHOLD))); 1094 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n", 1095 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 1096 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 1097 OREAD4(sc, OHCI_RH_STATUS))); 1098 DPRINTF((" port1=0x%08x port2=0x%08x\n", 1099 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 1100 OREAD4(sc, OHCI_RH_PORT_STATUS(2)))); 1101 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n", 1102 le32toh(sc->sc_hcca->hcca_frame_number), 1103 le32toh(sc->sc_hcca->hcca_done_head))); 1104 } 1105 #endif 1106 1107 Static int ohci_intr1(ohci_softc_t *); 1108 1109 int 1110 ohci_intr(void *p) 1111 { 1112 ohci_softc_t *sc = p; 1113 1114 if (sc == NULL || sc->sc_dying) 1115 return (0); 1116 1117 /* If we get an interrupt while polling, then just ignore it. */ 1118 if (sc->sc_bus.use_polling) { 1119 #ifdef DIAGNOSTIC 1120 DPRINTFN(16, ("ohci_intr: ignored interrupt while polling\n")); 1121 #endif 1122 /* for level triggered intrs, should do something to ack */ 1123 OWRITE4(sc, OHCI_INTERRUPT_STATUS, 1124 OREAD4(sc, OHCI_INTERRUPT_STATUS)); 1125 1126 return (0); 1127 } 1128 1129 return (ohci_intr1(sc)); 1130 } 1131 1132 Static int 1133 ohci_intr1(ohci_softc_t *sc) 1134 { 1135 u_int32_t intrs, eintrs; 1136 1137 DPRINTFN(14,("ohci_intr1: enter\n")); 1138 1139 /* In case the interrupt occurs before initialization has completed. */ 1140 if (sc == NULL || sc->sc_hcca == NULL) { 1141 #ifdef DIAGNOSTIC 1142 printf("ohci_intr: sc->sc_hcca == NULL\n"); 1143 #endif 1144 return (0); 1145 } 1146 1147 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1148 if (!intrs) 1149 return (0); 1150 1151 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs & ~(OHCI_MIE|OHCI_WDH)); /* Acknowledge */ 1152 eintrs = intrs & sc->sc_eintrs; 1153 if (!eintrs) 1154 return (0); 1155 1156 sc->sc_bus.intr_context++; 1157 sc->sc_bus.no_intrs++; 1158 DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 1159 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 1160 (u_int)eintrs)); 1161 1162 if (eintrs & OHCI_SO) { 1163 sc->sc_overrun_cnt++; 1164 if (usbd_ratecheck(&sc->sc_overrun_ntc)) { 1165 printf("%s: %u scheduling overruns\n", 1166 USBDEVNAME(sc->sc_bus.bdev), sc->sc_overrun_cnt); 1167 sc->sc_overrun_cnt = 0; 1168 } 1169 /* XXX do what */ 1170 eintrs &= ~OHCI_SO; 1171 } 1172 if (eintrs & OHCI_WDH) { 1173 /* 1174 * We block the interrupt below, and reenable it later from 1175 * ohci_softintr(). 1176 */ 1177 usb_schedsoftintr(&sc->sc_bus); 1178 } 1179 if (eintrs & OHCI_RD) { 1180 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev)); 1181 /* XXX process resume detect */ 1182 } 1183 if (eintrs & OHCI_UE) { 1184 printf("%s: unrecoverable error, controller halted\n", 1185 USBDEVNAME(sc->sc_bus.bdev)); 1186 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1187 /* XXX what else */ 1188 } 1189 if (eintrs & OHCI_RHSC) { 1190 /* 1191 * We block the interrupt below, and reenable it later from 1192 * a timeout. 1193 */ 1194 ohci_rhsc(sc, sc->sc_intrxfer); 1195 /* Do not allow RHSC interrupts > 1 per second */ 1196 usb_callout(sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc); 1197 } 1198 1199 sc->sc_bus.intr_context--; 1200 1201 if (eintrs != 0) { 1202 /* Block unprocessed interrupts. */ 1203 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs); 1204 sc->sc_eintrs &= ~eintrs; 1205 DPRINTFN(1, ("%s: blocking intrs 0x%x\n", 1206 USBDEVNAME(sc->sc_bus.bdev), eintrs)); 1207 } 1208 1209 return (1); 1210 } 1211 1212 void 1213 ohci_rhsc_enable(void *v_sc) 1214 { 1215 ohci_softc_t *sc = v_sc; 1216 int s; 1217 1218 s = splhardusb(); 1219 sc->sc_eintrs |= OHCI_RHSC; 1220 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1221 splx(s); 1222 } 1223 1224 #ifdef OHCI_DEBUG 1225 char *ohci_cc_strs[] = { 1226 "NO_ERROR", 1227 "CRC", 1228 "BIT_STUFFING", 1229 "DATA_TOGGLE_MISMATCH", 1230 "STALL", 1231 "DEVICE_NOT_RESPONDING", 1232 "PID_CHECK_FAILURE", 1233 "UNEXPECTED_PID", 1234 "DATA_OVERRUN", 1235 "DATA_UNDERRUN", 1236 "BUFFER_OVERRUN", 1237 "BUFFER_UNDERRUN", 1238 "reserved", 1239 "reserved", 1240 "NOT_ACCESSED", 1241 "NOT_ACCESSED", 1242 }; 1243 #endif 1244 1245 void 1246 ohci_softintr(void *v) 1247 { 1248 ohci_softc_t *sc = v; 1249 ohci_soft_itd_t *sitd, *sidone, *sitdnext; 1250 ohci_soft_td_t *std, *sdone, *stdnext; 1251 usbd_xfer_handle xfer; 1252 struct ohci_pipe *opipe; 1253 int len, cc, s; 1254 int i, j, actlen, iframes, uedir; 1255 ohci_physaddr_t done; 1256 1257 DPRINTFN(10,("ohci_softintr: enter\n")); 1258 1259 sc->sc_bus.intr_context++; 1260 1261 s = splhardusb(); 1262 done = le32toh(sc->sc_hcca->hcca_done_head) & ~OHCI_DONE_INTRS; 1263 sc->sc_hcca->hcca_done_head = 0; 1264 OWRITE4(sc, OHCI_INTERRUPT_STATUS, OHCI_WDH); 1265 sc->sc_eintrs |= OHCI_WDH; 1266 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_WDH); 1267 splx(s); 1268 1269 /* Reverse the done list. */ 1270 for (sdone = NULL, sidone = NULL; done != 0; ) { 1271 std = ohci_hash_find_td(sc, done); 1272 if (std != NULL) { 1273 std->dnext = sdone; 1274 done = le32toh(std->td.td_nexttd); 1275 sdone = std; 1276 DPRINTFN(10,("add TD %p\n", std)); 1277 continue; 1278 } 1279 sitd = ohci_hash_find_itd(sc, done); 1280 if (sitd != NULL) { 1281 sitd->dnext = sidone; 1282 done = le32toh(sitd->itd.itd_nextitd); 1283 sidone = sitd; 1284 DPRINTFN(5,("add ITD %p\n", sitd)); 1285 continue; 1286 } 1287 panic("ohci_softintr: addr 0x%08lx not found", (u_long)done); 1288 } 1289 1290 DPRINTFN(10,("ohci_softintr: sdone=%p sidone=%p\n", sdone, sidone)); 1291 1292 #ifdef OHCI_DEBUG 1293 if (ohcidebug > 10) { 1294 DPRINTF(("ohci_process_done: TD done:\n")); 1295 ohci_dump_tds(sdone); 1296 } 1297 #endif 1298 1299 for (std = sdone; std; std = stdnext) { 1300 xfer = std->xfer; 1301 stdnext = std->dnext; 1302 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n", 1303 std, xfer, xfer ? xfer->hcpriv : 0)); 1304 if (xfer == NULL) { 1305 /* 1306 * xfer == NULL: There seems to be no xfer associated 1307 * with this TD. It is tailp that happened to end up on 1308 * the done queue. 1309 * Shouldn't happen, but some chips are broken(?). 1310 */ 1311 continue; 1312 } 1313 if (xfer->status == USBD_CANCELLED || 1314 xfer->status == USBD_TIMEOUT) { 1315 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1316 xfer)); 1317 /* Handled by abort routine. */ 1318 continue; 1319 } 1320 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 1321 1322 len = std->len; 1323 if (std->td.td_cbp != 0) 1324 len -= le32toh(std->td.td_be) - 1325 le32toh(std->td.td_cbp) + 1; 1326 DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", len, 1327 std->flags)); 1328 if (std->flags & OHCI_ADD_LEN) 1329 xfer->actlen += len; 1330 1331 cc = OHCI_TD_GET_CC(le32toh(std->td.td_flags)); 1332 if (cc == OHCI_CC_NO_ERROR) { 1333 if (std->flags & OHCI_CALL_DONE) { 1334 xfer->status = USBD_NORMAL_COMPLETION; 1335 s = splusb(); 1336 usb_transfer_complete(xfer); 1337 splx(s); 1338 } 1339 ohci_free_std(sc, std); 1340 } else { 1341 /* 1342 * Endpoint is halted. First unlink all the TDs 1343 * belonging to the failed transfer, and then restart 1344 * the endpoint. 1345 */ 1346 ohci_soft_td_t *p, *n; 1347 opipe = (struct ohci_pipe *)xfer->pipe; 1348 1349 DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n", 1350 OHCI_TD_GET_CC(le32toh(std->td.td_flags)), 1351 ohci_cc_strs[OHCI_TD_GET_CC(le32toh(std->td.td_flags))])); 1352 1353 /* remove TDs */ 1354 for (p = std; p->xfer == xfer; p = n) { 1355 n = p->nexttd; 1356 ohci_free_std(sc, p); 1357 } 1358 1359 /* clear halt */ 1360 opipe->sed->ed.ed_headp = htole32(p->physaddr); 1361 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1362 1363 if (cc == OHCI_CC_STALL) 1364 xfer->status = USBD_STALLED; 1365 else 1366 xfer->status = USBD_IOERROR; 1367 s = splusb(); 1368 usb_transfer_complete(xfer); 1369 splx(s); 1370 } 1371 } 1372 1373 #ifdef OHCI_DEBUG 1374 if (ohcidebug > 10) { 1375 DPRINTF(("ohci_softintr: ITD done:\n")); 1376 ohci_dump_itds(sidone); 1377 } 1378 #endif 1379 1380 for (sitd = sidone; sitd != NULL; sitd = sitdnext) { 1381 xfer = sitd->xfer; 1382 sitdnext = sitd->dnext; 1383 DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n", 1384 sitd, xfer, xfer ? xfer->hcpriv : 0)); 1385 if (xfer == NULL) 1386 continue; 1387 if (xfer->status == USBD_CANCELLED || 1388 xfer->status == USBD_TIMEOUT) { 1389 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1390 xfer)); 1391 /* Handled by abort routine. */ 1392 continue; 1393 } 1394 #ifdef DIAGNOSTIC 1395 if (sitd->isdone) 1396 printf("ohci_softintr: sitd=%p is done\n", sitd); 1397 sitd->isdone = 1; 1398 #endif 1399 if (sitd->flags & OHCI_CALL_DONE) { 1400 ohci_soft_itd_t *next; 1401 1402 opipe = (struct ohci_pipe *)xfer->pipe; 1403 opipe->u.iso.inuse -= xfer->nframes; 1404 uedir = UE_GET_DIR(xfer->pipe->endpoint->edesc-> 1405 bEndpointAddress); 1406 xfer->status = USBD_NORMAL_COMPLETION; 1407 actlen = 0; 1408 for (i = 0, sitd = xfer->hcpriv;; 1409 sitd = next) { 1410 next = sitd->nextitd; 1411 if (OHCI_ITD_GET_CC(le32toh(sitd-> 1412 itd.itd_flags)) != OHCI_CC_NO_ERROR) 1413 xfer->status = USBD_IOERROR; 1414 /* For input, update frlengths with actual */ 1415 /* XXX anything necessary for output? */ 1416 if (uedir == UE_DIR_IN && 1417 xfer->status == USBD_NORMAL_COMPLETION) { 1418 iframes = OHCI_ITD_GET_FC(le32toh( 1419 sitd->itd.itd_flags)); 1420 for (j = 0; j < iframes; i++, j++) { 1421 len = le16toh(sitd-> 1422 itd.itd_offset[j]); 1423 if ((OHCI_ITD_PSW_GET_CC(len) & 1424 OHCI_CC_NOT_ACCESSED_MASK) 1425 == OHCI_CC_NOT_ACCESSED) 1426 len = 0; 1427 else 1428 len = OHCI_ITD_PSW_LENGTH(len); 1429 xfer->frlengths[i] = len; 1430 actlen += len; 1431 } 1432 } 1433 if (sitd->flags & OHCI_CALL_DONE) 1434 break; 1435 ohci_free_sitd(sc, sitd); 1436 } 1437 ohci_free_sitd(sc, sitd); 1438 if (uedir == UE_DIR_IN && 1439 xfer->status == USBD_NORMAL_COMPLETION) 1440 xfer->actlen = actlen; 1441 xfer->hcpriv = NULL; 1442 1443 s = splusb(); 1444 usb_transfer_complete(xfer); 1445 splx(s); 1446 } 1447 } 1448 1449 #ifdef USB_USE_SOFTINTR 1450 if (sc->sc_softwake) { 1451 sc->sc_softwake = 0; 1452 wakeup(&sc->sc_softwake); 1453 } 1454 #endif /* USB_USE_SOFTINTR */ 1455 1456 sc->sc_bus.intr_context--; 1457 DPRINTFN(10,("ohci_softintr: done:\n")); 1458 } 1459 1460 void 1461 ohci_device_ctrl_done(usbd_xfer_handle xfer) 1462 { 1463 DPRINTFN(10,("ohci_device_ctrl_done: xfer=%p\n", xfer)); 1464 1465 #ifdef DIAGNOSTIC 1466 if (!(xfer->rqflags & URQ_REQUEST)) { 1467 panic("ohci_device_ctrl_done: not a request"); 1468 } 1469 #endif 1470 } 1471 1472 void 1473 ohci_device_intr_done(usbd_xfer_handle xfer) 1474 { 1475 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1476 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1477 ohci_soft_ed_t *sed = opipe->sed; 1478 ohci_soft_td_t *data, *tail; 1479 1480 1481 DPRINTFN(10,("ohci_device_intr_done: xfer=%p, actlen=%d\n", 1482 xfer, xfer->actlen)); 1483 1484 if (xfer->pipe->repeat) { 1485 data = opipe->tail.td; 1486 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 1487 if (tail == NULL) { 1488 xfer->status = USBD_NOMEM; 1489 return; 1490 } 1491 tail->xfer = NULL; 1492 1493 data->td.td_flags = htole32( 1494 OHCI_TD_IN | OHCI_TD_NOCC | 1495 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 1496 if (xfer->flags & USBD_SHORT_XFER_OK) 1497 data->td.td_flags |= htole32(OHCI_TD_R); 1498 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf, 0)); 1499 data->nexttd = tail; 1500 data->td.td_nexttd = htole32(tail->physaddr); 1501 data->td.td_be = htole32(le32toh(data->td.td_cbp) + 1502 xfer->length - 1); 1503 data->len = xfer->length; 1504 data->xfer = xfer; 1505 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1506 xfer->hcpriv = data; 1507 xfer->actlen = 0; 1508 1509 sed->ed.ed_tailp = htole32(tail->physaddr); 1510 opipe->tail.td = tail; 1511 } 1512 } 1513 1514 void 1515 ohci_device_bulk_done(usbd_xfer_handle xfer) 1516 { 1517 DPRINTFN(10,("ohci_device_bulk_done: xfer=%p, actlen=%d\n", 1518 xfer, xfer->actlen)); 1519 } 1520 1521 void 1522 ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer) 1523 { 1524 usbd_pipe_handle pipe; 1525 u_char *p; 1526 int i, m; 1527 int hstatus; 1528 1529 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1530 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n", 1531 sc, xfer, hstatus)); 1532 1533 if (xfer == NULL) { 1534 /* Just ignore the change. */ 1535 return; 1536 } 1537 1538 pipe = xfer->pipe; 1539 1540 p = KERNADDR(&xfer->dmabuf, 0); 1541 m = min(sc->sc_noport, xfer->length * 8 - 1); 1542 memset(p, 0, xfer->length); 1543 for (i = 1; i <= m; i++) { 1544 /* Pick out CHANGE bits from the status reg. */ 1545 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1546 p[i/8] |= 1 << (i%8); 1547 } 1548 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 1549 xfer->actlen = xfer->length; 1550 xfer->status = USBD_NORMAL_COMPLETION; 1551 1552 usb_transfer_complete(xfer); 1553 } 1554 1555 void 1556 ohci_root_intr_done(usbd_xfer_handle xfer) 1557 { 1558 } 1559 1560 void 1561 ohci_root_ctrl_done(usbd_xfer_handle xfer) 1562 { 1563 } 1564 1565 /* 1566 * Wait here until controller claims to have an interrupt. 1567 * Then call ohci_intr and return. Use timeout to avoid waiting 1568 * too long. 1569 */ 1570 void 1571 ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer) 1572 { 1573 int timo = xfer->timeout; 1574 int usecs; 1575 u_int32_t intrs; 1576 1577 xfer->status = USBD_IN_PROGRESS; 1578 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 1579 usb_delay_ms(&sc->sc_bus, 1); 1580 if (sc->sc_dying) 1581 break; 1582 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 1583 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs)); 1584 #ifdef OHCI_DEBUG 1585 if (ohcidebug > 15) 1586 ohci_dumpregs(sc); 1587 #endif 1588 if (intrs) { 1589 ohci_intr1(sc); 1590 if (xfer->status != USBD_IN_PROGRESS) 1591 return; 1592 } 1593 } 1594 1595 /* Timeout */ 1596 DPRINTF(("ohci_waitintr: timeout\n")); 1597 xfer->status = USBD_TIMEOUT; 1598 usb_transfer_complete(xfer); 1599 /* XXX should free TD */ 1600 } 1601 1602 void 1603 ohci_poll(struct usbd_bus *bus) 1604 { 1605 ohci_softc_t *sc = (ohci_softc_t *)bus; 1606 #ifdef OHCI_DEBUG 1607 static int last; 1608 int new; 1609 new = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1610 if (new != last) { 1611 DPRINTFN(10,("ohci_poll: intrs=0x%04x\n", new)); 1612 last = new; 1613 } 1614 #endif 1615 1616 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) 1617 ohci_intr1(sc); 1618 } 1619 1620 usbd_status 1621 ohci_device_request(usbd_xfer_handle xfer) 1622 { 1623 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1624 usb_device_request_t *req = &xfer->request; 1625 usbd_device_handle dev = opipe->pipe.device; 1626 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1627 int addr = dev->address; 1628 ohci_soft_td_t *setup, *stat, *next, *tail; 1629 ohci_soft_ed_t *sed; 1630 int isread; 1631 int len; 1632 usbd_status err; 1633 int s; 1634 1635 isread = req->bmRequestType & UT_READ; 1636 len = UGETW(req->wLength); 1637 1638 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 1639 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 1640 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1641 UGETW(req->wIndex), len, addr, 1642 opipe->pipe.endpoint->edesc->bEndpointAddress)); 1643 1644 setup = opipe->tail.td; 1645 stat = ohci_alloc_std(sc); 1646 if (stat == NULL) { 1647 err = USBD_NOMEM; 1648 goto bad1; 1649 } 1650 tail = ohci_alloc_std(sc); 1651 if (tail == NULL) { 1652 err = USBD_NOMEM; 1653 goto bad2; 1654 } 1655 tail->xfer = NULL; 1656 1657 sed = opipe->sed; 1658 opipe->u.ctl.length = len; 1659 1660 /* Update device address and length since they may have changed 1661 during the setup of the control pipe in usbd_new_device(). */ 1662 /* XXX This only needs to be done once, but it's too early in open. */ 1663 /* XXXX Should not touch ED here! */ 1664 sed->ed.ed_flags = htole32( 1665 (le32toh(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) | 1666 OHCI_ED_SET_FA(addr) | 1667 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize))); 1668 1669 next = stat; 1670 1671 /* Set up data transaction */ 1672 if (len != 0) { 1673 ohci_soft_td_t *std = stat; 1674 1675 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 1676 std, &stat); 1677 stat = stat->nexttd; /* point at free TD */ 1678 if (err) 1679 goto bad3; 1680 /* Start toggle at 1 and then use the carried toggle. */ 1681 std->td.td_flags &= htole32(~OHCI_TD_TOGGLE_MASK); 1682 std->td.td_flags |= htole32(OHCI_TD_TOGGLE_1); 1683 } 1684 1685 memcpy(KERNADDR(&opipe->u.ctl.reqdma, 0), req, sizeof *req); 1686 1687 setup->td.td_flags = htole32(OHCI_TD_SETUP | OHCI_TD_NOCC | 1688 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1689 setup->td.td_cbp = htole32(DMAADDR(&opipe->u.ctl.reqdma, 0)); 1690 setup->nexttd = next; 1691 setup->td.td_nexttd = htole32(next->physaddr); 1692 setup->td.td_be = htole32(le32toh(setup->td.td_cbp) + sizeof *req - 1); 1693 setup->len = 0; 1694 setup->xfer = xfer; 1695 setup->flags = 0; 1696 xfer->hcpriv = setup; 1697 1698 stat->td.td_flags = htole32( 1699 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | 1700 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1701 stat->td.td_cbp = 0; 1702 stat->nexttd = tail; 1703 stat->td.td_nexttd = htole32(tail->physaddr); 1704 stat->td.td_be = 0; 1705 stat->flags = OHCI_CALL_DONE; 1706 stat->len = 0; 1707 stat->xfer = xfer; 1708 1709 #ifdef OHCI_DEBUG 1710 if (ohcidebug > 5) { 1711 DPRINTF(("ohci_device_request:\n")); 1712 ohci_dump_ed(sed); 1713 ohci_dump_tds(setup); 1714 } 1715 #endif 1716 1717 /* Insert ED in schedule */ 1718 s = splusb(); 1719 sed->ed.ed_tailp = htole32(tail->physaddr); 1720 opipe->tail.td = tail; 1721 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1722 if (xfer->timeout && !sc->sc_bus.use_polling) { 1723 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 1724 ohci_timeout, xfer); 1725 } 1726 splx(s); 1727 1728 #ifdef OHCI_DEBUG 1729 if (ohcidebug > 20) { 1730 delay(10000); 1731 DPRINTF(("ohci_device_request: status=%x\n", 1732 OREAD4(sc, OHCI_COMMAND_STATUS))); 1733 ohci_dumpregs(sc); 1734 printf("ctrl head:\n"); 1735 ohci_dump_ed(sc->sc_ctrl_head); 1736 printf("sed:\n"); 1737 ohci_dump_ed(sed); 1738 ohci_dump_tds(setup); 1739 } 1740 #endif 1741 1742 return (USBD_NORMAL_COMPLETION); 1743 1744 bad3: 1745 ohci_free_std(sc, tail); 1746 bad2: 1747 ohci_free_std(sc, stat); 1748 bad1: 1749 return (err); 1750 } 1751 1752 /* 1753 * Add an ED to the schedule. Called at splusb(). 1754 */ 1755 void 1756 ohci_add_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1757 { 1758 DPRINTFN(8,("ohci_add_ed: sed=%p head=%p\n", sed, head)); 1759 1760 SPLUSBCHECK; 1761 sed->next = head->next; 1762 sed->ed.ed_nexted = head->ed.ed_nexted; 1763 head->next = sed; 1764 head->ed.ed_nexted = htole32(sed->physaddr); 1765 } 1766 1767 /* 1768 * Remove an ED from the schedule. Called at splusb(). 1769 */ 1770 void 1771 ohci_rem_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1772 { 1773 ohci_soft_ed_t *p; 1774 1775 SPLUSBCHECK; 1776 1777 /* XXX */ 1778 for (p = head; p != NULL && p->next != sed; p = p->next) 1779 ; 1780 if (p == NULL) 1781 panic("ohci_rem_ed: ED not found"); 1782 p->next = sed->next; 1783 p->ed.ed_nexted = sed->ed.ed_nexted; 1784 } 1785 1786 /* 1787 * When a transfer is completed the TD is added to the done queue by 1788 * the host controller. This queue is the processed by software. 1789 * Unfortunately the queue contains the physical address of the TD 1790 * and we have no simple way to translate this back to a kernel address. 1791 * To make the translation possible (and fast) we use a hash table of 1792 * TDs currently in the schedule. The physical address is used as the 1793 * hash value. 1794 */ 1795 1796 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1797 /* Called at splusb() */ 1798 void 1799 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1800 { 1801 int h = HASH(std->physaddr); 1802 1803 SPLUSBCHECK; 1804 1805 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1806 } 1807 1808 /* Called at splusb() */ 1809 void 1810 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1811 { 1812 SPLUSBCHECK; 1813 1814 LIST_REMOVE(std, hnext); 1815 } 1816 1817 ohci_soft_td_t * 1818 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a) 1819 { 1820 int h = HASH(a); 1821 ohci_soft_td_t *std; 1822 1823 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1824 std != NULL; 1825 std = LIST_NEXT(std, hnext)) 1826 if (std->physaddr == a) 1827 return (std); 1828 return (NULL); 1829 } 1830 1831 /* Called at splusb() */ 1832 void 1833 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1834 { 1835 int h = HASH(sitd->physaddr); 1836 1837 SPLUSBCHECK; 1838 1839 DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n", 1840 sitd, (u_long)sitd->physaddr)); 1841 1842 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext); 1843 } 1844 1845 /* Called at splusb() */ 1846 void 1847 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1848 { 1849 SPLUSBCHECK; 1850 1851 DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n", 1852 sitd, (u_long)sitd->physaddr)); 1853 1854 LIST_REMOVE(sitd, hnext); 1855 } 1856 1857 ohci_soft_itd_t * 1858 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a) 1859 { 1860 int h = HASH(a); 1861 ohci_soft_itd_t *sitd; 1862 1863 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]); 1864 sitd != NULL; 1865 sitd = LIST_NEXT(sitd, hnext)) 1866 if (sitd->physaddr == a) 1867 return (sitd); 1868 return (NULL); 1869 } 1870 1871 void 1872 ohci_timeout(void *addr) 1873 { 1874 struct ohci_xfer *oxfer = addr; 1875 struct ohci_pipe *opipe = (struct ohci_pipe *)oxfer->xfer.pipe; 1876 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1877 1878 DPRINTF(("ohci_timeout: oxfer=%p\n", oxfer)); 1879 1880 if (sc->sc_dying) { 1881 ohci_abort_xfer(&oxfer->xfer, USBD_TIMEOUT); 1882 return; 1883 } 1884 1885 /* Execute the abort in a process context. */ 1886 usb_init_task(&oxfer->abort_task, ohci_timeout_task, addr); 1887 usb_add_task(oxfer->xfer.pipe->device, &oxfer->abort_task); 1888 } 1889 1890 void 1891 ohci_timeout_task(void *addr) 1892 { 1893 usbd_xfer_handle xfer = addr; 1894 int s; 1895 1896 DPRINTF(("ohci_timeout_task: xfer=%p\n", xfer)); 1897 1898 s = splusb(); 1899 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1900 splx(s); 1901 } 1902 1903 #ifdef OHCI_DEBUG 1904 void 1905 ohci_dump_tds(ohci_soft_td_t *std) 1906 { 1907 for (; std; std = std->nexttd) 1908 ohci_dump_td(std); 1909 } 1910 1911 void 1912 ohci_dump_td(ohci_soft_td_t *std) 1913 { 1914 char sbuf[128]; 1915 1916 bitmask_snprintf((u_int32_t)le32toh(std->td.td_flags), 1917 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 1918 sbuf, sizeof(sbuf)); 1919 1920 printf("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx " 1921 "nexttd=0x%08lx be=0x%08lx\n", 1922 std, (u_long)std->physaddr, sbuf, 1923 OHCI_TD_GET_DI(le32toh(std->td.td_flags)), 1924 OHCI_TD_GET_EC(le32toh(std->td.td_flags)), 1925 OHCI_TD_GET_CC(le32toh(std->td.td_flags)), 1926 (u_long)le32toh(std->td.td_cbp), 1927 (u_long)le32toh(std->td.td_nexttd), 1928 (u_long)le32toh(std->td.td_be)); 1929 } 1930 1931 void 1932 ohci_dump_itd(ohci_soft_itd_t *sitd) 1933 { 1934 int i; 1935 1936 printf("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n" 1937 "bp0=0x%08lx next=0x%08lx be=0x%08lx\n", 1938 sitd, (u_long)sitd->physaddr, 1939 OHCI_ITD_GET_SF(le32toh(sitd->itd.itd_flags)), 1940 OHCI_ITD_GET_DI(le32toh(sitd->itd.itd_flags)), 1941 OHCI_ITD_GET_FC(le32toh(sitd->itd.itd_flags)), 1942 OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags)), 1943 (u_long)le32toh(sitd->itd.itd_bp0), 1944 (u_long)le32toh(sitd->itd.itd_nextitd), 1945 (u_long)le32toh(sitd->itd.itd_be)); 1946 for (i = 0; i < OHCI_ITD_NOFFSET; i++) 1947 printf("offs[%d]=0x%04x ", i, 1948 (u_int)le16toh(sitd->itd.itd_offset[i])); 1949 printf("\n"); 1950 } 1951 1952 void 1953 ohci_dump_itds(ohci_soft_itd_t *sitd) 1954 { 1955 for (; sitd; sitd = sitd->nextitd) 1956 ohci_dump_itd(sitd); 1957 } 1958 1959 void 1960 ohci_dump_ed(ohci_soft_ed_t *sed) 1961 { 1962 char sbuf[128], sbuf2[128]; 1963 1964 bitmask_snprintf((u_int32_t)le32toh(sed->ed.ed_flags), 1965 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO", 1966 sbuf, sizeof(sbuf)); 1967 bitmask_snprintf((u_int32_t)le32toh(sed->ed.ed_headp), 1968 "\20\1HALT\2CARRY", sbuf2, sizeof(sbuf2)); 1969 1970 printf("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d flags=%s\ntailp=0x%08lx " 1971 "headflags=%s headp=0x%08lx nexted=0x%08lx\n", 1972 sed, (u_long)sed->physaddr, 1973 OHCI_ED_GET_FA(le32toh(sed->ed.ed_flags)), 1974 OHCI_ED_GET_EN(le32toh(sed->ed.ed_flags)), 1975 OHCI_ED_GET_MAXP(le32toh(sed->ed.ed_flags)), sbuf, 1976 (u_long)le32toh(sed->ed.ed_tailp), sbuf2, 1977 (u_long)le32toh(sed->ed.ed_headp), 1978 (u_long)le32toh(sed->ed.ed_nexted)); 1979 } 1980 #endif 1981 1982 usbd_status 1983 ohci_open(usbd_pipe_handle pipe) 1984 { 1985 usbd_device_handle dev = pipe->device; 1986 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1987 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1988 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1989 u_int8_t addr = dev->address; 1990 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1991 ohci_soft_ed_t *sed; 1992 ohci_soft_td_t *std; 1993 ohci_soft_itd_t *sitd; 1994 ohci_physaddr_t tdphys; 1995 u_int32_t fmt; 1996 usbd_status err; 1997 int s; 1998 int ival; 1999 2000 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 2001 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 2002 2003 if (sc->sc_dying) 2004 return (USBD_IOERROR); 2005 2006 std = NULL; 2007 sed = NULL; 2008 2009 if (addr == sc->sc_addr) { 2010 switch (ed->bEndpointAddress) { 2011 case USB_CONTROL_ENDPOINT: 2012 pipe->methods = &ohci_root_ctrl_methods; 2013 break; 2014 case UE_DIR_IN | OHCI_INTR_ENDPT: 2015 pipe->methods = &ohci_root_intr_methods; 2016 break; 2017 default: 2018 return (USBD_INVAL); 2019 } 2020 } else { 2021 sed = ohci_alloc_sed(sc); 2022 if (sed == NULL) 2023 goto bad0; 2024 opipe->sed = sed; 2025 if (xfertype == UE_ISOCHRONOUS) { 2026 sitd = ohci_alloc_sitd(sc); 2027 if (sitd == NULL) 2028 goto bad1; 2029 opipe->tail.itd = sitd; 2030 tdphys = sitd->physaddr; 2031 fmt = OHCI_ED_FORMAT_ISO; 2032 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 2033 fmt |= OHCI_ED_DIR_IN; 2034 else 2035 fmt |= OHCI_ED_DIR_OUT; 2036 } else { 2037 std = ohci_alloc_std(sc); 2038 if (std == NULL) 2039 goto bad1; 2040 opipe->tail.td = std; 2041 tdphys = std->physaddr; 2042 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD; 2043 } 2044 sed->ed.ed_flags = htole32( 2045 OHCI_ED_SET_FA(addr) | 2046 OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) | 2047 (dev->speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) | 2048 fmt | 2049 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 2050 sed->ed.ed_headp = sed->ed.ed_tailp = htole32(tdphys); 2051 2052 switch (xfertype) { 2053 case UE_CONTROL: 2054 pipe->methods = &ohci_device_ctrl_methods; 2055 err = usb_allocmem(&sc->sc_bus, 2056 sizeof(usb_device_request_t), 2057 0, &opipe->u.ctl.reqdma); 2058 if (err) 2059 goto bad; 2060 s = splusb(); 2061 ohci_add_ed(sed, sc->sc_ctrl_head); 2062 splx(s); 2063 break; 2064 case UE_INTERRUPT: 2065 pipe->methods = &ohci_device_intr_methods; 2066 ival = pipe->interval; 2067 if (ival == USBD_DEFAULT_INTERVAL) 2068 ival = ed->bInterval; 2069 return (ohci_device_setintr(sc, opipe, ival)); 2070 case UE_ISOCHRONOUS: 2071 pipe->methods = &ohci_device_isoc_methods; 2072 return (ohci_setup_isoc(pipe)); 2073 case UE_BULK: 2074 pipe->methods = &ohci_device_bulk_methods; 2075 s = splusb(); 2076 ohci_add_ed(sed, sc->sc_bulk_head); 2077 splx(s); 2078 break; 2079 } 2080 } 2081 return (USBD_NORMAL_COMPLETION); 2082 2083 bad: 2084 if (std != NULL) 2085 ohci_free_std(sc, std); 2086 bad1: 2087 if (sed != NULL) 2088 ohci_free_sed(sc, sed); 2089 bad0: 2090 return (USBD_NOMEM); 2091 2092 } 2093 2094 /* 2095 * Close a reqular pipe. 2096 * Assumes that there are no pending transactions. 2097 */ 2098 void 2099 ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head) 2100 { 2101 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2102 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2103 ohci_soft_ed_t *sed = opipe->sed; 2104 int s; 2105 2106 s = splusb(); 2107 #ifdef DIAGNOSTIC 2108 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 2109 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2110 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) { 2111 ohci_soft_td_t *std; 2112 std = ohci_hash_find_td(sc, le32toh(sed->ed.ed_headp)); 2113 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 2114 "tl=0x%x pipe=%p, std=%p\n", sed, 2115 (int)le32toh(sed->ed.ed_headp), 2116 (int)le32toh(sed->ed.ed_tailp), 2117 pipe, std); 2118 #ifdef USB_DEBUG 2119 usbd_dump_pipe(&opipe->pipe); 2120 #endif 2121 #ifdef OHCI_DEBUG 2122 ohci_dump_ed(sed); 2123 if (std) 2124 ohci_dump_td(std); 2125 #endif 2126 usb_delay_ms(&sc->sc_bus, 2); 2127 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2128 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) 2129 printf("ohci_close_pipe: pipe still not empty\n"); 2130 } 2131 #endif 2132 ohci_rem_ed(sed, head); 2133 /* Make sure the host controller is not touching this ED */ 2134 usb_delay_ms(&sc->sc_bus, 1); 2135 splx(s); 2136 ohci_free_sed(sc, opipe->sed); 2137 } 2138 2139 /* 2140 * Abort a device request. 2141 * If this routine is called at splusb() it guarantees that the request 2142 * will be removed from the hardware scheduling and that the callback 2143 * for it will be called with USBD_CANCELLED status. 2144 * It's impossible to guarantee that the requested transfer will not 2145 * have happened since the hardware runs concurrently. 2146 * If the transaction has already happened we rely on the ordinary 2147 * interrupt processing to process it. 2148 */ 2149 void 2150 ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2151 { 2152 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2153 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 2154 ohci_soft_ed_t *sed = opipe->sed; 2155 ohci_soft_td_t *p, *n; 2156 ohci_physaddr_t headp; 2157 int s, hit; 2158 int wake; 2159 2160 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p sed=%p\n", xfer, opipe,sed)); 2161 2162 if (sc->sc_dying) { 2163 /* If we're dying, just do the software part. */ 2164 s = splusb(); 2165 xfer->status = status; /* make software ignore it */ 2166 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 2167 usb_transfer_complete(xfer); 2168 splx(s); 2169 } 2170 2171 if (xfer->device->bus->intr_context || !curproc) 2172 panic("ohci_abort_xfer: not in process context"); 2173 2174 /* 2175 * If an abort is already in progress then just wait for it to 2176 * complete and return. 2177 */ 2178 if (xfer->hcflags & UXFER_ABORTING) { 2179 DPRINTFN(2, ("ohci_abort_xfer: already aborting\n")); 2180 #ifdef DIAGNOSTIC 2181 if (status == USBD_TIMEOUT) 2182 printf("0hci_abort_xfer: TIMEOUT while aborting\n"); 2183 #endif 2184 /* Override the status which might be USBD_TIMEOUT. */ 2185 xfer->status = status; 2186 DPRINTFN(2, ("ohci_abort_xfer: waiting for abort to finish\n")); 2187 xfer->hcflags |= UXFER_ABORTWAIT; 2188 while (xfer->hcflags & UXFER_ABORTING) 2189 tsleep(&xfer->hcflags, PZERO, "ohciaw", 0); 2190 return; 2191 } 2192 xfer->hcflags |= UXFER_ABORTING; 2193 2194 /* 2195 * Step 1: Make interrupt routine and hardware ignore xfer. 2196 */ 2197 s = splusb(); 2198 xfer->status = status; /* make software ignore it */ 2199 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 2200 splx(s); 2201 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed)); 2202 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 2203 2204 /* 2205 * Step 2: Wait until we know hardware has finished any possible 2206 * use of the xfer. Also make sure the soft interrupt routine 2207 * has run. 2208 */ 2209 usb_delay_ms(opipe->pipe.device->bus, 20); /* Hardware finishes in 1ms */ 2210 s = splusb(); 2211 #ifdef USB_USE_SOFTINTR 2212 sc->sc_softwake = 1; 2213 #endif /* USB_USE_SOFTINTR */ 2214 usb_schedsoftintr(&sc->sc_bus); 2215 #ifdef USB_USE_SOFTINTR 2216 tsleep(&sc->sc_softwake, PZERO, "ohciab", 0); 2217 #endif /* USB_USE_SOFTINTR */ 2218 splx(s); 2219 2220 /* 2221 * Step 3: Remove any vestiges of the xfer from the hardware. 2222 * The complication here is that the hardware may have executed 2223 * beyond the xfer we're trying to abort. So as we're scanning 2224 * the TDs of this xfer we check if the hardware points to 2225 * any of them. 2226 */ 2227 s = splusb(); /* XXX why? */ 2228 p = xfer->hcpriv; 2229 #ifdef DIAGNOSTIC 2230 if (p == NULL) { 2231 xfer->hcflags &= ~UXFER_ABORTING; /* XXX */ 2232 splx(s); 2233 printf("ohci_abort_xfer: hcpriv is NULL\n"); 2234 return; 2235 } 2236 #endif 2237 #ifdef OHCI_DEBUG 2238 if (ohcidebug > 1) { 2239 DPRINTF(("ohci_abort_xfer: sed=\n")); 2240 ohci_dump_ed(sed); 2241 ohci_dump_tds(p); 2242 } 2243 #endif 2244 headp = le32toh(sed->ed.ed_headp) & OHCI_HEADMASK; 2245 hit = 0; 2246 for (; p->xfer == xfer; p = n) { 2247 hit |= headp == p->physaddr; 2248 n = p->nexttd; 2249 ohci_free_std(sc, p); 2250 } 2251 /* Zap headp register if hardware pointed inside the xfer. */ 2252 if (hit) { 2253 DPRINTFN(1,("ohci_abort_xfer: set hd=0x%08x, tl=0x%08x\n", 2254 (int)p->physaddr, (int)le32toh(sed->ed.ed_tailp))); 2255 sed->ed.ed_headp = htole32(p->physaddr); /* unlink TDs */ 2256 } else { 2257 DPRINTFN(1,("ohci_abort_xfer: no hit\n")); 2258 } 2259 2260 /* 2261 * Step 4: Turn on hardware again. 2262 */ 2263 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 2264 2265 /* 2266 * Step 5: Execute callback. 2267 */ 2268 wake = xfer->hcflags & UXFER_ABORTWAIT; 2269 xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT); 2270 usb_transfer_complete(xfer); 2271 if (wake) 2272 wakeup(&xfer->hcflags); 2273 2274 splx(s); 2275 } 2276 2277 /* 2278 * Data structures and routines to emulate the root hub. 2279 */ 2280 Static usb_device_descriptor_t ohci_devd = { 2281 USB_DEVICE_DESCRIPTOR_SIZE, 2282 UDESC_DEVICE, /* type */ 2283 {0x00, 0x01}, /* USB version */ 2284 UDCLASS_HUB, /* class */ 2285 UDSUBCLASS_HUB, /* subclass */ 2286 UDPROTO_FSHUB, 2287 64, /* max packet */ 2288 {0},{0},{0x00,0x01}, /* device id */ 2289 1,2,0, /* string indicies */ 2290 1 /* # of configurations */ 2291 }; 2292 2293 Static usb_config_descriptor_t ohci_confd = { 2294 USB_CONFIG_DESCRIPTOR_SIZE, 2295 UDESC_CONFIG, 2296 {USB_CONFIG_DESCRIPTOR_SIZE + 2297 USB_INTERFACE_DESCRIPTOR_SIZE + 2298 USB_ENDPOINT_DESCRIPTOR_SIZE}, 2299 1, 2300 1, 2301 0, 2302 UC_SELF_POWERED, 2303 0 /* max power */ 2304 }; 2305 2306 Static usb_interface_descriptor_t ohci_ifcd = { 2307 USB_INTERFACE_DESCRIPTOR_SIZE, 2308 UDESC_INTERFACE, 2309 0, 2310 0, 2311 1, 2312 UICLASS_HUB, 2313 UISUBCLASS_HUB, 2314 UIPROTO_FSHUB, 2315 0 2316 }; 2317 2318 Static usb_endpoint_descriptor_t ohci_endpd = { 2319 USB_ENDPOINT_DESCRIPTOR_SIZE, 2320 UDESC_ENDPOINT, 2321 UE_DIR_IN | OHCI_INTR_ENDPT, 2322 UE_INTERRUPT, 2323 {8, 0}, /* max packet */ 2324 255 2325 }; 2326 2327 Static usb_hub_descriptor_t ohci_hubd = { 2328 USB_HUB_DESCRIPTOR_SIZE, 2329 UDESC_HUB, 2330 0, 2331 {0,0}, 2332 0, 2333 0, 2334 {0}, 2335 }; 2336 2337 Static int 2338 ohci_str(usb_string_descriptor_t *p, int l, const char *s) 2339 { 2340 int i; 2341 2342 if (l == 0) 2343 return (0); 2344 p->bLength = 2 * strlen(s) + 2; 2345 if (l == 1) 2346 return (1); 2347 p->bDescriptorType = UDESC_STRING; 2348 l -= 2; 2349 for (i = 0; s[i] && l > 1; i++, l -= 2) 2350 USETW2(p->bString[i], 0, s[i]); 2351 return (2*i+2); 2352 } 2353 2354 /* 2355 * Simulate a hardware hub by handling all the necessary requests. 2356 */ 2357 Static usbd_status 2358 ohci_root_ctrl_transfer(usbd_xfer_handle xfer) 2359 { 2360 usbd_status err; 2361 2362 /* Insert last in queue. */ 2363 err = usb_insert_transfer(xfer); 2364 if (err) 2365 return (err); 2366 2367 /* Pipe isn't running, start first */ 2368 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2369 } 2370 2371 Static usbd_status 2372 ohci_root_ctrl_start(usbd_xfer_handle xfer) 2373 { 2374 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2375 usb_device_request_t *req; 2376 void *buf = NULL; 2377 int port, i; 2378 int s, len, value, index, l, totlen = 0; 2379 usb_port_status_t ps; 2380 usb_hub_descriptor_t hubd; 2381 usbd_status err; 2382 u_int32_t v; 2383 2384 if (sc->sc_dying) 2385 return (USBD_IOERROR); 2386 2387 #ifdef DIAGNOSTIC 2388 if (!(xfer->rqflags & URQ_REQUEST)) 2389 /* XXX panic */ 2390 return (USBD_INVAL); 2391 #endif 2392 req = &xfer->request; 2393 2394 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 2395 req->bmRequestType, req->bRequest)); 2396 2397 len = UGETW(req->wLength); 2398 value = UGETW(req->wValue); 2399 index = UGETW(req->wIndex); 2400 2401 if (len != 0) 2402 buf = KERNADDR(&xfer->dmabuf, 0); 2403 2404 #define C(x,y) ((x) | ((y) << 8)) 2405 switch(C(req->bRequest, req->bmRequestType)) { 2406 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 2407 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 2408 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 2409 /* 2410 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 2411 * for the integrated root hub. 2412 */ 2413 break; 2414 case C(UR_GET_CONFIG, UT_READ_DEVICE): 2415 if (len > 0) { 2416 *(u_int8_t *)buf = sc->sc_conf; 2417 totlen = 1; 2418 } 2419 break; 2420 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2421 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 2422 switch(value >> 8) { 2423 case UDESC_DEVICE: 2424 if ((value & 0xff) != 0) { 2425 err = USBD_IOERROR; 2426 goto ret; 2427 } 2428 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 2429 USETW(ohci_devd.idVendor, sc->sc_id_vendor); 2430 memcpy(buf, &ohci_devd, l); 2431 break; 2432 case UDESC_CONFIG: 2433 if ((value & 0xff) != 0) { 2434 err = USBD_IOERROR; 2435 goto ret; 2436 } 2437 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 2438 memcpy(buf, &ohci_confd, l); 2439 buf = (char *)buf + l; 2440 len -= l; 2441 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 2442 totlen += l; 2443 memcpy(buf, &ohci_ifcd, l); 2444 buf = (char *)buf + l; 2445 len -= l; 2446 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 2447 totlen += l; 2448 memcpy(buf, &ohci_endpd, l); 2449 break; 2450 case UDESC_STRING: 2451 if (len == 0) 2452 break; 2453 *(u_int8_t *)buf = 0; 2454 totlen = 1; 2455 switch (value & 0xff) { 2456 case 0: /* Language table */ 2457 totlen = ohci_str(buf, len, "\001"); 2458 break; 2459 case 1: /* Vendor */ 2460 totlen = ohci_str(buf, len, sc->sc_vendor); 2461 break; 2462 case 2: /* Product */ 2463 totlen = ohci_str(buf, len, "OHCI root hub"); 2464 break; 2465 } 2466 break; 2467 default: 2468 err = USBD_IOERROR; 2469 goto ret; 2470 } 2471 break; 2472 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 2473 if (len > 0) { 2474 *(u_int8_t *)buf = 0; 2475 totlen = 1; 2476 } 2477 break; 2478 case C(UR_GET_STATUS, UT_READ_DEVICE): 2479 if (len > 1) { 2480 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 2481 totlen = 2; 2482 } 2483 break; 2484 case C(UR_GET_STATUS, UT_READ_INTERFACE): 2485 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 2486 if (len > 1) { 2487 USETW(((usb_status_t *)buf)->wStatus, 0); 2488 totlen = 2; 2489 } 2490 break; 2491 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 2492 if (value >= USB_MAX_DEVICES) { 2493 err = USBD_IOERROR; 2494 goto ret; 2495 } 2496 sc->sc_addr = value; 2497 break; 2498 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 2499 if (value != 0 && value != 1) { 2500 err = USBD_IOERROR; 2501 goto ret; 2502 } 2503 sc->sc_conf = value; 2504 break; 2505 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 2506 break; 2507 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 2508 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 2509 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 2510 err = USBD_IOERROR; 2511 goto ret; 2512 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 2513 break; 2514 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 2515 break; 2516 /* Hub requests */ 2517 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2518 break; 2519 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2520 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 2521 "port=%d feature=%d\n", 2522 index, value)); 2523 if (index < 1 || index > sc->sc_noport) { 2524 err = USBD_IOERROR; 2525 goto ret; 2526 } 2527 port = OHCI_RH_PORT_STATUS(index); 2528 switch(value) { 2529 case UHF_PORT_ENABLE: 2530 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2531 break; 2532 case UHF_PORT_SUSPEND: 2533 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2534 break; 2535 case UHF_PORT_POWER: 2536 /* Yes, writing to the LOW_SPEED bit clears power. */ 2537 OWRITE4(sc, port, UPS_LOW_SPEED); 2538 break; 2539 case UHF_C_PORT_CONNECTION: 2540 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2541 break; 2542 case UHF_C_PORT_ENABLE: 2543 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2544 break; 2545 case UHF_C_PORT_SUSPEND: 2546 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2547 break; 2548 case UHF_C_PORT_OVER_CURRENT: 2549 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2550 break; 2551 case UHF_C_PORT_RESET: 2552 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2553 break; 2554 default: 2555 err = USBD_IOERROR; 2556 goto ret; 2557 } 2558 switch(value) { 2559 case UHF_C_PORT_CONNECTION: 2560 case UHF_C_PORT_ENABLE: 2561 case UHF_C_PORT_SUSPEND: 2562 case UHF_C_PORT_OVER_CURRENT: 2563 case UHF_C_PORT_RESET: 2564 /* Enable RHSC interrupt if condition is cleared. */ 2565 if ((OREAD4(sc, port) >> 16) == 0) 2566 ohci_rhsc_enable(sc); 2567 break; 2568 default: 2569 break; 2570 } 2571 break; 2572 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2573 if ((value & 0xff) != 0) { 2574 err = USBD_IOERROR; 2575 goto ret; 2576 } 2577 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2578 hubd = ohci_hubd; 2579 hubd.bNbrPorts = sc->sc_noport; 2580 USETW(hubd.wHubCharacteristics, 2581 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2582 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2583 /* XXX overcurrent */ 2584 ); 2585 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2586 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2587 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2588 hubd.DeviceRemovable[i++] = (u_int8_t)v; 2589 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2590 l = min(len, hubd.bDescLength); 2591 totlen = l; 2592 memcpy(buf, &hubd, l); 2593 break; 2594 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2595 if (len != 4) { 2596 err = USBD_IOERROR; 2597 goto ret; 2598 } 2599 memset(buf, 0, len); /* ? XXX */ 2600 totlen = len; 2601 break; 2602 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2603 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 2604 index)); 2605 if (index < 1 || index > sc->sc_noport) { 2606 err = USBD_IOERROR; 2607 goto ret; 2608 } 2609 if (len != 4) { 2610 err = USBD_IOERROR; 2611 goto ret; 2612 } 2613 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2614 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 2615 v)); 2616 USETW(ps.wPortStatus, v); 2617 USETW(ps.wPortChange, v >> 16); 2618 l = min(len, sizeof ps); 2619 memcpy(buf, &ps, l); 2620 totlen = l; 2621 break; 2622 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2623 err = USBD_IOERROR; 2624 goto ret; 2625 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2626 break; 2627 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2628 if (index < 1 || index > sc->sc_noport) { 2629 err = USBD_IOERROR; 2630 goto ret; 2631 } 2632 port = OHCI_RH_PORT_STATUS(index); 2633 switch(value) { 2634 case UHF_PORT_ENABLE: 2635 OWRITE4(sc, port, UPS_PORT_ENABLED); 2636 break; 2637 case UHF_PORT_SUSPEND: 2638 OWRITE4(sc, port, UPS_SUSPEND); 2639 break; 2640 case UHF_PORT_RESET: 2641 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 2642 index)); 2643 OWRITE4(sc, port, UPS_RESET); 2644 for (i = 0; i < 5; i++) { 2645 usb_delay_ms(&sc->sc_bus, 2646 USB_PORT_ROOT_RESET_DELAY); 2647 if (sc->sc_dying) { 2648 err = USBD_IOERROR; 2649 goto ret; 2650 } 2651 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2652 break; 2653 } 2654 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 2655 index, OREAD4(sc, port))); 2656 break; 2657 case UHF_PORT_POWER: 2658 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 2659 "%d\n", index)); 2660 OWRITE4(sc, port, UPS_PORT_POWER); 2661 break; 2662 default: 2663 err = USBD_IOERROR; 2664 goto ret; 2665 } 2666 break; 2667 default: 2668 err = USBD_IOERROR; 2669 goto ret; 2670 } 2671 xfer->actlen = totlen; 2672 err = USBD_NORMAL_COMPLETION; 2673 ret: 2674 xfer->status = err; 2675 s = splusb(); 2676 usb_transfer_complete(xfer); 2677 splx(s); 2678 return (USBD_IN_PROGRESS); 2679 } 2680 2681 /* Abort a root control request. */ 2682 Static void 2683 ohci_root_ctrl_abort(usbd_xfer_handle xfer) 2684 { 2685 /* Nothing to do, all transfers are synchronous. */ 2686 } 2687 2688 /* Close the root pipe. */ 2689 Static void 2690 ohci_root_ctrl_close(usbd_pipe_handle pipe) 2691 { 2692 DPRINTF(("ohci_root_ctrl_close\n")); 2693 /* Nothing to do. */ 2694 } 2695 2696 Static usbd_status 2697 ohci_root_intr_transfer(usbd_xfer_handle xfer) 2698 { 2699 usbd_status err; 2700 2701 /* Insert last in queue. */ 2702 err = usb_insert_transfer(xfer); 2703 if (err) 2704 return (err); 2705 2706 /* Pipe isn't running, start first */ 2707 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2708 } 2709 2710 Static usbd_status 2711 ohci_root_intr_start(usbd_xfer_handle xfer) 2712 { 2713 usbd_pipe_handle pipe = xfer->pipe; 2714 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2715 2716 if (sc->sc_dying) 2717 return (USBD_IOERROR); 2718 2719 sc->sc_intrxfer = xfer; 2720 2721 return (USBD_IN_PROGRESS); 2722 } 2723 2724 /* Abort a root interrupt request. */ 2725 Static void 2726 ohci_root_intr_abort(usbd_xfer_handle xfer) 2727 { 2728 int s; 2729 2730 if (xfer->pipe->intrxfer == xfer) { 2731 DPRINTF(("ohci_root_intr_abort: remove\n")); 2732 xfer->pipe->intrxfer = NULL; 2733 } 2734 xfer->status = USBD_CANCELLED; 2735 s = splusb(); 2736 usb_transfer_complete(xfer); 2737 splx(s); 2738 } 2739 2740 /* Close the root pipe. */ 2741 Static void 2742 ohci_root_intr_close(usbd_pipe_handle pipe) 2743 { 2744 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2745 2746 DPRINTF(("ohci_root_intr_close\n")); 2747 2748 sc->sc_intrxfer = NULL; 2749 } 2750 2751 /************************/ 2752 2753 Static usbd_status 2754 ohci_device_ctrl_transfer(usbd_xfer_handle xfer) 2755 { 2756 usbd_status err; 2757 2758 /* Insert last in queue. */ 2759 err = usb_insert_transfer(xfer); 2760 if (err) 2761 return (err); 2762 2763 /* Pipe isn't running, start first */ 2764 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2765 } 2766 2767 Static usbd_status 2768 ohci_device_ctrl_start(usbd_xfer_handle xfer) 2769 { 2770 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2771 usbd_status err; 2772 2773 if (sc->sc_dying) 2774 return (USBD_IOERROR); 2775 2776 #ifdef DIAGNOSTIC 2777 if (!(xfer->rqflags & URQ_REQUEST)) { 2778 /* XXX panic */ 2779 printf("ohci_device_ctrl_transfer: not a request\n"); 2780 return (USBD_INVAL); 2781 } 2782 #endif 2783 2784 err = ohci_device_request(xfer); 2785 if (err) 2786 return (err); 2787 2788 if (sc->sc_bus.use_polling) 2789 ohci_waitintr(sc, xfer); 2790 return (USBD_IN_PROGRESS); 2791 } 2792 2793 /* Abort a device control request. */ 2794 Static void 2795 ohci_device_ctrl_abort(usbd_xfer_handle xfer) 2796 { 2797 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer)); 2798 ohci_abort_xfer(xfer, USBD_CANCELLED); 2799 } 2800 2801 /* Close a device control pipe. */ 2802 Static void 2803 ohci_device_ctrl_close(usbd_pipe_handle pipe) 2804 { 2805 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2806 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2807 2808 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe)); 2809 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2810 ohci_free_std(sc, opipe->tail.td); 2811 } 2812 2813 /************************/ 2814 2815 Static void 2816 ohci_device_clear_toggle(usbd_pipe_handle pipe) 2817 { 2818 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2819 2820 opipe->sed->ed.ed_headp &= htole32(~OHCI_TOGGLECARRY); 2821 } 2822 2823 Static void 2824 ohci_noop(usbd_pipe_handle pipe) 2825 { 2826 } 2827 2828 Static usbd_status 2829 ohci_device_bulk_transfer(usbd_xfer_handle xfer) 2830 { 2831 usbd_status err; 2832 2833 /* Insert last in queue. */ 2834 err = usb_insert_transfer(xfer); 2835 if (err) 2836 return (err); 2837 2838 /* Pipe isn't running, start first */ 2839 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2840 } 2841 2842 Static usbd_status 2843 ohci_device_bulk_start(usbd_xfer_handle xfer) 2844 { 2845 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2846 usbd_device_handle dev = opipe->pipe.device; 2847 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2848 int addr = dev->address; 2849 ohci_soft_td_t *data, *tail, *tdp; 2850 ohci_soft_ed_t *sed; 2851 int s, len, isread, endpt; 2852 usbd_status err; 2853 2854 if (sc->sc_dying) 2855 return (USBD_IOERROR); 2856 2857 #ifdef DIAGNOSTIC 2858 if (xfer->rqflags & URQ_REQUEST) { 2859 /* XXX panic */ 2860 printf("ohci_device_bulk_start: a request\n"); 2861 return (USBD_INVAL); 2862 } 2863 #endif 2864 2865 len = xfer->length; 2866 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 2867 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2868 sed = opipe->sed; 2869 2870 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d " 2871 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags, 2872 endpt)); 2873 2874 opipe->u.bulk.isread = isread; 2875 opipe->u.bulk.length = len; 2876 2877 /* Update device address */ 2878 sed->ed.ed_flags = htole32( 2879 (le32toh(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) | 2880 OHCI_ED_SET_FA(addr)); 2881 2882 /* Allocate a chain of new TDs (including a new tail). */ 2883 data = opipe->tail.td; 2884 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 2885 data, &tail); 2886 /* We want interrupt at the end of the transfer. */ 2887 tail->td.td_flags &= htole32(~OHCI_TD_INTR_MASK); 2888 tail->td.td_flags |= htole32(OHCI_TD_SET_DI(1)); 2889 tail->flags |= OHCI_CALL_DONE; 2890 tail = tail->nexttd; /* point at sentinel */ 2891 if (err) 2892 return (err); 2893 2894 tail->xfer = NULL; 2895 xfer->hcpriv = data; 2896 2897 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x " 2898 "td_cbp=0x%08x td_be=0x%08x\n", 2899 (int)le32toh(sed->ed.ed_flags), 2900 (int)le32toh(data->td.td_flags), 2901 (int)le32toh(data->td.td_cbp), 2902 (int)le32toh(data->td.td_be))); 2903 2904 #ifdef OHCI_DEBUG 2905 if (ohcidebug > 5) { 2906 ohci_dump_ed(sed); 2907 ohci_dump_tds(data); 2908 } 2909 #endif 2910 2911 /* Insert ED in schedule */ 2912 s = splusb(); 2913 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 2914 tdp->xfer = xfer; 2915 } 2916 sed->ed.ed_tailp = htole32(tail->physaddr); 2917 opipe->tail.td = tail; 2918 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 2919 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 2920 if (xfer->timeout && !sc->sc_bus.use_polling) { 2921 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2922 ohci_timeout, xfer); 2923 } 2924 2925 #if 0 2926 /* This goes wrong if we are too slow. */ 2927 if (ohcidebug > 10) { 2928 delay(10000); 2929 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2930 OREAD4(sc, OHCI_COMMAND_STATUS))); 2931 ohci_dump_ed(sed); 2932 ohci_dump_tds(data); 2933 } 2934 #endif 2935 2936 splx(s); 2937 2938 return (USBD_IN_PROGRESS); 2939 } 2940 2941 Static void 2942 ohci_device_bulk_abort(usbd_xfer_handle xfer) 2943 { 2944 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer)); 2945 ohci_abort_xfer(xfer, USBD_CANCELLED); 2946 } 2947 2948 /* 2949 * Close a device bulk pipe. 2950 */ 2951 Static void 2952 ohci_device_bulk_close(usbd_pipe_handle pipe) 2953 { 2954 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2955 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2956 2957 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe)); 2958 ohci_close_pipe(pipe, sc->sc_bulk_head); 2959 ohci_free_std(sc, opipe->tail.td); 2960 } 2961 2962 /************************/ 2963 2964 Static usbd_status 2965 ohci_device_intr_transfer(usbd_xfer_handle xfer) 2966 { 2967 usbd_status err; 2968 2969 /* Insert last in queue. */ 2970 err = usb_insert_transfer(xfer); 2971 if (err) 2972 return (err); 2973 2974 /* Pipe isn't running, start first */ 2975 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2976 } 2977 2978 Static usbd_status 2979 ohci_device_intr_start(usbd_xfer_handle xfer) 2980 { 2981 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2982 usbd_device_handle dev = opipe->pipe.device; 2983 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2984 ohci_soft_ed_t *sed = opipe->sed; 2985 ohci_soft_td_t *data, *tail; 2986 int len; 2987 int s; 2988 2989 if (sc->sc_dying) 2990 return (USBD_IOERROR); 2991 2992 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d " 2993 "flags=%d priv=%p\n", 2994 xfer, xfer->length, xfer->flags, xfer->priv)); 2995 2996 #ifdef DIAGNOSTIC 2997 if (xfer->rqflags & URQ_REQUEST) 2998 panic("ohci_device_intr_transfer: a request"); 2999 #endif 3000 3001 len = xfer->length; 3002 3003 data = opipe->tail.td; 3004 tail = ohci_alloc_std(sc); 3005 if (tail == NULL) 3006 return (USBD_NOMEM); 3007 tail->xfer = NULL; 3008 3009 data->td.td_flags = htole32( 3010 OHCI_TD_IN | OHCI_TD_NOCC | 3011 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 3012 if (xfer->flags & USBD_SHORT_XFER_OK) 3013 data->td.td_flags |= htole32(OHCI_TD_R); 3014 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf, 0)); 3015 data->nexttd = tail; 3016 data->td.td_nexttd = htole32(tail->physaddr); 3017 data->td.td_be = htole32(le32toh(data->td.td_cbp) + len - 1); 3018 data->len = len; 3019 data->xfer = xfer; 3020 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 3021 xfer->hcpriv = data; 3022 3023 #ifdef OHCI_DEBUG 3024 if (ohcidebug > 5) { 3025 DPRINTF(("ohci_device_intr_transfer:\n")); 3026 ohci_dump_ed(sed); 3027 ohci_dump_tds(data); 3028 } 3029 #endif 3030 3031 /* Insert ED in schedule */ 3032 s = splusb(); 3033 sed->ed.ed_tailp = htole32(tail->physaddr); 3034 opipe->tail.td = tail; 3035 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 3036 3037 #if 0 3038 /* 3039 * This goes horribly wrong, printing thousands of descriptors, 3040 * because false references are followed due to the fact that the 3041 * TD is gone. 3042 */ 3043 if (ohcidebug > 5) { 3044 usb_delay_ms(&sc->sc_bus, 5); 3045 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 3046 OREAD4(sc, OHCI_COMMAND_STATUS))); 3047 ohci_dump_ed(sed); 3048 ohci_dump_tds(data); 3049 } 3050 #endif 3051 splx(s); 3052 3053 return (USBD_IN_PROGRESS); 3054 } 3055 3056 /* Abort a device control request. */ 3057 Static void 3058 ohci_device_intr_abort(usbd_xfer_handle xfer) 3059 { 3060 if (xfer->pipe->intrxfer == xfer) { 3061 DPRINTF(("ohci_device_intr_abort: remove\n")); 3062 xfer->pipe->intrxfer = NULL; 3063 } 3064 ohci_abort_xfer(xfer, USBD_CANCELLED); 3065 } 3066 3067 /* Close a device interrupt pipe. */ 3068 Static void 3069 ohci_device_intr_close(usbd_pipe_handle pipe) 3070 { 3071 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3072 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3073 int nslots = opipe->u.intr.nslots; 3074 int pos = opipe->u.intr.pos; 3075 int j; 3076 ohci_soft_ed_t *p, *sed = opipe->sed; 3077 int s; 3078 3079 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 3080 pipe, nslots, pos)); 3081 s = splusb(); 3082 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 3083 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 3084 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) 3085 usb_delay_ms(&sc->sc_bus, 2); 3086 3087 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 3088 ; 3089 #ifdef DIAGNOSTIC 3090 if (p == NULL) 3091 panic("ohci_device_intr_close: ED not found"); 3092 #endif 3093 p->next = sed->next; 3094 p->ed.ed_nexted = sed->ed.ed_nexted; 3095 splx(s); 3096 3097 for (j = 0; j < nslots; j++) 3098 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 3099 3100 ohci_free_std(sc, opipe->tail.td); 3101 ohci_free_sed(sc, opipe->sed); 3102 } 3103 3104 Static usbd_status 3105 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival) 3106 { 3107 int i, j, s, best; 3108 u_int npoll, slow, shigh, nslots; 3109 u_int bestbw, bw; 3110 ohci_soft_ed_t *hsed, *sed = opipe->sed; 3111 3112 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 3113 if (ival == 0) { 3114 printf("ohci_setintr: 0 interval\n"); 3115 return (USBD_INVAL); 3116 } 3117 3118 npoll = OHCI_NO_INTRS; 3119 while (npoll > ival) 3120 npoll /= 2; 3121 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 3122 3123 /* 3124 * We now know which level in the tree the ED must go into. 3125 * Figure out which slot has most bandwidth left over. 3126 * Slots to examine: 3127 * npoll 3128 * 1 0 3129 * 2 1 2 3130 * 4 3 4 5 6 3131 * 8 7 8 9 10 11 12 13 14 3132 * N (N-1) .. (N-1+N-1) 3133 */ 3134 slow = npoll-1; 3135 shigh = slow + npoll; 3136 nslots = OHCI_NO_INTRS / npoll; 3137 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 3138 bw = 0; 3139 for (j = 0; j < nslots; j++) 3140 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 3141 if (bw < bestbw) { 3142 best = i; 3143 bestbw = bw; 3144 } 3145 } 3146 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 3147 best, slow, shigh, bestbw)); 3148 3149 s = splusb(); 3150 hsed = sc->sc_eds[best]; 3151 sed->next = hsed->next; 3152 sed->ed.ed_nexted = hsed->ed.ed_nexted; 3153 hsed->next = sed; 3154 hsed->ed.ed_nexted = htole32(sed->physaddr); 3155 splx(s); 3156 3157 for (j = 0; j < nslots; j++) 3158 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 3159 opipe->u.intr.nslots = nslots; 3160 opipe->u.intr.pos = best; 3161 3162 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 3163 return (USBD_NORMAL_COMPLETION); 3164 } 3165 3166 /***********************/ 3167 3168 usbd_status 3169 ohci_device_isoc_transfer(usbd_xfer_handle xfer) 3170 { 3171 usbd_status err; 3172 3173 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer)); 3174 3175 /* Put it on our queue, */ 3176 err = usb_insert_transfer(xfer); 3177 3178 /* bail out on error, */ 3179 if (err && err != USBD_IN_PROGRESS) 3180 return (err); 3181 3182 /* XXX should check inuse here */ 3183 3184 /* insert into schedule, */ 3185 ohci_device_isoc_enter(xfer); 3186 3187 /* and start if the pipe wasn't running */ 3188 if (!err) 3189 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 3190 3191 return (err); 3192 } 3193 3194 void 3195 ohci_device_isoc_enter(usbd_xfer_handle xfer) 3196 { 3197 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3198 usbd_device_handle dev = opipe->pipe.device; 3199 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 3200 ohci_soft_ed_t *sed = opipe->sed; 3201 struct iso *iso = &opipe->u.iso; 3202 ohci_soft_itd_t *sitd, *nsitd; 3203 ohci_physaddr_t buf, offs, noffs, bp0; 3204 int i, ncur, nframes; 3205 int s; 3206 3207 DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p " 3208 "nframes=%d\n", 3209 iso->inuse, iso->next, xfer, xfer->nframes)); 3210 3211 if (sc->sc_dying) 3212 return; 3213 3214 if (iso->next == -1) { 3215 /* Not in use yet, schedule it a few frames ahead. */ 3216 iso->next = le32toh(sc->sc_hcca->hcca_frame_number) + 5; 3217 DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n", 3218 iso->next)); 3219 } 3220 3221 sitd = opipe->tail.itd; 3222 buf = DMAADDR(&xfer->dmabuf, 0); 3223 bp0 = OHCI_PAGE(buf); 3224 offs = OHCI_PAGE_OFFSET(buf); 3225 nframes = xfer->nframes; 3226 xfer->hcpriv = sitd; 3227 for (i = ncur = 0; i < nframes; i++, ncur++) { 3228 noffs = offs + xfer->frlengths[i]; 3229 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ 3230 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */ 3231 3232 /* Allocate next ITD */ 3233 nsitd = ohci_alloc_sitd(sc); 3234 if (nsitd == NULL) { 3235 /* XXX what now? */ 3236 printf("%s: isoc TD alloc failed\n", 3237 USBDEVNAME(sc->sc_bus.bdev)); 3238 return; 3239 } 3240 3241 /* Fill current ITD */ 3242 sitd->itd.itd_flags = htole32( 3243 OHCI_ITD_NOCC | 3244 OHCI_ITD_SET_SF(iso->next) | 3245 OHCI_ITD_SET_DI(6) | /* delay intr a little */ 3246 OHCI_ITD_SET_FC(ncur)); 3247 sitd->itd.itd_bp0 = htole32(bp0); 3248 sitd->nextitd = nsitd; 3249 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 3250 sitd->itd.itd_be = htole32(bp0 + offs - 1); 3251 sitd->xfer = xfer; 3252 sitd->flags = 0; 3253 3254 sitd = nsitd; 3255 iso->next = iso->next + ncur; 3256 bp0 = OHCI_PAGE(buf + offs); 3257 ncur = 0; 3258 } 3259 sitd->itd.itd_offset[ncur] = htole16(OHCI_ITD_MK_OFFS(offs)); 3260 offs = noffs; 3261 } 3262 nsitd = ohci_alloc_sitd(sc); 3263 if (nsitd == NULL) { 3264 /* XXX what now? */ 3265 printf("%s: isoc TD alloc failed\n", 3266 USBDEVNAME(sc->sc_bus.bdev)); 3267 return; 3268 } 3269 /* Fixup last used ITD */ 3270 sitd->itd.itd_flags = htole32( 3271 OHCI_ITD_NOCC | 3272 OHCI_ITD_SET_SF(iso->next) | 3273 OHCI_ITD_SET_DI(0) | 3274 OHCI_ITD_SET_FC(ncur)); 3275 sitd->itd.itd_bp0 = htole32(bp0); 3276 sitd->nextitd = nsitd; 3277 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 3278 sitd->itd.itd_be = htole32(bp0 + offs - 1); 3279 sitd->xfer = xfer; 3280 sitd->flags = OHCI_CALL_DONE; 3281 3282 iso->next = iso->next + ncur; 3283 iso->inuse += nframes; 3284 3285 xfer->actlen = offs; /* XXX pretend we did it all */ 3286 3287 xfer->status = USBD_IN_PROGRESS; 3288 3289 #ifdef OHCI_DEBUG 3290 if (ohcidebug > 5) { 3291 DPRINTF(("ohci_device_isoc_enter: frame=%d\n", 3292 le32toh(sc->sc_hcca->hcca_frame_number))); 3293 ohci_dump_itds(xfer->hcpriv); 3294 ohci_dump_ed(sed); 3295 } 3296 #endif 3297 3298 s = splusb(); 3299 sed->ed.ed_tailp = htole32(nsitd->physaddr); 3300 opipe->tail.itd = nsitd; 3301 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 3302 splx(s); 3303 3304 #ifdef OHCI_DEBUG 3305 if (ohcidebug > 5) { 3306 delay(150000); 3307 DPRINTF(("ohci_device_isoc_enter: after frame=%d\n", 3308 le32toh(sc->sc_hcca->hcca_frame_number))); 3309 ohci_dump_itds(xfer->hcpriv); 3310 ohci_dump_ed(sed); 3311 } 3312 #endif 3313 } 3314 3315 usbd_status 3316 ohci_device_isoc_start(usbd_xfer_handle xfer) 3317 { 3318 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3319 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3320 3321 DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer)); 3322 3323 if (sc->sc_dying) 3324 return (USBD_IOERROR); 3325 3326 #ifdef DIAGNOSTIC 3327 if (xfer->status != USBD_IN_PROGRESS) 3328 printf("ohci_device_isoc_start: not in progress %p\n", xfer); 3329 #endif 3330 3331 /* XXX anything to do? */ 3332 3333 return (USBD_IN_PROGRESS); 3334 } 3335 3336 void 3337 ohci_device_isoc_abort(usbd_xfer_handle xfer) 3338 { 3339 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3340 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3341 ohci_soft_ed_t *sed; 3342 ohci_soft_itd_t *sitd; 3343 int s; 3344 3345 s = splusb(); 3346 3347 DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer)); 3348 3349 /* Transfer is already done. */ 3350 if (xfer->status != USBD_NOT_STARTED && 3351 xfer->status != USBD_IN_PROGRESS) { 3352 splx(s); 3353 printf("ohci_device_isoc_abort: early return\n"); 3354 return; 3355 } 3356 3357 /* Give xfer the requested abort code. */ 3358 xfer->status = USBD_CANCELLED; 3359 3360 sed = opipe->sed; 3361 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 3362 3363 sitd = xfer->hcpriv; 3364 #ifdef DIAGNOSTIC 3365 if (sitd == NULL) { 3366 splx(s); 3367 printf("ohci_device_isoc_abort: hcpriv==0\n"); 3368 return; 3369 } 3370 #endif 3371 for (; sitd->xfer == xfer; sitd = sitd->nextitd) { 3372 #ifdef DIAGNOSTIC 3373 DPRINTFN(1,("abort sets done sitd=%p\n", sitd)); 3374 sitd->isdone = 1; 3375 #endif 3376 } 3377 3378 splx(s); 3379 3380 usb_delay_ms(&sc->sc_bus, OHCI_ITD_NOFFSET); 3381 3382 s = splusb(); 3383 3384 /* Run callback. */ 3385 usb_transfer_complete(xfer); 3386 3387 sed->ed.ed_headp = htole32(sitd->physaddr); /* unlink TDs */ 3388 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 3389 3390 splx(s); 3391 } 3392 3393 void 3394 ohci_device_isoc_done(usbd_xfer_handle xfer) 3395 { 3396 DPRINTFN(1,("ohci_device_isoc_done: xfer=%p\n", xfer)); 3397 } 3398 3399 usbd_status 3400 ohci_setup_isoc(usbd_pipe_handle pipe) 3401 { 3402 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3403 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3404 struct iso *iso = &opipe->u.iso; 3405 int s; 3406 3407 iso->next = -1; 3408 iso->inuse = 0; 3409 3410 s = splusb(); 3411 ohci_add_ed(opipe->sed, sc->sc_isoc_head); 3412 splx(s); 3413 3414 return (USBD_NORMAL_COMPLETION); 3415 } 3416 3417 void 3418 ohci_device_isoc_close(usbd_pipe_handle pipe) 3419 { 3420 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3421 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3422 3423 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe)); 3424 ohci_close_pipe(pipe, sc->sc_isoc_head); 3425 #ifdef DIAGNOSTIC 3426 opipe->tail.itd->isdone = 1; 3427 #endif 3428 ohci_free_sitd(sc, opipe->tail.itd); 3429 } 3430
Indexes created Tue Sep 23 07:09:52 GMT 2025