ohci.c revision 1.164
1 /* $NetBSD: ohci.c,v 1.164 2005/05/08 08:12:08 augustss Exp $ */ 2 /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */ 3 4 /* 5 * Copyright (c) 1998, 2004, 2005 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Lennart Augustsson (lennart (at) augustsson.net) at 10 * Carlstedt Research & Technology. 11 * This code is derived from software contributed to The NetBSD Foundation 12 * by Charles M. Hannum. 13 * 14 * Redistribution and use in source and binary forms, with or without 15 * modification, are permitted provided that the following conditions 16 * are met: 17 * 1. Redistributions of source code must retain the above copyright 18 * notice, this list of conditions and the following disclaimer. 19 * 2. Redistributions in binary form must reproduce the above copyright 20 * notice, this list of conditions and the following disclaimer in the 21 * documentation and/or other materials provided with the distribution. 22 * 3. All advertising materials mentioning features or use of this software 23 * must display the following acknowledgement: 24 * This product includes software developed by the NetBSD 25 * Foundation, Inc. and its contributors. 26 * 4. Neither the name of The NetBSD Foundation nor the names of its 27 * contributors may be used to endorse or promote products derived 28 * from this software without specific prior written permission. 29 * 30 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 31 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 32 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 33 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 34 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 35 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 36 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 37 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 38 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 39 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 40 * POSSIBILITY OF SUCH DAMAGE. 41 */ 42 43 /* 44 * USB Open Host Controller driver. 45 * 46 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html 47 * USB spec: http://www.usb.org/developers/docs/usbspec.zip 48 */ 49 50 #include <sys/cdefs.h> 51 __KERNEL_RCSID(0, "$NetBSD: ohci.c,v 1.164 2005/05/08 08:12:08 augustss Exp $"); 52 53 #include <sys/param.h> 54 #include <sys/systm.h> 55 #include <sys/malloc.h> 56 #if defined(__NetBSD__) || defined(__OpenBSD__) 57 #include <sys/kernel.h> 58 #include <sys/device.h> 59 #include <sys/select.h> 60 #include <uvm/uvm_extern.h> 61 #elif defined(__FreeBSD__) 62 #include <sys/module.h> 63 #include <sys/bus.h> 64 #include <machine/bus_pio.h> 65 #include <machine/bus_memio.h> 66 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 67 #include <machine/cpu.h> 68 #endif 69 #endif 70 #include <sys/proc.h> 71 #include <sys/queue.h> 72 73 #include <machine/bus.h> 74 #include <machine/endian.h> 75 76 #include <dev/usb/usb.h> 77 #include <dev/usb/usbdi.h> 78 #include <dev/usb/usbdivar.h> 79 #include <dev/usb/usb_mem.h> 80 #include <dev/usb/usb_quirks.h> 81 82 #include <dev/usb/ohcireg.h> 83 #include <dev/usb/ohcivar.h> 84 85 #if defined(__FreeBSD__) 86 #include <machine/clock.h> 87 88 #define delay(d) DELAY(d) 89 #endif 90 91 #if defined(__OpenBSD__) 92 struct cfdriver ohci_cd = { 93 NULL, "ohci", DV_DULL 94 }; 95 #endif 96 97 #ifdef OHCI_DEBUG 98 #define DPRINTF(x) if (ohcidebug) logprintf x 99 #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x 100 int ohcidebug = 0; 101 #ifndef __NetBSD__ 102 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 103 #endif 104 #else 105 #define DPRINTF(x) 106 #define DPRINTFN(n,x) 107 #endif 108 109 /* 110 * The OHCI controller is little endian, so on big endian machines 111 * the data stored in memory needs to be swapped. 112 */ 113 #if defined(__FreeBSD__) || defined(__OpenBSD__) 114 #if BYTE_ORDER == BIG_ENDIAN 115 #define htole32(x) (bswap32(x)) 116 #define le32toh(x) (bswap32(x)) 117 #else 118 #define htole32(x) (x) 119 #define le32toh(x) (x) 120 #endif 121 #endif 122 123 struct ohci_pipe; 124 125 Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *); 126 Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *); 127 128 Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *); 129 Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *); 130 131 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *); 132 Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *); 133 134 #if 0 135 Static void ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *, 136 ohci_soft_td_t *); 137 #endif 138 Static usbd_status ohci_alloc_std_chain(struct ohci_pipe *, 139 ohci_softc_t *, int, int, usbd_xfer_handle, 140 ohci_soft_td_t *, ohci_soft_td_t **); 141 142 Static void ohci_shutdown(void *v); 143 Static void ohci_power(int, void *); 144 Static usbd_status ohci_open(usbd_pipe_handle); 145 Static void ohci_poll(struct usbd_bus *); 146 Static void ohci_softintr(void *); 147 Static void ohci_waitintr(ohci_softc_t *, usbd_xfer_handle); 148 Static void ohci_rhsc(ohci_softc_t *, usbd_xfer_handle); 149 150 Static usbd_status ohci_device_request(usbd_xfer_handle xfer); 151 Static void ohci_add_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 152 Static void ohci_rem_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 153 Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *); 154 Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *); 155 Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t); 156 Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *); 157 Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *); 158 Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t); 159 160 Static usbd_status ohci_setup_isoc(usbd_pipe_handle pipe); 161 Static void ohci_device_isoc_enter(usbd_xfer_handle); 162 163 Static usbd_status ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 164 Static void ohci_freem(struct usbd_bus *, usb_dma_t *); 165 166 Static usbd_xfer_handle ohci_allocx(struct usbd_bus *); 167 Static void ohci_freex(struct usbd_bus *, usbd_xfer_handle); 168 169 Static usbd_status ohci_root_ctrl_transfer(usbd_xfer_handle); 170 Static usbd_status ohci_root_ctrl_start(usbd_xfer_handle); 171 Static void ohci_root_ctrl_abort(usbd_xfer_handle); 172 Static void ohci_root_ctrl_close(usbd_pipe_handle); 173 Static void ohci_root_ctrl_done(usbd_xfer_handle); 174 175 Static usbd_status ohci_root_intr_transfer(usbd_xfer_handle); 176 Static usbd_status ohci_root_intr_start(usbd_xfer_handle); 177 Static void ohci_root_intr_abort(usbd_xfer_handle); 178 Static void ohci_root_intr_close(usbd_pipe_handle); 179 Static void ohci_root_intr_done(usbd_xfer_handle); 180 181 Static usbd_status ohci_device_ctrl_transfer(usbd_xfer_handle); 182 Static usbd_status ohci_device_ctrl_start(usbd_xfer_handle); 183 Static void ohci_device_ctrl_abort(usbd_xfer_handle); 184 Static void ohci_device_ctrl_close(usbd_pipe_handle); 185 Static void ohci_device_ctrl_done(usbd_xfer_handle); 186 187 Static usbd_status ohci_device_bulk_transfer(usbd_xfer_handle); 188 Static usbd_status ohci_device_bulk_start(usbd_xfer_handle); 189 Static void ohci_device_bulk_abort(usbd_xfer_handle); 190 Static void ohci_device_bulk_close(usbd_pipe_handle); 191 Static void ohci_device_bulk_done(usbd_xfer_handle); 192 193 Static usbd_status ohci_device_intr_transfer(usbd_xfer_handle); 194 Static usbd_status ohci_device_intr_start(usbd_xfer_handle); 195 Static void ohci_device_intr_abort(usbd_xfer_handle); 196 Static void ohci_device_intr_close(usbd_pipe_handle); 197 Static void ohci_device_intr_done(usbd_xfer_handle); 198 199 Static usbd_status ohci_device_isoc_transfer(usbd_xfer_handle); 200 Static usbd_status ohci_device_isoc_start(usbd_xfer_handle); 201 Static void ohci_device_isoc_abort(usbd_xfer_handle); 202 Static void ohci_device_isoc_close(usbd_pipe_handle); 203 Static void ohci_device_isoc_done(usbd_xfer_handle); 204 205 Static usbd_status ohci_device_setintr(ohci_softc_t *sc, 206 struct ohci_pipe *pipe, int ival); 207 208 Static int ohci_str(usb_string_descriptor_t *, int, const char *); 209 210 Static void ohci_timeout(void *); 211 Static void ohci_timeout_task(void *); 212 Static void ohci_rhsc_enable(void *); 213 214 Static void ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *); 215 Static void ohci_abort_xfer(usbd_xfer_handle, usbd_status); 216 217 Static void ohci_device_clear_toggle(usbd_pipe_handle pipe); 218 Static void ohci_noop(usbd_pipe_handle pipe); 219 220 #ifdef OHCI_DEBUG 221 Static void ohci_dumpregs(ohci_softc_t *); 222 Static void ohci_dump_tds(ohci_soft_td_t *); 223 Static void ohci_dump_td(ohci_soft_td_t *); 224 Static void ohci_dump_ed(ohci_soft_ed_t *); 225 Static void ohci_dump_itd(ohci_soft_itd_t *); 226 Static void ohci_dump_itds(ohci_soft_itd_t *); 227 #endif 228 229 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 230 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 231 #define OWRITE1(sc, r, x) \ 232 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 233 #define OWRITE2(sc, r, x) \ 234 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 235 #define OWRITE4(sc, r, x) \ 236 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 237 #define OREAD1(sc, r) (OBARR(sc), bus_space_read_1((sc)->iot, (sc)->ioh, (r))) 238 #define OREAD2(sc, r) (OBARR(sc), bus_space_read_2((sc)->iot, (sc)->ioh, (r))) 239 #define OREAD4(sc, r) (OBARR(sc), bus_space_read_4((sc)->iot, (sc)->ioh, (r))) 240 241 /* Reverse the bits in a value 0 .. 31 */ 242 Static u_int8_t revbits[OHCI_NO_INTRS] = 243 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 244 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 245 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 246 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 247 248 struct ohci_pipe { 249 struct usbd_pipe pipe; 250 ohci_soft_ed_t *sed; 251 union { 252 ohci_soft_td_t *td; 253 ohci_soft_itd_t *itd; 254 } tail; 255 /* Info needed for different pipe kinds. */ 256 union { 257 /* Control pipe */ 258 struct { 259 usb_dma_t reqdma; 260 u_int length; 261 ohci_soft_td_t *setup, *data, *stat; 262 } ctl; 263 /* Interrupt pipe */ 264 struct { 265 int nslots; 266 int pos; 267 } intr; 268 /* Bulk pipe */ 269 struct { 270 u_int length; 271 int isread; 272 } bulk; 273 /* Iso pipe */ 274 struct iso { 275 int next, inuse; 276 } iso; 277 } u; 278 }; 279 280 #define OHCI_INTR_ENDPT 1 281 282 Static struct usbd_bus_methods ohci_bus_methods = { 283 ohci_open, 284 ohci_softintr, 285 ohci_poll, 286 ohci_allocm, 287 ohci_freem, 288 ohci_allocx, 289 ohci_freex, 290 }; 291 292 Static struct usbd_pipe_methods ohci_root_ctrl_methods = { 293 ohci_root_ctrl_transfer, 294 ohci_root_ctrl_start, 295 ohci_root_ctrl_abort, 296 ohci_root_ctrl_close, 297 ohci_noop, 298 ohci_root_ctrl_done, 299 }; 300 301 Static struct usbd_pipe_methods ohci_root_intr_methods = { 302 ohci_root_intr_transfer, 303 ohci_root_intr_start, 304 ohci_root_intr_abort, 305 ohci_root_intr_close, 306 ohci_noop, 307 ohci_root_intr_done, 308 }; 309 310 Static struct usbd_pipe_methods ohci_device_ctrl_methods = { 311 ohci_device_ctrl_transfer, 312 ohci_device_ctrl_start, 313 ohci_device_ctrl_abort, 314 ohci_device_ctrl_close, 315 ohci_noop, 316 ohci_device_ctrl_done, 317 }; 318 319 Static struct usbd_pipe_methods ohci_device_intr_methods = { 320 ohci_device_intr_transfer, 321 ohci_device_intr_start, 322 ohci_device_intr_abort, 323 ohci_device_intr_close, 324 ohci_device_clear_toggle, 325 ohci_device_intr_done, 326 }; 327 328 Static struct usbd_pipe_methods ohci_device_bulk_methods = { 329 ohci_device_bulk_transfer, 330 ohci_device_bulk_start, 331 ohci_device_bulk_abort, 332 ohci_device_bulk_close, 333 ohci_device_clear_toggle, 334 ohci_device_bulk_done, 335 }; 336 337 Static struct usbd_pipe_methods ohci_device_isoc_methods = { 338 ohci_device_isoc_transfer, 339 ohci_device_isoc_start, 340 ohci_device_isoc_abort, 341 ohci_device_isoc_close, 342 ohci_noop, 343 ohci_device_isoc_done, 344 }; 345 346 #if defined(__NetBSD__) || defined(__OpenBSD__) 347 int 348 ohci_activate(device_ptr_t self, enum devact act) 349 { 350 struct ohci_softc *sc = (struct ohci_softc *)self; 351 int rv = 0; 352 353 switch (act) { 354 case DVACT_ACTIVATE: 355 return (EOPNOTSUPP); 356 357 case DVACT_DEACTIVATE: 358 if (sc->sc_child != NULL) 359 rv = config_deactivate(sc->sc_child); 360 sc->sc_dying = 1; 361 break; 362 } 363 return (rv); 364 } 365 366 int 367 ohci_detach(struct ohci_softc *sc, int flags) 368 { 369 int rv = 0; 370 371 if (sc->sc_child != NULL) 372 rv = config_detach(sc->sc_child, flags); 373 374 if (rv != 0) 375 return (rv); 376 377 usb_uncallout(sc->sc_tmo_rhsc, ohci_rhsc_enable, sc); 378 379 #if defined(__NetBSD__) || defined(__OpenBSD__) 380 powerhook_disestablish(sc->sc_powerhook); 381 shutdownhook_disestablish(sc->sc_shutdownhook); 382 #endif 383 384 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 385 386 /* free data structures XXX */ 387 388 return (rv); 389 } 390 #endif 391 392 ohci_soft_ed_t * 393 ohci_alloc_sed(ohci_softc_t *sc) 394 { 395 ohci_soft_ed_t *sed; 396 usbd_status err; 397 int i, offs; 398 usb_dma_t dma; 399 400 if (sc->sc_freeeds == NULL) { 401 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 402 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 403 OHCI_ED_ALIGN, &dma); 404 if (err) 405 return (0); 406 for(i = 0; i < OHCI_SED_CHUNK; i++) { 407 offs = i * OHCI_SED_SIZE; 408 sed = KERNADDR(&dma, offs); 409 sed->physaddr = DMAADDR(&dma, offs); 410 sed->next = sc->sc_freeeds; 411 sc->sc_freeeds = sed; 412 } 413 } 414 sed = sc->sc_freeeds; 415 sc->sc_freeeds = sed->next; 416 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 417 sed->next = 0; 418 return (sed); 419 } 420 421 void 422 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 423 { 424 sed->next = sc->sc_freeeds; 425 sc->sc_freeeds = sed; 426 } 427 428 ohci_soft_td_t * 429 ohci_alloc_std(ohci_softc_t *sc) 430 { 431 ohci_soft_td_t *std; 432 usbd_status err; 433 int i, offs; 434 usb_dma_t dma; 435 int s; 436 437 if (sc->sc_freetds == NULL) { 438 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 439 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 440 OHCI_TD_ALIGN, &dma); 441 if (err) 442 return (NULL); 443 s = splusb(); 444 for(i = 0; i < OHCI_STD_CHUNK; i++) { 445 offs = i * OHCI_STD_SIZE; 446 std = KERNADDR(&dma, offs); 447 std->physaddr = DMAADDR(&dma, offs); 448 std->nexttd = sc->sc_freetds; 449 sc->sc_freetds = std; 450 } 451 splx(s); 452 } 453 454 s = splusb(); 455 std = sc->sc_freetds; 456 sc->sc_freetds = std->nexttd; 457 memset(&std->td, 0, sizeof(ohci_td_t)); 458 std->nexttd = NULL; 459 std->xfer = NULL; 460 ohci_hash_add_td(sc, std); 461 splx(s); 462 463 return (std); 464 } 465 466 void 467 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std) 468 { 469 int s; 470 471 s = splusb(); 472 ohci_hash_rem_td(sc, std); 473 std->nexttd = sc->sc_freetds; 474 sc->sc_freetds = std; 475 splx(s); 476 } 477 478 usbd_status 479 ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc, 480 int alen, int rd, usbd_xfer_handle xfer, 481 ohci_soft_td_t *sp, ohci_soft_td_t **ep) 482 { 483 ohci_soft_td_t *next, *cur; 484 ohci_physaddr_t dataphys, dataphysend; 485 u_int32_t tdflags; 486 int len, curlen; 487 usb_dma_t *dma = &xfer->dmabuf; 488 u_int16_t flags = xfer->flags; 489 490 DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen)); 491 492 len = alen; 493 cur = sp; 494 dataphys = DMAADDR(dma, 0); 495 dataphysend = OHCI_PAGE(dataphys + len - 1); 496 tdflags = htole32( 497 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 498 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) | 499 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR); 500 501 for (;;) { 502 next = ohci_alloc_std(sc); 503 if (next == NULL) 504 goto nomem; 505 506 /* The OHCI hardware can handle at most one page crossing. */ 507 if (OHCI_PAGE(dataphys) == dataphysend || 508 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) { 509 /* we can handle it in this TD */ 510 curlen = len; 511 } else { 512 /* must use multiple TDs, fill as much as possible. */ 513 curlen = 2 * OHCI_PAGE_SIZE - 514 (dataphys & (OHCI_PAGE_SIZE-1)); 515 /* the length must be a multiple of the max size */ 516 curlen -= curlen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize); 517 #ifdef DIAGNOSTIC 518 if (curlen == 0) 519 panic("ohci_alloc_std: curlen == 0"); 520 #endif 521 } 522 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x " 523 "dataphysend=0x%08x len=%d curlen=%d\n", 524 dataphys, dataphysend, 525 len, curlen)); 526 len -= curlen; 527 528 cur->td.td_flags = tdflags; 529 cur->td.td_cbp = htole32(dataphys); 530 cur->nexttd = next; 531 cur->td.td_nexttd = htole32(next->physaddr); 532 cur->td.td_be = htole32(dataphys + curlen - 1); 533 cur->len = curlen; 534 cur->flags = OHCI_ADD_LEN; 535 cur->xfer = xfer; 536 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n", 537 dataphys, dataphys + curlen - 1)); 538 if (len == 0) 539 break; 540 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n")); 541 dataphys += curlen; 542 cur = next; 543 } 544 if (!rd && (flags & USBD_FORCE_SHORT_XFER) && 545 alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) { 546 /* Force a 0 length transfer at the end. */ 547 548 cur = next; 549 next = ohci_alloc_std(sc); 550 if (next == NULL) 551 goto nomem; 552 553 cur->td.td_flags = tdflags; 554 cur->td.td_cbp = 0; /* indicate 0 length packet */ 555 cur->nexttd = next; 556 cur->td.td_nexttd = htole32(next->physaddr); 557 cur->td.td_be = ~0; 558 cur->len = 0; 559 cur->flags = 0; 560 cur->xfer = xfer; 561 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n")); 562 } 563 *ep = cur; 564 565 return (USBD_NORMAL_COMPLETION); 566 567 nomem: 568 /* XXX free chain */ 569 return (USBD_NOMEM); 570 } 571 572 #if 0 573 Static void 574 ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std, 575 ohci_soft_td_t *stdend) 576 { 577 ohci_soft_td_t *p; 578 579 for (; std != stdend; std = p) { 580 p = std->nexttd; 581 ohci_free_std(sc, std); 582 } 583 } 584 #endif 585 586 ohci_soft_itd_t * 587 ohci_alloc_sitd(ohci_softc_t *sc) 588 { 589 ohci_soft_itd_t *sitd; 590 usbd_status err; 591 int i, s, offs; 592 usb_dma_t dma; 593 594 if (sc->sc_freeitds == NULL) { 595 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n")); 596 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK, 597 OHCI_ITD_ALIGN, &dma); 598 if (err) 599 return (NULL); 600 s = splusb(); 601 for(i = 0; i < OHCI_SITD_CHUNK; i++) { 602 offs = i * OHCI_SITD_SIZE; 603 sitd = KERNADDR(&dma, offs); 604 sitd->physaddr = DMAADDR(&dma, offs); 605 sitd->nextitd = sc->sc_freeitds; 606 sc->sc_freeitds = sitd; 607 } 608 splx(s); 609 } 610 611 s = splusb(); 612 sitd = sc->sc_freeitds; 613 sc->sc_freeitds = sitd->nextitd; 614 memset(&sitd->itd, 0, sizeof(ohci_itd_t)); 615 sitd->nextitd = NULL; 616 sitd->xfer = NULL; 617 ohci_hash_add_itd(sc, sitd); 618 splx(s); 619 620 #ifdef DIAGNOSTIC 621 sitd->isdone = 0; 622 #endif 623 624 return (sitd); 625 } 626 627 void 628 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 629 { 630 int s; 631 632 DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd)); 633 634 #ifdef DIAGNOSTIC 635 if (!sitd->isdone) { 636 panic("ohci_free_sitd: sitd=%p not done", sitd); 637 return; 638 } 639 /* Warn double free */ 640 sitd->isdone = 0; 641 #endif 642 643 s = splusb(); 644 ohci_hash_rem_itd(sc, sitd); 645 sitd->nextitd = sc->sc_freeitds; 646 sc->sc_freeitds = sitd; 647 splx(s); 648 } 649 650 usbd_status 651 ohci_init(ohci_softc_t *sc) 652 { 653 ohci_soft_ed_t *sed, *psed; 654 usbd_status err; 655 int i; 656 u_int32_t s, ctl, rwc, ival, hcr, fm, per, rev, desca, descb; 657 658 DPRINTF(("ohci_init: start\n")); 659 #if defined(__OpenBSD__) 660 printf(","); 661 #else 662 printf("%s:", USBDEVNAME(sc->sc_bus.bdev)); 663 #endif 664 rev = OREAD4(sc, OHCI_REVISION); 665 printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev), 666 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 667 668 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 669 printf("%s: unsupported OHCI revision\n", 670 USBDEVNAME(sc->sc_bus.bdev)); 671 sc->sc_bus.usbrev = USBREV_UNKNOWN; 672 return (USBD_INVAL); 673 } 674 sc->sc_bus.usbrev = USBREV_1_0; 675 676 for (i = 0; i < OHCI_HASH_SIZE; i++) 677 LIST_INIT(&sc->sc_hash_tds[i]); 678 for (i = 0; i < OHCI_HASH_SIZE; i++) 679 LIST_INIT(&sc->sc_hash_itds[i]); 680 681 SIMPLEQ_INIT(&sc->sc_free_xfers); 682 683 #ifdef __NetBSD__ 684 usb_setup_reserve(sc, &sc->sc_dma_reserve, sc->sc_bus.dmatag, 685 USB_MEM_RESERVE); 686 #endif 687 688 /* XXX determine alignment by R/W */ 689 /* Allocate the HCCA area. */ 690 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 691 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 692 if (err) 693 return (err); 694 sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0); 695 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 696 697 sc->sc_eintrs = OHCI_NORMAL_INTRS; 698 699 /* Allocate dummy ED that starts the control list. */ 700 sc->sc_ctrl_head = ohci_alloc_sed(sc); 701 if (sc->sc_ctrl_head == NULL) { 702 err = USBD_NOMEM; 703 goto bad1; 704 } 705 sc->sc_ctrl_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 706 707 /* Allocate dummy ED that starts the bulk list. */ 708 sc->sc_bulk_head = ohci_alloc_sed(sc); 709 if (sc->sc_bulk_head == NULL) { 710 err = USBD_NOMEM; 711 goto bad2; 712 } 713 sc->sc_bulk_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 714 715 /* Allocate dummy ED that starts the isochronous list. */ 716 sc->sc_isoc_head = ohci_alloc_sed(sc); 717 if (sc->sc_isoc_head == NULL) { 718 err = USBD_NOMEM; 719 goto bad3; 720 } 721 sc->sc_isoc_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 722 723 /* Allocate all the dummy EDs that make up the interrupt tree. */ 724 for (i = 0; i < OHCI_NO_EDS; i++) { 725 sed = ohci_alloc_sed(sc); 726 if (sed == NULL) { 727 while (--i >= 0) 728 ohci_free_sed(sc, sc->sc_eds[i]); 729 err = USBD_NOMEM; 730 goto bad4; 731 } 732 /* All ED fields are set to 0. */ 733 sc->sc_eds[i] = sed; 734 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 735 if (i != 0) 736 psed = sc->sc_eds[(i-1) / 2]; 737 else 738 psed= sc->sc_isoc_head; 739 sed->next = psed; 740 sed->ed.ed_nexted = htole32(psed->physaddr); 741 } 742 /* 743 * Fill HCCA interrupt table. The bit reversal is to get 744 * the tree set up properly to spread the interrupts. 745 */ 746 for (i = 0; i < OHCI_NO_INTRS; i++) 747 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 748 htole32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 749 750 #ifdef OHCI_DEBUG 751 if (ohcidebug > 15) { 752 for (i = 0; i < OHCI_NO_EDS; i++) { 753 printf("ed#%d ", i); 754 ohci_dump_ed(sc->sc_eds[i]); 755 } 756 printf("iso "); 757 ohci_dump_ed(sc->sc_isoc_head); 758 } 759 #endif 760 761 /* Preserve values programmed by SMM/BIOS but lost over reset. */ 762 ctl = OREAD4(sc, OHCI_CONTROL); 763 rwc = ctl & OHCI_RWC; 764 fm = OREAD4(sc, OHCI_FM_INTERVAL); 765 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 766 descb = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 767 768 /* Determine in what context we are running. */ 769 if (ctl & OHCI_IR) { 770 /* SMM active, request change */ 771 DPRINTF(("ohci_init: SMM active, request owner change\n")); 772 if ((sc->sc_intre & (OHCI_OC | OHCI_MIE)) == 773 (OHCI_OC | OHCI_MIE)) 774 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_MIE); 775 s = OREAD4(sc, OHCI_COMMAND_STATUS); 776 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 777 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 778 usb_delay_ms(&sc->sc_bus, 1); 779 ctl = OREAD4(sc, OHCI_CONTROL); 780 } 781 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_MIE); 782 if ((ctl & OHCI_IR) == 0) { 783 printf("%s: SMM does not respond, resetting\n", 784 USBDEVNAME(sc->sc_bus.bdev)); 785 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 786 goto reset; 787 } 788 #if 0 789 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */ 790 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 791 /* BIOS started controller. */ 792 DPRINTF(("ohci_init: BIOS active\n")); 793 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 794 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL | rwc); 795 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 796 } 797 #endif 798 } else { 799 DPRINTF(("ohci_init: cold started\n")); 800 reset: 801 /* Controller was cold started. */ 802 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 803 } 804 805 /* 806 * This reset should not be necessary according to the OHCI spec, but 807 * without it some controllers do not start. 808 */ 809 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 810 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 811 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 812 813 /* We now own the host controller and the bus has been reset. */ 814 815 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 816 /* Nominal time for a reset is 10 us. */ 817 for (i = 0; i < 10; i++) { 818 delay(10); 819 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 820 if (!hcr) 821 break; 822 } 823 if (hcr) { 824 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 825 err = USBD_IOERROR; 826 goto bad5; 827 } 828 #ifdef OHCI_DEBUG 829 if (ohcidebug > 15) 830 ohci_dumpregs(sc); 831 #endif 832 833 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 834 835 /* Set up HC registers. */ 836 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 837 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 838 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 839 /* disable all interrupts and then switch on all desired interrupts */ 840 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 841 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 842 /* switch on desired functional features */ 843 ctl = OREAD4(sc, OHCI_CONTROL); 844 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 845 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 846 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL | rwc; 847 /* And finally start it! */ 848 OWRITE4(sc, OHCI_CONTROL, ctl); 849 850 /* 851 * The controller is now OPERATIONAL. Set a some final 852 * registers that should be set earlier, but that the 853 * controller ignores when in the SUSPEND state. 854 */ 855 ival = OHCI_GET_IVAL(fm); 856 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 857 fm |= OHCI_FSMPS(ival) | ival; 858 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 859 per = OHCI_PERIODIC(ival); /* 90% periodic */ 860 OWRITE4(sc, OHCI_PERIODIC_START, per); 861 862 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */ 863 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP); 864 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 865 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY); 866 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca); 867 868 /* 869 * The AMD756 requires a delay before re-reading the register, 870 * otherwise it will occasionally report 0 ports. 871 */ 872 sc->sc_noport = 0; 873 for (i = 0; i < 10 && sc->sc_noport == 0; i++) { 874 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY); 875 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 876 } 877 878 #ifdef OHCI_DEBUG 879 if (ohcidebug > 5) 880 ohci_dumpregs(sc); 881 #endif 882 883 /* Set up the bus struct. */ 884 sc->sc_bus.methods = &ohci_bus_methods; 885 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 886 887 #if defined(__NetBSD__) || defined(__OpenBSD__) 888 sc->sc_control = sc->sc_intre = 0; 889 sc->sc_powerhook = powerhook_establish(ohci_power, sc); 890 sc->sc_shutdownhook = shutdownhook_establish(ohci_shutdown, sc); 891 #endif 892 893 usb_callout_init(sc->sc_tmo_rhsc); 894 895 return (USBD_NORMAL_COMPLETION); 896 897 bad5: 898 for (i = 0; i < OHCI_NO_EDS; i++) 899 ohci_free_sed(sc, sc->sc_eds[i]); 900 bad4: 901 ohci_free_sed(sc, sc->sc_isoc_head); 902 bad3: 903 ohci_free_sed(sc, sc->sc_bulk_head); 904 bad2: 905 ohci_free_sed(sc, sc->sc_ctrl_head); 906 bad1: 907 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 908 return (err); 909 } 910 911 usbd_status 912 ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 913 { 914 #if defined(__NetBSD__) || defined(__OpenBSD__) 915 struct ohci_softc *sc = (struct ohci_softc *)bus; 916 #endif 917 usbd_status status; 918 919 status = usb_allocmem(&sc->sc_bus, size, 0, dma); 920 #ifdef __NetBSD__ 921 if (status == USBD_NOMEM) 922 status = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size); 923 #endif 924 return status; 925 } 926 927 void 928 ohci_freem(struct usbd_bus *bus, usb_dma_t *dma) 929 { 930 #if defined(__NetBSD__) || defined(__OpenBSD__) 931 struct ohci_softc *sc = (struct ohci_softc *)bus; 932 #endif 933 #ifdef __NetBSD__ 934 if (dma->block->flags & USB_DMA_RESERVE) { 935 usb_reserve_freem(&((struct ohci_softc *)bus)->sc_dma_reserve, 936 dma); 937 return; 938 } 939 #endif 940 usb_freemem(&sc->sc_bus, dma); 941 } 942 943 usbd_xfer_handle 944 ohci_allocx(struct usbd_bus *bus) 945 { 946 struct ohci_softc *sc = (struct ohci_softc *)bus; 947 usbd_xfer_handle xfer; 948 949 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 950 if (xfer != NULL) { 951 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 952 #ifdef DIAGNOSTIC 953 if (xfer->busy_free != XFER_FREE) { 954 printf("ohci_allocx: xfer=%p not free, 0x%08x\n", xfer, 955 xfer->busy_free); 956 } 957 #endif 958 } else { 959 xfer = malloc(sizeof(struct ohci_xfer), M_USB, M_NOWAIT); 960 } 961 if (xfer != NULL) { 962 memset(xfer, 0, sizeof (struct ohci_xfer)); 963 #ifdef DIAGNOSTIC 964 xfer->busy_free = XFER_BUSY; 965 #endif 966 } 967 return (xfer); 968 } 969 970 void 971 ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 972 { 973 struct ohci_softc *sc = (struct ohci_softc *)bus; 974 975 #ifdef DIAGNOSTIC 976 if (xfer->busy_free != XFER_BUSY) { 977 printf("ohci_freex: xfer=%p not busy, 0x%08x\n", xfer, 978 xfer->busy_free); 979 return; 980 } 981 xfer->busy_free = XFER_FREE; 982 #endif 983 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 984 } 985 986 /* 987 * Shut down the controller when the system is going down. 988 */ 989 void 990 ohci_shutdown(void *v) 991 { 992 ohci_softc_t *sc = v; 993 994 DPRINTF(("ohci_shutdown: stopping the HC\n")); 995 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 996 } 997 998 /* 999 * Handle suspend/resume. 1000 * 1001 * We need to switch to polling mode here, because this routine is 1002 * called from an interupt context. This is all right since we 1003 * are almost suspended anyway. 1004 */ 1005 void 1006 ohci_power(int why, void *v) 1007 { 1008 ohci_softc_t *sc = v; 1009 u_int32_t ctl; 1010 int s; 1011 1012 #ifdef OHCI_DEBUG 1013 DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why)); 1014 ohci_dumpregs(sc); 1015 #endif 1016 1017 s = splhardusb(); 1018 switch (why) { 1019 case PWR_SUSPEND: 1020 case PWR_STANDBY: 1021 sc->sc_bus.use_polling++; 1022 ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK; 1023 if (sc->sc_control == 0) { 1024 /* 1025 * Preserve register values, in case that APM BIOS 1026 * does not recover them. 1027 */ 1028 sc->sc_control = ctl; 1029 sc->sc_intre = OREAD4(sc, OHCI_INTERRUPT_ENABLE); 1030 } 1031 ctl |= OHCI_HCFS_SUSPEND; 1032 OWRITE4(sc, OHCI_CONTROL, ctl); 1033 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1034 sc->sc_bus.use_polling--; 1035 break; 1036 case PWR_RESUME: 1037 sc->sc_bus.use_polling++; 1038 /* Some broken BIOSes do not recover these values */ 1039 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 1040 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 1041 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 1042 if (sc->sc_intre) 1043 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, 1044 sc->sc_intre & (OHCI_ALL_INTRS | OHCI_MIE)); 1045 if (sc->sc_control) 1046 ctl = sc->sc_control; 1047 else 1048 ctl = OREAD4(sc, OHCI_CONTROL); 1049 ctl |= OHCI_HCFS_RESUME; 1050 OWRITE4(sc, OHCI_CONTROL, ctl); 1051 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 1052 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL; 1053 OWRITE4(sc, OHCI_CONTROL, ctl); 1054 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 1055 sc->sc_control = sc->sc_intre = 0; 1056 sc->sc_bus.use_polling--; 1057 break; 1058 case PWR_SOFTSUSPEND: 1059 case PWR_SOFTSTANDBY: 1060 case PWR_SOFTRESUME: 1061 break; 1062 } 1063 splx(s); 1064 } 1065 1066 #ifdef OHCI_DEBUG 1067 void 1068 ohci_dumpregs(ohci_softc_t *sc) 1069 { 1070 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 1071 OREAD4(sc, OHCI_REVISION), 1072 OREAD4(sc, OHCI_CONTROL), 1073 OREAD4(sc, OHCI_COMMAND_STATUS))); 1074 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 1075 OREAD4(sc, OHCI_INTERRUPT_STATUS), 1076 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 1077 OREAD4(sc, OHCI_INTERRUPT_DISABLE))); 1078 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 1079 OREAD4(sc, OHCI_HCCA), 1080 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 1081 OREAD4(sc, OHCI_CONTROL_HEAD_ED))); 1082 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 1083 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 1084 OREAD4(sc, OHCI_BULK_HEAD_ED), 1085 OREAD4(sc, OHCI_BULK_CURRENT_ED))); 1086 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 1087 OREAD4(sc, OHCI_DONE_HEAD), 1088 OREAD4(sc, OHCI_FM_INTERVAL), 1089 OREAD4(sc, OHCI_FM_REMAINING))); 1090 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 1091 OREAD4(sc, OHCI_FM_NUMBER), 1092 OREAD4(sc, OHCI_PERIODIC_START), 1093 OREAD4(sc, OHCI_LS_THRESHOLD))); 1094 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n", 1095 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 1096 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 1097 OREAD4(sc, OHCI_RH_STATUS))); 1098 DPRINTF((" port1=0x%08x port2=0x%08x\n", 1099 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 1100 OREAD4(sc, OHCI_RH_PORT_STATUS(2)))); 1101 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n", 1102 le32toh(sc->sc_hcca->hcca_frame_number), 1103 le32toh(sc->sc_hcca->hcca_done_head))); 1104 } 1105 #endif 1106 1107 Static int ohci_intr1(ohci_softc_t *); 1108 1109 int 1110 ohci_intr(void *p) 1111 { 1112 ohci_softc_t *sc = p; 1113 1114 if (sc == NULL || sc->sc_dying) 1115 return (0); 1116 1117 /* If we get an interrupt while polling, then just ignore it. */ 1118 if (sc->sc_bus.use_polling) { 1119 #ifdef DIAGNOSTIC 1120 DPRINTFN(16, ("ohci_intr: ignored interrupt while polling\n")); 1121 #endif 1122 /* for level triggered intrs, should do something to ack */ 1123 OWRITE4(sc, OHCI_INTERRUPT_STATUS, 1124 OREAD4(sc, OHCI_INTERRUPT_STATUS)); 1125 1126 return (0); 1127 } 1128 1129 return (ohci_intr1(sc)); 1130 } 1131 1132 Static int 1133 ohci_intr1(ohci_softc_t *sc) 1134 { 1135 u_int32_t intrs, eintrs; 1136 1137 DPRINTFN(14,("ohci_intr1: enter\n")); 1138 1139 /* In case the interrupt occurs before initialization has completed. */ 1140 if (sc == NULL || sc->sc_hcca == NULL) { 1141 #ifdef DIAGNOSTIC 1142 printf("ohci_intr: sc->sc_hcca == NULL\n"); 1143 #endif 1144 return (0); 1145 } 1146 1147 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1148 if (!intrs) 1149 return (0); 1150 1151 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs & ~(OHCI_MIE|OHCI_WDH)); /* Acknowledge */ 1152 eintrs = intrs & sc->sc_eintrs; 1153 if (!eintrs) 1154 return (0); 1155 1156 sc->sc_bus.intr_context++; 1157 sc->sc_bus.no_intrs++; 1158 DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 1159 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 1160 (u_int)eintrs)); 1161 1162 if (eintrs & OHCI_SO) { 1163 sc->sc_overrun_cnt++; 1164 if (usbd_ratecheck(&sc->sc_overrun_ntc)) { 1165 printf("%s: %u scheduling overruns\n", 1166 USBDEVNAME(sc->sc_bus.bdev), sc->sc_overrun_cnt); 1167 sc->sc_overrun_cnt = 0; 1168 } 1169 /* XXX do what */ 1170 eintrs &= ~OHCI_SO; 1171 } 1172 if (eintrs & OHCI_WDH) { 1173 /* 1174 * We block the interrupt below, and reenable it later from 1175 * ohci_softintr(). 1176 */ 1177 usb_schedsoftintr(&sc->sc_bus); 1178 } 1179 if (eintrs & OHCI_RD) { 1180 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev)); 1181 /* XXX process resume detect */ 1182 } 1183 if (eintrs & OHCI_UE) { 1184 printf("%s: unrecoverable error, controller halted\n", 1185 USBDEVNAME(sc->sc_bus.bdev)); 1186 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1187 /* XXX what else */ 1188 } 1189 if (eintrs & OHCI_RHSC) { 1190 /* 1191 * We block the interrupt below, and reenable it later from 1192 * a timeout. 1193 */ 1194 ohci_rhsc(sc, sc->sc_intrxfer); 1195 /* Do not allow RHSC interrupts > 1 per second */ 1196 usb_callout(sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc); 1197 } 1198 1199 sc->sc_bus.intr_context--; 1200 1201 if (eintrs != 0) { 1202 /* Block unprocessed interrupts. */ 1203 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs); 1204 sc->sc_eintrs &= ~eintrs; 1205 DPRINTFN(1, ("%s: blocking intrs 0x%x\n", 1206 USBDEVNAME(sc->sc_bus.bdev), eintrs)); 1207 } 1208 1209 return (1); 1210 } 1211 1212 void 1213 ohci_rhsc_enable(void *v_sc) 1214 { 1215 ohci_softc_t *sc = v_sc; 1216 int s; 1217 1218 s = splhardusb(); 1219 sc->sc_eintrs |= OHCI_RHSC; 1220 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1221 splx(s); 1222 } 1223 1224 #ifdef OHCI_DEBUG 1225 char *ohci_cc_strs[] = { 1226 "NO_ERROR", 1227 "CRC", 1228 "BIT_STUFFING", 1229 "DATA_TOGGLE_MISMATCH", 1230 "STALL", 1231 "DEVICE_NOT_RESPONDING", 1232 "PID_CHECK_FAILURE", 1233 "UNEXPECTED_PID", 1234 "DATA_OVERRUN", 1235 "DATA_UNDERRUN", 1236 "BUFFER_OVERRUN", 1237 "BUFFER_UNDERRUN", 1238 "reserved", 1239 "reserved", 1240 "NOT_ACCESSED", 1241 "NOT_ACCESSED", 1242 }; 1243 #endif 1244 1245 void 1246 ohci_softintr(void *v) 1247 { 1248 ohci_softc_t *sc = v; 1249 ohci_soft_itd_t *sitd, *sidone, *sitdnext; 1250 ohci_soft_td_t *std, *sdone, *stdnext; 1251 usbd_xfer_handle xfer; 1252 struct ohci_pipe *opipe; 1253 int len, cc, s; 1254 int i, j, actlen, iframes, uedir; 1255 ohci_physaddr_t done; 1256 1257 DPRINTFN(10,("ohci_softintr: enter\n")); 1258 1259 sc->sc_bus.intr_context++; 1260 1261 s = splhardusb(); 1262 done = le32toh(sc->sc_hcca->hcca_done_head) & ~OHCI_DONE_INTRS; 1263 sc->sc_hcca->hcca_done_head = 0; 1264 OWRITE4(sc, OHCI_INTERRUPT_STATUS, OHCI_WDH); 1265 sc->sc_eintrs |= OHCI_WDH; 1266 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_WDH); 1267 splx(s); 1268 1269 /* Reverse the done list. */ 1270 for (sdone = NULL, sidone = NULL; done != 0; ) { 1271 std = ohci_hash_find_td(sc, done); 1272 if (std != NULL) { 1273 std->dnext = sdone; 1274 done = le32toh(std->td.td_nexttd); 1275 sdone = std; 1276 DPRINTFN(10,("add TD %p\n", std)); 1277 continue; 1278 } 1279 sitd = ohci_hash_find_itd(sc, done); 1280 if (sitd != NULL) { 1281 sitd->dnext = sidone; 1282 done = le32toh(sitd->itd.itd_nextitd); 1283 sidone = sitd; 1284 DPRINTFN(5,("add ITD %p\n", sitd)); 1285 continue; 1286 } 1287 panic("ohci_softintr: addr 0x%08lx not found", (u_long)done); 1288 } 1289 1290 DPRINTFN(10,("ohci_softintr: sdone=%p sidone=%p\n", sdone, sidone)); 1291 1292 #ifdef OHCI_DEBUG 1293 if (ohcidebug > 10) { 1294 DPRINTF(("ohci_process_done: TD done:\n")); 1295 ohci_dump_tds(sdone); 1296 } 1297 #endif 1298 1299 for (std = sdone; std; std = stdnext) { 1300 xfer = std->xfer; 1301 stdnext = std->dnext; 1302 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n", 1303 std, xfer, xfer ? xfer->hcpriv : 0)); 1304 if (xfer == NULL) { 1305 /* 1306 * xfer == NULL: There seems to be no xfer associated 1307 * with this TD. It is tailp that happened to end up on 1308 * the done queue. 1309 * Shouldn't happen, but some chips are broken(?). 1310 */ 1311 continue; 1312 } 1313 if (xfer->status == USBD_CANCELLED || 1314 xfer->status == USBD_TIMEOUT) { 1315 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1316 xfer)); 1317 /* Handled by abort routine. */ 1318 continue; 1319 } 1320 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 1321 1322 len = std->len; 1323 if (std->td.td_cbp != 0) 1324 len -= le32toh(std->td.td_be) - 1325 le32toh(std->td.td_cbp) + 1; 1326 DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", len, 1327 std->flags)); 1328 if (std->flags & OHCI_ADD_LEN) 1329 xfer->actlen += len; 1330 1331 cc = OHCI_TD_GET_CC(le32toh(std->td.td_flags)); 1332 if (cc == OHCI_CC_NO_ERROR) { 1333 if (std->flags & OHCI_CALL_DONE) { 1334 xfer->status = USBD_NORMAL_COMPLETION; 1335 s = splusb(); 1336 usb_transfer_complete(xfer); 1337 splx(s); 1338 } 1339 ohci_free_std(sc, std); 1340 } else { 1341 /* 1342 * Endpoint is halted. First unlink all the TDs 1343 * belonging to the failed transfer, and then restart 1344 * the endpoint. 1345 */ 1346 ohci_soft_td_t *p, *n; 1347 opipe = (struct ohci_pipe *)xfer->pipe; 1348 1349 DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n", 1350 OHCI_TD_GET_CC(le32toh(std->td.td_flags)), 1351 ohci_cc_strs[OHCI_TD_GET_CC(le32toh(std->td.td_flags))])); 1352 1353 /* remove TDs */ 1354 for (p = std; p->xfer == xfer; p = n) { 1355 n = p->nexttd; 1356 ohci_free_std(sc, p); 1357 } 1358 1359 /* clear halt */ 1360 opipe->sed->ed.ed_headp = htole32(p->physaddr); 1361 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1362 1363 if (cc == OHCI_CC_STALL) 1364 xfer->status = USBD_STALLED; 1365 else 1366 xfer->status = USBD_IOERROR; 1367 s = splusb(); 1368 usb_transfer_complete(xfer); 1369 splx(s); 1370 } 1371 } 1372 1373 #ifdef OHCI_DEBUG 1374 if (ohcidebug > 10) { 1375 DPRINTF(("ohci_softintr: ITD done:\n")); 1376 ohci_dump_itds(sidone); 1377 } 1378 #endif 1379 1380 for (sitd = sidone; sitd != NULL; sitd = sitdnext) { 1381 xfer = sitd->xfer; 1382 sitdnext = sitd->dnext; 1383 DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n", 1384 sitd, xfer, xfer ? xfer->hcpriv : 0)); 1385 if (xfer == NULL) 1386 continue; 1387 if (xfer->status == USBD_CANCELLED || 1388 xfer->status == USBD_TIMEOUT) { 1389 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1390 xfer)); 1391 /* Handled by abort routine. */ 1392 continue; 1393 } 1394 #ifdef DIAGNOSTIC 1395 if (sitd->isdone) 1396 printf("ohci_softintr: sitd=%p is done\n", sitd); 1397 sitd->isdone = 1; 1398 #endif 1399 if (sitd->flags & OHCI_CALL_DONE) { 1400 ohci_soft_itd_t *next; 1401 1402 opipe = (struct ohci_pipe *)xfer->pipe; 1403 opipe->u.iso.inuse -= xfer->nframes; 1404 uedir = UE_GET_DIR(xfer->pipe->endpoint->edesc-> 1405 bEndpointAddress); 1406 xfer->status = USBD_NORMAL_COMPLETION; 1407 actlen = 0; 1408 for (i = 0, sitd = xfer->hcpriv;; 1409 sitd = next) { 1410 next = sitd->nextitd; 1411 if (OHCI_ITD_GET_CC(le32toh(sitd-> 1412 itd.itd_flags)) != OHCI_CC_NO_ERROR) 1413 xfer->status = USBD_IOERROR; 1414 /* For input, update frlengths with actual */ 1415 /* XXX anything necessary for output? */ 1416 if (uedir == UE_DIR_IN && 1417 xfer->status == USBD_NORMAL_COMPLETION) { 1418 iframes = OHCI_ITD_GET_FC(le32toh( 1419 sitd->itd.itd_flags)); 1420 for (j = 0; j < iframes; i++, j++) { 1421 len = le16toh(sitd-> 1422 itd.itd_offset[j]); 1423 if ((OHCI_ITD_PSW_GET_CC(len) & 1424 OHCI_CC_NOT_ACCESSED_MASK) 1425 == OHCI_CC_NOT_ACCESSED) 1426 len = 0; 1427 else 1428 len = OHCI_ITD_PSW_LENGTH(len); 1429 xfer->frlengths[i] = len; 1430 actlen += len; 1431 } 1432 } 1433 if (sitd->flags & OHCI_CALL_DONE) 1434 break; 1435 ohci_free_sitd(sc, sitd); 1436 } 1437 ohci_free_sitd(sc, sitd); 1438 if (uedir == UE_DIR_IN && 1439 xfer->status == USBD_NORMAL_COMPLETION) 1440 xfer->actlen = actlen; 1441 xfer->hcpriv = NULL; 1442 1443 s = splusb(); 1444 usb_transfer_complete(xfer); 1445 splx(s); 1446 } 1447 } 1448 1449 #ifdef USB_USE_SOFTINTR 1450 if (sc->sc_softwake) { 1451 sc->sc_softwake = 0; 1452 wakeup(&sc->sc_softwake); 1453 } 1454 #endif /* USB_USE_SOFTINTR */ 1455 1456 sc->sc_bus.intr_context--; 1457 DPRINTFN(10,("ohci_softintr: done:\n")); 1458 } 1459 1460 void 1461 ohci_device_ctrl_done(usbd_xfer_handle xfer) 1462 { 1463 DPRINTFN(10,("ohci_device_ctrl_done: xfer=%p\n", xfer)); 1464 1465 #ifdef DIAGNOSTIC 1466 if (!(xfer->rqflags & URQ_REQUEST)) { 1467 panic("ohci_device_ctrl_done: not a request"); 1468 } 1469 #endif 1470 } 1471 1472 void 1473 ohci_device_intr_done(usbd_xfer_handle xfer) 1474 { 1475 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1476 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1477 ohci_soft_ed_t *sed = opipe->sed; 1478 ohci_soft_td_t *data, *tail; 1479 1480 1481 DPRINTFN(10,("ohci_device_intr_done: xfer=%p, actlen=%d\n", 1482 xfer, xfer->actlen)); 1483 1484 if (xfer->pipe->repeat) { 1485 data = opipe->tail.td; 1486 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 1487 if (tail == NULL) { 1488 xfer->status = USBD_NOMEM; 1489 return; 1490 } 1491 tail->xfer = NULL; 1492 1493 data->td.td_flags = htole32( 1494 OHCI_TD_IN | OHCI_TD_NOCC | 1495 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 1496 if (xfer->flags & USBD_SHORT_XFER_OK) 1497 data->td.td_flags |= htole32(OHCI_TD_R); 1498 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf, 0)); 1499 data->nexttd = tail; 1500 data->td.td_nexttd = htole32(tail->physaddr); 1501 data->td.td_be = htole32(le32toh(data->td.td_cbp) + 1502 xfer->length - 1); 1503 data->len = xfer->length; 1504 data->xfer = xfer; 1505 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1506 xfer->hcpriv = data; 1507 xfer->actlen = 0; 1508 1509 sed->ed.ed_tailp = htole32(tail->physaddr); 1510 opipe->tail.td = tail; 1511 } 1512 } 1513 1514 void 1515 ohci_device_bulk_done(usbd_xfer_handle xfer) 1516 { 1517 DPRINTFN(10,("ohci_device_bulk_done: xfer=%p, actlen=%d\n", 1518 xfer, xfer->actlen)); 1519 } 1520 1521 void 1522 ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer) 1523 { 1524 usbd_pipe_handle pipe; 1525 u_char *p; 1526 int i, m; 1527 int hstatus; 1528 1529 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1530 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n", 1531 sc, xfer, hstatus)); 1532 1533 if (xfer == NULL) { 1534 /* Just ignore the change. */ 1535 return; 1536 } 1537 1538 pipe = xfer->pipe; 1539 1540 p = KERNADDR(&xfer->dmabuf, 0); 1541 m = min(sc->sc_noport, xfer->length * 8 - 1); 1542 memset(p, 0, xfer->length); 1543 for (i = 1; i <= m; i++) { 1544 /* Pick out CHANGE bits from the status reg. */ 1545 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1546 p[i/8] |= 1 << (i%8); 1547 } 1548 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 1549 xfer->actlen = xfer->length; 1550 xfer->status = USBD_NORMAL_COMPLETION; 1551 1552 usb_transfer_complete(xfer); 1553 } 1554 1555 void 1556 ohci_root_intr_done(usbd_xfer_handle xfer) 1557 { 1558 } 1559 1560 void 1561 ohci_root_ctrl_done(usbd_xfer_handle xfer) 1562 { 1563 } 1564 1565 /* 1566 * Wait here until controller claims to have an interrupt. 1567 * Then call ohci_intr and return. Use timeout to avoid waiting 1568 * too long. 1569 */ 1570 void 1571 ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer) 1572 { 1573 int timo; 1574 u_int32_t intrs; 1575 1576 xfer->status = USBD_IN_PROGRESS; 1577 for (timo = xfer->timeout; timo >= 0; timo--) { 1578 usb_delay_ms(&sc->sc_bus, 1); 1579 if (sc->sc_dying) 1580 break; 1581 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 1582 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs)); 1583 #ifdef OHCI_DEBUG 1584 if (ohcidebug > 15) 1585 ohci_dumpregs(sc); 1586 #endif 1587 if (intrs) { 1588 ohci_intr1(sc); 1589 if (xfer->status != USBD_IN_PROGRESS) 1590 return; 1591 } 1592 } 1593 1594 /* Timeout */ 1595 DPRINTF(("ohci_waitintr: timeout\n")); 1596 xfer->status = USBD_TIMEOUT; 1597 usb_transfer_complete(xfer); 1598 /* XXX should free TD */ 1599 } 1600 1601 void 1602 ohci_poll(struct usbd_bus *bus) 1603 { 1604 ohci_softc_t *sc = (ohci_softc_t *)bus; 1605 #ifdef OHCI_DEBUG 1606 static int last; 1607 int new; 1608 new = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1609 if (new != last) { 1610 DPRINTFN(10,("ohci_poll: intrs=0x%04x\n", new)); 1611 last = new; 1612 } 1613 #endif 1614 1615 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) 1616 ohci_intr1(sc); 1617 } 1618 1619 usbd_status 1620 ohci_device_request(usbd_xfer_handle xfer) 1621 { 1622 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1623 usb_device_request_t *req = &xfer->request; 1624 usbd_device_handle dev = opipe->pipe.device; 1625 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1626 int addr = dev->address; 1627 ohci_soft_td_t *setup, *stat, *next, *tail; 1628 ohci_soft_ed_t *sed; 1629 int isread; 1630 int len; 1631 usbd_status err; 1632 int s; 1633 1634 isread = req->bmRequestType & UT_READ; 1635 len = UGETW(req->wLength); 1636 1637 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 1638 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 1639 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1640 UGETW(req->wIndex), len, addr, 1641 opipe->pipe.endpoint->edesc->bEndpointAddress)); 1642 1643 setup = opipe->tail.td; 1644 stat = ohci_alloc_std(sc); 1645 if (stat == NULL) { 1646 err = USBD_NOMEM; 1647 goto bad1; 1648 } 1649 tail = ohci_alloc_std(sc); 1650 if (tail == NULL) { 1651 err = USBD_NOMEM; 1652 goto bad2; 1653 } 1654 tail->xfer = NULL; 1655 1656 sed = opipe->sed; 1657 opipe->u.ctl.length = len; 1658 1659 /* Update device address and length since they may have changed 1660 during the setup of the control pipe in usbd_new_device(). */ 1661 /* XXX This only needs to be done once, but it's too early in open. */ 1662 /* XXXX Should not touch ED here! */ 1663 sed->ed.ed_flags = htole32( 1664 (le32toh(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) | 1665 OHCI_ED_SET_FA(addr) | 1666 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize))); 1667 1668 next = stat; 1669 1670 /* Set up data transaction */ 1671 if (len != 0) { 1672 ohci_soft_td_t *std = stat; 1673 1674 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 1675 std, &stat); 1676 stat = stat->nexttd; /* point at free TD */ 1677 if (err) 1678 goto bad3; 1679 /* Start toggle at 1 and then use the carried toggle. */ 1680 std->td.td_flags &= htole32(~OHCI_TD_TOGGLE_MASK); 1681 std->td.td_flags |= htole32(OHCI_TD_TOGGLE_1); 1682 } 1683 1684 memcpy(KERNADDR(&opipe->u.ctl.reqdma, 0), req, sizeof *req); 1685 1686 setup->td.td_flags = htole32(OHCI_TD_SETUP | OHCI_TD_NOCC | 1687 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1688 setup->td.td_cbp = htole32(DMAADDR(&opipe->u.ctl.reqdma, 0)); 1689 setup->nexttd = next; 1690 setup->td.td_nexttd = htole32(next->physaddr); 1691 setup->td.td_be = htole32(le32toh(setup->td.td_cbp) + sizeof *req - 1); 1692 setup->len = 0; 1693 setup->xfer = xfer; 1694 setup->flags = 0; 1695 xfer->hcpriv = setup; 1696 1697 stat->td.td_flags = htole32( 1698 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | 1699 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1700 stat->td.td_cbp = 0; 1701 stat->nexttd = tail; 1702 stat->td.td_nexttd = htole32(tail->physaddr); 1703 stat->td.td_be = 0; 1704 stat->flags = OHCI_CALL_DONE; 1705 stat->len = 0; 1706 stat->xfer = xfer; 1707 1708 #ifdef OHCI_DEBUG 1709 if (ohcidebug > 5) { 1710 DPRINTF(("ohci_device_request:\n")); 1711 ohci_dump_ed(sed); 1712 ohci_dump_tds(setup); 1713 } 1714 #endif 1715 1716 /* Insert ED in schedule */ 1717 s = splusb(); 1718 sed->ed.ed_tailp = htole32(tail->physaddr); 1719 opipe->tail.td = tail; 1720 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1721 if (xfer->timeout && !sc->sc_bus.use_polling) { 1722 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 1723 ohci_timeout, xfer); 1724 } 1725 splx(s); 1726 1727 #ifdef OHCI_DEBUG 1728 if (ohcidebug > 20) { 1729 delay(10000); 1730 DPRINTF(("ohci_device_request: status=%x\n", 1731 OREAD4(sc, OHCI_COMMAND_STATUS))); 1732 ohci_dumpregs(sc); 1733 printf("ctrl head:\n"); 1734 ohci_dump_ed(sc->sc_ctrl_head); 1735 printf("sed:\n"); 1736 ohci_dump_ed(sed); 1737 ohci_dump_tds(setup); 1738 } 1739 #endif 1740 1741 return (USBD_NORMAL_COMPLETION); 1742 1743 bad3: 1744 ohci_free_std(sc, tail); 1745 bad2: 1746 ohci_free_std(sc, stat); 1747 bad1: 1748 return (err); 1749 } 1750 1751 /* 1752 * Add an ED to the schedule. Called at splusb(). 1753 */ 1754 void 1755 ohci_add_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1756 { 1757 DPRINTFN(8,("ohci_add_ed: sed=%p head=%p\n", sed, head)); 1758 1759 SPLUSBCHECK; 1760 sed->next = head->next; 1761 sed->ed.ed_nexted = head->ed.ed_nexted; 1762 head->next = sed; 1763 head->ed.ed_nexted = htole32(sed->physaddr); 1764 } 1765 1766 /* 1767 * Remove an ED from the schedule. Called at splusb(). 1768 */ 1769 void 1770 ohci_rem_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1771 { 1772 ohci_soft_ed_t *p; 1773 1774 SPLUSBCHECK; 1775 1776 /* XXX */ 1777 for (p = head; p != NULL && p->next != sed; p = p->next) 1778 ; 1779 if (p == NULL) 1780 panic("ohci_rem_ed: ED not found"); 1781 p->next = sed->next; 1782 p->ed.ed_nexted = sed->ed.ed_nexted; 1783 } 1784 1785 /* 1786 * When a transfer is completed the TD is added to the done queue by 1787 * the host controller. This queue is the processed by software. 1788 * Unfortunately the queue contains the physical address of the TD 1789 * and we have no simple way to translate this back to a kernel address. 1790 * To make the translation possible (and fast) we use a hash table of 1791 * TDs currently in the schedule. The physical address is used as the 1792 * hash value. 1793 */ 1794 1795 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1796 /* Called at splusb() */ 1797 void 1798 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1799 { 1800 int h = HASH(std->physaddr); 1801 1802 SPLUSBCHECK; 1803 1804 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1805 } 1806 1807 /* Called at splusb() */ 1808 void 1809 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1810 { 1811 SPLUSBCHECK; 1812 1813 LIST_REMOVE(std, hnext); 1814 } 1815 1816 ohci_soft_td_t * 1817 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a) 1818 { 1819 int h = HASH(a); 1820 ohci_soft_td_t *std; 1821 1822 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1823 std != NULL; 1824 std = LIST_NEXT(std, hnext)) 1825 if (std->physaddr == a) 1826 return (std); 1827 return (NULL); 1828 } 1829 1830 /* Called at splusb() */ 1831 void 1832 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1833 { 1834 int h = HASH(sitd->physaddr); 1835 1836 SPLUSBCHECK; 1837 1838 DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n", 1839 sitd, (u_long)sitd->physaddr)); 1840 1841 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext); 1842 } 1843 1844 /* Called at splusb() */ 1845 void 1846 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1847 { 1848 SPLUSBCHECK; 1849 1850 DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n", 1851 sitd, (u_long)sitd->physaddr)); 1852 1853 LIST_REMOVE(sitd, hnext); 1854 } 1855 1856 ohci_soft_itd_t * 1857 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a) 1858 { 1859 int h = HASH(a); 1860 ohci_soft_itd_t *sitd; 1861 1862 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]); 1863 sitd != NULL; 1864 sitd = LIST_NEXT(sitd, hnext)) 1865 if (sitd->physaddr == a) 1866 return (sitd); 1867 return (NULL); 1868 } 1869 1870 void 1871 ohci_timeout(void *addr) 1872 { 1873 struct ohci_xfer *oxfer = addr; 1874 struct ohci_pipe *opipe = (struct ohci_pipe *)oxfer->xfer.pipe; 1875 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1876 1877 DPRINTF(("ohci_timeout: oxfer=%p\n", oxfer)); 1878 1879 if (sc->sc_dying) { 1880 ohci_abort_xfer(&oxfer->xfer, USBD_TIMEOUT); 1881 return; 1882 } 1883 1884 /* Execute the abort in a process context. */ 1885 usb_init_task(&oxfer->abort_task, ohci_timeout_task, addr); 1886 usb_add_task(oxfer->xfer.pipe->device, &oxfer->abort_task); 1887 } 1888 1889 void 1890 ohci_timeout_task(void *addr) 1891 { 1892 usbd_xfer_handle xfer = addr; 1893 int s; 1894 1895 DPRINTF(("ohci_timeout_task: xfer=%p\n", xfer)); 1896 1897 s = splusb(); 1898 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1899 splx(s); 1900 } 1901 1902 #ifdef OHCI_DEBUG 1903 void 1904 ohci_dump_tds(ohci_soft_td_t *std) 1905 { 1906 for (; std; std = std->nexttd) 1907 ohci_dump_td(std); 1908 } 1909 1910 void 1911 ohci_dump_td(ohci_soft_td_t *std) 1912 { 1913 char sbuf[128]; 1914 1915 bitmask_snprintf((u_int32_t)le32toh(std->td.td_flags), 1916 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 1917 sbuf, sizeof(sbuf)); 1918 1919 printf("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx " 1920 "nexttd=0x%08lx be=0x%08lx\n", 1921 std, (u_long)std->physaddr, sbuf, 1922 OHCI_TD_GET_DI(le32toh(std->td.td_flags)), 1923 OHCI_TD_GET_EC(le32toh(std->td.td_flags)), 1924 OHCI_TD_GET_CC(le32toh(std->td.td_flags)), 1925 (u_long)le32toh(std->td.td_cbp), 1926 (u_long)le32toh(std->td.td_nexttd), 1927 (u_long)le32toh(std->td.td_be)); 1928 } 1929 1930 void 1931 ohci_dump_itd(ohci_soft_itd_t *sitd) 1932 { 1933 int i; 1934 1935 printf("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n" 1936 "bp0=0x%08lx next=0x%08lx be=0x%08lx\n", 1937 sitd, (u_long)sitd->physaddr, 1938 OHCI_ITD_GET_SF(le32toh(sitd->itd.itd_flags)), 1939 OHCI_ITD_GET_DI(le32toh(sitd->itd.itd_flags)), 1940 OHCI_ITD_GET_FC(le32toh(sitd->itd.itd_flags)), 1941 OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags)), 1942 (u_long)le32toh(sitd->itd.itd_bp0), 1943 (u_long)le32toh(sitd->itd.itd_nextitd), 1944 (u_long)le32toh(sitd->itd.itd_be)); 1945 for (i = 0; i < OHCI_ITD_NOFFSET; i++) 1946 printf("offs[%d]=0x%04x ", i, 1947 (u_int)le16toh(sitd->itd.itd_offset[i])); 1948 printf("\n"); 1949 } 1950 1951 void 1952 ohci_dump_itds(ohci_soft_itd_t *sitd) 1953 { 1954 for (; sitd; sitd = sitd->nextitd) 1955 ohci_dump_itd(sitd); 1956 } 1957 1958 void 1959 ohci_dump_ed(ohci_soft_ed_t *sed) 1960 { 1961 char sbuf[128], sbuf2[128]; 1962 1963 bitmask_snprintf((u_int32_t)le32toh(sed->ed.ed_flags), 1964 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO", 1965 sbuf, sizeof(sbuf)); 1966 bitmask_snprintf((u_int32_t)le32toh(sed->ed.ed_headp), 1967 "\20\1HALT\2CARRY", sbuf2, sizeof(sbuf2)); 1968 1969 printf("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d flags=%s\ntailp=0x%08lx " 1970 "headflags=%s headp=0x%08lx nexted=0x%08lx\n", 1971 sed, (u_long)sed->physaddr, 1972 OHCI_ED_GET_FA(le32toh(sed->ed.ed_flags)), 1973 OHCI_ED_GET_EN(le32toh(sed->ed.ed_flags)), 1974 OHCI_ED_GET_MAXP(le32toh(sed->ed.ed_flags)), sbuf, 1975 (u_long)le32toh(sed->ed.ed_tailp), sbuf2, 1976 (u_long)le32toh(sed->ed.ed_headp), 1977 (u_long)le32toh(sed->ed.ed_nexted)); 1978 } 1979 #endif 1980 1981 usbd_status 1982 ohci_open(usbd_pipe_handle pipe) 1983 { 1984 usbd_device_handle dev = pipe->device; 1985 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1986 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1987 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1988 u_int8_t addr = dev->address; 1989 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1990 ohci_soft_ed_t *sed; 1991 ohci_soft_td_t *std; 1992 ohci_soft_itd_t *sitd; 1993 ohci_physaddr_t tdphys; 1994 u_int32_t fmt; 1995 usbd_status err; 1996 int s; 1997 int ival; 1998 1999 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 2000 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 2001 2002 if (sc->sc_dying) 2003 return (USBD_IOERROR); 2004 2005 std = NULL; 2006 sed = NULL; 2007 2008 if (addr == sc->sc_addr) { 2009 switch (ed->bEndpointAddress) { 2010 case USB_CONTROL_ENDPOINT: 2011 pipe->methods = &ohci_root_ctrl_methods; 2012 break; 2013 case UE_DIR_IN | OHCI_INTR_ENDPT: 2014 pipe->methods = &ohci_root_intr_methods; 2015 break; 2016 default: 2017 return (USBD_INVAL); 2018 } 2019 } else { 2020 sed = ohci_alloc_sed(sc); 2021 if (sed == NULL) 2022 goto bad0; 2023 opipe->sed = sed; 2024 if (xfertype == UE_ISOCHRONOUS) { 2025 sitd = ohci_alloc_sitd(sc); 2026 if (sitd == NULL) 2027 goto bad1; 2028 opipe->tail.itd = sitd; 2029 tdphys = sitd->physaddr; 2030 fmt = OHCI_ED_FORMAT_ISO; 2031 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 2032 fmt |= OHCI_ED_DIR_IN; 2033 else 2034 fmt |= OHCI_ED_DIR_OUT; 2035 } else { 2036 std = ohci_alloc_std(sc); 2037 if (std == NULL) 2038 goto bad1; 2039 opipe->tail.td = std; 2040 tdphys = std->physaddr; 2041 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD; 2042 } 2043 sed->ed.ed_flags = htole32( 2044 OHCI_ED_SET_FA(addr) | 2045 OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) | 2046 (dev->speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) | 2047 fmt | 2048 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 2049 sed->ed.ed_headp = sed->ed.ed_tailp = htole32(tdphys); 2050 2051 switch (xfertype) { 2052 case UE_CONTROL: 2053 pipe->methods = &ohci_device_ctrl_methods; 2054 err = usb_allocmem(&sc->sc_bus, 2055 sizeof(usb_device_request_t), 2056 0, &opipe->u.ctl.reqdma); 2057 if (err) 2058 goto bad; 2059 s = splusb(); 2060 ohci_add_ed(sed, sc->sc_ctrl_head); 2061 splx(s); 2062 break; 2063 case UE_INTERRUPT: 2064 pipe->methods = &ohci_device_intr_methods; 2065 ival = pipe->interval; 2066 if (ival == USBD_DEFAULT_INTERVAL) 2067 ival = ed->bInterval; 2068 return (ohci_device_setintr(sc, opipe, ival)); 2069 case UE_ISOCHRONOUS: 2070 pipe->methods = &ohci_device_isoc_methods; 2071 return (ohci_setup_isoc(pipe)); 2072 case UE_BULK: 2073 pipe->methods = &ohci_device_bulk_methods; 2074 s = splusb(); 2075 ohci_add_ed(sed, sc->sc_bulk_head); 2076 splx(s); 2077 break; 2078 } 2079 } 2080 return (USBD_NORMAL_COMPLETION); 2081 2082 bad: 2083 if (std != NULL) 2084 ohci_free_std(sc, std); 2085 bad1: 2086 if (sed != NULL) 2087 ohci_free_sed(sc, sed); 2088 bad0: 2089 return (USBD_NOMEM); 2090 2091 } 2092 2093 /* 2094 * Close a reqular pipe. 2095 * Assumes that there are no pending transactions. 2096 */ 2097 void 2098 ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head) 2099 { 2100 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2101 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2102 ohci_soft_ed_t *sed = opipe->sed; 2103 int s; 2104 2105 s = splusb(); 2106 #ifdef DIAGNOSTIC 2107 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 2108 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2109 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) { 2110 ohci_soft_td_t *std; 2111 std = ohci_hash_find_td(sc, le32toh(sed->ed.ed_headp)); 2112 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 2113 "tl=0x%x pipe=%p, std=%p\n", sed, 2114 (int)le32toh(sed->ed.ed_headp), 2115 (int)le32toh(sed->ed.ed_tailp), 2116 pipe, std); 2117 #ifdef USB_DEBUG 2118 usbd_dump_pipe(&opipe->pipe); 2119 #endif 2120 #ifdef OHCI_DEBUG 2121 ohci_dump_ed(sed); 2122 if (std) 2123 ohci_dump_td(std); 2124 #endif 2125 usb_delay_ms(&sc->sc_bus, 2); 2126 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2127 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) 2128 printf("ohci_close_pipe: pipe still not empty\n"); 2129 } 2130 #endif 2131 ohci_rem_ed(sed, head); 2132 /* Make sure the host controller is not touching this ED */ 2133 usb_delay_ms(&sc->sc_bus, 1); 2134 splx(s); 2135 ohci_free_sed(sc, opipe->sed); 2136 } 2137 2138 /* 2139 * Abort a device request. 2140 * If this routine is called at splusb() it guarantees that the request 2141 * will be removed from the hardware scheduling and that the callback 2142 * for it will be called with USBD_CANCELLED status. 2143 * It's impossible to guarantee that the requested transfer will not 2144 * have happened since the hardware runs concurrently. 2145 * If the transaction has already happened we rely on the ordinary 2146 * interrupt processing to process it. 2147 */ 2148 void 2149 ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2150 { 2151 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2152 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 2153 ohci_soft_ed_t *sed = opipe->sed; 2154 ohci_soft_td_t *p, *n; 2155 ohci_physaddr_t headp; 2156 int s, hit; 2157 int wake; 2158 2159 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p sed=%p\n", xfer, opipe,sed)); 2160 2161 if (sc->sc_dying) { 2162 /* If we're dying, just do the software part. */ 2163 s = splusb(); 2164 xfer->status = status; /* make software ignore it */ 2165 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 2166 usb_transfer_complete(xfer); 2167 splx(s); 2168 } 2169 2170 if (xfer->device->bus->intr_context || !curproc) 2171 panic("ohci_abort_xfer: not in process context"); 2172 2173 /* 2174 * If an abort is already in progress then just wait for it to 2175 * complete and return. 2176 */ 2177 if (xfer->hcflags & UXFER_ABORTING) { 2178 DPRINTFN(2, ("ohci_abort_xfer: already aborting\n")); 2179 #ifdef DIAGNOSTIC 2180 if (status == USBD_TIMEOUT) 2181 printf("0hci_abort_xfer: TIMEOUT while aborting\n"); 2182 #endif 2183 /* Override the status which might be USBD_TIMEOUT. */ 2184 xfer->status = status; 2185 DPRINTFN(2, ("ohci_abort_xfer: waiting for abort to finish\n")); 2186 xfer->hcflags |= UXFER_ABORTWAIT; 2187 while (xfer->hcflags & UXFER_ABORTING) 2188 tsleep(&xfer->hcflags, PZERO, "ohciaw", 0); 2189 return; 2190 } 2191 xfer->hcflags |= UXFER_ABORTING; 2192 2193 /* 2194 * Step 1: Make interrupt routine and hardware ignore xfer. 2195 */ 2196 s = splusb(); 2197 xfer->status = status; /* make software ignore it */ 2198 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 2199 splx(s); 2200 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed)); 2201 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 2202 2203 /* 2204 * Step 2: Wait until we know hardware has finished any possible 2205 * use of the xfer. Also make sure the soft interrupt routine 2206 * has run. 2207 */ 2208 usb_delay_ms(opipe->pipe.device->bus, 20); /* Hardware finishes in 1ms */ 2209 s = splusb(); 2210 #ifdef USB_USE_SOFTINTR 2211 sc->sc_softwake = 1; 2212 #endif /* USB_USE_SOFTINTR */ 2213 usb_schedsoftintr(&sc->sc_bus); 2214 #ifdef USB_USE_SOFTINTR 2215 tsleep(&sc->sc_softwake, PZERO, "ohciab", 0); 2216 #endif /* USB_USE_SOFTINTR */ 2217 splx(s); 2218 2219 /* 2220 * Step 3: Remove any vestiges of the xfer from the hardware. 2221 * The complication here is that the hardware may have executed 2222 * beyond the xfer we're trying to abort. So as we're scanning 2223 * the TDs of this xfer we check if the hardware points to 2224 * any of them. 2225 */ 2226 s = splusb(); /* XXX why? */ 2227 p = xfer->hcpriv; 2228 #ifdef DIAGNOSTIC 2229 if (p == NULL) { 2230 xfer->hcflags &= ~UXFER_ABORTING; /* XXX */ 2231 splx(s); 2232 printf("ohci_abort_xfer: hcpriv is NULL\n"); 2233 return; 2234 } 2235 #endif 2236 #ifdef OHCI_DEBUG 2237 if (ohcidebug > 1) { 2238 DPRINTF(("ohci_abort_xfer: sed=\n")); 2239 ohci_dump_ed(sed); 2240 ohci_dump_tds(p); 2241 } 2242 #endif 2243 headp = le32toh(sed->ed.ed_headp) & OHCI_HEADMASK; 2244 hit = 0; 2245 for (; p->xfer == xfer; p = n) { 2246 hit |= headp == p->physaddr; 2247 n = p->nexttd; 2248 ohci_free_std(sc, p); 2249 } 2250 /* Zap headp register if hardware pointed inside the xfer. */ 2251 if (hit) { 2252 DPRINTFN(1,("ohci_abort_xfer: set hd=0x%08x, tl=0x%08x\n", 2253 (int)p->physaddr, (int)le32toh(sed->ed.ed_tailp))); 2254 sed->ed.ed_headp = htole32(p->physaddr); /* unlink TDs */ 2255 } else { 2256 DPRINTFN(1,("ohci_abort_xfer: no hit\n")); 2257 } 2258 2259 /* 2260 * Step 4: Turn on hardware again. 2261 */ 2262 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 2263 2264 /* 2265 * Step 5: Execute callback. 2266 */ 2267 wake = xfer->hcflags & UXFER_ABORTWAIT; 2268 xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT); 2269 usb_transfer_complete(xfer); 2270 if (wake) 2271 wakeup(&xfer->hcflags); 2272 2273 splx(s); 2274 } 2275 2276 /* 2277 * Data structures and routines to emulate the root hub. 2278 */ 2279 Static usb_device_descriptor_t ohci_devd = { 2280 USB_DEVICE_DESCRIPTOR_SIZE, 2281 UDESC_DEVICE, /* type */ 2282 {0x00, 0x01}, /* USB version */ 2283 UDCLASS_HUB, /* class */ 2284 UDSUBCLASS_HUB, /* subclass */ 2285 UDPROTO_FSHUB, 2286 64, /* max packet */ 2287 {0},{0},{0x00,0x01}, /* device id */ 2288 1,2,0, /* string indicies */ 2289 1 /* # of configurations */ 2290 }; 2291 2292 Static usb_config_descriptor_t ohci_confd = { 2293 USB_CONFIG_DESCRIPTOR_SIZE, 2294 UDESC_CONFIG, 2295 {USB_CONFIG_DESCRIPTOR_SIZE + 2296 USB_INTERFACE_DESCRIPTOR_SIZE + 2297 USB_ENDPOINT_DESCRIPTOR_SIZE}, 2298 1, 2299 1, 2300 0, 2301 UC_SELF_POWERED, 2302 0 /* max power */ 2303 }; 2304 2305 Static usb_interface_descriptor_t ohci_ifcd = { 2306 USB_INTERFACE_DESCRIPTOR_SIZE, 2307 UDESC_INTERFACE, 2308 0, 2309 0, 2310 1, 2311 UICLASS_HUB, 2312 UISUBCLASS_HUB, 2313 UIPROTO_FSHUB, 2314 0 2315 }; 2316 2317 Static usb_endpoint_descriptor_t ohci_endpd = { 2318 USB_ENDPOINT_DESCRIPTOR_SIZE, 2319 UDESC_ENDPOINT, 2320 UE_DIR_IN | OHCI_INTR_ENDPT, 2321 UE_INTERRUPT, 2322 {8, 0}, /* max packet */ 2323 255 2324 }; 2325 2326 Static usb_hub_descriptor_t ohci_hubd = { 2327 USB_HUB_DESCRIPTOR_SIZE, 2328 UDESC_HUB, 2329 0, 2330 {0,0}, 2331 0, 2332 0, 2333 {0}, 2334 }; 2335 2336 Static int 2337 ohci_str(usb_string_descriptor_t *p, int l, const char *s) 2338 { 2339 int i; 2340 2341 if (l == 0) 2342 return (0); 2343 p->bLength = 2 * strlen(s) + 2; 2344 if (l == 1) 2345 return (1); 2346 p->bDescriptorType = UDESC_STRING; 2347 l -= 2; 2348 for (i = 0; s[i] && l > 1; i++, l -= 2) 2349 USETW2(p->bString[i], 0, s[i]); 2350 return (2*i+2); 2351 } 2352 2353 /* 2354 * Simulate a hardware hub by handling all the necessary requests. 2355 */ 2356 Static usbd_status 2357 ohci_root_ctrl_transfer(usbd_xfer_handle xfer) 2358 { 2359 usbd_status err; 2360 2361 /* Insert last in queue. */ 2362 err = usb_insert_transfer(xfer); 2363 if (err) 2364 return (err); 2365 2366 /* Pipe isn't running, start first */ 2367 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2368 } 2369 2370 Static usbd_status 2371 ohci_root_ctrl_start(usbd_xfer_handle xfer) 2372 { 2373 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2374 usb_device_request_t *req; 2375 void *buf = NULL; 2376 int port, i; 2377 int s, len, value, index, l, totlen = 0; 2378 usb_port_status_t ps; 2379 usb_hub_descriptor_t hubd; 2380 usbd_status err; 2381 u_int32_t v; 2382 2383 if (sc->sc_dying) 2384 return (USBD_IOERROR); 2385 2386 #ifdef DIAGNOSTIC 2387 if (!(xfer->rqflags & URQ_REQUEST)) 2388 /* XXX panic */ 2389 return (USBD_INVAL); 2390 #endif 2391 req = &xfer->request; 2392 2393 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 2394 req->bmRequestType, req->bRequest)); 2395 2396 len = UGETW(req->wLength); 2397 value = UGETW(req->wValue); 2398 index = UGETW(req->wIndex); 2399 2400 if (len != 0) 2401 buf = KERNADDR(&xfer->dmabuf, 0); 2402 2403 #define C(x,y) ((x) | ((y) << 8)) 2404 switch(C(req->bRequest, req->bmRequestType)) { 2405 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 2406 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 2407 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 2408 /* 2409 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 2410 * for the integrated root hub. 2411 */ 2412 break; 2413 case C(UR_GET_CONFIG, UT_READ_DEVICE): 2414 if (len > 0) { 2415 *(u_int8_t *)buf = sc->sc_conf; 2416 totlen = 1; 2417 } 2418 break; 2419 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2420 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 2421 switch(value >> 8) { 2422 case UDESC_DEVICE: 2423 if ((value & 0xff) != 0) { 2424 err = USBD_IOERROR; 2425 goto ret; 2426 } 2427 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 2428 USETW(ohci_devd.idVendor, sc->sc_id_vendor); 2429 memcpy(buf, &ohci_devd, l); 2430 break; 2431 case UDESC_CONFIG: 2432 if ((value & 0xff) != 0) { 2433 err = USBD_IOERROR; 2434 goto ret; 2435 } 2436 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 2437 memcpy(buf, &ohci_confd, l); 2438 buf = (char *)buf + l; 2439 len -= l; 2440 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 2441 totlen += l; 2442 memcpy(buf, &ohci_ifcd, l); 2443 buf = (char *)buf + l; 2444 len -= l; 2445 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 2446 totlen += l; 2447 memcpy(buf, &ohci_endpd, l); 2448 break; 2449 case UDESC_STRING: 2450 if (len == 0) 2451 break; 2452 *(u_int8_t *)buf = 0; 2453 totlen = 1; 2454 switch (value & 0xff) { 2455 case 0: /* Language table */ 2456 totlen = ohci_str(buf, len, "\001"); 2457 break; 2458 case 1: /* Vendor */ 2459 totlen = ohci_str(buf, len, sc->sc_vendor); 2460 break; 2461 case 2: /* Product */ 2462 totlen = ohci_str(buf, len, "OHCI root hub"); 2463 break; 2464 } 2465 break; 2466 default: 2467 err = USBD_IOERROR; 2468 goto ret; 2469 } 2470 break; 2471 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 2472 if (len > 0) { 2473 *(u_int8_t *)buf = 0; 2474 totlen = 1; 2475 } 2476 break; 2477 case C(UR_GET_STATUS, UT_READ_DEVICE): 2478 if (len > 1) { 2479 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 2480 totlen = 2; 2481 } 2482 break; 2483 case C(UR_GET_STATUS, UT_READ_INTERFACE): 2484 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 2485 if (len > 1) { 2486 USETW(((usb_status_t *)buf)->wStatus, 0); 2487 totlen = 2; 2488 } 2489 break; 2490 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 2491 if (value >= USB_MAX_DEVICES) { 2492 err = USBD_IOERROR; 2493 goto ret; 2494 } 2495 sc->sc_addr = value; 2496 break; 2497 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 2498 if (value != 0 && value != 1) { 2499 err = USBD_IOERROR; 2500 goto ret; 2501 } 2502 sc->sc_conf = value; 2503 break; 2504 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 2505 break; 2506 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 2507 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 2508 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 2509 err = USBD_IOERROR; 2510 goto ret; 2511 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 2512 break; 2513 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 2514 break; 2515 /* Hub requests */ 2516 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2517 break; 2518 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2519 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 2520 "port=%d feature=%d\n", 2521 index, value)); 2522 if (index < 1 || index > sc->sc_noport) { 2523 err = USBD_IOERROR; 2524 goto ret; 2525 } 2526 port = OHCI_RH_PORT_STATUS(index); 2527 switch(value) { 2528 case UHF_PORT_ENABLE: 2529 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2530 break; 2531 case UHF_PORT_SUSPEND: 2532 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2533 break; 2534 case UHF_PORT_POWER: 2535 /* Yes, writing to the LOW_SPEED bit clears power. */ 2536 OWRITE4(sc, port, UPS_LOW_SPEED); 2537 break; 2538 case UHF_C_PORT_CONNECTION: 2539 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2540 break; 2541 case UHF_C_PORT_ENABLE: 2542 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2543 break; 2544 case UHF_C_PORT_SUSPEND: 2545 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2546 break; 2547 case UHF_C_PORT_OVER_CURRENT: 2548 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2549 break; 2550 case UHF_C_PORT_RESET: 2551 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2552 break; 2553 default: 2554 err = USBD_IOERROR; 2555 goto ret; 2556 } 2557 switch(value) { 2558 case UHF_C_PORT_CONNECTION: 2559 case UHF_C_PORT_ENABLE: 2560 case UHF_C_PORT_SUSPEND: 2561 case UHF_C_PORT_OVER_CURRENT: 2562 case UHF_C_PORT_RESET: 2563 /* Enable RHSC interrupt if condition is cleared. */ 2564 if ((OREAD4(sc, port) >> 16) == 0) 2565 ohci_rhsc_enable(sc); 2566 break; 2567 default: 2568 break; 2569 } 2570 break; 2571 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2572 if ((value & 0xff) != 0) { 2573 err = USBD_IOERROR; 2574 goto ret; 2575 } 2576 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2577 hubd = ohci_hubd; 2578 hubd.bNbrPorts = sc->sc_noport; 2579 USETW(hubd.wHubCharacteristics, 2580 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2581 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2582 /* XXX overcurrent */ 2583 ); 2584 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2585 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2586 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2587 hubd.DeviceRemovable[i++] = (u_int8_t)v; 2588 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2589 l = min(len, hubd.bDescLength); 2590 totlen = l; 2591 memcpy(buf, &hubd, l); 2592 break; 2593 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2594 if (len != 4) { 2595 err = USBD_IOERROR; 2596 goto ret; 2597 } 2598 memset(buf, 0, len); /* ? XXX */ 2599 totlen = len; 2600 break; 2601 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2602 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 2603 index)); 2604 if (index < 1 || index > sc->sc_noport) { 2605 err = USBD_IOERROR; 2606 goto ret; 2607 } 2608 if (len != 4) { 2609 err = USBD_IOERROR; 2610 goto ret; 2611 } 2612 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2613 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 2614 v)); 2615 USETW(ps.wPortStatus, v); 2616 USETW(ps.wPortChange, v >> 16); 2617 l = min(len, sizeof ps); 2618 memcpy(buf, &ps, l); 2619 totlen = l; 2620 break; 2621 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2622 err = USBD_IOERROR; 2623 goto ret; 2624 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2625 break; 2626 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2627 if (index < 1 || index > sc->sc_noport) { 2628 err = USBD_IOERROR; 2629 goto ret; 2630 } 2631 port = OHCI_RH_PORT_STATUS(index); 2632 switch(value) { 2633 case UHF_PORT_ENABLE: 2634 OWRITE4(sc, port, UPS_PORT_ENABLED); 2635 break; 2636 case UHF_PORT_SUSPEND: 2637 OWRITE4(sc, port, UPS_SUSPEND); 2638 break; 2639 case UHF_PORT_RESET: 2640 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 2641 index)); 2642 OWRITE4(sc, port, UPS_RESET); 2643 for (i = 0; i < 5; i++) { 2644 usb_delay_ms(&sc->sc_bus, 2645 USB_PORT_ROOT_RESET_DELAY); 2646 if (sc->sc_dying) { 2647 err = USBD_IOERROR; 2648 goto ret; 2649 } 2650 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2651 break; 2652 } 2653 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 2654 index, OREAD4(sc, port))); 2655 break; 2656 case UHF_PORT_POWER: 2657 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 2658 "%d\n", index)); 2659 OWRITE4(sc, port, UPS_PORT_POWER); 2660 break; 2661 default: 2662 err = USBD_IOERROR; 2663 goto ret; 2664 } 2665 break; 2666 default: 2667 err = USBD_IOERROR; 2668 goto ret; 2669 } 2670 xfer->actlen = totlen; 2671 err = USBD_NORMAL_COMPLETION; 2672 ret: 2673 xfer->status = err; 2674 s = splusb(); 2675 usb_transfer_complete(xfer); 2676 splx(s); 2677 return (USBD_IN_PROGRESS); 2678 } 2679 2680 /* Abort a root control request. */ 2681 Static void 2682 ohci_root_ctrl_abort(usbd_xfer_handle xfer) 2683 { 2684 /* Nothing to do, all transfers are synchronous. */ 2685 } 2686 2687 /* Close the root pipe. */ 2688 Static void 2689 ohci_root_ctrl_close(usbd_pipe_handle pipe) 2690 { 2691 DPRINTF(("ohci_root_ctrl_close\n")); 2692 /* Nothing to do. */ 2693 } 2694 2695 Static usbd_status 2696 ohci_root_intr_transfer(usbd_xfer_handle xfer) 2697 { 2698 usbd_status err; 2699 2700 /* Insert last in queue. */ 2701 err = usb_insert_transfer(xfer); 2702 if (err) 2703 return (err); 2704 2705 /* Pipe isn't running, start first */ 2706 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2707 } 2708 2709 Static usbd_status 2710 ohci_root_intr_start(usbd_xfer_handle xfer) 2711 { 2712 usbd_pipe_handle pipe = xfer->pipe; 2713 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2714 2715 if (sc->sc_dying) 2716 return (USBD_IOERROR); 2717 2718 sc->sc_intrxfer = xfer; 2719 2720 return (USBD_IN_PROGRESS); 2721 } 2722 2723 /* Abort a root interrupt request. */ 2724 Static void 2725 ohci_root_intr_abort(usbd_xfer_handle xfer) 2726 { 2727 int s; 2728 2729 if (xfer->pipe->intrxfer == xfer) { 2730 DPRINTF(("ohci_root_intr_abort: remove\n")); 2731 xfer->pipe->intrxfer = NULL; 2732 } 2733 xfer->status = USBD_CANCELLED; 2734 s = splusb(); 2735 usb_transfer_complete(xfer); 2736 splx(s); 2737 } 2738 2739 /* Close the root pipe. */ 2740 Static void 2741 ohci_root_intr_close(usbd_pipe_handle pipe) 2742 { 2743 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2744 2745 DPRINTF(("ohci_root_intr_close\n")); 2746 2747 sc->sc_intrxfer = NULL; 2748 } 2749 2750 /************************/ 2751 2752 Static usbd_status 2753 ohci_device_ctrl_transfer(usbd_xfer_handle xfer) 2754 { 2755 usbd_status err; 2756 2757 /* Insert last in queue. */ 2758 err = usb_insert_transfer(xfer); 2759 if (err) 2760 return (err); 2761 2762 /* Pipe isn't running, start first */ 2763 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2764 } 2765 2766 Static usbd_status 2767 ohci_device_ctrl_start(usbd_xfer_handle xfer) 2768 { 2769 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2770 usbd_status err; 2771 2772 if (sc->sc_dying) 2773 return (USBD_IOERROR); 2774 2775 #ifdef DIAGNOSTIC 2776 if (!(xfer->rqflags & URQ_REQUEST)) { 2777 /* XXX panic */ 2778 printf("ohci_device_ctrl_transfer: not a request\n"); 2779 return (USBD_INVAL); 2780 } 2781 #endif 2782 2783 err = ohci_device_request(xfer); 2784 if (err) 2785 return (err); 2786 2787 if (sc->sc_bus.use_polling) 2788 ohci_waitintr(sc, xfer); 2789 return (USBD_IN_PROGRESS); 2790 } 2791 2792 /* Abort a device control request. */ 2793 Static void 2794 ohci_device_ctrl_abort(usbd_xfer_handle xfer) 2795 { 2796 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer)); 2797 ohci_abort_xfer(xfer, USBD_CANCELLED); 2798 } 2799 2800 /* Close a device control pipe. */ 2801 Static void 2802 ohci_device_ctrl_close(usbd_pipe_handle pipe) 2803 { 2804 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2805 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2806 2807 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe)); 2808 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2809 ohci_free_std(sc, opipe->tail.td); 2810 } 2811 2812 /************************/ 2813 2814 Static void 2815 ohci_device_clear_toggle(usbd_pipe_handle pipe) 2816 { 2817 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2818 2819 opipe->sed->ed.ed_headp &= htole32(~OHCI_TOGGLECARRY); 2820 } 2821 2822 Static void 2823 ohci_noop(usbd_pipe_handle pipe) 2824 { 2825 } 2826 2827 Static usbd_status 2828 ohci_device_bulk_transfer(usbd_xfer_handle xfer) 2829 { 2830 usbd_status err; 2831 2832 /* Insert last in queue. */ 2833 err = usb_insert_transfer(xfer); 2834 if (err) 2835 return (err); 2836 2837 /* Pipe isn't running, start first */ 2838 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2839 } 2840 2841 Static usbd_status 2842 ohci_device_bulk_start(usbd_xfer_handle xfer) 2843 { 2844 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2845 usbd_device_handle dev = opipe->pipe.device; 2846 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2847 int addr = dev->address; 2848 ohci_soft_td_t *data, *tail, *tdp; 2849 ohci_soft_ed_t *sed; 2850 int s, len, isread, endpt; 2851 usbd_status err; 2852 2853 if (sc->sc_dying) 2854 return (USBD_IOERROR); 2855 2856 #ifdef DIAGNOSTIC 2857 if (xfer->rqflags & URQ_REQUEST) { 2858 /* XXX panic */ 2859 printf("ohci_device_bulk_start: a request\n"); 2860 return (USBD_INVAL); 2861 } 2862 #endif 2863 2864 len = xfer->length; 2865 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 2866 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2867 sed = opipe->sed; 2868 2869 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d " 2870 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags, 2871 endpt)); 2872 2873 opipe->u.bulk.isread = isread; 2874 opipe->u.bulk.length = len; 2875 2876 /* Update device address */ 2877 sed->ed.ed_flags = htole32( 2878 (le32toh(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) | 2879 OHCI_ED_SET_FA(addr)); 2880 2881 /* Allocate a chain of new TDs (including a new tail). */ 2882 data = opipe->tail.td; 2883 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 2884 data, &tail); 2885 /* We want interrupt at the end of the transfer. */ 2886 tail->td.td_flags &= htole32(~OHCI_TD_INTR_MASK); 2887 tail->td.td_flags |= htole32(OHCI_TD_SET_DI(1)); 2888 tail->flags |= OHCI_CALL_DONE; 2889 tail = tail->nexttd; /* point at sentinel */ 2890 if (err) 2891 return (err); 2892 2893 tail->xfer = NULL; 2894 xfer->hcpriv = data; 2895 2896 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x " 2897 "td_cbp=0x%08x td_be=0x%08x\n", 2898 (int)le32toh(sed->ed.ed_flags), 2899 (int)le32toh(data->td.td_flags), 2900 (int)le32toh(data->td.td_cbp), 2901 (int)le32toh(data->td.td_be))); 2902 2903 #ifdef OHCI_DEBUG 2904 if (ohcidebug > 5) { 2905 ohci_dump_ed(sed); 2906 ohci_dump_tds(data); 2907 } 2908 #endif 2909 2910 /* Insert ED in schedule */ 2911 s = splusb(); 2912 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 2913 tdp->xfer = xfer; 2914 } 2915 sed->ed.ed_tailp = htole32(tail->physaddr); 2916 opipe->tail.td = tail; 2917 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 2918 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 2919 if (xfer->timeout && !sc->sc_bus.use_polling) { 2920 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2921 ohci_timeout, xfer); 2922 } 2923 2924 #if 0 2925 /* This goes wrong if we are too slow. */ 2926 if (ohcidebug > 10) { 2927 delay(10000); 2928 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2929 OREAD4(sc, OHCI_COMMAND_STATUS))); 2930 ohci_dump_ed(sed); 2931 ohci_dump_tds(data); 2932 } 2933 #endif 2934 2935 splx(s); 2936 2937 return (USBD_IN_PROGRESS); 2938 } 2939 2940 Static void 2941 ohci_device_bulk_abort(usbd_xfer_handle xfer) 2942 { 2943 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer)); 2944 ohci_abort_xfer(xfer, USBD_CANCELLED); 2945 } 2946 2947 /* 2948 * Close a device bulk pipe. 2949 */ 2950 Static void 2951 ohci_device_bulk_close(usbd_pipe_handle pipe) 2952 { 2953 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2954 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2955 2956 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe)); 2957 ohci_close_pipe(pipe, sc->sc_bulk_head); 2958 ohci_free_std(sc, opipe->tail.td); 2959 } 2960 2961 /************************/ 2962 2963 Static usbd_status 2964 ohci_device_intr_transfer(usbd_xfer_handle xfer) 2965 { 2966 usbd_status err; 2967 2968 /* Insert last in queue. */ 2969 err = usb_insert_transfer(xfer); 2970 if (err) 2971 return (err); 2972 2973 /* Pipe isn't running, start first */ 2974 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2975 } 2976 2977 Static usbd_status 2978 ohci_device_intr_start(usbd_xfer_handle xfer) 2979 { 2980 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2981 usbd_device_handle dev = opipe->pipe.device; 2982 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2983 ohci_soft_ed_t *sed = opipe->sed; 2984 ohci_soft_td_t *data, *tail; 2985 int len; 2986 int s; 2987 2988 if (sc->sc_dying) 2989 return (USBD_IOERROR); 2990 2991 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d " 2992 "flags=%d priv=%p\n", 2993 xfer, xfer->length, xfer->flags, xfer->priv)); 2994 2995 #ifdef DIAGNOSTIC 2996 if (xfer->rqflags & URQ_REQUEST) 2997 panic("ohci_device_intr_transfer: a request"); 2998 #endif 2999 3000 len = xfer->length; 3001 3002 data = opipe->tail.td; 3003 tail = ohci_alloc_std(sc); 3004 if (tail == NULL) 3005 return (USBD_NOMEM); 3006 tail->xfer = NULL; 3007 3008 data->td.td_flags = htole32( 3009 OHCI_TD_IN | OHCI_TD_NOCC | 3010 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 3011 if (xfer->flags & USBD_SHORT_XFER_OK) 3012 data->td.td_flags |= htole32(OHCI_TD_R); 3013 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf, 0)); 3014 data->nexttd = tail; 3015 data->td.td_nexttd = htole32(tail->physaddr); 3016 data->td.td_be = htole32(le32toh(data->td.td_cbp) + len - 1); 3017 data->len = len; 3018 data->xfer = xfer; 3019 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 3020 xfer->hcpriv = data; 3021 3022 #ifdef OHCI_DEBUG 3023 if (ohcidebug > 5) { 3024 DPRINTF(("ohci_device_intr_transfer:\n")); 3025 ohci_dump_ed(sed); 3026 ohci_dump_tds(data); 3027 } 3028 #endif 3029 3030 /* Insert ED in schedule */ 3031 s = splusb(); 3032 sed->ed.ed_tailp = htole32(tail->physaddr); 3033 opipe->tail.td = tail; 3034 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 3035 3036 #if 0 3037 /* 3038 * This goes horribly wrong, printing thousands of descriptors, 3039 * because false references are followed due to the fact that the 3040 * TD is gone. 3041 */ 3042 if (ohcidebug > 5) { 3043 usb_delay_ms(&sc->sc_bus, 5); 3044 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 3045 OREAD4(sc, OHCI_COMMAND_STATUS))); 3046 ohci_dump_ed(sed); 3047 ohci_dump_tds(data); 3048 } 3049 #endif 3050 splx(s); 3051 3052 return (USBD_IN_PROGRESS); 3053 } 3054 3055 /* Abort a device control request. */ 3056 Static void 3057 ohci_device_intr_abort(usbd_xfer_handle xfer) 3058 { 3059 if (xfer->pipe->intrxfer == xfer) { 3060 DPRINTF(("ohci_device_intr_abort: remove\n")); 3061 xfer->pipe->intrxfer = NULL; 3062 } 3063 ohci_abort_xfer(xfer, USBD_CANCELLED); 3064 } 3065 3066 /* Close a device interrupt pipe. */ 3067 Static void 3068 ohci_device_intr_close(usbd_pipe_handle pipe) 3069 { 3070 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3071 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3072 int nslots = opipe->u.intr.nslots; 3073 int pos = opipe->u.intr.pos; 3074 int j; 3075 ohci_soft_ed_t *p, *sed = opipe->sed; 3076 int s; 3077 3078 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 3079 pipe, nslots, pos)); 3080 s = splusb(); 3081 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 3082 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 3083 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) 3084 usb_delay_ms(&sc->sc_bus, 2); 3085 3086 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 3087 ; 3088 #ifdef DIAGNOSTIC 3089 if (p == NULL) 3090 panic("ohci_device_intr_close: ED not found"); 3091 #endif 3092 p->next = sed->next; 3093 p->ed.ed_nexted = sed->ed.ed_nexted; 3094 splx(s); 3095 3096 for (j = 0; j < nslots; j++) 3097 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 3098 3099 ohci_free_std(sc, opipe->tail.td); 3100 ohci_free_sed(sc, opipe->sed); 3101 } 3102 3103 Static usbd_status 3104 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival) 3105 { 3106 int i, j, s, best; 3107 u_int npoll, slow, shigh, nslots; 3108 u_int bestbw, bw; 3109 ohci_soft_ed_t *hsed, *sed = opipe->sed; 3110 3111 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 3112 if (ival == 0) { 3113 printf("ohci_setintr: 0 interval\n"); 3114 return (USBD_INVAL); 3115 } 3116 3117 npoll = OHCI_NO_INTRS; 3118 while (npoll > ival) 3119 npoll /= 2; 3120 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 3121 3122 /* 3123 * We now know which level in the tree the ED must go into. 3124 * Figure out which slot has most bandwidth left over. 3125 * Slots to examine: 3126 * npoll 3127 * 1 0 3128 * 2 1 2 3129 * 4 3 4 5 6 3130 * 8 7 8 9 10 11 12 13 14 3131 * N (N-1) .. (N-1+N-1) 3132 */ 3133 slow = npoll-1; 3134 shigh = slow + npoll; 3135 nslots = OHCI_NO_INTRS / npoll; 3136 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 3137 bw = 0; 3138 for (j = 0; j < nslots; j++) 3139 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 3140 if (bw < bestbw) { 3141 best = i; 3142 bestbw = bw; 3143 } 3144 } 3145 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 3146 best, slow, shigh, bestbw)); 3147 3148 s = splusb(); 3149 hsed = sc->sc_eds[best]; 3150 sed->next = hsed->next; 3151 sed->ed.ed_nexted = hsed->ed.ed_nexted; 3152 hsed->next = sed; 3153 hsed->ed.ed_nexted = htole32(sed->physaddr); 3154 splx(s); 3155 3156 for (j = 0; j < nslots; j++) 3157 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 3158 opipe->u.intr.nslots = nslots; 3159 opipe->u.intr.pos = best; 3160 3161 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 3162 return (USBD_NORMAL_COMPLETION); 3163 } 3164 3165 /***********************/ 3166 3167 usbd_status 3168 ohci_device_isoc_transfer(usbd_xfer_handle xfer) 3169 { 3170 usbd_status err; 3171 3172 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer)); 3173 3174 /* Put it on our queue, */ 3175 err = usb_insert_transfer(xfer); 3176 3177 /* bail out on error, */ 3178 if (err && err != USBD_IN_PROGRESS) 3179 return (err); 3180 3181 /* XXX should check inuse here */ 3182 3183 /* insert into schedule, */ 3184 ohci_device_isoc_enter(xfer); 3185 3186 /* and start if the pipe wasn't running */ 3187 if (!err) 3188 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 3189 3190 return (err); 3191 } 3192 3193 void 3194 ohci_device_isoc_enter(usbd_xfer_handle xfer) 3195 { 3196 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3197 usbd_device_handle dev = opipe->pipe.device; 3198 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 3199 ohci_soft_ed_t *sed = opipe->sed; 3200 struct iso *iso = &opipe->u.iso; 3201 ohci_soft_itd_t *sitd, *nsitd; 3202 ohci_physaddr_t buf, offs, noffs, bp0; 3203 int i, ncur, nframes; 3204 int s; 3205 3206 DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p " 3207 "nframes=%d\n", 3208 iso->inuse, iso->next, xfer, xfer->nframes)); 3209 3210 if (sc->sc_dying) 3211 return; 3212 3213 if (iso->next == -1) { 3214 /* Not in use yet, schedule it a few frames ahead. */ 3215 iso->next = le32toh(sc->sc_hcca->hcca_frame_number) + 5; 3216 DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n", 3217 iso->next)); 3218 } 3219 3220 sitd = opipe->tail.itd; 3221 buf = DMAADDR(&xfer->dmabuf, 0); 3222 bp0 = OHCI_PAGE(buf); 3223 offs = OHCI_PAGE_OFFSET(buf); 3224 nframes = xfer->nframes; 3225 xfer->hcpriv = sitd; 3226 for (i = ncur = 0; i < nframes; i++, ncur++) { 3227 noffs = offs + xfer->frlengths[i]; 3228 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ 3229 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */ 3230 3231 /* Allocate next ITD */ 3232 nsitd = ohci_alloc_sitd(sc); 3233 if (nsitd == NULL) { 3234 /* XXX what now? */ 3235 printf("%s: isoc TD alloc failed\n", 3236 USBDEVNAME(sc->sc_bus.bdev)); 3237 return; 3238 } 3239 3240 /* Fill current ITD */ 3241 sitd->itd.itd_flags = htole32( 3242 OHCI_ITD_NOCC | 3243 OHCI_ITD_SET_SF(iso->next) | 3244 OHCI_ITD_SET_DI(6) | /* delay intr a little */ 3245 OHCI_ITD_SET_FC(ncur)); 3246 sitd->itd.itd_bp0 = htole32(bp0); 3247 sitd->nextitd = nsitd; 3248 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 3249 sitd->itd.itd_be = htole32(bp0 + offs - 1); 3250 sitd->xfer = xfer; 3251 sitd->flags = 0; 3252 3253 sitd = nsitd; 3254 iso->next = iso->next + ncur; 3255 bp0 = OHCI_PAGE(buf + offs); 3256 ncur = 0; 3257 } 3258 sitd->itd.itd_offset[ncur] = htole16(OHCI_ITD_MK_OFFS(offs)); 3259 offs = noffs; 3260 } 3261 nsitd = ohci_alloc_sitd(sc); 3262 if (nsitd == NULL) { 3263 /* XXX what now? */ 3264 printf("%s: isoc TD alloc failed\n", 3265 USBDEVNAME(sc->sc_bus.bdev)); 3266 return; 3267 } 3268 /* Fixup last used ITD */ 3269 sitd->itd.itd_flags = htole32( 3270 OHCI_ITD_NOCC | 3271 OHCI_ITD_SET_SF(iso->next) | 3272 OHCI_ITD_SET_DI(0) | 3273 OHCI_ITD_SET_FC(ncur)); 3274 sitd->itd.itd_bp0 = htole32(bp0); 3275 sitd->nextitd = nsitd; 3276 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 3277 sitd->itd.itd_be = htole32(bp0 + offs - 1); 3278 sitd->xfer = xfer; 3279 sitd->flags = OHCI_CALL_DONE; 3280 3281 iso->next = iso->next + ncur; 3282 iso->inuse += nframes; 3283 3284 xfer->actlen = offs; /* XXX pretend we did it all */ 3285 3286 xfer->status = USBD_IN_PROGRESS; 3287 3288 #ifdef OHCI_DEBUG 3289 if (ohcidebug > 5) { 3290 DPRINTF(("ohci_device_isoc_enter: frame=%d\n", 3291 le32toh(sc->sc_hcca->hcca_frame_number))); 3292 ohci_dump_itds(xfer->hcpriv); 3293 ohci_dump_ed(sed); 3294 } 3295 #endif 3296 3297 s = splusb(); 3298 sed->ed.ed_tailp = htole32(nsitd->physaddr); 3299 opipe->tail.itd = nsitd; 3300 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 3301 splx(s); 3302 3303 #ifdef OHCI_DEBUG 3304 if (ohcidebug > 5) { 3305 delay(150000); 3306 DPRINTF(("ohci_device_isoc_enter: after frame=%d\n", 3307 le32toh(sc->sc_hcca->hcca_frame_number))); 3308 ohci_dump_itds(xfer->hcpriv); 3309 ohci_dump_ed(sed); 3310 } 3311 #endif 3312 } 3313 3314 usbd_status 3315 ohci_device_isoc_start(usbd_xfer_handle xfer) 3316 { 3317 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3318 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3319 3320 DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer)); 3321 3322 if (sc->sc_dying) 3323 return (USBD_IOERROR); 3324 3325 #ifdef DIAGNOSTIC 3326 if (xfer->status != USBD_IN_PROGRESS) 3327 printf("ohci_device_isoc_start: not in progress %p\n", xfer); 3328 #endif 3329 3330 /* XXX anything to do? */ 3331 3332 return (USBD_IN_PROGRESS); 3333 } 3334 3335 void 3336 ohci_device_isoc_abort(usbd_xfer_handle xfer) 3337 { 3338 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3339 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3340 ohci_soft_ed_t *sed; 3341 ohci_soft_itd_t *sitd; 3342 int s; 3343 3344 s = splusb(); 3345 3346 DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer)); 3347 3348 /* Transfer is already done. */ 3349 if (xfer->status != USBD_NOT_STARTED && 3350 xfer->status != USBD_IN_PROGRESS) { 3351 splx(s); 3352 printf("ohci_device_isoc_abort: early return\n"); 3353 return; 3354 } 3355 3356 /* Give xfer the requested abort code. */ 3357 xfer->status = USBD_CANCELLED; 3358 3359 sed = opipe->sed; 3360 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 3361 3362 sitd = xfer->hcpriv; 3363 #ifdef DIAGNOSTIC 3364 if (sitd == NULL) { 3365 splx(s); 3366 printf("ohci_device_isoc_abort: hcpriv==0\n"); 3367 return; 3368 } 3369 #endif 3370 for (; sitd->xfer == xfer; sitd = sitd->nextitd) { 3371 #ifdef DIAGNOSTIC 3372 DPRINTFN(1,("abort sets done sitd=%p\n", sitd)); 3373 sitd->isdone = 1; 3374 #endif 3375 } 3376 3377 splx(s); 3378 3379 usb_delay_ms(&sc->sc_bus, OHCI_ITD_NOFFSET); 3380 3381 s = splusb(); 3382 3383 /* Run callback. */ 3384 usb_transfer_complete(xfer); 3385 3386 sed->ed.ed_headp = htole32(sitd->physaddr); /* unlink TDs */ 3387 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 3388 3389 splx(s); 3390 } 3391 3392 void 3393 ohci_device_isoc_done(usbd_xfer_handle xfer) 3394 { 3395 DPRINTFN(1,("ohci_device_isoc_done: xfer=%p\n", xfer)); 3396 } 3397 3398 usbd_status 3399 ohci_setup_isoc(usbd_pipe_handle pipe) 3400 { 3401 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3402 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3403 struct iso *iso = &opipe->u.iso; 3404 int s; 3405 3406 iso->next = -1; 3407 iso->inuse = 0; 3408 3409 s = splusb(); 3410 ohci_add_ed(opipe->sed, sc->sc_isoc_head); 3411 splx(s); 3412 3413 return (USBD_NORMAL_COMPLETION); 3414 } 3415 3416 void 3417 ohci_device_isoc_close(usbd_pipe_handle pipe) 3418 { 3419 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3420 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3421 3422 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe)); 3423 ohci_close_pipe(pipe, sc->sc_isoc_head); 3424 #ifdef DIAGNOSTIC 3425 opipe->tail.itd->isdone = 1; 3426 #endif 3427 ohci_free_sitd(sc, opipe->tail.itd); 3428 } 3429
Indexes created Tue Sep 23 07:09:52 GMT 2025