ohci.c revision 1.167
1 /* $NetBSD: ohci.c,v 1.167 2005/07/18 11:08:00 augustss Exp $ */ 2 /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */ 3 4 /* 5 * Copyright (c) 1998, 2004, 2005 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Lennart Augustsson (lennart (at) augustsson.net) at 10 * Carlstedt Research & Technology. 11 * This code is derived from software contributed to The NetBSD Foundation 12 * by Charles M. Hannum. 13 * 14 * Redistribution and use in source and binary forms, with or without 15 * modification, are permitted provided that the following conditions 16 * are met: 17 * 1. Redistributions of source code must retain the above copyright 18 * notice, this list of conditions and the following disclaimer. 19 * 2. Redistributions in binary form must reproduce the above copyright 20 * notice, this list of conditions and the following disclaimer in the 21 * documentation and/or other materials provided with the distribution. 22 * 3. All advertising materials mentioning features or use of this software 23 * must display the following acknowledgement: 24 * This product includes software developed by the NetBSD 25 * Foundation, Inc. and its contributors. 26 * 4. Neither the name of The NetBSD Foundation nor the names of its 27 * contributors may be used to endorse or promote products derived 28 * from this software without specific prior written permission. 29 * 30 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 31 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 32 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 33 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 34 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 35 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 36 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 37 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 38 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 39 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 40 * POSSIBILITY OF SUCH DAMAGE. 41 */ 42 43 /* 44 * USB Open Host Controller driver. 45 * 46 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html 47 * USB spec: http://www.usb.org/developers/docs/usbspec.zip 48 */ 49 50 #include <sys/cdefs.h> 51 __KERNEL_RCSID(0, "$NetBSD: ohci.c,v 1.167 2005/07/18 11:08:00 augustss Exp $"); 52 53 #include <sys/param.h> 54 #include <sys/systm.h> 55 #include <sys/malloc.h> 56 #if defined(__NetBSD__) || defined(__OpenBSD__) 57 #include <sys/kernel.h> 58 #include <sys/device.h> 59 #include <sys/select.h> 60 #include <uvm/uvm_extern.h> 61 #elif defined(__FreeBSD__) 62 #include <sys/module.h> 63 #include <sys/bus.h> 64 #include <machine/bus_pio.h> 65 #include <machine/bus_memio.h> 66 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 67 #include <machine/cpu.h> 68 #endif 69 #endif 70 #include <sys/proc.h> 71 #include <sys/queue.h> 72 73 #include <machine/bus.h> 74 #include <machine/endian.h> 75 76 #include <dev/usb/usb.h> 77 #include <dev/usb/usbdi.h> 78 #include <dev/usb/usbdivar.h> 79 #include <dev/usb/usb_mem.h> 80 #include <dev/usb/usb_quirks.h> 81 82 #include <dev/usb/ohcireg.h> 83 #include <dev/usb/ohcivar.h> 84 85 #if defined(__FreeBSD__) 86 #include <machine/clock.h> 87 88 #define delay(d) DELAY(d) 89 #endif 90 91 #if defined(__OpenBSD__) 92 struct cfdriver ohci_cd = { 93 NULL, "ohci", DV_DULL 94 }; 95 #endif 96 97 #ifdef OHCI_DEBUG 98 #define DPRINTF(x) if (ohcidebug) logprintf x 99 #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x 100 int ohcidebug = 0; 101 #ifndef __NetBSD__ 102 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 103 #endif 104 #else 105 #define DPRINTF(x) 106 #define DPRINTFN(n,x) 107 #endif 108 109 /* 110 * The OHCI controller is little endian, so on big endian machines 111 * the data stored in memory needs to be swapped. 112 */ 113 #if defined(__FreeBSD__) || defined(__OpenBSD__) 114 #if BYTE_ORDER == BIG_ENDIAN 115 #define htole32(x) (bswap32(x)) 116 #define le32toh(x) (bswap32(x)) 117 #else 118 #define htole32(x) (x) 119 #define le32toh(x) (x) 120 #endif 121 #endif 122 123 struct ohci_pipe; 124 125 Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *); 126 Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *); 127 128 Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *); 129 Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *); 130 131 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *); 132 Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *); 133 134 #if 0 135 Static void ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *, 136 ohci_soft_td_t *); 137 #endif 138 Static usbd_status ohci_alloc_std_chain(struct ohci_pipe *, 139 ohci_softc_t *, int, int, usbd_xfer_handle, 140 ohci_soft_td_t *, ohci_soft_td_t **); 141 142 Static void ohci_shutdown(void *v); 143 Static void ohci_power(int, void *); 144 Static usbd_status ohci_open(usbd_pipe_handle); 145 Static void ohci_poll(struct usbd_bus *); 146 Static void ohci_softintr(void *); 147 Static void ohci_waitintr(ohci_softc_t *, usbd_xfer_handle); 148 Static void ohci_rhsc(ohci_softc_t *, usbd_xfer_handle); 149 150 Static usbd_status ohci_device_request(usbd_xfer_handle xfer); 151 Static void ohci_add_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 152 Static void ohci_rem_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 153 Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *); 154 Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *); 155 Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t); 156 Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *); 157 Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *); 158 Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t); 159 160 Static usbd_status ohci_setup_isoc(usbd_pipe_handle pipe); 161 Static void ohci_device_isoc_enter(usbd_xfer_handle); 162 163 Static usbd_status ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 164 Static void ohci_freem(struct usbd_bus *, usb_dma_t *); 165 166 Static usbd_xfer_handle ohci_allocx(struct usbd_bus *); 167 Static void ohci_freex(struct usbd_bus *, usbd_xfer_handle); 168 169 Static usbd_status ohci_root_ctrl_transfer(usbd_xfer_handle); 170 Static usbd_status ohci_root_ctrl_start(usbd_xfer_handle); 171 Static void ohci_root_ctrl_abort(usbd_xfer_handle); 172 Static void ohci_root_ctrl_close(usbd_pipe_handle); 173 Static void ohci_root_ctrl_done(usbd_xfer_handle); 174 175 Static usbd_status ohci_root_intr_transfer(usbd_xfer_handle); 176 Static usbd_status ohci_root_intr_start(usbd_xfer_handle); 177 Static void ohci_root_intr_abort(usbd_xfer_handle); 178 Static void ohci_root_intr_close(usbd_pipe_handle); 179 Static void ohci_root_intr_done(usbd_xfer_handle); 180 181 Static usbd_status ohci_device_ctrl_transfer(usbd_xfer_handle); 182 Static usbd_status ohci_device_ctrl_start(usbd_xfer_handle); 183 Static void ohci_device_ctrl_abort(usbd_xfer_handle); 184 Static void ohci_device_ctrl_close(usbd_pipe_handle); 185 Static void ohci_device_ctrl_done(usbd_xfer_handle); 186 187 Static usbd_status ohci_device_bulk_transfer(usbd_xfer_handle); 188 Static usbd_status ohci_device_bulk_start(usbd_xfer_handle); 189 Static void ohci_device_bulk_abort(usbd_xfer_handle); 190 Static void ohci_device_bulk_close(usbd_pipe_handle); 191 Static void ohci_device_bulk_done(usbd_xfer_handle); 192 193 Static usbd_status ohci_device_intr_transfer(usbd_xfer_handle); 194 Static usbd_status ohci_device_intr_start(usbd_xfer_handle); 195 Static void ohci_device_intr_abort(usbd_xfer_handle); 196 Static void ohci_device_intr_close(usbd_pipe_handle); 197 Static void ohci_device_intr_done(usbd_xfer_handle); 198 199 Static usbd_status ohci_device_isoc_transfer(usbd_xfer_handle); 200 Static usbd_status ohci_device_isoc_start(usbd_xfer_handle); 201 Static void ohci_device_isoc_abort(usbd_xfer_handle); 202 Static void ohci_device_isoc_close(usbd_pipe_handle); 203 Static void ohci_device_isoc_done(usbd_xfer_handle); 204 205 Static usbd_status ohci_device_setintr(ohci_softc_t *sc, 206 struct ohci_pipe *pipe, int ival); 207 208 Static int ohci_str(usb_string_descriptor_t *, int, const char *); 209 210 Static void ohci_timeout(void *); 211 Static void ohci_timeout_task(void *); 212 Static void ohci_rhsc_enable(void *); 213 214 Static void ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *); 215 Static void ohci_abort_xfer(usbd_xfer_handle, usbd_status); 216 217 Static void ohci_device_clear_toggle(usbd_pipe_handle pipe); 218 Static void ohci_noop(usbd_pipe_handle pipe); 219 220 #ifdef OHCI_DEBUG 221 Static void ohci_dumpregs(ohci_softc_t *); 222 Static void ohci_dump_tds(ohci_soft_td_t *); 223 Static void ohci_dump_td(ohci_soft_td_t *); 224 Static void ohci_dump_ed(ohci_soft_ed_t *); 225 Static void ohci_dump_itd(ohci_soft_itd_t *); 226 Static void ohci_dump_itds(ohci_soft_itd_t *); 227 #endif 228 229 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 230 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 231 #define OWRITE1(sc, r, x) \ 232 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 233 #define OWRITE2(sc, r, x) \ 234 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 235 #define OWRITE4(sc, r, x) \ 236 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 237 #define OREAD1(sc, r) (OBARR(sc), bus_space_read_1((sc)->iot, (sc)->ioh, (r))) 238 #define OREAD2(sc, r) (OBARR(sc), bus_space_read_2((sc)->iot, (sc)->ioh, (r))) 239 #define OREAD4(sc, r) (OBARR(sc), bus_space_read_4((sc)->iot, (sc)->ioh, (r))) 240 241 /* Reverse the bits in a value 0 .. 31 */ 242 Static u_int8_t revbits[OHCI_NO_INTRS] = 243 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 244 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 245 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 246 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 247 248 struct ohci_pipe { 249 struct usbd_pipe pipe; 250 ohci_soft_ed_t *sed; 251 union { 252 ohci_soft_td_t *td; 253 ohci_soft_itd_t *itd; 254 } tail; 255 /* Info needed for different pipe kinds. */ 256 union { 257 /* Control pipe */ 258 struct { 259 usb_dma_t reqdma; 260 u_int length; 261 ohci_soft_td_t *setup, *data, *stat; 262 } ctl; 263 /* Interrupt pipe */ 264 struct { 265 int nslots; 266 int pos; 267 } intr; 268 /* Bulk pipe */ 269 struct { 270 u_int length; 271 int isread; 272 } bulk; 273 /* Iso pipe */ 274 struct iso { 275 int next, inuse; 276 } iso; 277 } u; 278 }; 279 280 #define OHCI_INTR_ENDPT 1 281 282 Static struct usbd_bus_methods ohci_bus_methods = { 283 ohci_open, 284 ohci_softintr, 285 ohci_poll, 286 ohci_allocm, 287 ohci_freem, 288 ohci_allocx, 289 ohci_freex, 290 }; 291 292 Static struct usbd_pipe_methods ohci_root_ctrl_methods = { 293 ohci_root_ctrl_transfer, 294 ohci_root_ctrl_start, 295 ohci_root_ctrl_abort, 296 ohci_root_ctrl_close, 297 ohci_noop, 298 ohci_root_ctrl_done, 299 }; 300 301 Static struct usbd_pipe_methods ohci_root_intr_methods = { 302 ohci_root_intr_transfer, 303 ohci_root_intr_start, 304 ohci_root_intr_abort, 305 ohci_root_intr_close, 306 ohci_noop, 307 ohci_root_intr_done, 308 }; 309 310 Static struct usbd_pipe_methods ohci_device_ctrl_methods = { 311 ohci_device_ctrl_transfer, 312 ohci_device_ctrl_start, 313 ohci_device_ctrl_abort, 314 ohci_device_ctrl_close, 315 ohci_noop, 316 ohci_device_ctrl_done, 317 }; 318 319 Static struct usbd_pipe_methods ohci_device_intr_methods = { 320 ohci_device_intr_transfer, 321 ohci_device_intr_start, 322 ohci_device_intr_abort, 323 ohci_device_intr_close, 324 ohci_device_clear_toggle, 325 ohci_device_intr_done, 326 }; 327 328 Static struct usbd_pipe_methods ohci_device_bulk_methods = { 329 ohci_device_bulk_transfer, 330 ohci_device_bulk_start, 331 ohci_device_bulk_abort, 332 ohci_device_bulk_close, 333 ohci_device_clear_toggle, 334 ohci_device_bulk_done, 335 }; 336 337 Static struct usbd_pipe_methods ohci_device_isoc_methods = { 338 ohci_device_isoc_transfer, 339 ohci_device_isoc_start, 340 ohci_device_isoc_abort, 341 ohci_device_isoc_close, 342 ohci_noop, 343 ohci_device_isoc_done, 344 }; 345 346 #if defined(__NetBSD__) || defined(__OpenBSD__) 347 int 348 ohci_activate(device_ptr_t self, enum devact act) 349 { 350 struct ohci_softc *sc = (struct ohci_softc *)self; 351 int rv = 0; 352 353 switch (act) { 354 case DVACT_ACTIVATE: 355 return (EOPNOTSUPP); 356 357 case DVACT_DEACTIVATE: 358 if (sc->sc_child != NULL) 359 rv = config_deactivate(sc->sc_child); 360 sc->sc_dying = 1; 361 break; 362 } 363 return (rv); 364 } 365 366 int 367 ohci_detach(struct ohci_softc *sc, int flags) 368 { 369 int rv = 0; 370 371 if (sc->sc_child != NULL) 372 rv = config_detach(sc->sc_child, flags); 373 374 if (rv != 0) 375 return (rv); 376 377 usb_uncallout(sc->sc_tmo_rhsc, ohci_rhsc_enable, sc); 378 379 #if defined(__NetBSD__) || defined(__OpenBSD__) 380 powerhook_disestablish(sc->sc_powerhook); 381 shutdownhook_disestablish(sc->sc_shutdownhook); 382 #endif 383 384 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 385 386 /* free data structures XXX */ 387 388 return (rv); 389 } 390 #endif 391 392 ohci_soft_ed_t * 393 ohci_alloc_sed(ohci_softc_t *sc) 394 { 395 ohci_soft_ed_t *sed; 396 usbd_status err; 397 int i, offs; 398 usb_dma_t dma; 399 400 if (sc->sc_freeeds == NULL) { 401 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 402 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 403 OHCI_ED_ALIGN, &dma); 404 if (err) 405 return (0); 406 for(i = 0; i < OHCI_SED_CHUNK; i++) { 407 offs = i * OHCI_SED_SIZE; 408 sed = KERNADDR(&dma, offs); 409 sed->physaddr = DMAADDR(&dma, offs); 410 sed->next = sc->sc_freeeds; 411 sc->sc_freeeds = sed; 412 } 413 } 414 sed = sc->sc_freeeds; 415 sc->sc_freeeds = sed->next; 416 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 417 sed->next = 0; 418 return (sed); 419 } 420 421 void 422 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 423 { 424 sed->next = sc->sc_freeeds; 425 sc->sc_freeeds = sed; 426 } 427 428 ohci_soft_td_t * 429 ohci_alloc_std(ohci_softc_t *sc) 430 { 431 ohci_soft_td_t *std; 432 usbd_status err; 433 int i, offs; 434 usb_dma_t dma; 435 int s; 436 437 if (sc->sc_freetds == NULL) { 438 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 439 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 440 OHCI_TD_ALIGN, &dma); 441 if (err) 442 return (NULL); 443 s = splusb(); 444 for(i = 0; i < OHCI_STD_CHUNK; i++) { 445 offs = i * OHCI_STD_SIZE; 446 std = KERNADDR(&dma, offs); 447 std->physaddr = DMAADDR(&dma, offs); 448 std->nexttd = sc->sc_freetds; 449 sc->sc_freetds = std; 450 } 451 splx(s); 452 } 453 454 s = splusb(); 455 std = sc->sc_freetds; 456 sc->sc_freetds = std->nexttd; 457 memset(&std->td, 0, sizeof(ohci_td_t)); 458 std->nexttd = NULL; 459 std->xfer = NULL; 460 ohci_hash_add_td(sc, std); 461 splx(s); 462 463 return (std); 464 } 465 466 void 467 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std) 468 { 469 int s; 470 471 s = splusb(); 472 ohci_hash_rem_td(sc, std); 473 std->nexttd = sc->sc_freetds; 474 sc->sc_freetds = std; 475 splx(s); 476 } 477 478 usbd_status 479 ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc, 480 int alen, int rd, usbd_xfer_handle xfer, 481 ohci_soft_td_t *sp, ohci_soft_td_t **ep) 482 { 483 ohci_soft_td_t *next, *cur; 484 ohci_physaddr_t dataphys, dataphysend; 485 u_int32_t tdflags; 486 int len, curlen; 487 usb_dma_t *dma = &xfer->dmabuf; 488 u_int16_t flags = xfer->flags; 489 490 DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen)); 491 492 len = alen; 493 cur = sp; 494 dataphys = DMAADDR(dma, 0); 495 dataphysend = OHCI_PAGE(dataphys + len - 1); 496 tdflags = htole32( 497 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 498 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) | 499 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR); 500 501 for (;;) { 502 next = ohci_alloc_std(sc); 503 if (next == NULL) 504 goto nomem; 505 506 /* The OHCI hardware can handle at most one page crossing. */ 507 if (OHCI_PAGE(dataphys) == dataphysend || 508 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) { 509 /* we can handle it in this TD */ 510 curlen = len; 511 } else { 512 /* must use multiple TDs, fill as much as possible. */ 513 curlen = 2 * OHCI_PAGE_SIZE - 514 (dataphys & (OHCI_PAGE_SIZE-1)); 515 /* the length must be a multiple of the max size */ 516 curlen -= curlen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize); 517 #ifdef DIAGNOSTIC 518 if (curlen == 0) 519 panic("ohci_alloc_std: curlen == 0"); 520 #endif 521 } 522 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x " 523 "dataphysend=0x%08x len=%d curlen=%d\n", 524 dataphys, dataphysend, 525 len, curlen)); 526 len -= curlen; 527 528 cur->td.td_flags = tdflags; 529 cur->td.td_cbp = htole32(dataphys); 530 cur->nexttd = next; 531 cur->td.td_nexttd = htole32(next->physaddr); 532 cur->td.td_be = htole32(dataphys + curlen - 1); 533 cur->len = curlen; 534 cur->flags = OHCI_ADD_LEN; 535 cur->xfer = xfer; 536 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n", 537 dataphys, dataphys + curlen - 1)); 538 if (len == 0) 539 break; 540 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n")); 541 dataphys += curlen; 542 cur = next; 543 } 544 if (!rd && (flags & USBD_FORCE_SHORT_XFER) && 545 alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) { 546 /* Force a 0 length transfer at the end. */ 547 548 cur = next; 549 next = ohci_alloc_std(sc); 550 if (next == NULL) 551 goto nomem; 552 553 cur->td.td_flags = tdflags; 554 cur->td.td_cbp = 0; /* indicate 0 length packet */ 555 cur->nexttd = next; 556 cur->td.td_nexttd = htole32(next->physaddr); 557 cur->td.td_be = ~0; 558 cur->len = 0; 559 cur->flags = 0; 560 cur->xfer = xfer; 561 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n")); 562 } 563 *ep = cur; 564 565 return (USBD_NORMAL_COMPLETION); 566 567 nomem: 568 /* XXX free chain */ 569 return (USBD_NOMEM); 570 } 571 572 #if 0 573 Static void 574 ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std, 575 ohci_soft_td_t *stdend) 576 { 577 ohci_soft_td_t *p; 578 579 for (; std != stdend; std = p) { 580 p = std->nexttd; 581 ohci_free_std(sc, std); 582 } 583 } 584 #endif 585 586 ohci_soft_itd_t * 587 ohci_alloc_sitd(ohci_softc_t *sc) 588 { 589 ohci_soft_itd_t *sitd; 590 usbd_status err; 591 int i, s, offs; 592 usb_dma_t dma; 593 594 if (sc->sc_freeitds == NULL) { 595 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n")); 596 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK, 597 OHCI_ITD_ALIGN, &dma); 598 if (err) 599 return (NULL); 600 s = splusb(); 601 for(i = 0; i < OHCI_SITD_CHUNK; i++) { 602 offs = i * OHCI_SITD_SIZE; 603 sitd = KERNADDR(&dma, offs); 604 sitd->physaddr = DMAADDR(&dma, offs); 605 sitd->nextitd = sc->sc_freeitds; 606 sc->sc_freeitds = sitd; 607 } 608 splx(s); 609 } 610 611 s = splusb(); 612 sitd = sc->sc_freeitds; 613 sc->sc_freeitds = sitd->nextitd; 614 memset(&sitd->itd, 0, sizeof(ohci_itd_t)); 615 sitd->nextitd = NULL; 616 sitd->xfer = NULL; 617 ohci_hash_add_itd(sc, sitd); 618 splx(s); 619 620 #ifdef DIAGNOSTIC 621 sitd->isdone = 0; 622 #endif 623 624 return (sitd); 625 } 626 627 void 628 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 629 { 630 int s; 631 632 DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd)); 633 634 #ifdef DIAGNOSTIC 635 if (!sitd->isdone) { 636 panic("ohci_free_sitd: sitd=%p not done", sitd); 637 return; 638 } 639 /* Warn double free */ 640 sitd->isdone = 0; 641 #endif 642 643 s = splusb(); 644 ohci_hash_rem_itd(sc, sitd); 645 sitd->nextitd = sc->sc_freeitds; 646 sc->sc_freeitds = sitd; 647 splx(s); 648 } 649 650 usbd_status 651 ohci_init(ohci_softc_t *sc) 652 { 653 ohci_soft_ed_t *sed, *psed; 654 usbd_status err; 655 int i; 656 u_int32_t s, ctl, rwc, ival, hcr, fm, per, rev, desca, descb; 657 658 DPRINTF(("ohci_init: start\n")); 659 #if defined(__OpenBSD__) 660 printf(","); 661 #else 662 printf("%s:", USBDEVNAME(sc->sc_bus.bdev)); 663 #endif 664 rev = OREAD4(sc, OHCI_REVISION); 665 printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev), 666 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 667 668 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 669 printf("%s: unsupported OHCI revision\n", 670 USBDEVNAME(sc->sc_bus.bdev)); 671 sc->sc_bus.usbrev = USBREV_UNKNOWN; 672 return (USBD_INVAL); 673 } 674 sc->sc_bus.usbrev = USBREV_1_0; 675 676 for (i = 0; i < OHCI_HASH_SIZE; i++) 677 LIST_INIT(&sc->sc_hash_tds[i]); 678 for (i = 0; i < OHCI_HASH_SIZE; i++) 679 LIST_INIT(&sc->sc_hash_itds[i]); 680 681 SIMPLEQ_INIT(&sc->sc_free_xfers); 682 683 #ifdef __NetBSD__ 684 usb_setup_reserve(sc, &sc->sc_dma_reserve, sc->sc_bus.dmatag, 685 USB_MEM_RESERVE); 686 #endif 687 688 /* XXX determine alignment by R/W */ 689 /* Allocate the HCCA area. */ 690 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 691 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 692 if (err) 693 return (err); 694 sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0); 695 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 696 697 sc->sc_eintrs = OHCI_NORMAL_INTRS; 698 699 /* Allocate dummy ED that starts the control list. */ 700 sc->sc_ctrl_head = ohci_alloc_sed(sc); 701 if (sc->sc_ctrl_head == NULL) { 702 err = USBD_NOMEM; 703 goto bad1; 704 } 705 sc->sc_ctrl_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 706 707 /* Allocate dummy ED that starts the bulk list. */ 708 sc->sc_bulk_head = ohci_alloc_sed(sc); 709 if (sc->sc_bulk_head == NULL) { 710 err = USBD_NOMEM; 711 goto bad2; 712 } 713 sc->sc_bulk_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 714 715 /* Allocate dummy ED that starts the isochronous list. */ 716 sc->sc_isoc_head = ohci_alloc_sed(sc); 717 if (sc->sc_isoc_head == NULL) { 718 err = USBD_NOMEM; 719 goto bad3; 720 } 721 sc->sc_isoc_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 722 723 /* Allocate all the dummy EDs that make up the interrupt tree. */ 724 for (i = 0; i < OHCI_NO_EDS; i++) { 725 sed = ohci_alloc_sed(sc); 726 if (sed == NULL) { 727 while (--i >= 0) 728 ohci_free_sed(sc, sc->sc_eds[i]); 729 err = USBD_NOMEM; 730 goto bad4; 731 } 732 /* All ED fields are set to 0. */ 733 sc->sc_eds[i] = sed; 734 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 735 if (i != 0) 736 psed = sc->sc_eds[(i-1) / 2]; 737 else 738 psed= sc->sc_isoc_head; 739 sed->next = psed; 740 sed->ed.ed_nexted = htole32(psed->physaddr); 741 } 742 /* 743 * Fill HCCA interrupt table. The bit reversal is to get 744 * the tree set up properly to spread the interrupts. 745 */ 746 for (i = 0; i < OHCI_NO_INTRS; i++) 747 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 748 htole32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 749 750 #ifdef OHCI_DEBUG 751 if (ohcidebug > 15) { 752 for (i = 0; i < OHCI_NO_EDS; i++) { 753 printf("ed#%d ", i); 754 ohci_dump_ed(sc->sc_eds[i]); 755 } 756 printf("iso "); 757 ohci_dump_ed(sc->sc_isoc_head); 758 } 759 #endif 760 761 /* Preserve values programmed by SMM/BIOS but lost over reset. */ 762 ctl = OREAD4(sc, OHCI_CONTROL); 763 rwc = ctl & OHCI_RWC; 764 fm = OREAD4(sc, OHCI_FM_INTERVAL); 765 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 766 descb = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 767 768 /* Determine in what context we are running. */ 769 if (ctl & OHCI_IR) { 770 /* SMM active, request change */ 771 DPRINTF(("ohci_init: SMM active, request owner change\n")); 772 if ((sc->sc_intre & (OHCI_OC | OHCI_MIE)) == 773 (OHCI_OC | OHCI_MIE)) 774 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_MIE); 775 s = OREAD4(sc, OHCI_COMMAND_STATUS); 776 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 777 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 778 usb_delay_ms(&sc->sc_bus, 1); 779 ctl = OREAD4(sc, OHCI_CONTROL); 780 } 781 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_MIE); 782 if ((ctl & OHCI_IR) == 0) { 783 printf("%s: SMM does not respond, resetting\n", 784 USBDEVNAME(sc->sc_bus.bdev)); 785 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 786 goto reset; 787 } 788 #if 0 789 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */ 790 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 791 /* BIOS started controller. */ 792 DPRINTF(("ohci_init: BIOS active\n")); 793 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 794 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL | rwc); 795 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 796 } 797 #endif 798 } else { 799 DPRINTF(("ohci_init: cold started\n")); 800 reset: 801 /* Controller was cold started. */ 802 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 803 } 804 805 /* 806 * This reset should not be necessary according to the OHCI spec, but 807 * without it some controllers do not start. 808 */ 809 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 810 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 811 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 812 813 /* We now own the host controller and the bus has been reset. */ 814 815 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 816 /* Nominal time for a reset is 10 us. */ 817 for (i = 0; i < 10; i++) { 818 delay(10); 819 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 820 if (!hcr) 821 break; 822 } 823 if (hcr) { 824 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 825 err = USBD_IOERROR; 826 goto bad5; 827 } 828 #ifdef OHCI_DEBUG 829 if (ohcidebug > 15) 830 ohci_dumpregs(sc); 831 #endif 832 833 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 834 835 /* Set up HC registers. */ 836 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 837 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 838 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 839 /* disable all interrupts and then switch on all desired interrupts */ 840 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 841 /* switch on desired functional features */ 842 ctl = OREAD4(sc, OHCI_CONTROL); 843 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 844 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 845 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL | rwc; 846 /* And finally start it! */ 847 OWRITE4(sc, OHCI_CONTROL, ctl); 848 849 /* 850 * The controller is now OPERATIONAL. Set a some final 851 * registers that should be set earlier, but that the 852 * controller ignores when in the SUSPEND state. 853 */ 854 ival = OHCI_GET_IVAL(fm); 855 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 856 fm |= OHCI_FSMPS(ival) | ival; 857 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 858 per = OHCI_PERIODIC(ival); /* 90% periodic */ 859 OWRITE4(sc, OHCI_PERIODIC_START, per); 860 861 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */ 862 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP); 863 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 864 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY); 865 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca); 866 867 /* 868 * The AMD756 requires a delay before re-reading the register, 869 * otherwise it will occasionally report 0 ports. 870 */ 871 sc->sc_noport = 0; 872 for (i = 0; i < 10 && sc->sc_noport == 0; i++) { 873 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY); 874 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 875 } 876 877 #ifdef OHCI_DEBUG 878 if (ohcidebug > 5) 879 ohci_dumpregs(sc); 880 #endif 881 882 /* Set up the bus struct. */ 883 sc->sc_bus.methods = &ohci_bus_methods; 884 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 885 886 #if defined(__NetBSD__) || defined(__OpenBSD__) 887 sc->sc_control = sc->sc_intre = 0; 888 sc->sc_powerhook = powerhook_establish(ohci_power, sc); 889 sc->sc_shutdownhook = shutdownhook_establish(ohci_shutdown, sc); 890 #endif 891 892 usb_callout_init(sc->sc_tmo_rhsc); 893 894 /* Finally, turn on interrupts. */ 895 DPRINTFN(1,("ohci_init: enabling\n")); 896 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 897 898 return (USBD_NORMAL_COMPLETION); 899 900 bad5: 901 for (i = 0; i < OHCI_NO_EDS; i++) 902 ohci_free_sed(sc, sc->sc_eds[i]); 903 bad4: 904 ohci_free_sed(sc, sc->sc_isoc_head); 905 bad3: 906 ohci_free_sed(sc, sc->sc_bulk_head); 907 bad2: 908 ohci_free_sed(sc, sc->sc_ctrl_head); 909 bad1: 910 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 911 return (err); 912 } 913 914 usbd_status 915 ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 916 { 917 #if defined(__NetBSD__) || defined(__OpenBSD__) 918 struct ohci_softc *sc = (struct ohci_softc *)bus; 919 #endif 920 usbd_status status; 921 922 status = usb_allocmem(&sc->sc_bus, size, 0, dma); 923 #ifdef __NetBSD__ 924 if (status == USBD_NOMEM) 925 status = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size); 926 #endif 927 return status; 928 } 929 930 void 931 ohci_freem(struct usbd_bus *bus, usb_dma_t *dma) 932 { 933 #if defined(__NetBSD__) || defined(__OpenBSD__) 934 struct ohci_softc *sc = (struct ohci_softc *)bus; 935 #endif 936 #ifdef __NetBSD__ 937 if (dma->block->flags & USB_DMA_RESERVE) { 938 usb_reserve_freem(&((struct ohci_softc *)bus)->sc_dma_reserve, 939 dma); 940 return; 941 } 942 #endif 943 usb_freemem(&sc->sc_bus, dma); 944 } 945 946 usbd_xfer_handle 947 ohci_allocx(struct usbd_bus *bus) 948 { 949 struct ohci_softc *sc = (struct ohci_softc *)bus; 950 usbd_xfer_handle xfer; 951 952 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 953 if (xfer != NULL) { 954 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 955 #ifdef DIAGNOSTIC 956 if (xfer->busy_free != XFER_FREE) { 957 printf("ohci_allocx: xfer=%p not free, 0x%08x\n", xfer, 958 xfer->busy_free); 959 } 960 #endif 961 } else { 962 xfer = malloc(sizeof(struct ohci_xfer), M_USB, M_NOWAIT); 963 } 964 if (xfer != NULL) { 965 memset(xfer, 0, sizeof (struct ohci_xfer)); 966 #ifdef DIAGNOSTIC 967 xfer->busy_free = XFER_BUSY; 968 #endif 969 } 970 return (xfer); 971 } 972 973 void 974 ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 975 { 976 struct ohci_softc *sc = (struct ohci_softc *)bus; 977 978 #ifdef DIAGNOSTIC 979 if (xfer->busy_free != XFER_BUSY) { 980 printf("ohci_freex: xfer=%p not busy, 0x%08x\n", xfer, 981 xfer->busy_free); 982 return; 983 } 984 xfer->busy_free = XFER_FREE; 985 #endif 986 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 987 } 988 989 /* 990 * Shut down the controller when the system is going down. 991 */ 992 void 993 ohci_shutdown(void *v) 994 { 995 ohci_softc_t *sc = v; 996 997 DPRINTF(("ohci_shutdown: stopping the HC\n")); 998 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 999 } 1000 1001 /* 1002 * Handle suspend/resume. 1003 * 1004 * We need to switch to polling mode here, because this routine is 1005 * called from an interupt context. This is all right since we 1006 * are almost suspended anyway. 1007 */ 1008 void 1009 ohci_power(int why, void *v) 1010 { 1011 ohci_softc_t *sc = v; 1012 u_int32_t ctl; 1013 int s; 1014 1015 #ifdef OHCI_DEBUG 1016 DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why)); 1017 ohci_dumpregs(sc); 1018 #endif 1019 1020 s = splhardusb(); 1021 switch (why) { 1022 case PWR_SUSPEND: 1023 case PWR_STANDBY: 1024 sc->sc_bus.use_polling++; 1025 ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK; 1026 if (sc->sc_control == 0) { 1027 /* 1028 * Preserve register values, in case that APM BIOS 1029 * does not recover them. 1030 */ 1031 sc->sc_control = ctl; 1032 sc->sc_intre = OREAD4(sc, OHCI_INTERRUPT_ENABLE); 1033 } 1034 ctl |= OHCI_HCFS_SUSPEND; 1035 OWRITE4(sc, OHCI_CONTROL, ctl); 1036 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1037 sc->sc_bus.use_polling--; 1038 break; 1039 case PWR_RESUME: 1040 sc->sc_bus.use_polling++; 1041 /* Some broken BIOSes do not recover these values */ 1042 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 1043 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 1044 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 1045 if (sc->sc_intre) 1046 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, 1047 sc->sc_intre & (OHCI_ALL_INTRS | OHCI_MIE)); 1048 if (sc->sc_control) 1049 ctl = sc->sc_control; 1050 else 1051 ctl = OREAD4(sc, OHCI_CONTROL); 1052 ctl |= OHCI_HCFS_RESUME; 1053 OWRITE4(sc, OHCI_CONTROL, ctl); 1054 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 1055 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL; 1056 OWRITE4(sc, OHCI_CONTROL, ctl); 1057 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 1058 sc->sc_control = sc->sc_intre = 0; 1059 sc->sc_bus.use_polling--; 1060 break; 1061 case PWR_SOFTSUSPEND: 1062 case PWR_SOFTSTANDBY: 1063 case PWR_SOFTRESUME: 1064 break; 1065 } 1066 splx(s); 1067 } 1068 1069 #ifdef OHCI_DEBUG 1070 void 1071 ohci_dumpregs(ohci_softc_t *sc) 1072 { 1073 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 1074 OREAD4(sc, OHCI_REVISION), 1075 OREAD4(sc, OHCI_CONTROL), 1076 OREAD4(sc, OHCI_COMMAND_STATUS))); 1077 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 1078 OREAD4(sc, OHCI_INTERRUPT_STATUS), 1079 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 1080 OREAD4(sc, OHCI_INTERRUPT_DISABLE))); 1081 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 1082 OREAD4(sc, OHCI_HCCA), 1083 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 1084 OREAD4(sc, OHCI_CONTROL_HEAD_ED))); 1085 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 1086 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 1087 OREAD4(sc, OHCI_BULK_HEAD_ED), 1088 OREAD4(sc, OHCI_BULK_CURRENT_ED))); 1089 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 1090 OREAD4(sc, OHCI_DONE_HEAD), 1091 OREAD4(sc, OHCI_FM_INTERVAL), 1092 OREAD4(sc, OHCI_FM_REMAINING))); 1093 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 1094 OREAD4(sc, OHCI_FM_NUMBER), 1095 OREAD4(sc, OHCI_PERIODIC_START), 1096 OREAD4(sc, OHCI_LS_THRESHOLD))); 1097 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n", 1098 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 1099 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 1100 OREAD4(sc, OHCI_RH_STATUS))); 1101 DPRINTF((" port1=0x%08x port2=0x%08x\n", 1102 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 1103 OREAD4(sc, OHCI_RH_PORT_STATUS(2)))); 1104 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n", 1105 le32toh(sc->sc_hcca->hcca_frame_number), 1106 le32toh(sc->sc_hcca->hcca_done_head))); 1107 } 1108 #endif 1109 1110 Static int ohci_intr1(ohci_softc_t *); 1111 1112 int 1113 ohci_intr(void *p) 1114 { 1115 ohci_softc_t *sc = p; 1116 1117 if (sc == NULL || sc->sc_dying) 1118 return (0); 1119 1120 /* If we get an interrupt while polling, then just ignore it. */ 1121 if (sc->sc_bus.use_polling) { 1122 #ifdef DIAGNOSTIC 1123 DPRINTFN(16, ("ohci_intr: ignored interrupt while polling\n")); 1124 #endif 1125 /* for level triggered intrs, should do something to ack */ 1126 OWRITE4(sc, OHCI_INTERRUPT_STATUS, 1127 OREAD4(sc, OHCI_INTERRUPT_STATUS)); 1128 1129 return (0); 1130 } 1131 1132 return (ohci_intr1(sc)); 1133 } 1134 1135 Static int 1136 ohci_intr1(ohci_softc_t *sc) 1137 { 1138 u_int32_t intrs, eintrs; 1139 1140 DPRINTFN(14,("ohci_intr1: enter\n")); 1141 1142 /* In case the interrupt occurs before initialization has completed. */ 1143 if (sc == NULL || sc->sc_hcca == NULL) { 1144 #ifdef DIAGNOSTIC 1145 printf("ohci_intr: sc->sc_hcca == NULL\n"); 1146 #endif 1147 return (0); 1148 } 1149 1150 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1151 if (!intrs) 1152 return (0); 1153 1154 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs & ~(OHCI_MIE|OHCI_WDH)); /* Acknowledge */ 1155 eintrs = intrs & sc->sc_eintrs; 1156 if (!eintrs) 1157 return (0); 1158 1159 sc->sc_bus.intr_context++; 1160 sc->sc_bus.no_intrs++; 1161 DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 1162 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 1163 (u_int)eintrs)); 1164 1165 if (eintrs & OHCI_SO) { 1166 sc->sc_overrun_cnt++; 1167 if (usbd_ratecheck(&sc->sc_overrun_ntc)) { 1168 printf("%s: %u scheduling overruns\n", 1169 USBDEVNAME(sc->sc_bus.bdev), sc->sc_overrun_cnt); 1170 sc->sc_overrun_cnt = 0; 1171 } 1172 /* XXX do what */ 1173 eintrs &= ~OHCI_SO; 1174 } 1175 if (eintrs & OHCI_WDH) { 1176 /* 1177 * We block the interrupt below, and reenable it later from 1178 * ohci_softintr(). 1179 */ 1180 usb_schedsoftintr(&sc->sc_bus); 1181 } 1182 if (eintrs & OHCI_RD) { 1183 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev)); 1184 /* XXX process resume detect */ 1185 } 1186 if (eintrs & OHCI_UE) { 1187 printf("%s: unrecoverable error, controller halted\n", 1188 USBDEVNAME(sc->sc_bus.bdev)); 1189 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1190 /* XXX what else */ 1191 } 1192 if (eintrs & OHCI_RHSC) { 1193 /* 1194 * We block the interrupt below, and reenable it later from 1195 * a timeout. 1196 */ 1197 ohci_rhsc(sc, sc->sc_intrxfer); 1198 /* Do not allow RHSC interrupts > 1 per second */ 1199 usb_callout(sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc); 1200 } 1201 1202 sc->sc_bus.intr_context--; 1203 1204 if (eintrs != 0) { 1205 /* Block unprocessed interrupts. */ 1206 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs); 1207 sc->sc_eintrs &= ~eintrs; 1208 DPRINTFN(1, ("%s: blocking intrs 0x%x\n", 1209 USBDEVNAME(sc->sc_bus.bdev), eintrs)); 1210 } 1211 1212 return (1); 1213 } 1214 1215 void 1216 ohci_rhsc_enable(void *v_sc) 1217 { 1218 ohci_softc_t *sc = v_sc; 1219 int s; 1220 1221 s = splhardusb(); 1222 sc->sc_eintrs |= OHCI_RHSC; 1223 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1224 splx(s); 1225 } 1226 1227 #ifdef OHCI_DEBUG 1228 const char *ohci_cc_strs[] = { 1229 "NO_ERROR", 1230 "CRC", 1231 "BIT_STUFFING", 1232 "DATA_TOGGLE_MISMATCH", 1233 "STALL", 1234 "DEVICE_NOT_RESPONDING", 1235 "PID_CHECK_FAILURE", 1236 "UNEXPECTED_PID", 1237 "DATA_OVERRUN", 1238 "DATA_UNDERRUN", 1239 "BUFFER_OVERRUN", 1240 "BUFFER_UNDERRUN", 1241 "reserved", 1242 "reserved", 1243 "NOT_ACCESSED", 1244 "NOT_ACCESSED", 1245 }; 1246 #endif 1247 1248 void 1249 ohci_softintr(void *v) 1250 { 1251 ohci_softc_t *sc = v; 1252 ohci_soft_itd_t *sitd, *sidone, *sitdnext; 1253 ohci_soft_td_t *std, *sdone, *stdnext; 1254 usbd_xfer_handle xfer; 1255 struct ohci_pipe *opipe; 1256 int len, cc, s; 1257 int i, j, actlen, iframes, uedir; 1258 ohci_physaddr_t done; 1259 1260 DPRINTFN(10,("ohci_softintr: enter\n")); 1261 1262 sc->sc_bus.intr_context++; 1263 1264 s = splhardusb(); 1265 done = le32toh(sc->sc_hcca->hcca_done_head) & ~OHCI_DONE_INTRS; 1266 sc->sc_hcca->hcca_done_head = 0; 1267 OWRITE4(sc, OHCI_INTERRUPT_STATUS, OHCI_WDH); 1268 sc->sc_eintrs |= OHCI_WDH; 1269 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_WDH); 1270 splx(s); 1271 1272 /* Reverse the done list. */ 1273 for (sdone = NULL, sidone = NULL; done != 0; ) { 1274 std = ohci_hash_find_td(sc, done); 1275 if (std != NULL) { 1276 std->dnext = sdone; 1277 done = le32toh(std->td.td_nexttd); 1278 sdone = std; 1279 DPRINTFN(10,("add TD %p\n", std)); 1280 continue; 1281 } 1282 sitd = ohci_hash_find_itd(sc, done); 1283 if (sitd != NULL) { 1284 sitd->dnext = sidone; 1285 done = le32toh(sitd->itd.itd_nextitd); 1286 sidone = sitd; 1287 DPRINTFN(5,("add ITD %p\n", sitd)); 1288 continue; 1289 } 1290 panic("ohci_softintr: addr 0x%08lx not found", (u_long)done); 1291 } 1292 1293 DPRINTFN(10,("ohci_softintr: sdone=%p sidone=%p\n", sdone, sidone)); 1294 1295 #ifdef OHCI_DEBUG 1296 if (ohcidebug > 10) { 1297 DPRINTF(("ohci_process_done: TD done:\n")); 1298 ohci_dump_tds(sdone); 1299 } 1300 #endif 1301 1302 for (std = sdone; std; std = stdnext) { 1303 xfer = std->xfer; 1304 stdnext = std->dnext; 1305 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n", 1306 std, xfer, xfer ? xfer->hcpriv : 0)); 1307 if (xfer == NULL) { 1308 /* 1309 * xfer == NULL: There seems to be no xfer associated 1310 * with this TD. It is tailp that happened to end up on 1311 * the done queue. 1312 * Shouldn't happen, but some chips are broken(?). 1313 */ 1314 continue; 1315 } 1316 if (xfer->status == USBD_CANCELLED || 1317 xfer->status == USBD_TIMEOUT) { 1318 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1319 xfer)); 1320 /* Handled by abort routine. */ 1321 continue; 1322 } 1323 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 1324 1325 len = std->len; 1326 if (std->td.td_cbp != 0) 1327 len -= le32toh(std->td.td_be) - 1328 le32toh(std->td.td_cbp) + 1; 1329 DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", len, 1330 std->flags)); 1331 if (std->flags & OHCI_ADD_LEN) 1332 xfer->actlen += len; 1333 1334 cc = OHCI_TD_GET_CC(le32toh(std->td.td_flags)); 1335 if (cc == OHCI_CC_NO_ERROR) { 1336 if (std->flags & OHCI_CALL_DONE) { 1337 xfer->status = USBD_NORMAL_COMPLETION; 1338 s = splusb(); 1339 usb_transfer_complete(xfer); 1340 splx(s); 1341 } 1342 ohci_free_std(sc, std); 1343 } else { 1344 /* 1345 * Endpoint is halted. First unlink all the TDs 1346 * belonging to the failed transfer, and then restart 1347 * the endpoint. 1348 */ 1349 ohci_soft_td_t *p, *n; 1350 opipe = (struct ohci_pipe *)xfer->pipe; 1351 1352 DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n", 1353 OHCI_TD_GET_CC(le32toh(std->td.td_flags)), 1354 ohci_cc_strs[OHCI_TD_GET_CC(le32toh(std->td.td_flags))])); 1355 1356 /* remove TDs */ 1357 for (p = std; p->xfer == xfer; p = n) { 1358 n = p->nexttd; 1359 ohci_free_std(sc, p); 1360 } 1361 1362 /* clear halt */ 1363 opipe->sed->ed.ed_headp = htole32(p->physaddr); 1364 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1365 1366 if (cc == OHCI_CC_STALL) 1367 xfer->status = USBD_STALLED; 1368 else 1369 xfer->status = USBD_IOERROR; 1370 s = splusb(); 1371 usb_transfer_complete(xfer); 1372 splx(s); 1373 } 1374 } 1375 1376 #ifdef OHCI_DEBUG 1377 if (ohcidebug > 10) { 1378 DPRINTF(("ohci_softintr: ITD done:\n")); 1379 ohci_dump_itds(sidone); 1380 } 1381 #endif 1382 1383 for (sitd = sidone; sitd != NULL; sitd = sitdnext) { 1384 xfer = sitd->xfer; 1385 sitdnext = sitd->dnext; 1386 DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n", 1387 sitd, xfer, xfer ? xfer->hcpriv : 0)); 1388 if (xfer == NULL) 1389 continue; 1390 if (xfer->status == USBD_CANCELLED || 1391 xfer->status == USBD_TIMEOUT) { 1392 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1393 xfer)); 1394 /* Handled by abort routine. */ 1395 continue; 1396 } 1397 #ifdef DIAGNOSTIC 1398 if (sitd->isdone) 1399 printf("ohci_softintr: sitd=%p is done\n", sitd); 1400 sitd->isdone = 1; 1401 #endif 1402 if (sitd->flags & OHCI_CALL_DONE) { 1403 ohci_soft_itd_t *next; 1404 1405 opipe = (struct ohci_pipe *)xfer->pipe; 1406 opipe->u.iso.inuse -= xfer->nframes; 1407 uedir = UE_GET_DIR(xfer->pipe->endpoint->edesc-> 1408 bEndpointAddress); 1409 xfer->status = USBD_NORMAL_COMPLETION; 1410 actlen = 0; 1411 for (i = 0, sitd = xfer->hcpriv;; 1412 sitd = next) { 1413 next = sitd->nextitd; 1414 if (OHCI_ITD_GET_CC(le32toh(sitd-> 1415 itd.itd_flags)) != OHCI_CC_NO_ERROR) 1416 xfer->status = USBD_IOERROR; 1417 /* For input, update frlengths with actual */ 1418 /* XXX anything necessary for output? */ 1419 if (uedir == UE_DIR_IN && 1420 xfer->status == USBD_NORMAL_COMPLETION) { 1421 iframes = OHCI_ITD_GET_FC(le32toh( 1422 sitd->itd.itd_flags)); 1423 for (j = 0; j < iframes; i++, j++) { 1424 len = le16toh(sitd-> 1425 itd.itd_offset[j]); 1426 if ((OHCI_ITD_PSW_GET_CC(len) & 1427 OHCI_CC_NOT_ACCESSED_MASK) 1428 == OHCI_CC_NOT_ACCESSED) 1429 len = 0; 1430 else 1431 len = OHCI_ITD_PSW_LENGTH(len); 1432 xfer->frlengths[i] = len; 1433 actlen += len; 1434 } 1435 } 1436 if (sitd->flags & OHCI_CALL_DONE) 1437 break; 1438 ohci_free_sitd(sc, sitd); 1439 } 1440 ohci_free_sitd(sc, sitd); 1441 if (uedir == UE_DIR_IN && 1442 xfer->status == USBD_NORMAL_COMPLETION) 1443 xfer->actlen = actlen; 1444 xfer->hcpriv = NULL; 1445 1446 s = splusb(); 1447 usb_transfer_complete(xfer); 1448 splx(s); 1449 } 1450 } 1451 1452 #ifdef USB_USE_SOFTINTR 1453 if (sc->sc_softwake) { 1454 sc->sc_softwake = 0; 1455 wakeup(&sc->sc_softwake); 1456 } 1457 #endif /* USB_USE_SOFTINTR */ 1458 1459 sc->sc_bus.intr_context--; 1460 DPRINTFN(10,("ohci_softintr: done:\n")); 1461 } 1462 1463 void 1464 ohci_device_ctrl_done(usbd_xfer_handle xfer) 1465 { 1466 DPRINTFN(10,("ohci_device_ctrl_done: xfer=%p\n", xfer)); 1467 1468 #ifdef DIAGNOSTIC 1469 if (!(xfer->rqflags & URQ_REQUEST)) { 1470 panic("ohci_device_ctrl_done: not a request"); 1471 } 1472 #endif 1473 } 1474 1475 void 1476 ohci_device_intr_done(usbd_xfer_handle xfer) 1477 { 1478 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1479 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1480 ohci_soft_ed_t *sed = opipe->sed; 1481 ohci_soft_td_t *data, *tail; 1482 1483 1484 DPRINTFN(10,("ohci_device_intr_done: xfer=%p, actlen=%d\n", 1485 xfer, xfer->actlen)); 1486 1487 if (xfer->pipe->repeat) { 1488 data = opipe->tail.td; 1489 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 1490 if (tail == NULL) { 1491 xfer->status = USBD_NOMEM; 1492 return; 1493 } 1494 tail->xfer = NULL; 1495 1496 data->td.td_flags = htole32( 1497 OHCI_TD_IN | OHCI_TD_NOCC | 1498 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 1499 if (xfer->flags & USBD_SHORT_XFER_OK) 1500 data->td.td_flags |= htole32(OHCI_TD_R); 1501 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf, 0)); 1502 data->nexttd = tail; 1503 data->td.td_nexttd = htole32(tail->physaddr); 1504 data->td.td_be = htole32(le32toh(data->td.td_cbp) + 1505 xfer->length - 1); 1506 data->len = xfer->length; 1507 data->xfer = xfer; 1508 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1509 xfer->hcpriv = data; 1510 xfer->actlen = 0; 1511 1512 sed->ed.ed_tailp = htole32(tail->physaddr); 1513 opipe->tail.td = tail; 1514 } 1515 } 1516 1517 void 1518 ohci_device_bulk_done(usbd_xfer_handle xfer) 1519 { 1520 DPRINTFN(10,("ohci_device_bulk_done: xfer=%p, actlen=%d\n", 1521 xfer, xfer->actlen)); 1522 } 1523 1524 void 1525 ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer) 1526 { 1527 usbd_pipe_handle pipe; 1528 u_char *p; 1529 int i, m; 1530 int hstatus; 1531 1532 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1533 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n", 1534 sc, xfer, hstatus)); 1535 1536 if (xfer == NULL) { 1537 /* Just ignore the change. */ 1538 return; 1539 } 1540 1541 pipe = xfer->pipe; 1542 1543 p = KERNADDR(&xfer->dmabuf, 0); 1544 m = min(sc->sc_noport, xfer->length * 8 - 1); 1545 memset(p, 0, xfer->length); 1546 for (i = 1; i <= m; i++) { 1547 /* Pick out CHANGE bits from the status reg. */ 1548 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1549 p[i/8] |= 1 << (i%8); 1550 } 1551 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 1552 xfer->actlen = xfer->length; 1553 xfer->status = USBD_NORMAL_COMPLETION; 1554 1555 usb_transfer_complete(xfer); 1556 } 1557 1558 void 1559 ohci_root_intr_done(usbd_xfer_handle xfer) 1560 { 1561 } 1562 1563 void 1564 ohci_root_ctrl_done(usbd_xfer_handle xfer) 1565 { 1566 } 1567 1568 /* 1569 * Wait here until controller claims to have an interrupt. 1570 * Then call ohci_intr and return. Use timeout to avoid waiting 1571 * too long. 1572 */ 1573 void 1574 ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer) 1575 { 1576 int timo; 1577 u_int32_t intrs; 1578 1579 xfer->status = USBD_IN_PROGRESS; 1580 for (timo = xfer->timeout; timo >= 0; timo--) { 1581 usb_delay_ms(&sc->sc_bus, 1); 1582 if (sc->sc_dying) 1583 break; 1584 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 1585 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs)); 1586 #ifdef OHCI_DEBUG 1587 if (ohcidebug > 15) 1588 ohci_dumpregs(sc); 1589 #endif 1590 if (intrs) { 1591 ohci_intr1(sc); 1592 if (xfer->status != USBD_IN_PROGRESS) 1593 return; 1594 } 1595 } 1596 1597 /* Timeout */ 1598 DPRINTF(("ohci_waitintr: timeout\n")); 1599 xfer->status = USBD_TIMEOUT; 1600 usb_transfer_complete(xfer); 1601 /* XXX should free TD */ 1602 } 1603 1604 void 1605 ohci_poll(struct usbd_bus *bus) 1606 { 1607 ohci_softc_t *sc = (ohci_softc_t *)bus; 1608 #ifdef OHCI_DEBUG 1609 static int last; 1610 int new; 1611 new = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1612 if (new != last) { 1613 DPRINTFN(10,("ohci_poll: intrs=0x%04x\n", new)); 1614 last = new; 1615 } 1616 #endif 1617 1618 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) 1619 ohci_intr1(sc); 1620 } 1621 1622 usbd_status 1623 ohci_device_request(usbd_xfer_handle xfer) 1624 { 1625 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1626 usb_device_request_t *req = &xfer->request; 1627 usbd_device_handle dev = opipe->pipe.device; 1628 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1629 int addr = dev->address; 1630 ohci_soft_td_t *setup, *stat, *next, *tail; 1631 ohci_soft_ed_t *sed; 1632 int isread; 1633 int len; 1634 usbd_status err; 1635 int s; 1636 1637 isread = req->bmRequestType & UT_READ; 1638 len = UGETW(req->wLength); 1639 1640 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 1641 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 1642 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1643 UGETW(req->wIndex), len, addr, 1644 opipe->pipe.endpoint->edesc->bEndpointAddress)); 1645 1646 setup = opipe->tail.td; 1647 stat = ohci_alloc_std(sc); 1648 if (stat == NULL) { 1649 err = USBD_NOMEM; 1650 goto bad1; 1651 } 1652 tail = ohci_alloc_std(sc); 1653 if (tail == NULL) { 1654 err = USBD_NOMEM; 1655 goto bad2; 1656 } 1657 tail->xfer = NULL; 1658 1659 sed = opipe->sed; 1660 opipe->u.ctl.length = len; 1661 1662 /* Update device address and length since they may have changed 1663 during the setup of the control pipe in usbd_new_device(). */ 1664 /* XXX This only needs to be done once, but it's too early in open. */ 1665 /* XXXX Should not touch ED here! */ 1666 sed->ed.ed_flags = htole32( 1667 (le32toh(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) | 1668 OHCI_ED_SET_FA(addr) | 1669 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize))); 1670 1671 next = stat; 1672 1673 /* Set up data transaction */ 1674 if (len != 0) { 1675 ohci_soft_td_t *std = stat; 1676 1677 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 1678 std, &stat); 1679 stat = stat->nexttd; /* point at free TD */ 1680 if (err) 1681 goto bad3; 1682 /* Start toggle at 1 and then use the carried toggle. */ 1683 std->td.td_flags &= htole32(~OHCI_TD_TOGGLE_MASK); 1684 std->td.td_flags |= htole32(OHCI_TD_TOGGLE_1); 1685 } 1686 1687 memcpy(KERNADDR(&opipe->u.ctl.reqdma, 0), req, sizeof *req); 1688 1689 setup->td.td_flags = htole32(OHCI_TD_SETUP | OHCI_TD_NOCC | 1690 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1691 setup->td.td_cbp = htole32(DMAADDR(&opipe->u.ctl.reqdma, 0)); 1692 setup->nexttd = next; 1693 setup->td.td_nexttd = htole32(next->physaddr); 1694 setup->td.td_be = htole32(le32toh(setup->td.td_cbp) + sizeof *req - 1); 1695 setup->len = 0; 1696 setup->xfer = xfer; 1697 setup->flags = 0; 1698 xfer->hcpriv = setup; 1699 1700 stat->td.td_flags = htole32( 1701 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | 1702 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1703 stat->td.td_cbp = 0; 1704 stat->nexttd = tail; 1705 stat->td.td_nexttd = htole32(tail->physaddr); 1706 stat->td.td_be = 0; 1707 stat->flags = OHCI_CALL_DONE; 1708 stat->len = 0; 1709 stat->xfer = xfer; 1710 1711 #ifdef OHCI_DEBUG 1712 if (ohcidebug > 5) { 1713 DPRINTF(("ohci_device_request:\n")); 1714 ohci_dump_ed(sed); 1715 ohci_dump_tds(setup); 1716 } 1717 #endif 1718 1719 /* Insert ED in schedule */ 1720 s = splusb(); 1721 sed->ed.ed_tailp = htole32(tail->physaddr); 1722 opipe->tail.td = tail; 1723 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1724 if (xfer->timeout && !sc->sc_bus.use_polling) { 1725 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 1726 ohci_timeout, xfer); 1727 } 1728 splx(s); 1729 1730 #ifdef OHCI_DEBUG 1731 if (ohcidebug > 20) { 1732 delay(10000); 1733 DPRINTF(("ohci_device_request: status=%x\n", 1734 OREAD4(sc, OHCI_COMMAND_STATUS))); 1735 ohci_dumpregs(sc); 1736 printf("ctrl head:\n"); 1737 ohci_dump_ed(sc->sc_ctrl_head); 1738 printf("sed:\n"); 1739 ohci_dump_ed(sed); 1740 ohci_dump_tds(setup); 1741 } 1742 #endif 1743 1744 return (USBD_NORMAL_COMPLETION); 1745 1746 bad3: 1747 ohci_free_std(sc, tail); 1748 bad2: 1749 ohci_free_std(sc, stat); 1750 bad1: 1751 return (err); 1752 } 1753 1754 /* 1755 * Add an ED to the schedule. Called at splusb(). 1756 */ 1757 void 1758 ohci_add_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1759 { 1760 DPRINTFN(8,("ohci_add_ed: sed=%p head=%p\n", sed, head)); 1761 1762 SPLUSBCHECK; 1763 sed->next = head->next; 1764 sed->ed.ed_nexted = head->ed.ed_nexted; 1765 head->next = sed; 1766 head->ed.ed_nexted = htole32(sed->physaddr); 1767 } 1768 1769 /* 1770 * Remove an ED from the schedule. Called at splusb(). 1771 */ 1772 void 1773 ohci_rem_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1774 { 1775 ohci_soft_ed_t *p; 1776 1777 SPLUSBCHECK; 1778 1779 /* XXX */ 1780 for (p = head; p != NULL && p->next != sed; p = p->next) 1781 ; 1782 if (p == NULL) 1783 panic("ohci_rem_ed: ED not found"); 1784 p->next = sed->next; 1785 p->ed.ed_nexted = sed->ed.ed_nexted; 1786 } 1787 1788 /* 1789 * When a transfer is completed the TD is added to the done queue by 1790 * the host controller. This queue is the processed by software. 1791 * Unfortunately the queue contains the physical address of the TD 1792 * and we have no simple way to translate this back to a kernel address. 1793 * To make the translation possible (and fast) we use a hash table of 1794 * TDs currently in the schedule. The physical address is used as the 1795 * hash value. 1796 */ 1797 1798 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1799 /* Called at splusb() */ 1800 void 1801 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1802 { 1803 int h = HASH(std->physaddr); 1804 1805 SPLUSBCHECK; 1806 1807 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1808 } 1809 1810 /* Called at splusb() */ 1811 void 1812 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1813 { 1814 SPLUSBCHECK; 1815 1816 LIST_REMOVE(std, hnext); 1817 } 1818 1819 ohci_soft_td_t * 1820 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a) 1821 { 1822 int h = HASH(a); 1823 ohci_soft_td_t *std; 1824 1825 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1826 std != NULL; 1827 std = LIST_NEXT(std, hnext)) 1828 if (std->physaddr == a) 1829 return (std); 1830 return (NULL); 1831 } 1832 1833 /* Called at splusb() */ 1834 void 1835 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1836 { 1837 int h = HASH(sitd->physaddr); 1838 1839 SPLUSBCHECK; 1840 1841 DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n", 1842 sitd, (u_long)sitd->physaddr)); 1843 1844 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext); 1845 } 1846 1847 /* Called at splusb() */ 1848 void 1849 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1850 { 1851 SPLUSBCHECK; 1852 1853 DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n", 1854 sitd, (u_long)sitd->physaddr)); 1855 1856 LIST_REMOVE(sitd, hnext); 1857 } 1858 1859 ohci_soft_itd_t * 1860 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a) 1861 { 1862 int h = HASH(a); 1863 ohci_soft_itd_t *sitd; 1864 1865 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]); 1866 sitd != NULL; 1867 sitd = LIST_NEXT(sitd, hnext)) 1868 if (sitd->physaddr == a) 1869 return (sitd); 1870 return (NULL); 1871 } 1872 1873 void 1874 ohci_timeout(void *addr) 1875 { 1876 struct ohci_xfer *oxfer = addr; 1877 struct ohci_pipe *opipe = (struct ohci_pipe *)oxfer->xfer.pipe; 1878 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1879 1880 DPRINTF(("ohci_timeout: oxfer=%p\n", oxfer)); 1881 1882 if (sc->sc_dying) { 1883 ohci_abort_xfer(&oxfer->xfer, USBD_TIMEOUT); 1884 return; 1885 } 1886 1887 /* Execute the abort in a process context. */ 1888 usb_init_task(&oxfer->abort_task, ohci_timeout_task, addr); 1889 usb_add_task(oxfer->xfer.pipe->device, &oxfer->abort_task); 1890 } 1891 1892 void 1893 ohci_timeout_task(void *addr) 1894 { 1895 usbd_xfer_handle xfer = addr; 1896 int s; 1897 1898 DPRINTF(("ohci_timeout_task: xfer=%p\n", xfer)); 1899 1900 s = splusb(); 1901 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1902 splx(s); 1903 } 1904 1905 #ifdef OHCI_DEBUG 1906 void 1907 ohci_dump_tds(ohci_soft_td_t *std) 1908 { 1909 for (; std; std = std->nexttd) 1910 ohci_dump_td(std); 1911 } 1912 1913 void 1914 ohci_dump_td(ohci_soft_td_t *std) 1915 { 1916 char sbuf[128]; 1917 1918 bitmask_snprintf((u_int32_t)le32toh(std->td.td_flags), 1919 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 1920 sbuf, sizeof(sbuf)); 1921 1922 printf("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx " 1923 "nexttd=0x%08lx be=0x%08lx\n", 1924 std, (u_long)std->physaddr, sbuf, 1925 OHCI_TD_GET_DI(le32toh(std->td.td_flags)), 1926 OHCI_TD_GET_EC(le32toh(std->td.td_flags)), 1927 OHCI_TD_GET_CC(le32toh(std->td.td_flags)), 1928 (u_long)le32toh(std->td.td_cbp), 1929 (u_long)le32toh(std->td.td_nexttd), 1930 (u_long)le32toh(std->td.td_be)); 1931 } 1932 1933 void 1934 ohci_dump_itd(ohci_soft_itd_t *sitd) 1935 { 1936 int i; 1937 1938 printf("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n" 1939 "bp0=0x%08lx next=0x%08lx be=0x%08lx\n", 1940 sitd, (u_long)sitd->physaddr, 1941 OHCI_ITD_GET_SF(le32toh(sitd->itd.itd_flags)), 1942 OHCI_ITD_GET_DI(le32toh(sitd->itd.itd_flags)), 1943 OHCI_ITD_GET_FC(le32toh(sitd->itd.itd_flags)), 1944 OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags)), 1945 (u_long)le32toh(sitd->itd.itd_bp0), 1946 (u_long)le32toh(sitd->itd.itd_nextitd), 1947 (u_long)le32toh(sitd->itd.itd_be)); 1948 for (i = 0; i < OHCI_ITD_NOFFSET; i++) 1949 printf("offs[%d]=0x%04x ", i, 1950 (u_int)le16toh(sitd->itd.itd_offset[i])); 1951 printf("\n"); 1952 } 1953 1954 void 1955 ohci_dump_itds(ohci_soft_itd_t *sitd) 1956 { 1957 for (; sitd; sitd = sitd->nextitd) 1958 ohci_dump_itd(sitd); 1959 } 1960 1961 void 1962 ohci_dump_ed(ohci_soft_ed_t *sed) 1963 { 1964 char sbuf[128], sbuf2[128]; 1965 1966 bitmask_snprintf((u_int32_t)le32toh(sed->ed.ed_flags), 1967 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO", 1968 sbuf, sizeof(sbuf)); 1969 bitmask_snprintf((u_int32_t)le32toh(sed->ed.ed_headp), 1970 "\20\1HALT\2CARRY", sbuf2, sizeof(sbuf2)); 1971 1972 printf("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d flags=%s\ntailp=0x%08lx " 1973 "headflags=%s headp=0x%08lx nexted=0x%08lx\n", 1974 sed, (u_long)sed->physaddr, 1975 OHCI_ED_GET_FA(le32toh(sed->ed.ed_flags)), 1976 OHCI_ED_GET_EN(le32toh(sed->ed.ed_flags)), 1977 OHCI_ED_GET_MAXP(le32toh(sed->ed.ed_flags)), sbuf, 1978 (u_long)le32toh(sed->ed.ed_tailp), sbuf2, 1979 (u_long)le32toh(sed->ed.ed_headp), 1980 (u_long)le32toh(sed->ed.ed_nexted)); 1981 } 1982 #endif 1983 1984 usbd_status 1985 ohci_open(usbd_pipe_handle pipe) 1986 { 1987 usbd_device_handle dev = pipe->device; 1988 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1989 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1990 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1991 u_int8_t addr = dev->address; 1992 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1993 ohci_soft_ed_t *sed; 1994 ohci_soft_td_t *std; 1995 ohci_soft_itd_t *sitd; 1996 ohci_physaddr_t tdphys; 1997 u_int32_t fmt; 1998 usbd_status err; 1999 int s; 2000 int ival; 2001 2002 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 2003 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 2004 2005 if (sc->sc_dying) 2006 return (USBD_IOERROR); 2007 2008 std = NULL; 2009 sed = NULL; 2010 2011 if (addr == sc->sc_addr) { 2012 switch (ed->bEndpointAddress) { 2013 case USB_CONTROL_ENDPOINT: 2014 pipe->methods = &ohci_root_ctrl_methods; 2015 break; 2016 case UE_DIR_IN | OHCI_INTR_ENDPT: 2017 pipe->methods = &ohci_root_intr_methods; 2018 break; 2019 default: 2020 return (USBD_INVAL); 2021 } 2022 } else { 2023 sed = ohci_alloc_sed(sc); 2024 if (sed == NULL) 2025 goto bad0; 2026 opipe->sed = sed; 2027 if (xfertype == UE_ISOCHRONOUS) { 2028 sitd = ohci_alloc_sitd(sc); 2029 if (sitd == NULL) 2030 goto bad1; 2031 opipe->tail.itd = sitd; 2032 tdphys = sitd->physaddr; 2033 fmt = OHCI_ED_FORMAT_ISO; 2034 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 2035 fmt |= OHCI_ED_DIR_IN; 2036 else 2037 fmt |= OHCI_ED_DIR_OUT; 2038 } else { 2039 std = ohci_alloc_std(sc); 2040 if (std == NULL) 2041 goto bad1; 2042 opipe->tail.td = std; 2043 tdphys = std->physaddr; 2044 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD; 2045 } 2046 sed->ed.ed_flags = htole32( 2047 OHCI_ED_SET_FA(addr) | 2048 OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) | 2049 (dev->speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) | 2050 fmt | 2051 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 2052 sed->ed.ed_headp = sed->ed.ed_tailp = htole32(tdphys); 2053 2054 switch (xfertype) { 2055 case UE_CONTROL: 2056 pipe->methods = &ohci_device_ctrl_methods; 2057 err = usb_allocmem(&sc->sc_bus, 2058 sizeof(usb_device_request_t), 2059 0, &opipe->u.ctl.reqdma); 2060 if (err) 2061 goto bad; 2062 s = splusb(); 2063 ohci_add_ed(sed, sc->sc_ctrl_head); 2064 splx(s); 2065 break; 2066 case UE_INTERRUPT: 2067 pipe->methods = &ohci_device_intr_methods; 2068 ival = pipe->interval; 2069 if (ival == USBD_DEFAULT_INTERVAL) 2070 ival = ed->bInterval; 2071 return (ohci_device_setintr(sc, opipe, ival)); 2072 case UE_ISOCHRONOUS: 2073 pipe->methods = &ohci_device_isoc_methods; 2074 return (ohci_setup_isoc(pipe)); 2075 case UE_BULK: 2076 pipe->methods = &ohci_device_bulk_methods; 2077 s = splusb(); 2078 ohci_add_ed(sed, sc->sc_bulk_head); 2079 splx(s); 2080 break; 2081 } 2082 } 2083 return (USBD_NORMAL_COMPLETION); 2084 2085 bad: 2086 if (std != NULL) 2087 ohci_free_std(sc, std); 2088 bad1: 2089 if (sed != NULL) 2090 ohci_free_sed(sc, sed); 2091 bad0: 2092 return (USBD_NOMEM); 2093 2094 } 2095 2096 /* 2097 * Close a reqular pipe. 2098 * Assumes that there are no pending transactions. 2099 */ 2100 void 2101 ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head) 2102 { 2103 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2104 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2105 ohci_soft_ed_t *sed = opipe->sed; 2106 int s; 2107 2108 s = splusb(); 2109 #ifdef DIAGNOSTIC 2110 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 2111 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2112 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) { 2113 ohci_soft_td_t *std; 2114 std = ohci_hash_find_td(sc, le32toh(sed->ed.ed_headp)); 2115 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 2116 "tl=0x%x pipe=%p, std=%p\n", sed, 2117 (int)le32toh(sed->ed.ed_headp), 2118 (int)le32toh(sed->ed.ed_tailp), 2119 pipe, std); 2120 #ifdef USB_DEBUG 2121 usbd_dump_pipe(&opipe->pipe); 2122 #endif 2123 #ifdef OHCI_DEBUG 2124 ohci_dump_ed(sed); 2125 if (std) 2126 ohci_dump_td(std); 2127 #endif 2128 usb_delay_ms(&sc->sc_bus, 2); 2129 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2130 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) 2131 printf("ohci_close_pipe: pipe still not empty\n"); 2132 } 2133 #endif 2134 ohci_rem_ed(sed, head); 2135 /* Make sure the host controller is not touching this ED */ 2136 usb_delay_ms(&sc->sc_bus, 1); 2137 splx(s); 2138 ohci_free_sed(sc, opipe->sed); 2139 } 2140 2141 /* 2142 * Abort a device request. 2143 * If this routine is called at splusb() it guarantees that the request 2144 * will be removed from the hardware scheduling and that the callback 2145 * for it will be called with USBD_CANCELLED status. 2146 * It's impossible to guarantee that the requested transfer will not 2147 * have happened since the hardware runs concurrently. 2148 * If the transaction has already happened we rely on the ordinary 2149 * interrupt processing to process it. 2150 */ 2151 void 2152 ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2153 { 2154 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2155 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 2156 ohci_soft_ed_t *sed = opipe->sed; 2157 ohci_soft_td_t *p, *n; 2158 ohci_physaddr_t headp; 2159 int s, hit; 2160 int wake; 2161 2162 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p sed=%p\n", xfer, opipe,sed)); 2163 2164 if (sc->sc_dying) { 2165 /* If we're dying, just do the software part. */ 2166 s = splusb(); 2167 xfer->status = status; /* make software ignore it */ 2168 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 2169 usb_transfer_complete(xfer); 2170 splx(s); 2171 } 2172 2173 if (xfer->device->bus->intr_context || !curproc) 2174 panic("ohci_abort_xfer: not in process context"); 2175 2176 /* 2177 * If an abort is already in progress then just wait for it to 2178 * complete and return. 2179 */ 2180 if (xfer->hcflags & UXFER_ABORTING) { 2181 DPRINTFN(2, ("ohci_abort_xfer: already aborting\n")); 2182 #ifdef DIAGNOSTIC 2183 if (status == USBD_TIMEOUT) 2184 printf("0hci_abort_xfer: TIMEOUT while aborting\n"); 2185 #endif 2186 /* Override the status which might be USBD_TIMEOUT. */ 2187 xfer->status = status; 2188 DPRINTFN(2, ("ohci_abort_xfer: waiting for abort to finish\n")); 2189 xfer->hcflags |= UXFER_ABORTWAIT; 2190 while (xfer->hcflags & UXFER_ABORTING) 2191 tsleep(&xfer->hcflags, PZERO, "ohciaw", 0); 2192 return; 2193 } 2194 xfer->hcflags |= UXFER_ABORTING; 2195 2196 /* 2197 * Step 1: Make interrupt routine and hardware ignore xfer. 2198 */ 2199 s = splusb(); 2200 xfer->status = status; /* make software ignore it */ 2201 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 2202 splx(s); 2203 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed)); 2204 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 2205 2206 /* 2207 * Step 2: Wait until we know hardware has finished any possible 2208 * use of the xfer. Also make sure the soft interrupt routine 2209 * has run. 2210 */ 2211 usb_delay_ms(opipe->pipe.device->bus, 20); /* Hardware finishes in 1ms */ 2212 s = splusb(); 2213 #ifdef USB_USE_SOFTINTR 2214 sc->sc_softwake = 1; 2215 #endif /* USB_USE_SOFTINTR */ 2216 usb_schedsoftintr(&sc->sc_bus); 2217 #ifdef USB_USE_SOFTINTR 2218 tsleep(&sc->sc_softwake, PZERO, "ohciab", 0); 2219 #endif /* USB_USE_SOFTINTR */ 2220 splx(s); 2221 2222 /* 2223 * Step 3: Remove any vestiges of the xfer from the hardware. 2224 * The complication here is that the hardware may have executed 2225 * beyond the xfer we're trying to abort. So as we're scanning 2226 * the TDs of this xfer we check if the hardware points to 2227 * any of them. 2228 */ 2229 s = splusb(); /* XXX why? */ 2230 p = xfer->hcpriv; 2231 #ifdef DIAGNOSTIC 2232 if (p == NULL) { 2233 xfer->hcflags &= ~UXFER_ABORTING; /* XXX */ 2234 splx(s); 2235 printf("ohci_abort_xfer: hcpriv is NULL\n"); 2236 return; 2237 } 2238 #endif 2239 #ifdef OHCI_DEBUG 2240 if (ohcidebug > 1) { 2241 DPRINTF(("ohci_abort_xfer: sed=\n")); 2242 ohci_dump_ed(sed); 2243 ohci_dump_tds(p); 2244 } 2245 #endif 2246 headp = le32toh(sed->ed.ed_headp) & OHCI_HEADMASK; 2247 hit = 0; 2248 for (; p->xfer == xfer; p = n) { 2249 hit |= headp == p->physaddr; 2250 n = p->nexttd; 2251 ohci_free_std(sc, p); 2252 } 2253 /* Zap headp register if hardware pointed inside the xfer. */ 2254 if (hit) { 2255 DPRINTFN(1,("ohci_abort_xfer: set hd=0x%08x, tl=0x%08x\n", 2256 (int)p->physaddr, (int)le32toh(sed->ed.ed_tailp))); 2257 sed->ed.ed_headp = htole32(p->physaddr); /* unlink TDs */ 2258 } else { 2259 DPRINTFN(1,("ohci_abort_xfer: no hit\n")); 2260 } 2261 2262 /* 2263 * Step 4: Turn on hardware again. 2264 */ 2265 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 2266 2267 /* 2268 * Step 5: Execute callback. 2269 */ 2270 wake = xfer->hcflags & UXFER_ABORTWAIT; 2271 xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT); 2272 usb_transfer_complete(xfer); 2273 if (wake) 2274 wakeup(&xfer->hcflags); 2275 2276 splx(s); 2277 } 2278 2279 /* 2280 * Data structures and routines to emulate the root hub. 2281 */ 2282 Static usb_device_descriptor_t ohci_devd = { 2283 USB_DEVICE_DESCRIPTOR_SIZE, 2284 UDESC_DEVICE, /* type */ 2285 {0x00, 0x01}, /* USB version */ 2286 UDCLASS_HUB, /* class */ 2287 UDSUBCLASS_HUB, /* subclass */ 2288 UDPROTO_FSHUB, 2289 64, /* max packet */ 2290 {0},{0},{0x00,0x01}, /* device id */ 2291 1,2,0, /* string indicies */ 2292 1 /* # of configurations */ 2293 }; 2294 2295 Static usb_config_descriptor_t ohci_confd = { 2296 USB_CONFIG_DESCRIPTOR_SIZE, 2297 UDESC_CONFIG, 2298 {USB_CONFIG_DESCRIPTOR_SIZE + 2299 USB_INTERFACE_DESCRIPTOR_SIZE + 2300 USB_ENDPOINT_DESCRIPTOR_SIZE}, 2301 1, 2302 1, 2303 0, 2304 UC_SELF_POWERED, 2305 0 /* max power */ 2306 }; 2307 2308 Static usb_interface_descriptor_t ohci_ifcd = { 2309 USB_INTERFACE_DESCRIPTOR_SIZE, 2310 UDESC_INTERFACE, 2311 0, 2312 0, 2313 1, 2314 UICLASS_HUB, 2315 UISUBCLASS_HUB, 2316 UIPROTO_FSHUB, 2317 0 2318 }; 2319 2320 Static usb_endpoint_descriptor_t ohci_endpd = { 2321 USB_ENDPOINT_DESCRIPTOR_SIZE, 2322 UDESC_ENDPOINT, 2323 UE_DIR_IN | OHCI_INTR_ENDPT, 2324 UE_INTERRUPT, 2325 {8, 0}, /* max packet */ 2326 255 2327 }; 2328 2329 Static usb_hub_descriptor_t ohci_hubd = { 2330 USB_HUB_DESCRIPTOR_SIZE, 2331 UDESC_HUB, 2332 0, 2333 {0,0}, 2334 0, 2335 0, 2336 {0}, 2337 }; 2338 2339 Static int 2340 ohci_str(usb_string_descriptor_t *p, int l, const char *s) 2341 { 2342 int i; 2343 2344 if (l == 0) 2345 return (0); 2346 p->bLength = 2 * strlen(s) + 2; 2347 if (l == 1) 2348 return (1); 2349 p->bDescriptorType = UDESC_STRING; 2350 l -= 2; 2351 for (i = 0; s[i] && l > 1; i++, l -= 2) 2352 USETW2(p->bString[i], 0, s[i]); 2353 return (2*i+2); 2354 } 2355 2356 /* 2357 * Simulate a hardware hub by handling all the necessary requests. 2358 */ 2359 Static usbd_status 2360 ohci_root_ctrl_transfer(usbd_xfer_handle xfer) 2361 { 2362 usbd_status err; 2363 2364 /* Insert last in queue. */ 2365 err = usb_insert_transfer(xfer); 2366 if (err) 2367 return (err); 2368 2369 /* Pipe isn't running, start first */ 2370 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2371 } 2372 2373 Static usbd_status 2374 ohci_root_ctrl_start(usbd_xfer_handle xfer) 2375 { 2376 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2377 usb_device_request_t *req; 2378 void *buf = NULL; 2379 int port, i; 2380 int s, len, value, index, l, totlen = 0; 2381 usb_port_status_t ps; 2382 usb_hub_descriptor_t hubd; 2383 usbd_status err; 2384 u_int32_t v; 2385 2386 if (sc->sc_dying) 2387 return (USBD_IOERROR); 2388 2389 #ifdef DIAGNOSTIC 2390 if (!(xfer->rqflags & URQ_REQUEST)) 2391 /* XXX panic */ 2392 return (USBD_INVAL); 2393 #endif 2394 req = &xfer->request; 2395 2396 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 2397 req->bmRequestType, req->bRequest)); 2398 2399 len = UGETW(req->wLength); 2400 value = UGETW(req->wValue); 2401 index = UGETW(req->wIndex); 2402 2403 if (len != 0) 2404 buf = KERNADDR(&xfer->dmabuf, 0); 2405 2406 #define C(x,y) ((x) | ((y) << 8)) 2407 switch(C(req->bRequest, req->bmRequestType)) { 2408 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 2409 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 2410 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 2411 /* 2412 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 2413 * for the integrated root hub. 2414 */ 2415 break; 2416 case C(UR_GET_CONFIG, UT_READ_DEVICE): 2417 if (len > 0) { 2418 *(u_int8_t *)buf = sc->sc_conf; 2419 totlen = 1; 2420 } 2421 break; 2422 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2423 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 2424 switch(value >> 8) { 2425 case UDESC_DEVICE: 2426 if ((value & 0xff) != 0) { 2427 err = USBD_IOERROR; 2428 goto ret; 2429 } 2430 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 2431 USETW(ohci_devd.idVendor, sc->sc_id_vendor); 2432 memcpy(buf, &ohci_devd, l); 2433 break; 2434 case UDESC_CONFIG: 2435 if ((value & 0xff) != 0) { 2436 err = USBD_IOERROR; 2437 goto ret; 2438 } 2439 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 2440 memcpy(buf, &ohci_confd, l); 2441 buf = (char *)buf + l; 2442 len -= l; 2443 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 2444 totlen += l; 2445 memcpy(buf, &ohci_ifcd, l); 2446 buf = (char *)buf + l; 2447 len -= l; 2448 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 2449 totlen += l; 2450 memcpy(buf, &ohci_endpd, l); 2451 break; 2452 case UDESC_STRING: 2453 if (len == 0) 2454 break; 2455 *(u_int8_t *)buf = 0; 2456 totlen = 1; 2457 switch (value & 0xff) { 2458 case 0: /* Language table */ 2459 totlen = ohci_str(buf, len, "\001"); 2460 break; 2461 case 1: /* Vendor */ 2462 totlen = ohci_str(buf, len, sc->sc_vendor); 2463 break; 2464 case 2: /* Product */ 2465 totlen = ohci_str(buf, len, "OHCI root hub"); 2466 break; 2467 } 2468 break; 2469 default: 2470 err = USBD_IOERROR; 2471 goto ret; 2472 } 2473 break; 2474 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 2475 if (len > 0) { 2476 *(u_int8_t *)buf = 0; 2477 totlen = 1; 2478 } 2479 break; 2480 case C(UR_GET_STATUS, UT_READ_DEVICE): 2481 if (len > 1) { 2482 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 2483 totlen = 2; 2484 } 2485 break; 2486 case C(UR_GET_STATUS, UT_READ_INTERFACE): 2487 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 2488 if (len > 1) { 2489 USETW(((usb_status_t *)buf)->wStatus, 0); 2490 totlen = 2; 2491 } 2492 break; 2493 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 2494 if (value >= USB_MAX_DEVICES) { 2495 err = USBD_IOERROR; 2496 goto ret; 2497 } 2498 sc->sc_addr = value; 2499 break; 2500 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 2501 if (value != 0 && value != 1) { 2502 err = USBD_IOERROR; 2503 goto ret; 2504 } 2505 sc->sc_conf = value; 2506 break; 2507 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 2508 break; 2509 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 2510 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 2511 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 2512 err = USBD_IOERROR; 2513 goto ret; 2514 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 2515 break; 2516 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 2517 break; 2518 /* Hub requests */ 2519 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2520 break; 2521 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2522 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 2523 "port=%d feature=%d\n", 2524 index, value)); 2525 if (index < 1 || index > sc->sc_noport) { 2526 err = USBD_IOERROR; 2527 goto ret; 2528 } 2529 port = OHCI_RH_PORT_STATUS(index); 2530 switch(value) { 2531 case UHF_PORT_ENABLE: 2532 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2533 break; 2534 case UHF_PORT_SUSPEND: 2535 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2536 break; 2537 case UHF_PORT_POWER: 2538 /* Yes, writing to the LOW_SPEED bit clears power. */ 2539 OWRITE4(sc, port, UPS_LOW_SPEED); 2540 break; 2541 case UHF_C_PORT_CONNECTION: 2542 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2543 break; 2544 case UHF_C_PORT_ENABLE: 2545 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2546 break; 2547 case UHF_C_PORT_SUSPEND: 2548 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2549 break; 2550 case UHF_C_PORT_OVER_CURRENT: 2551 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2552 break; 2553 case UHF_C_PORT_RESET: 2554 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2555 break; 2556 default: 2557 err = USBD_IOERROR; 2558 goto ret; 2559 } 2560 switch(value) { 2561 case UHF_C_PORT_CONNECTION: 2562 case UHF_C_PORT_ENABLE: 2563 case UHF_C_PORT_SUSPEND: 2564 case UHF_C_PORT_OVER_CURRENT: 2565 case UHF_C_PORT_RESET: 2566 /* Enable RHSC interrupt if condition is cleared. */ 2567 if ((OREAD4(sc, port) >> 16) == 0) 2568 ohci_rhsc_enable(sc); 2569 break; 2570 default: 2571 break; 2572 } 2573 break; 2574 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2575 if ((value & 0xff) != 0) { 2576 err = USBD_IOERROR; 2577 goto ret; 2578 } 2579 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2580 hubd = ohci_hubd; 2581 hubd.bNbrPorts = sc->sc_noport; 2582 USETW(hubd.wHubCharacteristics, 2583 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2584 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2585 /* XXX overcurrent */ 2586 ); 2587 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2588 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2589 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2590 hubd.DeviceRemovable[i++] = (u_int8_t)v; 2591 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2592 l = min(len, hubd.bDescLength); 2593 totlen = l; 2594 memcpy(buf, &hubd, l); 2595 break; 2596 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2597 if (len != 4) { 2598 err = USBD_IOERROR; 2599 goto ret; 2600 } 2601 memset(buf, 0, len); /* ? XXX */ 2602 totlen = len; 2603 break; 2604 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2605 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 2606 index)); 2607 if (index < 1 || index > sc->sc_noport) { 2608 err = USBD_IOERROR; 2609 goto ret; 2610 } 2611 if (len != 4) { 2612 err = USBD_IOERROR; 2613 goto ret; 2614 } 2615 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2616 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 2617 v)); 2618 USETW(ps.wPortStatus, v); 2619 USETW(ps.wPortChange, v >> 16); 2620 l = min(len, sizeof ps); 2621 memcpy(buf, &ps, l); 2622 totlen = l; 2623 break; 2624 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2625 err = USBD_IOERROR; 2626 goto ret; 2627 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2628 break; 2629 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2630 if (index < 1 || index > sc->sc_noport) { 2631 err = USBD_IOERROR; 2632 goto ret; 2633 } 2634 port = OHCI_RH_PORT_STATUS(index); 2635 switch(value) { 2636 case UHF_PORT_ENABLE: 2637 OWRITE4(sc, port, UPS_PORT_ENABLED); 2638 break; 2639 case UHF_PORT_SUSPEND: 2640 OWRITE4(sc, port, UPS_SUSPEND); 2641 break; 2642 case UHF_PORT_RESET: 2643 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 2644 index)); 2645 OWRITE4(sc, port, UPS_RESET); 2646 for (i = 0; i < 5; i++) { 2647 usb_delay_ms(&sc->sc_bus, 2648 USB_PORT_ROOT_RESET_DELAY); 2649 if (sc->sc_dying) { 2650 err = USBD_IOERROR; 2651 goto ret; 2652 } 2653 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2654 break; 2655 } 2656 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 2657 index, OREAD4(sc, port))); 2658 break; 2659 case UHF_PORT_POWER: 2660 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 2661 "%d\n", index)); 2662 OWRITE4(sc, port, UPS_PORT_POWER); 2663 break; 2664 default: 2665 err = USBD_IOERROR; 2666 goto ret; 2667 } 2668 break; 2669 default: 2670 err = USBD_IOERROR; 2671 goto ret; 2672 } 2673 xfer->actlen = totlen; 2674 err = USBD_NORMAL_COMPLETION; 2675 ret: 2676 xfer->status = err; 2677 s = splusb(); 2678 usb_transfer_complete(xfer); 2679 splx(s); 2680 return (USBD_IN_PROGRESS); 2681 } 2682 2683 /* Abort a root control request. */ 2684 Static void 2685 ohci_root_ctrl_abort(usbd_xfer_handle xfer) 2686 { 2687 /* Nothing to do, all transfers are synchronous. */ 2688 } 2689 2690 /* Close the root pipe. */ 2691 Static void 2692 ohci_root_ctrl_close(usbd_pipe_handle pipe) 2693 { 2694 DPRINTF(("ohci_root_ctrl_close\n")); 2695 /* Nothing to do. */ 2696 } 2697 2698 Static usbd_status 2699 ohci_root_intr_transfer(usbd_xfer_handle xfer) 2700 { 2701 usbd_status err; 2702 2703 /* Insert last in queue. */ 2704 err = usb_insert_transfer(xfer); 2705 if (err) 2706 return (err); 2707 2708 /* Pipe isn't running, start first */ 2709 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2710 } 2711 2712 Static usbd_status 2713 ohci_root_intr_start(usbd_xfer_handle xfer) 2714 { 2715 usbd_pipe_handle pipe = xfer->pipe; 2716 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2717 2718 if (sc->sc_dying) 2719 return (USBD_IOERROR); 2720 2721 sc->sc_intrxfer = xfer; 2722 2723 return (USBD_IN_PROGRESS); 2724 } 2725 2726 /* Abort a root interrupt request. */ 2727 Static void 2728 ohci_root_intr_abort(usbd_xfer_handle xfer) 2729 { 2730 int s; 2731 2732 if (xfer->pipe->intrxfer == xfer) { 2733 DPRINTF(("ohci_root_intr_abort: remove\n")); 2734 xfer->pipe->intrxfer = NULL; 2735 } 2736 xfer->status = USBD_CANCELLED; 2737 s = splusb(); 2738 usb_transfer_complete(xfer); 2739 splx(s); 2740 } 2741 2742 /* Close the root pipe. */ 2743 Static void 2744 ohci_root_intr_close(usbd_pipe_handle pipe) 2745 { 2746 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2747 2748 DPRINTF(("ohci_root_intr_close\n")); 2749 2750 sc->sc_intrxfer = NULL; 2751 } 2752 2753 /************************/ 2754 2755 Static usbd_status 2756 ohci_device_ctrl_transfer(usbd_xfer_handle xfer) 2757 { 2758 usbd_status err; 2759 2760 /* Insert last in queue. */ 2761 err = usb_insert_transfer(xfer); 2762 if (err) 2763 return (err); 2764 2765 /* Pipe isn't running, start first */ 2766 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2767 } 2768 2769 Static usbd_status 2770 ohci_device_ctrl_start(usbd_xfer_handle xfer) 2771 { 2772 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2773 usbd_status err; 2774 2775 if (sc->sc_dying) 2776 return (USBD_IOERROR); 2777 2778 #ifdef DIAGNOSTIC 2779 if (!(xfer->rqflags & URQ_REQUEST)) { 2780 /* XXX panic */ 2781 printf("ohci_device_ctrl_transfer: not a request\n"); 2782 return (USBD_INVAL); 2783 } 2784 #endif 2785 2786 err = ohci_device_request(xfer); 2787 if (err) 2788 return (err); 2789 2790 if (sc->sc_bus.use_polling) 2791 ohci_waitintr(sc, xfer); 2792 return (USBD_IN_PROGRESS); 2793 } 2794 2795 /* Abort a device control request. */ 2796 Static void 2797 ohci_device_ctrl_abort(usbd_xfer_handle xfer) 2798 { 2799 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer)); 2800 ohci_abort_xfer(xfer, USBD_CANCELLED); 2801 } 2802 2803 /* Close a device control pipe. */ 2804 Static void 2805 ohci_device_ctrl_close(usbd_pipe_handle pipe) 2806 { 2807 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2808 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2809 2810 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe)); 2811 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2812 ohci_free_std(sc, opipe->tail.td); 2813 } 2814 2815 /************************/ 2816 2817 Static void 2818 ohci_device_clear_toggle(usbd_pipe_handle pipe) 2819 { 2820 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2821 2822 opipe->sed->ed.ed_headp &= htole32(~OHCI_TOGGLECARRY); 2823 } 2824 2825 Static void 2826 ohci_noop(usbd_pipe_handle pipe) 2827 { 2828 } 2829 2830 Static usbd_status 2831 ohci_device_bulk_transfer(usbd_xfer_handle xfer) 2832 { 2833 usbd_status err; 2834 2835 /* Insert last in queue. */ 2836 err = usb_insert_transfer(xfer); 2837 if (err) 2838 return (err); 2839 2840 /* Pipe isn't running, start first */ 2841 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2842 } 2843 2844 Static usbd_status 2845 ohci_device_bulk_start(usbd_xfer_handle xfer) 2846 { 2847 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2848 usbd_device_handle dev = opipe->pipe.device; 2849 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2850 int addr = dev->address; 2851 ohci_soft_td_t *data, *tail, *tdp; 2852 ohci_soft_ed_t *sed; 2853 int s, len, isread, endpt; 2854 usbd_status err; 2855 2856 if (sc->sc_dying) 2857 return (USBD_IOERROR); 2858 2859 #ifdef DIAGNOSTIC 2860 if (xfer->rqflags & URQ_REQUEST) { 2861 /* XXX panic */ 2862 printf("ohci_device_bulk_start: a request\n"); 2863 return (USBD_INVAL); 2864 } 2865 #endif 2866 2867 len = xfer->length; 2868 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 2869 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2870 sed = opipe->sed; 2871 2872 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d " 2873 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags, 2874 endpt)); 2875 2876 opipe->u.bulk.isread = isread; 2877 opipe->u.bulk.length = len; 2878 2879 /* Update device address */ 2880 sed->ed.ed_flags = htole32( 2881 (le32toh(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) | 2882 OHCI_ED_SET_FA(addr)); 2883 2884 /* Allocate a chain of new TDs (including a new tail). */ 2885 data = opipe->tail.td; 2886 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 2887 data, &tail); 2888 /* We want interrupt at the end of the transfer. */ 2889 tail->td.td_flags &= htole32(~OHCI_TD_INTR_MASK); 2890 tail->td.td_flags |= htole32(OHCI_TD_SET_DI(1)); 2891 tail->flags |= OHCI_CALL_DONE; 2892 tail = tail->nexttd; /* point at sentinel */ 2893 if (err) 2894 return (err); 2895 2896 tail->xfer = NULL; 2897 xfer->hcpriv = data; 2898 2899 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x " 2900 "td_cbp=0x%08x td_be=0x%08x\n", 2901 (int)le32toh(sed->ed.ed_flags), 2902 (int)le32toh(data->td.td_flags), 2903 (int)le32toh(data->td.td_cbp), 2904 (int)le32toh(data->td.td_be))); 2905 2906 #ifdef OHCI_DEBUG 2907 if (ohcidebug > 5) { 2908 ohci_dump_ed(sed); 2909 ohci_dump_tds(data); 2910 } 2911 #endif 2912 2913 /* Insert ED in schedule */ 2914 s = splusb(); 2915 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 2916 tdp->xfer = xfer; 2917 } 2918 sed->ed.ed_tailp = htole32(tail->physaddr); 2919 opipe->tail.td = tail; 2920 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 2921 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 2922 if (xfer->timeout && !sc->sc_bus.use_polling) { 2923 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2924 ohci_timeout, xfer); 2925 } 2926 2927 #if 0 2928 /* This goes wrong if we are too slow. */ 2929 if (ohcidebug > 10) { 2930 delay(10000); 2931 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2932 OREAD4(sc, OHCI_COMMAND_STATUS))); 2933 ohci_dump_ed(sed); 2934 ohci_dump_tds(data); 2935 } 2936 #endif 2937 2938 splx(s); 2939 2940 return (USBD_IN_PROGRESS); 2941 } 2942 2943 Static void 2944 ohci_device_bulk_abort(usbd_xfer_handle xfer) 2945 { 2946 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer)); 2947 ohci_abort_xfer(xfer, USBD_CANCELLED); 2948 } 2949 2950 /* 2951 * Close a device bulk pipe. 2952 */ 2953 Static void 2954 ohci_device_bulk_close(usbd_pipe_handle pipe) 2955 { 2956 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2957 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2958 2959 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe)); 2960 ohci_close_pipe(pipe, sc->sc_bulk_head); 2961 ohci_free_std(sc, opipe->tail.td); 2962 } 2963 2964 /************************/ 2965 2966 Static usbd_status 2967 ohci_device_intr_transfer(usbd_xfer_handle xfer) 2968 { 2969 usbd_status err; 2970 2971 /* Insert last in queue. */ 2972 err = usb_insert_transfer(xfer); 2973 if (err) 2974 return (err); 2975 2976 /* Pipe isn't running, start first */ 2977 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2978 } 2979 2980 Static usbd_status 2981 ohci_device_intr_start(usbd_xfer_handle xfer) 2982 { 2983 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2984 usbd_device_handle dev = opipe->pipe.device; 2985 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2986 ohci_soft_ed_t *sed = opipe->sed; 2987 ohci_soft_td_t *data, *tail; 2988 int s, len, isread, endpt; 2989 2990 if (sc->sc_dying) 2991 return (USBD_IOERROR); 2992 2993 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d " 2994 "flags=%d priv=%p\n", 2995 xfer, xfer->length, xfer->flags, xfer->priv)); 2996 2997 #ifdef DIAGNOSTIC 2998 if (xfer->rqflags & URQ_REQUEST) 2999 panic("ohci_device_intr_transfer: a request"); 3000 #endif 3001 3002 len = xfer->length; 3003 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 3004 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3005 3006 data = opipe->tail.td; 3007 tail = ohci_alloc_std(sc); 3008 if (tail == NULL) 3009 return (USBD_NOMEM); 3010 tail->xfer = NULL; 3011 3012 data->td.td_flags = htole32( 3013 isread ? OHCI_TD_IN : OHCI_TD_OUT | 3014 OHCI_TD_NOCC | 3015 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 3016 if (xfer->flags & USBD_SHORT_XFER_OK) 3017 data->td.td_flags |= htole32(OHCI_TD_R); 3018 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf, 0)); 3019 data->nexttd = tail; 3020 data->td.td_nexttd = htole32(tail->physaddr); 3021 data->td.td_be = htole32(le32toh(data->td.td_cbp) + len - 1); 3022 data->len = len; 3023 data->xfer = xfer; 3024 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 3025 xfer->hcpriv = data; 3026 3027 #ifdef OHCI_DEBUG 3028 if (ohcidebug > 5) { 3029 DPRINTF(("ohci_device_intr_transfer:\n")); 3030 ohci_dump_ed(sed); 3031 ohci_dump_tds(data); 3032 } 3033 #endif 3034 3035 /* Insert ED in schedule */ 3036 s = splusb(); 3037 sed->ed.ed_tailp = htole32(tail->physaddr); 3038 opipe->tail.td = tail; 3039 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 3040 3041 #if 0 3042 /* 3043 * This goes horribly wrong, printing thousands of descriptors, 3044 * because false references are followed due to the fact that the 3045 * TD is gone. 3046 */ 3047 if (ohcidebug > 5) { 3048 usb_delay_ms(&sc->sc_bus, 5); 3049 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 3050 OREAD4(sc, OHCI_COMMAND_STATUS))); 3051 ohci_dump_ed(sed); 3052 ohci_dump_tds(data); 3053 } 3054 #endif 3055 splx(s); 3056 3057 return (USBD_IN_PROGRESS); 3058 } 3059 3060 /* Abort a device control request. */ 3061 Static void 3062 ohci_device_intr_abort(usbd_xfer_handle xfer) 3063 { 3064 if (xfer->pipe->intrxfer == xfer) { 3065 DPRINTF(("ohci_device_intr_abort: remove\n")); 3066 xfer->pipe->intrxfer = NULL; 3067 } 3068 ohci_abort_xfer(xfer, USBD_CANCELLED); 3069 } 3070 3071 /* Close a device interrupt pipe. */ 3072 Static void 3073 ohci_device_intr_close(usbd_pipe_handle pipe) 3074 { 3075 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3076 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3077 int nslots = opipe->u.intr.nslots; 3078 int pos = opipe->u.intr.pos; 3079 int j; 3080 ohci_soft_ed_t *p, *sed = opipe->sed; 3081 int s; 3082 3083 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 3084 pipe, nslots, pos)); 3085 s = splusb(); 3086 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 3087 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 3088 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) 3089 usb_delay_ms(&sc->sc_bus, 2); 3090 3091 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 3092 ; 3093 #ifdef DIAGNOSTIC 3094 if (p == NULL) 3095 panic("ohci_device_intr_close: ED not found"); 3096 #endif 3097 p->next = sed->next; 3098 p->ed.ed_nexted = sed->ed.ed_nexted; 3099 splx(s); 3100 3101 for (j = 0; j < nslots; j++) 3102 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 3103 3104 ohci_free_std(sc, opipe->tail.td); 3105 ohci_free_sed(sc, opipe->sed); 3106 } 3107 3108 Static usbd_status 3109 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival) 3110 { 3111 int i, j, s, best; 3112 u_int npoll, slow, shigh, nslots; 3113 u_int bestbw, bw; 3114 ohci_soft_ed_t *hsed, *sed = opipe->sed; 3115 3116 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 3117 if (ival == 0) { 3118 printf("ohci_setintr: 0 interval\n"); 3119 return (USBD_INVAL); 3120 } 3121 3122 npoll = OHCI_NO_INTRS; 3123 while (npoll > ival) 3124 npoll /= 2; 3125 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 3126 3127 /* 3128 * We now know which level in the tree the ED must go into. 3129 * Figure out which slot has most bandwidth left over. 3130 * Slots to examine: 3131 * npoll 3132 * 1 0 3133 * 2 1 2 3134 * 4 3 4 5 6 3135 * 8 7 8 9 10 11 12 13 14 3136 * N (N-1) .. (N-1+N-1) 3137 */ 3138 slow = npoll-1; 3139 shigh = slow + npoll; 3140 nslots = OHCI_NO_INTRS / npoll; 3141 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 3142 bw = 0; 3143 for (j = 0; j < nslots; j++) 3144 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 3145 if (bw < bestbw) { 3146 best = i; 3147 bestbw = bw; 3148 } 3149 } 3150 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 3151 best, slow, shigh, bestbw)); 3152 3153 s = splusb(); 3154 hsed = sc->sc_eds[best]; 3155 sed->next = hsed->next; 3156 sed->ed.ed_nexted = hsed->ed.ed_nexted; 3157 hsed->next = sed; 3158 hsed->ed.ed_nexted = htole32(sed->physaddr); 3159 splx(s); 3160 3161 for (j = 0; j < nslots; j++) 3162 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 3163 opipe->u.intr.nslots = nslots; 3164 opipe->u.intr.pos = best; 3165 3166 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 3167 return (USBD_NORMAL_COMPLETION); 3168 } 3169 3170 /***********************/ 3171 3172 usbd_status 3173 ohci_device_isoc_transfer(usbd_xfer_handle xfer) 3174 { 3175 usbd_status err; 3176 3177 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer)); 3178 3179 /* Put it on our queue, */ 3180 err = usb_insert_transfer(xfer); 3181 3182 /* bail out on error, */ 3183 if (err && err != USBD_IN_PROGRESS) 3184 return (err); 3185 3186 /* XXX should check inuse here */ 3187 3188 /* insert into schedule, */ 3189 ohci_device_isoc_enter(xfer); 3190 3191 /* and start if the pipe wasn't running */ 3192 if (!err) 3193 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 3194 3195 return (err); 3196 } 3197 3198 void 3199 ohci_device_isoc_enter(usbd_xfer_handle xfer) 3200 { 3201 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3202 usbd_device_handle dev = opipe->pipe.device; 3203 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 3204 ohci_soft_ed_t *sed = opipe->sed; 3205 struct iso *iso = &opipe->u.iso; 3206 ohci_soft_itd_t *sitd, *nsitd; 3207 ohci_physaddr_t buf, offs, noffs, bp0; 3208 int i, ncur, nframes; 3209 int s; 3210 3211 DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p " 3212 "nframes=%d\n", 3213 iso->inuse, iso->next, xfer, xfer->nframes)); 3214 3215 if (sc->sc_dying) 3216 return; 3217 3218 if (iso->next == -1) { 3219 /* Not in use yet, schedule it a few frames ahead. */ 3220 iso->next = le32toh(sc->sc_hcca->hcca_frame_number) + 5; 3221 DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n", 3222 iso->next)); 3223 } 3224 3225 sitd = opipe->tail.itd; 3226 buf = DMAADDR(&xfer->dmabuf, 0); 3227 bp0 = OHCI_PAGE(buf); 3228 offs = OHCI_PAGE_OFFSET(buf); 3229 nframes = xfer->nframes; 3230 xfer->hcpriv = sitd; 3231 for (i = ncur = 0; i < nframes; i++, ncur++) { 3232 noffs = offs + xfer->frlengths[i]; 3233 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ 3234 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */ 3235 3236 /* Allocate next ITD */ 3237 nsitd = ohci_alloc_sitd(sc); 3238 if (nsitd == NULL) { 3239 /* XXX what now? */ 3240 printf("%s: isoc TD alloc failed\n", 3241 USBDEVNAME(sc->sc_bus.bdev)); 3242 return; 3243 } 3244 3245 /* Fill current ITD */ 3246 sitd->itd.itd_flags = htole32( 3247 OHCI_ITD_NOCC | 3248 OHCI_ITD_SET_SF(iso->next) | 3249 OHCI_ITD_SET_DI(6) | /* delay intr a little */ 3250 OHCI_ITD_SET_FC(ncur)); 3251 sitd->itd.itd_bp0 = htole32(bp0); 3252 sitd->nextitd = nsitd; 3253 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 3254 sitd->itd.itd_be = htole32(bp0 + offs - 1); 3255 sitd->xfer = xfer; 3256 sitd->flags = 0; 3257 3258 sitd = nsitd; 3259 iso->next = iso->next + ncur; 3260 bp0 = OHCI_PAGE(buf + offs); 3261 ncur = 0; 3262 } 3263 sitd->itd.itd_offset[ncur] = htole16(OHCI_ITD_MK_OFFS(offs)); 3264 offs = noffs; 3265 } 3266 nsitd = ohci_alloc_sitd(sc); 3267 if (nsitd == NULL) { 3268 /* XXX what now? */ 3269 printf("%s: isoc TD alloc failed\n", 3270 USBDEVNAME(sc->sc_bus.bdev)); 3271 return; 3272 } 3273 /* Fixup last used ITD */ 3274 sitd->itd.itd_flags = htole32( 3275 OHCI_ITD_NOCC | 3276 OHCI_ITD_SET_SF(iso->next) | 3277 OHCI_ITD_SET_DI(0) | 3278 OHCI_ITD_SET_FC(ncur)); 3279 sitd->itd.itd_bp0 = htole32(bp0); 3280 sitd->nextitd = nsitd; 3281 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 3282 sitd->itd.itd_be = htole32(bp0 + offs - 1); 3283 sitd->xfer = xfer; 3284 sitd->flags = OHCI_CALL_DONE; 3285 3286 iso->next = iso->next + ncur; 3287 iso->inuse += nframes; 3288 3289 xfer->actlen = offs; /* XXX pretend we did it all */ 3290 3291 xfer->status = USBD_IN_PROGRESS; 3292 3293 #ifdef OHCI_DEBUG 3294 if (ohcidebug > 5) { 3295 DPRINTF(("ohci_device_isoc_enter: frame=%d\n", 3296 le32toh(sc->sc_hcca->hcca_frame_number))); 3297 ohci_dump_itds(xfer->hcpriv); 3298 ohci_dump_ed(sed); 3299 } 3300 #endif 3301 3302 s = splusb(); 3303 sed->ed.ed_tailp = htole32(nsitd->physaddr); 3304 opipe->tail.itd = nsitd; 3305 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 3306 splx(s); 3307 3308 #ifdef OHCI_DEBUG 3309 if (ohcidebug > 5) { 3310 delay(150000); 3311 DPRINTF(("ohci_device_isoc_enter: after frame=%d\n", 3312 le32toh(sc->sc_hcca->hcca_frame_number))); 3313 ohci_dump_itds(xfer->hcpriv); 3314 ohci_dump_ed(sed); 3315 } 3316 #endif 3317 } 3318 3319 usbd_status 3320 ohci_device_isoc_start(usbd_xfer_handle xfer) 3321 { 3322 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3323 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3324 3325 DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer)); 3326 3327 if (sc->sc_dying) 3328 return (USBD_IOERROR); 3329 3330 #ifdef DIAGNOSTIC 3331 if (xfer->status != USBD_IN_PROGRESS) 3332 printf("ohci_device_isoc_start: not in progress %p\n", xfer); 3333 #endif 3334 3335 /* XXX anything to do? */ 3336 3337 return (USBD_IN_PROGRESS); 3338 } 3339 3340 void 3341 ohci_device_isoc_abort(usbd_xfer_handle xfer) 3342 { 3343 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3344 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3345 ohci_soft_ed_t *sed; 3346 ohci_soft_itd_t *sitd; 3347 int s; 3348 3349 s = splusb(); 3350 3351 DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer)); 3352 3353 /* Transfer is already done. */ 3354 if (xfer->status != USBD_NOT_STARTED && 3355 xfer->status != USBD_IN_PROGRESS) { 3356 splx(s); 3357 printf("ohci_device_isoc_abort: early return\n"); 3358 return; 3359 } 3360 3361 /* Give xfer the requested abort code. */ 3362 xfer->status = USBD_CANCELLED; 3363 3364 sed = opipe->sed; 3365 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 3366 3367 sitd = xfer->hcpriv; 3368 #ifdef DIAGNOSTIC 3369 if (sitd == NULL) { 3370 splx(s); 3371 printf("ohci_device_isoc_abort: hcpriv==0\n"); 3372 return; 3373 } 3374 #endif 3375 for (; sitd->xfer == xfer; sitd = sitd->nextitd) { 3376 #ifdef DIAGNOSTIC 3377 DPRINTFN(1,("abort sets done sitd=%p\n", sitd)); 3378 sitd->isdone = 1; 3379 #endif 3380 } 3381 3382 splx(s); 3383 3384 usb_delay_ms(&sc->sc_bus, OHCI_ITD_NOFFSET); 3385 3386 s = splusb(); 3387 3388 /* Run callback. */ 3389 usb_transfer_complete(xfer); 3390 3391 sed->ed.ed_headp = htole32(sitd->physaddr); /* unlink TDs */ 3392 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 3393 3394 splx(s); 3395 } 3396 3397 void 3398 ohci_device_isoc_done(usbd_xfer_handle xfer) 3399 { 3400 DPRINTFN(1,("ohci_device_isoc_done: xfer=%p\n", xfer)); 3401 } 3402 3403 usbd_status 3404 ohci_setup_isoc(usbd_pipe_handle pipe) 3405 { 3406 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3407 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3408 struct iso *iso = &opipe->u.iso; 3409 int s; 3410 3411 iso->next = -1; 3412 iso->inuse = 0; 3413 3414 s = splusb(); 3415 ohci_add_ed(opipe->sed, sc->sc_isoc_head); 3416 splx(s); 3417 3418 return (USBD_NORMAL_COMPLETION); 3419 } 3420 3421 void 3422 ohci_device_isoc_close(usbd_pipe_handle pipe) 3423 { 3424 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3425 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3426 3427 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe)); 3428 ohci_close_pipe(pipe, sc->sc_isoc_head); 3429 #ifdef DIAGNOSTIC 3430 opipe->tail.itd->isdone = 1; 3431 #endif 3432 ohci_free_sitd(sc, opipe->tail.itd); 3433 } 3434
Indexes created Thu Sep 25 16:09:42 GMT 2025