ohci.c revision 1.168
1 /* $NetBSD: ohci.c,v 1.168 2005/11/14 13:40:23 augustss Exp $ */ 2 /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */ 3 4 /* 5 * Copyright (c) 1998, 2004, 2005 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Lennart Augustsson (lennart (at) augustsson.net) at 10 * Carlstedt Research & Technology. 11 * This code is derived from software contributed to The NetBSD Foundation 12 * by Charles M. Hannum. 13 * 14 * Redistribution and use in source and binary forms, with or without 15 * modification, are permitted provided that the following conditions 16 * are met: 17 * 1. Redistributions of source code must retain the above copyright 18 * notice, this list of conditions and the following disclaimer. 19 * 2. Redistributions in binary form must reproduce the above copyright 20 * notice, this list of conditions and the following disclaimer in the 21 * documentation and/or other materials provided with the distribution. 22 * 3. All advertising materials mentioning features or use of this software 23 * must display the following acknowledgement: 24 * This product includes software developed by the NetBSD 25 * Foundation, Inc. and its contributors. 26 * 4. Neither the name of The NetBSD Foundation nor the names of its 27 * contributors may be used to endorse or promote products derived 28 * from this software without specific prior written permission. 29 * 30 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 31 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 32 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 33 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 34 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 35 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 36 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 37 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 38 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 39 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 40 * POSSIBILITY OF SUCH DAMAGE. 41 */ 42 43 /* 44 * USB Open Host Controller driver. 45 * 46 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html 47 * USB spec: http://www.usb.org/developers/docs/usbspec.zip 48 */ 49 50 #include <sys/cdefs.h> 51 __KERNEL_RCSID(0, "$NetBSD: ohci.c,v 1.168 2005/11/14 13:40:23 augustss Exp $"); 52 53 #include <sys/param.h> 54 #include <sys/systm.h> 55 #include <sys/malloc.h> 56 #if defined(__NetBSD__) || defined(__OpenBSD__) 57 #include <sys/kernel.h> 58 #include <sys/device.h> 59 #include <sys/select.h> 60 #include <uvm/uvm_extern.h> 61 #elif defined(__FreeBSD__) 62 #include <sys/module.h> 63 #include <sys/bus.h> 64 #include <machine/bus_pio.h> 65 #include <machine/bus_memio.h> 66 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 67 #include <machine/cpu.h> 68 #endif 69 #endif 70 #include <sys/proc.h> 71 #include <sys/queue.h> 72 73 #include <machine/bus.h> 74 #include <machine/endian.h> 75 76 #include <dev/usb/usb.h> 77 #include <dev/usb/usbdi.h> 78 #include <dev/usb/usbdivar.h> 79 #include <dev/usb/usb_mem.h> 80 #include <dev/usb/usb_quirks.h> 81 82 #include <dev/usb/ohcireg.h> 83 #include <dev/usb/ohcivar.h> 84 85 #if defined(__FreeBSD__) 86 #include <machine/clock.h> 87 88 #define delay(d) DELAY(d) 89 #endif 90 91 #if defined(__OpenBSD__) 92 struct cfdriver ohci_cd = { 93 NULL, "ohci", DV_DULL 94 }; 95 #endif 96 97 #ifdef OHCI_DEBUG 98 #define DPRINTF(x) if (ohcidebug) logprintf x 99 #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x 100 int ohcidebug = 0; 101 #ifndef __NetBSD__ 102 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 103 #endif 104 #else 105 #define DPRINTF(x) 106 #define DPRINTFN(n,x) 107 #endif 108 109 /* 110 * The OHCI controller is little endian, so on big endian machines 111 * the data stored in memory needs to be swapped. 112 */ 113 #if defined(__FreeBSD__) || defined(__OpenBSD__) 114 #if BYTE_ORDER == BIG_ENDIAN 115 #define htole32(x) (bswap32(x)) 116 #define le32toh(x) (bswap32(x)) 117 #else 118 #define htole32(x) (x) 119 #define le32toh(x) (x) 120 #endif 121 #endif 122 123 /* 124 * Well, the above comment isn't quite right. On some machines the OHCI 125 * controller may have different endianness, and on those machines we may 126 * need to support multiple OHCI controllers with different endiannesses. 127 * So this adds run-time support for that. 128 */ 129 #ifdef OHCI_DYNAMIC_ENDIAN 130 Static uint32_t ohci_dev32toh(ohci_softc_t *sc, uint32_t); 131 Static uint32_t ohci_htodev32(ohci_softc_t *sc, uint32_t); 132 Static __inline uint16_t ohci_dev16toh(ohci_softc_t *sc, uint16_t); 133 Static __inline uint16_t ohci_htodev16(ohci_softc_t *sc, uint16_t); 134 #define O32TOH(val) ohci_dev32toh(sc, val) 135 #define HTOO32(val) ohci_htodev32(sc, val) 136 #define O16TOH(val) ohci_dev16toh(sc, val) 137 #define HTOO16(val) ohci_htodev16(sc, val) 138 #else 139 #define O32TOH(val) le32toh(val) 140 #define HTOO32(val) htole32(val) 141 #define O16TOH(val) le16toh(val) 142 #define HTOO16(val) htole16(val) 143 #endif 144 145 struct ohci_pipe; 146 147 Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *); 148 Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *); 149 150 Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *); 151 Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *); 152 153 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *); 154 Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *); 155 156 #if 0 157 Static void ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *, 158 ohci_soft_td_t *); 159 #endif 160 Static usbd_status ohci_alloc_std_chain(struct ohci_pipe *, 161 ohci_softc_t *, int, int, usbd_xfer_handle, 162 ohci_soft_td_t *, ohci_soft_td_t **); 163 164 Static void ohci_shutdown(void *v); 165 Static void ohci_power(int, void *); 166 Static usbd_status ohci_open(usbd_pipe_handle); 167 Static void ohci_poll(struct usbd_bus *); 168 Static void ohci_softintr(void *); 169 Static void ohci_waitintr(ohci_softc_t *, usbd_xfer_handle); 170 Static void ohci_rhsc(ohci_softc_t *, usbd_xfer_handle); 171 172 Static usbd_status ohci_device_request(usbd_xfer_handle xfer); 173 Static void ohci_add_ed(ohci_softc_t *, ohci_soft_ed_t *, 174 ohci_soft_ed_t *); 175 176 Static void ohci_rem_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 177 Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *); 178 Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *); 179 Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t); 180 Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *); 181 Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *); 182 Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t); 183 184 Static usbd_status ohci_setup_isoc(usbd_pipe_handle pipe); 185 Static void ohci_device_isoc_enter(usbd_xfer_handle); 186 187 Static usbd_status ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 188 Static void ohci_freem(struct usbd_bus *, usb_dma_t *); 189 190 Static usbd_xfer_handle ohci_allocx(struct usbd_bus *); 191 Static void ohci_freex(struct usbd_bus *, usbd_xfer_handle); 192 193 Static usbd_status ohci_root_ctrl_transfer(usbd_xfer_handle); 194 Static usbd_status ohci_root_ctrl_start(usbd_xfer_handle); 195 Static void ohci_root_ctrl_abort(usbd_xfer_handle); 196 Static void ohci_root_ctrl_close(usbd_pipe_handle); 197 Static void ohci_root_ctrl_done(usbd_xfer_handle); 198 199 Static usbd_status ohci_root_intr_transfer(usbd_xfer_handle); 200 Static usbd_status ohci_root_intr_start(usbd_xfer_handle); 201 Static void ohci_root_intr_abort(usbd_xfer_handle); 202 Static void ohci_root_intr_close(usbd_pipe_handle); 203 Static void ohci_root_intr_done(usbd_xfer_handle); 204 205 Static usbd_status ohci_device_ctrl_transfer(usbd_xfer_handle); 206 Static usbd_status ohci_device_ctrl_start(usbd_xfer_handle); 207 Static void ohci_device_ctrl_abort(usbd_xfer_handle); 208 Static void ohci_device_ctrl_close(usbd_pipe_handle); 209 Static void ohci_device_ctrl_done(usbd_xfer_handle); 210 211 Static usbd_status ohci_device_bulk_transfer(usbd_xfer_handle); 212 Static usbd_status ohci_device_bulk_start(usbd_xfer_handle); 213 Static void ohci_device_bulk_abort(usbd_xfer_handle); 214 Static void ohci_device_bulk_close(usbd_pipe_handle); 215 Static void ohci_device_bulk_done(usbd_xfer_handle); 216 217 Static usbd_status ohci_device_intr_transfer(usbd_xfer_handle); 218 Static usbd_status ohci_device_intr_start(usbd_xfer_handle); 219 Static void ohci_device_intr_abort(usbd_xfer_handle); 220 Static void ohci_device_intr_close(usbd_pipe_handle); 221 Static void ohci_device_intr_done(usbd_xfer_handle); 222 223 Static usbd_status ohci_device_isoc_transfer(usbd_xfer_handle); 224 Static usbd_status ohci_device_isoc_start(usbd_xfer_handle); 225 Static void ohci_device_isoc_abort(usbd_xfer_handle); 226 Static void ohci_device_isoc_close(usbd_pipe_handle); 227 Static void ohci_device_isoc_done(usbd_xfer_handle); 228 229 Static usbd_status ohci_device_setintr(ohci_softc_t *sc, 230 struct ohci_pipe *pipe, int ival); 231 232 Static int ohci_str(usb_string_descriptor_t *, int, const char *); 233 234 Static void ohci_timeout(void *); 235 Static void ohci_timeout_task(void *); 236 Static void ohci_rhsc_enable(void *); 237 238 Static void ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *); 239 Static void ohci_abort_xfer(usbd_xfer_handle, usbd_status); 240 241 Static void ohci_device_clear_toggle(usbd_pipe_handle pipe); 242 Static void ohci_noop(usbd_pipe_handle pipe); 243 244 #ifdef OHCI_DEBUG 245 Static void ohci_dumpregs(ohci_softc_t *); 246 Static void ohci_dump_tds(ohci_softc_t *, ohci_soft_td_t *); 247 Static void ohci_dump_td(ohci_softc_t *, ohci_soft_td_t *); 248 Static void ohci_dump_ed(ohci_softc_t *, ohci_soft_ed_t *); 249 Static void ohci_dump_itd(ohci_softc_t *, ohci_soft_itd_t *); 250 Static void ohci_dump_itds(ohci_softc_t *, ohci_soft_itd_t *); 251 #endif 252 253 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 254 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 255 #define OWRITE1(sc, r, x) \ 256 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 257 #define OWRITE2(sc, r, x) \ 258 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 259 #define OWRITE4(sc, r, x) \ 260 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 261 #define OREAD1(sc, r) (OBARR(sc), bus_space_read_1((sc)->iot, (sc)->ioh, (r))) 262 #define OREAD2(sc, r) (OBARR(sc), bus_space_read_2((sc)->iot, (sc)->ioh, (r))) 263 #define OREAD4(sc, r) (OBARR(sc), bus_space_read_4((sc)->iot, (sc)->ioh, (r))) 264 265 /* Reverse the bits in a value 0 .. 31 */ 266 Static u_int8_t revbits[OHCI_NO_INTRS] = 267 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 268 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 269 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 270 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 271 272 struct ohci_pipe { 273 struct usbd_pipe pipe; 274 ohci_soft_ed_t *sed; 275 union { 276 ohci_soft_td_t *td; 277 ohci_soft_itd_t *itd; 278 } tail; 279 /* Info needed for different pipe kinds. */ 280 union { 281 /* Control pipe */ 282 struct { 283 usb_dma_t reqdma; 284 u_int length; 285 ohci_soft_td_t *setup, *data, *stat; 286 } ctl; 287 /* Interrupt pipe */ 288 struct { 289 int nslots; 290 int pos; 291 } intr; 292 /* Bulk pipe */ 293 struct { 294 u_int length; 295 int isread; 296 } bulk; 297 /* Iso pipe */ 298 struct iso { 299 int next, inuse; 300 } iso; 301 } u; 302 }; 303 304 #define OHCI_INTR_ENDPT 1 305 306 Static struct usbd_bus_methods ohci_bus_methods = { 307 ohci_open, 308 ohci_softintr, 309 ohci_poll, 310 ohci_allocm, 311 ohci_freem, 312 ohci_allocx, 313 ohci_freex, 314 }; 315 316 Static struct usbd_pipe_methods ohci_root_ctrl_methods = { 317 ohci_root_ctrl_transfer, 318 ohci_root_ctrl_start, 319 ohci_root_ctrl_abort, 320 ohci_root_ctrl_close, 321 ohci_noop, 322 ohci_root_ctrl_done, 323 }; 324 325 Static struct usbd_pipe_methods ohci_root_intr_methods = { 326 ohci_root_intr_transfer, 327 ohci_root_intr_start, 328 ohci_root_intr_abort, 329 ohci_root_intr_close, 330 ohci_noop, 331 ohci_root_intr_done, 332 }; 333 334 Static struct usbd_pipe_methods ohci_device_ctrl_methods = { 335 ohci_device_ctrl_transfer, 336 ohci_device_ctrl_start, 337 ohci_device_ctrl_abort, 338 ohci_device_ctrl_close, 339 ohci_noop, 340 ohci_device_ctrl_done, 341 }; 342 343 Static struct usbd_pipe_methods ohci_device_intr_methods = { 344 ohci_device_intr_transfer, 345 ohci_device_intr_start, 346 ohci_device_intr_abort, 347 ohci_device_intr_close, 348 ohci_device_clear_toggle, 349 ohci_device_intr_done, 350 }; 351 352 Static struct usbd_pipe_methods ohci_device_bulk_methods = { 353 ohci_device_bulk_transfer, 354 ohci_device_bulk_start, 355 ohci_device_bulk_abort, 356 ohci_device_bulk_close, 357 ohci_device_clear_toggle, 358 ohci_device_bulk_done, 359 }; 360 361 Static struct usbd_pipe_methods ohci_device_isoc_methods = { 362 ohci_device_isoc_transfer, 363 ohci_device_isoc_start, 364 ohci_device_isoc_abort, 365 ohci_device_isoc_close, 366 ohci_noop, 367 ohci_device_isoc_done, 368 }; 369 370 #if defined(__NetBSD__) || defined(__OpenBSD__) 371 int 372 ohci_activate(device_ptr_t self, enum devact act) 373 { 374 struct ohci_softc *sc = (struct ohci_softc *)self; 375 int rv = 0; 376 377 switch (act) { 378 case DVACT_ACTIVATE: 379 return (EOPNOTSUPP); 380 381 case DVACT_DEACTIVATE: 382 if (sc->sc_child != NULL) 383 rv = config_deactivate(sc->sc_child); 384 sc->sc_dying = 1; 385 break; 386 } 387 return (rv); 388 } 389 390 int 391 ohci_detach(struct ohci_softc *sc, int flags) 392 { 393 int rv = 0; 394 395 if (sc->sc_child != NULL) 396 rv = config_detach(sc->sc_child, flags); 397 398 if (rv != 0) 399 return (rv); 400 401 usb_uncallout(sc->sc_tmo_rhsc, ohci_rhsc_enable, sc); 402 403 #if defined(__NetBSD__) || defined(__OpenBSD__) 404 powerhook_disestablish(sc->sc_powerhook); 405 shutdownhook_disestablish(sc->sc_shutdownhook); 406 #endif 407 408 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 409 410 /* free data structures XXX */ 411 412 return (rv); 413 } 414 #endif 415 416 ohci_soft_ed_t * 417 ohci_alloc_sed(ohci_softc_t *sc) 418 { 419 ohci_soft_ed_t *sed; 420 usbd_status err; 421 int i, offs; 422 usb_dma_t dma; 423 424 if (sc->sc_freeeds == NULL) { 425 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 426 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 427 OHCI_ED_ALIGN, &dma); 428 if (err) 429 return (0); 430 for(i = 0; i < OHCI_SED_CHUNK; i++) { 431 offs = i * OHCI_SED_SIZE; 432 sed = KERNADDR(&dma, offs); 433 sed->physaddr = DMAADDR(&dma, offs); 434 sed->next = sc->sc_freeeds; 435 sc->sc_freeeds = sed; 436 } 437 } 438 sed = sc->sc_freeeds; 439 sc->sc_freeeds = sed->next; 440 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 441 sed->next = 0; 442 return (sed); 443 } 444 445 void 446 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 447 { 448 sed->next = sc->sc_freeeds; 449 sc->sc_freeeds = sed; 450 } 451 452 ohci_soft_td_t * 453 ohci_alloc_std(ohci_softc_t *sc) 454 { 455 ohci_soft_td_t *std; 456 usbd_status err; 457 int i, offs; 458 usb_dma_t dma; 459 int s; 460 461 if (sc->sc_freetds == NULL) { 462 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 463 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 464 OHCI_TD_ALIGN, &dma); 465 if (err) 466 return (NULL); 467 s = splusb(); 468 for(i = 0; i < OHCI_STD_CHUNK; i++) { 469 offs = i * OHCI_STD_SIZE; 470 std = KERNADDR(&dma, offs); 471 std->physaddr = DMAADDR(&dma, offs); 472 std->nexttd = sc->sc_freetds; 473 sc->sc_freetds = std; 474 } 475 splx(s); 476 } 477 478 s = splusb(); 479 std = sc->sc_freetds; 480 sc->sc_freetds = std->nexttd; 481 memset(&std->td, 0, sizeof(ohci_td_t)); 482 std->nexttd = NULL; 483 std->xfer = NULL; 484 ohci_hash_add_td(sc, std); 485 splx(s); 486 487 return (std); 488 } 489 490 void 491 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std) 492 { 493 int s; 494 495 s = splusb(); 496 ohci_hash_rem_td(sc, std); 497 std->nexttd = sc->sc_freetds; 498 sc->sc_freetds = std; 499 splx(s); 500 } 501 502 usbd_status 503 ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc, 504 int alen, int rd, usbd_xfer_handle xfer, 505 ohci_soft_td_t *sp, ohci_soft_td_t **ep) 506 { 507 ohci_soft_td_t *next, *cur; 508 ohci_physaddr_t dataphys, dataphysend; 509 u_int32_t tdflags; 510 int len, curlen; 511 usb_dma_t *dma = &xfer->dmabuf; 512 u_int16_t flags = xfer->flags; 513 514 DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen)); 515 516 len = alen; 517 cur = sp; 518 dataphys = DMAADDR(dma, 0); 519 dataphysend = OHCI_PAGE(dataphys + len - 1); 520 tdflags = HTOO32( 521 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 522 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) | 523 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR); 524 525 for (;;) { 526 next = ohci_alloc_std(sc); 527 if (next == NULL) 528 goto nomem; 529 530 /* The OHCI hardware can handle at most one page crossing. */ 531 if (OHCI_PAGE(dataphys) == dataphysend || 532 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) { 533 /* we can handle it in this TD */ 534 curlen = len; 535 } else { 536 /* must use multiple TDs, fill as much as possible. */ 537 curlen = 2 * OHCI_PAGE_SIZE - 538 (dataphys & (OHCI_PAGE_SIZE-1)); 539 /* the length must be a multiple of the max size */ 540 curlen -= curlen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize); 541 #ifdef DIAGNOSTIC 542 if (curlen == 0) 543 panic("ohci_alloc_std: curlen == 0"); 544 #endif 545 } 546 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x " 547 "dataphysend=0x%08x len=%d curlen=%d\n", 548 dataphys, dataphysend, 549 len, curlen)); 550 len -= curlen; 551 552 cur->td.td_flags = tdflags; 553 cur->td.td_cbp = HTOO32(dataphys); 554 cur->nexttd = next; 555 cur->td.td_nexttd = HTOO32(next->physaddr); 556 cur->td.td_be = HTOO32(dataphys + curlen - 1); 557 cur->len = curlen; 558 cur->flags = OHCI_ADD_LEN; 559 cur->xfer = xfer; 560 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n", 561 dataphys, dataphys + curlen - 1)); 562 if (len == 0) 563 break; 564 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n")); 565 dataphys += curlen; 566 cur = next; 567 } 568 if (!rd && (flags & USBD_FORCE_SHORT_XFER) && 569 alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) { 570 /* Force a 0 length transfer at the end. */ 571 572 cur = next; 573 next = ohci_alloc_std(sc); 574 if (next == NULL) 575 goto nomem; 576 577 cur->td.td_flags = tdflags; 578 cur->td.td_cbp = 0; /* indicate 0 length packet */ 579 cur->nexttd = next; 580 cur->td.td_nexttd = HTOO32(next->physaddr); 581 cur->td.td_be = ~0; 582 cur->len = 0; 583 cur->flags = 0; 584 cur->xfer = xfer; 585 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n")); 586 } 587 *ep = cur; 588 589 return (USBD_NORMAL_COMPLETION); 590 591 nomem: 592 /* XXX free chain */ 593 return (USBD_NOMEM); 594 } 595 596 #if 0 597 Static void 598 ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std, 599 ohci_soft_td_t *stdend) 600 { 601 ohci_soft_td_t *p; 602 603 for (; std != stdend; std = p) { 604 p = std->nexttd; 605 ohci_free_std(sc, std); 606 } 607 } 608 #endif 609 610 ohci_soft_itd_t * 611 ohci_alloc_sitd(ohci_softc_t *sc) 612 { 613 ohci_soft_itd_t *sitd; 614 usbd_status err; 615 int i, s, offs; 616 usb_dma_t dma; 617 618 if (sc->sc_freeitds == NULL) { 619 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n")); 620 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK, 621 OHCI_ITD_ALIGN, &dma); 622 if (err) 623 return (NULL); 624 s = splusb(); 625 for(i = 0; i < OHCI_SITD_CHUNK; i++) { 626 offs = i * OHCI_SITD_SIZE; 627 sitd = KERNADDR(&dma, offs); 628 sitd->physaddr = DMAADDR(&dma, offs); 629 sitd->nextitd = sc->sc_freeitds; 630 sc->sc_freeitds = sitd; 631 } 632 splx(s); 633 } 634 635 s = splusb(); 636 sitd = sc->sc_freeitds; 637 sc->sc_freeitds = sitd->nextitd; 638 memset(&sitd->itd, 0, sizeof(ohci_itd_t)); 639 sitd->nextitd = NULL; 640 sitd->xfer = NULL; 641 ohci_hash_add_itd(sc, sitd); 642 splx(s); 643 644 #ifdef DIAGNOSTIC 645 sitd->isdone = 0; 646 #endif 647 648 return (sitd); 649 } 650 651 void 652 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 653 { 654 int s; 655 656 DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd)); 657 658 #ifdef DIAGNOSTIC 659 if (!sitd->isdone) { 660 panic("ohci_free_sitd: sitd=%p not done", sitd); 661 return; 662 } 663 /* Warn double free */ 664 sitd->isdone = 0; 665 #endif 666 667 s = splusb(); 668 ohci_hash_rem_itd(sc, sitd); 669 sitd->nextitd = sc->sc_freeitds; 670 sc->sc_freeitds = sitd; 671 splx(s); 672 } 673 674 usbd_status 675 ohci_init(ohci_softc_t *sc) 676 { 677 ohci_soft_ed_t *sed, *psed; 678 usbd_status err; 679 int i; 680 u_int32_t s, ctl, rwc, ival, hcr, fm, per, rev, desca, descb; 681 682 DPRINTF(("ohci_init: start\n")); 683 #if defined(__OpenBSD__) 684 printf(","); 685 #else 686 printf("%s:", USBDEVNAME(sc->sc_bus.bdev)); 687 #endif 688 rev = OREAD4(sc, OHCI_REVISION); 689 printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev), 690 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 691 692 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 693 printf("%s: unsupported OHCI revision\n", 694 USBDEVNAME(sc->sc_bus.bdev)); 695 sc->sc_bus.usbrev = USBREV_UNKNOWN; 696 return (USBD_INVAL); 697 } 698 sc->sc_bus.usbrev = USBREV_1_0; 699 700 for (i = 0; i < OHCI_HASH_SIZE; i++) 701 LIST_INIT(&sc->sc_hash_tds[i]); 702 for (i = 0; i < OHCI_HASH_SIZE; i++) 703 LIST_INIT(&sc->sc_hash_itds[i]); 704 705 SIMPLEQ_INIT(&sc->sc_free_xfers); 706 707 #ifdef __NetBSD__ 708 usb_setup_reserve(sc, &sc->sc_dma_reserve, sc->sc_bus.dmatag, 709 USB_MEM_RESERVE); 710 #endif 711 712 /* XXX determine alignment by R/W */ 713 /* Allocate the HCCA area. */ 714 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 715 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 716 if (err) 717 return (err); 718 sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0); 719 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 720 721 sc->sc_eintrs = OHCI_NORMAL_INTRS; 722 723 /* Allocate dummy ED that starts the control list. */ 724 sc->sc_ctrl_head = ohci_alloc_sed(sc); 725 if (sc->sc_ctrl_head == NULL) { 726 err = USBD_NOMEM; 727 goto bad1; 728 } 729 sc->sc_ctrl_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 730 731 /* Allocate dummy ED that starts the bulk list. */ 732 sc->sc_bulk_head = ohci_alloc_sed(sc); 733 if (sc->sc_bulk_head == NULL) { 734 err = USBD_NOMEM; 735 goto bad2; 736 } 737 sc->sc_bulk_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 738 739 /* Allocate dummy ED that starts the isochronous list. */ 740 sc->sc_isoc_head = ohci_alloc_sed(sc); 741 if (sc->sc_isoc_head == NULL) { 742 err = USBD_NOMEM; 743 goto bad3; 744 } 745 sc->sc_isoc_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 746 747 /* Allocate all the dummy EDs that make up the interrupt tree. */ 748 for (i = 0; i < OHCI_NO_EDS; i++) { 749 sed = ohci_alloc_sed(sc); 750 if (sed == NULL) { 751 while (--i >= 0) 752 ohci_free_sed(sc, sc->sc_eds[i]); 753 err = USBD_NOMEM; 754 goto bad4; 755 } 756 /* All ED fields are set to 0. */ 757 sc->sc_eds[i] = sed; 758 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 759 if (i != 0) 760 psed = sc->sc_eds[(i-1) / 2]; 761 else 762 psed= sc->sc_isoc_head; 763 sed->next = psed; 764 sed->ed.ed_nexted = HTOO32(psed->physaddr); 765 } 766 /* 767 * Fill HCCA interrupt table. The bit reversal is to get 768 * the tree set up properly to spread the interrupts. 769 */ 770 for (i = 0; i < OHCI_NO_INTRS; i++) 771 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 772 HTOO32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 773 774 #ifdef OHCI_DEBUG 775 if (ohcidebug > 15) { 776 for (i = 0; i < OHCI_NO_EDS; i++) { 777 printf("ed#%d ", i); 778 ohci_dump_ed(sc, sc->sc_eds[i]); 779 } 780 printf("iso "); 781 ohci_dump_ed(sc, sc->sc_isoc_head); 782 } 783 #endif 784 785 /* Preserve values programmed by SMM/BIOS but lost over reset. */ 786 ctl = OREAD4(sc, OHCI_CONTROL); 787 rwc = ctl & OHCI_RWC; 788 fm = OREAD4(sc, OHCI_FM_INTERVAL); 789 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 790 descb = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 791 792 /* Determine in what context we are running. */ 793 if (ctl & OHCI_IR) { 794 /* SMM active, request change */ 795 DPRINTF(("ohci_init: SMM active, request owner change\n")); 796 if ((sc->sc_intre & (OHCI_OC | OHCI_MIE)) == 797 (OHCI_OC | OHCI_MIE)) 798 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_MIE); 799 s = OREAD4(sc, OHCI_COMMAND_STATUS); 800 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 801 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 802 usb_delay_ms(&sc->sc_bus, 1); 803 ctl = OREAD4(sc, OHCI_CONTROL); 804 } 805 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_MIE); 806 if ((ctl & OHCI_IR) == 0) { 807 printf("%s: SMM does not respond, resetting\n", 808 USBDEVNAME(sc->sc_bus.bdev)); 809 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 810 goto reset; 811 } 812 #if 0 813 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */ 814 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 815 /* BIOS started controller. */ 816 DPRINTF(("ohci_init: BIOS active\n")); 817 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 818 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL | rwc); 819 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 820 } 821 #endif 822 } else { 823 DPRINTF(("ohci_init: cold started\n")); 824 reset: 825 /* Controller was cold started. */ 826 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 827 } 828 829 /* 830 * This reset should not be necessary according to the OHCI spec, but 831 * without it some controllers do not start. 832 */ 833 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 834 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 835 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 836 837 /* We now own the host controller and the bus has been reset. */ 838 839 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 840 /* Nominal time for a reset is 10 us. */ 841 for (i = 0; i < 10; i++) { 842 delay(10); 843 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 844 if (!hcr) 845 break; 846 } 847 if (hcr) { 848 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 849 err = USBD_IOERROR; 850 goto bad5; 851 } 852 #ifdef OHCI_DEBUG 853 if (ohcidebug > 15) 854 ohci_dumpregs(sc); 855 #endif 856 857 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 858 859 /* Set up HC registers. */ 860 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 861 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 862 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 863 /* disable all interrupts and then switch on all desired interrupts */ 864 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 865 /* switch on desired functional features */ 866 ctl = OREAD4(sc, OHCI_CONTROL); 867 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 868 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 869 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL | rwc; 870 /* And finally start it! */ 871 OWRITE4(sc, OHCI_CONTROL, ctl); 872 873 /* 874 * The controller is now OPERATIONAL. Set a some final 875 * registers that should be set earlier, but that the 876 * controller ignores when in the SUSPEND state. 877 */ 878 ival = OHCI_GET_IVAL(fm); 879 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 880 fm |= OHCI_FSMPS(ival) | ival; 881 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 882 per = OHCI_PERIODIC(ival); /* 90% periodic */ 883 OWRITE4(sc, OHCI_PERIODIC_START, per); 884 885 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */ 886 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP); 887 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 888 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY); 889 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca); 890 891 /* 892 * The AMD756 requires a delay before re-reading the register, 893 * otherwise it will occasionally report 0 ports. 894 */ 895 sc->sc_noport = 0; 896 for (i = 0; i < 10 && sc->sc_noport == 0; i++) { 897 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY); 898 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 899 } 900 901 #ifdef OHCI_DEBUG 902 if (ohcidebug > 5) 903 ohci_dumpregs(sc); 904 #endif 905 906 /* Set up the bus struct. */ 907 sc->sc_bus.methods = &ohci_bus_methods; 908 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 909 910 #if defined(__NetBSD__) || defined(__OpenBSD__) 911 sc->sc_control = sc->sc_intre = 0; 912 sc->sc_powerhook = powerhook_establish(ohci_power, sc); 913 sc->sc_shutdownhook = shutdownhook_establish(ohci_shutdown, sc); 914 #endif 915 916 usb_callout_init(sc->sc_tmo_rhsc); 917 918 /* Finally, turn on interrupts. */ 919 DPRINTFN(1,("ohci_init: enabling\n")); 920 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 921 922 return (USBD_NORMAL_COMPLETION); 923 924 bad5: 925 for (i = 0; i < OHCI_NO_EDS; i++) 926 ohci_free_sed(sc, sc->sc_eds[i]); 927 bad4: 928 ohci_free_sed(sc, sc->sc_isoc_head); 929 bad3: 930 ohci_free_sed(sc, sc->sc_bulk_head); 931 bad2: 932 ohci_free_sed(sc, sc->sc_ctrl_head); 933 bad1: 934 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 935 return (err); 936 } 937 938 usbd_status 939 ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 940 { 941 #if defined(__NetBSD__) || defined(__OpenBSD__) 942 struct ohci_softc *sc = (struct ohci_softc *)bus; 943 #endif 944 usbd_status status; 945 946 status = usb_allocmem(&sc->sc_bus, size, 0, dma); 947 #ifdef __NetBSD__ 948 if (status == USBD_NOMEM) 949 status = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size); 950 #endif 951 return status; 952 } 953 954 void 955 ohci_freem(struct usbd_bus *bus, usb_dma_t *dma) 956 { 957 #if defined(__NetBSD__) || defined(__OpenBSD__) 958 struct ohci_softc *sc = (struct ohci_softc *)bus; 959 #endif 960 #ifdef __NetBSD__ 961 if (dma->block->flags & USB_DMA_RESERVE) { 962 usb_reserve_freem(&((struct ohci_softc *)bus)->sc_dma_reserve, 963 dma); 964 return; 965 } 966 #endif 967 usb_freemem(&sc->sc_bus, dma); 968 } 969 970 usbd_xfer_handle 971 ohci_allocx(struct usbd_bus *bus) 972 { 973 struct ohci_softc *sc = (struct ohci_softc *)bus; 974 usbd_xfer_handle xfer; 975 976 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 977 if (xfer != NULL) { 978 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 979 #ifdef DIAGNOSTIC 980 if (xfer->busy_free != XFER_FREE) { 981 printf("ohci_allocx: xfer=%p not free, 0x%08x\n", xfer, 982 xfer->busy_free); 983 } 984 #endif 985 } else { 986 xfer = malloc(sizeof(struct ohci_xfer), M_USB, M_NOWAIT); 987 } 988 if (xfer != NULL) { 989 memset(xfer, 0, sizeof (struct ohci_xfer)); 990 #ifdef DIAGNOSTIC 991 xfer->busy_free = XFER_BUSY; 992 #endif 993 } 994 return (xfer); 995 } 996 997 void 998 ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 999 { 1000 struct ohci_softc *sc = (struct ohci_softc *)bus; 1001 1002 #ifdef DIAGNOSTIC 1003 if (xfer->busy_free != XFER_BUSY) { 1004 printf("ohci_freex: xfer=%p not busy, 0x%08x\n", xfer, 1005 xfer->busy_free); 1006 return; 1007 } 1008 xfer->busy_free = XFER_FREE; 1009 #endif 1010 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 1011 } 1012 1013 /* 1014 * Shut down the controller when the system is going down. 1015 */ 1016 void 1017 ohci_shutdown(void *v) 1018 { 1019 ohci_softc_t *sc = v; 1020 1021 DPRINTF(("ohci_shutdown: stopping the HC\n")); 1022 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1023 } 1024 1025 /* 1026 * Handle suspend/resume. 1027 * 1028 * We need to switch to polling mode here, because this routine is 1029 * called from an interupt context. This is all right since we 1030 * are almost suspended anyway. 1031 */ 1032 void 1033 ohci_power(int why, void *v) 1034 { 1035 ohci_softc_t *sc = v; 1036 u_int32_t ctl; 1037 int s; 1038 1039 #ifdef OHCI_DEBUG 1040 DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why)); 1041 ohci_dumpregs(sc); 1042 #endif 1043 1044 s = splhardusb(); 1045 switch (why) { 1046 case PWR_SUSPEND: 1047 case PWR_STANDBY: 1048 sc->sc_bus.use_polling++; 1049 ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK; 1050 if (sc->sc_control == 0) { 1051 /* 1052 * Preserve register values, in case that APM BIOS 1053 * does not recover them. 1054 */ 1055 sc->sc_control = ctl; 1056 sc->sc_intre = OREAD4(sc, OHCI_INTERRUPT_ENABLE); 1057 } 1058 ctl |= OHCI_HCFS_SUSPEND; 1059 OWRITE4(sc, OHCI_CONTROL, ctl); 1060 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1061 sc->sc_bus.use_polling--; 1062 break; 1063 case PWR_RESUME: 1064 sc->sc_bus.use_polling++; 1065 /* Some broken BIOSes do not recover these values */ 1066 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 1067 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 1068 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 1069 if (sc->sc_intre) 1070 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, 1071 sc->sc_intre & (OHCI_ALL_INTRS | OHCI_MIE)); 1072 if (sc->sc_control) 1073 ctl = sc->sc_control; 1074 else 1075 ctl = OREAD4(sc, OHCI_CONTROL); 1076 ctl |= OHCI_HCFS_RESUME; 1077 OWRITE4(sc, OHCI_CONTROL, ctl); 1078 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 1079 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL; 1080 OWRITE4(sc, OHCI_CONTROL, ctl); 1081 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 1082 sc->sc_control = sc->sc_intre = 0; 1083 sc->sc_bus.use_polling--; 1084 break; 1085 case PWR_SOFTSUSPEND: 1086 case PWR_SOFTSTANDBY: 1087 case PWR_SOFTRESUME: 1088 break; 1089 } 1090 splx(s); 1091 } 1092 1093 #ifdef OHCI_DEBUG 1094 void 1095 ohci_dumpregs(ohci_softc_t *sc) 1096 { 1097 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 1098 OREAD4(sc, OHCI_REVISION), 1099 OREAD4(sc, OHCI_CONTROL), 1100 OREAD4(sc, OHCI_COMMAND_STATUS))); 1101 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 1102 OREAD4(sc, OHCI_INTERRUPT_STATUS), 1103 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 1104 OREAD4(sc, OHCI_INTERRUPT_DISABLE))); 1105 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 1106 OREAD4(sc, OHCI_HCCA), 1107 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 1108 OREAD4(sc, OHCI_CONTROL_HEAD_ED))); 1109 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 1110 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 1111 OREAD4(sc, OHCI_BULK_HEAD_ED), 1112 OREAD4(sc, OHCI_BULK_CURRENT_ED))); 1113 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 1114 OREAD4(sc, OHCI_DONE_HEAD), 1115 OREAD4(sc, OHCI_FM_INTERVAL), 1116 OREAD4(sc, OHCI_FM_REMAINING))); 1117 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 1118 OREAD4(sc, OHCI_FM_NUMBER), 1119 OREAD4(sc, OHCI_PERIODIC_START), 1120 OREAD4(sc, OHCI_LS_THRESHOLD))); 1121 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n", 1122 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 1123 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 1124 OREAD4(sc, OHCI_RH_STATUS))); 1125 DPRINTF((" port1=0x%08x port2=0x%08x\n", 1126 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 1127 OREAD4(sc, OHCI_RH_PORT_STATUS(2)))); 1128 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n", 1129 O32TOH(sc->sc_hcca->hcca_frame_number), 1130 O32TOH(sc->sc_hcca->hcca_done_head))); 1131 } 1132 #endif 1133 1134 Static int ohci_intr1(ohci_softc_t *); 1135 1136 int 1137 ohci_intr(void *p) 1138 { 1139 ohci_softc_t *sc = p; 1140 1141 if (sc == NULL || sc->sc_dying) 1142 return (0); 1143 1144 /* If we get an interrupt while polling, then just ignore it. */ 1145 if (sc->sc_bus.use_polling) { 1146 #ifdef DIAGNOSTIC 1147 DPRINTFN(16, ("ohci_intr: ignored interrupt while polling\n")); 1148 #endif 1149 /* for level triggered intrs, should do something to ack */ 1150 OWRITE4(sc, OHCI_INTERRUPT_STATUS, 1151 OREAD4(sc, OHCI_INTERRUPT_STATUS)); 1152 1153 return (0); 1154 } 1155 1156 return (ohci_intr1(sc)); 1157 } 1158 1159 Static int 1160 ohci_intr1(ohci_softc_t *sc) 1161 { 1162 u_int32_t intrs, eintrs; 1163 1164 DPRINTFN(14,("ohci_intr1: enter\n")); 1165 1166 /* In case the interrupt occurs before initialization has completed. */ 1167 if (sc == NULL || sc->sc_hcca == NULL) { 1168 #ifdef DIAGNOSTIC 1169 printf("ohci_intr: sc->sc_hcca == NULL\n"); 1170 #endif 1171 return (0); 1172 } 1173 1174 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1175 if (!intrs) 1176 return (0); 1177 1178 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs & ~(OHCI_MIE|OHCI_WDH)); /* Acknowledge */ 1179 eintrs = intrs & sc->sc_eintrs; 1180 if (!eintrs) 1181 return (0); 1182 1183 sc->sc_bus.intr_context++; 1184 sc->sc_bus.no_intrs++; 1185 DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 1186 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 1187 (u_int)eintrs)); 1188 1189 if (eintrs & OHCI_SO) { 1190 sc->sc_overrun_cnt++; 1191 if (usbd_ratecheck(&sc->sc_overrun_ntc)) { 1192 printf("%s: %u scheduling overruns\n", 1193 USBDEVNAME(sc->sc_bus.bdev), sc->sc_overrun_cnt); 1194 sc->sc_overrun_cnt = 0; 1195 } 1196 /* XXX do what */ 1197 eintrs &= ~OHCI_SO; 1198 } 1199 if (eintrs & OHCI_WDH) { 1200 /* 1201 * We block the interrupt below, and reenable it later from 1202 * ohci_softintr(). 1203 */ 1204 usb_schedsoftintr(&sc->sc_bus); 1205 } 1206 if (eintrs & OHCI_RD) { 1207 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev)); 1208 /* XXX process resume detect */ 1209 } 1210 if (eintrs & OHCI_UE) { 1211 printf("%s: unrecoverable error, controller halted\n", 1212 USBDEVNAME(sc->sc_bus.bdev)); 1213 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1214 /* XXX what else */ 1215 } 1216 if (eintrs & OHCI_RHSC) { 1217 /* 1218 * We block the interrupt below, and reenable it later from 1219 * a timeout. 1220 */ 1221 ohci_rhsc(sc, sc->sc_intrxfer); 1222 /* Do not allow RHSC interrupts > 1 per second */ 1223 usb_callout(sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc); 1224 } 1225 1226 sc->sc_bus.intr_context--; 1227 1228 if (eintrs != 0) { 1229 /* Block unprocessed interrupts. */ 1230 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs); 1231 sc->sc_eintrs &= ~eintrs; 1232 DPRINTFN(1, ("%s: blocking intrs 0x%x\n", 1233 USBDEVNAME(sc->sc_bus.bdev), eintrs)); 1234 } 1235 1236 return (1); 1237 } 1238 1239 void 1240 ohci_rhsc_enable(void *v_sc) 1241 { 1242 ohci_softc_t *sc = v_sc; 1243 int s; 1244 1245 s = splhardusb(); 1246 sc->sc_eintrs |= OHCI_RHSC; 1247 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1248 splx(s); 1249 } 1250 1251 #ifdef OHCI_DEBUG 1252 const char *ohci_cc_strs[] = { 1253 "NO_ERROR", 1254 "CRC", 1255 "BIT_STUFFING", 1256 "DATA_TOGGLE_MISMATCH", 1257 "STALL", 1258 "DEVICE_NOT_RESPONDING", 1259 "PID_CHECK_FAILURE", 1260 "UNEXPECTED_PID", 1261 "DATA_OVERRUN", 1262 "DATA_UNDERRUN", 1263 "BUFFER_OVERRUN", 1264 "BUFFER_UNDERRUN", 1265 "reserved", 1266 "reserved", 1267 "NOT_ACCESSED", 1268 "NOT_ACCESSED", 1269 }; 1270 #endif 1271 1272 void 1273 ohci_softintr(void *v) 1274 { 1275 ohci_softc_t *sc = v; 1276 ohci_soft_itd_t *sitd, *sidone, *sitdnext; 1277 ohci_soft_td_t *std, *sdone, *stdnext; 1278 usbd_xfer_handle xfer; 1279 struct ohci_pipe *opipe; 1280 int len, cc, s; 1281 int i, j, actlen, iframes, uedir; 1282 ohci_physaddr_t done; 1283 1284 DPRINTFN(10,("ohci_softintr: enter\n")); 1285 1286 sc->sc_bus.intr_context++; 1287 1288 s = splhardusb(); 1289 done = O32TOH(sc->sc_hcca->hcca_done_head) & ~OHCI_DONE_INTRS; 1290 sc->sc_hcca->hcca_done_head = 0; 1291 OWRITE4(sc, OHCI_INTERRUPT_STATUS, OHCI_WDH); 1292 sc->sc_eintrs |= OHCI_WDH; 1293 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_WDH); 1294 splx(s); 1295 1296 /* Reverse the done list. */ 1297 for (sdone = NULL, sidone = NULL; done != 0; ) { 1298 std = ohci_hash_find_td(sc, done); 1299 if (std != NULL) { 1300 std->dnext = sdone; 1301 done = O32TOH(std->td.td_nexttd); 1302 sdone = std; 1303 DPRINTFN(10,("add TD %p\n", std)); 1304 continue; 1305 } 1306 sitd = ohci_hash_find_itd(sc, done); 1307 if (sitd != NULL) { 1308 sitd->dnext = sidone; 1309 done = O32TOH(sitd->itd.itd_nextitd); 1310 sidone = sitd; 1311 DPRINTFN(5,("add ITD %p\n", sitd)); 1312 continue; 1313 } 1314 panic("ohci_softintr: addr 0x%08lx not found", (u_long)done); 1315 } 1316 1317 DPRINTFN(10,("ohci_softintr: sdone=%p sidone=%p\n", sdone, sidone)); 1318 1319 #ifdef OHCI_DEBUG 1320 if (ohcidebug > 10) { 1321 DPRINTF(("ohci_process_done: TD done:\n")); 1322 ohci_dump_tds(sc, sdone); 1323 } 1324 #endif 1325 1326 for (std = sdone; std; std = stdnext) { 1327 xfer = std->xfer; 1328 stdnext = std->dnext; 1329 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n", 1330 std, xfer, xfer ? xfer->hcpriv : 0)); 1331 if (xfer == NULL) { 1332 /* 1333 * xfer == NULL: There seems to be no xfer associated 1334 * with this TD. It is tailp that happened to end up on 1335 * the done queue. 1336 * Shouldn't happen, but some chips are broken(?). 1337 */ 1338 continue; 1339 } 1340 if (xfer->status == USBD_CANCELLED || 1341 xfer->status == USBD_TIMEOUT) { 1342 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1343 xfer)); 1344 /* Handled by abort routine. */ 1345 continue; 1346 } 1347 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 1348 1349 len = std->len; 1350 if (std->td.td_cbp != 0) 1351 len -= O32TOH(std->td.td_be) - 1352 O32TOH(std->td.td_cbp) + 1; 1353 DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", len, 1354 std->flags)); 1355 if (std->flags & OHCI_ADD_LEN) 1356 xfer->actlen += len; 1357 1358 cc = OHCI_TD_GET_CC(O32TOH(std->td.td_flags)); 1359 if (cc == OHCI_CC_NO_ERROR) { 1360 if (std->flags & OHCI_CALL_DONE) { 1361 xfer->status = USBD_NORMAL_COMPLETION; 1362 s = splusb(); 1363 usb_transfer_complete(xfer); 1364 splx(s); 1365 } 1366 ohci_free_std(sc, std); 1367 } else { 1368 /* 1369 * Endpoint is halted. First unlink all the TDs 1370 * belonging to the failed transfer, and then restart 1371 * the endpoint. 1372 */ 1373 ohci_soft_td_t *p, *n; 1374 opipe = (struct ohci_pipe *)xfer->pipe; 1375 1376 DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n", 1377 OHCI_TD_GET_CC(O32TOH(std->td.td_flags)), 1378 ohci_cc_strs[OHCI_TD_GET_CC(O32TOH(std->td.td_flags))])); 1379 1380 /* remove TDs */ 1381 for (p = std; p->xfer == xfer; p = n) { 1382 n = p->nexttd; 1383 ohci_free_std(sc, p); 1384 } 1385 1386 /* clear halt */ 1387 opipe->sed->ed.ed_headp = HTOO32(p->physaddr); 1388 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1389 1390 if (cc == OHCI_CC_STALL) 1391 xfer->status = USBD_STALLED; 1392 else 1393 xfer->status = USBD_IOERROR; 1394 s = splusb(); 1395 usb_transfer_complete(xfer); 1396 splx(s); 1397 } 1398 } 1399 1400 #ifdef OHCI_DEBUG 1401 if (ohcidebug > 10) { 1402 DPRINTF(("ohci_softintr: ITD done:\n")); 1403 ohci_dump_itds(sc, sidone); 1404 } 1405 #endif 1406 1407 for (sitd = sidone; sitd != NULL; sitd = sitdnext) { 1408 xfer = sitd->xfer; 1409 sitdnext = sitd->dnext; 1410 DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n", 1411 sitd, xfer, xfer ? xfer->hcpriv : 0)); 1412 if (xfer == NULL) 1413 continue; 1414 if (xfer->status == USBD_CANCELLED || 1415 xfer->status == USBD_TIMEOUT) { 1416 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1417 xfer)); 1418 /* Handled by abort routine. */ 1419 continue; 1420 } 1421 #ifdef DIAGNOSTIC 1422 if (sitd->isdone) 1423 printf("ohci_softintr: sitd=%p is done\n", sitd); 1424 sitd->isdone = 1; 1425 #endif 1426 if (sitd->flags & OHCI_CALL_DONE) { 1427 ohci_soft_itd_t *next; 1428 1429 opipe = (struct ohci_pipe *)xfer->pipe; 1430 opipe->u.iso.inuse -= xfer->nframes; 1431 uedir = UE_GET_DIR(xfer->pipe->endpoint->edesc-> 1432 bEndpointAddress); 1433 xfer->status = USBD_NORMAL_COMPLETION; 1434 actlen = 0; 1435 for (i = 0, sitd = xfer->hcpriv;; 1436 sitd = next) { 1437 next = sitd->nextitd; 1438 if (OHCI_ITD_GET_CC(O32TOH(sitd-> 1439 itd.itd_flags)) != OHCI_CC_NO_ERROR) 1440 xfer->status = USBD_IOERROR; 1441 /* For input, update frlengths with actual */ 1442 /* XXX anything necessary for output? */ 1443 if (uedir == UE_DIR_IN && 1444 xfer->status == USBD_NORMAL_COMPLETION) { 1445 iframes = OHCI_ITD_GET_FC(O32TOH( 1446 sitd->itd.itd_flags)); 1447 for (j = 0; j < iframes; i++, j++) { 1448 len = O16TOH(sitd-> 1449 itd.itd_offset[j]); 1450 if ((OHCI_ITD_PSW_GET_CC(len) & 1451 OHCI_CC_NOT_ACCESSED_MASK) 1452 == OHCI_CC_NOT_ACCESSED) 1453 len = 0; 1454 else 1455 len = OHCI_ITD_PSW_LENGTH(len); 1456 xfer->frlengths[i] = len; 1457 actlen += len; 1458 } 1459 } 1460 if (sitd->flags & OHCI_CALL_DONE) 1461 break; 1462 ohci_free_sitd(sc, sitd); 1463 } 1464 ohci_free_sitd(sc, sitd); 1465 if (uedir == UE_DIR_IN && 1466 xfer->status == USBD_NORMAL_COMPLETION) 1467 xfer->actlen = actlen; 1468 xfer->hcpriv = NULL; 1469 1470 s = splusb(); 1471 usb_transfer_complete(xfer); 1472 splx(s); 1473 } 1474 } 1475 1476 #ifdef USB_USE_SOFTINTR 1477 if (sc->sc_softwake) { 1478 sc->sc_softwake = 0; 1479 wakeup(&sc->sc_softwake); 1480 } 1481 #endif /* USB_USE_SOFTINTR */ 1482 1483 sc->sc_bus.intr_context--; 1484 DPRINTFN(10,("ohci_softintr: done:\n")); 1485 } 1486 1487 void 1488 ohci_device_ctrl_done(usbd_xfer_handle xfer) 1489 { 1490 DPRINTFN(10,("ohci_device_ctrl_done: xfer=%p\n", xfer)); 1491 1492 #ifdef DIAGNOSTIC 1493 if (!(xfer->rqflags & URQ_REQUEST)) { 1494 panic("ohci_device_ctrl_done: not a request"); 1495 } 1496 #endif 1497 } 1498 1499 void 1500 ohci_device_intr_done(usbd_xfer_handle xfer) 1501 { 1502 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1503 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1504 ohci_soft_ed_t *sed = opipe->sed; 1505 ohci_soft_td_t *data, *tail; 1506 1507 1508 DPRINTFN(10,("ohci_device_intr_done: xfer=%p, actlen=%d\n", 1509 xfer, xfer->actlen)); 1510 1511 if (xfer->pipe->repeat) { 1512 data = opipe->tail.td; 1513 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 1514 if (tail == NULL) { 1515 xfer->status = USBD_NOMEM; 1516 return; 1517 } 1518 tail->xfer = NULL; 1519 1520 data->td.td_flags = HTOO32( 1521 OHCI_TD_IN | OHCI_TD_NOCC | 1522 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 1523 if (xfer->flags & USBD_SHORT_XFER_OK) 1524 data->td.td_flags |= HTOO32(OHCI_TD_R); 1525 data->td.td_cbp = HTOO32(DMAADDR(&xfer->dmabuf, 0)); 1526 data->nexttd = tail; 1527 data->td.td_nexttd = HTOO32(tail->physaddr); 1528 data->td.td_be = HTOO32(O32TOH(data->td.td_cbp) + 1529 xfer->length - 1); 1530 data->len = xfer->length; 1531 data->xfer = xfer; 1532 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1533 xfer->hcpriv = data; 1534 xfer->actlen = 0; 1535 1536 sed->ed.ed_tailp = HTOO32(tail->physaddr); 1537 opipe->tail.td = tail; 1538 } 1539 } 1540 1541 void 1542 ohci_device_bulk_done(usbd_xfer_handle xfer) 1543 { 1544 DPRINTFN(10,("ohci_device_bulk_done: xfer=%p, actlen=%d\n", 1545 xfer, xfer->actlen)); 1546 } 1547 1548 void 1549 ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer) 1550 { 1551 usbd_pipe_handle pipe; 1552 u_char *p; 1553 int i, m; 1554 int hstatus; 1555 1556 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1557 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n", 1558 sc, xfer, hstatus)); 1559 1560 if (xfer == NULL) { 1561 /* Just ignore the change. */ 1562 return; 1563 } 1564 1565 pipe = xfer->pipe; 1566 1567 p = KERNADDR(&xfer->dmabuf, 0); 1568 m = min(sc->sc_noport, xfer->length * 8 - 1); 1569 memset(p, 0, xfer->length); 1570 for (i = 1; i <= m; i++) { 1571 /* Pick out CHANGE bits from the status reg. */ 1572 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1573 p[i/8] |= 1 << (i%8); 1574 } 1575 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 1576 xfer->actlen = xfer->length; 1577 xfer->status = USBD_NORMAL_COMPLETION; 1578 1579 usb_transfer_complete(xfer); 1580 } 1581 1582 void 1583 ohci_root_intr_done(usbd_xfer_handle xfer) 1584 { 1585 } 1586 1587 void 1588 ohci_root_ctrl_done(usbd_xfer_handle xfer) 1589 { 1590 } 1591 1592 /* 1593 * Wait here until controller claims to have an interrupt. 1594 * Then call ohci_intr and return. Use timeout to avoid waiting 1595 * too long. 1596 */ 1597 void 1598 ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer) 1599 { 1600 int timo; 1601 u_int32_t intrs; 1602 1603 xfer->status = USBD_IN_PROGRESS; 1604 for (timo = xfer->timeout; timo >= 0; timo--) { 1605 usb_delay_ms(&sc->sc_bus, 1); 1606 if (sc->sc_dying) 1607 break; 1608 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 1609 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs)); 1610 #ifdef OHCI_DEBUG 1611 if (ohcidebug > 15) 1612 ohci_dumpregs(sc); 1613 #endif 1614 if (intrs) { 1615 ohci_intr1(sc); 1616 if (xfer->status != USBD_IN_PROGRESS) 1617 return; 1618 } 1619 } 1620 1621 /* Timeout */ 1622 DPRINTF(("ohci_waitintr: timeout\n")); 1623 xfer->status = USBD_TIMEOUT; 1624 usb_transfer_complete(xfer); 1625 /* XXX should free TD */ 1626 } 1627 1628 void 1629 ohci_poll(struct usbd_bus *bus) 1630 { 1631 ohci_softc_t *sc = (ohci_softc_t *)bus; 1632 #ifdef OHCI_DEBUG 1633 static int last; 1634 int new; 1635 new = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1636 if (new != last) { 1637 DPRINTFN(10,("ohci_poll: intrs=0x%04x\n", new)); 1638 last = new; 1639 } 1640 #endif 1641 1642 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) 1643 ohci_intr1(sc); 1644 } 1645 1646 usbd_status 1647 ohci_device_request(usbd_xfer_handle xfer) 1648 { 1649 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1650 usb_device_request_t *req = &xfer->request; 1651 usbd_device_handle dev = opipe->pipe.device; 1652 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1653 int addr = dev->address; 1654 ohci_soft_td_t *setup, *stat, *next, *tail; 1655 ohci_soft_ed_t *sed; 1656 int isread; 1657 int len; 1658 usbd_status err; 1659 int s; 1660 1661 isread = req->bmRequestType & UT_READ; 1662 len = UGETW(req->wLength); 1663 1664 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 1665 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 1666 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1667 UGETW(req->wIndex), len, addr, 1668 opipe->pipe.endpoint->edesc->bEndpointAddress)); 1669 1670 setup = opipe->tail.td; 1671 stat = ohci_alloc_std(sc); 1672 if (stat == NULL) { 1673 err = USBD_NOMEM; 1674 goto bad1; 1675 } 1676 tail = ohci_alloc_std(sc); 1677 if (tail == NULL) { 1678 err = USBD_NOMEM; 1679 goto bad2; 1680 } 1681 tail->xfer = NULL; 1682 1683 sed = opipe->sed; 1684 opipe->u.ctl.length = len; 1685 1686 /* Update device address and length since they may have changed 1687 during the setup of the control pipe in usbd_new_device(). */ 1688 /* XXX This only needs to be done once, but it's too early in open. */ 1689 /* XXXX Should not touch ED here! */ 1690 sed->ed.ed_flags = HTOO32( 1691 (O32TOH(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) | 1692 OHCI_ED_SET_FA(addr) | 1693 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize))); 1694 1695 next = stat; 1696 1697 /* Set up data transaction */ 1698 if (len != 0) { 1699 ohci_soft_td_t *std = stat; 1700 1701 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 1702 std, &stat); 1703 stat = stat->nexttd; /* point at free TD */ 1704 if (err) 1705 goto bad3; 1706 /* Start toggle at 1 and then use the carried toggle. */ 1707 std->td.td_flags &= HTOO32(~OHCI_TD_TOGGLE_MASK); 1708 std->td.td_flags |= HTOO32(OHCI_TD_TOGGLE_1); 1709 } 1710 1711 memcpy(KERNADDR(&opipe->u.ctl.reqdma, 0), req, sizeof *req); 1712 1713 setup->td.td_flags = HTOO32(OHCI_TD_SETUP | OHCI_TD_NOCC | 1714 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1715 setup->td.td_cbp = HTOO32(DMAADDR(&opipe->u.ctl.reqdma, 0)); 1716 setup->nexttd = next; 1717 setup->td.td_nexttd = HTOO32(next->physaddr); 1718 setup->td.td_be = HTOO32(O32TOH(setup->td.td_cbp) + sizeof *req - 1); 1719 setup->len = 0; 1720 setup->xfer = xfer; 1721 setup->flags = 0; 1722 xfer->hcpriv = setup; 1723 1724 stat->td.td_flags = HTOO32( 1725 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | 1726 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1727 stat->td.td_cbp = 0; 1728 stat->nexttd = tail; 1729 stat->td.td_nexttd = HTOO32(tail->physaddr); 1730 stat->td.td_be = 0; 1731 stat->flags = OHCI_CALL_DONE; 1732 stat->len = 0; 1733 stat->xfer = xfer; 1734 1735 #ifdef OHCI_DEBUG 1736 if (ohcidebug > 5) { 1737 DPRINTF(("ohci_device_request:\n")); 1738 ohci_dump_ed(sc, sed); 1739 ohci_dump_tds(sc, setup); 1740 } 1741 #endif 1742 1743 /* Insert ED in schedule */ 1744 s = splusb(); 1745 sed->ed.ed_tailp = HTOO32(tail->physaddr); 1746 opipe->tail.td = tail; 1747 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1748 if (xfer->timeout && !sc->sc_bus.use_polling) { 1749 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 1750 ohci_timeout, xfer); 1751 } 1752 splx(s); 1753 1754 #ifdef OHCI_DEBUG 1755 if (ohcidebug > 20) { 1756 delay(10000); 1757 DPRINTF(("ohci_device_request: status=%x\n", 1758 OREAD4(sc, OHCI_COMMAND_STATUS))); 1759 ohci_dumpregs(sc); 1760 printf("ctrl head:\n"); 1761 ohci_dump_ed(sc, sc->sc_ctrl_head); 1762 printf("sed:\n"); 1763 ohci_dump_ed(sc, sed); 1764 ohci_dump_tds(sc, setup); 1765 } 1766 #endif 1767 1768 return (USBD_NORMAL_COMPLETION); 1769 1770 bad3: 1771 ohci_free_std(sc, tail); 1772 bad2: 1773 ohci_free_std(sc, stat); 1774 bad1: 1775 return (err); 1776 } 1777 1778 /* 1779 * Add an ED to the schedule. Called at splusb(). 1780 */ 1781 void 1782 ohci_add_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1783 { 1784 DPRINTFN(8,("ohci_add_ed: sed=%p head=%p\n", sed, head)); 1785 1786 SPLUSBCHECK; 1787 sed->next = head->next; 1788 sed->ed.ed_nexted = head->ed.ed_nexted; 1789 head->next = sed; 1790 head->ed.ed_nexted = HTOO32(sed->physaddr); 1791 } 1792 1793 /* 1794 * Remove an ED from the schedule. Called at splusb(). 1795 */ 1796 void 1797 ohci_rem_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1798 { 1799 ohci_soft_ed_t *p; 1800 1801 SPLUSBCHECK; 1802 1803 /* XXX */ 1804 for (p = head; p != NULL && p->next != sed; p = p->next) 1805 ; 1806 if (p == NULL) 1807 panic("ohci_rem_ed: ED not found"); 1808 p->next = sed->next; 1809 p->ed.ed_nexted = sed->ed.ed_nexted; 1810 } 1811 1812 /* 1813 * When a transfer is completed the TD is added to the done queue by 1814 * the host controller. This queue is the processed by software. 1815 * Unfortunately the queue contains the physical address of the TD 1816 * and we have no simple way to translate this back to a kernel address. 1817 * To make the translation possible (and fast) we use a hash table of 1818 * TDs currently in the schedule. The physical address is used as the 1819 * hash value. 1820 */ 1821 1822 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1823 /* Called at splusb() */ 1824 void 1825 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1826 { 1827 int h = HASH(std->physaddr); 1828 1829 SPLUSBCHECK; 1830 1831 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1832 } 1833 1834 /* Called at splusb() */ 1835 void 1836 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1837 { 1838 SPLUSBCHECK; 1839 1840 LIST_REMOVE(std, hnext); 1841 } 1842 1843 ohci_soft_td_t * 1844 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a) 1845 { 1846 int h = HASH(a); 1847 ohci_soft_td_t *std; 1848 1849 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1850 std != NULL; 1851 std = LIST_NEXT(std, hnext)) 1852 if (std->physaddr == a) 1853 return (std); 1854 return (NULL); 1855 } 1856 1857 /* Called at splusb() */ 1858 void 1859 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1860 { 1861 int h = HASH(sitd->physaddr); 1862 1863 SPLUSBCHECK; 1864 1865 DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n", 1866 sitd, (u_long)sitd->physaddr)); 1867 1868 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext); 1869 } 1870 1871 /* Called at splusb() */ 1872 void 1873 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1874 { 1875 SPLUSBCHECK; 1876 1877 DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n", 1878 sitd, (u_long)sitd->physaddr)); 1879 1880 LIST_REMOVE(sitd, hnext); 1881 } 1882 1883 ohci_soft_itd_t * 1884 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a) 1885 { 1886 int h = HASH(a); 1887 ohci_soft_itd_t *sitd; 1888 1889 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]); 1890 sitd != NULL; 1891 sitd = LIST_NEXT(sitd, hnext)) 1892 if (sitd->physaddr == a) 1893 return (sitd); 1894 return (NULL); 1895 } 1896 1897 void 1898 ohci_timeout(void *addr) 1899 { 1900 struct ohci_xfer *oxfer = addr; 1901 struct ohci_pipe *opipe = (struct ohci_pipe *)oxfer->xfer.pipe; 1902 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1903 1904 DPRINTF(("ohci_timeout: oxfer=%p\n", oxfer)); 1905 1906 if (sc->sc_dying) { 1907 ohci_abort_xfer(&oxfer->xfer, USBD_TIMEOUT); 1908 return; 1909 } 1910 1911 /* Execute the abort in a process context. */ 1912 usb_init_task(&oxfer->abort_task, ohci_timeout_task, addr); 1913 usb_add_task(oxfer->xfer.pipe->device, &oxfer->abort_task); 1914 } 1915 1916 void 1917 ohci_timeout_task(void *addr) 1918 { 1919 usbd_xfer_handle xfer = addr; 1920 int s; 1921 1922 DPRINTF(("ohci_timeout_task: xfer=%p\n", xfer)); 1923 1924 s = splusb(); 1925 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1926 splx(s); 1927 } 1928 1929 #ifdef OHCI_DEBUG 1930 void 1931 ohci_dump_tds(ohci_softc_t *sc, ohci_soft_td_t *std) 1932 { 1933 for (; std; std = std->nexttd) 1934 ohci_dump_td(sc, std); 1935 } 1936 1937 void 1938 ohci_dump_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1939 { 1940 char sbuf[128]; 1941 1942 bitmask_snprintf((u_int32_t)O32TOH(std->td.td_flags), 1943 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 1944 sbuf, sizeof(sbuf)); 1945 1946 printf("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx " 1947 "nexttd=0x%08lx be=0x%08lx\n", 1948 std, (u_long)std->physaddr, sbuf, 1949 OHCI_TD_GET_DI(O32TOH(std->td.td_flags)), 1950 OHCI_TD_GET_EC(O32TOH(std->td.td_flags)), 1951 OHCI_TD_GET_CC(O32TOH(std->td.td_flags)), 1952 (u_long)O32TOH(std->td.td_cbp), 1953 (u_long)O32TOH(std->td.td_nexttd), 1954 (u_long)O32TOH(std->td.td_be)); 1955 } 1956 1957 void 1958 ohci_dump_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1959 { 1960 int i; 1961 1962 printf("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n" 1963 "bp0=0x%08lx next=0x%08lx be=0x%08lx\n", 1964 sitd, (u_long)sitd->physaddr, 1965 OHCI_ITD_GET_SF(O32TOH(sitd->itd.itd_flags)), 1966 OHCI_ITD_GET_DI(O32TOH(sitd->itd.itd_flags)), 1967 OHCI_ITD_GET_FC(O32TOH(sitd->itd.itd_flags)), 1968 OHCI_ITD_GET_CC(O32TOH(sitd->itd.itd_flags)), 1969 (u_long)O32TOH(sitd->itd.itd_bp0), 1970 (u_long)O32TOH(sitd->itd.itd_nextitd), 1971 (u_long)O32TOH(sitd->itd.itd_be)); 1972 for (i = 0; i < OHCI_ITD_NOFFSET; i++) 1973 printf("offs[%d]=0x%04x ", i, 1974 (u_int)O16TOH(sitd->itd.itd_offset[i])); 1975 printf("\n"); 1976 } 1977 1978 void 1979 ohci_dump_itds(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1980 { 1981 for (; sitd; sitd = sitd->nextitd) 1982 ohci_dump_itd(sc, sitd); 1983 } 1984 1985 void 1986 ohci_dump_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 1987 { 1988 char sbuf[128], sbuf2[128]; 1989 1990 bitmask_snprintf((u_int32_t)O32TOH(sed->ed.ed_flags), 1991 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO", 1992 sbuf, sizeof(sbuf)); 1993 bitmask_snprintf((u_int32_t)O32TOH(sed->ed.ed_headp), 1994 "\20\1HALT\2CARRY", sbuf2, sizeof(sbuf2)); 1995 1996 printf("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d flags=%s\ntailp=0x%08lx " 1997 "headflags=%s headp=0x%08lx nexted=0x%08lx\n", 1998 sed, (u_long)sed->physaddr, 1999 OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)), 2000 OHCI_ED_GET_EN(O32TOH(sed->ed.ed_flags)), 2001 OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)), sbuf, 2002 (u_long)O32TOH(sed->ed.ed_tailp), sbuf2, 2003 (u_long)O32TOH(sed->ed.ed_headp), 2004 (u_long)O32TOH(sed->ed.ed_nexted)); 2005 } 2006 #endif 2007 2008 usbd_status 2009 ohci_open(usbd_pipe_handle pipe) 2010 { 2011 usbd_device_handle dev = pipe->device; 2012 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2013 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 2014 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2015 u_int8_t addr = dev->address; 2016 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 2017 ohci_soft_ed_t *sed; 2018 ohci_soft_td_t *std; 2019 ohci_soft_itd_t *sitd; 2020 ohci_physaddr_t tdphys; 2021 u_int32_t fmt; 2022 usbd_status err; 2023 int s; 2024 int ival; 2025 2026 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 2027 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 2028 2029 if (sc->sc_dying) 2030 return (USBD_IOERROR); 2031 2032 std = NULL; 2033 sed = NULL; 2034 2035 if (addr == sc->sc_addr) { 2036 switch (ed->bEndpointAddress) { 2037 case USB_CONTROL_ENDPOINT: 2038 pipe->methods = &ohci_root_ctrl_methods; 2039 break; 2040 case UE_DIR_IN | OHCI_INTR_ENDPT: 2041 pipe->methods = &ohci_root_intr_methods; 2042 break; 2043 default: 2044 return (USBD_INVAL); 2045 } 2046 } else { 2047 sed = ohci_alloc_sed(sc); 2048 if (sed == NULL) 2049 goto bad0; 2050 opipe->sed = sed; 2051 if (xfertype == UE_ISOCHRONOUS) { 2052 sitd = ohci_alloc_sitd(sc); 2053 if (sitd == NULL) 2054 goto bad1; 2055 opipe->tail.itd = sitd; 2056 tdphys = sitd->physaddr; 2057 fmt = OHCI_ED_FORMAT_ISO; 2058 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 2059 fmt |= OHCI_ED_DIR_IN; 2060 else 2061 fmt |= OHCI_ED_DIR_OUT; 2062 } else { 2063 std = ohci_alloc_std(sc); 2064 if (std == NULL) 2065 goto bad1; 2066 opipe->tail.td = std; 2067 tdphys = std->physaddr; 2068 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD; 2069 } 2070 sed->ed.ed_flags = HTOO32( 2071 OHCI_ED_SET_FA(addr) | 2072 OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) | 2073 (dev->speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) | 2074 fmt | 2075 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 2076 sed->ed.ed_headp = sed->ed.ed_tailp = HTOO32(tdphys); 2077 2078 switch (xfertype) { 2079 case UE_CONTROL: 2080 pipe->methods = &ohci_device_ctrl_methods; 2081 err = usb_allocmem(&sc->sc_bus, 2082 sizeof(usb_device_request_t), 2083 0, &opipe->u.ctl.reqdma); 2084 if (err) 2085 goto bad; 2086 s = splusb(); 2087 ohci_add_ed(sc, sed, sc->sc_ctrl_head); 2088 splx(s); 2089 break; 2090 case UE_INTERRUPT: 2091 pipe->methods = &ohci_device_intr_methods; 2092 ival = pipe->interval; 2093 if (ival == USBD_DEFAULT_INTERVAL) 2094 ival = ed->bInterval; 2095 return (ohci_device_setintr(sc, opipe, ival)); 2096 case UE_ISOCHRONOUS: 2097 pipe->methods = &ohci_device_isoc_methods; 2098 return (ohci_setup_isoc(pipe)); 2099 case UE_BULK: 2100 pipe->methods = &ohci_device_bulk_methods; 2101 s = splusb(); 2102 ohci_add_ed(sc, sed, sc->sc_bulk_head); 2103 splx(s); 2104 break; 2105 } 2106 } 2107 return (USBD_NORMAL_COMPLETION); 2108 2109 bad: 2110 if (std != NULL) 2111 ohci_free_std(sc, std); 2112 bad1: 2113 if (sed != NULL) 2114 ohci_free_sed(sc, sed); 2115 bad0: 2116 return (USBD_NOMEM); 2117 2118 } 2119 2120 /* 2121 * Close a reqular pipe. 2122 * Assumes that there are no pending transactions. 2123 */ 2124 void 2125 ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head) 2126 { 2127 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2128 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2129 ohci_soft_ed_t *sed = opipe->sed; 2130 int s; 2131 2132 s = splusb(); 2133 #ifdef DIAGNOSTIC 2134 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 2135 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2136 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) { 2137 ohci_soft_td_t *std; 2138 std = ohci_hash_find_td(sc, O32TOH(sed->ed.ed_headp)); 2139 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 2140 "tl=0x%x pipe=%p, std=%p\n", sed, 2141 (int)O32TOH(sed->ed.ed_headp), 2142 (int)O32TOH(sed->ed.ed_tailp), 2143 pipe, std); 2144 #ifdef USB_DEBUG 2145 usbd_dump_pipe(&opipe->pipe); 2146 #endif 2147 #ifdef OHCI_DEBUG 2148 ohci_dump_ed(sc, sed); 2149 if (std) 2150 ohci_dump_td(sc, std); 2151 #endif 2152 usb_delay_ms(&sc->sc_bus, 2); 2153 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2154 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) 2155 printf("ohci_close_pipe: pipe still not empty\n"); 2156 } 2157 #endif 2158 ohci_rem_ed(sed, head); 2159 /* Make sure the host controller is not touching this ED */ 2160 usb_delay_ms(&sc->sc_bus, 1); 2161 splx(s); 2162 ohci_free_sed(sc, opipe->sed); 2163 } 2164 2165 /* 2166 * Abort a device request. 2167 * If this routine is called at splusb() it guarantees that the request 2168 * will be removed from the hardware scheduling and that the callback 2169 * for it will be called with USBD_CANCELLED status. 2170 * It's impossible to guarantee that the requested transfer will not 2171 * have happened since the hardware runs concurrently. 2172 * If the transaction has already happened we rely on the ordinary 2173 * interrupt processing to process it. 2174 */ 2175 void 2176 ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2177 { 2178 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2179 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 2180 ohci_soft_ed_t *sed = opipe->sed; 2181 ohci_soft_td_t *p, *n; 2182 ohci_physaddr_t headp; 2183 int s, hit; 2184 int wake; 2185 2186 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p sed=%p\n", xfer, opipe,sed)); 2187 2188 if (sc->sc_dying) { 2189 /* If we're dying, just do the software part. */ 2190 s = splusb(); 2191 xfer->status = status; /* make software ignore it */ 2192 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 2193 usb_transfer_complete(xfer); 2194 splx(s); 2195 } 2196 2197 if (xfer->device->bus->intr_context || !curproc) 2198 panic("ohci_abort_xfer: not in process context"); 2199 2200 /* 2201 * If an abort is already in progress then just wait for it to 2202 * complete and return. 2203 */ 2204 if (xfer->hcflags & UXFER_ABORTING) { 2205 DPRINTFN(2, ("ohci_abort_xfer: already aborting\n")); 2206 #ifdef DIAGNOSTIC 2207 if (status == USBD_TIMEOUT) 2208 printf("0hci_abort_xfer: TIMEOUT while aborting\n"); 2209 #endif 2210 /* Override the status which might be USBD_TIMEOUT. */ 2211 xfer->status = status; 2212 DPRINTFN(2, ("ohci_abort_xfer: waiting for abort to finish\n")); 2213 xfer->hcflags |= UXFER_ABORTWAIT; 2214 while (xfer->hcflags & UXFER_ABORTING) 2215 tsleep(&xfer->hcflags, PZERO, "ohciaw", 0); 2216 return; 2217 } 2218 xfer->hcflags |= UXFER_ABORTING; 2219 2220 /* 2221 * Step 1: Make interrupt routine and hardware ignore xfer. 2222 */ 2223 s = splusb(); 2224 xfer->status = status; /* make software ignore it */ 2225 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 2226 splx(s); 2227 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed)); 2228 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */ 2229 2230 /* 2231 * Step 2: Wait until we know hardware has finished any possible 2232 * use of the xfer. Also make sure the soft interrupt routine 2233 * has run. 2234 */ 2235 usb_delay_ms(opipe->pipe.device->bus, 20); /* Hardware finishes in 1ms */ 2236 s = splusb(); 2237 #ifdef USB_USE_SOFTINTR 2238 sc->sc_softwake = 1; 2239 #endif /* USB_USE_SOFTINTR */ 2240 usb_schedsoftintr(&sc->sc_bus); 2241 #ifdef USB_USE_SOFTINTR 2242 tsleep(&sc->sc_softwake, PZERO, "ohciab", 0); 2243 #endif /* USB_USE_SOFTINTR */ 2244 splx(s); 2245 2246 /* 2247 * Step 3: Remove any vestiges of the xfer from the hardware. 2248 * The complication here is that the hardware may have executed 2249 * beyond the xfer we're trying to abort. So as we're scanning 2250 * the TDs of this xfer we check if the hardware points to 2251 * any of them. 2252 */ 2253 s = splusb(); /* XXX why? */ 2254 p = xfer->hcpriv; 2255 #ifdef DIAGNOSTIC 2256 if (p == NULL) { 2257 xfer->hcflags &= ~UXFER_ABORTING; /* XXX */ 2258 splx(s); 2259 printf("ohci_abort_xfer: hcpriv is NULL\n"); 2260 return; 2261 } 2262 #endif 2263 #ifdef OHCI_DEBUG 2264 if (ohcidebug > 1) { 2265 DPRINTF(("ohci_abort_xfer: sed=\n")); 2266 ohci_dump_ed(sc, sed); 2267 ohci_dump_tds(sc, p); 2268 } 2269 #endif 2270 headp = O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK; 2271 hit = 0; 2272 for (; p->xfer == xfer; p = n) { 2273 hit |= headp == p->physaddr; 2274 n = p->nexttd; 2275 ohci_free_std(sc, p); 2276 } 2277 /* Zap headp register if hardware pointed inside the xfer. */ 2278 if (hit) { 2279 DPRINTFN(1,("ohci_abort_xfer: set hd=0x%08x, tl=0x%08x\n", 2280 (int)p->physaddr, (int)O32TOH(sed->ed.ed_tailp))); 2281 sed->ed.ed_headp = HTOO32(p->physaddr); /* unlink TDs */ 2282 } else { 2283 DPRINTFN(1,("ohci_abort_xfer: no hit\n")); 2284 } 2285 2286 /* 2287 * Step 4: Turn on hardware again. 2288 */ 2289 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */ 2290 2291 /* 2292 * Step 5: Execute callback. 2293 */ 2294 wake = xfer->hcflags & UXFER_ABORTWAIT; 2295 xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT); 2296 usb_transfer_complete(xfer); 2297 if (wake) 2298 wakeup(&xfer->hcflags); 2299 2300 splx(s); 2301 } 2302 2303 /* 2304 * Data structures and routines to emulate the root hub. 2305 */ 2306 Static usb_device_descriptor_t ohci_devd = { 2307 USB_DEVICE_DESCRIPTOR_SIZE, 2308 UDESC_DEVICE, /* type */ 2309 {0x00, 0x01}, /* USB version */ 2310 UDCLASS_HUB, /* class */ 2311 UDSUBCLASS_HUB, /* subclass */ 2312 UDPROTO_FSHUB, 2313 64, /* max packet */ 2314 {0},{0},{0x00,0x01}, /* device id */ 2315 1,2,0, /* string indicies */ 2316 1 /* # of configurations */ 2317 }; 2318 2319 Static usb_config_descriptor_t ohci_confd = { 2320 USB_CONFIG_DESCRIPTOR_SIZE, 2321 UDESC_CONFIG, 2322 {USB_CONFIG_DESCRIPTOR_SIZE + 2323 USB_INTERFACE_DESCRIPTOR_SIZE + 2324 USB_ENDPOINT_DESCRIPTOR_SIZE}, 2325 1, 2326 1, 2327 0, 2328 UC_SELF_POWERED, 2329 0 /* max power */ 2330 }; 2331 2332 Static usb_interface_descriptor_t ohci_ifcd = { 2333 USB_INTERFACE_DESCRIPTOR_SIZE, 2334 UDESC_INTERFACE, 2335 0, 2336 0, 2337 1, 2338 UICLASS_HUB, 2339 UISUBCLASS_HUB, 2340 UIPROTO_FSHUB, 2341 0 2342 }; 2343 2344 Static usb_endpoint_descriptor_t ohci_endpd = { 2345 USB_ENDPOINT_DESCRIPTOR_SIZE, 2346 UDESC_ENDPOINT, 2347 UE_DIR_IN | OHCI_INTR_ENDPT, 2348 UE_INTERRUPT, 2349 {8, 0}, /* max packet */ 2350 255 2351 }; 2352 2353 Static usb_hub_descriptor_t ohci_hubd = { 2354 USB_HUB_DESCRIPTOR_SIZE, 2355 UDESC_HUB, 2356 0, 2357 {0,0}, 2358 0, 2359 0, 2360 {0}, 2361 }; 2362 2363 Static int 2364 ohci_str(usb_string_descriptor_t *p, int l, const char *s) 2365 { 2366 int i; 2367 2368 if (l == 0) 2369 return (0); 2370 p->bLength = 2 * strlen(s) + 2; 2371 if (l == 1) 2372 return (1); 2373 p->bDescriptorType = UDESC_STRING; 2374 l -= 2; 2375 for (i = 0; s[i] && l > 1; i++, l -= 2) 2376 USETW2(p->bString[i], 0, s[i]); 2377 return (2*i+2); 2378 } 2379 2380 /* 2381 * Simulate a hardware hub by handling all the necessary requests. 2382 */ 2383 Static usbd_status 2384 ohci_root_ctrl_transfer(usbd_xfer_handle xfer) 2385 { 2386 usbd_status err; 2387 2388 /* Insert last in queue. */ 2389 err = usb_insert_transfer(xfer); 2390 if (err) 2391 return (err); 2392 2393 /* Pipe isn't running, start first */ 2394 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2395 } 2396 2397 Static usbd_status 2398 ohci_root_ctrl_start(usbd_xfer_handle xfer) 2399 { 2400 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2401 usb_device_request_t *req; 2402 void *buf = NULL; 2403 int port, i; 2404 int s, len, value, index, l, totlen = 0; 2405 usb_port_status_t ps; 2406 usb_hub_descriptor_t hubd; 2407 usbd_status err; 2408 u_int32_t v; 2409 2410 if (sc->sc_dying) 2411 return (USBD_IOERROR); 2412 2413 #ifdef DIAGNOSTIC 2414 if (!(xfer->rqflags & URQ_REQUEST)) 2415 /* XXX panic */ 2416 return (USBD_INVAL); 2417 #endif 2418 req = &xfer->request; 2419 2420 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 2421 req->bmRequestType, req->bRequest)); 2422 2423 len = UGETW(req->wLength); 2424 value = UGETW(req->wValue); 2425 index = UGETW(req->wIndex); 2426 2427 if (len != 0) 2428 buf = KERNADDR(&xfer->dmabuf, 0); 2429 2430 #define C(x,y) ((x) | ((y) << 8)) 2431 switch(C(req->bRequest, req->bmRequestType)) { 2432 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 2433 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 2434 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 2435 /* 2436 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 2437 * for the integrated root hub. 2438 */ 2439 break; 2440 case C(UR_GET_CONFIG, UT_READ_DEVICE): 2441 if (len > 0) { 2442 *(u_int8_t *)buf = sc->sc_conf; 2443 totlen = 1; 2444 } 2445 break; 2446 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2447 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 2448 switch(value >> 8) { 2449 case UDESC_DEVICE: 2450 if ((value & 0xff) != 0) { 2451 err = USBD_IOERROR; 2452 goto ret; 2453 } 2454 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 2455 USETW(ohci_devd.idVendor, sc->sc_id_vendor); 2456 memcpy(buf, &ohci_devd, l); 2457 break; 2458 case UDESC_CONFIG: 2459 if ((value & 0xff) != 0) { 2460 err = USBD_IOERROR; 2461 goto ret; 2462 } 2463 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 2464 memcpy(buf, &ohci_confd, l); 2465 buf = (char *)buf + l; 2466 len -= l; 2467 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 2468 totlen += l; 2469 memcpy(buf, &ohci_ifcd, l); 2470 buf = (char *)buf + l; 2471 len -= l; 2472 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 2473 totlen += l; 2474 memcpy(buf, &ohci_endpd, l); 2475 break; 2476 case UDESC_STRING: 2477 if (len == 0) 2478 break; 2479 *(u_int8_t *)buf = 0; 2480 totlen = 1; 2481 switch (value & 0xff) { 2482 case 0: /* Language table */ 2483 totlen = ohci_str(buf, len, "\001"); 2484 break; 2485 case 1: /* Vendor */ 2486 totlen = ohci_str(buf, len, sc->sc_vendor); 2487 break; 2488 case 2: /* Product */ 2489 totlen = ohci_str(buf, len, "OHCI root hub"); 2490 break; 2491 } 2492 break; 2493 default: 2494 err = USBD_IOERROR; 2495 goto ret; 2496 } 2497 break; 2498 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 2499 if (len > 0) { 2500 *(u_int8_t *)buf = 0; 2501 totlen = 1; 2502 } 2503 break; 2504 case C(UR_GET_STATUS, UT_READ_DEVICE): 2505 if (len > 1) { 2506 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 2507 totlen = 2; 2508 } 2509 break; 2510 case C(UR_GET_STATUS, UT_READ_INTERFACE): 2511 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 2512 if (len > 1) { 2513 USETW(((usb_status_t *)buf)->wStatus, 0); 2514 totlen = 2; 2515 } 2516 break; 2517 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 2518 if (value >= USB_MAX_DEVICES) { 2519 err = USBD_IOERROR; 2520 goto ret; 2521 } 2522 sc->sc_addr = value; 2523 break; 2524 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 2525 if (value != 0 && value != 1) { 2526 err = USBD_IOERROR; 2527 goto ret; 2528 } 2529 sc->sc_conf = value; 2530 break; 2531 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 2532 break; 2533 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 2534 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 2535 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 2536 err = USBD_IOERROR; 2537 goto ret; 2538 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 2539 break; 2540 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 2541 break; 2542 /* Hub requests */ 2543 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2544 break; 2545 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2546 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 2547 "port=%d feature=%d\n", 2548 index, value)); 2549 if (index < 1 || index > sc->sc_noport) { 2550 err = USBD_IOERROR; 2551 goto ret; 2552 } 2553 port = OHCI_RH_PORT_STATUS(index); 2554 switch(value) { 2555 case UHF_PORT_ENABLE: 2556 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2557 break; 2558 case UHF_PORT_SUSPEND: 2559 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2560 break; 2561 case UHF_PORT_POWER: 2562 /* Yes, writing to the LOW_SPEED bit clears power. */ 2563 OWRITE4(sc, port, UPS_LOW_SPEED); 2564 break; 2565 case UHF_C_PORT_CONNECTION: 2566 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2567 break; 2568 case UHF_C_PORT_ENABLE: 2569 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2570 break; 2571 case UHF_C_PORT_SUSPEND: 2572 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2573 break; 2574 case UHF_C_PORT_OVER_CURRENT: 2575 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2576 break; 2577 case UHF_C_PORT_RESET: 2578 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2579 break; 2580 default: 2581 err = USBD_IOERROR; 2582 goto ret; 2583 } 2584 switch(value) { 2585 case UHF_C_PORT_CONNECTION: 2586 case UHF_C_PORT_ENABLE: 2587 case UHF_C_PORT_SUSPEND: 2588 case UHF_C_PORT_OVER_CURRENT: 2589 case UHF_C_PORT_RESET: 2590 /* Enable RHSC interrupt if condition is cleared. */ 2591 if ((OREAD4(sc, port) >> 16) == 0) 2592 ohci_rhsc_enable(sc); 2593 break; 2594 default: 2595 break; 2596 } 2597 break; 2598 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2599 if ((value & 0xff) != 0) { 2600 err = USBD_IOERROR; 2601 goto ret; 2602 } 2603 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2604 hubd = ohci_hubd; 2605 hubd.bNbrPorts = sc->sc_noport; 2606 USETW(hubd.wHubCharacteristics, 2607 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2608 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2609 /* XXX overcurrent */ 2610 ); 2611 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2612 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2613 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2614 hubd.DeviceRemovable[i++] = (u_int8_t)v; 2615 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2616 l = min(len, hubd.bDescLength); 2617 totlen = l; 2618 memcpy(buf, &hubd, l); 2619 break; 2620 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2621 if (len != 4) { 2622 err = USBD_IOERROR; 2623 goto ret; 2624 } 2625 memset(buf, 0, len); /* ? XXX */ 2626 totlen = len; 2627 break; 2628 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2629 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 2630 index)); 2631 if (index < 1 || index > sc->sc_noport) { 2632 err = USBD_IOERROR; 2633 goto ret; 2634 } 2635 if (len != 4) { 2636 err = USBD_IOERROR; 2637 goto ret; 2638 } 2639 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2640 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 2641 v)); 2642 USETW(ps.wPortStatus, v); 2643 USETW(ps.wPortChange, v >> 16); 2644 l = min(len, sizeof ps); 2645 memcpy(buf, &ps, l); 2646 totlen = l; 2647 break; 2648 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2649 err = USBD_IOERROR; 2650 goto ret; 2651 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2652 break; 2653 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2654 if (index < 1 || index > sc->sc_noport) { 2655 err = USBD_IOERROR; 2656 goto ret; 2657 } 2658 port = OHCI_RH_PORT_STATUS(index); 2659 switch(value) { 2660 case UHF_PORT_ENABLE: 2661 OWRITE4(sc, port, UPS_PORT_ENABLED); 2662 break; 2663 case UHF_PORT_SUSPEND: 2664 OWRITE4(sc, port, UPS_SUSPEND); 2665 break; 2666 case UHF_PORT_RESET: 2667 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 2668 index)); 2669 OWRITE4(sc, port, UPS_RESET); 2670 for (i = 0; i < 5; i++) { 2671 usb_delay_ms(&sc->sc_bus, 2672 USB_PORT_ROOT_RESET_DELAY); 2673 if (sc->sc_dying) { 2674 err = USBD_IOERROR; 2675 goto ret; 2676 } 2677 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2678 break; 2679 } 2680 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 2681 index, OREAD4(sc, port))); 2682 break; 2683 case UHF_PORT_POWER: 2684 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 2685 "%d\n", index)); 2686 OWRITE4(sc, port, UPS_PORT_POWER); 2687 break; 2688 default: 2689 err = USBD_IOERROR; 2690 goto ret; 2691 } 2692 break; 2693 default: 2694 err = USBD_IOERROR; 2695 goto ret; 2696 } 2697 xfer->actlen = totlen; 2698 err = USBD_NORMAL_COMPLETION; 2699 ret: 2700 xfer->status = err; 2701 s = splusb(); 2702 usb_transfer_complete(xfer); 2703 splx(s); 2704 return (USBD_IN_PROGRESS); 2705 } 2706 2707 /* Abort a root control request. */ 2708 Static void 2709 ohci_root_ctrl_abort(usbd_xfer_handle xfer) 2710 { 2711 /* Nothing to do, all transfers are synchronous. */ 2712 } 2713 2714 /* Close the root pipe. */ 2715 Static void 2716 ohci_root_ctrl_close(usbd_pipe_handle pipe) 2717 { 2718 DPRINTF(("ohci_root_ctrl_close\n")); 2719 /* Nothing to do. */ 2720 } 2721 2722 Static usbd_status 2723 ohci_root_intr_transfer(usbd_xfer_handle xfer) 2724 { 2725 usbd_status err; 2726 2727 /* Insert last in queue. */ 2728 err = usb_insert_transfer(xfer); 2729 if (err) 2730 return (err); 2731 2732 /* Pipe isn't running, start first */ 2733 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2734 } 2735 2736 Static usbd_status 2737 ohci_root_intr_start(usbd_xfer_handle xfer) 2738 { 2739 usbd_pipe_handle pipe = xfer->pipe; 2740 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2741 2742 if (sc->sc_dying) 2743 return (USBD_IOERROR); 2744 2745 sc->sc_intrxfer = xfer; 2746 2747 return (USBD_IN_PROGRESS); 2748 } 2749 2750 /* Abort a root interrupt request. */ 2751 Static void 2752 ohci_root_intr_abort(usbd_xfer_handle xfer) 2753 { 2754 int s; 2755 2756 if (xfer->pipe->intrxfer == xfer) { 2757 DPRINTF(("ohci_root_intr_abort: remove\n")); 2758 xfer->pipe->intrxfer = NULL; 2759 } 2760 xfer->status = USBD_CANCELLED; 2761 s = splusb(); 2762 usb_transfer_complete(xfer); 2763 splx(s); 2764 } 2765 2766 /* Close the root pipe. */ 2767 Static void 2768 ohci_root_intr_close(usbd_pipe_handle pipe) 2769 { 2770 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2771 2772 DPRINTF(("ohci_root_intr_close\n")); 2773 2774 sc->sc_intrxfer = NULL; 2775 } 2776 2777 /************************/ 2778 2779 Static usbd_status 2780 ohci_device_ctrl_transfer(usbd_xfer_handle xfer) 2781 { 2782 usbd_status err; 2783 2784 /* Insert last in queue. */ 2785 err = usb_insert_transfer(xfer); 2786 if (err) 2787 return (err); 2788 2789 /* Pipe isn't running, start first */ 2790 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2791 } 2792 2793 Static usbd_status 2794 ohci_device_ctrl_start(usbd_xfer_handle xfer) 2795 { 2796 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2797 usbd_status err; 2798 2799 if (sc->sc_dying) 2800 return (USBD_IOERROR); 2801 2802 #ifdef DIAGNOSTIC 2803 if (!(xfer->rqflags & URQ_REQUEST)) { 2804 /* XXX panic */ 2805 printf("ohci_device_ctrl_transfer: not a request\n"); 2806 return (USBD_INVAL); 2807 } 2808 #endif 2809 2810 err = ohci_device_request(xfer); 2811 if (err) 2812 return (err); 2813 2814 if (sc->sc_bus.use_polling) 2815 ohci_waitintr(sc, xfer); 2816 return (USBD_IN_PROGRESS); 2817 } 2818 2819 /* Abort a device control request. */ 2820 Static void 2821 ohci_device_ctrl_abort(usbd_xfer_handle xfer) 2822 { 2823 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer)); 2824 ohci_abort_xfer(xfer, USBD_CANCELLED); 2825 } 2826 2827 /* Close a device control pipe. */ 2828 Static void 2829 ohci_device_ctrl_close(usbd_pipe_handle pipe) 2830 { 2831 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2832 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2833 2834 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe)); 2835 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2836 ohci_free_std(sc, opipe->tail.td); 2837 } 2838 2839 /************************/ 2840 2841 Static void 2842 ohci_device_clear_toggle(usbd_pipe_handle pipe) 2843 { 2844 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2845 #ifdef OHCI_DYNAMIC_ENDIAN 2846 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2847 #endif 2848 2849 opipe->sed->ed.ed_headp &= HTOO32(~OHCI_TOGGLECARRY); 2850 } 2851 2852 Static void 2853 ohci_noop(usbd_pipe_handle pipe) 2854 { 2855 } 2856 2857 Static usbd_status 2858 ohci_device_bulk_transfer(usbd_xfer_handle xfer) 2859 { 2860 usbd_status err; 2861 2862 /* Insert last in queue. */ 2863 err = usb_insert_transfer(xfer); 2864 if (err) 2865 return (err); 2866 2867 /* Pipe isn't running, start first */ 2868 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2869 } 2870 2871 Static usbd_status 2872 ohci_device_bulk_start(usbd_xfer_handle xfer) 2873 { 2874 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2875 usbd_device_handle dev = opipe->pipe.device; 2876 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2877 int addr = dev->address; 2878 ohci_soft_td_t *data, *tail, *tdp; 2879 ohci_soft_ed_t *sed; 2880 int s, len, isread, endpt; 2881 usbd_status err; 2882 2883 if (sc->sc_dying) 2884 return (USBD_IOERROR); 2885 2886 #ifdef DIAGNOSTIC 2887 if (xfer->rqflags & URQ_REQUEST) { 2888 /* XXX panic */ 2889 printf("ohci_device_bulk_start: a request\n"); 2890 return (USBD_INVAL); 2891 } 2892 #endif 2893 2894 len = xfer->length; 2895 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 2896 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2897 sed = opipe->sed; 2898 2899 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d " 2900 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags, 2901 endpt)); 2902 2903 opipe->u.bulk.isread = isread; 2904 opipe->u.bulk.length = len; 2905 2906 /* Update device address */ 2907 sed->ed.ed_flags = HTOO32( 2908 (O32TOH(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) | 2909 OHCI_ED_SET_FA(addr)); 2910 2911 /* Allocate a chain of new TDs (including a new tail). */ 2912 data = opipe->tail.td; 2913 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 2914 data, &tail); 2915 /* We want interrupt at the end of the transfer. */ 2916 tail->td.td_flags &= HTOO32(~OHCI_TD_INTR_MASK); 2917 tail->td.td_flags |= HTOO32(OHCI_TD_SET_DI(1)); 2918 tail->flags |= OHCI_CALL_DONE; 2919 tail = tail->nexttd; /* point at sentinel */ 2920 if (err) 2921 return (err); 2922 2923 tail->xfer = NULL; 2924 xfer->hcpriv = data; 2925 2926 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x " 2927 "td_cbp=0x%08x td_be=0x%08x\n", 2928 (int)O32TOH(sed->ed.ed_flags), 2929 (int)O32TOH(data->td.td_flags), 2930 (int)O32TOH(data->td.td_cbp), 2931 (int)O32TOH(data->td.td_be))); 2932 2933 #ifdef OHCI_DEBUG 2934 if (ohcidebug > 5) { 2935 ohci_dump_ed(sc, sed); 2936 ohci_dump_tds(sc, data); 2937 } 2938 #endif 2939 2940 /* Insert ED in schedule */ 2941 s = splusb(); 2942 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 2943 tdp->xfer = xfer; 2944 } 2945 sed->ed.ed_tailp = HTOO32(tail->physaddr); 2946 opipe->tail.td = tail; 2947 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 2948 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 2949 if (xfer->timeout && !sc->sc_bus.use_polling) { 2950 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2951 ohci_timeout, xfer); 2952 } 2953 2954 #if 0 2955 /* This goes wrong if we are too slow. */ 2956 if (ohcidebug > 10) { 2957 delay(10000); 2958 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2959 OREAD4(sc, OHCI_COMMAND_STATUS))); 2960 ohci_dump_ed(sc, sed); 2961 ohci_dump_tds(sc, data); 2962 } 2963 #endif 2964 2965 splx(s); 2966 2967 return (USBD_IN_PROGRESS); 2968 } 2969 2970 Static void 2971 ohci_device_bulk_abort(usbd_xfer_handle xfer) 2972 { 2973 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer)); 2974 ohci_abort_xfer(xfer, USBD_CANCELLED); 2975 } 2976 2977 /* 2978 * Close a device bulk pipe. 2979 */ 2980 Static void 2981 ohci_device_bulk_close(usbd_pipe_handle pipe) 2982 { 2983 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2984 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2985 2986 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe)); 2987 ohci_close_pipe(pipe, sc->sc_bulk_head); 2988 ohci_free_std(sc, opipe->tail.td); 2989 } 2990 2991 /************************/ 2992 2993 Static usbd_status 2994 ohci_device_intr_transfer(usbd_xfer_handle xfer) 2995 { 2996 usbd_status err; 2997 2998 /* Insert last in queue. */ 2999 err = usb_insert_transfer(xfer); 3000 if (err) 3001 return (err); 3002 3003 /* Pipe isn't running, start first */ 3004 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 3005 } 3006 3007 Static usbd_status 3008 ohci_device_intr_start(usbd_xfer_handle xfer) 3009 { 3010 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3011 usbd_device_handle dev = opipe->pipe.device; 3012 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 3013 ohci_soft_ed_t *sed = opipe->sed; 3014 ohci_soft_td_t *data, *tail; 3015 int s, len, isread, endpt; 3016 3017 if (sc->sc_dying) 3018 return (USBD_IOERROR); 3019 3020 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d " 3021 "flags=%d priv=%p\n", 3022 xfer, xfer->length, xfer->flags, xfer->priv)); 3023 3024 #ifdef DIAGNOSTIC 3025 if (xfer->rqflags & URQ_REQUEST) 3026 panic("ohci_device_intr_transfer: a request"); 3027 #endif 3028 3029 len = xfer->length; 3030 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 3031 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3032 3033 data = opipe->tail.td; 3034 tail = ohci_alloc_std(sc); 3035 if (tail == NULL) 3036 return (USBD_NOMEM); 3037 tail->xfer = NULL; 3038 3039 data->td.td_flags = HTOO32( 3040 isread ? OHCI_TD_IN : OHCI_TD_OUT | 3041 OHCI_TD_NOCC | 3042 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 3043 if (xfer->flags & USBD_SHORT_XFER_OK) 3044 data->td.td_flags |= HTOO32(OHCI_TD_R); 3045 data->td.td_cbp = HTOO32(DMAADDR(&xfer->dmabuf, 0)); 3046 data->nexttd = tail; 3047 data->td.td_nexttd = HTOO32(tail->physaddr); 3048 data->td.td_be = HTOO32(O32TOH(data->td.td_cbp) + len - 1); 3049 data->len = len; 3050 data->xfer = xfer; 3051 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 3052 xfer->hcpriv = data; 3053 3054 #ifdef OHCI_DEBUG 3055 if (ohcidebug > 5) { 3056 DPRINTF(("ohci_device_intr_transfer:\n")); 3057 ohci_dump_ed(sc, sed); 3058 ohci_dump_tds(sc, data); 3059 } 3060 #endif 3061 3062 /* Insert ED in schedule */ 3063 s = splusb(); 3064 sed->ed.ed_tailp = HTOO32(tail->physaddr); 3065 opipe->tail.td = tail; 3066 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3067 3068 #if 0 3069 /* 3070 * This goes horribly wrong, printing thousands of descriptors, 3071 * because false references are followed due to the fact that the 3072 * TD is gone. 3073 */ 3074 if (ohcidebug > 5) { 3075 usb_delay_ms(&sc->sc_bus, 5); 3076 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 3077 OREAD4(sc, OHCI_COMMAND_STATUS))); 3078 ohci_dump_ed(sc, sed); 3079 ohci_dump_tds(sc, data); 3080 } 3081 #endif 3082 splx(s); 3083 3084 return (USBD_IN_PROGRESS); 3085 } 3086 3087 /* Abort a device control request. */ 3088 Static void 3089 ohci_device_intr_abort(usbd_xfer_handle xfer) 3090 { 3091 if (xfer->pipe->intrxfer == xfer) { 3092 DPRINTF(("ohci_device_intr_abort: remove\n")); 3093 xfer->pipe->intrxfer = NULL; 3094 } 3095 ohci_abort_xfer(xfer, USBD_CANCELLED); 3096 } 3097 3098 /* Close a device interrupt pipe. */ 3099 Static void 3100 ohci_device_intr_close(usbd_pipe_handle pipe) 3101 { 3102 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3103 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3104 int nslots = opipe->u.intr.nslots; 3105 int pos = opipe->u.intr.pos; 3106 int j; 3107 ohci_soft_ed_t *p, *sed = opipe->sed; 3108 int s; 3109 3110 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 3111 pipe, nslots, pos)); 3112 s = splusb(); 3113 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 3114 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 3115 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) 3116 usb_delay_ms(&sc->sc_bus, 2); 3117 3118 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 3119 ; 3120 #ifdef DIAGNOSTIC 3121 if (p == NULL) 3122 panic("ohci_device_intr_close: ED not found"); 3123 #endif 3124 p->next = sed->next; 3125 p->ed.ed_nexted = sed->ed.ed_nexted; 3126 splx(s); 3127 3128 for (j = 0; j < nslots; j++) 3129 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 3130 3131 ohci_free_std(sc, opipe->tail.td); 3132 ohci_free_sed(sc, opipe->sed); 3133 } 3134 3135 Static usbd_status 3136 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival) 3137 { 3138 int i, j, s, best; 3139 u_int npoll, slow, shigh, nslots; 3140 u_int bestbw, bw; 3141 ohci_soft_ed_t *hsed, *sed = opipe->sed; 3142 3143 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 3144 if (ival == 0) { 3145 printf("ohci_setintr: 0 interval\n"); 3146 return (USBD_INVAL); 3147 } 3148 3149 npoll = OHCI_NO_INTRS; 3150 while (npoll > ival) 3151 npoll /= 2; 3152 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 3153 3154 /* 3155 * We now know which level in the tree the ED must go into. 3156 * Figure out which slot has most bandwidth left over. 3157 * Slots to examine: 3158 * npoll 3159 * 1 0 3160 * 2 1 2 3161 * 4 3 4 5 6 3162 * 8 7 8 9 10 11 12 13 14 3163 * N (N-1) .. (N-1+N-1) 3164 */ 3165 slow = npoll-1; 3166 shigh = slow + npoll; 3167 nslots = OHCI_NO_INTRS / npoll; 3168 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 3169 bw = 0; 3170 for (j = 0; j < nslots; j++) 3171 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 3172 if (bw < bestbw) { 3173 best = i; 3174 bestbw = bw; 3175 } 3176 } 3177 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 3178 best, slow, shigh, bestbw)); 3179 3180 s = splusb(); 3181 hsed = sc->sc_eds[best]; 3182 sed->next = hsed->next; 3183 sed->ed.ed_nexted = hsed->ed.ed_nexted; 3184 hsed->next = sed; 3185 hsed->ed.ed_nexted = HTOO32(sed->physaddr); 3186 splx(s); 3187 3188 for (j = 0; j < nslots; j++) 3189 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 3190 opipe->u.intr.nslots = nslots; 3191 opipe->u.intr.pos = best; 3192 3193 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 3194 return (USBD_NORMAL_COMPLETION); 3195 } 3196 3197 /***********************/ 3198 3199 usbd_status 3200 ohci_device_isoc_transfer(usbd_xfer_handle xfer) 3201 { 3202 usbd_status err; 3203 3204 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer)); 3205 3206 /* Put it on our queue, */ 3207 err = usb_insert_transfer(xfer); 3208 3209 /* bail out on error, */ 3210 if (err && err != USBD_IN_PROGRESS) 3211 return (err); 3212 3213 /* XXX should check inuse here */ 3214 3215 /* insert into schedule, */ 3216 ohci_device_isoc_enter(xfer); 3217 3218 /* and start if the pipe wasn't running */ 3219 if (!err) 3220 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 3221 3222 return (err); 3223 } 3224 3225 void 3226 ohci_device_isoc_enter(usbd_xfer_handle xfer) 3227 { 3228 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3229 usbd_device_handle dev = opipe->pipe.device; 3230 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 3231 ohci_soft_ed_t *sed = opipe->sed; 3232 struct iso *iso = &opipe->u.iso; 3233 ohci_soft_itd_t *sitd, *nsitd; 3234 ohci_physaddr_t buf, offs, noffs, bp0; 3235 int i, ncur, nframes; 3236 int s; 3237 3238 DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p " 3239 "nframes=%d\n", 3240 iso->inuse, iso->next, xfer, xfer->nframes)); 3241 3242 if (sc->sc_dying) 3243 return; 3244 3245 if (iso->next == -1) { 3246 /* Not in use yet, schedule it a few frames ahead. */ 3247 iso->next = O32TOH(sc->sc_hcca->hcca_frame_number) + 5; 3248 DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n", 3249 iso->next)); 3250 } 3251 3252 sitd = opipe->tail.itd; 3253 buf = DMAADDR(&xfer->dmabuf, 0); 3254 bp0 = OHCI_PAGE(buf); 3255 offs = OHCI_PAGE_OFFSET(buf); 3256 nframes = xfer->nframes; 3257 xfer->hcpriv = sitd; 3258 for (i = ncur = 0; i < nframes; i++, ncur++) { 3259 noffs = offs + xfer->frlengths[i]; 3260 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ 3261 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */ 3262 3263 /* Allocate next ITD */ 3264 nsitd = ohci_alloc_sitd(sc); 3265 if (nsitd == NULL) { 3266 /* XXX what now? */ 3267 printf("%s: isoc TD alloc failed\n", 3268 USBDEVNAME(sc->sc_bus.bdev)); 3269 return; 3270 } 3271 3272 /* Fill current ITD */ 3273 sitd->itd.itd_flags = HTOO32( 3274 OHCI_ITD_NOCC | 3275 OHCI_ITD_SET_SF(iso->next) | 3276 OHCI_ITD_SET_DI(6) | /* delay intr a little */ 3277 OHCI_ITD_SET_FC(ncur)); 3278 sitd->itd.itd_bp0 = HTOO32(bp0); 3279 sitd->nextitd = nsitd; 3280 sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr); 3281 sitd->itd.itd_be = HTOO32(bp0 + offs - 1); 3282 sitd->xfer = xfer; 3283 sitd->flags = 0; 3284 3285 sitd = nsitd; 3286 iso->next = iso->next + ncur; 3287 bp0 = OHCI_PAGE(buf + offs); 3288 ncur = 0; 3289 } 3290 sitd->itd.itd_offset[ncur] = HTOO16(OHCI_ITD_MK_OFFS(offs)); 3291 offs = noffs; 3292 } 3293 nsitd = ohci_alloc_sitd(sc); 3294 if (nsitd == NULL) { 3295 /* XXX what now? */ 3296 printf("%s: isoc TD alloc failed\n", 3297 USBDEVNAME(sc->sc_bus.bdev)); 3298 return; 3299 } 3300 /* Fixup last used ITD */ 3301 sitd->itd.itd_flags = HTOO32( 3302 OHCI_ITD_NOCC | 3303 OHCI_ITD_SET_SF(iso->next) | 3304 OHCI_ITD_SET_DI(0) | 3305 OHCI_ITD_SET_FC(ncur)); 3306 sitd->itd.itd_bp0 = HTOO32(bp0); 3307 sitd->nextitd = nsitd; 3308 sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr); 3309 sitd->itd.itd_be = HTOO32(bp0 + offs - 1); 3310 sitd->xfer = xfer; 3311 sitd->flags = OHCI_CALL_DONE; 3312 3313 iso->next = iso->next + ncur; 3314 iso->inuse += nframes; 3315 3316 xfer->actlen = offs; /* XXX pretend we did it all */ 3317 3318 xfer->status = USBD_IN_PROGRESS; 3319 3320 #ifdef OHCI_DEBUG 3321 if (ohcidebug > 5) { 3322 DPRINTF(("ohci_device_isoc_enter: frame=%d\n", 3323 O32TOH(sc->sc_hcca->hcca_frame_number))); 3324 ohci_dump_itds(sc, xfer->hcpriv); 3325 ohci_dump_ed(sc, sed); 3326 } 3327 #endif 3328 3329 s = splusb(); 3330 sed->ed.ed_tailp = HTOO32(nsitd->physaddr); 3331 opipe->tail.itd = nsitd; 3332 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3333 splx(s); 3334 3335 #ifdef OHCI_DEBUG 3336 if (ohcidebug > 5) { 3337 delay(150000); 3338 DPRINTF(("ohci_device_isoc_enter: after frame=%d\n", 3339 O32TOH(sc->sc_hcca->hcca_frame_number))); 3340 ohci_dump_itds(sc, xfer->hcpriv); 3341 ohci_dump_ed(sc, sed); 3342 } 3343 #endif 3344 } 3345 3346 usbd_status 3347 ohci_device_isoc_start(usbd_xfer_handle xfer) 3348 { 3349 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3350 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3351 3352 DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer)); 3353 3354 if (sc->sc_dying) 3355 return (USBD_IOERROR); 3356 3357 #ifdef DIAGNOSTIC 3358 if (xfer->status != USBD_IN_PROGRESS) 3359 printf("ohci_device_isoc_start: not in progress %p\n", xfer); 3360 #endif 3361 3362 /* XXX anything to do? */ 3363 3364 return (USBD_IN_PROGRESS); 3365 } 3366 3367 void 3368 ohci_device_isoc_abort(usbd_xfer_handle xfer) 3369 { 3370 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3371 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3372 ohci_soft_ed_t *sed; 3373 ohci_soft_itd_t *sitd; 3374 int s; 3375 3376 s = splusb(); 3377 3378 DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer)); 3379 3380 /* Transfer is already done. */ 3381 if (xfer->status != USBD_NOT_STARTED && 3382 xfer->status != USBD_IN_PROGRESS) { 3383 splx(s); 3384 printf("ohci_device_isoc_abort: early return\n"); 3385 return; 3386 } 3387 3388 /* Give xfer the requested abort code. */ 3389 xfer->status = USBD_CANCELLED; 3390 3391 sed = opipe->sed; 3392 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */ 3393 3394 sitd = xfer->hcpriv; 3395 #ifdef DIAGNOSTIC 3396 if (sitd == NULL) { 3397 splx(s); 3398 printf("ohci_device_isoc_abort: hcpriv==0\n"); 3399 return; 3400 } 3401 #endif 3402 for (; sitd->xfer == xfer; sitd = sitd->nextitd) { 3403 #ifdef DIAGNOSTIC 3404 DPRINTFN(1,("abort sets done sitd=%p\n", sitd)); 3405 sitd->isdone = 1; 3406 #endif 3407 } 3408 3409 splx(s); 3410 3411 usb_delay_ms(&sc->sc_bus, OHCI_ITD_NOFFSET); 3412 3413 s = splusb(); 3414 3415 /* Run callback. */ 3416 usb_transfer_complete(xfer); 3417 3418 sed->ed.ed_headp = HTOO32(sitd->physaddr); /* unlink TDs */ 3419 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */ 3420 3421 splx(s); 3422 } 3423 3424 void 3425 ohci_device_isoc_done(usbd_xfer_handle xfer) 3426 { 3427 DPRINTFN(1,("ohci_device_isoc_done: xfer=%p\n", xfer)); 3428 } 3429 3430 usbd_status 3431 ohci_setup_isoc(usbd_pipe_handle pipe) 3432 { 3433 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3434 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3435 struct iso *iso = &opipe->u.iso; 3436 int s; 3437 3438 iso->next = -1; 3439 iso->inuse = 0; 3440 3441 s = splusb(); 3442 ohci_add_ed(sc, opipe->sed, sc->sc_isoc_head); 3443 splx(s); 3444 3445 return (USBD_NORMAL_COMPLETION); 3446 } 3447 3448 void 3449 ohci_device_isoc_close(usbd_pipe_handle pipe) 3450 { 3451 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3452 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3453 3454 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe)); 3455 ohci_close_pipe(pipe, sc->sc_isoc_head); 3456 #ifdef DIAGNOSTIC 3457 opipe->tail.itd->isdone = 1; 3458 #endif 3459 ohci_free_sitd(sc, opipe->tail.itd); 3460 } 3461 3462 #ifdef OHCI_DYNAMIC_ENDIAN 3463 uint32_t 3464 ohci_htodev32(ohci_softc_t *sc, uint32_t val) 3465 { 3466 switch (sc->sc_endian) { 3467 default: 3468 case OHCI_LITTLE_ENDIAN: 3469 return (htole32(val)); 3470 3471 case OHCI_BIG_ENDIAN: 3472 return (htobe32(val)); 3473 3474 case OHCI_HOST_ENDIAN: 3475 return (val); 3476 } 3477 } 3478 3479 uint32_t 3480 ohci_dev32toh(ohci_softc_t *sc, uint32_t val) 3481 { 3482 switch (sc->sc_endian) { 3483 default: 3484 case OHCI_LITTLE_ENDIAN: 3485 return (le32toh(val)); 3486 3487 case OHCI_BIG_ENDIAN: 3488 return (be32toh(val)); 3489 3490 case OHCI_HOST_ENDIAN: 3491 return (val); 3492 } 3493 } 3494 3495 uint16_t 3496 ohci_htodev16(ohci_softc_t *sc, uint16_t val) 3497 { 3498 switch (sc->sc_endian) { 3499 case OHCI_LITTLE_ENDIAN: 3500 return (htole16(val)); 3501 3502 case OHCI_BIG_ENDIAN: 3503 return (htobe16(val)); 3504 3505 case OHCI_HOST_ENDIAN: 3506 default: 3507 return (val); 3508 } 3509 } 3510 3511 uint16_t 3512 ohci_dev16toh(ohci_softc_t *sc, uint16_t val) 3513 { 3514 switch (sc->sc_endian) { 3515 case OHCI_LITTLE_ENDIAN: 3516 return (le16toh(val)); 3517 3518 case OHCI_BIG_ENDIAN: 3519 return (be16toh(val)); 3520 3521 case OHCI_HOST_ENDIAN: 3522 default: 3523 return (val); 3524 } 3525 } 3526 3527 #endif /* OHCI_DYNAMIC_ENDIAN */ 3528
Indexes created Tue Sep 23 07:09:52 GMT 2025