ohci.c revision 1.169
1 /* $NetBSD: ohci.c,v 1.169 2005/12/19 21:57:27 tron Exp $ */ 2 /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */ 3 4 /* 5 * Copyright (c) 1998, 2004, 2005 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Lennart Augustsson (lennart (at) augustsson.net) at 10 * Carlstedt Research & Technology. 11 * This code is derived from software contributed to The NetBSD Foundation 12 * by Charles M. Hannum. 13 * 14 * Redistribution and use in source and binary forms, with or without 15 * modification, are permitted provided that the following conditions 16 * are met: 17 * 1. Redistributions of source code must retain the above copyright 18 * notice, this list of conditions and the following disclaimer. 19 * 2. Redistributions in binary form must reproduce the above copyright 20 * notice, this list of conditions and the following disclaimer in the 21 * documentation and/or other materials provided with the distribution. 22 * 3. All advertising materials mentioning features or use of this software 23 * must display the following acknowledgement: 24 * This product includes software developed by the NetBSD 25 * Foundation, Inc. and its contributors. 26 * 4. Neither the name of The NetBSD Foundation nor the names of its 27 * contributors may be used to endorse or promote products derived 28 * from this software without specific prior written permission. 29 * 30 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 31 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 32 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 33 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 34 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 35 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 36 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 37 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 38 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 39 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 40 * POSSIBILITY OF SUCH DAMAGE. 41 */ 42 43 /* 44 * USB Open Host Controller driver. 45 * 46 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html 47 * USB spec: http://www.usb.org/developers/docs/usbspec.zip 48 */ 49 50 #include <sys/cdefs.h> 51 __KERNEL_RCSID(0, "$NetBSD: ohci.c,v 1.169 2005/12/19 21:57:27 tron Exp $"); 52 53 #include <sys/param.h> 54 #include <sys/systm.h> 55 #include <sys/malloc.h> 56 #if defined(__NetBSD__) || defined(__OpenBSD__) 57 #include <sys/kernel.h> 58 #include <sys/device.h> 59 #include <sys/select.h> 60 #include <uvm/uvm_extern.h> 61 #elif defined(__FreeBSD__) 62 #include <sys/module.h> 63 #include <sys/bus.h> 64 #include <machine/bus_pio.h> 65 #include <machine/bus_memio.h> 66 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 67 #include <machine/cpu.h> 68 #endif 69 #endif 70 #include <sys/proc.h> 71 #include <sys/queue.h> 72 73 #include <machine/bus.h> 74 #include <machine/endian.h> 75 76 #include <dev/usb/usb.h> 77 #include <dev/usb/usbdi.h> 78 #include <dev/usb/usbdivar.h> 79 #include <dev/usb/usb_mem.h> 80 #include <dev/usb/usb_quirks.h> 81 82 #include <dev/usb/ohcireg.h> 83 #include <dev/usb/ohcivar.h> 84 85 #if defined(__FreeBSD__) 86 #include <machine/clock.h> 87 88 #define delay(d) DELAY(d) 89 #endif 90 91 #if defined(__OpenBSD__) 92 struct cfdriver ohci_cd = { 93 NULL, "ohci", DV_DULL 94 }; 95 #endif 96 97 #ifdef OHCI_DEBUG 98 #define DPRINTF(x) if (ohcidebug) logprintf x 99 #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x 100 int ohcidebug = 0; 101 #ifndef __NetBSD__ 102 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 103 #endif 104 #else 105 #define DPRINTF(x) 106 #define DPRINTFN(n,x) 107 #endif 108 109 #if BYTE_ORDER == BIG_ENDIAN 110 #define SWAP_ENDIAN OHCI_LITTLE_ENDIAN 111 #else 112 #define SWAP_ENDIAN OHCI_BIG_ENDIAN 113 #endif 114 115 #define O16TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap16(val) : val) 116 #define O32TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap32(val) : val) 117 #define HTOO16(val) O16TOH(val) 118 #define HTOO32(val) O32TOH(val) 119 120 struct ohci_pipe; 121 122 Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *); 123 Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *); 124 125 Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *); 126 Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *); 127 128 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *); 129 Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *); 130 131 #if 0 132 Static void ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *, 133 ohci_soft_td_t *); 134 #endif 135 Static usbd_status ohci_alloc_std_chain(struct ohci_pipe *, 136 ohci_softc_t *, int, int, usbd_xfer_handle, 137 ohci_soft_td_t *, ohci_soft_td_t **); 138 139 Static void ohci_shutdown(void *v); 140 Static void ohci_power(int, void *); 141 Static usbd_status ohci_open(usbd_pipe_handle); 142 Static void ohci_poll(struct usbd_bus *); 143 Static void ohci_softintr(void *); 144 Static void ohci_waitintr(ohci_softc_t *, usbd_xfer_handle); 145 Static void ohci_rhsc(ohci_softc_t *, usbd_xfer_handle); 146 147 Static usbd_status ohci_device_request(usbd_xfer_handle xfer); 148 Static void ohci_add_ed(ohci_softc_t *, ohci_soft_ed_t *, 149 ohci_soft_ed_t *); 150 151 Static void ohci_rem_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 152 Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *); 153 Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *); 154 Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t); 155 Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *); 156 Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *); 157 Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t); 158 159 Static usbd_status ohci_setup_isoc(usbd_pipe_handle pipe); 160 Static void ohci_device_isoc_enter(usbd_xfer_handle); 161 162 Static usbd_status ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 163 Static void ohci_freem(struct usbd_bus *, usb_dma_t *); 164 165 Static usbd_xfer_handle ohci_allocx(struct usbd_bus *); 166 Static void ohci_freex(struct usbd_bus *, usbd_xfer_handle); 167 168 Static usbd_status ohci_root_ctrl_transfer(usbd_xfer_handle); 169 Static usbd_status ohci_root_ctrl_start(usbd_xfer_handle); 170 Static void ohci_root_ctrl_abort(usbd_xfer_handle); 171 Static void ohci_root_ctrl_close(usbd_pipe_handle); 172 Static void ohci_root_ctrl_done(usbd_xfer_handle); 173 174 Static usbd_status ohci_root_intr_transfer(usbd_xfer_handle); 175 Static usbd_status ohci_root_intr_start(usbd_xfer_handle); 176 Static void ohci_root_intr_abort(usbd_xfer_handle); 177 Static void ohci_root_intr_close(usbd_pipe_handle); 178 Static void ohci_root_intr_done(usbd_xfer_handle); 179 180 Static usbd_status ohci_device_ctrl_transfer(usbd_xfer_handle); 181 Static usbd_status ohci_device_ctrl_start(usbd_xfer_handle); 182 Static void ohci_device_ctrl_abort(usbd_xfer_handle); 183 Static void ohci_device_ctrl_close(usbd_pipe_handle); 184 Static void ohci_device_ctrl_done(usbd_xfer_handle); 185 186 Static usbd_status ohci_device_bulk_transfer(usbd_xfer_handle); 187 Static usbd_status ohci_device_bulk_start(usbd_xfer_handle); 188 Static void ohci_device_bulk_abort(usbd_xfer_handle); 189 Static void ohci_device_bulk_close(usbd_pipe_handle); 190 Static void ohci_device_bulk_done(usbd_xfer_handle); 191 192 Static usbd_status ohci_device_intr_transfer(usbd_xfer_handle); 193 Static usbd_status ohci_device_intr_start(usbd_xfer_handle); 194 Static void ohci_device_intr_abort(usbd_xfer_handle); 195 Static void ohci_device_intr_close(usbd_pipe_handle); 196 Static void ohci_device_intr_done(usbd_xfer_handle); 197 198 Static usbd_status ohci_device_isoc_transfer(usbd_xfer_handle); 199 Static usbd_status ohci_device_isoc_start(usbd_xfer_handle); 200 Static void ohci_device_isoc_abort(usbd_xfer_handle); 201 Static void ohci_device_isoc_close(usbd_pipe_handle); 202 Static void ohci_device_isoc_done(usbd_xfer_handle); 203 204 Static usbd_status ohci_device_setintr(ohci_softc_t *sc, 205 struct ohci_pipe *pipe, int ival); 206 207 Static int ohci_str(usb_string_descriptor_t *, int, const char *); 208 209 Static void ohci_timeout(void *); 210 Static void ohci_timeout_task(void *); 211 Static void ohci_rhsc_enable(void *); 212 213 Static void ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *); 214 Static void ohci_abort_xfer(usbd_xfer_handle, usbd_status); 215 216 Static void ohci_device_clear_toggle(usbd_pipe_handle pipe); 217 Static void ohci_noop(usbd_pipe_handle pipe); 218 219 #ifdef OHCI_DEBUG 220 Static void ohci_dumpregs(ohci_softc_t *); 221 Static void ohci_dump_tds(ohci_softc_t *, ohci_soft_td_t *); 222 Static void ohci_dump_td(ohci_softc_t *, ohci_soft_td_t *); 223 Static void ohci_dump_ed(ohci_softc_t *, ohci_soft_ed_t *); 224 Static void ohci_dump_itd(ohci_softc_t *, ohci_soft_itd_t *); 225 Static void ohci_dump_itds(ohci_softc_t *, ohci_soft_itd_t *); 226 #endif 227 228 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 229 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 230 #define OWRITE1(sc, r, x) \ 231 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 232 #define OWRITE2(sc, r, x) \ 233 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 234 #define OWRITE4(sc, r, x) \ 235 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 236 #define OREAD1(sc, r) (OBARR(sc), bus_space_read_1((sc)->iot, (sc)->ioh, (r))) 237 #define OREAD2(sc, r) (OBARR(sc), bus_space_read_2((sc)->iot, (sc)->ioh, (r))) 238 #define OREAD4(sc, r) (OBARR(sc), bus_space_read_4((sc)->iot, (sc)->ioh, (r))) 239 240 /* Reverse the bits in a value 0 .. 31 */ 241 Static u_int8_t revbits[OHCI_NO_INTRS] = 242 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 243 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 244 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 245 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 246 247 struct ohci_pipe { 248 struct usbd_pipe pipe; 249 ohci_soft_ed_t *sed; 250 union { 251 ohci_soft_td_t *td; 252 ohci_soft_itd_t *itd; 253 } tail; 254 /* Info needed for different pipe kinds. */ 255 union { 256 /* Control pipe */ 257 struct { 258 usb_dma_t reqdma; 259 u_int length; 260 ohci_soft_td_t *setup, *data, *stat; 261 } ctl; 262 /* Interrupt pipe */ 263 struct { 264 int nslots; 265 int pos; 266 } intr; 267 /* Bulk pipe */ 268 struct { 269 u_int length; 270 int isread; 271 } bulk; 272 /* Iso pipe */ 273 struct iso { 274 int next, inuse; 275 } iso; 276 } u; 277 }; 278 279 #define OHCI_INTR_ENDPT 1 280 281 Static struct usbd_bus_methods ohci_bus_methods = { 282 ohci_open, 283 ohci_softintr, 284 ohci_poll, 285 ohci_allocm, 286 ohci_freem, 287 ohci_allocx, 288 ohci_freex, 289 }; 290 291 Static struct usbd_pipe_methods ohci_root_ctrl_methods = { 292 ohci_root_ctrl_transfer, 293 ohci_root_ctrl_start, 294 ohci_root_ctrl_abort, 295 ohci_root_ctrl_close, 296 ohci_noop, 297 ohci_root_ctrl_done, 298 }; 299 300 Static struct usbd_pipe_methods ohci_root_intr_methods = { 301 ohci_root_intr_transfer, 302 ohci_root_intr_start, 303 ohci_root_intr_abort, 304 ohci_root_intr_close, 305 ohci_noop, 306 ohci_root_intr_done, 307 }; 308 309 Static struct usbd_pipe_methods ohci_device_ctrl_methods = { 310 ohci_device_ctrl_transfer, 311 ohci_device_ctrl_start, 312 ohci_device_ctrl_abort, 313 ohci_device_ctrl_close, 314 ohci_noop, 315 ohci_device_ctrl_done, 316 }; 317 318 Static struct usbd_pipe_methods ohci_device_intr_methods = { 319 ohci_device_intr_transfer, 320 ohci_device_intr_start, 321 ohci_device_intr_abort, 322 ohci_device_intr_close, 323 ohci_device_clear_toggle, 324 ohci_device_intr_done, 325 }; 326 327 Static struct usbd_pipe_methods ohci_device_bulk_methods = { 328 ohci_device_bulk_transfer, 329 ohci_device_bulk_start, 330 ohci_device_bulk_abort, 331 ohci_device_bulk_close, 332 ohci_device_clear_toggle, 333 ohci_device_bulk_done, 334 }; 335 336 Static struct usbd_pipe_methods ohci_device_isoc_methods = { 337 ohci_device_isoc_transfer, 338 ohci_device_isoc_start, 339 ohci_device_isoc_abort, 340 ohci_device_isoc_close, 341 ohci_noop, 342 ohci_device_isoc_done, 343 }; 344 345 #if defined(__NetBSD__) || defined(__OpenBSD__) 346 int 347 ohci_activate(device_ptr_t self, enum devact act) 348 { 349 struct ohci_softc *sc = (struct ohci_softc *)self; 350 int rv = 0; 351 352 switch (act) { 353 case DVACT_ACTIVATE: 354 return (EOPNOTSUPP); 355 356 case DVACT_DEACTIVATE: 357 if (sc->sc_child != NULL) 358 rv = config_deactivate(sc->sc_child); 359 sc->sc_dying = 1; 360 break; 361 } 362 return (rv); 363 } 364 365 int 366 ohci_detach(struct ohci_softc *sc, int flags) 367 { 368 int rv = 0; 369 370 if (sc->sc_child != NULL) 371 rv = config_detach(sc->sc_child, flags); 372 373 if (rv != 0) 374 return (rv); 375 376 usb_uncallout(sc->sc_tmo_rhsc, ohci_rhsc_enable, sc); 377 378 #if defined(__NetBSD__) || defined(__OpenBSD__) 379 powerhook_disestablish(sc->sc_powerhook); 380 shutdownhook_disestablish(sc->sc_shutdownhook); 381 #endif 382 383 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 384 385 /* free data structures XXX */ 386 387 return (rv); 388 } 389 #endif 390 391 ohci_soft_ed_t * 392 ohci_alloc_sed(ohci_softc_t *sc) 393 { 394 ohci_soft_ed_t *sed; 395 usbd_status err; 396 int i, offs; 397 usb_dma_t dma; 398 399 if (sc->sc_freeeds == NULL) { 400 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 401 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 402 OHCI_ED_ALIGN, &dma); 403 if (err) 404 return (0); 405 for(i = 0; i < OHCI_SED_CHUNK; i++) { 406 offs = i * OHCI_SED_SIZE; 407 sed = KERNADDR(&dma, offs); 408 sed->physaddr = DMAADDR(&dma, offs); 409 sed->next = sc->sc_freeeds; 410 sc->sc_freeeds = sed; 411 } 412 } 413 sed = sc->sc_freeeds; 414 sc->sc_freeeds = sed->next; 415 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 416 sed->next = 0; 417 return (sed); 418 } 419 420 void 421 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 422 { 423 sed->next = sc->sc_freeeds; 424 sc->sc_freeeds = sed; 425 } 426 427 ohci_soft_td_t * 428 ohci_alloc_std(ohci_softc_t *sc) 429 { 430 ohci_soft_td_t *std; 431 usbd_status err; 432 int i, offs; 433 usb_dma_t dma; 434 int s; 435 436 if (sc->sc_freetds == NULL) { 437 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 438 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 439 OHCI_TD_ALIGN, &dma); 440 if (err) 441 return (NULL); 442 s = splusb(); 443 for(i = 0; i < OHCI_STD_CHUNK; i++) { 444 offs = i * OHCI_STD_SIZE; 445 std = KERNADDR(&dma, offs); 446 std->physaddr = DMAADDR(&dma, offs); 447 std->nexttd = sc->sc_freetds; 448 sc->sc_freetds = std; 449 } 450 splx(s); 451 } 452 453 s = splusb(); 454 std = sc->sc_freetds; 455 sc->sc_freetds = std->nexttd; 456 memset(&std->td, 0, sizeof(ohci_td_t)); 457 std->nexttd = NULL; 458 std->xfer = NULL; 459 ohci_hash_add_td(sc, std); 460 splx(s); 461 462 return (std); 463 } 464 465 void 466 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std) 467 { 468 int s; 469 470 s = splusb(); 471 ohci_hash_rem_td(sc, std); 472 std->nexttd = sc->sc_freetds; 473 sc->sc_freetds = std; 474 splx(s); 475 } 476 477 usbd_status 478 ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc, 479 int alen, int rd, usbd_xfer_handle xfer, 480 ohci_soft_td_t *sp, ohci_soft_td_t **ep) 481 { 482 ohci_soft_td_t *next, *cur; 483 ohci_physaddr_t dataphys, dataphysend; 484 u_int32_t tdflags; 485 int len, curlen; 486 usb_dma_t *dma = &xfer->dmabuf; 487 u_int16_t flags = xfer->flags; 488 489 DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen)); 490 491 len = alen; 492 cur = sp; 493 dataphys = DMAADDR(dma, 0); 494 dataphysend = OHCI_PAGE(dataphys + len - 1); 495 tdflags = HTOO32( 496 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 497 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) | 498 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR); 499 500 for (;;) { 501 next = ohci_alloc_std(sc); 502 if (next == NULL) 503 goto nomem; 504 505 /* The OHCI hardware can handle at most one page crossing. */ 506 if (OHCI_PAGE(dataphys) == dataphysend || 507 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) { 508 /* we can handle it in this TD */ 509 curlen = len; 510 } else { 511 /* must use multiple TDs, fill as much as possible. */ 512 curlen = 2 * OHCI_PAGE_SIZE - 513 (dataphys & (OHCI_PAGE_SIZE-1)); 514 /* the length must be a multiple of the max size */ 515 curlen -= curlen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize); 516 #ifdef DIAGNOSTIC 517 if (curlen == 0) 518 panic("ohci_alloc_std: curlen == 0"); 519 #endif 520 } 521 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x " 522 "dataphysend=0x%08x len=%d curlen=%d\n", 523 dataphys, dataphysend, 524 len, curlen)); 525 len -= curlen; 526 527 cur->td.td_flags = tdflags; 528 cur->td.td_cbp = HTOO32(dataphys); 529 cur->nexttd = next; 530 cur->td.td_nexttd = HTOO32(next->physaddr); 531 cur->td.td_be = HTOO32(dataphys + curlen - 1); 532 cur->len = curlen; 533 cur->flags = OHCI_ADD_LEN; 534 cur->xfer = xfer; 535 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n", 536 dataphys, dataphys + curlen - 1)); 537 if (len == 0) 538 break; 539 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n")); 540 dataphys += curlen; 541 cur = next; 542 } 543 if (!rd && (flags & USBD_FORCE_SHORT_XFER) && 544 alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) { 545 /* Force a 0 length transfer at the end. */ 546 547 cur = next; 548 next = ohci_alloc_std(sc); 549 if (next == NULL) 550 goto nomem; 551 552 cur->td.td_flags = tdflags; 553 cur->td.td_cbp = 0; /* indicate 0 length packet */ 554 cur->nexttd = next; 555 cur->td.td_nexttd = HTOO32(next->physaddr); 556 cur->td.td_be = ~0; 557 cur->len = 0; 558 cur->flags = 0; 559 cur->xfer = xfer; 560 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n")); 561 } 562 *ep = cur; 563 564 return (USBD_NORMAL_COMPLETION); 565 566 nomem: 567 /* XXX free chain */ 568 return (USBD_NOMEM); 569 } 570 571 #if 0 572 Static void 573 ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std, 574 ohci_soft_td_t *stdend) 575 { 576 ohci_soft_td_t *p; 577 578 for (; std != stdend; std = p) { 579 p = std->nexttd; 580 ohci_free_std(sc, std); 581 } 582 } 583 #endif 584 585 ohci_soft_itd_t * 586 ohci_alloc_sitd(ohci_softc_t *sc) 587 { 588 ohci_soft_itd_t *sitd; 589 usbd_status err; 590 int i, s, offs; 591 usb_dma_t dma; 592 593 if (sc->sc_freeitds == NULL) { 594 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n")); 595 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK, 596 OHCI_ITD_ALIGN, &dma); 597 if (err) 598 return (NULL); 599 s = splusb(); 600 for(i = 0; i < OHCI_SITD_CHUNK; i++) { 601 offs = i * OHCI_SITD_SIZE; 602 sitd = KERNADDR(&dma, offs); 603 sitd->physaddr = DMAADDR(&dma, offs); 604 sitd->nextitd = sc->sc_freeitds; 605 sc->sc_freeitds = sitd; 606 } 607 splx(s); 608 } 609 610 s = splusb(); 611 sitd = sc->sc_freeitds; 612 sc->sc_freeitds = sitd->nextitd; 613 memset(&sitd->itd, 0, sizeof(ohci_itd_t)); 614 sitd->nextitd = NULL; 615 sitd->xfer = NULL; 616 ohci_hash_add_itd(sc, sitd); 617 splx(s); 618 619 #ifdef DIAGNOSTIC 620 sitd->isdone = 0; 621 #endif 622 623 return (sitd); 624 } 625 626 void 627 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 628 { 629 int s; 630 631 DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd)); 632 633 #ifdef DIAGNOSTIC 634 if (!sitd->isdone) { 635 panic("ohci_free_sitd: sitd=%p not done", sitd); 636 return; 637 } 638 /* Warn double free */ 639 sitd->isdone = 0; 640 #endif 641 642 s = splusb(); 643 ohci_hash_rem_itd(sc, sitd); 644 sitd->nextitd = sc->sc_freeitds; 645 sc->sc_freeitds = sitd; 646 splx(s); 647 } 648 649 usbd_status 650 ohci_init(ohci_softc_t *sc) 651 { 652 ohci_soft_ed_t *sed, *psed; 653 usbd_status err; 654 int i; 655 u_int32_t s, ctl, rwc, ival, hcr, fm, per, rev, desca, descb; 656 657 DPRINTF(("ohci_init: start\n")); 658 #if defined(__OpenBSD__) 659 printf(","); 660 #else 661 printf("%s:", USBDEVNAME(sc->sc_bus.bdev)); 662 #endif 663 rev = OREAD4(sc, OHCI_REVISION); 664 printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev), 665 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 666 667 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 668 printf("%s: unsupported OHCI revision\n", 669 USBDEVNAME(sc->sc_bus.bdev)); 670 sc->sc_bus.usbrev = USBREV_UNKNOWN; 671 return (USBD_INVAL); 672 } 673 sc->sc_bus.usbrev = USBREV_1_0; 674 675 for (i = 0; i < OHCI_HASH_SIZE; i++) 676 LIST_INIT(&sc->sc_hash_tds[i]); 677 for (i = 0; i < OHCI_HASH_SIZE; i++) 678 LIST_INIT(&sc->sc_hash_itds[i]); 679 680 SIMPLEQ_INIT(&sc->sc_free_xfers); 681 682 #ifdef __NetBSD__ 683 usb_setup_reserve(sc, &sc->sc_dma_reserve, sc->sc_bus.dmatag, 684 USB_MEM_RESERVE); 685 #endif 686 687 /* XXX determine alignment by R/W */ 688 /* Allocate the HCCA area. */ 689 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 690 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 691 if (err) 692 return (err); 693 sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0); 694 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 695 696 sc->sc_eintrs = OHCI_NORMAL_INTRS; 697 698 /* Allocate dummy ED that starts the control list. */ 699 sc->sc_ctrl_head = ohci_alloc_sed(sc); 700 if (sc->sc_ctrl_head == NULL) { 701 err = USBD_NOMEM; 702 goto bad1; 703 } 704 sc->sc_ctrl_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 705 706 /* Allocate dummy ED that starts the bulk list. */ 707 sc->sc_bulk_head = ohci_alloc_sed(sc); 708 if (sc->sc_bulk_head == NULL) { 709 err = USBD_NOMEM; 710 goto bad2; 711 } 712 sc->sc_bulk_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 713 714 /* Allocate dummy ED that starts the isochronous list. */ 715 sc->sc_isoc_head = ohci_alloc_sed(sc); 716 if (sc->sc_isoc_head == NULL) { 717 err = USBD_NOMEM; 718 goto bad3; 719 } 720 sc->sc_isoc_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 721 722 /* Allocate all the dummy EDs that make up the interrupt tree. */ 723 for (i = 0; i < OHCI_NO_EDS; i++) { 724 sed = ohci_alloc_sed(sc); 725 if (sed == NULL) { 726 while (--i >= 0) 727 ohci_free_sed(sc, sc->sc_eds[i]); 728 err = USBD_NOMEM; 729 goto bad4; 730 } 731 /* All ED fields are set to 0. */ 732 sc->sc_eds[i] = sed; 733 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 734 if (i != 0) 735 psed = sc->sc_eds[(i-1) / 2]; 736 else 737 psed= sc->sc_isoc_head; 738 sed->next = psed; 739 sed->ed.ed_nexted = HTOO32(psed->physaddr); 740 } 741 /* 742 * Fill HCCA interrupt table. The bit reversal is to get 743 * the tree set up properly to spread the interrupts. 744 */ 745 for (i = 0; i < OHCI_NO_INTRS; i++) 746 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 747 HTOO32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 748 749 #ifdef OHCI_DEBUG 750 if (ohcidebug > 15) { 751 for (i = 0; i < OHCI_NO_EDS; i++) { 752 printf("ed#%d ", i); 753 ohci_dump_ed(sc, sc->sc_eds[i]); 754 } 755 printf("iso "); 756 ohci_dump_ed(sc, sc->sc_isoc_head); 757 } 758 #endif 759 760 /* Preserve values programmed by SMM/BIOS but lost over reset. */ 761 ctl = OREAD4(sc, OHCI_CONTROL); 762 rwc = ctl & OHCI_RWC; 763 fm = OREAD4(sc, OHCI_FM_INTERVAL); 764 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 765 descb = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 766 767 /* Determine in what context we are running. */ 768 if (ctl & OHCI_IR) { 769 /* SMM active, request change */ 770 DPRINTF(("ohci_init: SMM active, request owner change\n")); 771 if ((sc->sc_intre & (OHCI_OC | OHCI_MIE)) == 772 (OHCI_OC | OHCI_MIE)) 773 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_MIE); 774 s = OREAD4(sc, OHCI_COMMAND_STATUS); 775 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 776 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 777 usb_delay_ms(&sc->sc_bus, 1); 778 ctl = OREAD4(sc, OHCI_CONTROL); 779 } 780 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_MIE); 781 if ((ctl & OHCI_IR) == 0) { 782 printf("%s: SMM does not respond, resetting\n", 783 USBDEVNAME(sc->sc_bus.bdev)); 784 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 785 goto reset; 786 } 787 #if 0 788 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */ 789 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 790 /* BIOS started controller. */ 791 DPRINTF(("ohci_init: BIOS active\n")); 792 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 793 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL | rwc); 794 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 795 } 796 #endif 797 } else { 798 DPRINTF(("ohci_init: cold started\n")); 799 reset: 800 /* Controller was cold started. */ 801 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 802 } 803 804 /* 805 * This reset should not be necessary according to the OHCI spec, but 806 * without it some controllers do not start. 807 */ 808 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 809 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 810 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 811 812 /* We now own the host controller and the bus has been reset. */ 813 814 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 815 /* Nominal time for a reset is 10 us. */ 816 for (i = 0; i < 10; i++) { 817 delay(10); 818 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 819 if (!hcr) 820 break; 821 } 822 if (hcr) { 823 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 824 err = USBD_IOERROR; 825 goto bad5; 826 } 827 #ifdef OHCI_DEBUG 828 if (ohcidebug > 15) 829 ohci_dumpregs(sc); 830 #endif 831 832 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 833 834 /* Set up HC registers. */ 835 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 836 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 837 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 838 /* disable all interrupts and then switch on all desired interrupts */ 839 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 840 /* switch on desired functional features */ 841 ctl = OREAD4(sc, OHCI_CONTROL); 842 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 843 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 844 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL | rwc; 845 /* And finally start it! */ 846 OWRITE4(sc, OHCI_CONTROL, ctl); 847 848 /* 849 * The controller is now OPERATIONAL. Set a some final 850 * registers that should be set earlier, but that the 851 * controller ignores when in the SUSPEND state. 852 */ 853 ival = OHCI_GET_IVAL(fm); 854 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 855 fm |= OHCI_FSMPS(ival) | ival; 856 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 857 per = OHCI_PERIODIC(ival); /* 90% periodic */ 858 OWRITE4(sc, OHCI_PERIODIC_START, per); 859 860 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */ 861 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP); 862 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 863 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY); 864 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca); 865 866 /* 867 * The AMD756 requires a delay before re-reading the register, 868 * otherwise it will occasionally report 0 ports. 869 */ 870 sc->sc_noport = 0; 871 for (i = 0; i < 10 && sc->sc_noport == 0; i++) { 872 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY); 873 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 874 } 875 876 #ifdef OHCI_DEBUG 877 if (ohcidebug > 5) 878 ohci_dumpregs(sc); 879 #endif 880 881 /* Set up the bus struct. */ 882 sc->sc_bus.methods = &ohci_bus_methods; 883 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 884 885 #if defined(__NetBSD__) || defined(__OpenBSD__) 886 sc->sc_control = sc->sc_intre = 0; 887 sc->sc_powerhook = powerhook_establish(ohci_power, sc); 888 sc->sc_shutdownhook = shutdownhook_establish(ohci_shutdown, sc); 889 #endif 890 891 usb_callout_init(sc->sc_tmo_rhsc); 892 893 /* Finally, turn on interrupts. */ 894 DPRINTFN(1,("ohci_init: enabling\n")); 895 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 896 897 return (USBD_NORMAL_COMPLETION); 898 899 bad5: 900 for (i = 0; i < OHCI_NO_EDS; i++) 901 ohci_free_sed(sc, sc->sc_eds[i]); 902 bad4: 903 ohci_free_sed(sc, sc->sc_isoc_head); 904 bad3: 905 ohci_free_sed(sc, sc->sc_bulk_head); 906 bad2: 907 ohci_free_sed(sc, sc->sc_ctrl_head); 908 bad1: 909 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 910 return (err); 911 } 912 913 usbd_status 914 ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 915 { 916 #if defined(__NetBSD__) || defined(__OpenBSD__) 917 struct ohci_softc *sc = (struct ohci_softc *)bus; 918 #endif 919 usbd_status status; 920 921 status = usb_allocmem(&sc->sc_bus, size, 0, dma); 922 #ifdef __NetBSD__ 923 if (status == USBD_NOMEM) 924 status = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size); 925 #endif 926 return status; 927 } 928 929 void 930 ohci_freem(struct usbd_bus *bus, usb_dma_t *dma) 931 { 932 #if defined(__NetBSD__) || defined(__OpenBSD__) 933 struct ohci_softc *sc = (struct ohci_softc *)bus; 934 #endif 935 #ifdef __NetBSD__ 936 if (dma->block->flags & USB_DMA_RESERVE) { 937 usb_reserve_freem(&((struct ohci_softc *)bus)->sc_dma_reserve, 938 dma); 939 return; 940 } 941 #endif 942 usb_freemem(&sc->sc_bus, dma); 943 } 944 945 usbd_xfer_handle 946 ohci_allocx(struct usbd_bus *bus) 947 { 948 struct ohci_softc *sc = (struct ohci_softc *)bus; 949 usbd_xfer_handle xfer; 950 951 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 952 if (xfer != NULL) { 953 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 954 #ifdef DIAGNOSTIC 955 if (xfer->busy_free != XFER_FREE) { 956 printf("ohci_allocx: xfer=%p not free, 0x%08x\n", xfer, 957 xfer->busy_free); 958 } 959 #endif 960 } else { 961 xfer = malloc(sizeof(struct ohci_xfer), M_USB, M_NOWAIT); 962 } 963 if (xfer != NULL) { 964 memset(xfer, 0, sizeof (struct ohci_xfer)); 965 #ifdef DIAGNOSTIC 966 xfer->busy_free = XFER_BUSY; 967 #endif 968 } 969 return (xfer); 970 } 971 972 void 973 ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 974 { 975 struct ohci_softc *sc = (struct ohci_softc *)bus; 976 977 #ifdef DIAGNOSTIC 978 if (xfer->busy_free != XFER_BUSY) { 979 printf("ohci_freex: xfer=%p not busy, 0x%08x\n", xfer, 980 xfer->busy_free); 981 return; 982 } 983 xfer->busy_free = XFER_FREE; 984 #endif 985 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 986 } 987 988 /* 989 * Shut down the controller when the system is going down. 990 */ 991 void 992 ohci_shutdown(void *v) 993 { 994 ohci_softc_t *sc = v; 995 996 DPRINTF(("ohci_shutdown: stopping the HC\n")); 997 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 998 } 999 1000 /* 1001 * Handle suspend/resume. 1002 * 1003 * We need to switch to polling mode here, because this routine is 1004 * called from an interupt context. This is all right since we 1005 * are almost suspended anyway. 1006 */ 1007 void 1008 ohci_power(int why, void *v) 1009 { 1010 ohci_softc_t *sc = v; 1011 u_int32_t ctl; 1012 int s; 1013 1014 #ifdef OHCI_DEBUG 1015 DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why)); 1016 ohci_dumpregs(sc); 1017 #endif 1018 1019 s = splhardusb(); 1020 switch (why) { 1021 case PWR_SUSPEND: 1022 case PWR_STANDBY: 1023 sc->sc_bus.use_polling++; 1024 ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK; 1025 if (sc->sc_control == 0) { 1026 /* 1027 * Preserve register values, in case that APM BIOS 1028 * does not recover them. 1029 */ 1030 sc->sc_control = ctl; 1031 sc->sc_intre = OREAD4(sc, OHCI_INTERRUPT_ENABLE); 1032 } 1033 ctl |= OHCI_HCFS_SUSPEND; 1034 OWRITE4(sc, OHCI_CONTROL, ctl); 1035 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1036 sc->sc_bus.use_polling--; 1037 break; 1038 case PWR_RESUME: 1039 sc->sc_bus.use_polling++; 1040 /* Some broken BIOSes do not recover these values */ 1041 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 1042 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 1043 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 1044 if (sc->sc_intre) 1045 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, 1046 sc->sc_intre & (OHCI_ALL_INTRS | OHCI_MIE)); 1047 if (sc->sc_control) 1048 ctl = sc->sc_control; 1049 else 1050 ctl = OREAD4(sc, OHCI_CONTROL); 1051 ctl |= OHCI_HCFS_RESUME; 1052 OWRITE4(sc, OHCI_CONTROL, ctl); 1053 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 1054 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL; 1055 OWRITE4(sc, OHCI_CONTROL, ctl); 1056 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 1057 sc->sc_control = sc->sc_intre = 0; 1058 sc->sc_bus.use_polling--; 1059 break; 1060 case PWR_SOFTSUSPEND: 1061 case PWR_SOFTSTANDBY: 1062 case PWR_SOFTRESUME: 1063 break; 1064 } 1065 splx(s); 1066 } 1067 1068 #ifdef OHCI_DEBUG 1069 void 1070 ohci_dumpregs(ohci_softc_t *sc) 1071 { 1072 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 1073 OREAD4(sc, OHCI_REVISION), 1074 OREAD4(sc, OHCI_CONTROL), 1075 OREAD4(sc, OHCI_COMMAND_STATUS))); 1076 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 1077 OREAD4(sc, OHCI_INTERRUPT_STATUS), 1078 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 1079 OREAD4(sc, OHCI_INTERRUPT_DISABLE))); 1080 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 1081 OREAD4(sc, OHCI_HCCA), 1082 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 1083 OREAD4(sc, OHCI_CONTROL_HEAD_ED))); 1084 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 1085 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 1086 OREAD4(sc, OHCI_BULK_HEAD_ED), 1087 OREAD4(sc, OHCI_BULK_CURRENT_ED))); 1088 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 1089 OREAD4(sc, OHCI_DONE_HEAD), 1090 OREAD4(sc, OHCI_FM_INTERVAL), 1091 OREAD4(sc, OHCI_FM_REMAINING))); 1092 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 1093 OREAD4(sc, OHCI_FM_NUMBER), 1094 OREAD4(sc, OHCI_PERIODIC_START), 1095 OREAD4(sc, OHCI_LS_THRESHOLD))); 1096 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n", 1097 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 1098 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 1099 OREAD4(sc, OHCI_RH_STATUS))); 1100 DPRINTF((" port1=0x%08x port2=0x%08x\n", 1101 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 1102 OREAD4(sc, OHCI_RH_PORT_STATUS(2)))); 1103 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n", 1104 O32TOH(sc->sc_hcca->hcca_frame_number), 1105 O32TOH(sc->sc_hcca->hcca_done_head))); 1106 } 1107 #endif 1108 1109 Static int ohci_intr1(ohci_softc_t *); 1110 1111 int 1112 ohci_intr(void *p) 1113 { 1114 ohci_softc_t *sc = p; 1115 1116 if (sc == NULL || sc->sc_dying) 1117 return (0); 1118 1119 /* If we get an interrupt while polling, then just ignore it. */ 1120 if (sc->sc_bus.use_polling) { 1121 #ifdef DIAGNOSTIC 1122 DPRINTFN(16, ("ohci_intr: ignored interrupt while polling\n")); 1123 #endif 1124 /* for level triggered intrs, should do something to ack */ 1125 OWRITE4(sc, OHCI_INTERRUPT_STATUS, 1126 OREAD4(sc, OHCI_INTERRUPT_STATUS)); 1127 1128 return (0); 1129 } 1130 1131 return (ohci_intr1(sc)); 1132 } 1133 1134 Static int 1135 ohci_intr1(ohci_softc_t *sc) 1136 { 1137 u_int32_t intrs, eintrs; 1138 1139 DPRINTFN(14,("ohci_intr1: enter\n")); 1140 1141 /* In case the interrupt occurs before initialization has completed. */ 1142 if (sc == NULL || sc->sc_hcca == NULL) { 1143 #ifdef DIAGNOSTIC 1144 printf("ohci_intr: sc->sc_hcca == NULL\n"); 1145 #endif 1146 return (0); 1147 } 1148 1149 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1150 if (!intrs) 1151 return (0); 1152 1153 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs & ~(OHCI_MIE|OHCI_WDH)); /* Acknowledge */ 1154 eintrs = intrs & sc->sc_eintrs; 1155 if (!eintrs) 1156 return (0); 1157 1158 sc->sc_bus.intr_context++; 1159 sc->sc_bus.no_intrs++; 1160 DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 1161 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 1162 (u_int)eintrs)); 1163 1164 if (eintrs & OHCI_SO) { 1165 sc->sc_overrun_cnt++; 1166 if (usbd_ratecheck(&sc->sc_overrun_ntc)) { 1167 printf("%s: %u scheduling overruns\n", 1168 USBDEVNAME(sc->sc_bus.bdev), sc->sc_overrun_cnt); 1169 sc->sc_overrun_cnt = 0; 1170 } 1171 /* XXX do what */ 1172 eintrs &= ~OHCI_SO; 1173 } 1174 if (eintrs & OHCI_WDH) { 1175 /* 1176 * We block the interrupt below, and reenable it later from 1177 * ohci_softintr(). 1178 */ 1179 usb_schedsoftintr(&sc->sc_bus); 1180 } 1181 if (eintrs & OHCI_RD) { 1182 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev)); 1183 /* XXX process resume detect */ 1184 } 1185 if (eintrs & OHCI_UE) { 1186 printf("%s: unrecoverable error, controller halted\n", 1187 USBDEVNAME(sc->sc_bus.bdev)); 1188 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1189 /* XXX what else */ 1190 } 1191 if (eintrs & OHCI_RHSC) { 1192 /* 1193 * We block the interrupt below, and reenable it later from 1194 * a timeout. 1195 */ 1196 ohci_rhsc(sc, sc->sc_intrxfer); 1197 /* Do not allow RHSC interrupts > 1 per second */ 1198 usb_callout(sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc); 1199 } 1200 1201 sc->sc_bus.intr_context--; 1202 1203 if (eintrs != 0) { 1204 /* Block unprocessed interrupts. */ 1205 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs); 1206 sc->sc_eintrs &= ~eintrs; 1207 DPRINTFN(1, ("%s: blocking intrs 0x%x\n", 1208 USBDEVNAME(sc->sc_bus.bdev), eintrs)); 1209 } 1210 1211 return (1); 1212 } 1213 1214 void 1215 ohci_rhsc_enable(void *v_sc) 1216 { 1217 ohci_softc_t *sc = v_sc; 1218 int s; 1219 1220 s = splhardusb(); 1221 sc->sc_eintrs |= OHCI_RHSC; 1222 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1223 splx(s); 1224 } 1225 1226 #ifdef OHCI_DEBUG 1227 const char *ohci_cc_strs[] = { 1228 "NO_ERROR", 1229 "CRC", 1230 "BIT_STUFFING", 1231 "DATA_TOGGLE_MISMATCH", 1232 "STALL", 1233 "DEVICE_NOT_RESPONDING", 1234 "PID_CHECK_FAILURE", 1235 "UNEXPECTED_PID", 1236 "DATA_OVERRUN", 1237 "DATA_UNDERRUN", 1238 "BUFFER_OVERRUN", 1239 "BUFFER_UNDERRUN", 1240 "reserved", 1241 "reserved", 1242 "NOT_ACCESSED", 1243 "NOT_ACCESSED", 1244 }; 1245 #endif 1246 1247 void 1248 ohci_softintr(void *v) 1249 { 1250 ohci_softc_t *sc = v; 1251 ohci_soft_itd_t *sitd, *sidone, *sitdnext; 1252 ohci_soft_td_t *std, *sdone, *stdnext; 1253 usbd_xfer_handle xfer; 1254 struct ohci_pipe *opipe; 1255 int len, cc, s; 1256 int i, j, actlen, iframes, uedir; 1257 ohci_physaddr_t done; 1258 1259 DPRINTFN(10,("ohci_softintr: enter\n")); 1260 1261 sc->sc_bus.intr_context++; 1262 1263 s = splhardusb(); 1264 done = O32TOH(sc->sc_hcca->hcca_done_head) & ~OHCI_DONE_INTRS; 1265 sc->sc_hcca->hcca_done_head = 0; 1266 OWRITE4(sc, OHCI_INTERRUPT_STATUS, OHCI_WDH); 1267 sc->sc_eintrs |= OHCI_WDH; 1268 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_WDH); 1269 splx(s); 1270 1271 /* Reverse the done list. */ 1272 for (sdone = NULL, sidone = NULL; done != 0; ) { 1273 std = ohci_hash_find_td(sc, done); 1274 if (std != NULL) { 1275 std->dnext = sdone; 1276 done = O32TOH(std->td.td_nexttd); 1277 sdone = std; 1278 DPRINTFN(10,("add TD %p\n", std)); 1279 continue; 1280 } 1281 sitd = ohci_hash_find_itd(sc, done); 1282 if (sitd != NULL) { 1283 sitd->dnext = sidone; 1284 done = O32TOH(sitd->itd.itd_nextitd); 1285 sidone = sitd; 1286 DPRINTFN(5,("add ITD %p\n", sitd)); 1287 continue; 1288 } 1289 panic("ohci_softintr: addr 0x%08lx not found", (u_long)done); 1290 } 1291 1292 DPRINTFN(10,("ohci_softintr: sdone=%p sidone=%p\n", sdone, sidone)); 1293 1294 #ifdef OHCI_DEBUG 1295 if (ohcidebug > 10) { 1296 DPRINTF(("ohci_process_done: TD done:\n")); 1297 ohci_dump_tds(sc, sdone); 1298 } 1299 #endif 1300 1301 for (std = sdone; std; std = stdnext) { 1302 xfer = std->xfer; 1303 stdnext = std->dnext; 1304 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n", 1305 std, xfer, xfer ? xfer->hcpriv : 0)); 1306 if (xfer == NULL) { 1307 /* 1308 * xfer == NULL: There seems to be no xfer associated 1309 * with this TD. It is tailp that happened to end up on 1310 * the done queue. 1311 * Shouldn't happen, but some chips are broken(?). 1312 */ 1313 continue; 1314 } 1315 if (xfer->status == USBD_CANCELLED || 1316 xfer->status == USBD_TIMEOUT) { 1317 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1318 xfer)); 1319 /* Handled by abort routine. */ 1320 continue; 1321 } 1322 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 1323 1324 len = std->len; 1325 if (std->td.td_cbp != 0) 1326 len -= O32TOH(std->td.td_be) - 1327 O32TOH(std->td.td_cbp) + 1; 1328 DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", len, 1329 std->flags)); 1330 if (std->flags & OHCI_ADD_LEN) 1331 xfer->actlen += len; 1332 1333 cc = OHCI_TD_GET_CC(O32TOH(std->td.td_flags)); 1334 if (cc == OHCI_CC_NO_ERROR) { 1335 if (std->flags & OHCI_CALL_DONE) { 1336 xfer->status = USBD_NORMAL_COMPLETION; 1337 s = splusb(); 1338 usb_transfer_complete(xfer); 1339 splx(s); 1340 } 1341 ohci_free_std(sc, std); 1342 } else { 1343 /* 1344 * Endpoint is halted. First unlink all the TDs 1345 * belonging to the failed transfer, and then restart 1346 * the endpoint. 1347 */ 1348 ohci_soft_td_t *p, *n; 1349 opipe = (struct ohci_pipe *)xfer->pipe; 1350 1351 DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n", 1352 OHCI_TD_GET_CC(O32TOH(std->td.td_flags)), 1353 ohci_cc_strs[OHCI_TD_GET_CC(O32TOH(std->td.td_flags))])); 1354 1355 /* remove TDs */ 1356 for (p = std; p->xfer == xfer; p = n) { 1357 n = p->nexttd; 1358 ohci_free_std(sc, p); 1359 } 1360 1361 /* clear halt */ 1362 opipe->sed->ed.ed_headp = HTOO32(p->physaddr); 1363 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1364 1365 if (cc == OHCI_CC_STALL) 1366 xfer->status = USBD_STALLED; 1367 else 1368 xfer->status = USBD_IOERROR; 1369 s = splusb(); 1370 usb_transfer_complete(xfer); 1371 splx(s); 1372 } 1373 } 1374 1375 #ifdef OHCI_DEBUG 1376 if (ohcidebug > 10) { 1377 DPRINTF(("ohci_softintr: ITD done:\n")); 1378 ohci_dump_itds(sc, sidone); 1379 } 1380 #endif 1381 1382 for (sitd = sidone; sitd != NULL; sitd = sitdnext) { 1383 xfer = sitd->xfer; 1384 sitdnext = sitd->dnext; 1385 DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n", 1386 sitd, xfer, xfer ? xfer->hcpriv : 0)); 1387 if (xfer == NULL) 1388 continue; 1389 if (xfer->status == USBD_CANCELLED || 1390 xfer->status == USBD_TIMEOUT) { 1391 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1392 xfer)); 1393 /* Handled by abort routine. */ 1394 continue; 1395 } 1396 #ifdef DIAGNOSTIC 1397 if (sitd->isdone) 1398 printf("ohci_softintr: sitd=%p is done\n", sitd); 1399 sitd->isdone = 1; 1400 #endif 1401 if (sitd->flags & OHCI_CALL_DONE) { 1402 ohci_soft_itd_t *next; 1403 1404 opipe = (struct ohci_pipe *)xfer->pipe; 1405 opipe->u.iso.inuse -= xfer->nframes; 1406 uedir = UE_GET_DIR(xfer->pipe->endpoint->edesc-> 1407 bEndpointAddress); 1408 xfer->status = USBD_NORMAL_COMPLETION; 1409 actlen = 0; 1410 for (i = 0, sitd = xfer->hcpriv;; 1411 sitd = next) { 1412 next = sitd->nextitd; 1413 if (OHCI_ITD_GET_CC(O32TOH(sitd-> 1414 itd.itd_flags)) != OHCI_CC_NO_ERROR) 1415 xfer->status = USBD_IOERROR; 1416 /* For input, update frlengths with actual */ 1417 /* XXX anything necessary for output? */ 1418 if (uedir == UE_DIR_IN && 1419 xfer->status == USBD_NORMAL_COMPLETION) { 1420 iframes = OHCI_ITD_GET_FC(O32TOH( 1421 sitd->itd.itd_flags)); 1422 for (j = 0; j < iframes; i++, j++) { 1423 len = O16TOH(sitd-> 1424 itd.itd_offset[j]); 1425 if ((OHCI_ITD_PSW_GET_CC(len) & 1426 OHCI_CC_NOT_ACCESSED_MASK) 1427 == OHCI_CC_NOT_ACCESSED) 1428 len = 0; 1429 else 1430 len = OHCI_ITD_PSW_LENGTH(len); 1431 xfer->frlengths[i] = len; 1432 actlen += len; 1433 } 1434 } 1435 if (sitd->flags & OHCI_CALL_DONE) 1436 break; 1437 ohci_free_sitd(sc, sitd); 1438 } 1439 ohci_free_sitd(sc, sitd); 1440 if (uedir == UE_DIR_IN && 1441 xfer->status == USBD_NORMAL_COMPLETION) 1442 xfer->actlen = actlen; 1443 xfer->hcpriv = NULL; 1444 1445 s = splusb(); 1446 usb_transfer_complete(xfer); 1447 splx(s); 1448 } 1449 } 1450 1451 #ifdef USB_USE_SOFTINTR 1452 if (sc->sc_softwake) { 1453 sc->sc_softwake = 0; 1454 wakeup(&sc->sc_softwake); 1455 } 1456 #endif /* USB_USE_SOFTINTR */ 1457 1458 sc->sc_bus.intr_context--; 1459 DPRINTFN(10,("ohci_softintr: done:\n")); 1460 } 1461 1462 void 1463 ohci_device_ctrl_done(usbd_xfer_handle xfer) 1464 { 1465 DPRINTFN(10,("ohci_device_ctrl_done: xfer=%p\n", xfer)); 1466 1467 #ifdef DIAGNOSTIC 1468 if (!(xfer->rqflags & URQ_REQUEST)) { 1469 panic("ohci_device_ctrl_done: not a request"); 1470 } 1471 #endif 1472 } 1473 1474 void 1475 ohci_device_intr_done(usbd_xfer_handle xfer) 1476 { 1477 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1478 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1479 ohci_soft_ed_t *sed = opipe->sed; 1480 ohci_soft_td_t *data, *tail; 1481 1482 1483 DPRINTFN(10,("ohci_device_intr_done: xfer=%p, actlen=%d\n", 1484 xfer, xfer->actlen)); 1485 1486 if (xfer->pipe->repeat) { 1487 data = opipe->tail.td; 1488 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 1489 if (tail == NULL) { 1490 xfer->status = USBD_NOMEM; 1491 return; 1492 } 1493 tail->xfer = NULL; 1494 1495 data->td.td_flags = HTOO32( 1496 OHCI_TD_IN | OHCI_TD_NOCC | 1497 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 1498 if (xfer->flags & USBD_SHORT_XFER_OK) 1499 data->td.td_flags |= HTOO32(OHCI_TD_R); 1500 data->td.td_cbp = HTOO32(DMAADDR(&xfer->dmabuf, 0)); 1501 data->nexttd = tail; 1502 data->td.td_nexttd = HTOO32(tail->physaddr); 1503 data->td.td_be = HTOO32(O32TOH(data->td.td_cbp) + 1504 xfer->length - 1); 1505 data->len = xfer->length; 1506 data->xfer = xfer; 1507 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1508 xfer->hcpriv = data; 1509 xfer->actlen = 0; 1510 1511 sed->ed.ed_tailp = HTOO32(tail->physaddr); 1512 opipe->tail.td = tail; 1513 } 1514 } 1515 1516 void 1517 ohci_device_bulk_done(usbd_xfer_handle xfer) 1518 { 1519 DPRINTFN(10,("ohci_device_bulk_done: xfer=%p, actlen=%d\n", 1520 xfer, xfer->actlen)); 1521 } 1522 1523 void 1524 ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer) 1525 { 1526 usbd_pipe_handle pipe; 1527 u_char *p; 1528 int i, m; 1529 int hstatus; 1530 1531 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1532 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n", 1533 sc, xfer, hstatus)); 1534 1535 if (xfer == NULL) { 1536 /* Just ignore the change. */ 1537 return; 1538 } 1539 1540 pipe = xfer->pipe; 1541 1542 p = KERNADDR(&xfer->dmabuf, 0); 1543 m = min(sc->sc_noport, xfer->length * 8 - 1); 1544 memset(p, 0, xfer->length); 1545 for (i = 1; i <= m; i++) { 1546 /* Pick out CHANGE bits from the status reg. */ 1547 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1548 p[i/8] |= 1 << (i%8); 1549 } 1550 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 1551 xfer->actlen = xfer->length; 1552 xfer->status = USBD_NORMAL_COMPLETION; 1553 1554 usb_transfer_complete(xfer); 1555 } 1556 1557 void 1558 ohci_root_intr_done(usbd_xfer_handle xfer) 1559 { 1560 } 1561 1562 void 1563 ohci_root_ctrl_done(usbd_xfer_handle xfer) 1564 { 1565 } 1566 1567 /* 1568 * Wait here until controller claims to have an interrupt. 1569 * Then call ohci_intr and return. Use timeout to avoid waiting 1570 * too long. 1571 */ 1572 void 1573 ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer) 1574 { 1575 int timo; 1576 u_int32_t intrs; 1577 1578 xfer->status = USBD_IN_PROGRESS; 1579 for (timo = xfer->timeout; timo >= 0; timo--) { 1580 usb_delay_ms(&sc->sc_bus, 1); 1581 if (sc->sc_dying) 1582 break; 1583 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 1584 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs)); 1585 #ifdef OHCI_DEBUG 1586 if (ohcidebug > 15) 1587 ohci_dumpregs(sc); 1588 #endif 1589 if (intrs) { 1590 ohci_intr1(sc); 1591 if (xfer->status != USBD_IN_PROGRESS) 1592 return; 1593 } 1594 } 1595 1596 /* Timeout */ 1597 DPRINTF(("ohci_waitintr: timeout\n")); 1598 xfer->status = USBD_TIMEOUT; 1599 usb_transfer_complete(xfer); 1600 /* XXX should free TD */ 1601 } 1602 1603 void 1604 ohci_poll(struct usbd_bus *bus) 1605 { 1606 ohci_softc_t *sc = (ohci_softc_t *)bus; 1607 #ifdef OHCI_DEBUG 1608 static int last; 1609 int new; 1610 new = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1611 if (new != last) { 1612 DPRINTFN(10,("ohci_poll: intrs=0x%04x\n", new)); 1613 last = new; 1614 } 1615 #endif 1616 1617 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) 1618 ohci_intr1(sc); 1619 } 1620 1621 usbd_status 1622 ohci_device_request(usbd_xfer_handle xfer) 1623 { 1624 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1625 usb_device_request_t *req = &xfer->request; 1626 usbd_device_handle dev = opipe->pipe.device; 1627 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1628 int addr = dev->address; 1629 ohci_soft_td_t *setup, *stat, *next, *tail; 1630 ohci_soft_ed_t *sed; 1631 int isread; 1632 int len; 1633 usbd_status err; 1634 int s; 1635 1636 isread = req->bmRequestType & UT_READ; 1637 len = UGETW(req->wLength); 1638 1639 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 1640 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 1641 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1642 UGETW(req->wIndex), len, addr, 1643 opipe->pipe.endpoint->edesc->bEndpointAddress)); 1644 1645 setup = opipe->tail.td; 1646 stat = ohci_alloc_std(sc); 1647 if (stat == NULL) { 1648 err = USBD_NOMEM; 1649 goto bad1; 1650 } 1651 tail = ohci_alloc_std(sc); 1652 if (tail == NULL) { 1653 err = USBD_NOMEM; 1654 goto bad2; 1655 } 1656 tail->xfer = NULL; 1657 1658 sed = opipe->sed; 1659 opipe->u.ctl.length = len; 1660 1661 /* Update device address and length since they may have changed 1662 during the setup of the control pipe in usbd_new_device(). */ 1663 /* XXX This only needs to be done once, but it's too early in open. */ 1664 /* XXXX Should not touch ED here! */ 1665 sed->ed.ed_flags = HTOO32( 1666 (O32TOH(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) | 1667 OHCI_ED_SET_FA(addr) | 1668 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize))); 1669 1670 next = stat; 1671 1672 /* Set up data transaction */ 1673 if (len != 0) { 1674 ohci_soft_td_t *std = stat; 1675 1676 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 1677 std, &stat); 1678 stat = stat->nexttd; /* point at free TD */ 1679 if (err) 1680 goto bad3; 1681 /* Start toggle at 1 and then use the carried toggle. */ 1682 std->td.td_flags &= HTOO32(~OHCI_TD_TOGGLE_MASK); 1683 std->td.td_flags |= HTOO32(OHCI_TD_TOGGLE_1); 1684 } 1685 1686 memcpy(KERNADDR(&opipe->u.ctl.reqdma, 0), req, sizeof *req); 1687 1688 setup->td.td_flags = HTOO32(OHCI_TD_SETUP | OHCI_TD_NOCC | 1689 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1690 setup->td.td_cbp = HTOO32(DMAADDR(&opipe->u.ctl.reqdma, 0)); 1691 setup->nexttd = next; 1692 setup->td.td_nexttd = HTOO32(next->physaddr); 1693 setup->td.td_be = HTOO32(O32TOH(setup->td.td_cbp) + sizeof *req - 1); 1694 setup->len = 0; 1695 setup->xfer = xfer; 1696 setup->flags = 0; 1697 xfer->hcpriv = setup; 1698 1699 stat->td.td_flags = HTOO32( 1700 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | 1701 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1702 stat->td.td_cbp = 0; 1703 stat->nexttd = tail; 1704 stat->td.td_nexttd = HTOO32(tail->physaddr); 1705 stat->td.td_be = 0; 1706 stat->flags = OHCI_CALL_DONE; 1707 stat->len = 0; 1708 stat->xfer = xfer; 1709 1710 #ifdef OHCI_DEBUG 1711 if (ohcidebug > 5) { 1712 DPRINTF(("ohci_device_request:\n")); 1713 ohci_dump_ed(sc, sed); 1714 ohci_dump_tds(sc, setup); 1715 } 1716 #endif 1717 1718 /* Insert ED in schedule */ 1719 s = splusb(); 1720 sed->ed.ed_tailp = HTOO32(tail->physaddr); 1721 opipe->tail.td = tail; 1722 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1723 if (xfer->timeout && !sc->sc_bus.use_polling) { 1724 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 1725 ohci_timeout, xfer); 1726 } 1727 splx(s); 1728 1729 #ifdef OHCI_DEBUG 1730 if (ohcidebug > 20) { 1731 delay(10000); 1732 DPRINTF(("ohci_device_request: status=%x\n", 1733 OREAD4(sc, OHCI_COMMAND_STATUS))); 1734 ohci_dumpregs(sc); 1735 printf("ctrl head:\n"); 1736 ohci_dump_ed(sc, sc->sc_ctrl_head); 1737 printf("sed:\n"); 1738 ohci_dump_ed(sc, sed); 1739 ohci_dump_tds(sc, setup); 1740 } 1741 #endif 1742 1743 return (USBD_NORMAL_COMPLETION); 1744 1745 bad3: 1746 ohci_free_std(sc, tail); 1747 bad2: 1748 ohci_free_std(sc, stat); 1749 bad1: 1750 return (err); 1751 } 1752 1753 /* 1754 * Add an ED to the schedule. Called at splusb(). 1755 */ 1756 void 1757 ohci_add_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1758 { 1759 DPRINTFN(8,("ohci_add_ed: sed=%p head=%p\n", sed, head)); 1760 1761 SPLUSBCHECK; 1762 sed->next = head->next; 1763 sed->ed.ed_nexted = head->ed.ed_nexted; 1764 head->next = sed; 1765 head->ed.ed_nexted = HTOO32(sed->physaddr); 1766 } 1767 1768 /* 1769 * Remove an ED from the schedule. Called at splusb(). 1770 */ 1771 void 1772 ohci_rem_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1773 { 1774 ohci_soft_ed_t *p; 1775 1776 SPLUSBCHECK; 1777 1778 /* XXX */ 1779 for (p = head; p != NULL && p->next != sed; p = p->next) 1780 ; 1781 if (p == NULL) 1782 panic("ohci_rem_ed: ED not found"); 1783 p->next = sed->next; 1784 p->ed.ed_nexted = sed->ed.ed_nexted; 1785 } 1786 1787 /* 1788 * When a transfer is completed the TD is added to the done queue by 1789 * the host controller. This queue is the processed by software. 1790 * Unfortunately the queue contains the physical address of the TD 1791 * and we have no simple way to translate this back to a kernel address. 1792 * To make the translation possible (and fast) we use a hash table of 1793 * TDs currently in the schedule. The physical address is used as the 1794 * hash value. 1795 */ 1796 1797 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1798 /* Called at splusb() */ 1799 void 1800 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1801 { 1802 int h = HASH(std->physaddr); 1803 1804 SPLUSBCHECK; 1805 1806 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1807 } 1808 1809 /* Called at splusb() */ 1810 void 1811 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1812 { 1813 SPLUSBCHECK; 1814 1815 LIST_REMOVE(std, hnext); 1816 } 1817 1818 ohci_soft_td_t * 1819 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a) 1820 { 1821 int h = HASH(a); 1822 ohci_soft_td_t *std; 1823 1824 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1825 std != NULL; 1826 std = LIST_NEXT(std, hnext)) 1827 if (std->physaddr == a) 1828 return (std); 1829 return (NULL); 1830 } 1831 1832 /* Called at splusb() */ 1833 void 1834 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1835 { 1836 int h = HASH(sitd->physaddr); 1837 1838 SPLUSBCHECK; 1839 1840 DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n", 1841 sitd, (u_long)sitd->physaddr)); 1842 1843 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext); 1844 } 1845 1846 /* Called at splusb() */ 1847 void 1848 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1849 { 1850 SPLUSBCHECK; 1851 1852 DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n", 1853 sitd, (u_long)sitd->physaddr)); 1854 1855 LIST_REMOVE(sitd, hnext); 1856 } 1857 1858 ohci_soft_itd_t * 1859 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a) 1860 { 1861 int h = HASH(a); 1862 ohci_soft_itd_t *sitd; 1863 1864 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]); 1865 sitd != NULL; 1866 sitd = LIST_NEXT(sitd, hnext)) 1867 if (sitd->physaddr == a) 1868 return (sitd); 1869 return (NULL); 1870 } 1871 1872 void 1873 ohci_timeout(void *addr) 1874 { 1875 struct ohci_xfer *oxfer = addr; 1876 struct ohci_pipe *opipe = (struct ohci_pipe *)oxfer->xfer.pipe; 1877 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1878 1879 DPRINTF(("ohci_timeout: oxfer=%p\n", oxfer)); 1880 1881 if (sc->sc_dying) { 1882 ohci_abort_xfer(&oxfer->xfer, USBD_TIMEOUT); 1883 return; 1884 } 1885 1886 /* Execute the abort in a process context. */ 1887 usb_init_task(&oxfer->abort_task, ohci_timeout_task, addr); 1888 usb_add_task(oxfer->xfer.pipe->device, &oxfer->abort_task); 1889 } 1890 1891 void 1892 ohci_timeout_task(void *addr) 1893 { 1894 usbd_xfer_handle xfer = addr; 1895 int s; 1896 1897 DPRINTF(("ohci_timeout_task: xfer=%p\n", xfer)); 1898 1899 s = splusb(); 1900 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1901 splx(s); 1902 } 1903 1904 #ifdef OHCI_DEBUG 1905 void 1906 ohci_dump_tds(ohci_softc_t *sc, ohci_soft_td_t *std) 1907 { 1908 for (; std; std = std->nexttd) 1909 ohci_dump_td(sc, std); 1910 } 1911 1912 void 1913 ohci_dump_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1914 { 1915 char sbuf[128]; 1916 1917 bitmask_snprintf((u_int32_t)O32TOH(std->td.td_flags), 1918 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 1919 sbuf, sizeof(sbuf)); 1920 1921 printf("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx " 1922 "nexttd=0x%08lx be=0x%08lx\n", 1923 std, (u_long)std->physaddr, sbuf, 1924 OHCI_TD_GET_DI(O32TOH(std->td.td_flags)), 1925 OHCI_TD_GET_EC(O32TOH(std->td.td_flags)), 1926 OHCI_TD_GET_CC(O32TOH(std->td.td_flags)), 1927 (u_long)O32TOH(std->td.td_cbp), 1928 (u_long)O32TOH(std->td.td_nexttd), 1929 (u_long)O32TOH(std->td.td_be)); 1930 } 1931 1932 void 1933 ohci_dump_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1934 { 1935 int i; 1936 1937 printf("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n" 1938 "bp0=0x%08lx next=0x%08lx be=0x%08lx\n", 1939 sitd, (u_long)sitd->physaddr, 1940 OHCI_ITD_GET_SF(O32TOH(sitd->itd.itd_flags)), 1941 OHCI_ITD_GET_DI(O32TOH(sitd->itd.itd_flags)), 1942 OHCI_ITD_GET_FC(O32TOH(sitd->itd.itd_flags)), 1943 OHCI_ITD_GET_CC(O32TOH(sitd->itd.itd_flags)), 1944 (u_long)O32TOH(sitd->itd.itd_bp0), 1945 (u_long)O32TOH(sitd->itd.itd_nextitd), 1946 (u_long)O32TOH(sitd->itd.itd_be)); 1947 for (i = 0; i < OHCI_ITD_NOFFSET; i++) 1948 printf("offs[%d]=0x%04x ", i, 1949 (u_int)O16TOH(sitd->itd.itd_offset[i])); 1950 printf("\n"); 1951 } 1952 1953 void 1954 ohci_dump_itds(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1955 { 1956 for (; sitd; sitd = sitd->nextitd) 1957 ohci_dump_itd(sc, sitd); 1958 } 1959 1960 void 1961 ohci_dump_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 1962 { 1963 char sbuf[128], sbuf2[128]; 1964 1965 bitmask_snprintf((u_int32_t)O32TOH(sed->ed.ed_flags), 1966 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO", 1967 sbuf, sizeof(sbuf)); 1968 bitmask_snprintf((u_int32_t)O32TOH(sed->ed.ed_headp), 1969 "\20\1HALT\2CARRY", sbuf2, sizeof(sbuf2)); 1970 1971 printf("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d flags=%s\ntailp=0x%08lx " 1972 "headflags=%s headp=0x%08lx nexted=0x%08lx\n", 1973 sed, (u_long)sed->physaddr, 1974 OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)), 1975 OHCI_ED_GET_EN(O32TOH(sed->ed.ed_flags)), 1976 OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)), sbuf, 1977 (u_long)O32TOH(sed->ed.ed_tailp), sbuf2, 1978 (u_long)O32TOH(sed->ed.ed_headp), 1979 (u_long)O32TOH(sed->ed.ed_nexted)); 1980 } 1981 #endif 1982 1983 usbd_status 1984 ohci_open(usbd_pipe_handle pipe) 1985 { 1986 usbd_device_handle dev = pipe->device; 1987 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1988 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1989 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1990 u_int8_t addr = dev->address; 1991 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1992 ohci_soft_ed_t *sed; 1993 ohci_soft_td_t *std; 1994 ohci_soft_itd_t *sitd; 1995 ohci_physaddr_t tdphys; 1996 u_int32_t fmt; 1997 usbd_status err; 1998 int s; 1999 int ival; 2000 2001 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 2002 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 2003 2004 if (sc->sc_dying) 2005 return (USBD_IOERROR); 2006 2007 std = NULL; 2008 sed = NULL; 2009 2010 if (addr == sc->sc_addr) { 2011 switch (ed->bEndpointAddress) { 2012 case USB_CONTROL_ENDPOINT: 2013 pipe->methods = &ohci_root_ctrl_methods; 2014 break; 2015 case UE_DIR_IN | OHCI_INTR_ENDPT: 2016 pipe->methods = &ohci_root_intr_methods; 2017 break; 2018 default: 2019 return (USBD_INVAL); 2020 } 2021 } else { 2022 sed = ohci_alloc_sed(sc); 2023 if (sed == NULL) 2024 goto bad0; 2025 opipe->sed = sed; 2026 if (xfertype == UE_ISOCHRONOUS) { 2027 sitd = ohci_alloc_sitd(sc); 2028 if (sitd == NULL) 2029 goto bad1; 2030 opipe->tail.itd = sitd; 2031 tdphys = sitd->physaddr; 2032 fmt = OHCI_ED_FORMAT_ISO; 2033 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 2034 fmt |= OHCI_ED_DIR_IN; 2035 else 2036 fmt |= OHCI_ED_DIR_OUT; 2037 } else { 2038 std = ohci_alloc_std(sc); 2039 if (std == NULL) 2040 goto bad1; 2041 opipe->tail.td = std; 2042 tdphys = std->physaddr; 2043 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD; 2044 } 2045 sed->ed.ed_flags = HTOO32( 2046 OHCI_ED_SET_FA(addr) | 2047 OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) | 2048 (dev->speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) | 2049 fmt | 2050 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 2051 sed->ed.ed_headp = sed->ed.ed_tailp = HTOO32(tdphys); 2052 2053 switch (xfertype) { 2054 case UE_CONTROL: 2055 pipe->methods = &ohci_device_ctrl_methods; 2056 err = usb_allocmem(&sc->sc_bus, 2057 sizeof(usb_device_request_t), 2058 0, &opipe->u.ctl.reqdma); 2059 if (err) 2060 goto bad; 2061 s = splusb(); 2062 ohci_add_ed(sc, sed, sc->sc_ctrl_head); 2063 splx(s); 2064 break; 2065 case UE_INTERRUPT: 2066 pipe->methods = &ohci_device_intr_methods; 2067 ival = pipe->interval; 2068 if (ival == USBD_DEFAULT_INTERVAL) 2069 ival = ed->bInterval; 2070 return (ohci_device_setintr(sc, opipe, ival)); 2071 case UE_ISOCHRONOUS: 2072 pipe->methods = &ohci_device_isoc_methods; 2073 return (ohci_setup_isoc(pipe)); 2074 case UE_BULK: 2075 pipe->methods = &ohci_device_bulk_methods; 2076 s = splusb(); 2077 ohci_add_ed(sc, sed, sc->sc_bulk_head); 2078 splx(s); 2079 break; 2080 } 2081 } 2082 return (USBD_NORMAL_COMPLETION); 2083 2084 bad: 2085 if (std != NULL) 2086 ohci_free_std(sc, std); 2087 bad1: 2088 if (sed != NULL) 2089 ohci_free_sed(sc, sed); 2090 bad0: 2091 return (USBD_NOMEM); 2092 2093 } 2094 2095 /* 2096 * Close a reqular pipe. 2097 * Assumes that there are no pending transactions. 2098 */ 2099 void 2100 ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head) 2101 { 2102 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2103 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2104 ohci_soft_ed_t *sed = opipe->sed; 2105 int s; 2106 2107 s = splusb(); 2108 #ifdef DIAGNOSTIC 2109 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 2110 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2111 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) { 2112 ohci_soft_td_t *std; 2113 std = ohci_hash_find_td(sc, O32TOH(sed->ed.ed_headp)); 2114 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 2115 "tl=0x%x pipe=%p, std=%p\n", sed, 2116 (int)O32TOH(sed->ed.ed_headp), 2117 (int)O32TOH(sed->ed.ed_tailp), 2118 pipe, std); 2119 #ifdef USB_DEBUG 2120 usbd_dump_pipe(&opipe->pipe); 2121 #endif 2122 #ifdef OHCI_DEBUG 2123 ohci_dump_ed(sc, sed); 2124 if (std) 2125 ohci_dump_td(sc, std); 2126 #endif 2127 usb_delay_ms(&sc->sc_bus, 2); 2128 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2129 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) 2130 printf("ohci_close_pipe: pipe still not empty\n"); 2131 } 2132 #endif 2133 ohci_rem_ed(sed, head); 2134 /* Make sure the host controller is not touching this ED */ 2135 usb_delay_ms(&sc->sc_bus, 1); 2136 splx(s); 2137 ohci_free_sed(sc, opipe->sed); 2138 } 2139 2140 /* 2141 * Abort a device request. 2142 * If this routine is called at splusb() it guarantees that the request 2143 * will be removed from the hardware scheduling and that the callback 2144 * for it will be called with USBD_CANCELLED status. 2145 * It's impossible to guarantee that the requested transfer will not 2146 * have happened since the hardware runs concurrently. 2147 * If the transaction has already happened we rely on the ordinary 2148 * interrupt processing to process it. 2149 */ 2150 void 2151 ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2152 { 2153 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2154 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 2155 ohci_soft_ed_t *sed = opipe->sed; 2156 ohci_soft_td_t *p, *n; 2157 ohci_physaddr_t headp; 2158 int s, hit; 2159 int wake; 2160 2161 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p sed=%p\n", xfer, opipe,sed)); 2162 2163 if (sc->sc_dying) { 2164 /* If we're dying, just do the software part. */ 2165 s = splusb(); 2166 xfer->status = status; /* make software ignore it */ 2167 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 2168 usb_transfer_complete(xfer); 2169 splx(s); 2170 } 2171 2172 if (xfer->device->bus->intr_context || !curproc) 2173 panic("ohci_abort_xfer: not in process context"); 2174 2175 /* 2176 * If an abort is already in progress then just wait for it to 2177 * complete and return. 2178 */ 2179 if (xfer->hcflags & UXFER_ABORTING) { 2180 DPRINTFN(2, ("ohci_abort_xfer: already aborting\n")); 2181 #ifdef DIAGNOSTIC 2182 if (status == USBD_TIMEOUT) 2183 printf("0hci_abort_xfer: TIMEOUT while aborting\n"); 2184 #endif 2185 /* Override the status which might be USBD_TIMEOUT. */ 2186 xfer->status = status; 2187 DPRINTFN(2, ("ohci_abort_xfer: waiting for abort to finish\n")); 2188 xfer->hcflags |= UXFER_ABORTWAIT; 2189 while (xfer->hcflags & UXFER_ABORTING) 2190 tsleep(&xfer->hcflags, PZERO, "ohciaw", 0); 2191 return; 2192 } 2193 xfer->hcflags |= UXFER_ABORTING; 2194 2195 /* 2196 * Step 1: Make interrupt routine and hardware ignore xfer. 2197 */ 2198 s = splusb(); 2199 xfer->status = status; /* make software ignore it */ 2200 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 2201 splx(s); 2202 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed)); 2203 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */ 2204 2205 /* 2206 * Step 2: Wait until we know hardware has finished any possible 2207 * use of the xfer. Also make sure the soft interrupt routine 2208 * has run. 2209 */ 2210 usb_delay_ms(opipe->pipe.device->bus, 20); /* Hardware finishes in 1ms */ 2211 s = splusb(); 2212 #ifdef USB_USE_SOFTINTR 2213 sc->sc_softwake = 1; 2214 #endif /* USB_USE_SOFTINTR */ 2215 usb_schedsoftintr(&sc->sc_bus); 2216 #ifdef USB_USE_SOFTINTR 2217 tsleep(&sc->sc_softwake, PZERO, "ohciab", 0); 2218 #endif /* USB_USE_SOFTINTR */ 2219 splx(s); 2220 2221 /* 2222 * Step 3: Remove any vestiges of the xfer from the hardware. 2223 * The complication here is that the hardware may have executed 2224 * beyond the xfer we're trying to abort. So as we're scanning 2225 * the TDs of this xfer we check if the hardware points to 2226 * any of them. 2227 */ 2228 s = splusb(); /* XXX why? */ 2229 p = xfer->hcpriv; 2230 #ifdef DIAGNOSTIC 2231 if (p == NULL) { 2232 xfer->hcflags &= ~UXFER_ABORTING; /* XXX */ 2233 splx(s); 2234 printf("ohci_abort_xfer: hcpriv is NULL\n"); 2235 return; 2236 } 2237 #endif 2238 #ifdef OHCI_DEBUG 2239 if (ohcidebug > 1) { 2240 DPRINTF(("ohci_abort_xfer: sed=\n")); 2241 ohci_dump_ed(sc, sed); 2242 ohci_dump_tds(sc, p); 2243 } 2244 #endif 2245 headp = O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK; 2246 hit = 0; 2247 for (; p->xfer == xfer; p = n) { 2248 hit |= headp == p->physaddr; 2249 n = p->nexttd; 2250 ohci_free_std(sc, p); 2251 } 2252 /* Zap headp register if hardware pointed inside the xfer. */ 2253 if (hit) { 2254 DPRINTFN(1,("ohci_abort_xfer: set hd=0x%08x, tl=0x%08x\n", 2255 (int)p->physaddr, (int)O32TOH(sed->ed.ed_tailp))); 2256 sed->ed.ed_headp = HTOO32(p->physaddr); /* unlink TDs */ 2257 } else { 2258 DPRINTFN(1,("ohci_abort_xfer: no hit\n")); 2259 } 2260 2261 /* 2262 * Step 4: Turn on hardware again. 2263 */ 2264 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */ 2265 2266 /* 2267 * Step 5: Execute callback. 2268 */ 2269 wake = xfer->hcflags & UXFER_ABORTWAIT; 2270 xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT); 2271 usb_transfer_complete(xfer); 2272 if (wake) 2273 wakeup(&xfer->hcflags); 2274 2275 splx(s); 2276 } 2277 2278 /* 2279 * Data structures and routines to emulate the root hub. 2280 */ 2281 Static usb_device_descriptor_t ohci_devd = { 2282 USB_DEVICE_DESCRIPTOR_SIZE, 2283 UDESC_DEVICE, /* type */ 2284 {0x00, 0x01}, /* USB version */ 2285 UDCLASS_HUB, /* class */ 2286 UDSUBCLASS_HUB, /* subclass */ 2287 UDPROTO_FSHUB, 2288 64, /* max packet */ 2289 {0},{0},{0x00,0x01}, /* device id */ 2290 1,2,0, /* string indicies */ 2291 1 /* # of configurations */ 2292 }; 2293 2294 Static usb_config_descriptor_t ohci_confd = { 2295 USB_CONFIG_DESCRIPTOR_SIZE, 2296 UDESC_CONFIG, 2297 {USB_CONFIG_DESCRIPTOR_SIZE + 2298 USB_INTERFACE_DESCRIPTOR_SIZE + 2299 USB_ENDPOINT_DESCRIPTOR_SIZE}, 2300 1, 2301 1, 2302 0, 2303 UC_SELF_POWERED, 2304 0 /* max power */ 2305 }; 2306 2307 Static usb_interface_descriptor_t ohci_ifcd = { 2308 USB_INTERFACE_DESCRIPTOR_SIZE, 2309 UDESC_INTERFACE, 2310 0, 2311 0, 2312 1, 2313 UICLASS_HUB, 2314 UISUBCLASS_HUB, 2315 UIPROTO_FSHUB, 2316 0 2317 }; 2318 2319 Static usb_endpoint_descriptor_t ohci_endpd = { 2320 USB_ENDPOINT_DESCRIPTOR_SIZE, 2321 UDESC_ENDPOINT, 2322 UE_DIR_IN | OHCI_INTR_ENDPT, 2323 UE_INTERRUPT, 2324 {8, 0}, /* max packet */ 2325 255 2326 }; 2327 2328 Static usb_hub_descriptor_t ohci_hubd = { 2329 USB_HUB_DESCRIPTOR_SIZE, 2330 UDESC_HUB, 2331 0, 2332 {0,0}, 2333 0, 2334 0, 2335 {0}, 2336 }; 2337 2338 Static int 2339 ohci_str(usb_string_descriptor_t *p, int l, const char *s) 2340 { 2341 int i; 2342 2343 if (l == 0) 2344 return (0); 2345 p->bLength = 2 * strlen(s) + 2; 2346 if (l == 1) 2347 return (1); 2348 p->bDescriptorType = UDESC_STRING; 2349 l -= 2; 2350 for (i = 0; s[i] && l > 1; i++, l -= 2) 2351 USETW2(p->bString[i], 0, s[i]); 2352 return (2*i+2); 2353 } 2354 2355 /* 2356 * Simulate a hardware hub by handling all the necessary requests. 2357 */ 2358 Static usbd_status 2359 ohci_root_ctrl_transfer(usbd_xfer_handle xfer) 2360 { 2361 usbd_status err; 2362 2363 /* Insert last in queue. */ 2364 err = usb_insert_transfer(xfer); 2365 if (err) 2366 return (err); 2367 2368 /* Pipe isn't running, start first */ 2369 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2370 } 2371 2372 Static usbd_status 2373 ohci_root_ctrl_start(usbd_xfer_handle xfer) 2374 { 2375 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2376 usb_device_request_t *req; 2377 void *buf = NULL; 2378 int port, i; 2379 int s, len, value, index, l, totlen = 0; 2380 usb_port_status_t ps; 2381 usb_hub_descriptor_t hubd; 2382 usbd_status err; 2383 u_int32_t v; 2384 2385 if (sc->sc_dying) 2386 return (USBD_IOERROR); 2387 2388 #ifdef DIAGNOSTIC 2389 if (!(xfer->rqflags & URQ_REQUEST)) 2390 /* XXX panic */ 2391 return (USBD_INVAL); 2392 #endif 2393 req = &xfer->request; 2394 2395 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 2396 req->bmRequestType, req->bRequest)); 2397 2398 len = UGETW(req->wLength); 2399 value = UGETW(req->wValue); 2400 index = UGETW(req->wIndex); 2401 2402 if (len != 0) 2403 buf = KERNADDR(&xfer->dmabuf, 0); 2404 2405 #define C(x,y) ((x) | ((y) << 8)) 2406 switch(C(req->bRequest, req->bmRequestType)) { 2407 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 2408 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 2409 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 2410 /* 2411 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 2412 * for the integrated root hub. 2413 */ 2414 break; 2415 case C(UR_GET_CONFIG, UT_READ_DEVICE): 2416 if (len > 0) { 2417 *(u_int8_t *)buf = sc->sc_conf; 2418 totlen = 1; 2419 } 2420 break; 2421 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2422 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 2423 switch(value >> 8) { 2424 case UDESC_DEVICE: 2425 if ((value & 0xff) != 0) { 2426 err = USBD_IOERROR; 2427 goto ret; 2428 } 2429 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 2430 USETW(ohci_devd.idVendor, sc->sc_id_vendor); 2431 memcpy(buf, &ohci_devd, l); 2432 break; 2433 case UDESC_CONFIG: 2434 if ((value & 0xff) != 0) { 2435 err = USBD_IOERROR; 2436 goto ret; 2437 } 2438 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 2439 memcpy(buf, &ohci_confd, l); 2440 buf = (char *)buf + l; 2441 len -= l; 2442 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 2443 totlen += l; 2444 memcpy(buf, &ohci_ifcd, l); 2445 buf = (char *)buf + l; 2446 len -= l; 2447 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 2448 totlen += l; 2449 memcpy(buf, &ohci_endpd, l); 2450 break; 2451 case UDESC_STRING: 2452 if (len == 0) 2453 break; 2454 *(u_int8_t *)buf = 0; 2455 totlen = 1; 2456 switch (value & 0xff) { 2457 case 0: /* Language table */ 2458 totlen = ohci_str(buf, len, "\001"); 2459 break; 2460 case 1: /* Vendor */ 2461 totlen = ohci_str(buf, len, sc->sc_vendor); 2462 break; 2463 case 2: /* Product */ 2464 totlen = ohci_str(buf, len, "OHCI root hub"); 2465 break; 2466 } 2467 break; 2468 default: 2469 err = USBD_IOERROR; 2470 goto ret; 2471 } 2472 break; 2473 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 2474 if (len > 0) { 2475 *(u_int8_t *)buf = 0; 2476 totlen = 1; 2477 } 2478 break; 2479 case C(UR_GET_STATUS, UT_READ_DEVICE): 2480 if (len > 1) { 2481 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 2482 totlen = 2; 2483 } 2484 break; 2485 case C(UR_GET_STATUS, UT_READ_INTERFACE): 2486 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 2487 if (len > 1) { 2488 USETW(((usb_status_t *)buf)->wStatus, 0); 2489 totlen = 2; 2490 } 2491 break; 2492 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 2493 if (value >= USB_MAX_DEVICES) { 2494 err = USBD_IOERROR; 2495 goto ret; 2496 } 2497 sc->sc_addr = value; 2498 break; 2499 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 2500 if (value != 0 && value != 1) { 2501 err = USBD_IOERROR; 2502 goto ret; 2503 } 2504 sc->sc_conf = value; 2505 break; 2506 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 2507 break; 2508 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 2509 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 2510 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 2511 err = USBD_IOERROR; 2512 goto ret; 2513 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 2514 break; 2515 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 2516 break; 2517 /* Hub requests */ 2518 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2519 break; 2520 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2521 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 2522 "port=%d feature=%d\n", 2523 index, value)); 2524 if (index < 1 || index > sc->sc_noport) { 2525 err = USBD_IOERROR; 2526 goto ret; 2527 } 2528 port = OHCI_RH_PORT_STATUS(index); 2529 switch(value) { 2530 case UHF_PORT_ENABLE: 2531 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2532 break; 2533 case UHF_PORT_SUSPEND: 2534 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2535 break; 2536 case UHF_PORT_POWER: 2537 /* Yes, writing to the LOW_SPEED bit clears power. */ 2538 OWRITE4(sc, port, UPS_LOW_SPEED); 2539 break; 2540 case UHF_C_PORT_CONNECTION: 2541 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2542 break; 2543 case UHF_C_PORT_ENABLE: 2544 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2545 break; 2546 case UHF_C_PORT_SUSPEND: 2547 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2548 break; 2549 case UHF_C_PORT_OVER_CURRENT: 2550 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2551 break; 2552 case UHF_C_PORT_RESET: 2553 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2554 break; 2555 default: 2556 err = USBD_IOERROR; 2557 goto ret; 2558 } 2559 switch(value) { 2560 case UHF_C_PORT_CONNECTION: 2561 case UHF_C_PORT_ENABLE: 2562 case UHF_C_PORT_SUSPEND: 2563 case UHF_C_PORT_OVER_CURRENT: 2564 case UHF_C_PORT_RESET: 2565 /* Enable RHSC interrupt if condition is cleared. */ 2566 if ((OREAD4(sc, port) >> 16) == 0) 2567 ohci_rhsc_enable(sc); 2568 break; 2569 default: 2570 break; 2571 } 2572 break; 2573 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2574 if ((value & 0xff) != 0) { 2575 err = USBD_IOERROR; 2576 goto ret; 2577 } 2578 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2579 hubd = ohci_hubd; 2580 hubd.bNbrPorts = sc->sc_noport; 2581 USETW(hubd.wHubCharacteristics, 2582 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2583 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2584 /* XXX overcurrent */ 2585 ); 2586 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2587 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2588 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2589 hubd.DeviceRemovable[i++] = (u_int8_t)v; 2590 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2591 l = min(len, hubd.bDescLength); 2592 totlen = l; 2593 memcpy(buf, &hubd, l); 2594 break; 2595 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2596 if (len != 4) { 2597 err = USBD_IOERROR; 2598 goto ret; 2599 } 2600 memset(buf, 0, len); /* ? XXX */ 2601 totlen = len; 2602 break; 2603 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2604 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 2605 index)); 2606 if (index < 1 || index > sc->sc_noport) { 2607 err = USBD_IOERROR; 2608 goto ret; 2609 } 2610 if (len != 4) { 2611 err = USBD_IOERROR; 2612 goto ret; 2613 } 2614 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2615 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 2616 v)); 2617 USETW(ps.wPortStatus, v); 2618 USETW(ps.wPortChange, v >> 16); 2619 l = min(len, sizeof ps); 2620 memcpy(buf, &ps, l); 2621 totlen = l; 2622 break; 2623 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2624 err = USBD_IOERROR; 2625 goto ret; 2626 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2627 break; 2628 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2629 if (index < 1 || index > sc->sc_noport) { 2630 err = USBD_IOERROR; 2631 goto ret; 2632 } 2633 port = OHCI_RH_PORT_STATUS(index); 2634 switch(value) { 2635 case UHF_PORT_ENABLE: 2636 OWRITE4(sc, port, UPS_PORT_ENABLED); 2637 break; 2638 case UHF_PORT_SUSPEND: 2639 OWRITE4(sc, port, UPS_SUSPEND); 2640 break; 2641 case UHF_PORT_RESET: 2642 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 2643 index)); 2644 OWRITE4(sc, port, UPS_RESET); 2645 for (i = 0; i < 5; i++) { 2646 usb_delay_ms(&sc->sc_bus, 2647 USB_PORT_ROOT_RESET_DELAY); 2648 if (sc->sc_dying) { 2649 err = USBD_IOERROR; 2650 goto ret; 2651 } 2652 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2653 break; 2654 } 2655 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 2656 index, OREAD4(sc, port))); 2657 break; 2658 case UHF_PORT_POWER: 2659 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 2660 "%d\n", index)); 2661 OWRITE4(sc, port, UPS_PORT_POWER); 2662 break; 2663 default: 2664 err = USBD_IOERROR; 2665 goto ret; 2666 } 2667 break; 2668 default: 2669 err = USBD_IOERROR; 2670 goto ret; 2671 } 2672 xfer->actlen = totlen; 2673 err = USBD_NORMAL_COMPLETION; 2674 ret: 2675 xfer->status = err; 2676 s = splusb(); 2677 usb_transfer_complete(xfer); 2678 splx(s); 2679 return (USBD_IN_PROGRESS); 2680 } 2681 2682 /* Abort a root control request. */ 2683 Static void 2684 ohci_root_ctrl_abort(usbd_xfer_handle xfer) 2685 { 2686 /* Nothing to do, all transfers are synchronous. */ 2687 } 2688 2689 /* Close the root pipe. */ 2690 Static void 2691 ohci_root_ctrl_close(usbd_pipe_handle pipe) 2692 { 2693 DPRINTF(("ohci_root_ctrl_close\n")); 2694 /* Nothing to do. */ 2695 } 2696 2697 Static usbd_status 2698 ohci_root_intr_transfer(usbd_xfer_handle xfer) 2699 { 2700 usbd_status err; 2701 2702 /* Insert last in queue. */ 2703 err = usb_insert_transfer(xfer); 2704 if (err) 2705 return (err); 2706 2707 /* Pipe isn't running, start first */ 2708 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2709 } 2710 2711 Static usbd_status 2712 ohci_root_intr_start(usbd_xfer_handle xfer) 2713 { 2714 usbd_pipe_handle pipe = xfer->pipe; 2715 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2716 2717 if (sc->sc_dying) 2718 return (USBD_IOERROR); 2719 2720 sc->sc_intrxfer = xfer; 2721 2722 return (USBD_IN_PROGRESS); 2723 } 2724 2725 /* Abort a root interrupt request. */ 2726 Static void 2727 ohci_root_intr_abort(usbd_xfer_handle xfer) 2728 { 2729 int s; 2730 2731 if (xfer->pipe->intrxfer == xfer) { 2732 DPRINTF(("ohci_root_intr_abort: remove\n")); 2733 xfer->pipe->intrxfer = NULL; 2734 } 2735 xfer->status = USBD_CANCELLED; 2736 s = splusb(); 2737 usb_transfer_complete(xfer); 2738 splx(s); 2739 } 2740 2741 /* Close the root pipe. */ 2742 Static void 2743 ohci_root_intr_close(usbd_pipe_handle pipe) 2744 { 2745 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2746 2747 DPRINTF(("ohci_root_intr_close\n")); 2748 2749 sc->sc_intrxfer = NULL; 2750 } 2751 2752 /************************/ 2753 2754 Static usbd_status 2755 ohci_device_ctrl_transfer(usbd_xfer_handle xfer) 2756 { 2757 usbd_status err; 2758 2759 /* Insert last in queue. */ 2760 err = usb_insert_transfer(xfer); 2761 if (err) 2762 return (err); 2763 2764 /* Pipe isn't running, start first */ 2765 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2766 } 2767 2768 Static usbd_status 2769 ohci_device_ctrl_start(usbd_xfer_handle xfer) 2770 { 2771 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2772 usbd_status err; 2773 2774 if (sc->sc_dying) 2775 return (USBD_IOERROR); 2776 2777 #ifdef DIAGNOSTIC 2778 if (!(xfer->rqflags & URQ_REQUEST)) { 2779 /* XXX panic */ 2780 printf("ohci_device_ctrl_transfer: not a request\n"); 2781 return (USBD_INVAL); 2782 } 2783 #endif 2784 2785 err = ohci_device_request(xfer); 2786 if (err) 2787 return (err); 2788 2789 if (sc->sc_bus.use_polling) 2790 ohci_waitintr(sc, xfer); 2791 return (USBD_IN_PROGRESS); 2792 } 2793 2794 /* Abort a device control request. */ 2795 Static void 2796 ohci_device_ctrl_abort(usbd_xfer_handle xfer) 2797 { 2798 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer)); 2799 ohci_abort_xfer(xfer, USBD_CANCELLED); 2800 } 2801 2802 /* Close a device control pipe. */ 2803 Static void 2804 ohci_device_ctrl_close(usbd_pipe_handle pipe) 2805 { 2806 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2807 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2808 2809 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe)); 2810 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2811 ohci_free_std(sc, opipe->tail.td); 2812 } 2813 2814 /************************/ 2815 2816 Static void 2817 ohci_device_clear_toggle(usbd_pipe_handle pipe) 2818 { 2819 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2820 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2821 2822 opipe->sed->ed.ed_headp &= HTOO32(~OHCI_TOGGLECARRY); 2823 } 2824 2825 Static void 2826 ohci_noop(usbd_pipe_handle pipe) 2827 { 2828 } 2829 2830 Static usbd_status 2831 ohci_device_bulk_transfer(usbd_xfer_handle xfer) 2832 { 2833 usbd_status err; 2834 2835 /* Insert last in queue. */ 2836 err = usb_insert_transfer(xfer); 2837 if (err) 2838 return (err); 2839 2840 /* Pipe isn't running, start first */ 2841 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2842 } 2843 2844 Static usbd_status 2845 ohci_device_bulk_start(usbd_xfer_handle xfer) 2846 { 2847 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2848 usbd_device_handle dev = opipe->pipe.device; 2849 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2850 int addr = dev->address; 2851 ohci_soft_td_t *data, *tail, *tdp; 2852 ohci_soft_ed_t *sed; 2853 int s, len, isread, endpt; 2854 usbd_status err; 2855 2856 if (sc->sc_dying) 2857 return (USBD_IOERROR); 2858 2859 #ifdef DIAGNOSTIC 2860 if (xfer->rqflags & URQ_REQUEST) { 2861 /* XXX panic */ 2862 printf("ohci_device_bulk_start: a request\n"); 2863 return (USBD_INVAL); 2864 } 2865 #endif 2866 2867 len = xfer->length; 2868 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 2869 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2870 sed = opipe->sed; 2871 2872 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d " 2873 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags, 2874 endpt)); 2875 2876 opipe->u.bulk.isread = isread; 2877 opipe->u.bulk.length = len; 2878 2879 /* Update device address */ 2880 sed->ed.ed_flags = HTOO32( 2881 (O32TOH(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) | 2882 OHCI_ED_SET_FA(addr)); 2883 2884 /* Allocate a chain of new TDs (including a new tail). */ 2885 data = opipe->tail.td; 2886 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 2887 data, &tail); 2888 /* We want interrupt at the end of the transfer. */ 2889 tail->td.td_flags &= HTOO32(~OHCI_TD_INTR_MASK); 2890 tail->td.td_flags |= HTOO32(OHCI_TD_SET_DI(1)); 2891 tail->flags |= OHCI_CALL_DONE; 2892 tail = tail->nexttd; /* point at sentinel */ 2893 if (err) 2894 return (err); 2895 2896 tail->xfer = NULL; 2897 xfer->hcpriv = data; 2898 2899 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x " 2900 "td_cbp=0x%08x td_be=0x%08x\n", 2901 (int)O32TOH(sed->ed.ed_flags), 2902 (int)O32TOH(data->td.td_flags), 2903 (int)O32TOH(data->td.td_cbp), 2904 (int)O32TOH(data->td.td_be))); 2905 2906 #ifdef OHCI_DEBUG 2907 if (ohcidebug > 5) { 2908 ohci_dump_ed(sc, sed); 2909 ohci_dump_tds(sc, data); 2910 } 2911 #endif 2912 2913 /* Insert ED in schedule */ 2914 s = splusb(); 2915 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 2916 tdp->xfer = xfer; 2917 } 2918 sed->ed.ed_tailp = HTOO32(tail->physaddr); 2919 opipe->tail.td = tail; 2920 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 2921 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 2922 if (xfer->timeout && !sc->sc_bus.use_polling) { 2923 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2924 ohci_timeout, xfer); 2925 } 2926 2927 #if 0 2928 /* This goes wrong if we are too slow. */ 2929 if (ohcidebug > 10) { 2930 delay(10000); 2931 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2932 OREAD4(sc, OHCI_COMMAND_STATUS))); 2933 ohci_dump_ed(sc, sed); 2934 ohci_dump_tds(sc, data); 2935 } 2936 #endif 2937 2938 splx(s); 2939 2940 return (USBD_IN_PROGRESS); 2941 } 2942 2943 Static void 2944 ohci_device_bulk_abort(usbd_xfer_handle xfer) 2945 { 2946 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer)); 2947 ohci_abort_xfer(xfer, USBD_CANCELLED); 2948 } 2949 2950 /* 2951 * Close a device bulk pipe. 2952 */ 2953 Static void 2954 ohci_device_bulk_close(usbd_pipe_handle pipe) 2955 { 2956 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2957 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2958 2959 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe)); 2960 ohci_close_pipe(pipe, sc->sc_bulk_head); 2961 ohci_free_std(sc, opipe->tail.td); 2962 } 2963 2964 /************************/ 2965 2966 Static usbd_status 2967 ohci_device_intr_transfer(usbd_xfer_handle xfer) 2968 { 2969 usbd_status err; 2970 2971 /* Insert last in queue. */ 2972 err = usb_insert_transfer(xfer); 2973 if (err) 2974 return (err); 2975 2976 /* Pipe isn't running, start first */ 2977 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2978 } 2979 2980 Static usbd_status 2981 ohci_device_intr_start(usbd_xfer_handle xfer) 2982 { 2983 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2984 usbd_device_handle dev = opipe->pipe.device; 2985 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2986 ohci_soft_ed_t *sed = opipe->sed; 2987 ohci_soft_td_t *data, *tail; 2988 int s, len, isread, endpt; 2989 2990 if (sc->sc_dying) 2991 return (USBD_IOERROR); 2992 2993 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d " 2994 "flags=%d priv=%p\n", 2995 xfer, xfer->length, xfer->flags, xfer->priv)); 2996 2997 #ifdef DIAGNOSTIC 2998 if (xfer->rqflags & URQ_REQUEST) 2999 panic("ohci_device_intr_transfer: a request"); 3000 #endif 3001 3002 len = xfer->length; 3003 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 3004 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3005 3006 data = opipe->tail.td; 3007 tail = ohci_alloc_std(sc); 3008 if (tail == NULL) 3009 return (USBD_NOMEM); 3010 tail->xfer = NULL; 3011 3012 data->td.td_flags = HTOO32( 3013 isread ? OHCI_TD_IN : OHCI_TD_OUT | 3014 OHCI_TD_NOCC | 3015 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 3016 if (xfer->flags & USBD_SHORT_XFER_OK) 3017 data->td.td_flags |= HTOO32(OHCI_TD_R); 3018 data->td.td_cbp = HTOO32(DMAADDR(&xfer->dmabuf, 0)); 3019 data->nexttd = tail; 3020 data->td.td_nexttd = HTOO32(tail->physaddr); 3021 data->td.td_be = HTOO32(O32TOH(data->td.td_cbp) + len - 1); 3022 data->len = len; 3023 data->xfer = xfer; 3024 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 3025 xfer->hcpriv = data; 3026 3027 #ifdef OHCI_DEBUG 3028 if (ohcidebug > 5) { 3029 DPRINTF(("ohci_device_intr_transfer:\n")); 3030 ohci_dump_ed(sc, sed); 3031 ohci_dump_tds(sc, data); 3032 } 3033 #endif 3034 3035 /* Insert ED in schedule */ 3036 s = splusb(); 3037 sed->ed.ed_tailp = HTOO32(tail->physaddr); 3038 opipe->tail.td = tail; 3039 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3040 3041 #if 0 3042 /* 3043 * This goes horribly wrong, printing thousands of descriptors, 3044 * because false references are followed due to the fact that the 3045 * TD is gone. 3046 */ 3047 if (ohcidebug > 5) { 3048 usb_delay_ms(&sc->sc_bus, 5); 3049 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 3050 OREAD4(sc, OHCI_COMMAND_STATUS))); 3051 ohci_dump_ed(sc, sed); 3052 ohci_dump_tds(sc, data); 3053 } 3054 #endif 3055 splx(s); 3056 3057 return (USBD_IN_PROGRESS); 3058 } 3059 3060 /* Abort a device control request. */ 3061 Static void 3062 ohci_device_intr_abort(usbd_xfer_handle xfer) 3063 { 3064 if (xfer->pipe->intrxfer == xfer) { 3065 DPRINTF(("ohci_device_intr_abort: remove\n")); 3066 xfer->pipe->intrxfer = NULL; 3067 } 3068 ohci_abort_xfer(xfer, USBD_CANCELLED); 3069 } 3070 3071 /* Close a device interrupt pipe. */ 3072 Static void 3073 ohci_device_intr_close(usbd_pipe_handle pipe) 3074 { 3075 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3076 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3077 int nslots = opipe->u.intr.nslots; 3078 int pos = opipe->u.intr.pos; 3079 int j; 3080 ohci_soft_ed_t *p, *sed = opipe->sed; 3081 int s; 3082 3083 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 3084 pipe, nslots, pos)); 3085 s = splusb(); 3086 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 3087 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 3088 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) 3089 usb_delay_ms(&sc->sc_bus, 2); 3090 3091 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 3092 ; 3093 #ifdef DIAGNOSTIC 3094 if (p == NULL) 3095 panic("ohci_device_intr_close: ED not found"); 3096 #endif 3097 p->next = sed->next; 3098 p->ed.ed_nexted = sed->ed.ed_nexted; 3099 splx(s); 3100 3101 for (j = 0; j < nslots; j++) 3102 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 3103 3104 ohci_free_std(sc, opipe->tail.td); 3105 ohci_free_sed(sc, opipe->sed); 3106 } 3107 3108 Static usbd_status 3109 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival) 3110 { 3111 int i, j, s, best; 3112 u_int npoll, slow, shigh, nslots; 3113 u_int bestbw, bw; 3114 ohci_soft_ed_t *hsed, *sed = opipe->sed; 3115 3116 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 3117 if (ival == 0) { 3118 printf("ohci_setintr: 0 interval\n"); 3119 return (USBD_INVAL); 3120 } 3121 3122 npoll = OHCI_NO_INTRS; 3123 while (npoll > ival) 3124 npoll /= 2; 3125 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 3126 3127 /* 3128 * We now know which level in the tree the ED must go into. 3129 * Figure out which slot has most bandwidth left over. 3130 * Slots to examine: 3131 * npoll 3132 * 1 0 3133 * 2 1 2 3134 * 4 3 4 5 6 3135 * 8 7 8 9 10 11 12 13 14 3136 * N (N-1) .. (N-1+N-1) 3137 */ 3138 slow = npoll-1; 3139 shigh = slow + npoll; 3140 nslots = OHCI_NO_INTRS / npoll; 3141 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 3142 bw = 0; 3143 for (j = 0; j < nslots; j++) 3144 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 3145 if (bw < bestbw) { 3146 best = i; 3147 bestbw = bw; 3148 } 3149 } 3150 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 3151 best, slow, shigh, bestbw)); 3152 3153 s = splusb(); 3154 hsed = sc->sc_eds[best]; 3155 sed->next = hsed->next; 3156 sed->ed.ed_nexted = hsed->ed.ed_nexted; 3157 hsed->next = sed; 3158 hsed->ed.ed_nexted = HTOO32(sed->physaddr); 3159 splx(s); 3160 3161 for (j = 0; j < nslots; j++) 3162 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 3163 opipe->u.intr.nslots = nslots; 3164 opipe->u.intr.pos = best; 3165 3166 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 3167 return (USBD_NORMAL_COMPLETION); 3168 } 3169 3170 /***********************/ 3171 3172 usbd_status 3173 ohci_device_isoc_transfer(usbd_xfer_handle xfer) 3174 { 3175 usbd_status err; 3176 3177 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer)); 3178 3179 /* Put it on our queue, */ 3180 err = usb_insert_transfer(xfer); 3181 3182 /* bail out on error, */ 3183 if (err && err != USBD_IN_PROGRESS) 3184 return (err); 3185 3186 /* XXX should check inuse here */ 3187 3188 /* insert into schedule, */ 3189 ohci_device_isoc_enter(xfer); 3190 3191 /* and start if the pipe wasn't running */ 3192 if (!err) 3193 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 3194 3195 return (err); 3196 } 3197 3198 void 3199 ohci_device_isoc_enter(usbd_xfer_handle xfer) 3200 { 3201 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3202 usbd_device_handle dev = opipe->pipe.device; 3203 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 3204 ohci_soft_ed_t *sed = opipe->sed; 3205 struct iso *iso = &opipe->u.iso; 3206 ohci_soft_itd_t *sitd, *nsitd; 3207 ohci_physaddr_t buf, offs, noffs, bp0; 3208 int i, ncur, nframes; 3209 int s; 3210 3211 DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p " 3212 "nframes=%d\n", 3213 iso->inuse, iso->next, xfer, xfer->nframes)); 3214 3215 if (sc->sc_dying) 3216 return; 3217 3218 if (iso->next == -1) { 3219 /* Not in use yet, schedule it a few frames ahead. */ 3220 iso->next = O32TOH(sc->sc_hcca->hcca_frame_number) + 5; 3221 DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n", 3222 iso->next)); 3223 } 3224 3225 sitd = opipe->tail.itd; 3226 buf = DMAADDR(&xfer->dmabuf, 0); 3227 bp0 = OHCI_PAGE(buf); 3228 offs = OHCI_PAGE_OFFSET(buf); 3229 nframes = xfer->nframes; 3230 xfer->hcpriv = sitd; 3231 for (i = ncur = 0; i < nframes; i++, ncur++) { 3232 noffs = offs + xfer->frlengths[i]; 3233 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ 3234 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */ 3235 3236 /* Allocate next ITD */ 3237 nsitd = ohci_alloc_sitd(sc); 3238 if (nsitd == NULL) { 3239 /* XXX what now? */ 3240 printf("%s: isoc TD alloc failed\n", 3241 USBDEVNAME(sc->sc_bus.bdev)); 3242 return; 3243 } 3244 3245 /* Fill current ITD */ 3246 sitd->itd.itd_flags = HTOO32( 3247 OHCI_ITD_NOCC | 3248 OHCI_ITD_SET_SF(iso->next) | 3249 OHCI_ITD_SET_DI(6) | /* delay intr a little */ 3250 OHCI_ITD_SET_FC(ncur)); 3251 sitd->itd.itd_bp0 = HTOO32(bp0); 3252 sitd->nextitd = nsitd; 3253 sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr); 3254 sitd->itd.itd_be = HTOO32(bp0 + offs - 1); 3255 sitd->xfer = xfer; 3256 sitd->flags = 0; 3257 3258 sitd = nsitd; 3259 iso->next = iso->next + ncur; 3260 bp0 = OHCI_PAGE(buf + offs); 3261 ncur = 0; 3262 } 3263 sitd->itd.itd_offset[ncur] = HTOO16(OHCI_ITD_MK_OFFS(offs)); 3264 offs = noffs; 3265 } 3266 nsitd = ohci_alloc_sitd(sc); 3267 if (nsitd == NULL) { 3268 /* XXX what now? */ 3269 printf("%s: isoc TD alloc failed\n", 3270 USBDEVNAME(sc->sc_bus.bdev)); 3271 return; 3272 } 3273 /* Fixup last used ITD */ 3274 sitd->itd.itd_flags = HTOO32( 3275 OHCI_ITD_NOCC | 3276 OHCI_ITD_SET_SF(iso->next) | 3277 OHCI_ITD_SET_DI(0) | 3278 OHCI_ITD_SET_FC(ncur)); 3279 sitd->itd.itd_bp0 = HTOO32(bp0); 3280 sitd->nextitd = nsitd; 3281 sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr); 3282 sitd->itd.itd_be = HTOO32(bp0 + offs - 1); 3283 sitd->xfer = xfer; 3284 sitd->flags = OHCI_CALL_DONE; 3285 3286 iso->next = iso->next + ncur; 3287 iso->inuse += nframes; 3288 3289 xfer->actlen = offs; /* XXX pretend we did it all */ 3290 3291 xfer->status = USBD_IN_PROGRESS; 3292 3293 #ifdef OHCI_DEBUG 3294 if (ohcidebug > 5) { 3295 DPRINTF(("ohci_device_isoc_enter: frame=%d\n", 3296 O32TOH(sc->sc_hcca->hcca_frame_number))); 3297 ohci_dump_itds(sc, xfer->hcpriv); 3298 ohci_dump_ed(sc, sed); 3299 } 3300 #endif 3301 3302 s = splusb(); 3303 sed->ed.ed_tailp = HTOO32(nsitd->physaddr); 3304 opipe->tail.itd = nsitd; 3305 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3306 splx(s); 3307 3308 #ifdef OHCI_DEBUG 3309 if (ohcidebug > 5) { 3310 delay(150000); 3311 DPRINTF(("ohci_device_isoc_enter: after frame=%d\n", 3312 O32TOH(sc->sc_hcca->hcca_frame_number))); 3313 ohci_dump_itds(sc, xfer->hcpriv); 3314 ohci_dump_ed(sc, sed); 3315 } 3316 #endif 3317 } 3318 3319 usbd_status 3320 ohci_device_isoc_start(usbd_xfer_handle xfer) 3321 { 3322 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3323 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3324 3325 DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer)); 3326 3327 if (sc->sc_dying) 3328 return (USBD_IOERROR); 3329 3330 #ifdef DIAGNOSTIC 3331 if (xfer->status != USBD_IN_PROGRESS) 3332 printf("ohci_device_isoc_start: not in progress %p\n", xfer); 3333 #endif 3334 3335 /* XXX anything to do? */ 3336 3337 return (USBD_IN_PROGRESS); 3338 } 3339 3340 void 3341 ohci_device_isoc_abort(usbd_xfer_handle xfer) 3342 { 3343 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3344 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3345 ohci_soft_ed_t *sed; 3346 ohci_soft_itd_t *sitd; 3347 int s; 3348 3349 s = splusb(); 3350 3351 DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer)); 3352 3353 /* Transfer is already done. */ 3354 if (xfer->status != USBD_NOT_STARTED && 3355 xfer->status != USBD_IN_PROGRESS) { 3356 splx(s); 3357 printf("ohci_device_isoc_abort: early return\n"); 3358 return; 3359 } 3360 3361 /* Give xfer the requested abort code. */ 3362 xfer->status = USBD_CANCELLED; 3363 3364 sed = opipe->sed; 3365 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */ 3366 3367 sitd = xfer->hcpriv; 3368 #ifdef DIAGNOSTIC 3369 if (sitd == NULL) { 3370 splx(s); 3371 printf("ohci_device_isoc_abort: hcpriv==0\n"); 3372 return; 3373 } 3374 #endif 3375 for (; sitd->xfer == xfer; sitd = sitd->nextitd) { 3376 #ifdef DIAGNOSTIC 3377 DPRINTFN(1,("abort sets done sitd=%p\n", sitd)); 3378 sitd->isdone = 1; 3379 #endif 3380 } 3381 3382 splx(s); 3383 3384 usb_delay_ms(&sc->sc_bus, OHCI_ITD_NOFFSET); 3385 3386 s = splusb(); 3387 3388 /* Run callback. */ 3389 usb_transfer_complete(xfer); 3390 3391 sed->ed.ed_headp = HTOO32(sitd->physaddr); /* unlink TDs */ 3392 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */ 3393 3394 splx(s); 3395 } 3396 3397 void 3398 ohci_device_isoc_done(usbd_xfer_handle xfer) 3399 { 3400 DPRINTFN(1,("ohci_device_isoc_done: xfer=%p\n", xfer)); 3401 } 3402 3403 usbd_status 3404 ohci_setup_isoc(usbd_pipe_handle pipe) 3405 { 3406 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3407 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3408 struct iso *iso = &opipe->u.iso; 3409 int s; 3410 3411 iso->next = -1; 3412 iso->inuse = 0; 3413 3414 s = splusb(); 3415 ohci_add_ed(sc, opipe->sed, sc->sc_isoc_head); 3416 splx(s); 3417 3418 return (USBD_NORMAL_COMPLETION); 3419 } 3420 3421 void 3422 ohci_device_isoc_close(usbd_pipe_handle pipe) 3423 { 3424 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3425 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3426 3427 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe)); 3428 ohci_close_pipe(pipe, sc->sc_isoc_head); 3429 #ifdef DIAGNOSTIC 3430 opipe->tail.itd->isdone = 1; 3431 #endif 3432 ohci_free_sitd(sc, opipe->tail.itd); 3433 } 3434
Indexes created Tue Sep 23 22:09:46 GMT 2025