ohci.c revision 1.175 1 /* $NetBSD: ohci.c,v 1.175 2006/09/03 07:06:39 christos Exp $ */
2 /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */
3
4 /*
5 * Copyright (c) 1998, 2004, 2005 The NetBSD Foundation, Inc.
6 * All rights reserved.
7 *
8 * This code is derived from software contributed to The NetBSD Foundation
9 * by Lennart Augustsson (lennart (at) augustsson.net) at
10 * Carlstedt Research & Technology.
11 * This code is derived from software contributed to The NetBSD Foundation
12 * by Charles M. Hannum.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions
16 * are met:
17 * 1. Redistributions of source code must retain the above copyright
18 * notice, this list of conditions and the following disclaimer.
19 * 2. Redistributions in binary form must reproduce the above copyright
20 * notice, this list of conditions and the following disclaimer in the
21 * documentation and/or other materials provided with the distribution.
22 * 3. All advertising materials mentioning features or use of this software
23 * must display the following acknowledgement:
24 * This product includes software developed by the NetBSD
25 * Foundation, Inc. and its contributors.
26 * 4. Neither the name of The NetBSD Foundation nor the names of its
27 * contributors may be used to endorse or promote products derived
28 * from this software without specific prior written permission.
29 *
30 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
31 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
32 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
33 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
34 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
35 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
36 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
37 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
38 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
39 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
40 * POSSIBILITY OF SUCH DAMAGE.
41 */
42
43 /*
44 * USB Open Host Controller driver.
45 *
46 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html
47 * USB spec: http://www.usb.org/developers/docs/usbspec.zip
48 */
49
50 #include <sys/cdefs.h>
51 __KERNEL_RCSID(0, "$NetBSD: ohci.c,v 1.175 2006/09/03 07:06:39 christos Exp $");
52
53 #include <sys/param.h>
54 #include <sys/systm.h>
55 #include <sys/malloc.h>
56 #if defined(__NetBSD__) || defined(__OpenBSD__)
57 #include <sys/kernel.h>
58 #include <sys/device.h>
59 #include <sys/select.h>
60 #include <uvm/uvm_extern.h>
61 #elif defined(__FreeBSD__)
62 #include <sys/module.h>
63 #include <sys/bus.h>
64 #include <machine/bus_pio.h>
65 #include <machine/bus_memio.h>
66 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__)
67 #include <machine/cpu.h>
68 #endif
69 #endif
70 #include <sys/proc.h>
71 #include <sys/queue.h>
72
73 #include <machine/bus.h>
74 #include <machine/endian.h>
75
76 #include <dev/usb/usb.h>
77 #include <dev/usb/usbdi.h>
78 #include <dev/usb/usbdivar.h>
79 #include <dev/usb/usb_mem.h>
80 #include <dev/usb/usb_quirks.h>
81
82 #include <dev/usb/ohcireg.h>
83 #include <dev/usb/ohcivar.h>
84
85 #if defined(__FreeBSD__)
86 #include <machine/clock.h>
87
88 #define delay(d) DELAY(d)
89 #endif
90
91 #if defined(__OpenBSD__)
92 struct cfdriver ohci_cd = {
93 NULL, "ohci", DV_DULL
94 };
95 #endif
96
97 #ifdef OHCI_DEBUG
98 #define DPRINTF(x) if (ohcidebug) logprintf x
99 #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x
100 int ohcidebug = 0;
101 #ifndef __NetBSD__
102 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f))
103 #endif
104 #else
105 #define DPRINTF(x)
106 #define DPRINTFN(n,x)
107 #endif
108
109 #if BYTE_ORDER == BIG_ENDIAN
110 #define SWAP_ENDIAN OHCI_LITTLE_ENDIAN
111 #else
112 #define SWAP_ENDIAN OHCI_BIG_ENDIAN
113 #endif
114
115 #define O16TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap16(val) : val)
116 #define O32TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap32(val) : val)
117 #define HTOO16(val) O16TOH(val)
118 #define HTOO32(val) O32TOH(val)
119
120 struct ohci_pipe;
121
122 Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *);
123 Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *);
124
125 Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *);
126 Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *);
127
128 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *);
129 Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *);
130
131 #if 0
132 Static void ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *,
133 ohci_soft_td_t *);
134 #endif
135 Static usbd_status ohci_alloc_std_chain(struct ohci_pipe *,
136 ohci_softc_t *, int, int, usbd_xfer_handle,
137 ohci_soft_td_t *, ohci_soft_td_t **);
138
139 Static void ohci_shutdown(void *v);
140 Static void ohci_power(int, void *);
141 Static usbd_status ohci_open(usbd_pipe_handle);
142 Static void ohci_poll(struct usbd_bus *);
143 Static void ohci_softintr(void *);
144 Static void ohci_waitintr(ohci_softc_t *, usbd_xfer_handle);
145 Static void ohci_rhsc(ohci_softc_t *, usbd_xfer_handle);
146
147 Static usbd_status ohci_device_request(usbd_xfer_handle xfer);
148 Static void ohci_add_ed(ohci_softc_t *, ohci_soft_ed_t *,
149 ohci_soft_ed_t *);
150
151 Static void ohci_rem_ed(ohci_soft_ed_t *, ohci_soft_ed_t *);
152 Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *);
153 Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *);
154 Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t);
155 Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *);
156 Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *);
157 Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t);
158
159 Static usbd_status ohci_setup_isoc(usbd_pipe_handle pipe);
160 Static void ohci_device_isoc_enter(usbd_xfer_handle);
161
162 Static usbd_status ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
163 Static void ohci_freem(struct usbd_bus *, usb_dma_t *);
164
165 Static usbd_xfer_handle ohci_allocx(struct usbd_bus *);
166 Static void ohci_freex(struct usbd_bus *, usbd_xfer_handle);
167
168 Static usbd_status ohci_root_ctrl_transfer(usbd_xfer_handle);
169 Static usbd_status ohci_root_ctrl_start(usbd_xfer_handle);
170 Static void ohci_root_ctrl_abort(usbd_xfer_handle);
171 Static void ohci_root_ctrl_close(usbd_pipe_handle);
172 Static void ohci_root_ctrl_done(usbd_xfer_handle);
173
174 Static usbd_status ohci_root_intr_transfer(usbd_xfer_handle);
175 Static usbd_status ohci_root_intr_start(usbd_xfer_handle);
176 Static void ohci_root_intr_abort(usbd_xfer_handle);
177 Static void ohci_root_intr_close(usbd_pipe_handle);
178 Static void ohci_root_intr_done(usbd_xfer_handle);
179
180 Static usbd_status ohci_device_ctrl_transfer(usbd_xfer_handle);
181 Static usbd_status ohci_device_ctrl_start(usbd_xfer_handle);
182 Static void ohci_device_ctrl_abort(usbd_xfer_handle);
183 Static void ohci_device_ctrl_close(usbd_pipe_handle);
184 Static void ohci_device_ctrl_done(usbd_xfer_handle);
185
186 Static usbd_status ohci_device_bulk_transfer(usbd_xfer_handle);
187 Static usbd_status ohci_device_bulk_start(usbd_xfer_handle);
188 Static void ohci_device_bulk_abort(usbd_xfer_handle);
189 Static void ohci_device_bulk_close(usbd_pipe_handle);
190 Static void ohci_device_bulk_done(usbd_xfer_handle);
191
192 Static usbd_status ohci_device_intr_transfer(usbd_xfer_handle);
193 Static usbd_status ohci_device_intr_start(usbd_xfer_handle);
194 Static void ohci_device_intr_abort(usbd_xfer_handle);
195 Static void ohci_device_intr_close(usbd_pipe_handle);
196 Static void ohci_device_intr_done(usbd_xfer_handle);
197
198 Static usbd_status ohci_device_isoc_transfer(usbd_xfer_handle);
199 Static usbd_status ohci_device_isoc_start(usbd_xfer_handle);
200 Static void ohci_device_isoc_abort(usbd_xfer_handle);
201 Static void ohci_device_isoc_close(usbd_pipe_handle);
202 Static void ohci_device_isoc_done(usbd_xfer_handle);
203
204 Static usbd_status ohci_device_setintr(ohci_softc_t *sc,
205 struct ohci_pipe *pipe, int ival);
206
207 Static int ohci_str(usb_string_descriptor_t *, int, const char *);
208
209 Static void ohci_timeout(void *);
210 Static void ohci_timeout_task(void *);
211 Static void ohci_rhsc_enable(void *);
212
213 Static void ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *);
214 Static void ohci_abort_xfer(usbd_xfer_handle, usbd_status);
215
216 Static void ohci_device_clear_toggle(usbd_pipe_handle pipe);
217 Static void ohci_noop(usbd_pipe_handle pipe);
218
219 #ifdef OHCI_DEBUG
220 Static void ohci_dumpregs(ohci_softc_t *);
221 Static void ohci_dump_tds(ohci_softc_t *, ohci_soft_td_t *);
222 Static void ohci_dump_td(ohci_softc_t *, ohci_soft_td_t *);
223 Static void ohci_dump_ed(ohci_softc_t *, ohci_soft_ed_t *);
224 Static void ohci_dump_itd(ohci_softc_t *, ohci_soft_itd_t *);
225 Static void ohci_dump_itds(ohci_softc_t *, ohci_soft_itd_t *);
226 #endif
227
228 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \
229 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
230 #define OWRITE1(sc, r, x) \
231 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
232 #define OWRITE2(sc, r, x) \
233 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
234 #define OWRITE4(sc, r, x) \
235 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
236 static __inline uint8_t
237 OREAD1(ohci_softc_t *sc, bus_size_t r)
238 {
239
240 OBARR(sc);
241 return bus_space_read_1(sc->iot, sc->ioh, r);
242 }
243
244 static __inline uint16_t
245 OREAD2(ohci_softc_t *sc, bus_size_t r)
246 {
247
248 OBARR(sc);
249 return bus_space_read_2(sc->iot, sc->ioh, r);
250 }
251
252 static __inline uint32_t
253 OREAD4(ohci_softc_t *sc, bus_size_t r)
254 {
255
256 OBARR(sc);
257 return bus_space_read_4(sc->iot, sc->ioh, r);
258 }
259
260 /* Reverse the bits in a value 0 .. 31 */
261 Static u_int8_t revbits[OHCI_NO_INTRS] =
262 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c,
263 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e,
264 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d,
265 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f };
266
267 struct ohci_pipe {
268 struct usbd_pipe pipe;
269 ohci_soft_ed_t *sed;
270 union {
271 ohci_soft_td_t *td;
272 ohci_soft_itd_t *itd;
273 } tail;
274 /* Info needed for different pipe kinds. */
275 union {
276 /* Control pipe */
277 struct {
278 usb_dma_t reqdma;
279 u_int length;
280 ohci_soft_td_t *setup, *data, *stat;
281 } ctl;
282 /* Interrupt pipe */
283 struct {
284 int nslots;
285 int pos;
286 } intr;
287 /* Bulk pipe */
288 struct {
289 u_int length;
290 int isread;
291 } bulk;
292 /* Iso pipe */
293 struct iso {
294 int next, inuse;
295 } iso;
296 } u;
297 };
298
299 #define OHCI_INTR_ENDPT 1
300
301 Static struct usbd_bus_methods ohci_bus_methods = {
302 ohci_open,
303 ohci_softintr,
304 ohci_poll,
305 ohci_allocm,
306 ohci_freem,
307 ohci_allocx,
308 ohci_freex,
309 };
310
311 Static struct usbd_pipe_methods ohci_root_ctrl_methods = {
312 ohci_root_ctrl_transfer,
313 ohci_root_ctrl_start,
314 ohci_root_ctrl_abort,
315 ohci_root_ctrl_close,
316 ohci_noop,
317 ohci_root_ctrl_done,
318 };
319
320 Static struct usbd_pipe_methods ohci_root_intr_methods = {
321 ohci_root_intr_transfer,
322 ohci_root_intr_start,
323 ohci_root_intr_abort,
324 ohci_root_intr_close,
325 ohci_noop,
326 ohci_root_intr_done,
327 };
328
329 Static struct usbd_pipe_methods ohci_device_ctrl_methods = {
330 ohci_device_ctrl_transfer,
331 ohci_device_ctrl_start,
332 ohci_device_ctrl_abort,
333 ohci_device_ctrl_close,
334 ohci_noop,
335 ohci_device_ctrl_done,
336 };
337
338 Static struct usbd_pipe_methods ohci_device_intr_methods = {
339 ohci_device_intr_transfer,
340 ohci_device_intr_start,
341 ohci_device_intr_abort,
342 ohci_device_intr_close,
343 ohci_device_clear_toggle,
344 ohci_device_intr_done,
345 };
346
347 Static struct usbd_pipe_methods ohci_device_bulk_methods = {
348 ohci_device_bulk_transfer,
349 ohci_device_bulk_start,
350 ohci_device_bulk_abort,
351 ohci_device_bulk_close,
352 ohci_device_clear_toggle,
353 ohci_device_bulk_done,
354 };
355
356 Static struct usbd_pipe_methods ohci_device_isoc_methods = {
357 ohci_device_isoc_transfer,
358 ohci_device_isoc_start,
359 ohci_device_isoc_abort,
360 ohci_device_isoc_close,
361 ohci_noop,
362 ohci_device_isoc_done,
363 };
364
365 #if defined(__NetBSD__) || defined(__OpenBSD__)
366 int
367 ohci_activate(device_ptr_t self, enum devact act)
368 {
369 struct ohci_softc *sc = (struct ohci_softc *)self;
370 int rv = 0;
371
372 switch (act) {
373 case DVACT_ACTIVATE:
374 return (EOPNOTSUPP);
375
376 case DVACT_DEACTIVATE:
377 if (sc->sc_child != NULL)
378 rv = config_deactivate(sc->sc_child);
379 sc->sc_dying = 1;
380 break;
381 }
382 return (rv);
383 }
384
385 int
386 ohci_detach(struct ohci_softc *sc, int flags)
387 {
388 int rv = 0;
389
390 if (sc->sc_child != NULL)
391 rv = config_detach(sc->sc_child, flags);
392
393 if (rv != 0)
394 return (rv);
395
396 usb_uncallout(sc->sc_tmo_rhsc, ohci_rhsc_enable, sc);
397
398 #if defined(__NetBSD__) || defined(__OpenBSD__)
399 powerhook_disestablish(sc->sc_powerhook);
400 shutdownhook_disestablish(sc->sc_shutdownhook);
401 #endif
402
403 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */
404
405 /* free data structures XXX */
406
407 return (rv);
408 }
409 #endif
410
411 ohci_soft_ed_t *
412 ohci_alloc_sed(ohci_softc_t *sc)
413 {
414 ohci_soft_ed_t *sed;
415 usbd_status err;
416 int i, offs;
417 usb_dma_t dma;
418
419 if (sc->sc_freeeds == NULL) {
420 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n"));
421 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK,
422 OHCI_ED_ALIGN, &dma);
423 if (err)
424 return (0);
425 for(i = 0; i < OHCI_SED_CHUNK; i++) {
426 offs = i * OHCI_SED_SIZE;
427 sed = KERNADDR(&dma, offs);
428 sed->physaddr = DMAADDR(&dma, offs);
429 sed->next = sc->sc_freeeds;
430 sc->sc_freeeds = sed;
431 }
432 }
433 sed = sc->sc_freeeds;
434 sc->sc_freeeds = sed->next;
435 memset(&sed->ed, 0, sizeof(ohci_ed_t));
436 sed->next = 0;
437 return (sed);
438 }
439
440 void
441 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed)
442 {
443 sed->next = sc->sc_freeeds;
444 sc->sc_freeeds = sed;
445 }
446
447 ohci_soft_td_t *
448 ohci_alloc_std(ohci_softc_t *sc)
449 {
450 ohci_soft_td_t *std;
451 usbd_status err;
452 int i, offs;
453 usb_dma_t dma;
454 int s;
455
456 if (sc->sc_freetds == NULL) {
457 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n"));
458 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK,
459 OHCI_TD_ALIGN, &dma);
460 if (err)
461 return (NULL);
462 s = splusb();
463 for(i = 0; i < OHCI_STD_CHUNK; i++) {
464 offs = i * OHCI_STD_SIZE;
465 std = KERNADDR(&dma, offs);
466 std->physaddr = DMAADDR(&dma, offs);
467 std->nexttd = sc->sc_freetds;
468 sc->sc_freetds = std;
469 }
470 splx(s);
471 }
472
473 s = splusb();
474 std = sc->sc_freetds;
475 sc->sc_freetds = std->nexttd;
476 memset(&std->td, 0, sizeof(ohci_td_t));
477 std->nexttd = NULL;
478 std->xfer = NULL;
479 ohci_hash_add_td(sc, std);
480 splx(s);
481
482 return (std);
483 }
484
485 void
486 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std)
487 {
488 int s;
489
490 s = splusb();
491 ohci_hash_rem_td(sc, std);
492 std->nexttd = sc->sc_freetds;
493 sc->sc_freetds = std;
494 splx(s);
495 }
496
497 usbd_status
498 ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc,
499 int alen, int rd, usbd_xfer_handle xfer,
500 ohci_soft_td_t *sp, ohci_soft_td_t **ep)
501 {
502 ohci_soft_td_t *next, *cur;
503 ohci_physaddr_t dataphys, dataphysend;
504 u_int32_t tdflags;
505 int len, curlen;
506 usb_dma_t *dma = &xfer->dmabuf;
507 u_int16_t flags = xfer->flags;
508
509 DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen));
510
511 len = alen;
512 cur = sp;
513 dataphys = DMAADDR(dma, 0);
514 dataphysend = OHCI_PAGE(dataphys + len - 1);
515 tdflags = HTOO32(
516 (rd ? OHCI_TD_IN : OHCI_TD_OUT) |
517 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) |
518 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR);
519
520 for (;;) {
521 next = ohci_alloc_std(sc);
522 if (next == NULL)
523 goto nomem;
524
525 /* The OHCI hardware can handle at most one page crossing. */
526 if (OHCI_PAGE(dataphys) == dataphysend ||
527 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) {
528 /* we can handle it in this TD */
529 curlen = len;
530 } else {
531 /* must use multiple TDs, fill as much as possible. */
532 curlen = 2 * OHCI_PAGE_SIZE -
533 (dataphys & (OHCI_PAGE_SIZE-1));
534 /* the length must be a multiple of the max size */
535 curlen -= curlen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize);
536 #ifdef DIAGNOSTIC
537 if (curlen == 0)
538 panic("ohci_alloc_std: curlen == 0");
539 #endif
540 }
541 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x "
542 "dataphysend=0x%08x len=%d curlen=%d\n",
543 dataphys, dataphysend,
544 len, curlen));
545 len -= curlen;
546
547 cur->td.td_flags = tdflags;
548 cur->td.td_cbp = HTOO32(dataphys);
549 cur->nexttd = next;
550 cur->td.td_nexttd = HTOO32(next->physaddr);
551 cur->td.td_be = HTOO32(dataphys + curlen - 1);
552 cur->len = curlen;
553 cur->flags = OHCI_ADD_LEN;
554 cur->xfer = xfer;
555 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n",
556 dataphys, dataphys + curlen - 1));
557 if (len == 0)
558 break;
559 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n"));
560 dataphys += curlen;
561 cur = next;
562 }
563 if (!rd && (flags & USBD_FORCE_SHORT_XFER) &&
564 alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) {
565 /* Force a 0 length transfer at the end. */
566
567 cur = next;
568 next = ohci_alloc_std(sc);
569 if (next == NULL)
570 goto nomem;
571
572 cur->td.td_flags = tdflags;
573 cur->td.td_cbp = 0; /* indicate 0 length packet */
574 cur->nexttd = next;
575 cur->td.td_nexttd = HTOO32(next->physaddr);
576 cur->td.td_be = ~0;
577 cur->len = 0;
578 cur->flags = 0;
579 cur->xfer = xfer;
580 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n"));
581 }
582 *ep = cur;
583
584 return (USBD_NORMAL_COMPLETION);
585
586 nomem:
587 /* XXX free chain */
588 return (USBD_NOMEM);
589 }
590
591 #if 0
592 Static void
593 ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std,
594 ohci_soft_td_t *stdend)
595 {
596 ohci_soft_td_t *p;
597
598 for (; std != stdend; std = p) {
599 p = std->nexttd;
600 ohci_free_std(sc, std);
601 }
602 }
603 #endif
604
605 ohci_soft_itd_t *
606 ohci_alloc_sitd(ohci_softc_t *sc)
607 {
608 ohci_soft_itd_t *sitd;
609 usbd_status err;
610 int i, s, offs;
611 usb_dma_t dma;
612
613 if (sc->sc_freeitds == NULL) {
614 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n"));
615 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK,
616 OHCI_ITD_ALIGN, &dma);
617 if (err)
618 return (NULL);
619 s = splusb();
620 for(i = 0; i < OHCI_SITD_CHUNK; i++) {
621 offs = i * OHCI_SITD_SIZE;
622 sitd = KERNADDR(&dma, offs);
623 sitd->physaddr = DMAADDR(&dma, offs);
624 sitd->nextitd = sc->sc_freeitds;
625 sc->sc_freeitds = sitd;
626 }
627 splx(s);
628 }
629
630 s = splusb();
631 sitd = sc->sc_freeitds;
632 sc->sc_freeitds = sitd->nextitd;
633 memset(&sitd->itd, 0, sizeof(ohci_itd_t));
634 sitd->nextitd = NULL;
635 sitd->xfer = NULL;
636 ohci_hash_add_itd(sc, sitd);
637 splx(s);
638
639 #ifdef DIAGNOSTIC
640 sitd->isdone = 0;
641 #endif
642
643 return (sitd);
644 }
645
646 void
647 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
648 {
649 int s;
650
651 DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd));
652
653 #ifdef DIAGNOSTIC
654 if (!sitd->isdone) {
655 panic("ohci_free_sitd: sitd=%p not done", sitd);
656 return;
657 }
658 /* Warn double free */
659 sitd->isdone = 0;
660 #endif
661
662 s = splusb();
663 ohci_hash_rem_itd(sc, sitd);
664 sitd->nextitd = sc->sc_freeitds;
665 sc->sc_freeitds = sitd;
666 splx(s);
667 }
668
669 usbd_status
670 ohci_init(ohci_softc_t *sc)
671 {
672 ohci_soft_ed_t *sed, *psed;
673 usbd_status err;
674 int i;
675 u_int32_t s, ctl, rwc, ival, hcr, fm, per, rev, desca, descb;
676
677 DPRINTF(("ohci_init: start\n"));
678 #if defined(__OpenBSD__)
679 printf(",");
680 #else
681 printf("%s:", USBDEVNAME(sc->sc_bus.bdev));
682 #endif
683 rev = OREAD4(sc, OHCI_REVISION);
684 printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev),
685 OHCI_REV_LEGACY(rev) ? ", legacy support" : "");
686
687 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) {
688 printf("%s: unsupported OHCI revision\n",
689 USBDEVNAME(sc->sc_bus.bdev));
690 sc->sc_bus.usbrev = USBREV_UNKNOWN;
691 return (USBD_INVAL);
692 }
693 sc->sc_bus.usbrev = USBREV_1_0;
694
695 for (i = 0; i < OHCI_HASH_SIZE; i++)
696 LIST_INIT(&sc->sc_hash_tds[i]);
697 for (i = 0; i < OHCI_HASH_SIZE; i++)
698 LIST_INIT(&sc->sc_hash_itds[i]);
699
700 SIMPLEQ_INIT(&sc->sc_free_xfers);
701
702 #ifdef __NetBSD__
703 usb_setup_reserve(sc, &sc->sc_dma_reserve, sc->sc_bus.dmatag,
704 USB_MEM_RESERVE);
705 #endif
706
707 /* XXX determine alignment by R/W */
708 /* Allocate the HCCA area. */
709 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE,
710 OHCI_HCCA_ALIGN, &sc->sc_hccadma);
711 if (err)
712 return (err);
713 sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0);
714 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE);
715
716 sc->sc_eintrs = OHCI_NORMAL_INTRS;
717
718 /* Allocate dummy ED that starts the control list. */
719 sc->sc_ctrl_head = ohci_alloc_sed(sc);
720 if (sc->sc_ctrl_head == NULL) {
721 err = USBD_NOMEM;
722 goto bad1;
723 }
724 sc->sc_ctrl_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
725
726 /* Allocate dummy ED that starts the bulk list. */
727 sc->sc_bulk_head = ohci_alloc_sed(sc);
728 if (sc->sc_bulk_head == NULL) {
729 err = USBD_NOMEM;
730 goto bad2;
731 }
732 sc->sc_bulk_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
733
734 /* Allocate dummy ED that starts the isochronous list. */
735 sc->sc_isoc_head = ohci_alloc_sed(sc);
736 if (sc->sc_isoc_head == NULL) {
737 err = USBD_NOMEM;
738 goto bad3;
739 }
740 sc->sc_isoc_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
741
742 /* Allocate all the dummy EDs that make up the interrupt tree. */
743 for (i = 0; i < OHCI_NO_EDS; i++) {
744 sed = ohci_alloc_sed(sc);
745 if (sed == NULL) {
746 while (--i >= 0)
747 ohci_free_sed(sc, sc->sc_eds[i]);
748 err = USBD_NOMEM;
749 goto bad4;
750 }
751 /* All ED fields are set to 0. */
752 sc->sc_eds[i] = sed;
753 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
754 if (i != 0)
755 psed = sc->sc_eds[(i-1) / 2];
756 else
757 psed= sc->sc_isoc_head;
758 sed->next = psed;
759 sed->ed.ed_nexted = HTOO32(psed->physaddr);
760 }
761 /*
762 * Fill HCCA interrupt table. The bit reversal is to get
763 * the tree set up properly to spread the interrupts.
764 */
765 for (i = 0; i < OHCI_NO_INTRS; i++)
766 sc->sc_hcca->hcca_interrupt_table[revbits[i]] =
767 HTOO32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr);
768
769 #ifdef OHCI_DEBUG
770 if (ohcidebug > 15) {
771 for (i = 0; i < OHCI_NO_EDS; i++) {
772 printf("ed#%d ", i);
773 ohci_dump_ed(sc, sc->sc_eds[i]);
774 }
775 printf("iso ");
776 ohci_dump_ed(sc, sc->sc_isoc_head);
777 }
778 #endif
779
780 /* Preserve values programmed by SMM/BIOS but lost over reset. */
781 ctl = OREAD4(sc, OHCI_CONTROL);
782 rwc = ctl & OHCI_RWC;
783 fm = OREAD4(sc, OHCI_FM_INTERVAL);
784 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
785 descb = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
786
787 /* Determine in what context we are running. */
788 if (ctl & OHCI_IR) {
789 /* SMM active, request change */
790 DPRINTF(("ohci_init: SMM active, request owner change\n"));
791 if ((sc->sc_intre & (OHCI_OC | OHCI_MIE)) ==
792 (OHCI_OC | OHCI_MIE))
793 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_MIE);
794 s = OREAD4(sc, OHCI_COMMAND_STATUS);
795 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR);
796 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) {
797 usb_delay_ms(&sc->sc_bus, 1);
798 ctl = OREAD4(sc, OHCI_CONTROL);
799 }
800 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_MIE);
801 if ((ctl & OHCI_IR) == 0) {
802 printf("%s: SMM does not respond, resetting\n",
803 USBDEVNAME(sc->sc_bus.bdev));
804 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc);
805 goto reset;
806 }
807 #if 0
808 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */
809 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) {
810 /* BIOS started controller. */
811 DPRINTF(("ohci_init: BIOS active\n"));
812 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) {
813 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL | rwc);
814 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
815 }
816 #endif
817 } else {
818 DPRINTF(("ohci_init: cold started\n"));
819 reset:
820 /* Controller was cold started. */
821 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
822 }
823
824 /*
825 * This reset should not be necessary according to the OHCI spec, but
826 * without it some controllers do not start.
827 */
828 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev)));
829 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc);
830 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
831
832 /* We now own the host controller and the bus has been reset. */
833
834 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */
835 /* Nominal time for a reset is 10 us. */
836 for (i = 0; i < 10; i++) {
837 delay(10);
838 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR;
839 if (!hcr)
840 break;
841 }
842 if (hcr) {
843 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev));
844 err = USBD_IOERROR;
845 goto bad5;
846 }
847 #ifdef OHCI_DEBUG
848 if (ohcidebug > 15)
849 ohci_dumpregs(sc);
850 #endif
851
852 /* The controller is now in SUSPEND state, we have 2ms to finish. */
853
854 /* Set up HC registers. */
855 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0));
856 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
857 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
858 /* disable all interrupts and then switch on all desired interrupts */
859 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
860 /* switch on desired functional features */
861 ctl = OREAD4(sc, OHCI_CONTROL);
862 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR);
863 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE |
864 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL | rwc;
865 /* And finally start it! */
866 OWRITE4(sc, OHCI_CONTROL, ctl);
867
868 /*
869 * The controller is now OPERATIONAL. Set a some final
870 * registers that should be set earlier, but that the
871 * controller ignores when in the SUSPEND state.
872 */
873 ival = OHCI_GET_IVAL(fm);
874 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT;
875 fm |= OHCI_FSMPS(ival) | ival;
876 OWRITE4(sc, OHCI_FM_INTERVAL, fm);
877 per = OHCI_PERIODIC(ival); /* 90% periodic */
878 OWRITE4(sc, OHCI_PERIODIC_START, per);
879
880 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */
881 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP);
882 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */
883 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY);
884 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca);
885
886 /*
887 * The AMD756 requires a delay before re-reading the register,
888 * otherwise it will occasionally report 0 ports.
889 */
890 sc->sc_noport = 0;
891 for (i = 0; i < 10 && sc->sc_noport == 0; i++) {
892 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY);
893 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A));
894 }
895
896 #ifdef OHCI_DEBUG
897 if (ohcidebug > 5)
898 ohci_dumpregs(sc);
899 #endif
900
901 /* Set up the bus struct. */
902 sc->sc_bus.methods = &ohci_bus_methods;
903 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe);
904
905 #if defined(__NetBSD__) || defined(__OpenBSD__)
906 sc->sc_control = sc->sc_intre = 0;
907 sc->sc_powerhook = powerhook_establish(ohci_power, sc);
908 sc->sc_shutdownhook = shutdownhook_establish(ohci_shutdown, sc);
909 #endif
910
911 usb_callout_init(sc->sc_tmo_rhsc);
912
913 /* Finally, turn on interrupts. */
914 DPRINTFN(1,("ohci_init: enabling\n"));
915 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE);
916
917 return (USBD_NORMAL_COMPLETION);
918
919 bad5:
920 for (i = 0; i < OHCI_NO_EDS; i++)
921 ohci_free_sed(sc, sc->sc_eds[i]);
922 bad4:
923 ohci_free_sed(sc, sc->sc_isoc_head);
924 bad3:
925 ohci_free_sed(sc, sc->sc_bulk_head);
926 bad2:
927 ohci_free_sed(sc, sc->sc_ctrl_head);
928 bad1:
929 usb_freemem(&sc->sc_bus, &sc->sc_hccadma);
930 return (err);
931 }
932
933 usbd_status
934 ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
935 {
936 #if defined(__NetBSD__) || defined(__OpenBSD__)
937 struct ohci_softc *sc = (struct ohci_softc *)bus;
938 #endif
939 usbd_status status;
940
941 status = usb_allocmem(&sc->sc_bus, size, 0, dma);
942 #ifdef __NetBSD__
943 if (status == USBD_NOMEM)
944 status = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size);
945 #endif
946 return status;
947 }
948
949 void
950 ohci_freem(struct usbd_bus *bus, usb_dma_t *dma)
951 {
952 #if defined(__NetBSD__) || defined(__OpenBSD__)
953 struct ohci_softc *sc = (struct ohci_softc *)bus;
954 #endif
955 #ifdef __NetBSD__
956 if (dma->block->flags & USB_DMA_RESERVE) {
957 usb_reserve_freem(&((struct ohci_softc *)bus)->sc_dma_reserve,
958 dma);
959 return;
960 }
961 #endif
962 usb_freemem(&sc->sc_bus, dma);
963 }
964
965 usbd_xfer_handle
966 ohci_allocx(struct usbd_bus *bus)
967 {
968 struct ohci_softc *sc = (struct ohci_softc *)bus;
969 usbd_xfer_handle xfer;
970
971 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
972 if (xfer != NULL) {
973 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
974 #ifdef DIAGNOSTIC
975 if (xfer->busy_free != XFER_FREE) {
976 printf("ohci_allocx: xfer=%p not free, 0x%08x\n", xfer,
977 xfer->busy_free);
978 }
979 #endif
980 } else {
981 xfer = malloc(sizeof(struct ohci_xfer), M_USB, M_NOWAIT);
982 }
983 if (xfer != NULL) {
984 memset(xfer, 0, sizeof (struct ohci_xfer));
985 #ifdef DIAGNOSTIC
986 xfer->busy_free = XFER_BUSY;
987 #endif
988 }
989 return (xfer);
990 }
991
992 void
993 ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
994 {
995 struct ohci_softc *sc = (struct ohci_softc *)bus;
996
997 #ifdef DIAGNOSTIC
998 if (xfer->busy_free != XFER_BUSY) {
999 printf("ohci_freex: xfer=%p not busy, 0x%08x\n", xfer,
1000 xfer->busy_free);
1001 return;
1002 }
1003 xfer->busy_free = XFER_FREE;
1004 #endif
1005 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
1006 }
1007
1008 /*
1009 * Shut down the controller when the system is going down.
1010 */
1011 void
1012 ohci_shutdown(void *v)
1013 {
1014 ohci_softc_t *sc = v;
1015
1016 DPRINTF(("ohci_shutdown: stopping the HC\n"));
1017 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
1018 }
1019
1020 /*
1021 * Handle suspend/resume.
1022 *
1023 * We need to switch to polling mode here, because this routine is
1024 * called from an interupt context. This is all right since we
1025 * are almost suspended anyway.
1026 */
1027 void
1028 ohci_power(int why, void *v)
1029 {
1030 ohci_softc_t *sc = v;
1031 u_int32_t ctl;
1032 int s;
1033
1034 #ifdef OHCI_DEBUG
1035 DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why));
1036 ohci_dumpregs(sc);
1037 #endif
1038
1039 s = splhardusb();
1040 switch (why) {
1041 case PWR_SUSPEND:
1042 case PWR_STANDBY:
1043 sc->sc_bus.use_polling++;
1044 ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK;
1045 if (sc->sc_control == 0) {
1046 /*
1047 * Preserve register values, in case that APM BIOS
1048 * does not recover them.
1049 */
1050 sc->sc_control = ctl;
1051 sc->sc_intre = OREAD4(sc, OHCI_INTERRUPT_ENABLE);
1052 }
1053 ctl |= OHCI_HCFS_SUSPEND;
1054 OWRITE4(sc, OHCI_CONTROL, ctl);
1055 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
1056 sc->sc_bus.use_polling--;
1057 break;
1058 case PWR_RESUME:
1059 sc->sc_bus.use_polling++;
1060 /* Some broken BIOSes do not recover these values */
1061 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0));
1062 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
1063 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
1064 if (sc->sc_intre)
1065 OWRITE4(sc, OHCI_INTERRUPT_ENABLE,
1066 sc->sc_intre & (OHCI_ALL_INTRS | OHCI_MIE));
1067 if (sc->sc_control)
1068 ctl = sc->sc_control;
1069 else
1070 ctl = OREAD4(sc, OHCI_CONTROL);
1071 ctl |= OHCI_HCFS_RESUME;
1072 OWRITE4(sc, OHCI_CONTROL, ctl);
1073 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
1074 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL;
1075 OWRITE4(sc, OHCI_CONTROL, ctl);
1076 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
1077 sc->sc_control = sc->sc_intre = 0;
1078 sc->sc_bus.use_polling--;
1079 break;
1080 case PWR_SOFTSUSPEND:
1081 case PWR_SOFTSTANDBY:
1082 case PWR_SOFTRESUME:
1083 break;
1084 }
1085 splx(s);
1086 }
1087
1088 #ifdef OHCI_DEBUG
1089 void
1090 ohci_dumpregs(ohci_softc_t *sc)
1091 {
1092 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n",
1093 OREAD4(sc, OHCI_REVISION),
1094 OREAD4(sc, OHCI_CONTROL),
1095 OREAD4(sc, OHCI_COMMAND_STATUS)));
1096 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n",
1097 OREAD4(sc, OHCI_INTERRUPT_STATUS),
1098 OREAD4(sc, OHCI_INTERRUPT_ENABLE),
1099 OREAD4(sc, OHCI_INTERRUPT_DISABLE)));
1100 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n",
1101 OREAD4(sc, OHCI_HCCA),
1102 OREAD4(sc, OHCI_PERIOD_CURRENT_ED),
1103 OREAD4(sc, OHCI_CONTROL_HEAD_ED)));
1104 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n",
1105 OREAD4(sc, OHCI_CONTROL_CURRENT_ED),
1106 OREAD4(sc, OHCI_BULK_HEAD_ED),
1107 OREAD4(sc, OHCI_BULK_CURRENT_ED)));
1108 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n",
1109 OREAD4(sc, OHCI_DONE_HEAD),
1110 OREAD4(sc, OHCI_FM_INTERVAL),
1111 OREAD4(sc, OHCI_FM_REMAINING)));
1112 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n",
1113 OREAD4(sc, OHCI_FM_NUMBER),
1114 OREAD4(sc, OHCI_PERIODIC_START),
1115 OREAD4(sc, OHCI_LS_THRESHOLD)));
1116 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n",
1117 OREAD4(sc, OHCI_RH_DESCRIPTOR_A),
1118 OREAD4(sc, OHCI_RH_DESCRIPTOR_B),
1119 OREAD4(sc, OHCI_RH_STATUS)));
1120 DPRINTF((" port1=0x%08x port2=0x%08x\n",
1121 OREAD4(sc, OHCI_RH_PORT_STATUS(1)),
1122 OREAD4(sc, OHCI_RH_PORT_STATUS(2))));
1123 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n",
1124 O32TOH(sc->sc_hcca->hcca_frame_number),
1125 O32TOH(sc->sc_hcca->hcca_done_head)));
1126 }
1127 #endif
1128
1129 Static int ohci_intr1(ohci_softc_t *);
1130
1131 int
1132 ohci_intr(void *p)
1133 {
1134 ohci_softc_t *sc = p;
1135
1136 if (sc == NULL || sc->sc_dying)
1137 return (0);
1138
1139 /* If we get an interrupt while polling, then just ignore it. */
1140 if (sc->sc_bus.use_polling) {
1141 #ifdef DIAGNOSTIC
1142 DPRINTFN(16, ("ohci_intr: ignored interrupt while polling\n"));
1143 #endif
1144 /* for level triggered intrs, should do something to ack */
1145 OWRITE4(sc, OHCI_INTERRUPT_STATUS,
1146 OREAD4(sc, OHCI_INTERRUPT_STATUS));
1147
1148 return (0);
1149 }
1150
1151 return (ohci_intr1(sc));
1152 }
1153
1154 Static int
1155 ohci_intr1(ohci_softc_t *sc)
1156 {
1157 u_int32_t intrs, eintrs;
1158
1159 DPRINTFN(14,("ohci_intr1: enter\n"));
1160
1161 /* In case the interrupt occurs before initialization has completed. */
1162 if (sc == NULL || sc->sc_hcca == NULL) {
1163 #ifdef DIAGNOSTIC
1164 printf("ohci_intr: sc->sc_hcca == NULL\n");
1165 #endif
1166 return (0);
1167 }
1168
1169 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS);
1170 if (!intrs)
1171 return (0);
1172
1173 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs & ~(OHCI_MIE|OHCI_WDH)); /* Acknowledge */
1174 eintrs = intrs & sc->sc_eintrs;
1175 if (!eintrs)
1176 return (0);
1177
1178 sc->sc_bus.intr_context++;
1179 sc->sc_bus.no_intrs++;
1180 DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n",
1181 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS),
1182 (u_int)eintrs));
1183
1184 if (eintrs & OHCI_SO) {
1185 sc->sc_overrun_cnt++;
1186 if (usbd_ratecheck(&sc->sc_overrun_ntc)) {
1187 printf("%s: %u scheduling overruns\n",
1188 USBDEVNAME(sc->sc_bus.bdev), sc->sc_overrun_cnt);
1189 sc->sc_overrun_cnt = 0;
1190 }
1191 /* XXX do what */
1192 eintrs &= ~OHCI_SO;
1193 }
1194 if (eintrs & OHCI_WDH) {
1195 /*
1196 * We block the interrupt below, and reenable it later from
1197 * ohci_softintr().
1198 */
1199 usb_schedsoftintr(&sc->sc_bus);
1200 }
1201 if (eintrs & OHCI_RD) {
1202 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev));
1203 /* XXX process resume detect */
1204 }
1205 if (eintrs & OHCI_UE) {
1206 printf("%s: unrecoverable error, controller halted\n",
1207 USBDEVNAME(sc->sc_bus.bdev));
1208 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
1209 /* XXX what else */
1210 }
1211 if (eintrs & OHCI_RHSC) {
1212 /*
1213 * We block the interrupt below, and reenable it later from
1214 * a timeout.
1215 */
1216 ohci_rhsc(sc, sc->sc_intrxfer);
1217 /* Do not allow RHSC interrupts > 1 per second */
1218 usb_callout(sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc);
1219 }
1220
1221 sc->sc_bus.intr_context--;
1222
1223 if (eintrs != 0) {
1224 /* Block unprocessed interrupts. */
1225 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs);
1226 sc->sc_eintrs &= ~eintrs;
1227 DPRINTFN(1, ("%s: blocking intrs 0x%x\n",
1228 USBDEVNAME(sc->sc_bus.bdev), eintrs));
1229 }
1230
1231 return (1);
1232 }
1233
1234 void
1235 ohci_rhsc_enable(void *v_sc)
1236 {
1237 ohci_softc_t *sc = v_sc;
1238 int s;
1239
1240 s = splhardusb();
1241 sc->sc_eintrs |= OHCI_RHSC;
1242 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC);
1243 splx(s);
1244 }
1245
1246 #ifdef OHCI_DEBUG
1247 const char *ohci_cc_strs[] = {
1248 "NO_ERROR",
1249 "CRC",
1250 "BIT_STUFFING",
1251 "DATA_TOGGLE_MISMATCH",
1252 "STALL",
1253 "DEVICE_NOT_RESPONDING",
1254 "PID_CHECK_FAILURE",
1255 "UNEXPECTED_PID",
1256 "DATA_OVERRUN",
1257 "DATA_UNDERRUN",
1258 "BUFFER_OVERRUN",
1259 "BUFFER_UNDERRUN",
1260 "reserved",
1261 "reserved",
1262 "NOT_ACCESSED",
1263 "NOT_ACCESSED",
1264 };
1265 #endif
1266
1267 void
1268 ohci_softintr(void *v)
1269 {
1270 ohci_softc_t *sc = v;
1271 ohci_soft_itd_t *sitd, *sidone, *sitdnext;
1272 ohci_soft_td_t *std, *sdone, *stdnext;
1273 usbd_xfer_handle xfer;
1274 struct ohci_pipe *opipe;
1275 int len, cc, s;
1276 int i, j, actlen, iframes, uedir;
1277 ohci_physaddr_t done;
1278
1279 DPRINTFN(10,("ohci_softintr: enter\n"));
1280
1281 sc->sc_bus.intr_context++;
1282
1283 s = splhardusb();
1284 done = O32TOH(sc->sc_hcca->hcca_done_head) & ~OHCI_DONE_INTRS;
1285 sc->sc_hcca->hcca_done_head = 0;
1286 OWRITE4(sc, OHCI_INTERRUPT_STATUS, OHCI_WDH);
1287 sc->sc_eintrs |= OHCI_WDH;
1288 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_WDH);
1289 splx(s);
1290
1291 /* Reverse the done list. */
1292 for (sdone = NULL, sidone = NULL; done != 0; ) {
1293 std = ohci_hash_find_td(sc, done);
1294 if (std != NULL) {
1295 std->dnext = sdone;
1296 done = O32TOH(std->td.td_nexttd);
1297 sdone = std;
1298 DPRINTFN(10,("add TD %p\n", std));
1299 continue;
1300 }
1301 sitd = ohci_hash_find_itd(sc, done);
1302 if (sitd != NULL) {
1303 sitd->dnext = sidone;
1304 done = O32TOH(sitd->itd.itd_nextitd);
1305 sidone = sitd;
1306 DPRINTFN(5,("add ITD %p\n", sitd));
1307 continue;
1308 }
1309 panic("ohci_softintr: addr 0x%08lx not found", (u_long)done);
1310 }
1311
1312 DPRINTFN(10,("ohci_softintr: sdone=%p sidone=%p\n", sdone, sidone));
1313
1314 #ifdef OHCI_DEBUG
1315 if (ohcidebug > 10) {
1316 DPRINTF(("ohci_process_done: TD done:\n"));
1317 ohci_dump_tds(sc, sdone);
1318 }
1319 #endif
1320
1321 for (std = sdone; std; std = stdnext) {
1322 xfer = std->xfer;
1323 stdnext = std->dnext;
1324 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n",
1325 std, xfer, xfer ? xfer->hcpriv : 0));
1326 if (xfer == NULL) {
1327 /*
1328 * xfer == NULL: There seems to be no xfer associated
1329 * with this TD. It is tailp that happened to end up on
1330 * the done queue.
1331 * Shouldn't happen, but some chips are broken(?).
1332 */
1333 continue;
1334 }
1335 if (xfer->status == USBD_CANCELLED ||
1336 xfer->status == USBD_TIMEOUT) {
1337 DPRINTF(("ohci_process_done: cancel/timeout %p\n",
1338 xfer));
1339 /* Handled by abort routine. */
1340 continue;
1341 }
1342 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer);
1343
1344 len = std->len;
1345 if (std->td.td_cbp != 0)
1346 len -= O32TOH(std->td.td_be) -
1347 O32TOH(std->td.td_cbp) + 1;
1348 DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", len,
1349 std->flags));
1350 if (std->flags & OHCI_ADD_LEN)
1351 xfer->actlen += len;
1352
1353 cc = OHCI_TD_GET_CC(O32TOH(std->td.td_flags));
1354 if (cc == OHCI_CC_NO_ERROR) {
1355 if (std->flags & OHCI_CALL_DONE) {
1356 xfer->status = USBD_NORMAL_COMPLETION;
1357 s = splusb();
1358 usb_transfer_complete(xfer);
1359 splx(s);
1360 }
1361 ohci_free_std(sc, std);
1362 } else {
1363 /*
1364 * Endpoint is halted. First unlink all the TDs
1365 * belonging to the failed transfer, and then restart
1366 * the endpoint.
1367 */
1368 ohci_soft_td_t *p, *n;
1369 opipe = (struct ohci_pipe *)xfer->pipe;
1370
1371 DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n",
1372 OHCI_TD_GET_CC(O32TOH(std->td.td_flags)),
1373 ohci_cc_strs[OHCI_TD_GET_CC(O32TOH(std->td.td_flags))]));
1374
1375 /* remove TDs */
1376 for (p = std; p->xfer == xfer; p = n) {
1377 n = p->nexttd;
1378 ohci_free_std(sc, p);
1379 }
1380
1381 /* clear halt */
1382 opipe->sed->ed.ed_headp = HTOO32(p->physaddr);
1383 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1384
1385 if (cc == OHCI_CC_STALL)
1386 xfer->status = USBD_STALLED;
1387 else
1388 xfer->status = USBD_IOERROR;
1389 s = splusb();
1390 usb_transfer_complete(xfer);
1391 splx(s);
1392 }
1393 }
1394
1395 #ifdef OHCI_DEBUG
1396 if (ohcidebug > 10) {
1397 DPRINTF(("ohci_softintr: ITD done:\n"));
1398 ohci_dump_itds(sc, sidone);
1399 }
1400 #endif
1401
1402 for (sitd = sidone; sitd != NULL; sitd = sitdnext) {
1403 xfer = sitd->xfer;
1404 sitdnext = sitd->dnext;
1405 DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n",
1406 sitd, xfer, xfer ? xfer->hcpriv : 0));
1407 if (xfer == NULL)
1408 continue;
1409 if (xfer->status == USBD_CANCELLED ||
1410 xfer->status == USBD_TIMEOUT) {
1411 DPRINTF(("ohci_process_done: cancel/timeout %p\n",
1412 xfer));
1413 /* Handled by abort routine. */
1414 continue;
1415 }
1416 #ifdef DIAGNOSTIC
1417 if (sitd->isdone)
1418 printf("ohci_softintr: sitd=%p is done\n", sitd);
1419 sitd->isdone = 1;
1420 #endif
1421 if (sitd->flags & OHCI_CALL_DONE) {
1422 ohci_soft_itd_t *next;
1423
1424 opipe = (struct ohci_pipe *)xfer->pipe;
1425 opipe->u.iso.inuse -= xfer->nframes;
1426 uedir = UE_GET_DIR(xfer->pipe->endpoint->edesc->
1427 bEndpointAddress);
1428 xfer->status = USBD_NORMAL_COMPLETION;
1429 actlen = 0;
1430 for (i = 0, sitd = xfer->hcpriv;;
1431 sitd = next) {
1432 next = sitd->nextitd;
1433 if (OHCI_ITD_GET_CC(O32TOH(sitd->
1434 itd.itd_flags)) != OHCI_CC_NO_ERROR)
1435 xfer->status = USBD_IOERROR;
1436 /* For input, update frlengths with actual */
1437 /* XXX anything necessary for output? */
1438 if (uedir == UE_DIR_IN &&
1439 xfer->status == USBD_NORMAL_COMPLETION) {
1440 iframes = OHCI_ITD_GET_FC(O32TOH(
1441 sitd->itd.itd_flags));
1442 for (j = 0; j < iframes; i++, j++) {
1443 len = O16TOH(sitd->
1444 itd.itd_offset[j]);
1445 if ((OHCI_ITD_PSW_GET_CC(len) &
1446 OHCI_CC_NOT_ACCESSED_MASK)
1447 == OHCI_CC_NOT_ACCESSED)
1448 len = 0;
1449 else
1450 len = OHCI_ITD_PSW_LENGTH(len);
1451 xfer->frlengths[i] = len;
1452 actlen += len;
1453 }
1454 }
1455 if (sitd->flags & OHCI_CALL_DONE)
1456 break;
1457 ohci_free_sitd(sc, sitd);
1458 }
1459 ohci_free_sitd(sc, sitd);
1460 if (uedir == UE_DIR_IN &&
1461 xfer->status == USBD_NORMAL_COMPLETION)
1462 xfer->actlen = actlen;
1463 xfer->hcpriv = NULL;
1464
1465 s = splusb();
1466 usb_transfer_complete(xfer);
1467 splx(s);
1468 }
1469 }
1470
1471 #ifdef USB_USE_SOFTINTR
1472 if (sc->sc_softwake) {
1473 sc->sc_softwake = 0;
1474 wakeup(&sc->sc_softwake);
1475 }
1476 #endif /* USB_USE_SOFTINTR */
1477
1478 sc->sc_bus.intr_context--;
1479 DPRINTFN(10,("ohci_softintr: done:\n"));
1480 }
1481
1482 void
1483 ohci_device_ctrl_done(usbd_xfer_handle xfer)
1484 {
1485 DPRINTFN(10,("ohci_device_ctrl_done: xfer=%p\n", xfer));
1486
1487 #ifdef DIAGNOSTIC
1488 if (!(xfer->rqflags & URQ_REQUEST)) {
1489 panic("ohci_device_ctrl_done: not a request");
1490 }
1491 #endif
1492 }
1493
1494 void
1495 ohci_device_intr_done(usbd_xfer_handle xfer)
1496 {
1497 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1498 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
1499 ohci_soft_ed_t *sed = opipe->sed;
1500 ohci_soft_td_t *data, *tail;
1501
1502
1503 DPRINTFN(10,("ohci_device_intr_done: xfer=%p, actlen=%d\n",
1504 xfer, xfer->actlen));
1505
1506 if (xfer->pipe->repeat) {
1507 data = opipe->tail.td;
1508 tail = ohci_alloc_std(sc); /* XXX should reuse TD */
1509 if (tail == NULL) {
1510 xfer->status = USBD_NOMEM;
1511 return;
1512 }
1513 tail->xfer = NULL;
1514
1515 data->td.td_flags = HTOO32(
1516 OHCI_TD_IN | OHCI_TD_NOCC |
1517 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
1518 if (xfer->flags & USBD_SHORT_XFER_OK)
1519 data->td.td_flags |= HTOO32(OHCI_TD_R);
1520 data->td.td_cbp = HTOO32(DMAADDR(&xfer->dmabuf, 0));
1521 data->nexttd = tail;
1522 data->td.td_nexttd = HTOO32(tail->physaddr);
1523 data->td.td_be = HTOO32(O32TOH(data->td.td_cbp) +
1524 xfer->length - 1);
1525 data->len = xfer->length;
1526 data->xfer = xfer;
1527 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
1528 xfer->hcpriv = data;
1529 xfer->actlen = 0;
1530
1531 sed->ed.ed_tailp = HTOO32(tail->physaddr);
1532 opipe->tail.td = tail;
1533 }
1534 }
1535
1536 void
1537 ohci_device_bulk_done(usbd_xfer_handle xfer)
1538 {
1539 DPRINTFN(10,("ohci_device_bulk_done: xfer=%p, actlen=%d\n",
1540 xfer, xfer->actlen));
1541 }
1542
1543 void
1544 ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer)
1545 {
1546 usbd_pipe_handle pipe;
1547 u_char *p;
1548 int i, m;
1549 int hstatus;
1550
1551 hstatus = OREAD4(sc, OHCI_RH_STATUS);
1552 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n",
1553 sc, xfer, hstatus));
1554
1555 if (xfer == NULL) {
1556 /* Just ignore the change. */
1557 return;
1558 }
1559
1560 pipe = xfer->pipe;
1561
1562 p = KERNADDR(&xfer->dmabuf, 0);
1563 m = min(sc->sc_noport, xfer->length * 8 - 1);
1564 memset(p, 0, xfer->length);
1565 for (i = 1; i <= m; i++) {
1566 /* Pick out CHANGE bits from the status reg. */
1567 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16)
1568 p[i/8] |= 1 << (i%8);
1569 }
1570 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p));
1571 xfer->actlen = xfer->length;
1572 xfer->status = USBD_NORMAL_COMPLETION;
1573
1574 usb_transfer_complete(xfer);
1575 }
1576
1577 void
1578 ohci_root_intr_done(usbd_xfer_handle xfer)
1579 {
1580 }
1581
1582 void
1583 ohci_root_ctrl_done(usbd_xfer_handle xfer)
1584 {
1585 }
1586
1587 /*
1588 * Wait here until controller claims to have an interrupt.
1589 * Then call ohci_intr and return. Use timeout to avoid waiting
1590 * too long.
1591 */
1592 void
1593 ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer)
1594 {
1595 int timo;
1596 u_int32_t intrs;
1597
1598 xfer->status = USBD_IN_PROGRESS;
1599 for (timo = xfer->timeout; timo >= 0; timo--) {
1600 usb_delay_ms(&sc->sc_bus, 1);
1601 if (sc->sc_dying)
1602 break;
1603 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs;
1604 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs));
1605 #ifdef OHCI_DEBUG
1606 if (ohcidebug > 15)
1607 ohci_dumpregs(sc);
1608 #endif
1609 if (intrs) {
1610 ohci_intr1(sc);
1611 if (xfer->status != USBD_IN_PROGRESS)
1612 return;
1613 }
1614 }
1615
1616 /* Timeout */
1617 DPRINTF(("ohci_waitintr: timeout\n"));
1618 xfer->status = USBD_TIMEOUT;
1619 usb_transfer_complete(xfer);
1620 /* XXX should free TD */
1621 }
1622
1623 void
1624 ohci_poll(struct usbd_bus *bus)
1625 {
1626 ohci_softc_t *sc = (ohci_softc_t *)bus;
1627 #ifdef OHCI_DEBUG
1628 static int last;
1629 int new;
1630 new = OREAD4(sc, OHCI_INTERRUPT_STATUS);
1631 if (new != last) {
1632 DPRINTFN(10,("ohci_poll: intrs=0x%04x\n", new));
1633 last = new;
1634 }
1635 #endif
1636
1637 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs)
1638 ohci_intr1(sc);
1639 }
1640
1641 usbd_status
1642 ohci_device_request(usbd_xfer_handle xfer)
1643 {
1644 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1645 usb_device_request_t *req = &xfer->request;
1646 usbd_device_handle dev = opipe->pipe.device;
1647 ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
1648 int addr = dev->address;
1649 ohci_soft_td_t *setup, *stat, *next, *tail;
1650 ohci_soft_ed_t *sed;
1651 int isread;
1652 int len;
1653 usbd_status err;
1654 int s;
1655
1656 isread = req->bmRequestType & UT_READ;
1657 len = UGETW(req->wLength);
1658
1659 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, "
1660 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
1661 req->bmRequestType, req->bRequest, UGETW(req->wValue),
1662 UGETW(req->wIndex), len, addr,
1663 opipe->pipe.endpoint->edesc->bEndpointAddress));
1664
1665 setup = opipe->tail.td;
1666 stat = ohci_alloc_std(sc);
1667 if (stat == NULL) {
1668 err = USBD_NOMEM;
1669 goto bad1;
1670 }
1671 tail = ohci_alloc_std(sc);
1672 if (tail == NULL) {
1673 err = USBD_NOMEM;
1674 goto bad2;
1675 }
1676 tail->xfer = NULL;
1677
1678 sed = opipe->sed;
1679 opipe->u.ctl.length = len;
1680
1681 /* Update device address and length since they may have changed
1682 during the setup of the control pipe in usbd_new_device(). */
1683 /* XXX This only needs to be done once, but it's too early in open. */
1684 /* XXXX Should not touch ED here! */
1685 sed->ed.ed_flags = HTOO32(
1686 (O32TOH(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) |
1687 OHCI_ED_SET_FA(addr) |
1688 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize)));
1689
1690 next = stat;
1691
1692 /* Set up data transaction */
1693 if (len != 0) {
1694 ohci_soft_td_t *std = stat;
1695
1696 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer,
1697 std, &stat);
1698 stat = stat->nexttd; /* point at free TD */
1699 if (err)
1700 goto bad3;
1701 /* Start toggle at 1 and then use the carried toggle. */
1702 std->td.td_flags &= HTOO32(~OHCI_TD_TOGGLE_MASK);
1703 std->td.td_flags |= HTOO32(OHCI_TD_TOGGLE_1);
1704 }
1705
1706 memcpy(KERNADDR(&opipe->u.ctl.reqdma, 0), req, sizeof *req);
1707
1708 setup->td.td_flags = HTOO32(OHCI_TD_SETUP | OHCI_TD_NOCC |
1709 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR);
1710 setup->td.td_cbp = HTOO32(DMAADDR(&opipe->u.ctl.reqdma, 0));
1711 setup->nexttd = next;
1712 setup->td.td_nexttd = HTOO32(next->physaddr);
1713 setup->td.td_be = HTOO32(O32TOH(setup->td.td_cbp) + sizeof *req - 1);
1714 setup->len = 0;
1715 setup->xfer = xfer;
1716 setup->flags = 0;
1717 xfer->hcpriv = setup;
1718
1719 stat->td.td_flags = HTOO32(
1720 (isread ? OHCI_TD_OUT : OHCI_TD_IN) |
1721 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1));
1722 stat->td.td_cbp = 0;
1723 stat->nexttd = tail;
1724 stat->td.td_nexttd = HTOO32(tail->physaddr);
1725 stat->td.td_be = 0;
1726 stat->flags = OHCI_CALL_DONE;
1727 stat->len = 0;
1728 stat->xfer = xfer;
1729
1730 #ifdef OHCI_DEBUG
1731 if (ohcidebug > 5) {
1732 DPRINTF(("ohci_device_request:\n"));
1733 ohci_dump_ed(sc, sed);
1734 ohci_dump_tds(sc, setup);
1735 }
1736 #endif
1737
1738 /* Insert ED in schedule */
1739 s = splusb();
1740 sed->ed.ed_tailp = HTOO32(tail->physaddr);
1741 opipe->tail.td = tail;
1742 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1743 if (xfer->timeout && !sc->sc_bus.use_polling) {
1744 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout),
1745 ohci_timeout, xfer);
1746 }
1747 splx(s);
1748
1749 #ifdef OHCI_DEBUG
1750 if (ohcidebug > 20) {
1751 delay(10000);
1752 DPRINTF(("ohci_device_request: status=%x\n",
1753 OREAD4(sc, OHCI_COMMAND_STATUS)));
1754 ohci_dumpregs(sc);
1755 printf("ctrl head:\n");
1756 ohci_dump_ed(sc, sc->sc_ctrl_head);
1757 printf("sed:\n");
1758 ohci_dump_ed(sc, sed);
1759 ohci_dump_tds(sc, setup);
1760 }
1761 #endif
1762
1763 return (USBD_NORMAL_COMPLETION);
1764
1765 bad3:
1766 ohci_free_std(sc, tail);
1767 bad2:
1768 ohci_free_std(sc, stat);
1769 bad1:
1770 return (err);
1771 }
1772
1773 /*
1774 * Add an ED to the schedule. Called at splusb().
1775 */
1776 void
1777 ohci_add_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head)
1778 {
1779 DPRINTFN(8,("ohci_add_ed: sed=%p head=%p\n", sed, head));
1780
1781 SPLUSBCHECK;
1782 sed->next = head->next;
1783 sed->ed.ed_nexted = head->ed.ed_nexted;
1784 head->next = sed;
1785 head->ed.ed_nexted = HTOO32(sed->physaddr);
1786 }
1787
1788 /*
1789 * Remove an ED from the schedule. Called at splusb().
1790 */
1791 void
1792 ohci_rem_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head)
1793 {
1794 ohci_soft_ed_t *p;
1795
1796 SPLUSBCHECK;
1797
1798 /* XXX */
1799 for (p = head; p != NULL && p->next != sed; p = p->next)
1800 ;
1801 if (p == NULL)
1802 panic("ohci_rem_ed: ED not found");
1803 p->next = sed->next;
1804 p->ed.ed_nexted = sed->ed.ed_nexted;
1805 }
1806
1807 /*
1808 * When a transfer is completed the TD is added to the done queue by
1809 * the host controller. This queue is the processed by software.
1810 * Unfortunately the queue contains the physical address of the TD
1811 * and we have no simple way to translate this back to a kernel address.
1812 * To make the translation possible (and fast) we use a hash table of
1813 * TDs currently in the schedule. The physical address is used as the
1814 * hash value.
1815 */
1816
1817 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE)
1818 /* Called at splusb() */
1819 void
1820 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std)
1821 {
1822 int h = HASH(std->physaddr);
1823
1824 SPLUSBCHECK;
1825
1826 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext);
1827 }
1828
1829 /* Called at splusb() */
1830 void
1831 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std)
1832 {
1833 SPLUSBCHECK;
1834
1835 LIST_REMOVE(std, hnext);
1836 }
1837
1838 ohci_soft_td_t *
1839 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a)
1840 {
1841 int h = HASH(a);
1842 ohci_soft_td_t *std;
1843
1844 for (std = LIST_FIRST(&sc->sc_hash_tds[h]);
1845 std != NULL;
1846 std = LIST_NEXT(std, hnext))
1847 if (std->physaddr == a)
1848 return (std);
1849 return (NULL);
1850 }
1851
1852 /* Called at splusb() */
1853 void
1854 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
1855 {
1856 int h = HASH(sitd->physaddr);
1857
1858 SPLUSBCHECK;
1859
1860 DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n",
1861 sitd, (u_long)sitd->physaddr));
1862
1863 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext);
1864 }
1865
1866 /* Called at splusb() */
1867 void
1868 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
1869 {
1870 SPLUSBCHECK;
1871
1872 DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n",
1873 sitd, (u_long)sitd->physaddr));
1874
1875 LIST_REMOVE(sitd, hnext);
1876 }
1877
1878 ohci_soft_itd_t *
1879 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a)
1880 {
1881 int h = HASH(a);
1882 ohci_soft_itd_t *sitd;
1883
1884 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]);
1885 sitd != NULL;
1886 sitd = LIST_NEXT(sitd, hnext))
1887 if (sitd->physaddr == a)
1888 return (sitd);
1889 return (NULL);
1890 }
1891
1892 void
1893 ohci_timeout(void *addr)
1894 {
1895 struct ohci_xfer *oxfer = addr;
1896 struct ohci_pipe *opipe = (struct ohci_pipe *)oxfer->xfer.pipe;
1897 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
1898
1899 DPRINTF(("ohci_timeout: oxfer=%p\n", oxfer));
1900
1901 if (sc->sc_dying) {
1902 ohci_abort_xfer(&oxfer->xfer, USBD_TIMEOUT);
1903 return;
1904 }
1905
1906 /* Execute the abort in a process context. */
1907 usb_init_task(&oxfer->abort_task, ohci_timeout_task, addr);
1908 usb_add_task(oxfer->xfer.pipe->device, &oxfer->abort_task);
1909 }
1910
1911 void
1912 ohci_timeout_task(void *addr)
1913 {
1914 usbd_xfer_handle xfer = addr;
1915 int s;
1916
1917 DPRINTF(("ohci_timeout_task: xfer=%p\n", xfer));
1918
1919 s = splusb();
1920 ohci_abort_xfer(xfer, USBD_TIMEOUT);
1921 splx(s);
1922 }
1923
1924 #ifdef OHCI_DEBUG
1925 void
1926 ohci_dump_tds(ohci_softc_t *sc, ohci_soft_td_t *std)
1927 {
1928 for (; std; std = std->nexttd)
1929 ohci_dump_td(sc, std);
1930 }
1931
1932 void
1933 ohci_dump_td(ohci_softc_t *sc, ohci_soft_td_t *std)
1934 {
1935 char sbuf[128];
1936
1937 bitmask_snprintf((u_int32_t)O32TOH(std->td.td_flags),
1938 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE",
1939 sbuf, sizeof(sbuf));
1940
1941 printf("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx "
1942 "nexttd=0x%08lx be=0x%08lx\n",
1943 std, (u_long)std->physaddr, sbuf,
1944 OHCI_TD_GET_DI(O32TOH(std->td.td_flags)),
1945 OHCI_TD_GET_EC(O32TOH(std->td.td_flags)),
1946 OHCI_TD_GET_CC(O32TOH(std->td.td_flags)),
1947 (u_long)O32TOH(std->td.td_cbp),
1948 (u_long)O32TOH(std->td.td_nexttd),
1949 (u_long)O32TOH(std->td.td_be));
1950 }
1951
1952 void
1953 ohci_dump_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
1954 {
1955 int i;
1956
1957 printf("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n"
1958 "bp0=0x%08lx next=0x%08lx be=0x%08lx\n",
1959 sitd, (u_long)sitd->physaddr,
1960 OHCI_ITD_GET_SF(O32TOH(sitd->itd.itd_flags)),
1961 OHCI_ITD_GET_DI(O32TOH(sitd->itd.itd_flags)),
1962 OHCI_ITD_GET_FC(O32TOH(sitd->itd.itd_flags)),
1963 OHCI_ITD_GET_CC(O32TOH(sitd->itd.itd_flags)),
1964 (u_long)O32TOH(sitd->itd.itd_bp0),
1965 (u_long)O32TOH(sitd->itd.itd_nextitd),
1966 (u_long)O32TOH(sitd->itd.itd_be));
1967 for (i = 0; i < OHCI_ITD_NOFFSET; i++)
1968 printf("offs[%d]=0x%04x ", i,
1969 (u_int)O16TOH(sitd->itd.itd_offset[i]));
1970 printf("\n");
1971 }
1972
1973 void
1974 ohci_dump_itds(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
1975 {
1976 for (; sitd; sitd = sitd->nextitd)
1977 ohci_dump_itd(sc, sitd);
1978 }
1979
1980 void
1981 ohci_dump_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed)
1982 {
1983 char sbuf[128], sbuf2[128];
1984
1985 bitmask_snprintf((u_int32_t)O32TOH(sed->ed.ed_flags),
1986 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO",
1987 sbuf, sizeof(sbuf));
1988 bitmask_snprintf((u_int32_t)O32TOH(sed->ed.ed_headp),
1989 "\20\1HALT\2CARRY", sbuf2, sizeof(sbuf2));
1990
1991 printf("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d flags=%s\ntailp=0x%08lx "
1992 "headflags=%s headp=0x%08lx nexted=0x%08lx\n",
1993 sed, (u_long)sed->physaddr,
1994 OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)),
1995 OHCI_ED_GET_EN(O32TOH(sed->ed.ed_flags)),
1996 OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)), sbuf,
1997 (u_long)O32TOH(sed->ed.ed_tailp), sbuf2,
1998 (u_long)O32TOH(sed->ed.ed_headp),
1999 (u_long)O32TOH(sed->ed.ed_nexted));
2000 }
2001 #endif
2002
2003 usbd_status
2004 ohci_open(usbd_pipe_handle pipe)
2005 {
2006 usbd_device_handle dev = pipe->device;
2007 ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
2008 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
2009 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2010 u_int8_t addr = dev->address;
2011 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE;
2012 ohci_soft_ed_t *sed;
2013 ohci_soft_td_t *std;
2014 ohci_soft_itd_t *sitd;
2015 ohci_physaddr_t tdphys;
2016 u_int32_t fmt;
2017 usbd_status err;
2018 int s;
2019 int ival;
2020
2021 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
2022 pipe, addr, ed->bEndpointAddress, sc->sc_addr));
2023
2024 if (sc->sc_dying)
2025 return (USBD_IOERROR);
2026
2027 std = NULL;
2028 sed = NULL;
2029
2030 if (addr == sc->sc_addr) {
2031 switch (ed->bEndpointAddress) {
2032 case USB_CONTROL_ENDPOINT:
2033 pipe->methods = &ohci_root_ctrl_methods;
2034 break;
2035 case UE_DIR_IN | OHCI_INTR_ENDPT:
2036 pipe->methods = &ohci_root_intr_methods;
2037 break;
2038 default:
2039 return (USBD_INVAL);
2040 }
2041 } else {
2042 sed = ohci_alloc_sed(sc);
2043 if (sed == NULL)
2044 goto bad0;
2045 opipe->sed = sed;
2046 if (xfertype == UE_ISOCHRONOUS) {
2047 sitd = ohci_alloc_sitd(sc);
2048 if (sitd == NULL)
2049 goto bad1;
2050 opipe->tail.itd = sitd;
2051 tdphys = sitd->physaddr;
2052 fmt = OHCI_ED_FORMAT_ISO;
2053 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN)
2054 fmt |= OHCI_ED_DIR_IN;
2055 else
2056 fmt |= OHCI_ED_DIR_OUT;
2057 } else {
2058 std = ohci_alloc_std(sc);
2059 if (std == NULL)
2060 goto bad1;
2061 opipe->tail.td = std;
2062 tdphys = std->physaddr;
2063 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD;
2064 }
2065 sed->ed.ed_flags = HTOO32(
2066 OHCI_ED_SET_FA(addr) |
2067 OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) |
2068 (dev->speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) |
2069 fmt |
2070 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize)));
2071 sed->ed.ed_headp = sed->ed.ed_tailp = HTOO32(tdphys);
2072
2073 switch (xfertype) {
2074 case UE_CONTROL:
2075 pipe->methods = &ohci_device_ctrl_methods;
2076 err = usb_allocmem(&sc->sc_bus,
2077 sizeof(usb_device_request_t),
2078 0, &opipe->u.ctl.reqdma);
2079 if (err)
2080 goto bad;
2081 s = splusb();
2082 ohci_add_ed(sc, sed, sc->sc_ctrl_head);
2083 splx(s);
2084 break;
2085 case UE_INTERRUPT:
2086 pipe->methods = &ohci_device_intr_methods;
2087 ival = pipe->interval;
2088 if (ival == USBD_DEFAULT_INTERVAL)
2089 ival = ed->bInterval;
2090 return (ohci_device_setintr(sc, opipe, ival));
2091 case UE_ISOCHRONOUS:
2092 pipe->methods = &ohci_device_isoc_methods;
2093 return (ohci_setup_isoc(pipe));
2094 case UE_BULK:
2095 pipe->methods = &ohci_device_bulk_methods;
2096 s = splusb();
2097 ohci_add_ed(sc, sed, sc->sc_bulk_head);
2098 splx(s);
2099 break;
2100 }
2101 }
2102 return (USBD_NORMAL_COMPLETION);
2103
2104 bad:
2105 if (std != NULL)
2106 ohci_free_std(sc, std);
2107 bad1:
2108 if (sed != NULL)
2109 ohci_free_sed(sc, sed);
2110 bad0:
2111 return (USBD_NOMEM);
2112
2113 }
2114
2115 /*
2116 * Close a reqular pipe.
2117 * Assumes that there are no pending transactions.
2118 */
2119 void
2120 ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head)
2121 {
2122 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2123 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2124 ohci_soft_ed_t *sed = opipe->sed;
2125 int s;
2126
2127 s = splusb();
2128 #ifdef DIAGNOSTIC
2129 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
2130 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
2131 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) {
2132 ohci_soft_td_t *std;
2133 std = ohci_hash_find_td(sc, O32TOH(sed->ed.ed_headp));
2134 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x "
2135 "tl=0x%x pipe=%p, std=%p\n", sed,
2136 (int)O32TOH(sed->ed.ed_headp),
2137 (int)O32TOH(sed->ed.ed_tailp),
2138 pipe, std);
2139 #ifdef USB_DEBUG
2140 usbd_dump_pipe(&opipe->pipe);
2141 #endif
2142 #ifdef OHCI_DEBUG
2143 ohci_dump_ed(sc, sed);
2144 if (std)
2145 ohci_dump_td(sc, std);
2146 #endif
2147 usb_delay_ms(&sc->sc_bus, 2);
2148 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
2149 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK))
2150 printf("ohci_close_pipe: pipe still not empty\n");
2151 }
2152 #endif
2153 ohci_rem_ed(sed, head);
2154 /* Make sure the host controller is not touching this ED */
2155 usb_delay_ms(&sc->sc_bus, 1);
2156 splx(s);
2157 ohci_free_sed(sc, opipe->sed);
2158 }
2159
2160 /*
2161 * Abort a device request.
2162 * If this routine is called at splusb() it guarantees that the request
2163 * will be removed from the hardware scheduling and that the callback
2164 * for it will be called with USBD_CANCELLED status.
2165 * It's impossible to guarantee that the requested transfer will not
2166 * have happened since the hardware runs concurrently.
2167 * If the transaction has already happened we rely on the ordinary
2168 * interrupt processing to process it.
2169 */
2170 void
2171 ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
2172 {
2173 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
2174 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
2175 ohci_soft_ed_t *sed = opipe->sed;
2176 ohci_soft_td_t *p, *n;
2177 ohci_physaddr_t headp;
2178 int s, hit;
2179 int wake;
2180
2181 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p sed=%p\n", xfer, opipe,sed));
2182
2183 if (sc->sc_dying) {
2184 /* If we're dying, just do the software part. */
2185 s = splusb();
2186 xfer->status = status; /* make software ignore it */
2187 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer);
2188 usb_transfer_complete(xfer);
2189 splx(s);
2190 return;
2191 }
2192
2193 if (xfer->device->bus->intr_context || !curproc)
2194 panic("ohci_abort_xfer: not in process context");
2195
2196 /*
2197 * If an abort is already in progress then just wait for it to
2198 * complete and return.
2199 */
2200 if (xfer->hcflags & UXFER_ABORTING) {
2201 DPRINTFN(2, ("ohci_abort_xfer: already aborting\n"));
2202 #ifdef DIAGNOSTIC
2203 if (status == USBD_TIMEOUT)
2204 printf("0hci_abort_xfer: TIMEOUT while aborting\n");
2205 #endif
2206 /* Override the status which might be USBD_TIMEOUT. */
2207 xfer->status = status;
2208 DPRINTFN(2, ("ohci_abort_xfer: waiting for abort to finish\n"));
2209 xfer->hcflags |= UXFER_ABORTWAIT;
2210 while (xfer->hcflags & UXFER_ABORTING)
2211 tsleep(&xfer->hcflags, PZERO, "ohciaw", 0);
2212 return;
2213 }
2214 xfer->hcflags |= UXFER_ABORTING;
2215
2216 /*
2217 * Step 1: Make interrupt routine and hardware ignore xfer.
2218 */
2219 s = splusb();
2220 xfer->status = status; /* make software ignore it */
2221 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer);
2222 splx(s);
2223 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed));
2224 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */
2225
2226 /*
2227 * Step 2: Wait until we know hardware has finished any possible
2228 * use of the xfer. Also make sure the soft interrupt routine
2229 * has run.
2230 */
2231 usb_delay_ms(opipe->pipe.device->bus, 20); /* Hardware finishes in 1ms */
2232 s = splusb();
2233 #ifdef USB_USE_SOFTINTR
2234 sc->sc_softwake = 1;
2235 #endif /* USB_USE_SOFTINTR */
2236 usb_schedsoftintr(&sc->sc_bus);
2237 #ifdef USB_USE_SOFTINTR
2238 tsleep(&sc->sc_softwake, PZERO, "ohciab", 0);
2239 #endif /* USB_USE_SOFTINTR */
2240 splx(s);
2241
2242 /*
2243 * Step 3: Remove any vestiges of the xfer from the hardware.
2244 * The complication here is that the hardware may have executed
2245 * beyond the xfer we're trying to abort. So as we're scanning
2246 * the TDs of this xfer we check if the hardware points to
2247 * any of them.
2248 */
2249 s = splusb(); /* XXX why? */
2250 p = xfer->hcpriv;
2251 #ifdef DIAGNOSTIC
2252 if (p == NULL) {
2253 xfer->hcflags &= ~UXFER_ABORTING; /* XXX */
2254 splx(s);
2255 printf("ohci_abort_xfer: hcpriv is NULL\n");
2256 return;
2257 }
2258 #endif
2259 #ifdef OHCI_DEBUG
2260 if (ohcidebug > 1) {
2261 DPRINTF(("ohci_abort_xfer: sed=\n"));
2262 ohci_dump_ed(sc, sed);
2263 ohci_dump_tds(sc, p);
2264 }
2265 #endif
2266 headp = O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK;
2267 hit = 0;
2268 for (; p->xfer == xfer; p = n) {
2269 hit |= headp == p->physaddr;
2270 n = p->nexttd;
2271 ohci_free_std(sc, p);
2272 }
2273 /* Zap headp register if hardware pointed inside the xfer. */
2274 if (hit) {
2275 DPRINTFN(1,("ohci_abort_xfer: set hd=0x%08x, tl=0x%08x\n",
2276 (int)p->physaddr, (int)O32TOH(sed->ed.ed_tailp)));
2277 sed->ed.ed_headp = HTOO32(p->physaddr); /* unlink TDs */
2278 } else {
2279 DPRINTFN(1,("ohci_abort_xfer: no hit\n"));
2280 }
2281
2282 /*
2283 * Step 4: Turn on hardware again.
2284 */
2285 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */
2286
2287 /*
2288 * Step 5: Execute callback.
2289 */
2290 wake = xfer->hcflags & UXFER_ABORTWAIT;
2291 xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT);
2292 usb_transfer_complete(xfer);
2293 if (wake)
2294 wakeup(&xfer->hcflags);
2295
2296 splx(s);
2297 }
2298
2299 /*
2300 * Data structures and routines to emulate the root hub.
2301 */
2302 Static usb_device_descriptor_t ohci_devd = {
2303 USB_DEVICE_DESCRIPTOR_SIZE,
2304 UDESC_DEVICE, /* type */
2305 {0x00, 0x01}, /* USB version */
2306 UDCLASS_HUB, /* class */
2307 UDSUBCLASS_HUB, /* subclass */
2308 UDPROTO_FSHUB,
2309 64, /* max packet */
2310 {0},{0},{0x00,0x01}, /* device id */
2311 1,2,0, /* string indicies */
2312 1 /* # of configurations */
2313 };
2314
2315 Static usb_config_descriptor_t ohci_confd = {
2316 USB_CONFIG_DESCRIPTOR_SIZE,
2317 UDESC_CONFIG,
2318 {USB_CONFIG_DESCRIPTOR_SIZE +
2319 USB_INTERFACE_DESCRIPTOR_SIZE +
2320 USB_ENDPOINT_DESCRIPTOR_SIZE},
2321 1,
2322 1,
2323 0,
2324 UC_SELF_POWERED,
2325 0 /* max power */
2326 };
2327
2328 Static usb_interface_descriptor_t ohci_ifcd = {
2329 USB_INTERFACE_DESCRIPTOR_SIZE,
2330 UDESC_INTERFACE,
2331 0,
2332 0,
2333 1,
2334 UICLASS_HUB,
2335 UISUBCLASS_HUB,
2336 UIPROTO_FSHUB,
2337 0
2338 };
2339
2340 Static usb_endpoint_descriptor_t ohci_endpd = {
2341 .bLength = USB_ENDPOINT_DESCRIPTOR_SIZE,
2342 .bDescriptorType = UDESC_ENDPOINT,
2343 .bEndpointAddress = UE_DIR_IN | OHCI_INTR_ENDPT,
2344 .bmAttributes = UE_INTERRUPT,
2345 .wMaxPacketSize = {8, 0}, /* max packet */
2346 .bInterval = 255,
2347 };
2348
2349 Static usb_hub_descriptor_t ohci_hubd = {
2350 .bDescLength = USB_HUB_DESCRIPTOR_SIZE,
2351 .bDescriptorType = UDESC_HUB,
2352 };
2353
2354 Static int
2355 ohci_str(usb_string_descriptor_t *p, int l, const char *s)
2356 {
2357 int i;
2358
2359 if (l == 0)
2360 return (0);
2361 p->bLength = 2 * strlen(s) + 2;
2362 if (l == 1)
2363 return (1);
2364 p->bDescriptorType = UDESC_STRING;
2365 l -= 2;
2366 for (i = 0; s[i] && l > 1; i++, l -= 2)
2367 USETW2(p->bString[i], 0, s[i]);
2368 return (2*i+2);
2369 }
2370
2371 /*
2372 * Simulate a hardware hub by handling all the necessary requests.
2373 */
2374 Static usbd_status
2375 ohci_root_ctrl_transfer(usbd_xfer_handle xfer)
2376 {
2377 usbd_status err;
2378
2379 /* Insert last in queue. */
2380 err = usb_insert_transfer(xfer);
2381 if (err)
2382 return (err);
2383
2384 /* Pipe isn't running, start first */
2385 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2386 }
2387
2388 Static usbd_status
2389 ohci_root_ctrl_start(usbd_xfer_handle xfer)
2390 {
2391 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus;
2392 usb_device_request_t *req;
2393 void *buf = NULL;
2394 int port, i;
2395 int s, len, value, index, l, totlen = 0;
2396 usb_port_status_t ps;
2397 usb_hub_descriptor_t hubd;
2398 usbd_status err;
2399 u_int32_t v;
2400
2401 if (sc->sc_dying)
2402 return (USBD_IOERROR);
2403
2404 #ifdef DIAGNOSTIC
2405 if (!(xfer->rqflags & URQ_REQUEST))
2406 /* XXX panic */
2407 return (USBD_INVAL);
2408 #endif
2409 req = &xfer->request;
2410
2411 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n",
2412 req->bmRequestType, req->bRequest));
2413
2414 len = UGETW(req->wLength);
2415 value = UGETW(req->wValue);
2416 index = UGETW(req->wIndex);
2417
2418 if (len != 0)
2419 buf = KERNADDR(&xfer->dmabuf, 0);
2420
2421 #define C(x,y) ((x) | ((y) << 8))
2422 switch(C(req->bRequest, req->bmRequestType)) {
2423 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
2424 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
2425 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
2426 /*
2427 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
2428 * for the integrated root hub.
2429 */
2430 break;
2431 case C(UR_GET_CONFIG, UT_READ_DEVICE):
2432 if (len > 0) {
2433 *(u_int8_t *)buf = sc->sc_conf;
2434 totlen = 1;
2435 }
2436 break;
2437 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
2438 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value));
2439 if (len == 0)
2440 break;
2441 switch(value >> 8) {
2442 case UDESC_DEVICE:
2443 if ((value & 0xff) != 0) {
2444 err = USBD_IOERROR;
2445 goto ret;
2446 }
2447 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
2448 USETW(ohci_devd.idVendor, sc->sc_id_vendor);
2449 memcpy(buf, &ohci_devd, l);
2450 break;
2451 case UDESC_CONFIG:
2452 if ((value & 0xff) != 0) {
2453 err = USBD_IOERROR;
2454 goto ret;
2455 }
2456 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
2457 memcpy(buf, &ohci_confd, l);
2458 buf = (char *)buf + l;
2459 len -= l;
2460 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
2461 totlen += l;
2462 memcpy(buf, &ohci_ifcd, l);
2463 buf = (char *)buf + l;
2464 len -= l;
2465 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
2466 totlen += l;
2467 memcpy(buf, &ohci_endpd, l);
2468 break;
2469 case UDESC_STRING:
2470 *(u_int8_t *)buf = 0;
2471 totlen = 1;
2472 switch (value & 0xff) {
2473 case 0: /* Language table */
2474 totlen = ohci_str(buf, len, "\001");
2475 break;
2476 case 1: /* Vendor */
2477 totlen = ohci_str(buf, len, sc->sc_vendor);
2478 break;
2479 case 2: /* Product */
2480 totlen = ohci_str(buf, len, "OHCI root hub");
2481 break;
2482 }
2483 break;
2484 default:
2485 err = USBD_IOERROR;
2486 goto ret;
2487 }
2488 break;
2489 case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
2490 if (len > 0) {
2491 *(u_int8_t *)buf = 0;
2492 totlen = 1;
2493 }
2494 break;
2495 case C(UR_GET_STATUS, UT_READ_DEVICE):
2496 if (len > 1) {
2497 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
2498 totlen = 2;
2499 }
2500 break;
2501 case C(UR_GET_STATUS, UT_READ_INTERFACE):
2502 case C(UR_GET_STATUS, UT_READ_ENDPOINT):
2503 if (len > 1) {
2504 USETW(((usb_status_t *)buf)->wStatus, 0);
2505 totlen = 2;
2506 }
2507 break;
2508 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
2509 if (value >= USB_MAX_DEVICES) {
2510 err = USBD_IOERROR;
2511 goto ret;
2512 }
2513 sc->sc_addr = value;
2514 break;
2515 case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
2516 if (value != 0 && value != 1) {
2517 err = USBD_IOERROR;
2518 goto ret;
2519 }
2520 sc->sc_conf = value;
2521 break;
2522 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
2523 break;
2524 case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
2525 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
2526 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
2527 err = USBD_IOERROR;
2528 goto ret;
2529 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
2530 break;
2531 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
2532 break;
2533 /* Hub requests */
2534 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
2535 break;
2536 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
2537 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
2538 "port=%d feature=%d\n",
2539 index, value));
2540 if (index < 1 || index > sc->sc_noport) {
2541 err = USBD_IOERROR;
2542 goto ret;
2543 }
2544 port = OHCI_RH_PORT_STATUS(index);
2545 switch(value) {
2546 case UHF_PORT_ENABLE:
2547 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS);
2548 break;
2549 case UHF_PORT_SUSPEND:
2550 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR);
2551 break;
2552 case UHF_PORT_POWER:
2553 /* Yes, writing to the LOW_SPEED bit clears power. */
2554 OWRITE4(sc, port, UPS_LOW_SPEED);
2555 break;
2556 case UHF_C_PORT_CONNECTION:
2557 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16);
2558 break;
2559 case UHF_C_PORT_ENABLE:
2560 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16);
2561 break;
2562 case UHF_C_PORT_SUSPEND:
2563 OWRITE4(sc, port, UPS_C_SUSPEND << 16);
2564 break;
2565 case UHF_C_PORT_OVER_CURRENT:
2566 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16);
2567 break;
2568 case UHF_C_PORT_RESET:
2569 OWRITE4(sc, port, UPS_C_PORT_RESET << 16);
2570 break;
2571 default:
2572 err = USBD_IOERROR;
2573 goto ret;
2574 }
2575 switch(value) {
2576 case UHF_C_PORT_CONNECTION:
2577 case UHF_C_PORT_ENABLE:
2578 case UHF_C_PORT_SUSPEND:
2579 case UHF_C_PORT_OVER_CURRENT:
2580 case UHF_C_PORT_RESET:
2581 /* Enable RHSC interrupt if condition is cleared. */
2582 if ((OREAD4(sc, port) >> 16) == 0)
2583 ohci_rhsc_enable(sc);
2584 break;
2585 default:
2586 break;
2587 }
2588 break;
2589 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
2590 if (len == 0)
2591 break;
2592 if ((value & 0xff) != 0) {
2593 err = USBD_IOERROR;
2594 goto ret;
2595 }
2596 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
2597 hubd = ohci_hubd;
2598 hubd.bNbrPorts = sc->sc_noport;
2599 USETW(hubd.wHubCharacteristics,
2600 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH :
2601 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL)
2602 /* XXX overcurrent */
2603 );
2604 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v);
2605 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
2606 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
2607 hubd.DeviceRemovable[i++] = (u_int8_t)v;
2608 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
2609 l = min(len, hubd.bDescLength);
2610 totlen = l;
2611 memcpy(buf, &hubd, l);
2612 break;
2613 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
2614 if (len != 4) {
2615 err = USBD_IOERROR;
2616 goto ret;
2617 }
2618 memset(buf, 0, len); /* ? XXX */
2619 totlen = len;
2620 break;
2621 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
2622 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n",
2623 index));
2624 if (index < 1 || index > sc->sc_noport) {
2625 err = USBD_IOERROR;
2626 goto ret;
2627 }
2628 if (len != 4) {
2629 err = USBD_IOERROR;
2630 goto ret;
2631 }
2632 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index));
2633 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n",
2634 v));
2635 USETW(ps.wPortStatus, v);
2636 USETW(ps.wPortChange, v >> 16);
2637 l = min(len, sizeof ps);
2638 memcpy(buf, &ps, l);
2639 totlen = l;
2640 break;
2641 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
2642 err = USBD_IOERROR;
2643 goto ret;
2644 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
2645 break;
2646 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
2647 if (index < 1 || index > sc->sc_noport) {
2648 err = USBD_IOERROR;
2649 goto ret;
2650 }
2651 port = OHCI_RH_PORT_STATUS(index);
2652 switch(value) {
2653 case UHF_PORT_ENABLE:
2654 OWRITE4(sc, port, UPS_PORT_ENABLED);
2655 break;
2656 case UHF_PORT_SUSPEND:
2657 OWRITE4(sc, port, UPS_SUSPEND);
2658 break;
2659 case UHF_PORT_RESET:
2660 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n",
2661 index));
2662 OWRITE4(sc, port, UPS_RESET);
2663 for (i = 0; i < 5; i++) {
2664 usb_delay_ms(&sc->sc_bus,
2665 USB_PORT_ROOT_RESET_DELAY);
2666 if (sc->sc_dying) {
2667 err = USBD_IOERROR;
2668 goto ret;
2669 }
2670 if ((OREAD4(sc, port) & UPS_RESET) == 0)
2671 break;
2672 }
2673 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n",
2674 index, OREAD4(sc, port)));
2675 break;
2676 case UHF_PORT_POWER:
2677 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power "
2678 "%d\n", index));
2679 OWRITE4(sc, port, UPS_PORT_POWER);
2680 break;
2681 default:
2682 err = USBD_IOERROR;
2683 goto ret;
2684 }
2685 break;
2686 default:
2687 err = USBD_IOERROR;
2688 goto ret;
2689 }
2690 xfer->actlen = totlen;
2691 err = USBD_NORMAL_COMPLETION;
2692 ret:
2693 xfer->status = err;
2694 s = splusb();
2695 usb_transfer_complete(xfer);
2696 splx(s);
2697 return (USBD_IN_PROGRESS);
2698 }
2699
2700 /* Abort a root control request. */
2701 Static void
2702 ohci_root_ctrl_abort(usbd_xfer_handle xfer)
2703 {
2704 /* Nothing to do, all transfers are synchronous. */
2705 }
2706
2707 /* Close the root pipe. */
2708 Static void
2709 ohci_root_ctrl_close(usbd_pipe_handle pipe)
2710 {
2711 DPRINTF(("ohci_root_ctrl_close\n"));
2712 /* Nothing to do. */
2713 }
2714
2715 Static usbd_status
2716 ohci_root_intr_transfer(usbd_xfer_handle xfer)
2717 {
2718 usbd_status err;
2719
2720 /* Insert last in queue. */
2721 err = usb_insert_transfer(xfer);
2722 if (err)
2723 return (err);
2724
2725 /* Pipe isn't running, start first */
2726 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2727 }
2728
2729 Static usbd_status
2730 ohci_root_intr_start(usbd_xfer_handle xfer)
2731 {
2732 usbd_pipe_handle pipe = xfer->pipe;
2733 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2734
2735 if (sc->sc_dying)
2736 return (USBD_IOERROR);
2737
2738 sc->sc_intrxfer = xfer;
2739
2740 return (USBD_IN_PROGRESS);
2741 }
2742
2743 /* Abort a root interrupt request. */
2744 Static void
2745 ohci_root_intr_abort(usbd_xfer_handle xfer)
2746 {
2747 int s;
2748
2749 if (xfer->pipe->intrxfer == xfer) {
2750 DPRINTF(("ohci_root_intr_abort: remove\n"));
2751 xfer->pipe->intrxfer = NULL;
2752 }
2753 xfer->status = USBD_CANCELLED;
2754 s = splusb();
2755 usb_transfer_complete(xfer);
2756 splx(s);
2757 }
2758
2759 /* Close the root pipe. */
2760 Static void
2761 ohci_root_intr_close(usbd_pipe_handle pipe)
2762 {
2763 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2764
2765 DPRINTF(("ohci_root_intr_close\n"));
2766
2767 sc->sc_intrxfer = NULL;
2768 }
2769
2770 /************************/
2771
2772 Static usbd_status
2773 ohci_device_ctrl_transfer(usbd_xfer_handle xfer)
2774 {
2775 usbd_status err;
2776
2777 /* Insert last in queue. */
2778 err = usb_insert_transfer(xfer);
2779 if (err)
2780 return (err);
2781
2782 /* Pipe isn't running, start first */
2783 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2784 }
2785
2786 Static usbd_status
2787 ohci_device_ctrl_start(usbd_xfer_handle xfer)
2788 {
2789 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus;
2790 usbd_status err;
2791
2792 if (sc->sc_dying)
2793 return (USBD_IOERROR);
2794
2795 #ifdef DIAGNOSTIC
2796 if (!(xfer->rqflags & URQ_REQUEST)) {
2797 /* XXX panic */
2798 printf("ohci_device_ctrl_transfer: not a request\n");
2799 return (USBD_INVAL);
2800 }
2801 #endif
2802
2803 err = ohci_device_request(xfer);
2804 if (err)
2805 return (err);
2806
2807 if (sc->sc_bus.use_polling)
2808 ohci_waitintr(sc, xfer);
2809 return (USBD_IN_PROGRESS);
2810 }
2811
2812 /* Abort a device control request. */
2813 Static void
2814 ohci_device_ctrl_abort(usbd_xfer_handle xfer)
2815 {
2816 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer));
2817 ohci_abort_xfer(xfer, USBD_CANCELLED);
2818 }
2819
2820 /* Close a device control pipe. */
2821 Static void
2822 ohci_device_ctrl_close(usbd_pipe_handle pipe)
2823 {
2824 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2825 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2826
2827 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe));
2828 ohci_close_pipe(pipe, sc->sc_ctrl_head);
2829 ohci_free_std(sc, opipe->tail.td);
2830 }
2831
2832 /************************/
2833
2834 Static void
2835 ohci_device_clear_toggle(usbd_pipe_handle pipe)
2836 {
2837 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2838 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2839
2840 opipe->sed->ed.ed_headp &= HTOO32(~OHCI_TOGGLECARRY);
2841 }
2842
2843 Static void
2844 ohci_noop(usbd_pipe_handle pipe)
2845 {
2846 }
2847
2848 Static usbd_status
2849 ohci_device_bulk_transfer(usbd_xfer_handle xfer)
2850 {
2851 usbd_status err;
2852
2853 /* Insert last in queue. */
2854 err = usb_insert_transfer(xfer);
2855 if (err)
2856 return (err);
2857
2858 /* Pipe isn't running, start first */
2859 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2860 }
2861
2862 Static usbd_status
2863 ohci_device_bulk_start(usbd_xfer_handle xfer)
2864 {
2865 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
2866 usbd_device_handle dev = opipe->pipe.device;
2867 ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
2868 int addr = dev->address;
2869 ohci_soft_td_t *data, *tail, *tdp;
2870 ohci_soft_ed_t *sed;
2871 int s, len, isread, endpt;
2872 usbd_status err;
2873
2874 if (sc->sc_dying)
2875 return (USBD_IOERROR);
2876
2877 #ifdef DIAGNOSTIC
2878 if (xfer->rqflags & URQ_REQUEST) {
2879 /* XXX panic */
2880 printf("ohci_device_bulk_start: a request\n");
2881 return (USBD_INVAL);
2882 }
2883 #endif
2884
2885 len = xfer->length;
2886 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress;
2887 isread = UE_GET_DIR(endpt) == UE_DIR_IN;
2888 sed = opipe->sed;
2889
2890 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d "
2891 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags,
2892 endpt));
2893
2894 opipe->u.bulk.isread = isread;
2895 opipe->u.bulk.length = len;
2896
2897 /* Update device address */
2898 sed->ed.ed_flags = HTOO32(
2899 (O32TOH(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) |
2900 OHCI_ED_SET_FA(addr));
2901
2902 /* Allocate a chain of new TDs (including a new tail). */
2903 data = opipe->tail.td;
2904 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer,
2905 data, &tail);
2906 /* We want interrupt at the end of the transfer. */
2907 tail->td.td_flags &= HTOO32(~OHCI_TD_INTR_MASK);
2908 tail->td.td_flags |= HTOO32(OHCI_TD_SET_DI(1));
2909 tail->flags |= OHCI_CALL_DONE;
2910 tail = tail->nexttd; /* point at sentinel */
2911 if (err)
2912 return (err);
2913
2914 tail->xfer = NULL;
2915 xfer->hcpriv = data;
2916
2917 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x "
2918 "td_cbp=0x%08x td_be=0x%08x\n",
2919 (int)O32TOH(sed->ed.ed_flags),
2920 (int)O32TOH(data->td.td_flags),
2921 (int)O32TOH(data->td.td_cbp),
2922 (int)O32TOH(data->td.td_be)));
2923
2924 #ifdef OHCI_DEBUG
2925 if (ohcidebug > 5) {
2926 ohci_dump_ed(sc, sed);
2927 ohci_dump_tds(sc, data);
2928 }
2929 #endif
2930
2931 /* Insert ED in schedule */
2932 s = splusb();
2933 for (tdp = data; tdp != tail; tdp = tdp->nexttd) {
2934 tdp->xfer = xfer;
2935 }
2936 sed->ed.ed_tailp = HTOO32(tail->physaddr);
2937 opipe->tail.td = tail;
2938 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP);
2939 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
2940 if (xfer->timeout && !sc->sc_bus.use_polling) {
2941 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout),
2942 ohci_timeout, xfer);
2943 }
2944
2945 #if 0
2946 /* This goes wrong if we are too slow. */
2947 if (ohcidebug > 10) {
2948 delay(10000);
2949 DPRINTF(("ohci_device_intr_transfer: status=%x\n",
2950 OREAD4(sc, OHCI_COMMAND_STATUS)));
2951 ohci_dump_ed(sc, sed);
2952 ohci_dump_tds(sc, data);
2953 }
2954 #endif
2955
2956 splx(s);
2957
2958 return (USBD_IN_PROGRESS);
2959 }
2960
2961 Static void
2962 ohci_device_bulk_abort(usbd_xfer_handle xfer)
2963 {
2964 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer));
2965 ohci_abort_xfer(xfer, USBD_CANCELLED);
2966 }
2967
2968 /*
2969 * Close a device bulk pipe.
2970 */
2971 Static void
2972 ohci_device_bulk_close(usbd_pipe_handle pipe)
2973 {
2974 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2975 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2976
2977 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe));
2978 ohci_close_pipe(pipe, sc->sc_bulk_head);
2979 ohci_free_std(sc, opipe->tail.td);
2980 }
2981
2982 /************************/
2983
2984 Static usbd_status
2985 ohci_device_intr_transfer(usbd_xfer_handle xfer)
2986 {
2987 usbd_status err;
2988
2989 /* Insert last in queue. */
2990 err = usb_insert_transfer(xfer);
2991 if (err)
2992 return (err);
2993
2994 /* Pipe isn't running, start first */
2995 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2996 }
2997
2998 Static usbd_status
2999 ohci_device_intr_start(usbd_xfer_handle xfer)
3000 {
3001 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3002 usbd_device_handle dev = opipe->pipe.device;
3003 ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
3004 ohci_soft_ed_t *sed = opipe->sed;
3005 ohci_soft_td_t *data, *tail;
3006 int s, len, isread, endpt;
3007
3008 if (sc->sc_dying)
3009 return (USBD_IOERROR);
3010
3011 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d "
3012 "flags=%d priv=%p\n",
3013 xfer, xfer->length, xfer->flags, xfer->priv));
3014
3015 #ifdef DIAGNOSTIC
3016 if (xfer->rqflags & URQ_REQUEST)
3017 panic("ohci_device_intr_transfer: a request");
3018 #endif
3019
3020 len = xfer->length;
3021 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress;
3022 isread = UE_GET_DIR(endpt) == UE_DIR_IN;
3023
3024 data = opipe->tail.td;
3025 tail = ohci_alloc_std(sc);
3026 if (tail == NULL)
3027 return (USBD_NOMEM);
3028 tail->xfer = NULL;
3029
3030 data->td.td_flags = HTOO32(
3031 isread ? OHCI_TD_IN : OHCI_TD_OUT |
3032 OHCI_TD_NOCC |
3033 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
3034 if (xfer->flags & USBD_SHORT_XFER_OK)
3035 data->td.td_flags |= HTOO32(OHCI_TD_R);
3036 data->td.td_cbp = HTOO32(DMAADDR(&xfer->dmabuf, 0));
3037 data->nexttd = tail;
3038 data->td.td_nexttd = HTOO32(tail->physaddr);
3039 data->td.td_be = HTOO32(O32TOH(data->td.td_cbp) + len - 1);
3040 data->len = len;
3041 data->xfer = xfer;
3042 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
3043 xfer->hcpriv = data;
3044
3045 #ifdef OHCI_DEBUG
3046 if (ohcidebug > 5) {
3047 DPRINTF(("ohci_device_intr_transfer:\n"));
3048 ohci_dump_ed(sc, sed);
3049 ohci_dump_tds(sc, data);
3050 }
3051 #endif
3052
3053 /* Insert ED in schedule */
3054 s = splusb();
3055 sed->ed.ed_tailp = HTOO32(tail->physaddr);
3056 opipe->tail.td = tail;
3057 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP);
3058
3059 #if 0
3060 /*
3061 * This goes horribly wrong, printing thousands of descriptors,
3062 * because false references are followed due to the fact that the
3063 * TD is gone.
3064 */
3065 if (ohcidebug > 5) {
3066 usb_delay_ms(&sc->sc_bus, 5);
3067 DPRINTF(("ohci_device_intr_transfer: status=%x\n",
3068 OREAD4(sc, OHCI_COMMAND_STATUS)));
3069 ohci_dump_ed(sc, sed);
3070 ohci_dump_tds(sc, data);
3071 }
3072 #endif
3073 splx(s);
3074
3075 return (USBD_IN_PROGRESS);
3076 }
3077
3078 /* Abort a device control request. */
3079 Static void
3080 ohci_device_intr_abort(usbd_xfer_handle xfer)
3081 {
3082 if (xfer->pipe->intrxfer == xfer) {
3083 DPRINTF(("ohci_device_intr_abort: remove\n"));
3084 xfer->pipe->intrxfer = NULL;
3085 }
3086 ohci_abort_xfer(xfer, USBD_CANCELLED);
3087 }
3088
3089 /* Close a device interrupt pipe. */
3090 Static void
3091 ohci_device_intr_close(usbd_pipe_handle pipe)
3092 {
3093 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3094 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
3095 int nslots = opipe->u.intr.nslots;
3096 int pos = opipe->u.intr.pos;
3097 int j;
3098 ohci_soft_ed_t *p, *sed = opipe->sed;
3099 int s;
3100
3101 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n",
3102 pipe, nslots, pos));
3103 s = splusb();
3104 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
3105 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
3106 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK))
3107 usb_delay_ms(&sc->sc_bus, 2);
3108
3109 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next)
3110 continue;
3111 #ifdef DIAGNOSTIC
3112 if (p == NULL)
3113 panic("ohci_device_intr_close: ED not found");
3114 #endif
3115 p->next = sed->next;
3116 p->ed.ed_nexted = sed->ed.ed_nexted;
3117 splx(s);
3118
3119 for (j = 0; j < nslots; j++)
3120 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS];
3121
3122 ohci_free_std(sc, opipe->tail.td);
3123 ohci_free_sed(sc, opipe->sed);
3124 }
3125
3126 Static usbd_status
3127 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival)
3128 {
3129 int i, j, s, best;
3130 u_int npoll, slow, shigh, nslots;
3131 u_int bestbw, bw;
3132 ohci_soft_ed_t *hsed, *sed = opipe->sed;
3133
3134 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe));
3135 if (ival == 0) {
3136 printf("ohci_setintr: 0 interval\n");
3137 return (USBD_INVAL);
3138 }
3139
3140 npoll = OHCI_NO_INTRS;
3141 while (npoll > ival)
3142 npoll /= 2;
3143 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll));
3144
3145 /*
3146 * We now know which level in the tree the ED must go into.
3147 * Figure out which slot has most bandwidth left over.
3148 * Slots to examine:
3149 * npoll
3150 * 1 0
3151 * 2 1 2
3152 * 4 3 4 5 6
3153 * 8 7 8 9 10 11 12 13 14
3154 * N (N-1) .. (N-1+N-1)
3155 */
3156 slow = npoll-1;
3157 shigh = slow + npoll;
3158 nslots = OHCI_NO_INTRS / npoll;
3159 for (best = i = slow, bestbw = ~0; i < shigh; i++) {
3160 bw = 0;
3161 for (j = 0; j < nslots; j++)
3162 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS];
3163 if (bw < bestbw) {
3164 best = i;
3165 bestbw = bw;
3166 }
3167 }
3168 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n",
3169 best, slow, shigh, bestbw));
3170
3171 s = splusb();
3172 hsed = sc->sc_eds[best];
3173 sed->next = hsed->next;
3174 sed->ed.ed_nexted = hsed->ed.ed_nexted;
3175 hsed->next = sed;
3176 hsed->ed.ed_nexted = HTOO32(sed->physaddr);
3177 splx(s);
3178
3179 for (j = 0; j < nslots; j++)
3180 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS];
3181 opipe->u.intr.nslots = nslots;
3182 opipe->u.intr.pos = best;
3183
3184 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe));
3185 return (USBD_NORMAL_COMPLETION);
3186 }
3187
3188 /***********************/
3189
3190 usbd_status
3191 ohci_device_isoc_transfer(usbd_xfer_handle xfer)
3192 {
3193 usbd_status err;
3194
3195 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer));
3196
3197 /* Put it on our queue, */
3198 err = usb_insert_transfer(xfer);
3199
3200 /* bail out on error, */
3201 if (err && err != USBD_IN_PROGRESS)
3202 return (err);
3203
3204 /* XXX should check inuse here */
3205
3206 /* insert into schedule, */
3207 ohci_device_isoc_enter(xfer);
3208
3209 /* and start if the pipe wasn't running */
3210 if (!err)
3211 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue));
3212
3213 return (err);
3214 }
3215
3216 void
3217 ohci_device_isoc_enter(usbd_xfer_handle xfer)
3218 {
3219 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3220 usbd_device_handle dev = opipe->pipe.device;
3221 ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
3222 ohci_soft_ed_t *sed = opipe->sed;
3223 struct iso *iso = &opipe->u.iso;
3224 ohci_soft_itd_t *sitd, *nsitd;
3225 ohci_physaddr_t buf, offs, noffs, bp0;
3226 int i, ncur, nframes;
3227 int s;
3228
3229 DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p "
3230 "nframes=%d\n",
3231 iso->inuse, iso->next, xfer, xfer->nframes));
3232
3233 if (sc->sc_dying)
3234 return;
3235
3236 if (iso->next == -1) {
3237 /* Not in use yet, schedule it a few frames ahead. */
3238 iso->next = O32TOH(sc->sc_hcca->hcca_frame_number) + 5;
3239 DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n",
3240 iso->next));
3241 }
3242
3243 sitd = opipe->tail.itd;
3244 buf = DMAADDR(&xfer->dmabuf, 0);
3245 bp0 = OHCI_PAGE(buf);
3246 offs = OHCI_PAGE_OFFSET(buf);
3247 nframes = xfer->nframes;
3248 xfer->hcpriv = sitd;
3249 for (i = ncur = 0; i < nframes; i++, ncur++) {
3250 noffs = offs + xfer->frlengths[i];
3251 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */
3252 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */
3253
3254 /* Allocate next ITD */
3255 nsitd = ohci_alloc_sitd(sc);
3256 if (nsitd == NULL) {
3257 /* XXX what now? */
3258 printf("%s: isoc TD alloc failed\n",
3259 USBDEVNAME(sc->sc_bus.bdev));
3260 return;
3261 }
3262
3263 /* Fill current ITD */
3264 sitd->itd.itd_flags = HTOO32(
3265 OHCI_ITD_NOCC |
3266 OHCI_ITD_SET_SF(iso->next) |
3267 OHCI_ITD_SET_DI(6) | /* delay intr a little */
3268 OHCI_ITD_SET_FC(ncur));
3269 sitd->itd.itd_bp0 = HTOO32(bp0);
3270 sitd->nextitd = nsitd;
3271 sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr);
3272 sitd->itd.itd_be = HTOO32(bp0 + offs - 1);
3273 sitd->xfer = xfer;
3274 sitd->flags = 0;
3275
3276 sitd = nsitd;
3277 iso->next = iso->next + ncur;
3278 bp0 = OHCI_PAGE(buf + offs);
3279 ncur = 0;
3280 }
3281 sitd->itd.itd_offset[ncur] = HTOO16(OHCI_ITD_MK_OFFS(offs));
3282 offs = noffs;
3283 }
3284 nsitd = ohci_alloc_sitd(sc);
3285 if (nsitd == NULL) {
3286 /* XXX what now? */
3287 printf("%s: isoc TD alloc failed\n",
3288 USBDEVNAME(sc->sc_bus.bdev));
3289 return;
3290 }
3291 /* Fixup last used ITD */
3292 sitd->itd.itd_flags = HTOO32(
3293 OHCI_ITD_NOCC |
3294 OHCI_ITD_SET_SF(iso->next) |
3295 OHCI_ITD_SET_DI(0) |
3296 OHCI_ITD_SET_FC(ncur));
3297 sitd->itd.itd_bp0 = HTOO32(bp0);
3298 sitd->nextitd = nsitd;
3299 sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr);
3300 sitd->itd.itd_be = HTOO32(bp0 + offs - 1);
3301 sitd->xfer = xfer;
3302 sitd->flags = OHCI_CALL_DONE;
3303
3304 iso->next = iso->next + ncur;
3305 iso->inuse += nframes;
3306
3307 xfer->actlen = offs; /* XXX pretend we did it all */
3308
3309 xfer->status = USBD_IN_PROGRESS;
3310
3311 #ifdef OHCI_DEBUG
3312 if (ohcidebug > 5) {
3313 DPRINTF(("ohci_device_isoc_enter: frame=%d\n",
3314 O32TOH(sc->sc_hcca->hcca_frame_number)));
3315 ohci_dump_itds(sc, xfer->hcpriv);
3316 ohci_dump_ed(sc, sed);
3317 }
3318 #endif
3319
3320 s = splusb();
3321 sed->ed.ed_tailp = HTOO32(nsitd->physaddr);
3322 opipe->tail.itd = nsitd;
3323 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP);
3324 splx(s);
3325
3326 #ifdef OHCI_DEBUG
3327 if (ohcidebug > 5) {
3328 delay(150000);
3329 DPRINTF(("ohci_device_isoc_enter: after frame=%d\n",
3330 O32TOH(sc->sc_hcca->hcca_frame_number)));
3331 ohci_dump_itds(sc, xfer->hcpriv);
3332 ohci_dump_ed(sc, sed);
3333 }
3334 #endif
3335 }
3336
3337 usbd_status
3338 ohci_device_isoc_start(usbd_xfer_handle xfer)
3339 {
3340 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3341 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
3342
3343 DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer));
3344
3345 if (sc->sc_dying)
3346 return (USBD_IOERROR);
3347
3348 #ifdef DIAGNOSTIC
3349 if (xfer->status != USBD_IN_PROGRESS)
3350 printf("ohci_device_isoc_start: not in progress %p\n", xfer);
3351 #endif
3352
3353 /* XXX anything to do? */
3354
3355 return (USBD_IN_PROGRESS);
3356 }
3357
3358 void
3359 ohci_device_isoc_abort(usbd_xfer_handle xfer)
3360 {
3361 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3362 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
3363 ohci_soft_ed_t *sed;
3364 ohci_soft_itd_t *sitd;
3365 int s;
3366
3367 s = splusb();
3368
3369 DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer));
3370
3371 /* Transfer is already done. */
3372 if (xfer->status != USBD_NOT_STARTED &&
3373 xfer->status != USBD_IN_PROGRESS) {
3374 splx(s);
3375 printf("ohci_device_isoc_abort: early return\n");
3376 return;
3377 }
3378
3379 /* Give xfer the requested abort code. */
3380 xfer->status = USBD_CANCELLED;
3381
3382 sed = opipe->sed;
3383 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */
3384
3385 sitd = xfer->hcpriv;
3386 #ifdef DIAGNOSTIC
3387 if (sitd == NULL) {
3388 splx(s);
3389 printf("ohci_device_isoc_abort: hcpriv==0\n");
3390 return;
3391 }
3392 #endif
3393 for (; sitd->xfer == xfer; sitd = sitd->nextitd) {
3394 #ifdef DIAGNOSTIC
3395 DPRINTFN(1,("abort sets done sitd=%p\n", sitd));
3396 sitd->isdone = 1;
3397 #endif
3398 }
3399
3400 splx(s);
3401
3402 usb_delay_ms(&sc->sc_bus, OHCI_ITD_NOFFSET);
3403
3404 s = splusb();
3405
3406 /* Run callback. */
3407 usb_transfer_complete(xfer);
3408
3409 sed->ed.ed_headp = HTOO32(sitd->physaddr); /* unlink TDs */
3410 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */
3411
3412 splx(s);
3413 }
3414
3415 void
3416 ohci_device_isoc_done(usbd_xfer_handle xfer)
3417 {
3418 DPRINTFN(1,("ohci_device_isoc_done: xfer=%p\n", xfer));
3419 }
3420
3421 usbd_status
3422 ohci_setup_isoc(usbd_pipe_handle pipe)
3423 {
3424 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3425 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
3426 struct iso *iso = &opipe->u.iso;
3427 int s;
3428
3429 iso->next = -1;
3430 iso->inuse = 0;
3431
3432 s = splusb();
3433 ohci_add_ed(sc, opipe->sed, sc->sc_isoc_head);
3434 splx(s);
3435
3436 return (USBD_NORMAL_COMPLETION);
3437 }
3438
3439 void
3440 ohci_device_isoc_close(usbd_pipe_handle pipe)
3441 {
3442 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3443 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
3444
3445 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe));
3446 ohci_close_pipe(pipe, sc->sc_isoc_head);
3447 #ifdef DIAGNOSTIC
3448 opipe->tail.itd->isdone = 1;
3449 #endif
3450 ohci_free_sitd(sc, opipe->tail.itd);
3451 }
3452