ohci.c revision 1.176
1 /* $NetBSD: ohci.c,v 1.176 2006/09/24 03:54:00 jmcneill Exp $ */ 2 /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */ 3 4 /* 5 * Copyright (c) 1998, 2004, 2005 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Lennart Augustsson (lennart (at) augustsson.net) at 10 * Carlstedt Research & Technology. 11 * This code is derived from software contributed to The NetBSD Foundation 12 * by Charles M. Hannum. 13 * 14 * Redistribution and use in source and binary forms, with or without 15 * modification, are permitted provided that the following conditions 16 * are met: 17 * 1. Redistributions of source code must retain the above copyright 18 * notice, this list of conditions and the following disclaimer. 19 * 2. Redistributions in binary form must reproduce the above copyright 20 * notice, this list of conditions and the following disclaimer in the 21 * documentation and/or other materials provided with the distribution. 22 * 3. All advertising materials mentioning features or use of this software 23 * must display the following acknowledgement: 24 * This product includes software developed by the NetBSD 25 * Foundation, Inc. and its contributors. 26 * 4. Neither the name of The NetBSD Foundation nor the names of its 27 * contributors may be used to endorse or promote products derived 28 * from this software without specific prior written permission. 29 * 30 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 31 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 32 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 33 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 34 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 35 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 36 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 37 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 38 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 39 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 40 * POSSIBILITY OF SUCH DAMAGE. 41 */ 42 43 /* 44 * USB Open Host Controller driver. 45 * 46 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html 47 * USB spec: http://www.usb.org/developers/docs/usbspec.zip 48 */ 49 50 #include <sys/cdefs.h> 51 __KERNEL_RCSID(0, "$NetBSD: ohci.c,v 1.176 2006/09/24 03:54:00 jmcneill Exp $"); 52 53 #include <sys/param.h> 54 #include <sys/systm.h> 55 #include <sys/malloc.h> 56 #if defined(__NetBSD__) || defined(__OpenBSD__) 57 #include <sys/kernel.h> 58 #include <sys/device.h> 59 #include <sys/select.h> 60 #include <uvm/uvm_extern.h> 61 #elif defined(__FreeBSD__) 62 #include <sys/module.h> 63 #include <sys/bus.h> 64 #include <machine/bus_pio.h> 65 #include <machine/bus_memio.h> 66 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 67 #include <machine/cpu.h> 68 #endif 69 #endif 70 #include <sys/proc.h> 71 #include <sys/queue.h> 72 73 #include <machine/bus.h> 74 #include <machine/endian.h> 75 76 #include <dev/usb/usb.h> 77 #include <dev/usb/usbdi.h> 78 #include <dev/usb/usbdivar.h> 79 #include <dev/usb/usb_mem.h> 80 #include <dev/usb/usb_quirks.h> 81 82 #include <dev/usb/ohcireg.h> 83 #include <dev/usb/ohcivar.h> 84 85 #if defined(__FreeBSD__) 86 #include <machine/clock.h> 87 88 #define delay(d) DELAY(d) 89 #endif 90 91 #if defined(__OpenBSD__) 92 struct cfdriver ohci_cd = { 93 NULL, "ohci", DV_DULL 94 }; 95 #endif 96 97 #ifdef OHCI_DEBUG 98 #define DPRINTF(x) if (ohcidebug) logprintf x 99 #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x 100 int ohcidebug = 0; 101 #ifndef __NetBSD__ 102 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 103 #endif 104 #else 105 #define DPRINTF(x) 106 #define DPRINTFN(n,x) 107 #endif 108 109 #if BYTE_ORDER == BIG_ENDIAN 110 #define SWAP_ENDIAN OHCI_LITTLE_ENDIAN 111 #else 112 #define SWAP_ENDIAN OHCI_BIG_ENDIAN 113 #endif 114 115 #define O16TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap16(val) : val) 116 #define O32TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap32(val) : val) 117 #define HTOO16(val) O16TOH(val) 118 #define HTOO32(val) O32TOH(val) 119 120 struct ohci_pipe; 121 122 Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *); 123 Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *); 124 125 Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *); 126 Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *); 127 128 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *); 129 Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *); 130 131 #if 0 132 Static void ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *, 133 ohci_soft_td_t *); 134 #endif 135 Static usbd_status ohci_alloc_std_chain(struct ohci_pipe *, 136 ohci_softc_t *, int, int, usbd_xfer_handle, 137 ohci_soft_td_t *, ohci_soft_td_t **); 138 139 Static void ohci_shutdown(void *v); 140 Static void ohci_power(int, void *); 141 Static usbd_status ohci_open(usbd_pipe_handle); 142 Static void ohci_poll(struct usbd_bus *); 143 Static void ohci_softintr(void *); 144 Static void ohci_waitintr(ohci_softc_t *, usbd_xfer_handle); 145 Static void ohci_rhsc(ohci_softc_t *, usbd_xfer_handle); 146 147 Static usbd_status ohci_device_request(usbd_xfer_handle xfer); 148 Static void ohci_add_ed(ohci_softc_t *, ohci_soft_ed_t *, 149 ohci_soft_ed_t *); 150 151 Static void ohci_rem_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 152 Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *); 153 Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *); 154 Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t); 155 Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *); 156 Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *); 157 Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t); 158 159 Static usbd_status ohci_setup_isoc(usbd_pipe_handle pipe); 160 Static void ohci_device_isoc_enter(usbd_xfer_handle); 161 162 Static usbd_status ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 163 Static void ohci_freem(struct usbd_bus *, usb_dma_t *); 164 165 Static usbd_xfer_handle ohci_allocx(struct usbd_bus *); 166 Static void ohci_freex(struct usbd_bus *, usbd_xfer_handle); 167 168 Static usbd_status ohci_root_ctrl_transfer(usbd_xfer_handle); 169 Static usbd_status ohci_root_ctrl_start(usbd_xfer_handle); 170 Static void ohci_root_ctrl_abort(usbd_xfer_handle); 171 Static void ohci_root_ctrl_close(usbd_pipe_handle); 172 Static void ohci_root_ctrl_done(usbd_xfer_handle); 173 174 Static usbd_status ohci_root_intr_transfer(usbd_xfer_handle); 175 Static usbd_status ohci_root_intr_start(usbd_xfer_handle); 176 Static void ohci_root_intr_abort(usbd_xfer_handle); 177 Static void ohci_root_intr_close(usbd_pipe_handle); 178 Static void ohci_root_intr_done(usbd_xfer_handle); 179 180 Static usbd_status ohci_device_ctrl_transfer(usbd_xfer_handle); 181 Static usbd_status ohci_device_ctrl_start(usbd_xfer_handle); 182 Static void ohci_device_ctrl_abort(usbd_xfer_handle); 183 Static void ohci_device_ctrl_close(usbd_pipe_handle); 184 Static void ohci_device_ctrl_done(usbd_xfer_handle); 185 186 Static usbd_status ohci_device_bulk_transfer(usbd_xfer_handle); 187 Static usbd_status ohci_device_bulk_start(usbd_xfer_handle); 188 Static void ohci_device_bulk_abort(usbd_xfer_handle); 189 Static void ohci_device_bulk_close(usbd_pipe_handle); 190 Static void ohci_device_bulk_done(usbd_xfer_handle); 191 192 Static usbd_status ohci_device_intr_transfer(usbd_xfer_handle); 193 Static usbd_status ohci_device_intr_start(usbd_xfer_handle); 194 Static void ohci_device_intr_abort(usbd_xfer_handle); 195 Static void ohci_device_intr_close(usbd_pipe_handle); 196 Static void ohci_device_intr_done(usbd_xfer_handle); 197 198 Static usbd_status ohci_device_isoc_transfer(usbd_xfer_handle); 199 Static usbd_status ohci_device_isoc_start(usbd_xfer_handle); 200 Static void ohci_device_isoc_abort(usbd_xfer_handle); 201 Static void ohci_device_isoc_close(usbd_pipe_handle); 202 Static void ohci_device_isoc_done(usbd_xfer_handle); 203 204 Static usbd_status ohci_device_setintr(ohci_softc_t *sc, 205 struct ohci_pipe *pipe, int ival); 206 207 Static int ohci_str(usb_string_descriptor_t *, int, const char *); 208 209 Static void ohci_timeout(void *); 210 Static void ohci_timeout_task(void *); 211 Static void ohci_rhsc_enable(void *); 212 213 Static void ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *); 214 Static void ohci_abort_xfer(usbd_xfer_handle, usbd_status); 215 216 Static void ohci_device_clear_toggle(usbd_pipe_handle pipe); 217 Static void ohci_noop(usbd_pipe_handle pipe); 218 219 #ifdef OHCI_DEBUG 220 Static void ohci_dumpregs(ohci_softc_t *); 221 Static void ohci_dump_tds(ohci_softc_t *, ohci_soft_td_t *); 222 Static void ohci_dump_td(ohci_softc_t *, ohci_soft_td_t *); 223 Static void ohci_dump_ed(ohci_softc_t *, ohci_soft_ed_t *); 224 Static void ohci_dump_itd(ohci_softc_t *, ohci_soft_itd_t *); 225 Static void ohci_dump_itds(ohci_softc_t *, ohci_soft_itd_t *); 226 #endif 227 228 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 229 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 230 #define OWRITE1(sc, r, x) \ 231 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 232 #define OWRITE2(sc, r, x) \ 233 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 234 #define OWRITE4(sc, r, x) \ 235 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 236 static __inline uint8_t 237 OREAD1(ohci_softc_t *sc, bus_size_t r) 238 { 239 240 OBARR(sc); 241 return bus_space_read_1(sc->iot, sc->ioh, r); 242 } 243 244 static __inline uint16_t 245 OREAD2(ohci_softc_t *sc, bus_size_t r) 246 { 247 248 OBARR(sc); 249 return bus_space_read_2(sc->iot, sc->ioh, r); 250 } 251 252 static __inline uint32_t 253 OREAD4(ohci_softc_t *sc, bus_size_t r) 254 { 255 256 OBARR(sc); 257 return bus_space_read_4(sc->iot, sc->ioh, r); 258 } 259 260 /* Reverse the bits in a value 0 .. 31 */ 261 Static u_int8_t revbits[OHCI_NO_INTRS] = 262 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 263 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 264 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 265 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 266 267 struct ohci_pipe { 268 struct usbd_pipe pipe; 269 ohci_soft_ed_t *sed; 270 union { 271 ohci_soft_td_t *td; 272 ohci_soft_itd_t *itd; 273 } tail; 274 /* Info needed for different pipe kinds. */ 275 union { 276 /* Control pipe */ 277 struct { 278 usb_dma_t reqdma; 279 u_int length; 280 ohci_soft_td_t *setup, *data, *stat; 281 } ctl; 282 /* Interrupt pipe */ 283 struct { 284 int nslots; 285 int pos; 286 } intr; 287 /* Bulk pipe */ 288 struct { 289 u_int length; 290 int isread; 291 } bulk; 292 /* Iso pipe */ 293 struct iso { 294 int next, inuse; 295 } iso; 296 } u; 297 }; 298 299 #define OHCI_INTR_ENDPT 1 300 301 Static struct usbd_bus_methods ohci_bus_methods = { 302 ohci_open, 303 ohci_softintr, 304 ohci_poll, 305 ohci_allocm, 306 ohci_freem, 307 ohci_allocx, 308 ohci_freex, 309 }; 310 311 Static struct usbd_pipe_methods ohci_root_ctrl_methods = { 312 ohci_root_ctrl_transfer, 313 ohci_root_ctrl_start, 314 ohci_root_ctrl_abort, 315 ohci_root_ctrl_close, 316 ohci_noop, 317 ohci_root_ctrl_done, 318 }; 319 320 Static struct usbd_pipe_methods ohci_root_intr_methods = { 321 ohci_root_intr_transfer, 322 ohci_root_intr_start, 323 ohci_root_intr_abort, 324 ohci_root_intr_close, 325 ohci_noop, 326 ohci_root_intr_done, 327 }; 328 329 Static struct usbd_pipe_methods ohci_device_ctrl_methods = { 330 ohci_device_ctrl_transfer, 331 ohci_device_ctrl_start, 332 ohci_device_ctrl_abort, 333 ohci_device_ctrl_close, 334 ohci_noop, 335 ohci_device_ctrl_done, 336 }; 337 338 Static struct usbd_pipe_methods ohci_device_intr_methods = { 339 ohci_device_intr_transfer, 340 ohci_device_intr_start, 341 ohci_device_intr_abort, 342 ohci_device_intr_close, 343 ohci_device_clear_toggle, 344 ohci_device_intr_done, 345 }; 346 347 Static struct usbd_pipe_methods ohci_device_bulk_methods = { 348 ohci_device_bulk_transfer, 349 ohci_device_bulk_start, 350 ohci_device_bulk_abort, 351 ohci_device_bulk_close, 352 ohci_device_clear_toggle, 353 ohci_device_bulk_done, 354 }; 355 356 Static struct usbd_pipe_methods ohci_device_isoc_methods = { 357 ohci_device_isoc_transfer, 358 ohci_device_isoc_start, 359 ohci_device_isoc_abort, 360 ohci_device_isoc_close, 361 ohci_noop, 362 ohci_device_isoc_done, 363 }; 364 365 #if defined(__NetBSD__) || defined(__OpenBSD__) 366 int 367 ohci_activate(device_ptr_t self, enum devact act) 368 { 369 struct ohci_softc *sc = (struct ohci_softc *)self; 370 int rv = 0; 371 372 switch (act) { 373 case DVACT_ACTIVATE: 374 return (EOPNOTSUPP); 375 376 case DVACT_DEACTIVATE: 377 if (sc->sc_child != NULL) 378 rv = config_deactivate(sc->sc_child); 379 sc->sc_dying = 1; 380 break; 381 } 382 return (rv); 383 } 384 385 int 386 ohci_detach(struct ohci_softc *sc, int flags) 387 { 388 int rv = 0; 389 390 if (sc->sc_child != NULL) 391 rv = config_detach(sc->sc_child, flags); 392 393 if (rv != 0) 394 return (rv); 395 396 usb_uncallout(sc->sc_tmo_rhsc, ohci_rhsc_enable, sc); 397 398 #if defined(__NetBSD__) || defined(__OpenBSD__) 399 powerhook_disestablish(sc->sc_powerhook); 400 shutdownhook_disestablish(sc->sc_shutdownhook); 401 #endif 402 403 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 404 405 /* free data structures XXX */ 406 407 return (rv); 408 } 409 #endif 410 411 ohci_soft_ed_t * 412 ohci_alloc_sed(ohci_softc_t *sc) 413 { 414 ohci_soft_ed_t *sed; 415 usbd_status err; 416 int i, offs; 417 usb_dma_t dma; 418 419 if (sc->sc_freeeds == NULL) { 420 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 421 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 422 OHCI_ED_ALIGN, &dma); 423 if (err) 424 return (0); 425 for(i = 0; i < OHCI_SED_CHUNK; i++) { 426 offs = i * OHCI_SED_SIZE; 427 sed = KERNADDR(&dma, offs); 428 sed->physaddr = DMAADDR(&dma, offs); 429 sed->next = sc->sc_freeeds; 430 sc->sc_freeeds = sed; 431 } 432 } 433 sed = sc->sc_freeeds; 434 sc->sc_freeeds = sed->next; 435 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 436 sed->next = 0; 437 return (sed); 438 } 439 440 void 441 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 442 { 443 sed->next = sc->sc_freeeds; 444 sc->sc_freeeds = sed; 445 } 446 447 ohci_soft_td_t * 448 ohci_alloc_std(ohci_softc_t *sc) 449 { 450 ohci_soft_td_t *std; 451 usbd_status err; 452 int i, offs; 453 usb_dma_t dma; 454 int s; 455 456 if (sc->sc_freetds == NULL) { 457 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 458 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 459 OHCI_TD_ALIGN, &dma); 460 if (err) 461 return (NULL); 462 s = splusb(); 463 for(i = 0; i < OHCI_STD_CHUNK; i++) { 464 offs = i * OHCI_STD_SIZE; 465 std = KERNADDR(&dma, offs); 466 std->physaddr = DMAADDR(&dma, offs); 467 std->nexttd = sc->sc_freetds; 468 sc->sc_freetds = std; 469 } 470 splx(s); 471 } 472 473 s = splusb(); 474 std = sc->sc_freetds; 475 sc->sc_freetds = std->nexttd; 476 memset(&std->td, 0, sizeof(ohci_td_t)); 477 std->nexttd = NULL; 478 std->xfer = NULL; 479 ohci_hash_add_td(sc, std); 480 splx(s); 481 482 return (std); 483 } 484 485 void 486 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std) 487 { 488 int s; 489 490 s = splusb(); 491 ohci_hash_rem_td(sc, std); 492 std->nexttd = sc->sc_freetds; 493 sc->sc_freetds = std; 494 splx(s); 495 } 496 497 usbd_status 498 ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc, 499 int alen, int rd, usbd_xfer_handle xfer, 500 ohci_soft_td_t *sp, ohci_soft_td_t **ep) 501 { 502 ohci_soft_td_t *next, *cur; 503 ohci_physaddr_t dataphys, dataphysend; 504 u_int32_t tdflags; 505 int len, curlen; 506 usb_dma_t *dma = &xfer->dmabuf; 507 u_int16_t flags = xfer->flags; 508 509 DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen)); 510 511 len = alen; 512 cur = sp; 513 dataphys = DMAADDR(dma, 0); 514 dataphysend = OHCI_PAGE(dataphys + len - 1); 515 tdflags = HTOO32( 516 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 517 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) | 518 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR); 519 520 for (;;) { 521 next = ohci_alloc_std(sc); 522 if (next == NULL) 523 goto nomem; 524 525 /* The OHCI hardware can handle at most one page crossing. */ 526 if (OHCI_PAGE(dataphys) == dataphysend || 527 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) { 528 /* we can handle it in this TD */ 529 curlen = len; 530 } else { 531 /* must use multiple TDs, fill as much as possible. */ 532 curlen = 2 * OHCI_PAGE_SIZE - 533 (dataphys & (OHCI_PAGE_SIZE-1)); 534 /* the length must be a multiple of the max size */ 535 curlen -= curlen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize); 536 #ifdef DIAGNOSTIC 537 if (curlen == 0) 538 panic("ohci_alloc_std: curlen == 0"); 539 #endif 540 } 541 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x " 542 "dataphysend=0x%08x len=%d curlen=%d\n", 543 dataphys, dataphysend, 544 len, curlen)); 545 len -= curlen; 546 547 cur->td.td_flags = tdflags; 548 cur->td.td_cbp = HTOO32(dataphys); 549 cur->nexttd = next; 550 cur->td.td_nexttd = HTOO32(next->physaddr); 551 cur->td.td_be = HTOO32(dataphys + curlen - 1); 552 cur->len = curlen; 553 cur->flags = OHCI_ADD_LEN; 554 cur->xfer = xfer; 555 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n", 556 dataphys, dataphys + curlen - 1)); 557 if (len == 0) 558 break; 559 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n")); 560 dataphys += curlen; 561 cur = next; 562 } 563 if (!rd && (flags & USBD_FORCE_SHORT_XFER) && 564 alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) { 565 /* Force a 0 length transfer at the end. */ 566 567 cur = next; 568 next = ohci_alloc_std(sc); 569 if (next == NULL) 570 goto nomem; 571 572 cur->td.td_flags = tdflags; 573 cur->td.td_cbp = 0; /* indicate 0 length packet */ 574 cur->nexttd = next; 575 cur->td.td_nexttd = HTOO32(next->physaddr); 576 cur->td.td_be = ~0; 577 cur->len = 0; 578 cur->flags = 0; 579 cur->xfer = xfer; 580 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n")); 581 } 582 *ep = cur; 583 584 return (USBD_NORMAL_COMPLETION); 585 586 nomem: 587 /* XXX free chain */ 588 return (USBD_NOMEM); 589 } 590 591 #if 0 592 Static void 593 ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std, 594 ohci_soft_td_t *stdend) 595 { 596 ohci_soft_td_t *p; 597 598 for (; std != stdend; std = p) { 599 p = std->nexttd; 600 ohci_free_std(sc, std); 601 } 602 } 603 #endif 604 605 ohci_soft_itd_t * 606 ohci_alloc_sitd(ohci_softc_t *sc) 607 { 608 ohci_soft_itd_t *sitd; 609 usbd_status err; 610 int i, s, offs; 611 usb_dma_t dma; 612 613 if (sc->sc_freeitds == NULL) { 614 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n")); 615 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK, 616 OHCI_ITD_ALIGN, &dma); 617 if (err) 618 return (NULL); 619 s = splusb(); 620 for(i = 0; i < OHCI_SITD_CHUNK; i++) { 621 offs = i * OHCI_SITD_SIZE; 622 sitd = KERNADDR(&dma, offs); 623 sitd->physaddr = DMAADDR(&dma, offs); 624 sitd->nextitd = sc->sc_freeitds; 625 sc->sc_freeitds = sitd; 626 } 627 splx(s); 628 } 629 630 s = splusb(); 631 sitd = sc->sc_freeitds; 632 sc->sc_freeitds = sitd->nextitd; 633 memset(&sitd->itd, 0, sizeof(ohci_itd_t)); 634 sitd->nextitd = NULL; 635 sitd->xfer = NULL; 636 ohci_hash_add_itd(sc, sitd); 637 splx(s); 638 639 #ifdef DIAGNOSTIC 640 sitd->isdone = 0; 641 #endif 642 643 return (sitd); 644 } 645 646 void 647 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 648 { 649 int s; 650 651 DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd)); 652 653 #ifdef DIAGNOSTIC 654 if (!sitd->isdone) { 655 panic("ohci_free_sitd: sitd=%p not done", sitd); 656 return; 657 } 658 /* Warn double free */ 659 sitd->isdone = 0; 660 #endif 661 662 s = splusb(); 663 ohci_hash_rem_itd(sc, sitd); 664 sitd->nextitd = sc->sc_freeitds; 665 sc->sc_freeitds = sitd; 666 splx(s); 667 } 668 669 usbd_status 670 ohci_init(ohci_softc_t *sc) 671 { 672 ohci_soft_ed_t *sed, *psed; 673 usbd_status err; 674 int i; 675 u_int32_t s, ctl, rwc, ival, hcr, fm, per, rev, desca, descb; 676 677 DPRINTF(("ohci_init: start\n")); 678 #if defined(__OpenBSD__) 679 printf(","); 680 #else 681 printf("%s:", USBDEVNAME(sc->sc_bus.bdev)); 682 #endif 683 rev = OREAD4(sc, OHCI_REVISION); 684 printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev), 685 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 686 687 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 688 printf("%s: unsupported OHCI revision\n", 689 USBDEVNAME(sc->sc_bus.bdev)); 690 sc->sc_bus.usbrev = USBREV_UNKNOWN; 691 return (USBD_INVAL); 692 } 693 sc->sc_bus.usbrev = USBREV_1_0; 694 695 for (i = 0; i < OHCI_HASH_SIZE; i++) 696 LIST_INIT(&sc->sc_hash_tds[i]); 697 for (i = 0; i < OHCI_HASH_SIZE; i++) 698 LIST_INIT(&sc->sc_hash_itds[i]); 699 700 SIMPLEQ_INIT(&sc->sc_free_xfers); 701 702 #ifdef __NetBSD__ 703 usb_setup_reserve(sc, &sc->sc_dma_reserve, sc->sc_bus.dmatag, 704 USB_MEM_RESERVE); 705 #endif 706 707 /* XXX determine alignment by R/W */ 708 /* Allocate the HCCA area. */ 709 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 710 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 711 if (err) 712 return (err); 713 sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0); 714 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 715 716 sc->sc_eintrs = OHCI_NORMAL_INTRS; 717 718 /* Allocate dummy ED that starts the control list. */ 719 sc->sc_ctrl_head = ohci_alloc_sed(sc); 720 if (sc->sc_ctrl_head == NULL) { 721 err = USBD_NOMEM; 722 goto bad1; 723 } 724 sc->sc_ctrl_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 725 726 /* Allocate dummy ED that starts the bulk list. */ 727 sc->sc_bulk_head = ohci_alloc_sed(sc); 728 if (sc->sc_bulk_head == NULL) { 729 err = USBD_NOMEM; 730 goto bad2; 731 } 732 sc->sc_bulk_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 733 734 /* Allocate dummy ED that starts the isochronous list. */ 735 sc->sc_isoc_head = ohci_alloc_sed(sc); 736 if (sc->sc_isoc_head == NULL) { 737 err = USBD_NOMEM; 738 goto bad3; 739 } 740 sc->sc_isoc_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 741 742 /* Allocate all the dummy EDs that make up the interrupt tree. */ 743 for (i = 0; i < OHCI_NO_EDS; i++) { 744 sed = ohci_alloc_sed(sc); 745 if (sed == NULL) { 746 while (--i >= 0) 747 ohci_free_sed(sc, sc->sc_eds[i]); 748 err = USBD_NOMEM; 749 goto bad4; 750 } 751 /* All ED fields are set to 0. */ 752 sc->sc_eds[i] = sed; 753 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 754 if (i != 0) 755 psed = sc->sc_eds[(i-1) / 2]; 756 else 757 psed= sc->sc_isoc_head; 758 sed->next = psed; 759 sed->ed.ed_nexted = HTOO32(psed->physaddr); 760 } 761 /* 762 * Fill HCCA interrupt table. The bit reversal is to get 763 * the tree set up properly to spread the interrupts. 764 */ 765 for (i = 0; i < OHCI_NO_INTRS; i++) 766 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 767 HTOO32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 768 769 #ifdef OHCI_DEBUG 770 if (ohcidebug > 15) { 771 for (i = 0; i < OHCI_NO_EDS; i++) { 772 printf("ed#%d ", i); 773 ohci_dump_ed(sc, sc->sc_eds[i]); 774 } 775 printf("iso "); 776 ohci_dump_ed(sc, sc->sc_isoc_head); 777 } 778 #endif 779 780 /* Preserve values programmed by SMM/BIOS but lost over reset. */ 781 ctl = OREAD4(sc, OHCI_CONTROL); 782 rwc = ctl & OHCI_RWC; 783 fm = OREAD4(sc, OHCI_FM_INTERVAL); 784 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 785 descb = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 786 787 /* Determine in what context we are running. */ 788 if (ctl & OHCI_IR) { 789 /* SMM active, request change */ 790 DPRINTF(("ohci_init: SMM active, request owner change\n")); 791 if ((sc->sc_intre & (OHCI_OC | OHCI_MIE)) == 792 (OHCI_OC | OHCI_MIE)) 793 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_MIE); 794 s = OREAD4(sc, OHCI_COMMAND_STATUS); 795 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 796 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 797 usb_delay_ms(&sc->sc_bus, 1); 798 ctl = OREAD4(sc, OHCI_CONTROL); 799 } 800 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_MIE); 801 if ((ctl & OHCI_IR) == 0) { 802 printf("%s: SMM does not respond, resetting\n", 803 USBDEVNAME(sc->sc_bus.bdev)); 804 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 805 goto reset; 806 } 807 #if 0 808 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */ 809 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 810 /* BIOS started controller. */ 811 DPRINTF(("ohci_init: BIOS active\n")); 812 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 813 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL | rwc); 814 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 815 } 816 #endif 817 } else { 818 DPRINTF(("ohci_init: cold started\n")); 819 reset: 820 /* Controller was cold started. */ 821 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 822 } 823 824 /* 825 * This reset should not be necessary according to the OHCI spec, but 826 * without it some controllers do not start. 827 */ 828 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 829 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 830 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 831 832 /* We now own the host controller and the bus has been reset. */ 833 834 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 835 /* Nominal time for a reset is 10 us. */ 836 for (i = 0; i < 10; i++) { 837 delay(10); 838 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 839 if (!hcr) 840 break; 841 } 842 if (hcr) { 843 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 844 err = USBD_IOERROR; 845 goto bad5; 846 } 847 #ifdef OHCI_DEBUG 848 if (ohcidebug > 15) 849 ohci_dumpregs(sc); 850 #endif 851 852 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 853 854 /* Set up HC registers. */ 855 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 856 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 857 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 858 /* disable all interrupts and then switch on all desired interrupts */ 859 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 860 /* switch on desired functional features */ 861 ctl = OREAD4(sc, OHCI_CONTROL); 862 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 863 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 864 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL | rwc; 865 /* And finally start it! */ 866 OWRITE4(sc, OHCI_CONTROL, ctl); 867 868 /* 869 * The controller is now OPERATIONAL. Set a some final 870 * registers that should be set earlier, but that the 871 * controller ignores when in the SUSPEND state. 872 */ 873 ival = OHCI_GET_IVAL(fm); 874 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 875 fm |= OHCI_FSMPS(ival) | ival; 876 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 877 per = OHCI_PERIODIC(ival); /* 90% periodic */ 878 OWRITE4(sc, OHCI_PERIODIC_START, per); 879 880 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */ 881 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP); 882 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 883 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY); 884 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca); 885 886 /* 887 * The AMD756 requires a delay before re-reading the register, 888 * otherwise it will occasionally report 0 ports. 889 */ 890 sc->sc_noport = 0; 891 for (i = 0; i < 10 && sc->sc_noport == 0; i++) { 892 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY); 893 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 894 } 895 896 #ifdef OHCI_DEBUG 897 if (ohcidebug > 5) 898 ohci_dumpregs(sc); 899 #endif 900 901 /* Set up the bus struct. */ 902 sc->sc_bus.methods = &ohci_bus_methods; 903 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 904 905 #if defined(__NetBSD__) || defined(__OpenBSD__) 906 sc->sc_control = sc->sc_intre = 0; 907 sc->sc_powerhook = powerhook_establish(USBDEVNAME(sc->sc_bus.bdev), 908 ohci_power, sc); 909 sc->sc_shutdownhook = shutdownhook_establish(ohci_shutdown, sc); 910 #endif 911 912 usb_callout_init(sc->sc_tmo_rhsc); 913 914 /* Finally, turn on interrupts. */ 915 DPRINTFN(1,("ohci_init: enabling\n")); 916 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 917 918 return (USBD_NORMAL_COMPLETION); 919 920 bad5: 921 for (i = 0; i < OHCI_NO_EDS; i++) 922 ohci_free_sed(sc, sc->sc_eds[i]); 923 bad4: 924 ohci_free_sed(sc, sc->sc_isoc_head); 925 bad3: 926 ohci_free_sed(sc, sc->sc_bulk_head); 927 bad2: 928 ohci_free_sed(sc, sc->sc_ctrl_head); 929 bad1: 930 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 931 return (err); 932 } 933 934 usbd_status 935 ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 936 { 937 #if defined(__NetBSD__) || defined(__OpenBSD__) 938 struct ohci_softc *sc = (struct ohci_softc *)bus; 939 #endif 940 usbd_status status; 941 942 status = usb_allocmem(&sc->sc_bus, size, 0, dma); 943 #ifdef __NetBSD__ 944 if (status == USBD_NOMEM) 945 status = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size); 946 #endif 947 return status; 948 } 949 950 void 951 ohci_freem(struct usbd_bus *bus, usb_dma_t *dma) 952 { 953 #if defined(__NetBSD__) || defined(__OpenBSD__) 954 struct ohci_softc *sc = (struct ohci_softc *)bus; 955 #endif 956 #ifdef __NetBSD__ 957 if (dma->block->flags & USB_DMA_RESERVE) { 958 usb_reserve_freem(&((struct ohci_softc *)bus)->sc_dma_reserve, 959 dma); 960 return; 961 } 962 #endif 963 usb_freemem(&sc->sc_bus, dma); 964 } 965 966 usbd_xfer_handle 967 ohci_allocx(struct usbd_bus *bus) 968 { 969 struct ohci_softc *sc = (struct ohci_softc *)bus; 970 usbd_xfer_handle xfer; 971 972 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 973 if (xfer != NULL) { 974 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 975 #ifdef DIAGNOSTIC 976 if (xfer->busy_free != XFER_FREE) { 977 printf("ohci_allocx: xfer=%p not free, 0x%08x\n", xfer, 978 xfer->busy_free); 979 } 980 #endif 981 } else { 982 xfer = malloc(sizeof(struct ohci_xfer), M_USB, M_NOWAIT); 983 } 984 if (xfer != NULL) { 985 memset(xfer, 0, sizeof (struct ohci_xfer)); 986 #ifdef DIAGNOSTIC 987 xfer->busy_free = XFER_BUSY; 988 #endif 989 } 990 return (xfer); 991 } 992 993 void 994 ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 995 { 996 struct ohci_softc *sc = (struct ohci_softc *)bus; 997 998 #ifdef DIAGNOSTIC 999 if (xfer->busy_free != XFER_BUSY) { 1000 printf("ohci_freex: xfer=%p not busy, 0x%08x\n", xfer, 1001 xfer->busy_free); 1002 return; 1003 } 1004 xfer->busy_free = XFER_FREE; 1005 #endif 1006 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 1007 } 1008 1009 /* 1010 * Shut down the controller when the system is going down. 1011 */ 1012 void 1013 ohci_shutdown(void *v) 1014 { 1015 ohci_softc_t *sc = v; 1016 1017 DPRINTF(("ohci_shutdown: stopping the HC\n")); 1018 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1019 } 1020 1021 /* 1022 * Handle suspend/resume. 1023 * 1024 * We need to switch to polling mode here, because this routine is 1025 * called from an interupt context. This is all right since we 1026 * are almost suspended anyway. 1027 */ 1028 void 1029 ohci_power(int why, void *v) 1030 { 1031 ohci_softc_t *sc = v; 1032 u_int32_t ctl; 1033 int s; 1034 1035 #ifdef OHCI_DEBUG 1036 DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why)); 1037 ohci_dumpregs(sc); 1038 #endif 1039 1040 s = splhardusb(); 1041 switch (why) { 1042 case PWR_SUSPEND: 1043 case PWR_STANDBY: 1044 sc->sc_bus.use_polling++; 1045 ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK; 1046 if (sc->sc_control == 0) { 1047 /* 1048 * Preserve register values, in case that APM BIOS 1049 * does not recover them. 1050 */ 1051 sc->sc_control = ctl; 1052 sc->sc_intre = OREAD4(sc, OHCI_INTERRUPT_ENABLE); 1053 } 1054 ctl |= OHCI_HCFS_SUSPEND; 1055 OWRITE4(sc, OHCI_CONTROL, ctl); 1056 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1057 sc->sc_bus.use_polling--; 1058 break; 1059 case PWR_RESUME: 1060 sc->sc_bus.use_polling++; 1061 /* Some broken BIOSes do not recover these values */ 1062 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 1063 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 1064 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 1065 if (sc->sc_intre) 1066 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, 1067 sc->sc_intre & (OHCI_ALL_INTRS | OHCI_MIE)); 1068 if (sc->sc_control) 1069 ctl = sc->sc_control; 1070 else 1071 ctl = OREAD4(sc, OHCI_CONTROL); 1072 ctl |= OHCI_HCFS_RESUME; 1073 OWRITE4(sc, OHCI_CONTROL, ctl); 1074 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 1075 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL; 1076 OWRITE4(sc, OHCI_CONTROL, ctl); 1077 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 1078 sc->sc_control = sc->sc_intre = 0; 1079 sc->sc_bus.use_polling--; 1080 break; 1081 case PWR_SOFTSUSPEND: 1082 case PWR_SOFTSTANDBY: 1083 case PWR_SOFTRESUME: 1084 break; 1085 } 1086 splx(s); 1087 } 1088 1089 #ifdef OHCI_DEBUG 1090 void 1091 ohci_dumpregs(ohci_softc_t *sc) 1092 { 1093 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 1094 OREAD4(sc, OHCI_REVISION), 1095 OREAD4(sc, OHCI_CONTROL), 1096 OREAD4(sc, OHCI_COMMAND_STATUS))); 1097 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 1098 OREAD4(sc, OHCI_INTERRUPT_STATUS), 1099 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 1100 OREAD4(sc, OHCI_INTERRUPT_DISABLE))); 1101 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 1102 OREAD4(sc, OHCI_HCCA), 1103 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 1104 OREAD4(sc, OHCI_CONTROL_HEAD_ED))); 1105 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 1106 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 1107 OREAD4(sc, OHCI_BULK_HEAD_ED), 1108 OREAD4(sc, OHCI_BULK_CURRENT_ED))); 1109 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 1110 OREAD4(sc, OHCI_DONE_HEAD), 1111 OREAD4(sc, OHCI_FM_INTERVAL), 1112 OREAD4(sc, OHCI_FM_REMAINING))); 1113 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 1114 OREAD4(sc, OHCI_FM_NUMBER), 1115 OREAD4(sc, OHCI_PERIODIC_START), 1116 OREAD4(sc, OHCI_LS_THRESHOLD))); 1117 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n", 1118 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 1119 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 1120 OREAD4(sc, OHCI_RH_STATUS))); 1121 DPRINTF((" port1=0x%08x port2=0x%08x\n", 1122 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 1123 OREAD4(sc, OHCI_RH_PORT_STATUS(2)))); 1124 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n", 1125 O32TOH(sc->sc_hcca->hcca_frame_number), 1126 O32TOH(sc->sc_hcca->hcca_done_head))); 1127 } 1128 #endif 1129 1130 Static int ohci_intr1(ohci_softc_t *); 1131 1132 int 1133 ohci_intr(void *p) 1134 { 1135 ohci_softc_t *sc = p; 1136 1137 if (sc == NULL || sc->sc_dying) 1138 return (0); 1139 1140 /* If we get an interrupt while polling, then just ignore it. */ 1141 if (sc->sc_bus.use_polling) { 1142 #ifdef DIAGNOSTIC 1143 DPRINTFN(16, ("ohci_intr: ignored interrupt while polling\n")); 1144 #endif 1145 /* for level triggered intrs, should do something to ack */ 1146 OWRITE4(sc, OHCI_INTERRUPT_STATUS, 1147 OREAD4(sc, OHCI_INTERRUPT_STATUS)); 1148 1149 return (0); 1150 } 1151 1152 return (ohci_intr1(sc)); 1153 } 1154 1155 Static int 1156 ohci_intr1(ohci_softc_t *sc) 1157 { 1158 u_int32_t intrs, eintrs; 1159 1160 DPRINTFN(14,("ohci_intr1: enter\n")); 1161 1162 /* In case the interrupt occurs before initialization has completed. */ 1163 if (sc == NULL || sc->sc_hcca == NULL) { 1164 #ifdef DIAGNOSTIC 1165 printf("ohci_intr: sc->sc_hcca == NULL\n"); 1166 #endif 1167 return (0); 1168 } 1169 1170 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1171 if (!intrs) 1172 return (0); 1173 1174 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs & ~(OHCI_MIE|OHCI_WDH)); /* Acknowledge */ 1175 eintrs = intrs & sc->sc_eintrs; 1176 if (!eintrs) 1177 return (0); 1178 1179 sc->sc_bus.intr_context++; 1180 sc->sc_bus.no_intrs++; 1181 DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 1182 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 1183 (u_int)eintrs)); 1184 1185 if (eintrs & OHCI_SO) { 1186 sc->sc_overrun_cnt++; 1187 if (usbd_ratecheck(&sc->sc_overrun_ntc)) { 1188 printf("%s: %u scheduling overruns\n", 1189 USBDEVNAME(sc->sc_bus.bdev), sc->sc_overrun_cnt); 1190 sc->sc_overrun_cnt = 0; 1191 } 1192 /* XXX do what */ 1193 eintrs &= ~OHCI_SO; 1194 } 1195 if (eintrs & OHCI_WDH) { 1196 /* 1197 * We block the interrupt below, and reenable it later from 1198 * ohci_softintr(). 1199 */ 1200 usb_schedsoftintr(&sc->sc_bus); 1201 } 1202 if (eintrs & OHCI_RD) { 1203 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev)); 1204 /* XXX process resume detect */ 1205 } 1206 if (eintrs & OHCI_UE) { 1207 printf("%s: unrecoverable error, controller halted\n", 1208 USBDEVNAME(sc->sc_bus.bdev)); 1209 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1210 /* XXX what else */ 1211 } 1212 if (eintrs & OHCI_RHSC) { 1213 /* 1214 * We block the interrupt below, and reenable it later from 1215 * a timeout. 1216 */ 1217 ohci_rhsc(sc, sc->sc_intrxfer); 1218 /* Do not allow RHSC interrupts > 1 per second */ 1219 usb_callout(sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc); 1220 } 1221 1222 sc->sc_bus.intr_context--; 1223 1224 if (eintrs != 0) { 1225 /* Block unprocessed interrupts. */ 1226 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs); 1227 sc->sc_eintrs &= ~eintrs; 1228 DPRINTFN(1, ("%s: blocking intrs 0x%x\n", 1229 USBDEVNAME(sc->sc_bus.bdev), eintrs)); 1230 } 1231 1232 return (1); 1233 } 1234 1235 void 1236 ohci_rhsc_enable(void *v_sc) 1237 { 1238 ohci_softc_t *sc = v_sc; 1239 int s; 1240 1241 s = splhardusb(); 1242 sc->sc_eintrs |= OHCI_RHSC; 1243 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1244 splx(s); 1245 } 1246 1247 #ifdef OHCI_DEBUG 1248 const char *ohci_cc_strs[] = { 1249 "NO_ERROR", 1250 "CRC", 1251 "BIT_STUFFING", 1252 "DATA_TOGGLE_MISMATCH", 1253 "STALL", 1254 "DEVICE_NOT_RESPONDING", 1255 "PID_CHECK_FAILURE", 1256 "UNEXPECTED_PID", 1257 "DATA_OVERRUN", 1258 "DATA_UNDERRUN", 1259 "BUFFER_OVERRUN", 1260 "BUFFER_UNDERRUN", 1261 "reserved", 1262 "reserved", 1263 "NOT_ACCESSED", 1264 "NOT_ACCESSED", 1265 }; 1266 #endif 1267 1268 void 1269 ohci_softintr(void *v) 1270 { 1271 ohci_softc_t *sc = v; 1272 ohci_soft_itd_t *sitd, *sidone, *sitdnext; 1273 ohci_soft_td_t *std, *sdone, *stdnext; 1274 usbd_xfer_handle xfer; 1275 struct ohci_pipe *opipe; 1276 int len, cc, s; 1277 int i, j, actlen, iframes, uedir; 1278 ohci_physaddr_t done; 1279 1280 DPRINTFN(10,("ohci_softintr: enter\n")); 1281 1282 sc->sc_bus.intr_context++; 1283 1284 s = splhardusb(); 1285 done = O32TOH(sc->sc_hcca->hcca_done_head) & ~OHCI_DONE_INTRS; 1286 sc->sc_hcca->hcca_done_head = 0; 1287 OWRITE4(sc, OHCI_INTERRUPT_STATUS, OHCI_WDH); 1288 sc->sc_eintrs |= OHCI_WDH; 1289 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_WDH); 1290 splx(s); 1291 1292 /* Reverse the done list. */ 1293 for (sdone = NULL, sidone = NULL; done != 0; ) { 1294 std = ohci_hash_find_td(sc, done); 1295 if (std != NULL) { 1296 std->dnext = sdone; 1297 done = O32TOH(std->td.td_nexttd); 1298 sdone = std; 1299 DPRINTFN(10,("add TD %p\n", std)); 1300 continue; 1301 } 1302 sitd = ohci_hash_find_itd(sc, done); 1303 if (sitd != NULL) { 1304 sitd->dnext = sidone; 1305 done = O32TOH(sitd->itd.itd_nextitd); 1306 sidone = sitd; 1307 DPRINTFN(5,("add ITD %p\n", sitd)); 1308 continue; 1309 } 1310 panic("ohci_softintr: addr 0x%08lx not found", (u_long)done); 1311 } 1312 1313 DPRINTFN(10,("ohci_softintr: sdone=%p sidone=%p\n", sdone, sidone)); 1314 1315 #ifdef OHCI_DEBUG 1316 if (ohcidebug > 10) { 1317 DPRINTF(("ohci_process_done: TD done:\n")); 1318 ohci_dump_tds(sc, sdone); 1319 } 1320 #endif 1321 1322 for (std = sdone; std; std = stdnext) { 1323 xfer = std->xfer; 1324 stdnext = std->dnext; 1325 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n", 1326 std, xfer, xfer ? xfer->hcpriv : 0)); 1327 if (xfer == NULL) { 1328 /* 1329 * xfer == NULL: There seems to be no xfer associated 1330 * with this TD. It is tailp that happened to end up on 1331 * the done queue. 1332 * Shouldn't happen, but some chips are broken(?). 1333 */ 1334 continue; 1335 } 1336 if (xfer->status == USBD_CANCELLED || 1337 xfer->status == USBD_TIMEOUT) { 1338 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1339 xfer)); 1340 /* Handled by abort routine. */ 1341 continue; 1342 } 1343 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 1344 1345 len = std->len; 1346 if (std->td.td_cbp != 0) 1347 len -= O32TOH(std->td.td_be) - 1348 O32TOH(std->td.td_cbp) + 1; 1349 DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", len, 1350 std->flags)); 1351 if (std->flags & OHCI_ADD_LEN) 1352 xfer->actlen += len; 1353 1354 cc = OHCI_TD_GET_CC(O32TOH(std->td.td_flags)); 1355 if (cc == OHCI_CC_NO_ERROR) { 1356 if (std->flags & OHCI_CALL_DONE) { 1357 xfer->status = USBD_NORMAL_COMPLETION; 1358 s = splusb(); 1359 usb_transfer_complete(xfer); 1360 splx(s); 1361 } 1362 ohci_free_std(sc, std); 1363 } else { 1364 /* 1365 * Endpoint is halted. First unlink all the TDs 1366 * belonging to the failed transfer, and then restart 1367 * the endpoint. 1368 */ 1369 ohci_soft_td_t *p, *n; 1370 opipe = (struct ohci_pipe *)xfer->pipe; 1371 1372 DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n", 1373 OHCI_TD_GET_CC(O32TOH(std->td.td_flags)), 1374 ohci_cc_strs[OHCI_TD_GET_CC(O32TOH(std->td.td_flags))])); 1375 1376 /* remove TDs */ 1377 for (p = std; p->xfer == xfer; p = n) { 1378 n = p->nexttd; 1379 ohci_free_std(sc, p); 1380 } 1381 1382 /* clear halt */ 1383 opipe->sed->ed.ed_headp = HTOO32(p->physaddr); 1384 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1385 1386 if (cc == OHCI_CC_STALL) 1387 xfer->status = USBD_STALLED; 1388 else 1389 xfer->status = USBD_IOERROR; 1390 s = splusb(); 1391 usb_transfer_complete(xfer); 1392 splx(s); 1393 } 1394 } 1395 1396 #ifdef OHCI_DEBUG 1397 if (ohcidebug > 10) { 1398 DPRINTF(("ohci_softintr: ITD done:\n")); 1399 ohci_dump_itds(sc, sidone); 1400 } 1401 #endif 1402 1403 for (sitd = sidone; sitd != NULL; sitd = sitdnext) { 1404 xfer = sitd->xfer; 1405 sitdnext = sitd->dnext; 1406 DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n", 1407 sitd, xfer, xfer ? xfer->hcpriv : 0)); 1408 if (xfer == NULL) 1409 continue; 1410 if (xfer->status == USBD_CANCELLED || 1411 xfer->status == USBD_TIMEOUT) { 1412 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1413 xfer)); 1414 /* Handled by abort routine. */ 1415 continue; 1416 } 1417 #ifdef DIAGNOSTIC 1418 if (sitd->isdone) 1419 printf("ohci_softintr: sitd=%p is done\n", sitd); 1420 sitd->isdone = 1; 1421 #endif 1422 if (sitd->flags & OHCI_CALL_DONE) { 1423 ohci_soft_itd_t *next; 1424 1425 opipe = (struct ohci_pipe *)xfer->pipe; 1426 opipe->u.iso.inuse -= xfer->nframes; 1427 uedir = UE_GET_DIR(xfer->pipe->endpoint->edesc-> 1428 bEndpointAddress); 1429 xfer->status = USBD_NORMAL_COMPLETION; 1430 actlen = 0; 1431 for (i = 0, sitd = xfer->hcpriv;; 1432 sitd = next) { 1433 next = sitd->nextitd; 1434 if (OHCI_ITD_GET_CC(O32TOH(sitd-> 1435 itd.itd_flags)) != OHCI_CC_NO_ERROR) 1436 xfer->status = USBD_IOERROR; 1437 /* For input, update frlengths with actual */ 1438 /* XXX anything necessary for output? */ 1439 if (uedir == UE_DIR_IN && 1440 xfer->status == USBD_NORMAL_COMPLETION) { 1441 iframes = OHCI_ITD_GET_FC(O32TOH( 1442 sitd->itd.itd_flags)); 1443 for (j = 0; j < iframes; i++, j++) { 1444 len = O16TOH(sitd-> 1445 itd.itd_offset[j]); 1446 if ((OHCI_ITD_PSW_GET_CC(len) & 1447 OHCI_CC_NOT_ACCESSED_MASK) 1448 == OHCI_CC_NOT_ACCESSED) 1449 len = 0; 1450 else 1451 len = OHCI_ITD_PSW_LENGTH(len); 1452 xfer->frlengths[i] = len; 1453 actlen += len; 1454 } 1455 } 1456 if (sitd->flags & OHCI_CALL_DONE) 1457 break; 1458 ohci_free_sitd(sc, sitd); 1459 } 1460 ohci_free_sitd(sc, sitd); 1461 if (uedir == UE_DIR_IN && 1462 xfer->status == USBD_NORMAL_COMPLETION) 1463 xfer->actlen = actlen; 1464 xfer->hcpriv = NULL; 1465 1466 s = splusb(); 1467 usb_transfer_complete(xfer); 1468 splx(s); 1469 } 1470 } 1471 1472 #ifdef USB_USE_SOFTINTR 1473 if (sc->sc_softwake) { 1474 sc->sc_softwake = 0; 1475 wakeup(&sc->sc_softwake); 1476 } 1477 #endif /* USB_USE_SOFTINTR */ 1478 1479 sc->sc_bus.intr_context--; 1480 DPRINTFN(10,("ohci_softintr: done:\n")); 1481 } 1482 1483 void 1484 ohci_device_ctrl_done(usbd_xfer_handle xfer) 1485 { 1486 DPRINTFN(10,("ohci_device_ctrl_done: xfer=%p\n", xfer)); 1487 1488 #ifdef DIAGNOSTIC 1489 if (!(xfer->rqflags & URQ_REQUEST)) { 1490 panic("ohci_device_ctrl_done: not a request"); 1491 } 1492 #endif 1493 } 1494 1495 void 1496 ohci_device_intr_done(usbd_xfer_handle xfer) 1497 { 1498 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1499 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1500 ohci_soft_ed_t *sed = opipe->sed; 1501 ohci_soft_td_t *data, *tail; 1502 1503 1504 DPRINTFN(10,("ohci_device_intr_done: xfer=%p, actlen=%d\n", 1505 xfer, xfer->actlen)); 1506 1507 if (xfer->pipe->repeat) { 1508 data = opipe->tail.td; 1509 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 1510 if (tail == NULL) { 1511 xfer->status = USBD_NOMEM; 1512 return; 1513 } 1514 tail->xfer = NULL; 1515 1516 data->td.td_flags = HTOO32( 1517 OHCI_TD_IN | OHCI_TD_NOCC | 1518 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 1519 if (xfer->flags & USBD_SHORT_XFER_OK) 1520 data->td.td_flags |= HTOO32(OHCI_TD_R); 1521 data->td.td_cbp = HTOO32(DMAADDR(&xfer->dmabuf, 0)); 1522 data->nexttd = tail; 1523 data->td.td_nexttd = HTOO32(tail->physaddr); 1524 data->td.td_be = HTOO32(O32TOH(data->td.td_cbp) + 1525 xfer->length - 1); 1526 data->len = xfer->length; 1527 data->xfer = xfer; 1528 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1529 xfer->hcpriv = data; 1530 xfer->actlen = 0; 1531 1532 sed->ed.ed_tailp = HTOO32(tail->physaddr); 1533 opipe->tail.td = tail; 1534 } 1535 } 1536 1537 void 1538 ohci_device_bulk_done(usbd_xfer_handle xfer) 1539 { 1540 DPRINTFN(10,("ohci_device_bulk_done: xfer=%p, actlen=%d\n", 1541 xfer, xfer->actlen)); 1542 } 1543 1544 void 1545 ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer) 1546 { 1547 usbd_pipe_handle pipe; 1548 u_char *p; 1549 int i, m; 1550 int hstatus; 1551 1552 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1553 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n", 1554 sc, xfer, hstatus)); 1555 1556 if (xfer == NULL) { 1557 /* Just ignore the change. */ 1558 return; 1559 } 1560 1561 pipe = xfer->pipe; 1562 1563 p = KERNADDR(&xfer->dmabuf, 0); 1564 m = min(sc->sc_noport, xfer->length * 8 - 1); 1565 memset(p, 0, xfer->length); 1566 for (i = 1; i <= m; i++) { 1567 /* Pick out CHANGE bits from the status reg. */ 1568 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1569 p[i/8] |= 1 << (i%8); 1570 } 1571 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 1572 xfer->actlen = xfer->length; 1573 xfer->status = USBD_NORMAL_COMPLETION; 1574 1575 usb_transfer_complete(xfer); 1576 } 1577 1578 void 1579 ohci_root_intr_done(usbd_xfer_handle xfer) 1580 { 1581 } 1582 1583 void 1584 ohci_root_ctrl_done(usbd_xfer_handle xfer) 1585 { 1586 } 1587 1588 /* 1589 * Wait here until controller claims to have an interrupt. 1590 * Then call ohci_intr and return. Use timeout to avoid waiting 1591 * too long. 1592 */ 1593 void 1594 ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer) 1595 { 1596 int timo; 1597 u_int32_t intrs; 1598 1599 xfer->status = USBD_IN_PROGRESS; 1600 for (timo = xfer->timeout; timo >= 0; timo--) { 1601 usb_delay_ms(&sc->sc_bus, 1); 1602 if (sc->sc_dying) 1603 break; 1604 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 1605 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs)); 1606 #ifdef OHCI_DEBUG 1607 if (ohcidebug > 15) 1608 ohci_dumpregs(sc); 1609 #endif 1610 if (intrs) { 1611 ohci_intr1(sc); 1612 if (xfer->status != USBD_IN_PROGRESS) 1613 return; 1614 } 1615 } 1616 1617 /* Timeout */ 1618 DPRINTF(("ohci_waitintr: timeout\n")); 1619 xfer->status = USBD_TIMEOUT; 1620 usb_transfer_complete(xfer); 1621 /* XXX should free TD */ 1622 } 1623 1624 void 1625 ohci_poll(struct usbd_bus *bus) 1626 { 1627 ohci_softc_t *sc = (ohci_softc_t *)bus; 1628 #ifdef OHCI_DEBUG 1629 static int last; 1630 int new; 1631 new = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1632 if (new != last) { 1633 DPRINTFN(10,("ohci_poll: intrs=0x%04x\n", new)); 1634 last = new; 1635 } 1636 #endif 1637 1638 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) 1639 ohci_intr1(sc); 1640 } 1641 1642 usbd_status 1643 ohci_device_request(usbd_xfer_handle xfer) 1644 { 1645 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1646 usb_device_request_t *req = &xfer->request; 1647 usbd_device_handle dev = opipe->pipe.device; 1648 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1649 int addr = dev->address; 1650 ohci_soft_td_t *setup, *stat, *next, *tail; 1651 ohci_soft_ed_t *sed; 1652 int isread; 1653 int len; 1654 usbd_status err; 1655 int s; 1656 1657 isread = req->bmRequestType & UT_READ; 1658 len = UGETW(req->wLength); 1659 1660 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 1661 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 1662 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1663 UGETW(req->wIndex), len, addr, 1664 opipe->pipe.endpoint->edesc->bEndpointAddress)); 1665 1666 setup = opipe->tail.td; 1667 stat = ohci_alloc_std(sc); 1668 if (stat == NULL) { 1669 err = USBD_NOMEM; 1670 goto bad1; 1671 } 1672 tail = ohci_alloc_std(sc); 1673 if (tail == NULL) { 1674 err = USBD_NOMEM; 1675 goto bad2; 1676 } 1677 tail->xfer = NULL; 1678 1679 sed = opipe->sed; 1680 opipe->u.ctl.length = len; 1681 1682 /* Update device address and length since they may have changed 1683 during the setup of the control pipe in usbd_new_device(). */ 1684 /* XXX This only needs to be done once, but it's too early in open. */ 1685 /* XXXX Should not touch ED here! */ 1686 sed->ed.ed_flags = HTOO32( 1687 (O32TOH(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) | 1688 OHCI_ED_SET_FA(addr) | 1689 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize))); 1690 1691 next = stat; 1692 1693 /* Set up data transaction */ 1694 if (len != 0) { 1695 ohci_soft_td_t *std = stat; 1696 1697 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 1698 std, &stat); 1699 stat = stat->nexttd; /* point at free TD */ 1700 if (err) 1701 goto bad3; 1702 /* Start toggle at 1 and then use the carried toggle. */ 1703 std->td.td_flags &= HTOO32(~OHCI_TD_TOGGLE_MASK); 1704 std->td.td_flags |= HTOO32(OHCI_TD_TOGGLE_1); 1705 } 1706 1707 memcpy(KERNADDR(&opipe->u.ctl.reqdma, 0), req, sizeof *req); 1708 1709 setup->td.td_flags = HTOO32(OHCI_TD_SETUP | OHCI_TD_NOCC | 1710 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1711 setup->td.td_cbp = HTOO32(DMAADDR(&opipe->u.ctl.reqdma, 0)); 1712 setup->nexttd = next; 1713 setup->td.td_nexttd = HTOO32(next->physaddr); 1714 setup->td.td_be = HTOO32(O32TOH(setup->td.td_cbp) + sizeof *req - 1); 1715 setup->len = 0; 1716 setup->xfer = xfer; 1717 setup->flags = 0; 1718 xfer->hcpriv = setup; 1719 1720 stat->td.td_flags = HTOO32( 1721 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | 1722 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1723 stat->td.td_cbp = 0; 1724 stat->nexttd = tail; 1725 stat->td.td_nexttd = HTOO32(tail->physaddr); 1726 stat->td.td_be = 0; 1727 stat->flags = OHCI_CALL_DONE; 1728 stat->len = 0; 1729 stat->xfer = xfer; 1730 1731 #ifdef OHCI_DEBUG 1732 if (ohcidebug > 5) { 1733 DPRINTF(("ohci_device_request:\n")); 1734 ohci_dump_ed(sc, sed); 1735 ohci_dump_tds(sc, setup); 1736 } 1737 #endif 1738 1739 /* Insert ED in schedule */ 1740 s = splusb(); 1741 sed->ed.ed_tailp = HTOO32(tail->physaddr); 1742 opipe->tail.td = tail; 1743 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1744 if (xfer->timeout && !sc->sc_bus.use_polling) { 1745 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 1746 ohci_timeout, xfer); 1747 } 1748 splx(s); 1749 1750 #ifdef OHCI_DEBUG 1751 if (ohcidebug > 20) { 1752 delay(10000); 1753 DPRINTF(("ohci_device_request: status=%x\n", 1754 OREAD4(sc, OHCI_COMMAND_STATUS))); 1755 ohci_dumpregs(sc); 1756 printf("ctrl head:\n"); 1757 ohci_dump_ed(sc, sc->sc_ctrl_head); 1758 printf("sed:\n"); 1759 ohci_dump_ed(sc, sed); 1760 ohci_dump_tds(sc, setup); 1761 } 1762 #endif 1763 1764 return (USBD_NORMAL_COMPLETION); 1765 1766 bad3: 1767 ohci_free_std(sc, tail); 1768 bad2: 1769 ohci_free_std(sc, stat); 1770 bad1: 1771 return (err); 1772 } 1773 1774 /* 1775 * Add an ED to the schedule. Called at splusb(). 1776 */ 1777 void 1778 ohci_add_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1779 { 1780 DPRINTFN(8,("ohci_add_ed: sed=%p head=%p\n", sed, head)); 1781 1782 SPLUSBCHECK; 1783 sed->next = head->next; 1784 sed->ed.ed_nexted = head->ed.ed_nexted; 1785 head->next = sed; 1786 head->ed.ed_nexted = HTOO32(sed->physaddr); 1787 } 1788 1789 /* 1790 * Remove an ED from the schedule. Called at splusb(). 1791 */ 1792 void 1793 ohci_rem_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1794 { 1795 ohci_soft_ed_t *p; 1796 1797 SPLUSBCHECK; 1798 1799 /* XXX */ 1800 for (p = head; p != NULL && p->next != sed; p = p->next) 1801 ; 1802 if (p == NULL) 1803 panic("ohci_rem_ed: ED not found"); 1804 p->next = sed->next; 1805 p->ed.ed_nexted = sed->ed.ed_nexted; 1806 } 1807 1808 /* 1809 * When a transfer is completed the TD is added to the done queue by 1810 * the host controller. This queue is the processed by software. 1811 * Unfortunately the queue contains the physical address of the TD 1812 * and we have no simple way to translate this back to a kernel address. 1813 * To make the translation possible (and fast) we use a hash table of 1814 * TDs currently in the schedule. The physical address is used as the 1815 * hash value. 1816 */ 1817 1818 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1819 /* Called at splusb() */ 1820 void 1821 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1822 { 1823 int h = HASH(std->physaddr); 1824 1825 SPLUSBCHECK; 1826 1827 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1828 } 1829 1830 /* Called at splusb() */ 1831 void 1832 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1833 { 1834 SPLUSBCHECK; 1835 1836 LIST_REMOVE(std, hnext); 1837 } 1838 1839 ohci_soft_td_t * 1840 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a) 1841 { 1842 int h = HASH(a); 1843 ohci_soft_td_t *std; 1844 1845 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1846 std != NULL; 1847 std = LIST_NEXT(std, hnext)) 1848 if (std->physaddr == a) 1849 return (std); 1850 return (NULL); 1851 } 1852 1853 /* Called at splusb() */ 1854 void 1855 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1856 { 1857 int h = HASH(sitd->physaddr); 1858 1859 SPLUSBCHECK; 1860 1861 DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n", 1862 sitd, (u_long)sitd->physaddr)); 1863 1864 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext); 1865 } 1866 1867 /* Called at splusb() */ 1868 void 1869 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1870 { 1871 SPLUSBCHECK; 1872 1873 DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n", 1874 sitd, (u_long)sitd->physaddr)); 1875 1876 LIST_REMOVE(sitd, hnext); 1877 } 1878 1879 ohci_soft_itd_t * 1880 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a) 1881 { 1882 int h = HASH(a); 1883 ohci_soft_itd_t *sitd; 1884 1885 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]); 1886 sitd != NULL; 1887 sitd = LIST_NEXT(sitd, hnext)) 1888 if (sitd->physaddr == a) 1889 return (sitd); 1890 return (NULL); 1891 } 1892 1893 void 1894 ohci_timeout(void *addr) 1895 { 1896 struct ohci_xfer *oxfer = addr; 1897 struct ohci_pipe *opipe = (struct ohci_pipe *)oxfer->xfer.pipe; 1898 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1899 1900 DPRINTF(("ohci_timeout: oxfer=%p\n", oxfer)); 1901 1902 if (sc->sc_dying) { 1903 ohci_abort_xfer(&oxfer->xfer, USBD_TIMEOUT); 1904 return; 1905 } 1906 1907 /* Execute the abort in a process context. */ 1908 usb_init_task(&oxfer->abort_task, ohci_timeout_task, addr); 1909 usb_add_task(oxfer->xfer.pipe->device, &oxfer->abort_task); 1910 } 1911 1912 void 1913 ohci_timeout_task(void *addr) 1914 { 1915 usbd_xfer_handle xfer = addr; 1916 int s; 1917 1918 DPRINTF(("ohci_timeout_task: xfer=%p\n", xfer)); 1919 1920 s = splusb(); 1921 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1922 splx(s); 1923 } 1924 1925 #ifdef OHCI_DEBUG 1926 void 1927 ohci_dump_tds(ohci_softc_t *sc, ohci_soft_td_t *std) 1928 { 1929 for (; std; std = std->nexttd) 1930 ohci_dump_td(sc, std); 1931 } 1932 1933 void 1934 ohci_dump_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1935 { 1936 char sbuf[128]; 1937 1938 bitmask_snprintf((u_int32_t)O32TOH(std->td.td_flags), 1939 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 1940 sbuf, sizeof(sbuf)); 1941 1942 printf("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx " 1943 "nexttd=0x%08lx be=0x%08lx\n", 1944 std, (u_long)std->physaddr, sbuf, 1945 OHCI_TD_GET_DI(O32TOH(std->td.td_flags)), 1946 OHCI_TD_GET_EC(O32TOH(std->td.td_flags)), 1947 OHCI_TD_GET_CC(O32TOH(std->td.td_flags)), 1948 (u_long)O32TOH(std->td.td_cbp), 1949 (u_long)O32TOH(std->td.td_nexttd), 1950 (u_long)O32TOH(std->td.td_be)); 1951 } 1952 1953 void 1954 ohci_dump_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1955 { 1956 int i; 1957 1958 printf("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n" 1959 "bp0=0x%08lx next=0x%08lx be=0x%08lx\n", 1960 sitd, (u_long)sitd->physaddr, 1961 OHCI_ITD_GET_SF(O32TOH(sitd->itd.itd_flags)), 1962 OHCI_ITD_GET_DI(O32TOH(sitd->itd.itd_flags)), 1963 OHCI_ITD_GET_FC(O32TOH(sitd->itd.itd_flags)), 1964 OHCI_ITD_GET_CC(O32TOH(sitd->itd.itd_flags)), 1965 (u_long)O32TOH(sitd->itd.itd_bp0), 1966 (u_long)O32TOH(sitd->itd.itd_nextitd), 1967 (u_long)O32TOH(sitd->itd.itd_be)); 1968 for (i = 0; i < OHCI_ITD_NOFFSET; i++) 1969 printf("offs[%d]=0x%04x ", i, 1970 (u_int)O16TOH(sitd->itd.itd_offset[i])); 1971 printf("\n"); 1972 } 1973 1974 void 1975 ohci_dump_itds(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1976 { 1977 for (; sitd; sitd = sitd->nextitd) 1978 ohci_dump_itd(sc, sitd); 1979 } 1980 1981 void 1982 ohci_dump_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 1983 { 1984 char sbuf[128], sbuf2[128]; 1985 1986 bitmask_snprintf((u_int32_t)O32TOH(sed->ed.ed_flags), 1987 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO", 1988 sbuf, sizeof(sbuf)); 1989 bitmask_snprintf((u_int32_t)O32TOH(sed->ed.ed_headp), 1990 "\20\1HALT\2CARRY", sbuf2, sizeof(sbuf2)); 1991 1992 printf("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d flags=%s\ntailp=0x%08lx " 1993 "headflags=%s headp=0x%08lx nexted=0x%08lx\n", 1994 sed, (u_long)sed->physaddr, 1995 OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)), 1996 OHCI_ED_GET_EN(O32TOH(sed->ed.ed_flags)), 1997 OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)), sbuf, 1998 (u_long)O32TOH(sed->ed.ed_tailp), sbuf2, 1999 (u_long)O32TOH(sed->ed.ed_headp), 2000 (u_long)O32TOH(sed->ed.ed_nexted)); 2001 } 2002 #endif 2003 2004 usbd_status 2005 ohci_open(usbd_pipe_handle pipe) 2006 { 2007 usbd_device_handle dev = pipe->device; 2008 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2009 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 2010 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2011 u_int8_t addr = dev->address; 2012 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 2013 ohci_soft_ed_t *sed; 2014 ohci_soft_td_t *std; 2015 ohci_soft_itd_t *sitd; 2016 ohci_physaddr_t tdphys; 2017 u_int32_t fmt; 2018 usbd_status err; 2019 int s; 2020 int ival; 2021 2022 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 2023 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 2024 2025 if (sc->sc_dying) 2026 return (USBD_IOERROR); 2027 2028 std = NULL; 2029 sed = NULL; 2030 2031 if (addr == sc->sc_addr) { 2032 switch (ed->bEndpointAddress) { 2033 case USB_CONTROL_ENDPOINT: 2034 pipe->methods = &ohci_root_ctrl_methods; 2035 break; 2036 case UE_DIR_IN | OHCI_INTR_ENDPT: 2037 pipe->methods = &ohci_root_intr_methods; 2038 break; 2039 default: 2040 return (USBD_INVAL); 2041 } 2042 } else { 2043 sed = ohci_alloc_sed(sc); 2044 if (sed == NULL) 2045 goto bad0; 2046 opipe->sed = sed; 2047 if (xfertype == UE_ISOCHRONOUS) { 2048 sitd = ohci_alloc_sitd(sc); 2049 if (sitd == NULL) 2050 goto bad1; 2051 opipe->tail.itd = sitd; 2052 tdphys = sitd->physaddr; 2053 fmt = OHCI_ED_FORMAT_ISO; 2054 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 2055 fmt |= OHCI_ED_DIR_IN; 2056 else 2057 fmt |= OHCI_ED_DIR_OUT; 2058 } else { 2059 std = ohci_alloc_std(sc); 2060 if (std == NULL) 2061 goto bad1; 2062 opipe->tail.td = std; 2063 tdphys = std->physaddr; 2064 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD; 2065 } 2066 sed->ed.ed_flags = HTOO32( 2067 OHCI_ED_SET_FA(addr) | 2068 OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) | 2069 (dev->speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) | 2070 fmt | 2071 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 2072 sed->ed.ed_headp = sed->ed.ed_tailp = HTOO32(tdphys); 2073 2074 switch (xfertype) { 2075 case UE_CONTROL: 2076 pipe->methods = &ohci_device_ctrl_methods; 2077 err = usb_allocmem(&sc->sc_bus, 2078 sizeof(usb_device_request_t), 2079 0, &opipe->u.ctl.reqdma); 2080 if (err) 2081 goto bad; 2082 s = splusb(); 2083 ohci_add_ed(sc, sed, sc->sc_ctrl_head); 2084 splx(s); 2085 break; 2086 case UE_INTERRUPT: 2087 pipe->methods = &ohci_device_intr_methods; 2088 ival = pipe->interval; 2089 if (ival == USBD_DEFAULT_INTERVAL) 2090 ival = ed->bInterval; 2091 return (ohci_device_setintr(sc, opipe, ival)); 2092 case UE_ISOCHRONOUS: 2093 pipe->methods = &ohci_device_isoc_methods; 2094 return (ohci_setup_isoc(pipe)); 2095 case UE_BULK: 2096 pipe->methods = &ohci_device_bulk_methods; 2097 s = splusb(); 2098 ohci_add_ed(sc, sed, sc->sc_bulk_head); 2099 splx(s); 2100 break; 2101 } 2102 } 2103 return (USBD_NORMAL_COMPLETION); 2104 2105 bad: 2106 if (std != NULL) 2107 ohci_free_std(sc, std); 2108 bad1: 2109 if (sed != NULL) 2110 ohci_free_sed(sc, sed); 2111 bad0: 2112 return (USBD_NOMEM); 2113 2114 } 2115 2116 /* 2117 * Close a reqular pipe. 2118 * Assumes that there are no pending transactions. 2119 */ 2120 void 2121 ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head) 2122 { 2123 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2124 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2125 ohci_soft_ed_t *sed = opipe->sed; 2126 int s; 2127 2128 s = splusb(); 2129 #ifdef DIAGNOSTIC 2130 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 2131 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2132 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) { 2133 ohci_soft_td_t *std; 2134 std = ohci_hash_find_td(sc, O32TOH(sed->ed.ed_headp)); 2135 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 2136 "tl=0x%x pipe=%p, std=%p\n", sed, 2137 (int)O32TOH(sed->ed.ed_headp), 2138 (int)O32TOH(sed->ed.ed_tailp), 2139 pipe, std); 2140 #ifdef USB_DEBUG 2141 usbd_dump_pipe(&opipe->pipe); 2142 #endif 2143 #ifdef OHCI_DEBUG 2144 ohci_dump_ed(sc, sed); 2145 if (std) 2146 ohci_dump_td(sc, std); 2147 #endif 2148 usb_delay_ms(&sc->sc_bus, 2); 2149 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2150 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) 2151 printf("ohci_close_pipe: pipe still not empty\n"); 2152 } 2153 #endif 2154 ohci_rem_ed(sed, head); 2155 /* Make sure the host controller is not touching this ED */ 2156 usb_delay_ms(&sc->sc_bus, 1); 2157 splx(s); 2158 ohci_free_sed(sc, opipe->sed); 2159 } 2160 2161 /* 2162 * Abort a device request. 2163 * If this routine is called at splusb() it guarantees that the request 2164 * will be removed from the hardware scheduling and that the callback 2165 * for it will be called with USBD_CANCELLED status. 2166 * It's impossible to guarantee that the requested transfer will not 2167 * have happened since the hardware runs concurrently. 2168 * If the transaction has already happened we rely on the ordinary 2169 * interrupt processing to process it. 2170 */ 2171 void 2172 ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2173 { 2174 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2175 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 2176 ohci_soft_ed_t *sed = opipe->sed; 2177 ohci_soft_td_t *p, *n; 2178 ohci_physaddr_t headp; 2179 int s, hit; 2180 int wake; 2181 2182 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p sed=%p\n", xfer, opipe,sed)); 2183 2184 if (sc->sc_dying) { 2185 /* If we're dying, just do the software part. */ 2186 s = splusb(); 2187 xfer->status = status; /* make software ignore it */ 2188 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 2189 usb_transfer_complete(xfer); 2190 splx(s); 2191 return; 2192 } 2193 2194 if (xfer->device->bus->intr_context || !curproc) 2195 panic("ohci_abort_xfer: not in process context"); 2196 2197 /* 2198 * If an abort is already in progress then just wait for it to 2199 * complete and return. 2200 */ 2201 if (xfer->hcflags & UXFER_ABORTING) { 2202 DPRINTFN(2, ("ohci_abort_xfer: already aborting\n")); 2203 #ifdef DIAGNOSTIC 2204 if (status == USBD_TIMEOUT) 2205 printf("0hci_abort_xfer: TIMEOUT while aborting\n"); 2206 #endif 2207 /* Override the status which might be USBD_TIMEOUT. */ 2208 xfer->status = status; 2209 DPRINTFN(2, ("ohci_abort_xfer: waiting for abort to finish\n")); 2210 xfer->hcflags |= UXFER_ABORTWAIT; 2211 while (xfer->hcflags & UXFER_ABORTING) 2212 tsleep(&xfer->hcflags, PZERO, "ohciaw", 0); 2213 return; 2214 } 2215 xfer->hcflags |= UXFER_ABORTING; 2216 2217 /* 2218 * Step 1: Make interrupt routine and hardware ignore xfer. 2219 */ 2220 s = splusb(); 2221 xfer->status = status; /* make software ignore it */ 2222 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 2223 splx(s); 2224 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed)); 2225 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */ 2226 2227 /* 2228 * Step 2: Wait until we know hardware has finished any possible 2229 * use of the xfer. Also make sure the soft interrupt routine 2230 * has run. 2231 */ 2232 usb_delay_ms(opipe->pipe.device->bus, 20); /* Hardware finishes in 1ms */ 2233 s = splusb(); 2234 #ifdef USB_USE_SOFTINTR 2235 sc->sc_softwake = 1; 2236 #endif /* USB_USE_SOFTINTR */ 2237 usb_schedsoftintr(&sc->sc_bus); 2238 #ifdef USB_USE_SOFTINTR 2239 tsleep(&sc->sc_softwake, PZERO, "ohciab", 0); 2240 #endif /* USB_USE_SOFTINTR */ 2241 splx(s); 2242 2243 /* 2244 * Step 3: Remove any vestiges of the xfer from the hardware. 2245 * The complication here is that the hardware may have executed 2246 * beyond the xfer we're trying to abort. So as we're scanning 2247 * the TDs of this xfer we check if the hardware points to 2248 * any of them. 2249 */ 2250 s = splusb(); /* XXX why? */ 2251 p = xfer->hcpriv; 2252 #ifdef DIAGNOSTIC 2253 if (p == NULL) { 2254 xfer->hcflags &= ~UXFER_ABORTING; /* XXX */ 2255 splx(s); 2256 printf("ohci_abort_xfer: hcpriv is NULL\n"); 2257 return; 2258 } 2259 #endif 2260 #ifdef OHCI_DEBUG 2261 if (ohcidebug > 1) { 2262 DPRINTF(("ohci_abort_xfer: sed=\n")); 2263 ohci_dump_ed(sc, sed); 2264 ohci_dump_tds(sc, p); 2265 } 2266 #endif 2267 headp = O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK; 2268 hit = 0; 2269 for (; p->xfer == xfer; p = n) { 2270 hit |= headp == p->physaddr; 2271 n = p->nexttd; 2272 ohci_free_std(sc, p); 2273 } 2274 /* Zap headp register if hardware pointed inside the xfer. */ 2275 if (hit) { 2276 DPRINTFN(1,("ohci_abort_xfer: set hd=0x%08x, tl=0x%08x\n", 2277 (int)p->physaddr, (int)O32TOH(sed->ed.ed_tailp))); 2278 sed->ed.ed_headp = HTOO32(p->physaddr); /* unlink TDs */ 2279 } else { 2280 DPRINTFN(1,("ohci_abort_xfer: no hit\n")); 2281 } 2282 2283 /* 2284 * Step 4: Turn on hardware again. 2285 */ 2286 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */ 2287 2288 /* 2289 * Step 5: Execute callback. 2290 */ 2291 wake = xfer->hcflags & UXFER_ABORTWAIT; 2292 xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT); 2293 usb_transfer_complete(xfer); 2294 if (wake) 2295 wakeup(&xfer->hcflags); 2296 2297 splx(s); 2298 } 2299 2300 /* 2301 * Data structures and routines to emulate the root hub. 2302 */ 2303 Static usb_device_descriptor_t ohci_devd = { 2304 USB_DEVICE_DESCRIPTOR_SIZE, 2305 UDESC_DEVICE, /* type */ 2306 {0x00, 0x01}, /* USB version */ 2307 UDCLASS_HUB, /* class */ 2308 UDSUBCLASS_HUB, /* subclass */ 2309 UDPROTO_FSHUB, 2310 64, /* max packet */ 2311 {0},{0},{0x00,0x01}, /* device id */ 2312 1,2,0, /* string indicies */ 2313 1 /* # of configurations */ 2314 }; 2315 2316 Static usb_config_descriptor_t ohci_confd = { 2317 USB_CONFIG_DESCRIPTOR_SIZE, 2318 UDESC_CONFIG, 2319 {USB_CONFIG_DESCRIPTOR_SIZE + 2320 USB_INTERFACE_DESCRIPTOR_SIZE + 2321 USB_ENDPOINT_DESCRIPTOR_SIZE}, 2322 1, 2323 1, 2324 0, 2325 UC_SELF_POWERED, 2326 0 /* max power */ 2327 }; 2328 2329 Static usb_interface_descriptor_t ohci_ifcd = { 2330 USB_INTERFACE_DESCRIPTOR_SIZE, 2331 UDESC_INTERFACE, 2332 0, 2333 0, 2334 1, 2335 UICLASS_HUB, 2336 UISUBCLASS_HUB, 2337 UIPROTO_FSHUB, 2338 0 2339 }; 2340 2341 Static usb_endpoint_descriptor_t ohci_endpd = { 2342 .bLength = USB_ENDPOINT_DESCRIPTOR_SIZE, 2343 .bDescriptorType = UDESC_ENDPOINT, 2344 .bEndpointAddress = UE_DIR_IN | OHCI_INTR_ENDPT, 2345 .bmAttributes = UE_INTERRUPT, 2346 .wMaxPacketSize = {8, 0}, /* max packet */ 2347 .bInterval = 255, 2348 }; 2349 2350 Static usb_hub_descriptor_t ohci_hubd = { 2351 .bDescLength = USB_HUB_DESCRIPTOR_SIZE, 2352 .bDescriptorType = UDESC_HUB, 2353 }; 2354 2355 Static int 2356 ohci_str(usb_string_descriptor_t *p, int l, const char *s) 2357 { 2358 int i; 2359 2360 if (l == 0) 2361 return (0); 2362 p->bLength = 2 * strlen(s) + 2; 2363 if (l == 1) 2364 return (1); 2365 p->bDescriptorType = UDESC_STRING; 2366 l -= 2; 2367 for (i = 0; s[i] && l > 1; i++, l -= 2) 2368 USETW2(p->bString[i], 0, s[i]); 2369 return (2*i+2); 2370 } 2371 2372 /* 2373 * Simulate a hardware hub by handling all the necessary requests. 2374 */ 2375 Static usbd_status 2376 ohci_root_ctrl_transfer(usbd_xfer_handle xfer) 2377 { 2378 usbd_status err; 2379 2380 /* Insert last in queue. */ 2381 err = usb_insert_transfer(xfer); 2382 if (err) 2383 return (err); 2384 2385 /* Pipe isn't running, start first */ 2386 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2387 } 2388 2389 Static usbd_status 2390 ohci_root_ctrl_start(usbd_xfer_handle xfer) 2391 { 2392 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2393 usb_device_request_t *req; 2394 void *buf = NULL; 2395 int port, i; 2396 int s, len, value, index, l, totlen = 0; 2397 usb_port_status_t ps; 2398 usb_hub_descriptor_t hubd; 2399 usbd_status err; 2400 u_int32_t v; 2401 2402 if (sc->sc_dying) 2403 return (USBD_IOERROR); 2404 2405 #ifdef DIAGNOSTIC 2406 if (!(xfer->rqflags & URQ_REQUEST)) 2407 /* XXX panic */ 2408 return (USBD_INVAL); 2409 #endif 2410 req = &xfer->request; 2411 2412 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 2413 req->bmRequestType, req->bRequest)); 2414 2415 len = UGETW(req->wLength); 2416 value = UGETW(req->wValue); 2417 index = UGETW(req->wIndex); 2418 2419 if (len != 0) 2420 buf = KERNADDR(&xfer->dmabuf, 0); 2421 2422 #define C(x,y) ((x) | ((y) << 8)) 2423 switch(C(req->bRequest, req->bmRequestType)) { 2424 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 2425 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 2426 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 2427 /* 2428 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 2429 * for the integrated root hub. 2430 */ 2431 break; 2432 case C(UR_GET_CONFIG, UT_READ_DEVICE): 2433 if (len > 0) { 2434 *(u_int8_t *)buf = sc->sc_conf; 2435 totlen = 1; 2436 } 2437 break; 2438 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2439 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 2440 if (len == 0) 2441 break; 2442 switch(value >> 8) { 2443 case UDESC_DEVICE: 2444 if ((value & 0xff) != 0) { 2445 err = USBD_IOERROR; 2446 goto ret; 2447 } 2448 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 2449 USETW(ohci_devd.idVendor, sc->sc_id_vendor); 2450 memcpy(buf, &ohci_devd, l); 2451 break; 2452 case UDESC_CONFIG: 2453 if ((value & 0xff) != 0) { 2454 err = USBD_IOERROR; 2455 goto ret; 2456 } 2457 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 2458 memcpy(buf, &ohci_confd, l); 2459 buf = (char *)buf + l; 2460 len -= l; 2461 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 2462 totlen += l; 2463 memcpy(buf, &ohci_ifcd, l); 2464 buf = (char *)buf + l; 2465 len -= l; 2466 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 2467 totlen += l; 2468 memcpy(buf, &ohci_endpd, l); 2469 break; 2470 case UDESC_STRING: 2471 *(u_int8_t *)buf = 0; 2472 totlen = 1; 2473 switch (value & 0xff) { 2474 case 0: /* Language table */ 2475 totlen = ohci_str(buf, len, "\001"); 2476 break; 2477 case 1: /* Vendor */ 2478 totlen = ohci_str(buf, len, sc->sc_vendor); 2479 break; 2480 case 2: /* Product */ 2481 totlen = ohci_str(buf, len, "OHCI root hub"); 2482 break; 2483 } 2484 break; 2485 default: 2486 err = USBD_IOERROR; 2487 goto ret; 2488 } 2489 break; 2490 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 2491 if (len > 0) { 2492 *(u_int8_t *)buf = 0; 2493 totlen = 1; 2494 } 2495 break; 2496 case C(UR_GET_STATUS, UT_READ_DEVICE): 2497 if (len > 1) { 2498 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 2499 totlen = 2; 2500 } 2501 break; 2502 case C(UR_GET_STATUS, UT_READ_INTERFACE): 2503 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 2504 if (len > 1) { 2505 USETW(((usb_status_t *)buf)->wStatus, 0); 2506 totlen = 2; 2507 } 2508 break; 2509 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 2510 if (value >= USB_MAX_DEVICES) { 2511 err = USBD_IOERROR; 2512 goto ret; 2513 } 2514 sc->sc_addr = value; 2515 break; 2516 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 2517 if (value != 0 && value != 1) { 2518 err = USBD_IOERROR; 2519 goto ret; 2520 } 2521 sc->sc_conf = value; 2522 break; 2523 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 2524 break; 2525 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 2526 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 2527 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 2528 err = USBD_IOERROR; 2529 goto ret; 2530 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 2531 break; 2532 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 2533 break; 2534 /* Hub requests */ 2535 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2536 break; 2537 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2538 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 2539 "port=%d feature=%d\n", 2540 index, value)); 2541 if (index < 1 || index > sc->sc_noport) { 2542 err = USBD_IOERROR; 2543 goto ret; 2544 } 2545 port = OHCI_RH_PORT_STATUS(index); 2546 switch(value) { 2547 case UHF_PORT_ENABLE: 2548 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2549 break; 2550 case UHF_PORT_SUSPEND: 2551 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2552 break; 2553 case UHF_PORT_POWER: 2554 /* Yes, writing to the LOW_SPEED bit clears power. */ 2555 OWRITE4(sc, port, UPS_LOW_SPEED); 2556 break; 2557 case UHF_C_PORT_CONNECTION: 2558 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2559 break; 2560 case UHF_C_PORT_ENABLE: 2561 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2562 break; 2563 case UHF_C_PORT_SUSPEND: 2564 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2565 break; 2566 case UHF_C_PORT_OVER_CURRENT: 2567 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2568 break; 2569 case UHF_C_PORT_RESET: 2570 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2571 break; 2572 default: 2573 err = USBD_IOERROR; 2574 goto ret; 2575 } 2576 switch(value) { 2577 case UHF_C_PORT_CONNECTION: 2578 case UHF_C_PORT_ENABLE: 2579 case UHF_C_PORT_SUSPEND: 2580 case UHF_C_PORT_OVER_CURRENT: 2581 case UHF_C_PORT_RESET: 2582 /* Enable RHSC interrupt if condition is cleared. */ 2583 if ((OREAD4(sc, port) >> 16) == 0) 2584 ohci_rhsc_enable(sc); 2585 break; 2586 default: 2587 break; 2588 } 2589 break; 2590 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2591 if (len == 0) 2592 break; 2593 if ((value & 0xff) != 0) { 2594 err = USBD_IOERROR; 2595 goto ret; 2596 } 2597 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2598 hubd = ohci_hubd; 2599 hubd.bNbrPorts = sc->sc_noport; 2600 USETW(hubd.wHubCharacteristics, 2601 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2602 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2603 /* XXX overcurrent */ 2604 ); 2605 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2606 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2607 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2608 hubd.DeviceRemovable[i++] = (u_int8_t)v; 2609 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2610 l = min(len, hubd.bDescLength); 2611 totlen = l; 2612 memcpy(buf, &hubd, l); 2613 break; 2614 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2615 if (len != 4) { 2616 err = USBD_IOERROR; 2617 goto ret; 2618 } 2619 memset(buf, 0, len); /* ? XXX */ 2620 totlen = len; 2621 break; 2622 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2623 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 2624 index)); 2625 if (index < 1 || index > sc->sc_noport) { 2626 err = USBD_IOERROR; 2627 goto ret; 2628 } 2629 if (len != 4) { 2630 err = USBD_IOERROR; 2631 goto ret; 2632 } 2633 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2634 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 2635 v)); 2636 USETW(ps.wPortStatus, v); 2637 USETW(ps.wPortChange, v >> 16); 2638 l = min(len, sizeof ps); 2639 memcpy(buf, &ps, l); 2640 totlen = l; 2641 break; 2642 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2643 err = USBD_IOERROR; 2644 goto ret; 2645 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2646 break; 2647 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2648 if (index < 1 || index > sc->sc_noport) { 2649 err = USBD_IOERROR; 2650 goto ret; 2651 } 2652 port = OHCI_RH_PORT_STATUS(index); 2653 switch(value) { 2654 case UHF_PORT_ENABLE: 2655 OWRITE4(sc, port, UPS_PORT_ENABLED); 2656 break; 2657 case UHF_PORT_SUSPEND: 2658 OWRITE4(sc, port, UPS_SUSPEND); 2659 break; 2660 case UHF_PORT_RESET: 2661 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 2662 index)); 2663 OWRITE4(sc, port, UPS_RESET); 2664 for (i = 0; i < 5; i++) { 2665 usb_delay_ms(&sc->sc_bus, 2666 USB_PORT_ROOT_RESET_DELAY); 2667 if (sc->sc_dying) { 2668 err = USBD_IOERROR; 2669 goto ret; 2670 } 2671 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2672 break; 2673 } 2674 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 2675 index, OREAD4(sc, port))); 2676 break; 2677 case UHF_PORT_POWER: 2678 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 2679 "%d\n", index)); 2680 OWRITE4(sc, port, UPS_PORT_POWER); 2681 break; 2682 default: 2683 err = USBD_IOERROR; 2684 goto ret; 2685 } 2686 break; 2687 default: 2688 err = USBD_IOERROR; 2689 goto ret; 2690 } 2691 xfer->actlen = totlen; 2692 err = USBD_NORMAL_COMPLETION; 2693 ret: 2694 xfer->status = err; 2695 s = splusb(); 2696 usb_transfer_complete(xfer); 2697 splx(s); 2698 return (USBD_IN_PROGRESS); 2699 } 2700 2701 /* Abort a root control request. */ 2702 Static void 2703 ohci_root_ctrl_abort(usbd_xfer_handle xfer) 2704 { 2705 /* Nothing to do, all transfers are synchronous. */ 2706 } 2707 2708 /* Close the root pipe. */ 2709 Static void 2710 ohci_root_ctrl_close(usbd_pipe_handle pipe) 2711 { 2712 DPRINTF(("ohci_root_ctrl_close\n")); 2713 /* Nothing to do. */ 2714 } 2715 2716 Static usbd_status 2717 ohci_root_intr_transfer(usbd_xfer_handle xfer) 2718 { 2719 usbd_status err; 2720 2721 /* Insert last in queue. */ 2722 err = usb_insert_transfer(xfer); 2723 if (err) 2724 return (err); 2725 2726 /* Pipe isn't running, start first */ 2727 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2728 } 2729 2730 Static usbd_status 2731 ohci_root_intr_start(usbd_xfer_handle xfer) 2732 { 2733 usbd_pipe_handle pipe = xfer->pipe; 2734 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2735 2736 if (sc->sc_dying) 2737 return (USBD_IOERROR); 2738 2739 sc->sc_intrxfer = xfer; 2740 2741 return (USBD_IN_PROGRESS); 2742 } 2743 2744 /* Abort a root interrupt request. */ 2745 Static void 2746 ohci_root_intr_abort(usbd_xfer_handle xfer) 2747 { 2748 int s; 2749 2750 if (xfer->pipe->intrxfer == xfer) { 2751 DPRINTF(("ohci_root_intr_abort: remove\n")); 2752 xfer->pipe->intrxfer = NULL; 2753 } 2754 xfer->status = USBD_CANCELLED; 2755 s = splusb(); 2756 usb_transfer_complete(xfer); 2757 splx(s); 2758 } 2759 2760 /* Close the root pipe. */ 2761 Static void 2762 ohci_root_intr_close(usbd_pipe_handle pipe) 2763 { 2764 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2765 2766 DPRINTF(("ohci_root_intr_close\n")); 2767 2768 sc->sc_intrxfer = NULL; 2769 } 2770 2771 /************************/ 2772 2773 Static usbd_status 2774 ohci_device_ctrl_transfer(usbd_xfer_handle xfer) 2775 { 2776 usbd_status err; 2777 2778 /* Insert last in queue. */ 2779 err = usb_insert_transfer(xfer); 2780 if (err) 2781 return (err); 2782 2783 /* Pipe isn't running, start first */ 2784 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2785 } 2786 2787 Static usbd_status 2788 ohci_device_ctrl_start(usbd_xfer_handle xfer) 2789 { 2790 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2791 usbd_status err; 2792 2793 if (sc->sc_dying) 2794 return (USBD_IOERROR); 2795 2796 #ifdef DIAGNOSTIC 2797 if (!(xfer->rqflags & URQ_REQUEST)) { 2798 /* XXX panic */ 2799 printf("ohci_device_ctrl_transfer: not a request\n"); 2800 return (USBD_INVAL); 2801 } 2802 #endif 2803 2804 err = ohci_device_request(xfer); 2805 if (err) 2806 return (err); 2807 2808 if (sc->sc_bus.use_polling) 2809 ohci_waitintr(sc, xfer); 2810 return (USBD_IN_PROGRESS); 2811 } 2812 2813 /* Abort a device control request. */ 2814 Static void 2815 ohci_device_ctrl_abort(usbd_xfer_handle xfer) 2816 { 2817 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer)); 2818 ohci_abort_xfer(xfer, USBD_CANCELLED); 2819 } 2820 2821 /* Close a device control pipe. */ 2822 Static void 2823 ohci_device_ctrl_close(usbd_pipe_handle pipe) 2824 { 2825 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2826 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2827 2828 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe)); 2829 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2830 ohci_free_std(sc, opipe->tail.td); 2831 } 2832 2833 /************************/ 2834 2835 Static void 2836 ohci_device_clear_toggle(usbd_pipe_handle pipe) 2837 { 2838 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2839 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2840 2841 opipe->sed->ed.ed_headp &= HTOO32(~OHCI_TOGGLECARRY); 2842 } 2843 2844 Static void 2845 ohci_noop(usbd_pipe_handle pipe) 2846 { 2847 } 2848 2849 Static usbd_status 2850 ohci_device_bulk_transfer(usbd_xfer_handle xfer) 2851 { 2852 usbd_status err; 2853 2854 /* Insert last in queue. */ 2855 err = usb_insert_transfer(xfer); 2856 if (err) 2857 return (err); 2858 2859 /* Pipe isn't running, start first */ 2860 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2861 } 2862 2863 Static usbd_status 2864 ohci_device_bulk_start(usbd_xfer_handle xfer) 2865 { 2866 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2867 usbd_device_handle dev = opipe->pipe.device; 2868 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2869 int addr = dev->address; 2870 ohci_soft_td_t *data, *tail, *tdp; 2871 ohci_soft_ed_t *sed; 2872 int s, len, isread, endpt; 2873 usbd_status err; 2874 2875 if (sc->sc_dying) 2876 return (USBD_IOERROR); 2877 2878 #ifdef DIAGNOSTIC 2879 if (xfer->rqflags & URQ_REQUEST) { 2880 /* XXX panic */ 2881 printf("ohci_device_bulk_start: a request\n"); 2882 return (USBD_INVAL); 2883 } 2884 #endif 2885 2886 len = xfer->length; 2887 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 2888 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2889 sed = opipe->sed; 2890 2891 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d " 2892 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags, 2893 endpt)); 2894 2895 opipe->u.bulk.isread = isread; 2896 opipe->u.bulk.length = len; 2897 2898 /* Update device address */ 2899 sed->ed.ed_flags = HTOO32( 2900 (O32TOH(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) | 2901 OHCI_ED_SET_FA(addr)); 2902 2903 /* Allocate a chain of new TDs (including a new tail). */ 2904 data = opipe->tail.td; 2905 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 2906 data, &tail); 2907 /* We want interrupt at the end of the transfer. */ 2908 tail->td.td_flags &= HTOO32(~OHCI_TD_INTR_MASK); 2909 tail->td.td_flags |= HTOO32(OHCI_TD_SET_DI(1)); 2910 tail->flags |= OHCI_CALL_DONE; 2911 tail = tail->nexttd; /* point at sentinel */ 2912 if (err) 2913 return (err); 2914 2915 tail->xfer = NULL; 2916 xfer->hcpriv = data; 2917 2918 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x " 2919 "td_cbp=0x%08x td_be=0x%08x\n", 2920 (int)O32TOH(sed->ed.ed_flags), 2921 (int)O32TOH(data->td.td_flags), 2922 (int)O32TOH(data->td.td_cbp), 2923 (int)O32TOH(data->td.td_be))); 2924 2925 #ifdef OHCI_DEBUG 2926 if (ohcidebug > 5) { 2927 ohci_dump_ed(sc, sed); 2928 ohci_dump_tds(sc, data); 2929 } 2930 #endif 2931 2932 /* Insert ED in schedule */ 2933 s = splusb(); 2934 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 2935 tdp->xfer = xfer; 2936 } 2937 sed->ed.ed_tailp = HTOO32(tail->physaddr); 2938 opipe->tail.td = tail; 2939 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 2940 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 2941 if (xfer->timeout && !sc->sc_bus.use_polling) { 2942 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2943 ohci_timeout, xfer); 2944 } 2945 2946 #if 0 2947 /* This goes wrong if we are too slow. */ 2948 if (ohcidebug > 10) { 2949 delay(10000); 2950 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2951 OREAD4(sc, OHCI_COMMAND_STATUS))); 2952 ohci_dump_ed(sc, sed); 2953 ohci_dump_tds(sc, data); 2954 } 2955 #endif 2956 2957 splx(s); 2958 2959 return (USBD_IN_PROGRESS); 2960 } 2961 2962 Static void 2963 ohci_device_bulk_abort(usbd_xfer_handle xfer) 2964 { 2965 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer)); 2966 ohci_abort_xfer(xfer, USBD_CANCELLED); 2967 } 2968 2969 /* 2970 * Close a device bulk pipe. 2971 */ 2972 Static void 2973 ohci_device_bulk_close(usbd_pipe_handle pipe) 2974 { 2975 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2976 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2977 2978 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe)); 2979 ohci_close_pipe(pipe, sc->sc_bulk_head); 2980 ohci_free_std(sc, opipe->tail.td); 2981 } 2982 2983 /************************/ 2984 2985 Static usbd_status 2986 ohci_device_intr_transfer(usbd_xfer_handle xfer) 2987 { 2988 usbd_status err; 2989 2990 /* Insert last in queue. */ 2991 err = usb_insert_transfer(xfer); 2992 if (err) 2993 return (err); 2994 2995 /* Pipe isn't running, start first */ 2996 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2997 } 2998 2999 Static usbd_status 3000 ohci_device_intr_start(usbd_xfer_handle xfer) 3001 { 3002 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3003 usbd_device_handle dev = opipe->pipe.device; 3004 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 3005 ohci_soft_ed_t *sed = opipe->sed; 3006 ohci_soft_td_t *data, *tail; 3007 int s, len, isread, endpt; 3008 3009 if (sc->sc_dying) 3010 return (USBD_IOERROR); 3011 3012 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d " 3013 "flags=%d priv=%p\n", 3014 xfer, xfer->length, xfer->flags, xfer->priv)); 3015 3016 #ifdef DIAGNOSTIC 3017 if (xfer->rqflags & URQ_REQUEST) 3018 panic("ohci_device_intr_transfer: a request"); 3019 #endif 3020 3021 len = xfer->length; 3022 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 3023 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3024 3025 data = opipe->tail.td; 3026 tail = ohci_alloc_std(sc); 3027 if (tail == NULL) 3028 return (USBD_NOMEM); 3029 tail->xfer = NULL; 3030 3031 data->td.td_flags = HTOO32( 3032 isread ? OHCI_TD_IN : OHCI_TD_OUT | 3033 OHCI_TD_NOCC | 3034 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 3035 if (xfer->flags & USBD_SHORT_XFER_OK) 3036 data->td.td_flags |= HTOO32(OHCI_TD_R); 3037 data->td.td_cbp = HTOO32(DMAADDR(&xfer->dmabuf, 0)); 3038 data->nexttd = tail; 3039 data->td.td_nexttd = HTOO32(tail->physaddr); 3040 data->td.td_be = HTOO32(O32TOH(data->td.td_cbp) + len - 1); 3041 data->len = len; 3042 data->xfer = xfer; 3043 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 3044 xfer->hcpriv = data; 3045 3046 #ifdef OHCI_DEBUG 3047 if (ohcidebug > 5) { 3048 DPRINTF(("ohci_device_intr_transfer:\n")); 3049 ohci_dump_ed(sc, sed); 3050 ohci_dump_tds(sc, data); 3051 } 3052 #endif 3053 3054 /* Insert ED in schedule */ 3055 s = splusb(); 3056 sed->ed.ed_tailp = HTOO32(tail->physaddr); 3057 opipe->tail.td = tail; 3058 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3059 3060 #if 0 3061 /* 3062 * This goes horribly wrong, printing thousands of descriptors, 3063 * because false references are followed due to the fact that the 3064 * TD is gone. 3065 */ 3066 if (ohcidebug > 5) { 3067 usb_delay_ms(&sc->sc_bus, 5); 3068 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 3069 OREAD4(sc, OHCI_COMMAND_STATUS))); 3070 ohci_dump_ed(sc, sed); 3071 ohci_dump_tds(sc, data); 3072 } 3073 #endif 3074 splx(s); 3075 3076 return (USBD_IN_PROGRESS); 3077 } 3078 3079 /* Abort a device control request. */ 3080 Static void 3081 ohci_device_intr_abort(usbd_xfer_handle xfer) 3082 { 3083 if (xfer->pipe->intrxfer == xfer) { 3084 DPRINTF(("ohci_device_intr_abort: remove\n")); 3085 xfer->pipe->intrxfer = NULL; 3086 } 3087 ohci_abort_xfer(xfer, USBD_CANCELLED); 3088 } 3089 3090 /* Close a device interrupt pipe. */ 3091 Static void 3092 ohci_device_intr_close(usbd_pipe_handle pipe) 3093 { 3094 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3095 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3096 int nslots = opipe->u.intr.nslots; 3097 int pos = opipe->u.intr.pos; 3098 int j; 3099 ohci_soft_ed_t *p, *sed = opipe->sed; 3100 int s; 3101 3102 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 3103 pipe, nslots, pos)); 3104 s = splusb(); 3105 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 3106 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 3107 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) 3108 usb_delay_ms(&sc->sc_bus, 2); 3109 3110 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 3111 continue; 3112 #ifdef DIAGNOSTIC 3113 if (p == NULL) 3114 panic("ohci_device_intr_close: ED not found"); 3115 #endif 3116 p->next = sed->next; 3117 p->ed.ed_nexted = sed->ed.ed_nexted; 3118 splx(s); 3119 3120 for (j = 0; j < nslots; j++) 3121 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 3122 3123 ohci_free_std(sc, opipe->tail.td); 3124 ohci_free_sed(sc, opipe->sed); 3125 } 3126 3127 Static usbd_status 3128 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival) 3129 { 3130 int i, j, s, best; 3131 u_int npoll, slow, shigh, nslots; 3132 u_int bestbw, bw; 3133 ohci_soft_ed_t *hsed, *sed = opipe->sed; 3134 3135 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 3136 if (ival == 0) { 3137 printf("ohci_setintr: 0 interval\n"); 3138 return (USBD_INVAL); 3139 } 3140 3141 npoll = OHCI_NO_INTRS; 3142 while (npoll > ival) 3143 npoll /= 2; 3144 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 3145 3146 /* 3147 * We now know which level in the tree the ED must go into. 3148 * Figure out which slot has most bandwidth left over. 3149 * Slots to examine: 3150 * npoll 3151 * 1 0 3152 * 2 1 2 3153 * 4 3 4 5 6 3154 * 8 7 8 9 10 11 12 13 14 3155 * N (N-1) .. (N-1+N-1) 3156 */ 3157 slow = npoll-1; 3158 shigh = slow + npoll; 3159 nslots = OHCI_NO_INTRS / npoll; 3160 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 3161 bw = 0; 3162 for (j = 0; j < nslots; j++) 3163 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 3164 if (bw < bestbw) { 3165 best = i; 3166 bestbw = bw; 3167 } 3168 } 3169 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 3170 best, slow, shigh, bestbw)); 3171 3172 s = splusb(); 3173 hsed = sc->sc_eds[best]; 3174 sed->next = hsed->next; 3175 sed->ed.ed_nexted = hsed->ed.ed_nexted; 3176 hsed->next = sed; 3177 hsed->ed.ed_nexted = HTOO32(sed->physaddr); 3178 splx(s); 3179 3180 for (j = 0; j < nslots; j++) 3181 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 3182 opipe->u.intr.nslots = nslots; 3183 opipe->u.intr.pos = best; 3184 3185 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 3186 return (USBD_NORMAL_COMPLETION); 3187 } 3188 3189 /***********************/ 3190 3191 usbd_status 3192 ohci_device_isoc_transfer(usbd_xfer_handle xfer) 3193 { 3194 usbd_status err; 3195 3196 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer)); 3197 3198 /* Put it on our queue, */ 3199 err = usb_insert_transfer(xfer); 3200 3201 /* bail out on error, */ 3202 if (err && err != USBD_IN_PROGRESS) 3203 return (err); 3204 3205 /* XXX should check inuse here */ 3206 3207 /* insert into schedule, */ 3208 ohci_device_isoc_enter(xfer); 3209 3210 /* and start if the pipe wasn't running */ 3211 if (!err) 3212 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 3213 3214 return (err); 3215 } 3216 3217 void 3218 ohci_device_isoc_enter(usbd_xfer_handle xfer) 3219 { 3220 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3221 usbd_device_handle dev = opipe->pipe.device; 3222 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 3223 ohci_soft_ed_t *sed = opipe->sed; 3224 struct iso *iso = &opipe->u.iso; 3225 ohci_soft_itd_t *sitd, *nsitd; 3226 ohci_physaddr_t buf, offs, noffs, bp0; 3227 int i, ncur, nframes; 3228 int s; 3229 3230 DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p " 3231 "nframes=%d\n", 3232 iso->inuse, iso->next, xfer, xfer->nframes)); 3233 3234 if (sc->sc_dying) 3235 return; 3236 3237 if (iso->next == -1) { 3238 /* Not in use yet, schedule it a few frames ahead. */ 3239 iso->next = O32TOH(sc->sc_hcca->hcca_frame_number) + 5; 3240 DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n", 3241 iso->next)); 3242 } 3243 3244 sitd = opipe->tail.itd; 3245 buf = DMAADDR(&xfer->dmabuf, 0); 3246 bp0 = OHCI_PAGE(buf); 3247 offs = OHCI_PAGE_OFFSET(buf); 3248 nframes = xfer->nframes; 3249 xfer->hcpriv = sitd; 3250 for (i = ncur = 0; i < nframes; i++, ncur++) { 3251 noffs = offs + xfer->frlengths[i]; 3252 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ 3253 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */ 3254 3255 /* Allocate next ITD */ 3256 nsitd = ohci_alloc_sitd(sc); 3257 if (nsitd == NULL) { 3258 /* XXX what now? */ 3259 printf("%s: isoc TD alloc failed\n", 3260 USBDEVNAME(sc->sc_bus.bdev)); 3261 return; 3262 } 3263 3264 /* Fill current ITD */ 3265 sitd->itd.itd_flags = HTOO32( 3266 OHCI_ITD_NOCC | 3267 OHCI_ITD_SET_SF(iso->next) | 3268 OHCI_ITD_SET_DI(6) | /* delay intr a little */ 3269 OHCI_ITD_SET_FC(ncur)); 3270 sitd->itd.itd_bp0 = HTOO32(bp0); 3271 sitd->nextitd = nsitd; 3272 sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr); 3273 sitd->itd.itd_be = HTOO32(bp0 + offs - 1); 3274 sitd->xfer = xfer; 3275 sitd->flags = 0; 3276 3277 sitd = nsitd; 3278 iso->next = iso->next + ncur; 3279 bp0 = OHCI_PAGE(buf + offs); 3280 ncur = 0; 3281 } 3282 sitd->itd.itd_offset[ncur] = HTOO16(OHCI_ITD_MK_OFFS(offs)); 3283 offs = noffs; 3284 } 3285 nsitd = ohci_alloc_sitd(sc); 3286 if (nsitd == NULL) { 3287 /* XXX what now? */ 3288 printf("%s: isoc TD alloc failed\n", 3289 USBDEVNAME(sc->sc_bus.bdev)); 3290 return; 3291 } 3292 /* Fixup last used ITD */ 3293 sitd->itd.itd_flags = HTOO32( 3294 OHCI_ITD_NOCC | 3295 OHCI_ITD_SET_SF(iso->next) | 3296 OHCI_ITD_SET_DI(0) | 3297 OHCI_ITD_SET_FC(ncur)); 3298 sitd->itd.itd_bp0 = HTOO32(bp0); 3299 sitd->nextitd = nsitd; 3300 sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr); 3301 sitd->itd.itd_be = HTOO32(bp0 + offs - 1); 3302 sitd->xfer = xfer; 3303 sitd->flags = OHCI_CALL_DONE; 3304 3305 iso->next = iso->next + ncur; 3306 iso->inuse += nframes; 3307 3308 xfer->actlen = offs; /* XXX pretend we did it all */ 3309 3310 xfer->status = USBD_IN_PROGRESS; 3311 3312 #ifdef OHCI_DEBUG 3313 if (ohcidebug > 5) { 3314 DPRINTF(("ohci_device_isoc_enter: frame=%d\n", 3315 O32TOH(sc->sc_hcca->hcca_frame_number))); 3316 ohci_dump_itds(sc, xfer->hcpriv); 3317 ohci_dump_ed(sc, sed); 3318 } 3319 #endif 3320 3321 s = splusb(); 3322 sed->ed.ed_tailp = HTOO32(nsitd->physaddr); 3323 opipe->tail.itd = nsitd; 3324 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3325 splx(s); 3326 3327 #ifdef OHCI_DEBUG 3328 if (ohcidebug > 5) { 3329 delay(150000); 3330 DPRINTF(("ohci_device_isoc_enter: after frame=%d\n", 3331 O32TOH(sc->sc_hcca->hcca_frame_number))); 3332 ohci_dump_itds(sc, xfer->hcpriv); 3333 ohci_dump_ed(sc, sed); 3334 } 3335 #endif 3336 } 3337 3338 usbd_status 3339 ohci_device_isoc_start(usbd_xfer_handle xfer) 3340 { 3341 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3342 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3343 3344 DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer)); 3345 3346 if (sc->sc_dying) 3347 return (USBD_IOERROR); 3348 3349 #ifdef DIAGNOSTIC 3350 if (xfer->status != USBD_IN_PROGRESS) 3351 printf("ohci_device_isoc_start: not in progress %p\n", xfer); 3352 #endif 3353 3354 /* XXX anything to do? */ 3355 3356 return (USBD_IN_PROGRESS); 3357 } 3358 3359 void 3360 ohci_device_isoc_abort(usbd_xfer_handle xfer) 3361 { 3362 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3363 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3364 ohci_soft_ed_t *sed; 3365 ohci_soft_itd_t *sitd; 3366 int s; 3367 3368 s = splusb(); 3369 3370 DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer)); 3371 3372 /* Transfer is already done. */ 3373 if (xfer->status != USBD_NOT_STARTED && 3374 xfer->status != USBD_IN_PROGRESS) { 3375 splx(s); 3376 printf("ohci_device_isoc_abort: early return\n"); 3377 return; 3378 } 3379 3380 /* Give xfer the requested abort code. */ 3381 xfer->status = USBD_CANCELLED; 3382 3383 sed = opipe->sed; 3384 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */ 3385 3386 sitd = xfer->hcpriv; 3387 #ifdef DIAGNOSTIC 3388 if (sitd == NULL) { 3389 splx(s); 3390 printf("ohci_device_isoc_abort: hcpriv==0\n"); 3391 return; 3392 } 3393 #endif 3394 for (; sitd->xfer == xfer; sitd = sitd->nextitd) { 3395 #ifdef DIAGNOSTIC 3396 DPRINTFN(1,("abort sets done sitd=%p\n", sitd)); 3397 sitd->isdone = 1; 3398 #endif 3399 } 3400 3401 splx(s); 3402 3403 usb_delay_ms(&sc->sc_bus, OHCI_ITD_NOFFSET); 3404 3405 s = splusb(); 3406 3407 /* Run callback. */ 3408 usb_transfer_complete(xfer); 3409 3410 sed->ed.ed_headp = HTOO32(sitd->physaddr); /* unlink TDs */ 3411 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */ 3412 3413 splx(s); 3414 } 3415 3416 void 3417 ohci_device_isoc_done(usbd_xfer_handle xfer) 3418 { 3419 DPRINTFN(1,("ohci_device_isoc_done: xfer=%p\n", xfer)); 3420 } 3421 3422 usbd_status 3423 ohci_setup_isoc(usbd_pipe_handle pipe) 3424 { 3425 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3426 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3427 struct iso *iso = &opipe->u.iso; 3428 int s; 3429 3430 iso->next = -1; 3431 iso->inuse = 0; 3432 3433 s = splusb(); 3434 ohci_add_ed(sc, opipe->sed, sc->sc_isoc_head); 3435 splx(s); 3436 3437 return (USBD_NORMAL_COMPLETION); 3438 } 3439 3440 void 3441 ohci_device_isoc_close(usbd_pipe_handle pipe) 3442 { 3443 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3444 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3445 3446 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe)); 3447 ohci_close_pipe(pipe, sc->sc_isoc_head); 3448 #ifdef DIAGNOSTIC 3449 opipe->tail.itd->isdone = 1; 3450 #endif 3451 ohci_free_sitd(sc, opipe->tail.itd); 3452 } 3453
Indexes created Thu Sep 25 16:09:42 GMT 2025