ohci.c revision 1.179.2.1.2.1
1 /* $NetBSD: ohci.c,v 1.179.2.1.2.1 2008/09/04 08:46:45 skrll Exp $ */ 2 /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */ 3 4 /* 5 * Copyright (c) 1998, 2004, 2005 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Lennart Augustsson (lennart (at) augustsson.net) at 10 * Carlstedt Research & Technology. 11 * This code is derived from software contributed to The NetBSD Foundation 12 * by Charles M. Hannum. 13 * 14 * Redistribution and use in source and binary forms, with or without 15 * modification, are permitted provided that the following conditions 16 * are met: 17 * 1. Redistributions of source code must retain the above copyright 18 * notice, this list of conditions and the following disclaimer. 19 * 2. Redistributions in binary form must reproduce the above copyright 20 * notice, this list of conditions and the following disclaimer in the 21 * documentation and/or other materials provided with the distribution. 22 * 3. All advertising materials mentioning features or use of this software 23 * must display the following acknowledgement: 24 * This product includes software developed by the NetBSD 25 * Foundation, Inc. and its contributors. 26 * 4. Neither the name of The NetBSD Foundation nor the names of its 27 * contributors may be used to endorse or promote products derived 28 * from this software without specific prior written permission. 29 * 30 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 31 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 32 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 33 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 34 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 35 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 36 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 37 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 38 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 39 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 40 * POSSIBILITY OF SUCH DAMAGE. 41 */ 42 43 /* 44 * USB Open Host Controller driver. 45 * 46 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html 47 * USB spec: http://www.usb.org/developers/docs/usbspec.zip 48 */ 49 50 #include <sys/cdefs.h> 51 __KERNEL_RCSID(0, "$NetBSD: ohci.c,v 1.179.2.1.2.1 2008/09/04 08:46:45 skrll Exp $"); 52 53 #include <sys/param.h> 54 #include <sys/systm.h> 55 #include <sys/malloc.h> 56 #if defined(__NetBSD__) || defined(__OpenBSD__) 57 #include <sys/kernel.h> 58 #include <sys/device.h> 59 #include <sys/select.h> 60 #include <uvm/uvm_extern.h> 61 #elif defined(__FreeBSD__) 62 #include <sys/module.h> 63 #include <sys/bus.h> 64 #include <machine/bus_pio.h> 65 #include <machine/bus_memio.h> 66 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 67 #include <machine/cpu.h> 68 #endif 69 #endif 70 #include <sys/proc.h> 71 #include <sys/queue.h> 72 73 #include <machine/bus.h> 74 #include <machine/endian.h> 75 76 #include <dev/usb/usb.h> 77 #include <dev/usb/usbdi.h> 78 #include <dev/usb/usbdivar.h> 79 #include <dev/usb/usb_mem.h> 80 #include <dev/usb/usb_quirks.h> 81 82 #include <dev/usb/ohcireg.h> 83 #include <dev/usb/ohcivar.h> 84 85 #if defined(__FreeBSD__) 86 #include <machine/clock.h> 87 88 #define delay(d) DELAY(d) 89 #endif 90 91 #if defined(__OpenBSD__) 92 struct cfdriver ohci_cd = { 93 NULL, "ohci", DV_DULL 94 }; 95 #endif 96 97 #ifdef OHCI_DEBUG 98 #define DPRINTF(x) if (ohcidebug) logprintf x 99 #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x 100 int ohcidebug = 0; 101 #ifndef __NetBSD__ 102 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 103 #endif 104 #else 105 #define DPRINTF(x) 106 #define DPRINTFN(n,x) 107 #endif 108 109 #if BYTE_ORDER == BIG_ENDIAN 110 #define SWAP_ENDIAN OHCI_LITTLE_ENDIAN 111 #else 112 #define SWAP_ENDIAN OHCI_BIG_ENDIAN 113 #endif 114 115 #define O16TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap16(val) : val) 116 #define O32TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap32(val) : val) 117 #define HTOO16(val) O16TOH(val) 118 #define HTOO32(val) O32TOH(val) 119 120 struct ohci_pipe; 121 122 Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *); 123 Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *); 124 125 Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *); 126 Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *); 127 128 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *); 129 Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *); 130 131 #if 0 132 Static void ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *, 133 ohci_soft_td_t *); 134 #endif 135 Static usbd_status ohci_alloc_std_chain(struct ohci_pipe *, 136 ohci_softc_t *, int, int, usbd_xfer_handle, 137 ohci_soft_td_t *, ohci_soft_td_t **); 138 139 Static void ohci_shutdown(void *v); 140 Static void ohci_power(int, void *); 141 Static usbd_status ohci_open(usbd_pipe_handle); 142 Static void ohci_poll(struct usbd_bus *); 143 Static void ohci_softintr(void *); 144 Static void ohci_waitintr(ohci_softc_t *, usbd_xfer_handle); 145 Static void ohci_rhsc(ohci_softc_t *, usbd_xfer_handle); 146 147 Static usbd_status ohci_device_request(usbd_xfer_handle xfer); 148 Static void ohci_add_ed(ohci_softc_t *, ohci_soft_ed_t *, 149 ohci_soft_ed_t *); 150 151 Static void ohci_rem_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 152 Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *); 153 Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *); 154 Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t); 155 Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *); 156 Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *); 157 Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t); 158 159 Static usbd_status ohci_setup_isoc(usbd_pipe_handle pipe); 160 Static void ohci_device_isoc_enter(usbd_xfer_handle); 161 162 Static usbd_status ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 163 Static void ohci_freem(struct usbd_bus *, usb_dma_t *); 164 165 Static usbd_xfer_handle ohci_allocx(struct usbd_bus *); 166 Static void ohci_freex(struct usbd_bus *, usbd_xfer_handle); 167 168 Static usbd_status ohci_root_ctrl_transfer(usbd_xfer_handle); 169 Static usbd_status ohci_root_ctrl_start(usbd_xfer_handle); 170 Static void ohci_root_ctrl_abort(usbd_xfer_handle); 171 Static void ohci_root_ctrl_close(usbd_pipe_handle); 172 Static void ohci_root_ctrl_done(usbd_xfer_handle); 173 174 Static usbd_status ohci_root_intr_transfer(usbd_xfer_handle); 175 Static usbd_status ohci_root_intr_start(usbd_xfer_handle); 176 Static void ohci_root_intr_abort(usbd_xfer_handle); 177 Static void ohci_root_intr_close(usbd_pipe_handle); 178 Static void ohci_root_intr_done(usbd_xfer_handle); 179 180 Static usbd_status ohci_device_ctrl_transfer(usbd_xfer_handle); 181 Static usbd_status ohci_device_ctrl_start(usbd_xfer_handle); 182 Static void ohci_device_ctrl_abort(usbd_xfer_handle); 183 Static void ohci_device_ctrl_close(usbd_pipe_handle); 184 Static void ohci_device_ctrl_done(usbd_xfer_handle); 185 186 Static usbd_status ohci_device_bulk_transfer(usbd_xfer_handle); 187 Static usbd_status ohci_device_bulk_start(usbd_xfer_handle); 188 Static void ohci_device_bulk_abort(usbd_xfer_handle); 189 Static void ohci_device_bulk_close(usbd_pipe_handle); 190 Static void ohci_device_bulk_done(usbd_xfer_handle); 191 192 Static usbd_status ohci_device_intr_transfer(usbd_xfer_handle); 193 Static usbd_status ohci_device_intr_start(usbd_xfer_handle); 194 Static void ohci_device_intr_abort(usbd_xfer_handle); 195 Static void ohci_device_intr_close(usbd_pipe_handle); 196 Static void ohci_device_intr_done(usbd_xfer_handle); 197 198 Static usbd_status ohci_device_isoc_transfer(usbd_xfer_handle); 199 Static usbd_status ohci_device_isoc_start(usbd_xfer_handle); 200 Static void ohci_device_isoc_abort(usbd_xfer_handle); 201 Static void ohci_device_isoc_close(usbd_pipe_handle); 202 Static void ohci_device_isoc_done(usbd_xfer_handle); 203 204 Static usbd_status ohci_device_setintr(ohci_softc_t *sc, 205 struct ohci_pipe *pipe, int ival); 206 207 Static int ohci_str(usb_string_descriptor_t *, int, const char *); 208 209 Static void ohci_timeout(void *); 210 Static void ohci_timeout_task(void *); 211 Static void ohci_rhsc_enable(void *); 212 213 Static void ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *); 214 Static void ohci_abort_xfer(usbd_xfer_handle, usbd_status); 215 216 Static void ohci_device_clear_toggle(usbd_pipe_handle pipe); 217 Static void ohci_noop(usbd_pipe_handle pipe); 218 219 #ifdef OHCI_DEBUG 220 Static void ohci_dumpregs(ohci_softc_t *); 221 Static void ohci_dump_tds(ohci_softc_t *, ohci_soft_td_t *); 222 Static void ohci_dump_td(ohci_softc_t *, ohci_soft_td_t *); 223 Static void ohci_dump_ed(ohci_softc_t *, ohci_soft_ed_t *); 224 Static void ohci_dump_itd(ohci_softc_t *, ohci_soft_itd_t *); 225 Static void ohci_dump_itds(ohci_softc_t *, ohci_soft_itd_t *); 226 #endif 227 228 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 229 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 230 #define OWRITE1(sc, r, x) \ 231 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 232 #define OWRITE2(sc, r, x) \ 233 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 234 #define OWRITE4(sc, r, x) \ 235 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 236 static __inline uint8_t 237 OREAD1(ohci_softc_t *sc, bus_size_t r) 238 { 239 240 OBARR(sc); 241 return bus_space_read_1(sc->iot, sc->ioh, r); 242 } 243 244 static __inline uint16_t 245 OREAD2(ohci_softc_t *sc, bus_size_t r) 246 { 247 248 OBARR(sc); 249 return bus_space_read_2(sc->iot, sc->ioh, r); 250 } 251 252 static __inline uint32_t 253 OREAD4(ohci_softc_t *sc, bus_size_t r) 254 { 255 256 OBARR(sc); 257 return bus_space_read_4(sc->iot, sc->ioh, r); 258 } 259 260 /* Reverse the bits in a value 0 .. 31 */ 261 Static u_int8_t revbits[OHCI_NO_INTRS] = 262 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 263 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 264 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 265 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 266 267 struct ohci_pipe { 268 struct usbd_pipe pipe; 269 ohci_soft_ed_t *sed; 270 union { 271 ohci_soft_td_t *td; 272 ohci_soft_itd_t *itd; 273 } tail; 274 /* Info needed for different pipe kinds. */ 275 union { 276 /* Control pipe */ 277 struct { 278 usb_dma_t reqdma; 279 u_int length; 280 ohci_soft_td_t *setup, *data, *stat; 281 } ctl; 282 /* Interrupt pipe */ 283 struct { 284 int nslots; 285 int pos; 286 } intr; 287 /* Bulk pipe */ 288 struct { 289 u_int length; 290 int isread; 291 } bulk; 292 /* Iso pipe */ 293 struct iso { 294 int next, inuse; 295 } iso; 296 } u; 297 }; 298 299 #define OHCI_INTR_ENDPT 1 300 301 Static struct usbd_bus_methods ohci_bus_methods = { 302 ohci_open, 303 ohci_softintr, 304 ohci_poll, 305 ohci_allocm, 306 ohci_freem, 307 ohci_allocx, 308 ohci_freex, 309 }; 310 311 Static struct usbd_pipe_methods ohci_root_ctrl_methods = { 312 ohci_root_ctrl_transfer, 313 ohci_root_ctrl_start, 314 ohci_root_ctrl_abort, 315 ohci_root_ctrl_close, 316 ohci_noop, 317 ohci_root_ctrl_done, 318 }; 319 320 Static struct usbd_pipe_methods ohci_root_intr_methods = { 321 ohci_root_intr_transfer, 322 ohci_root_intr_start, 323 ohci_root_intr_abort, 324 ohci_root_intr_close, 325 ohci_noop, 326 ohci_root_intr_done, 327 }; 328 329 Static struct usbd_pipe_methods ohci_device_ctrl_methods = { 330 ohci_device_ctrl_transfer, 331 ohci_device_ctrl_start, 332 ohci_device_ctrl_abort, 333 ohci_device_ctrl_close, 334 ohci_noop, 335 ohci_device_ctrl_done, 336 }; 337 338 Static struct usbd_pipe_methods ohci_device_intr_methods = { 339 ohci_device_intr_transfer, 340 ohci_device_intr_start, 341 ohci_device_intr_abort, 342 ohci_device_intr_close, 343 ohci_device_clear_toggle, 344 ohci_device_intr_done, 345 }; 346 347 Static struct usbd_pipe_methods ohci_device_bulk_methods = { 348 ohci_device_bulk_transfer, 349 ohci_device_bulk_start, 350 ohci_device_bulk_abort, 351 ohci_device_bulk_close, 352 ohci_device_clear_toggle, 353 ohci_device_bulk_done, 354 }; 355 356 Static struct usbd_pipe_methods ohci_device_isoc_methods = { 357 ohci_device_isoc_transfer, 358 ohci_device_isoc_start, 359 ohci_device_isoc_abort, 360 ohci_device_isoc_close, 361 ohci_noop, 362 ohci_device_isoc_done, 363 }; 364 365 #if defined(__NetBSD__) || defined(__OpenBSD__) 366 int 367 ohci_activate(device_ptr_t self, enum devact act) 368 { 369 struct ohci_softc *sc = (struct ohci_softc *)self; 370 int rv = 0; 371 372 switch (act) { 373 case DVACT_ACTIVATE: 374 return (EOPNOTSUPP); 375 376 case DVACT_DEACTIVATE: 377 if (sc->sc_child != NULL) 378 rv = config_deactivate(sc->sc_child); 379 sc->sc_dying = 1; 380 break; 381 } 382 return (rv); 383 } 384 385 int 386 ohci_detach(struct ohci_softc *sc, int flags) 387 { 388 int rv = 0; 389 390 if (sc->sc_child != NULL) 391 rv = config_detach(sc->sc_child, flags); 392 393 if (rv != 0) 394 return (rv); 395 396 usb_uncallout(sc->sc_tmo_rhsc, ohci_rhsc_enable, sc); 397 398 #if defined(__NetBSD__) || defined(__OpenBSD__) 399 powerhook_disestablish(sc->sc_powerhook); 400 shutdownhook_disestablish(sc->sc_shutdownhook); 401 #endif 402 403 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 404 405 /* free data structures XXX */ 406 407 return (rv); 408 } 409 #endif 410 411 ohci_soft_ed_t * 412 ohci_alloc_sed(ohci_softc_t *sc) 413 { 414 ohci_soft_ed_t *sed; 415 usbd_status err; 416 int i, offs; 417 usb_dma_t dma; 418 419 if (sc->sc_freeeds == NULL) { 420 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 421 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 422 OHCI_ED_ALIGN, &dma); 423 if (err) 424 return (0); 425 for(i = 0; i < OHCI_SED_CHUNK; i++) { 426 offs = i * OHCI_SED_SIZE; 427 sed = KERNADDR(&dma, offs); 428 sed->physaddr = DMAADDR(&dma, offs); 429 sed->dma = dma; 430 sed->offs = offs; 431 sed->next = sc->sc_freeeds; 432 sc->sc_freeeds = sed; 433 } 434 } 435 sed = sc->sc_freeeds; 436 sc->sc_freeeds = sed->next; 437 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 438 sed->next = 0; 439 return (sed); 440 } 441 442 void 443 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 444 { 445 sed->next = sc->sc_freeeds; 446 sc->sc_freeeds = sed; 447 } 448 449 ohci_soft_td_t * 450 ohci_alloc_std(ohci_softc_t *sc) 451 { 452 ohci_soft_td_t *std; 453 usbd_status err; 454 int i, offs; 455 usb_dma_t dma; 456 int s; 457 458 if (sc->sc_freetds == NULL) { 459 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 460 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 461 OHCI_TD_ALIGN, &dma); 462 if (err) 463 return (NULL); 464 s = splusb(); 465 for(i = 0; i < OHCI_STD_CHUNK; i++) { 466 offs = i * OHCI_STD_SIZE; 467 std = KERNADDR(&dma, offs); 468 std->physaddr = DMAADDR(&dma, offs); 469 std->dma = dma; 470 std->offs = offs; 471 std->nexttd = sc->sc_freetds; 472 sc->sc_freetds = std; 473 } 474 splx(s); 475 } 476 477 s = splusb(); 478 std = sc->sc_freetds; 479 sc->sc_freetds = std->nexttd; 480 memset(&std->td, 0, sizeof(ohci_td_t)); 481 std->nexttd = NULL; 482 std->xfer = NULL; 483 ohci_hash_add_td(sc, std); 484 splx(s); 485 486 return (std); 487 } 488 489 void 490 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std) 491 { 492 int s; 493 494 s = splusb(); 495 ohci_hash_rem_td(sc, std); 496 std->nexttd = sc->sc_freetds; 497 sc->sc_freetds = std; 498 splx(s); 499 } 500 501 usbd_status 502 ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc, 503 int alen, int rd, usbd_xfer_handle xfer, 504 ohci_soft_td_t *sp, ohci_soft_td_t **ep) 505 { 506 ohci_soft_td_t *next, *cur; 507 ohci_physaddr_t dataphys, dataphysend; 508 u_int32_t tdflags; 509 int len, curlen; 510 usb_dma_t *dma = &xfer->dmabuf; 511 u_int16_t flags = xfer->flags; 512 513 DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen)); 514 515 len = alen; 516 cur = sp; 517 dataphys = DMAADDR(dma, 0); 518 dataphysend = OHCI_PAGE(dataphys + len - 1); 519 usb_syncmem(dma, 0, len, 520 rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 521 tdflags = HTOO32( 522 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 523 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) | 524 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR); 525 526 for (;;) { 527 next = ohci_alloc_std(sc); 528 if (next == NULL) 529 goto nomem; 530 531 /* The OHCI hardware can handle at most one page crossing. */ 532 if (OHCI_PAGE(dataphys) == dataphysend || 533 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) { 534 /* we can handle it in this TD */ 535 curlen = len; 536 } else { 537 /* must use multiple TDs, fill as much as possible. */ 538 curlen = 2 * OHCI_PAGE_SIZE - 539 (dataphys & (OHCI_PAGE_SIZE-1)); 540 /* the length must be a multiple of the max size */ 541 curlen -= curlen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize); 542 #ifdef DIAGNOSTIC 543 if (curlen == 0) 544 panic("ohci_alloc_std: curlen == 0"); 545 #endif 546 } 547 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x " 548 "dataphysend=0x%08x len=%d curlen=%d\n", 549 dataphys, dataphysend, 550 len, curlen)); 551 len -= curlen; 552 553 cur->td.td_flags = tdflags; 554 cur->td.td_cbp = HTOO32(dataphys); 555 cur->nexttd = next; 556 cur->td.td_nexttd = HTOO32(next->physaddr); 557 cur->td.td_be = HTOO32(dataphys + curlen - 1); 558 cur->len = curlen; 559 cur->flags = OHCI_ADD_LEN; 560 cur->xfer = xfer; 561 usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td), 562 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 563 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n", 564 dataphys, dataphys + curlen - 1)); 565 if (len == 0) 566 break; 567 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n")); 568 dataphys += curlen; 569 cur = next; 570 } 571 if (!rd && (flags & USBD_FORCE_SHORT_XFER) && 572 alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) { 573 /* Force a 0 length transfer at the end. */ 574 575 cur = next; 576 next = ohci_alloc_std(sc); 577 if (next == NULL) 578 goto nomem; 579 580 cur->td.td_flags = tdflags; 581 cur->td.td_cbp = 0; /* indicate 0 length packet */ 582 cur->nexttd = next; 583 cur->td.td_nexttd = HTOO32(next->physaddr); 584 cur->td.td_be = ~0; 585 cur->len = 0; 586 cur->flags = 0; 587 cur->xfer = xfer; 588 usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td), 589 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 590 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n")); 591 } 592 *ep = cur; 593 594 return (USBD_NORMAL_COMPLETION); 595 596 nomem: 597 /* XXX free chain */ 598 return (USBD_NOMEM); 599 } 600 601 #if 0 602 Static void 603 ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std, 604 ohci_soft_td_t *stdend) 605 { 606 ohci_soft_td_t *p; 607 608 for (; std != stdend; std = p) { 609 p = std->nexttd; 610 ohci_free_std(sc, std); 611 } 612 } 613 #endif 614 615 ohci_soft_itd_t * 616 ohci_alloc_sitd(ohci_softc_t *sc) 617 { 618 ohci_soft_itd_t *sitd; 619 usbd_status err; 620 int i, s, offs; 621 usb_dma_t dma; 622 623 if (sc->sc_freeitds == NULL) { 624 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n")); 625 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK, 626 OHCI_ITD_ALIGN, &dma); 627 if (err) 628 return (NULL); 629 s = splusb(); 630 for(i = 0; i < OHCI_SITD_CHUNK; i++) { 631 offs = i * OHCI_SITD_SIZE; 632 sitd = KERNADDR(&dma, offs); 633 sitd->physaddr = DMAADDR(&dma, offs); 634 sitd->dma = dma; 635 sitd->offs = offs; 636 sitd->nextitd = sc->sc_freeitds; 637 sc->sc_freeitds = sitd; 638 } 639 splx(s); 640 } 641 642 s = splusb(); 643 sitd = sc->sc_freeitds; 644 sc->sc_freeitds = sitd->nextitd; 645 memset(&sitd->itd, 0, sizeof(ohci_itd_t)); 646 sitd->nextitd = NULL; 647 sitd->xfer = NULL; 648 ohci_hash_add_itd(sc, sitd); 649 splx(s); 650 651 #ifdef DIAGNOSTIC 652 sitd->isdone = 0; 653 #endif 654 655 return (sitd); 656 } 657 658 void 659 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 660 { 661 int s; 662 663 DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd)); 664 665 #ifdef DIAGNOSTIC 666 if (!sitd->isdone) { 667 panic("ohci_free_sitd: sitd=%p not done", sitd); 668 return; 669 } 670 /* Warn double free */ 671 sitd->isdone = 0; 672 #endif 673 674 s = splusb(); 675 ohci_hash_rem_itd(sc, sitd); 676 sitd->nextitd = sc->sc_freeitds; 677 sc->sc_freeitds = sitd; 678 splx(s); 679 } 680 681 usbd_status 682 ohci_init(ohci_softc_t *sc) 683 { 684 ohci_soft_ed_t *sed, *psed; 685 usbd_status err; 686 int i; 687 u_int32_t s, ctl, rwc, ival, hcr, fm, per, rev, desca, descb; 688 689 DPRINTF(("ohci_init: start\n")); 690 #if defined(__OpenBSD__) 691 printf(","); 692 #else 693 printf("%s:", USBDEVNAME(sc->sc_bus.bdev)); 694 #endif 695 rev = OREAD4(sc, OHCI_REVISION); 696 printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev), 697 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 698 699 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 700 printf("%s: unsupported OHCI revision\n", 701 USBDEVNAME(sc->sc_bus.bdev)); 702 sc->sc_bus.usbrev = USBREV_UNKNOWN; 703 return (USBD_INVAL); 704 } 705 sc->sc_bus.usbrev = USBREV_1_0; 706 707 for (i = 0; i < OHCI_HASH_SIZE; i++) 708 LIST_INIT(&sc->sc_hash_tds[i]); 709 for (i = 0; i < OHCI_HASH_SIZE; i++) 710 LIST_INIT(&sc->sc_hash_itds[i]); 711 712 SIMPLEQ_INIT(&sc->sc_free_xfers); 713 714 #ifdef __NetBSD__ 715 usb_setup_reserve(sc, &sc->sc_dma_reserve, sc->sc_bus.dmatag, 716 USB_MEM_RESERVE); 717 #endif 718 719 /* XXX determine alignment by R/W */ 720 /* Allocate the HCCA area. */ 721 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 722 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 723 if (err) 724 return (err); 725 sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0); 726 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 727 728 sc->sc_eintrs = OHCI_NORMAL_INTRS; 729 730 /* Allocate dummy ED that starts the control list. */ 731 sc->sc_ctrl_head = ohci_alloc_sed(sc); 732 if (sc->sc_ctrl_head == NULL) { 733 err = USBD_NOMEM; 734 goto bad1; 735 } 736 sc->sc_ctrl_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 737 738 /* Allocate dummy ED that starts the bulk list. */ 739 sc->sc_bulk_head = ohci_alloc_sed(sc); 740 if (sc->sc_bulk_head == NULL) { 741 err = USBD_NOMEM; 742 goto bad2; 743 } 744 sc->sc_bulk_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 745 usb_syncmem(&sc->sc_bulk_head->dma, sc->sc_bulk_head->offs, 746 sizeof(sc->sc_bulk_head->ed), 747 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 748 749 /* Allocate dummy ED that starts the isochronous list. */ 750 sc->sc_isoc_head = ohci_alloc_sed(sc); 751 if (sc->sc_isoc_head == NULL) { 752 err = USBD_NOMEM; 753 goto bad3; 754 } 755 sc->sc_isoc_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 756 usb_syncmem(&sc->sc_isoc_head->dma, sc->sc_isoc_head->offs, 757 sizeof(sc->sc_isoc_head->ed), 758 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 759 760 /* Allocate all the dummy EDs that make up the interrupt tree. */ 761 for (i = 0; i < OHCI_NO_EDS; i++) { 762 sed = ohci_alloc_sed(sc); 763 if (sed == NULL) { 764 while (--i >= 0) 765 ohci_free_sed(sc, sc->sc_eds[i]); 766 err = USBD_NOMEM; 767 goto bad4; 768 } 769 /* All ED fields are set to 0. */ 770 sc->sc_eds[i] = sed; 771 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 772 if (i != 0) 773 psed = sc->sc_eds[(i-1) / 2]; 774 else 775 psed= sc->sc_isoc_head; 776 sed->next = psed; 777 sed->ed.ed_nexted = HTOO32(psed->physaddr); 778 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 779 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 780 } 781 /* 782 * Fill HCCA interrupt table. The bit reversal is to get 783 * the tree set up properly to spread the interrupts. 784 */ 785 for (i = 0; i < OHCI_NO_INTRS; i++) 786 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 787 HTOO32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 788 usb_syncmem(&sc->sc_hccadma, 0, OHCI_HCCA_SIZE, 789 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 790 791 #ifdef OHCI_DEBUG 792 if (ohcidebug > 15) { 793 for (i = 0; i < OHCI_NO_EDS; i++) { 794 printf("ed#%d ", i); 795 ohci_dump_ed(sc, sc->sc_eds[i]); 796 } 797 printf("iso "); 798 ohci_dump_ed(sc, sc->sc_isoc_head); 799 } 800 #endif 801 802 /* Preserve values programmed by SMM/BIOS but lost over reset. */ 803 ctl = OREAD4(sc, OHCI_CONTROL); 804 rwc = ctl & OHCI_RWC; 805 fm = OREAD4(sc, OHCI_FM_INTERVAL); 806 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 807 descb = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 808 809 /* Determine in what context we are running. */ 810 if (ctl & OHCI_IR) { 811 /* SMM active, request change */ 812 DPRINTF(("ohci_init: SMM active, request owner change\n")); 813 if ((sc->sc_intre & (OHCI_OC | OHCI_MIE)) == 814 (OHCI_OC | OHCI_MIE)) 815 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_MIE); 816 s = OREAD4(sc, OHCI_COMMAND_STATUS); 817 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 818 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 819 usb_delay_ms(&sc->sc_bus, 1); 820 ctl = OREAD4(sc, OHCI_CONTROL); 821 } 822 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_MIE); 823 if ((ctl & OHCI_IR) == 0) { 824 printf("%s: SMM does not respond, resetting\n", 825 USBDEVNAME(sc->sc_bus.bdev)); 826 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 827 goto reset; 828 } 829 #if 0 830 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */ 831 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 832 /* BIOS started controller. */ 833 DPRINTF(("ohci_init: BIOS active\n")); 834 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 835 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL | rwc); 836 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 837 } 838 #endif 839 } else { 840 DPRINTF(("ohci_init: cold started\n")); 841 reset: 842 /* Controller was cold started. */ 843 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 844 } 845 846 /* 847 * This reset should not be necessary according to the OHCI spec, but 848 * without it some controllers do not start. 849 */ 850 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 851 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 852 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 853 854 /* We now own the host controller and the bus has been reset. */ 855 856 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 857 /* Nominal time for a reset is 10 us. */ 858 for (i = 0; i < 10; i++) { 859 delay(10); 860 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 861 if (!hcr) 862 break; 863 } 864 if (hcr) { 865 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 866 err = USBD_IOERROR; 867 goto bad5; 868 } 869 #ifdef OHCI_DEBUG 870 if (ohcidebug > 15) 871 ohci_dumpregs(sc); 872 #endif 873 874 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 875 876 /* Set up HC registers. */ 877 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 878 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 879 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 880 /* disable all interrupts and then switch on all desired interrupts */ 881 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 882 /* switch on desired functional features */ 883 ctl = OREAD4(sc, OHCI_CONTROL); 884 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 885 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 886 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL | rwc; 887 /* And finally start it! */ 888 OWRITE4(sc, OHCI_CONTROL, ctl); 889 890 /* 891 * The controller is now OPERATIONAL. Set a some final 892 * registers that should be set earlier, but that the 893 * controller ignores when in the SUSPEND state. 894 */ 895 ival = OHCI_GET_IVAL(fm); 896 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 897 fm |= OHCI_FSMPS(ival) | ival; 898 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 899 per = OHCI_PERIODIC(ival); /* 90% periodic */ 900 OWRITE4(sc, OHCI_PERIODIC_START, per); 901 902 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */ 903 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP); 904 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 905 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY); 906 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca); 907 908 /* 909 * The AMD756 requires a delay before re-reading the register, 910 * otherwise it will occasionally report 0 ports. 911 */ 912 sc->sc_noport = 0; 913 for (i = 0; i < 10 && sc->sc_noport == 0; i++) { 914 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY); 915 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 916 } 917 918 #ifdef OHCI_DEBUG 919 if (ohcidebug > 5) 920 ohci_dumpregs(sc); 921 #endif 922 923 /* Set up the bus struct. */ 924 sc->sc_bus.methods = &ohci_bus_methods; 925 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 926 927 #if defined(__NetBSD__) || defined(__OpenBSD__) 928 sc->sc_control = sc->sc_intre = 0; 929 sc->sc_powerhook = powerhook_establish(USBDEVNAME(sc->sc_bus.bdev), 930 ohci_power, sc); 931 sc->sc_shutdownhook = shutdownhook_establish(ohci_shutdown, sc); 932 #endif 933 934 usb_callout_init(sc->sc_tmo_rhsc); 935 936 /* Finally, turn on interrupts. */ 937 DPRINTFN(1,("ohci_init: enabling\n")); 938 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 939 940 return (USBD_NORMAL_COMPLETION); 941 942 bad5: 943 for (i = 0; i < OHCI_NO_EDS; i++) 944 ohci_free_sed(sc, sc->sc_eds[i]); 945 bad4: 946 ohci_free_sed(sc, sc->sc_isoc_head); 947 bad3: 948 ohci_free_sed(sc, sc->sc_bulk_head); 949 bad2: 950 ohci_free_sed(sc, sc->sc_ctrl_head); 951 bad1: 952 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 953 return (err); 954 } 955 956 usbd_status 957 ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 958 { 959 #if defined(__NetBSD__) || defined(__OpenBSD__) 960 struct ohci_softc *sc = (struct ohci_softc *)bus; 961 #endif 962 usbd_status status; 963 964 status = usb_allocmem(&sc->sc_bus, size, 0, dma); 965 #ifdef __NetBSD__ 966 if (status == USBD_NOMEM) 967 status = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size); 968 #endif 969 return status; 970 } 971 972 void 973 ohci_freem(struct usbd_bus *bus, usb_dma_t *dma) 974 { 975 #if defined(__NetBSD__) || defined(__OpenBSD__) 976 struct ohci_softc *sc = (struct ohci_softc *)bus; 977 #endif 978 #ifdef __NetBSD__ 979 if (dma->block->flags & USB_DMA_RESERVE) { 980 usb_reserve_freem(&((struct ohci_softc *)bus)->sc_dma_reserve, 981 dma); 982 return; 983 } 984 #endif 985 usb_freemem(&sc->sc_bus, dma); 986 } 987 988 usbd_xfer_handle 989 ohci_allocx(struct usbd_bus *bus) 990 { 991 struct ohci_softc *sc = (struct ohci_softc *)bus; 992 usbd_xfer_handle xfer; 993 994 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 995 if (xfer != NULL) { 996 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 997 #ifdef DIAGNOSTIC 998 if (xfer->busy_free != XFER_FREE) { 999 printf("ohci_allocx: xfer=%p not free, 0x%08x\n", xfer, 1000 xfer->busy_free); 1001 } 1002 #endif 1003 } else { 1004 xfer = malloc(sizeof(struct ohci_xfer), M_USB, M_NOWAIT); 1005 } 1006 if (xfer != NULL) { 1007 memset(xfer, 0, sizeof (struct ohci_xfer)); 1008 #ifdef DIAGNOSTIC 1009 xfer->busy_free = XFER_BUSY; 1010 #endif 1011 } 1012 return (xfer); 1013 } 1014 1015 void 1016 ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 1017 { 1018 struct ohci_softc *sc = (struct ohci_softc *)bus; 1019 1020 #ifdef DIAGNOSTIC 1021 if (xfer->busy_free != XFER_BUSY) { 1022 printf("ohci_freex: xfer=%p not busy, 0x%08x\n", xfer, 1023 xfer->busy_free); 1024 } 1025 xfer->busy_free = XFER_FREE; 1026 #endif 1027 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 1028 } 1029 1030 /* 1031 * Shut down the controller when the system is going down. 1032 */ 1033 void 1034 ohci_shutdown(void *v) 1035 { 1036 ohci_softc_t *sc = v; 1037 int s; 1038 1039 DPRINTF(("ohci_shutdown: stopping the HC\n")); 1040 1041 /* 1042 * Use polling mode to prevent the interrupts shutting 1043 * us down before we shut them down. 1044 */ 1045 s = splhardusb(); 1046 sc->sc_bus.use_polling++; 1047 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1048 sc->sc_bus.use_polling--; 1049 splx(s); 1050 } 1051 1052 /* 1053 * Handle suspend/resume. 1054 * 1055 * We need to switch to polling mode here, because this routine is 1056 * called from an interupt context. This is all right since we 1057 * are almost suspended anyway. 1058 */ 1059 void 1060 ohci_power(int why, void *v) 1061 { 1062 ohci_softc_t *sc = v; 1063 u_int32_t ctl; 1064 int s; 1065 1066 #ifdef OHCI_DEBUG 1067 DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why)); 1068 ohci_dumpregs(sc); 1069 #endif 1070 1071 s = splhardusb(); 1072 switch (why) { 1073 case PWR_SUSPEND: 1074 case PWR_STANDBY: 1075 sc->sc_bus.use_polling++; 1076 ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK; 1077 if (sc->sc_control == 0) { 1078 /* 1079 * Preserve register values, in case that APM BIOS 1080 * does not recover them. 1081 */ 1082 sc->sc_control = ctl; 1083 sc->sc_intre = OREAD4(sc, OHCI_INTERRUPT_ENABLE); 1084 } 1085 ctl |= OHCI_HCFS_SUSPEND; 1086 OWRITE4(sc, OHCI_CONTROL, ctl); 1087 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1088 sc->sc_bus.use_polling--; 1089 break; 1090 case PWR_RESUME: 1091 sc->sc_bus.use_polling++; 1092 /* Some broken BIOSes do not recover these values */ 1093 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 1094 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 1095 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 1096 if (sc->sc_intre) 1097 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, 1098 sc->sc_intre & (OHCI_ALL_INTRS | OHCI_MIE)); 1099 if (sc->sc_control) 1100 ctl = sc->sc_control; 1101 else 1102 ctl = OREAD4(sc, OHCI_CONTROL); 1103 ctl |= OHCI_HCFS_RESUME; 1104 OWRITE4(sc, OHCI_CONTROL, ctl); 1105 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 1106 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL; 1107 OWRITE4(sc, OHCI_CONTROL, ctl); 1108 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 1109 sc->sc_control = sc->sc_intre = 0; 1110 sc->sc_bus.use_polling--; 1111 break; 1112 case PWR_SOFTSUSPEND: 1113 case PWR_SOFTSTANDBY: 1114 case PWR_SOFTRESUME: 1115 break; 1116 } 1117 splx(s); 1118 } 1119 1120 #ifdef OHCI_DEBUG 1121 void 1122 ohci_dumpregs(ohci_softc_t *sc) 1123 { 1124 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 1125 OREAD4(sc, OHCI_REVISION), 1126 OREAD4(sc, OHCI_CONTROL), 1127 OREAD4(sc, OHCI_COMMAND_STATUS))); 1128 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 1129 OREAD4(sc, OHCI_INTERRUPT_STATUS), 1130 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 1131 OREAD4(sc, OHCI_INTERRUPT_DISABLE))); 1132 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 1133 OREAD4(sc, OHCI_HCCA), 1134 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 1135 OREAD4(sc, OHCI_CONTROL_HEAD_ED))); 1136 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 1137 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 1138 OREAD4(sc, OHCI_BULK_HEAD_ED), 1139 OREAD4(sc, OHCI_BULK_CURRENT_ED))); 1140 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 1141 OREAD4(sc, OHCI_DONE_HEAD), 1142 OREAD4(sc, OHCI_FM_INTERVAL), 1143 OREAD4(sc, OHCI_FM_REMAINING))); 1144 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 1145 OREAD4(sc, OHCI_FM_NUMBER), 1146 OREAD4(sc, OHCI_PERIODIC_START), 1147 OREAD4(sc, OHCI_LS_THRESHOLD))); 1148 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n", 1149 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 1150 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 1151 OREAD4(sc, OHCI_RH_STATUS))); 1152 DPRINTF((" port1=0x%08x port2=0x%08x\n", 1153 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 1154 OREAD4(sc, OHCI_RH_PORT_STATUS(2)))); 1155 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n", 1156 O32TOH(sc->sc_hcca->hcca_frame_number), 1157 O32TOH(sc->sc_hcca->hcca_done_head))); 1158 } 1159 #endif 1160 1161 Static int ohci_intr1(ohci_softc_t *); 1162 1163 int 1164 ohci_intr(void *p) 1165 { 1166 ohci_softc_t *sc = p; 1167 1168 if (sc == NULL || sc->sc_dying) 1169 return (0); 1170 1171 /* If we get an interrupt while polling, then just ignore it. */ 1172 if (sc->sc_bus.use_polling) { 1173 #ifdef DIAGNOSTIC 1174 DPRINTFN(16, ("ohci_intr: ignored interrupt while polling\n")); 1175 #endif 1176 /* for level triggered intrs, should do something to ack */ 1177 OWRITE4(sc, OHCI_INTERRUPT_STATUS, 1178 OREAD4(sc, OHCI_INTERRUPT_STATUS)); 1179 1180 return (0); 1181 } 1182 1183 return (ohci_intr1(sc)); 1184 } 1185 1186 Static int 1187 ohci_intr1(ohci_softc_t *sc) 1188 { 1189 u_int32_t intrs, eintrs; 1190 1191 DPRINTFN(14,("ohci_intr1: enter\n")); 1192 1193 /* In case the interrupt occurs before initialization has completed. */ 1194 if (sc == NULL || sc->sc_hcca == NULL) { 1195 #ifdef DIAGNOSTIC 1196 printf("ohci_intr: sc->sc_hcca == NULL\n"); 1197 #endif 1198 return (0); 1199 } 1200 1201 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1202 if (!intrs) 1203 return (0); 1204 1205 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs & ~(OHCI_MIE|OHCI_WDH)); /* Acknowledge */ 1206 eintrs = intrs & sc->sc_eintrs; 1207 if (!eintrs) 1208 return (0); 1209 1210 sc->sc_bus.intr_context++; 1211 sc->sc_bus.no_intrs++; 1212 DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 1213 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 1214 (u_int)eintrs)); 1215 1216 if (eintrs & OHCI_SO) { 1217 sc->sc_overrun_cnt++; 1218 if (usbd_ratecheck(&sc->sc_overrun_ntc)) { 1219 printf("%s: %u scheduling overruns\n", 1220 USBDEVNAME(sc->sc_bus.bdev), sc->sc_overrun_cnt); 1221 sc->sc_overrun_cnt = 0; 1222 } 1223 /* XXX do what */ 1224 eintrs &= ~OHCI_SO; 1225 } 1226 if (eintrs & OHCI_WDH) { 1227 /* 1228 * We block the interrupt below, and reenable it later from 1229 * ohci_softintr(). 1230 */ 1231 usb_schedsoftintr(&sc->sc_bus); 1232 } 1233 if (eintrs & OHCI_RD) { 1234 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev)); 1235 /* XXX process resume detect */ 1236 } 1237 if (eintrs & OHCI_UE) { 1238 printf("%s: unrecoverable error, controller halted\n", 1239 USBDEVNAME(sc->sc_bus.bdev)); 1240 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1241 /* XXX what else */ 1242 } 1243 if (eintrs & OHCI_RHSC) { 1244 /* 1245 * We block the interrupt below, and reenable it later from 1246 * a timeout. 1247 */ 1248 ohci_rhsc(sc, sc->sc_intrxfer); 1249 /* Do not allow RHSC interrupts > 1 per second */ 1250 usb_callout(sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc); 1251 } 1252 1253 sc->sc_bus.intr_context--; 1254 1255 if (eintrs != 0) { 1256 /* Block unprocessed interrupts. */ 1257 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs); 1258 sc->sc_eintrs &= ~eintrs; 1259 DPRINTFN(1, ("%s: blocking intrs 0x%x\n", 1260 USBDEVNAME(sc->sc_bus.bdev), eintrs)); 1261 } 1262 1263 return (1); 1264 } 1265 1266 void 1267 ohci_rhsc_enable(void *v_sc) 1268 { 1269 ohci_softc_t *sc = v_sc; 1270 int s; 1271 1272 s = splhardusb(); 1273 sc->sc_eintrs |= OHCI_RHSC; 1274 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1275 splx(s); 1276 } 1277 1278 #ifdef OHCI_DEBUG 1279 const char *ohci_cc_strs[] = { 1280 "NO_ERROR", 1281 "CRC", 1282 "BIT_STUFFING", 1283 "DATA_TOGGLE_MISMATCH", 1284 "STALL", 1285 "DEVICE_NOT_RESPONDING", 1286 "PID_CHECK_FAILURE", 1287 "UNEXPECTED_PID", 1288 "DATA_OVERRUN", 1289 "DATA_UNDERRUN", 1290 "BUFFER_OVERRUN", 1291 "BUFFER_UNDERRUN", 1292 "reserved", 1293 "reserved", 1294 "NOT_ACCESSED", 1295 "NOT_ACCESSED", 1296 }; 1297 #endif 1298 1299 void 1300 ohci_softintr(void *v) 1301 { 1302 ohci_softc_t *sc = v; 1303 ohci_soft_itd_t *sitd, *sidone, *sitdnext; 1304 ohci_soft_td_t *std, *sdone, *stdnext; 1305 usbd_xfer_handle xfer; 1306 struct ohci_pipe *opipe; 1307 int len, cc, s; 1308 int i, j, actlen, iframes, uedir; 1309 ohci_physaddr_t done; 1310 1311 DPRINTFN(10,("ohci_softintr: enter\n")); 1312 1313 sc->sc_bus.intr_context++; 1314 1315 s = splhardusb(); 1316 usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head), 1317 sizeof(sc->sc_hcca->hcca_done_head), 1318 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1319 done = O32TOH(sc->sc_hcca->hcca_done_head) & ~OHCI_DONE_INTRS; 1320 sc->sc_hcca->hcca_done_head = 0; 1321 usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head), 1322 sizeof(sc->sc_hcca->hcca_done_head), 1323 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1324 OWRITE4(sc, OHCI_INTERRUPT_STATUS, OHCI_WDH); 1325 sc->sc_eintrs |= OHCI_WDH; 1326 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_WDH); 1327 splx(s); 1328 1329 /* Reverse the done list. */ 1330 for (sdone = NULL, sidone = NULL; done != 0; ) { 1331 std = ohci_hash_find_td(sc, done); 1332 if (std != NULL) { 1333 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 1334 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1335 std->dnext = sdone; 1336 done = O32TOH(std->td.td_nexttd); 1337 sdone = std; 1338 DPRINTFN(10,("add TD %p\n", std)); 1339 continue; 1340 } 1341 sitd = ohci_hash_find_itd(sc, done); 1342 if (sitd != NULL) { 1343 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 1344 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1345 sitd->dnext = sidone; 1346 done = O32TOH(sitd->itd.itd_nextitd); 1347 sidone = sitd; 1348 DPRINTFN(5,("add ITD %p\n", sitd)); 1349 continue; 1350 } 1351 panic("ohci_softintr: addr 0x%08lx not found", (u_long)done); 1352 } 1353 1354 DPRINTFN(10,("ohci_softintr: sdone=%p sidone=%p\n", sdone, sidone)); 1355 1356 #ifdef OHCI_DEBUG 1357 if (ohcidebug > 10) { 1358 DPRINTF(("ohci_process_done: TD done:\n")); 1359 ohci_dump_tds(sc, sdone); 1360 } 1361 #endif 1362 1363 for (std = sdone; std; std = stdnext) { 1364 xfer = std->xfer; 1365 stdnext = std->dnext; 1366 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n", 1367 std, xfer, xfer ? xfer->hcpriv : 0)); 1368 if (xfer == NULL) { 1369 /* 1370 * xfer == NULL: There seems to be no xfer associated 1371 * with this TD. It is tailp that happened to end up on 1372 * the done queue. 1373 * Shouldn't happen, but some chips are broken(?). 1374 */ 1375 continue; 1376 } 1377 if (xfer->status == USBD_CANCELLED || 1378 xfer->status == USBD_TIMEOUT) { 1379 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1380 xfer)); 1381 /* Handled by abort routine. */ 1382 continue; 1383 } 1384 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 1385 1386 len = std->len; 1387 if (std->td.td_cbp != 0) 1388 len -= O32TOH(std->td.td_be) - 1389 O32TOH(std->td.td_cbp) + 1; 1390 DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", len, 1391 std->flags)); 1392 if (std->flags & OHCI_ADD_LEN) 1393 xfer->actlen += len; 1394 1395 cc = OHCI_TD_GET_CC(O32TOH(std->td.td_flags)); 1396 if (cc == OHCI_CC_NO_ERROR) { 1397 if (std->flags & OHCI_CALL_DONE) { 1398 xfer->status = USBD_NORMAL_COMPLETION; 1399 s = splusb(); 1400 usb_transfer_complete(xfer); 1401 splx(s); 1402 } 1403 ohci_free_std(sc, std); 1404 } else { 1405 /* 1406 * Endpoint is halted. First unlink all the TDs 1407 * belonging to the failed transfer, and then restart 1408 * the endpoint. 1409 */ 1410 ohci_soft_td_t *p, *n; 1411 opipe = (struct ohci_pipe *)xfer->pipe; 1412 1413 DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n", 1414 OHCI_TD_GET_CC(O32TOH(std->td.td_flags)), 1415 ohci_cc_strs[OHCI_TD_GET_CC(O32TOH(std->td.td_flags))])); 1416 1417 /* remove TDs */ 1418 for (p = std; p->xfer == xfer; p = n) { 1419 n = p->nexttd; 1420 ohci_free_std(sc, p); 1421 } 1422 1423 /* clear halt */ 1424 opipe->sed->ed.ed_headp = HTOO32(p->physaddr); 1425 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1426 1427 if (cc == OHCI_CC_STALL) 1428 xfer->status = USBD_STALLED; 1429 else 1430 xfer->status = USBD_IOERROR; 1431 s = splusb(); 1432 usb_transfer_complete(xfer); 1433 splx(s); 1434 } 1435 } 1436 1437 #ifdef OHCI_DEBUG 1438 if (ohcidebug > 10) { 1439 DPRINTF(("ohci_softintr: ITD done:\n")); 1440 ohci_dump_itds(sc, sidone); 1441 } 1442 #endif 1443 1444 for (sitd = sidone; sitd != NULL; sitd = sitdnext) { 1445 xfer = sitd->xfer; 1446 sitdnext = sitd->dnext; 1447 DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n", 1448 sitd, xfer, xfer ? xfer->hcpriv : 0)); 1449 if (xfer == NULL) 1450 continue; 1451 if (xfer->status == USBD_CANCELLED || 1452 xfer->status == USBD_TIMEOUT) { 1453 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1454 xfer)); 1455 /* Handled by abort routine. */ 1456 continue; 1457 } 1458 #ifdef DIAGNOSTIC 1459 if (sitd->isdone) 1460 printf("ohci_softintr: sitd=%p is done\n", sitd); 1461 sitd->isdone = 1; 1462 #endif 1463 if (sitd->flags & OHCI_CALL_DONE) { 1464 ohci_soft_itd_t *next; 1465 1466 opipe = (struct ohci_pipe *)xfer->pipe; 1467 opipe->u.iso.inuse -= xfer->nframes; 1468 uedir = UE_GET_DIR(xfer->pipe->endpoint->edesc-> 1469 bEndpointAddress); 1470 xfer->status = USBD_NORMAL_COMPLETION; 1471 actlen = 0; 1472 for (i = 0, sitd = xfer->hcpriv;; 1473 sitd = next) { 1474 next = sitd->nextitd; 1475 if (OHCI_ITD_GET_CC(O32TOH(sitd-> 1476 itd.itd_flags)) != OHCI_CC_NO_ERROR) 1477 xfer->status = USBD_IOERROR; 1478 /* For input, update frlengths with actual */ 1479 /* XXX anything necessary for output? */ 1480 if (uedir == UE_DIR_IN && 1481 xfer->status == USBD_NORMAL_COMPLETION) { 1482 iframes = OHCI_ITD_GET_FC(O32TOH( 1483 sitd->itd.itd_flags)); 1484 for (j = 0; j < iframes; i++, j++) { 1485 len = O16TOH(sitd-> 1486 itd.itd_offset[j]); 1487 if ((OHCI_ITD_PSW_GET_CC(len) & 1488 OHCI_CC_NOT_ACCESSED_MASK) 1489 == OHCI_CC_NOT_ACCESSED) 1490 len = 0; 1491 else 1492 len = OHCI_ITD_PSW_LENGTH(len); 1493 xfer->frlengths[i] = len; 1494 actlen += len; 1495 } 1496 } 1497 if (sitd->flags & OHCI_CALL_DONE) 1498 break; 1499 ohci_free_sitd(sc, sitd); 1500 } 1501 ohci_free_sitd(sc, sitd); 1502 if (uedir == UE_DIR_IN && 1503 xfer->status == USBD_NORMAL_COMPLETION) 1504 xfer->actlen = actlen; 1505 xfer->hcpriv = NULL; 1506 1507 s = splusb(); 1508 usb_transfer_complete(xfer); 1509 splx(s); 1510 } 1511 } 1512 1513 #ifdef USB_USE_SOFTINTR 1514 if (sc->sc_softwake) { 1515 sc->sc_softwake = 0; 1516 wakeup(&sc->sc_softwake); 1517 } 1518 #endif /* USB_USE_SOFTINTR */ 1519 1520 sc->sc_bus.intr_context--; 1521 DPRINTFN(10,("ohci_softintr: done:\n")); 1522 } 1523 1524 void 1525 ohci_device_ctrl_done(usbd_xfer_handle xfer) 1526 { 1527 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1528 int len = UGETW(xfer->request.wLength); 1529 int isread = (xfer->request.bmRequestType & UT_READ); 1530 1531 DPRINTFN(10,("ohci_device_ctrl_done: xfer=%p\n", xfer)); 1532 1533 #ifdef DIAGNOSTIC 1534 if (!(xfer->rqflags & URQ_REQUEST)) { 1535 panic("ohci_device_ctrl_done: not a request"); 1536 } 1537 #endif 1538 if (len) 1539 usb_syncmem(&xfer->dmabuf, 0, len, 1540 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1541 usb_syncmem(&opipe->u.ctl.reqdma, 0, 1542 sizeof(usb_device_request_t), BUS_DMASYNC_POSTWRITE); 1543 } 1544 1545 void 1546 ohci_device_intr_done(usbd_xfer_handle xfer) 1547 { 1548 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1549 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1550 ohci_soft_ed_t *sed = opipe->sed; 1551 ohci_soft_td_t *data, *tail; 1552 int isread = 1553 (UE_GET_DIR(xfer->pipe->endpoint->edesc->bEndpointAddress) == UE_DIR_IN); 1554 1555 1556 DPRINTFN(10,("ohci_device_intr_done: xfer=%p, actlen=%d\n", 1557 xfer, xfer->actlen)); 1558 1559 usb_syncmem(&xfer->dmabuf, 0, xfer->length, 1560 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1561 if (xfer->pipe->repeat) { 1562 data = opipe->tail.td; 1563 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 1564 if (tail == NULL) { 1565 xfer->status = USBD_NOMEM; 1566 return; 1567 } 1568 tail->xfer = NULL; 1569 1570 data->td.td_flags = HTOO32( 1571 OHCI_TD_IN | OHCI_TD_NOCC | 1572 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 1573 if (xfer->flags & USBD_SHORT_XFER_OK) 1574 data->td.td_flags |= HTOO32(OHCI_TD_R); 1575 data->td.td_cbp = HTOO32(DMAADDR(&xfer->dmabuf, 0)); 1576 data->nexttd = tail; 1577 data->td.td_nexttd = HTOO32(tail->physaddr); 1578 data->td.td_be = HTOO32(O32TOH(data->td.td_cbp) + 1579 xfer->length - 1); 1580 data->len = xfer->length; 1581 data->xfer = xfer; 1582 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1583 usb_syncmem(&data->dma, data->offs, sizeof(data->td), 1584 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1585 xfer->hcpriv = data; 1586 xfer->actlen = 0; 1587 1588 sed->ed.ed_tailp = HTOO32(tail->physaddr); 1589 usb_syncmem(&sed->dma, 1590 sed->offs + offsetof(ohci_ed_t, ed_tailp), 1591 sizeof(sed->ed.ed_tailp), 1592 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1593 opipe->tail.td = tail; 1594 } 1595 } 1596 1597 void 1598 ohci_device_bulk_done(usbd_xfer_handle xfer) 1599 { 1600 int isread = 1601 (UE_GET_DIR(xfer->pipe->endpoint->edesc->bEndpointAddress) == UE_DIR_IN); 1602 1603 DPRINTFN(10,("ohci_device_bulk_done: xfer=%p, actlen=%d\n", 1604 xfer, xfer->actlen)); 1605 usb_syncmem(&xfer->dmabuf, 0, xfer->length, 1606 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1607 } 1608 1609 void 1610 ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer) 1611 { 1612 usbd_pipe_handle pipe; 1613 u_char *p; 1614 int i, m; 1615 int hstatus; 1616 1617 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1618 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n", 1619 sc, xfer, hstatus)); 1620 1621 if (xfer == NULL) { 1622 /* Just ignore the change. */ 1623 return; 1624 } 1625 1626 pipe = xfer->pipe; 1627 1628 p = KERNADDR(&xfer->dmabuf, 0); 1629 m = min(sc->sc_noport, xfer->length * 8 - 1); 1630 memset(p, 0, xfer->length); 1631 for (i = 1; i <= m; i++) { 1632 /* Pick out CHANGE bits from the status reg. */ 1633 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1634 p[i/8] |= 1 << (i%8); 1635 } 1636 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 1637 xfer->actlen = xfer->length; 1638 xfer->status = USBD_NORMAL_COMPLETION; 1639 1640 usb_transfer_complete(xfer); 1641 } 1642 1643 void 1644 ohci_root_intr_done(usbd_xfer_handle xfer) 1645 { 1646 } 1647 1648 void 1649 ohci_root_ctrl_done(usbd_xfer_handle xfer) 1650 { 1651 } 1652 1653 /* 1654 * Wait here until controller claims to have an interrupt. 1655 * Then call ohci_intr and return. Use timeout to avoid waiting 1656 * too long. 1657 */ 1658 void 1659 ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer) 1660 { 1661 int timo; 1662 u_int32_t intrs; 1663 1664 xfer->status = USBD_IN_PROGRESS; 1665 for (timo = xfer->timeout; timo >= 0; timo--) { 1666 usb_delay_ms(&sc->sc_bus, 1); 1667 if (sc->sc_dying) 1668 break; 1669 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 1670 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs)); 1671 #ifdef OHCI_DEBUG 1672 if (ohcidebug > 15) 1673 ohci_dumpregs(sc); 1674 #endif 1675 if (intrs) { 1676 ohci_intr1(sc); 1677 if (xfer->status != USBD_IN_PROGRESS) 1678 return; 1679 } 1680 } 1681 1682 /* Timeout */ 1683 DPRINTF(("ohci_waitintr: timeout\n")); 1684 xfer->status = USBD_TIMEOUT; 1685 usb_transfer_complete(xfer); 1686 /* XXX should free TD */ 1687 } 1688 1689 void 1690 ohci_poll(struct usbd_bus *bus) 1691 { 1692 ohci_softc_t *sc = (ohci_softc_t *)bus; 1693 #ifdef OHCI_DEBUG 1694 static int last; 1695 int new; 1696 new = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1697 if (new != last) { 1698 DPRINTFN(10,("ohci_poll: intrs=0x%04x\n", new)); 1699 last = new; 1700 } 1701 #endif 1702 1703 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) 1704 ohci_intr1(sc); 1705 } 1706 1707 usbd_status 1708 ohci_device_request(usbd_xfer_handle xfer) 1709 { 1710 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1711 usb_device_request_t *req = &xfer->request; 1712 usbd_device_handle dev = opipe->pipe.device; 1713 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1714 int addr = dev->address; 1715 ohci_soft_td_t *setup, *stat, *next, *tail; 1716 ohci_soft_ed_t *sed; 1717 int isread; 1718 int len; 1719 usbd_status err; 1720 int s; 1721 1722 isread = req->bmRequestType & UT_READ; 1723 len = UGETW(req->wLength); 1724 1725 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 1726 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 1727 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1728 UGETW(req->wIndex), len, addr, 1729 opipe->pipe.endpoint->edesc->bEndpointAddress)); 1730 1731 setup = opipe->tail.td; 1732 stat = ohci_alloc_std(sc); 1733 if (stat == NULL) { 1734 err = USBD_NOMEM; 1735 goto bad1; 1736 } 1737 tail = ohci_alloc_std(sc); 1738 if (tail == NULL) { 1739 err = USBD_NOMEM; 1740 goto bad2; 1741 } 1742 tail->xfer = NULL; 1743 1744 sed = opipe->sed; 1745 opipe->u.ctl.length = len; 1746 1747 /* Update device address and length since they may have changed 1748 during the setup of the control pipe in usbd_new_device(). */ 1749 /* XXX This only needs to be done once, but it's too early in open. */ 1750 /* XXXX Should not touch ED here! */ 1751 1752 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 1753 sizeof(sed->ed.ed_flags), 1754 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1755 sed->ed.ed_flags = HTOO32( 1756 (O32TOH(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) | 1757 OHCI_ED_SET_FA(addr) | 1758 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize))); 1759 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 1760 sizeof(sed->ed.ed_flags), 1761 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1762 1763 next = stat; 1764 1765 /* Set up data transaction */ 1766 if (len != 0) { 1767 ohci_soft_td_t *std = stat; 1768 1769 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 1770 std, &stat); 1771 stat = stat->nexttd; /* point at free TD */ 1772 if (err) 1773 goto bad3; 1774 /* Start toggle at 1 and then use the carried toggle. */ 1775 std->td.td_flags &= HTOO32(~OHCI_TD_TOGGLE_MASK); 1776 std->td.td_flags |= HTOO32(OHCI_TD_TOGGLE_1); 1777 usb_syncmem(&std->dma, 1778 std->offs + offsetof(ohci_td_t, td_flags), 1779 sizeof(std->td.td_flags), 1780 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1781 } 1782 1783 memcpy(KERNADDR(&opipe->u.ctl.reqdma, 0), req, sizeof *req); 1784 usb_syncmem(&opipe->u.ctl.reqdma, 0, sizeof *req, BUS_DMASYNC_PREWRITE); 1785 1786 setup->td.td_flags = HTOO32(OHCI_TD_SETUP | OHCI_TD_NOCC | 1787 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1788 setup->td.td_cbp = HTOO32(DMAADDR(&opipe->u.ctl.reqdma, 0)); 1789 setup->nexttd = next; 1790 setup->td.td_nexttd = HTOO32(next->physaddr); 1791 setup->td.td_be = HTOO32(O32TOH(setup->td.td_cbp) + sizeof *req - 1); 1792 setup->len = 0; 1793 setup->xfer = xfer; 1794 setup->flags = 0; 1795 xfer->hcpriv = setup; 1796 usb_syncmem(&setup->dma, setup->offs, sizeof(setup->td), 1797 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1798 1799 stat->td.td_flags = HTOO32( 1800 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | 1801 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1802 stat->td.td_cbp = 0; 1803 stat->nexttd = tail; 1804 stat->td.td_nexttd = HTOO32(tail->physaddr); 1805 stat->td.td_be = 0; 1806 stat->flags = OHCI_CALL_DONE; 1807 stat->len = 0; 1808 stat->xfer = xfer; 1809 usb_syncmem(&stat->dma, stat->offs, sizeof(stat->td), 1810 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1811 1812 #ifdef OHCI_DEBUG 1813 if (ohcidebug > 5) { 1814 DPRINTF(("ohci_device_request:\n")); 1815 ohci_dump_ed(sc, sed); 1816 ohci_dump_tds(sc, setup); 1817 } 1818 #endif 1819 1820 /* Insert ED in schedule */ 1821 s = splusb(); 1822 sed->ed.ed_tailp = HTOO32(tail->physaddr); 1823 usb_syncmem(&sed->dma, 1824 sed->offs + offsetof(ohci_ed_t, ed_tailp), 1825 sizeof(sed->ed.ed_tailp), 1826 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1827 opipe->tail.td = tail; 1828 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1829 if (xfer->timeout && !sc->sc_bus.use_polling) { 1830 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 1831 ohci_timeout, xfer); 1832 } 1833 splx(s); 1834 1835 #ifdef OHCI_DEBUG 1836 if (ohcidebug > 20) { 1837 delay(10000); 1838 DPRINTF(("ohci_device_request: status=%x\n", 1839 OREAD4(sc, OHCI_COMMAND_STATUS))); 1840 ohci_dumpregs(sc); 1841 printf("ctrl head:\n"); 1842 ohci_dump_ed(sc, sc->sc_ctrl_head); 1843 printf("sed:\n"); 1844 ohci_dump_ed(sc, sed); 1845 ohci_dump_tds(sc, setup); 1846 } 1847 #endif 1848 1849 return (USBD_NORMAL_COMPLETION); 1850 1851 bad3: 1852 ohci_free_std(sc, tail); 1853 bad2: 1854 ohci_free_std(sc, stat); 1855 bad1: 1856 return (err); 1857 } 1858 1859 /* 1860 * Add an ED to the schedule. Called at splusb(). 1861 */ 1862 void 1863 ohci_add_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1864 { 1865 DPRINTFN(8,("ohci_add_ed: sed=%p head=%p\n", sed, head)); 1866 1867 SPLUSBCHECK; 1868 usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted), 1869 sizeof(head->ed.ed_nexted), 1870 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1871 sed->next = head->next; 1872 sed->ed.ed_nexted = head->ed.ed_nexted; 1873 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted), 1874 sizeof(sed->ed.ed_nexted), 1875 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1876 head->next = sed; 1877 head->ed.ed_nexted = HTOO32(sed->physaddr); 1878 usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted), 1879 sizeof(head->ed.ed_nexted), 1880 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1881 } 1882 1883 /* 1884 * Remove an ED from the schedule. Called at splusb(). 1885 */ 1886 void 1887 ohci_rem_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1888 { 1889 ohci_soft_ed_t *p; 1890 1891 SPLUSBCHECK; 1892 1893 /* XXX */ 1894 for (p = head; p != NULL && p->next != sed; p = p->next) 1895 ; 1896 if (p == NULL) 1897 panic("ohci_rem_ed: ED not found"); 1898 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted), 1899 sizeof(sed->ed.ed_nexted), 1900 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1901 p->next = sed->next; 1902 p->ed.ed_nexted = sed->ed.ed_nexted; 1903 usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted), 1904 sizeof(p->ed.ed_nexted), 1905 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1906 } 1907 1908 /* 1909 * When a transfer is completed the TD is added to the done queue by 1910 * the host controller. This queue is the processed by software. 1911 * Unfortunately the queue contains the physical address of the TD 1912 * and we have no simple way to translate this back to a kernel address. 1913 * To make the translation possible (and fast) we use a hash table of 1914 * TDs currently in the schedule. The physical address is used as the 1915 * hash value. 1916 */ 1917 1918 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1919 /* Called at splusb() */ 1920 void 1921 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1922 { 1923 int h = HASH(std->physaddr); 1924 1925 SPLUSBCHECK; 1926 1927 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1928 } 1929 1930 /* Called at splusb() */ 1931 void 1932 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1933 { 1934 SPLUSBCHECK; 1935 1936 LIST_REMOVE(std, hnext); 1937 } 1938 1939 ohci_soft_td_t * 1940 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a) 1941 { 1942 int h = HASH(a); 1943 ohci_soft_td_t *std; 1944 1945 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1946 std != NULL; 1947 std = LIST_NEXT(std, hnext)) 1948 if (std->physaddr == a) 1949 return (std); 1950 return (NULL); 1951 } 1952 1953 /* Called at splusb() */ 1954 void 1955 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1956 { 1957 int h = HASH(sitd->physaddr); 1958 1959 SPLUSBCHECK; 1960 1961 DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n", 1962 sitd, (u_long)sitd->physaddr)); 1963 1964 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext); 1965 } 1966 1967 /* Called at splusb() */ 1968 void 1969 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1970 { 1971 SPLUSBCHECK; 1972 1973 DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n", 1974 sitd, (u_long)sitd->physaddr)); 1975 1976 LIST_REMOVE(sitd, hnext); 1977 } 1978 1979 ohci_soft_itd_t * 1980 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a) 1981 { 1982 int h = HASH(a); 1983 ohci_soft_itd_t *sitd; 1984 1985 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]); 1986 sitd != NULL; 1987 sitd = LIST_NEXT(sitd, hnext)) 1988 if (sitd->physaddr == a) 1989 return (sitd); 1990 return (NULL); 1991 } 1992 1993 void 1994 ohci_timeout(void *addr) 1995 { 1996 struct ohci_xfer *oxfer = addr; 1997 struct ohci_pipe *opipe = (struct ohci_pipe *)oxfer->xfer.pipe; 1998 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1999 2000 DPRINTF(("ohci_timeout: oxfer=%p\n", oxfer)); 2001 2002 if (sc->sc_dying) { 2003 ohci_abort_xfer(&oxfer->xfer, USBD_TIMEOUT); 2004 return; 2005 } 2006 2007 /* Execute the abort in a process context. */ 2008 usb_init_task(&oxfer->abort_task, ohci_timeout_task, addr); 2009 usb_add_task(oxfer->xfer.pipe->device, &oxfer->abort_task, 2010 USB_TASKQ_HC); 2011 } 2012 2013 void 2014 ohci_timeout_task(void *addr) 2015 { 2016 usbd_xfer_handle xfer = addr; 2017 int s; 2018 2019 DPRINTF(("ohci_timeout_task: xfer=%p\n", xfer)); 2020 2021 s = splusb(); 2022 ohci_abort_xfer(xfer, USBD_TIMEOUT); 2023 splx(s); 2024 } 2025 2026 #ifdef OHCI_DEBUG 2027 void 2028 ohci_dump_tds(ohci_softc_t *sc, ohci_soft_td_t *std) 2029 { 2030 for (; std; std = std->nexttd) 2031 ohci_dump_td(sc, std); 2032 } 2033 2034 void 2035 ohci_dump_td(ohci_softc_t *sc, ohci_soft_td_t *std) 2036 { 2037 char sbuf[128]; 2038 2039 bitmask_snprintf((u_int32_t)O32TOH(std->td.td_flags), 2040 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 2041 sbuf, sizeof(sbuf)); 2042 2043 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 2044 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2045 printf("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx " 2046 "nexttd=0x%08lx be=0x%08lx\n", 2047 std, (u_long)std->physaddr, sbuf, 2048 OHCI_TD_GET_DI(O32TOH(std->td.td_flags)), 2049 OHCI_TD_GET_EC(O32TOH(std->td.td_flags)), 2050 OHCI_TD_GET_CC(O32TOH(std->td.td_flags)), 2051 (u_long)O32TOH(std->td.td_cbp), 2052 (u_long)O32TOH(std->td.td_nexttd), 2053 (u_long)O32TOH(std->td.td_be)); 2054 } 2055 2056 void 2057 ohci_dump_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 2058 { 2059 int i; 2060 2061 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 2062 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2063 printf("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n" 2064 "bp0=0x%08lx next=0x%08lx be=0x%08lx\n", 2065 sitd, (u_long)sitd->physaddr, 2066 OHCI_ITD_GET_SF(O32TOH(sitd->itd.itd_flags)), 2067 OHCI_ITD_GET_DI(O32TOH(sitd->itd.itd_flags)), 2068 OHCI_ITD_GET_FC(O32TOH(sitd->itd.itd_flags)), 2069 OHCI_ITD_GET_CC(O32TOH(sitd->itd.itd_flags)), 2070 (u_long)O32TOH(sitd->itd.itd_bp0), 2071 (u_long)O32TOH(sitd->itd.itd_nextitd), 2072 (u_long)O32TOH(sitd->itd.itd_be)); 2073 for (i = 0; i < OHCI_ITD_NOFFSET; i++) 2074 printf("offs[%d]=0x%04x ", i, 2075 (u_int)O16TOH(sitd->itd.itd_offset[i])); 2076 printf("\n"); 2077 } 2078 2079 void 2080 ohci_dump_itds(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 2081 { 2082 for (; sitd; sitd = sitd->nextitd) 2083 ohci_dump_itd(sc, sitd); 2084 } 2085 2086 void 2087 ohci_dump_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 2088 { 2089 char sbuf[128], sbuf2[128]; 2090 2091 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 2092 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2093 bitmask_snprintf((u_int32_t)O32TOH(sed->ed.ed_flags), 2094 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO", 2095 sbuf, sizeof(sbuf)); 2096 bitmask_snprintf((u_int32_t)O32TOH(sed->ed.ed_headp), 2097 "\20\1HALT\2CARRY", sbuf2, sizeof(sbuf2)); 2098 2099 printf("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d flags=%s\ntailp=0x%08lx " 2100 "headflags=%s headp=0x%08lx nexted=0x%08lx\n", 2101 sed, (u_long)sed->physaddr, 2102 OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)), 2103 OHCI_ED_GET_EN(O32TOH(sed->ed.ed_flags)), 2104 OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)), sbuf, 2105 (u_long)O32TOH(sed->ed.ed_tailp), sbuf2, 2106 (u_long)O32TOH(sed->ed.ed_headp), 2107 (u_long)O32TOH(sed->ed.ed_nexted)); 2108 } 2109 #endif 2110 2111 usbd_status 2112 ohci_open(usbd_pipe_handle pipe) 2113 { 2114 usbd_device_handle dev = pipe->device; 2115 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2116 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 2117 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2118 u_int8_t addr = dev->address; 2119 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 2120 ohci_soft_ed_t *sed; 2121 ohci_soft_td_t *std; 2122 ohci_soft_itd_t *sitd; 2123 ohci_physaddr_t tdphys; 2124 u_int32_t fmt; 2125 usbd_status err; 2126 int s; 2127 int ival; 2128 2129 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 2130 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 2131 2132 if (sc->sc_dying) 2133 return (USBD_IOERROR); 2134 2135 std = NULL; 2136 sed = NULL; 2137 2138 if (addr == sc->sc_addr) { 2139 switch (ed->bEndpointAddress) { 2140 case USB_CONTROL_ENDPOINT: 2141 pipe->methods = &ohci_root_ctrl_methods; 2142 break; 2143 case UE_DIR_IN | OHCI_INTR_ENDPT: 2144 pipe->methods = &ohci_root_intr_methods; 2145 break; 2146 default: 2147 return (USBD_INVAL); 2148 } 2149 } else { 2150 sed = ohci_alloc_sed(sc); 2151 if (sed == NULL) 2152 goto bad0; 2153 opipe->sed = sed; 2154 if (xfertype == UE_ISOCHRONOUS) { 2155 sitd = ohci_alloc_sitd(sc); 2156 if (sitd == NULL) 2157 goto bad1; 2158 opipe->tail.itd = sitd; 2159 tdphys = sitd->physaddr; 2160 fmt = OHCI_ED_FORMAT_ISO; 2161 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 2162 fmt |= OHCI_ED_DIR_IN; 2163 else 2164 fmt |= OHCI_ED_DIR_OUT; 2165 } else { 2166 std = ohci_alloc_std(sc); 2167 if (std == NULL) 2168 goto bad1; 2169 opipe->tail.td = std; 2170 tdphys = std->physaddr; 2171 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD; 2172 } 2173 sed->ed.ed_flags = HTOO32( 2174 OHCI_ED_SET_FA(addr) | 2175 OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) | 2176 (dev->speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) | 2177 fmt | 2178 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 2179 sed->ed.ed_headp = sed->ed.ed_tailp = HTOO32(tdphys); 2180 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 2181 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2182 2183 switch (xfertype) { 2184 case UE_CONTROL: 2185 pipe->methods = &ohci_device_ctrl_methods; 2186 err = usb_allocmem(&sc->sc_bus, 2187 sizeof(usb_device_request_t), 2188 0, &opipe->u.ctl.reqdma); 2189 if (err) 2190 goto bad; 2191 s = splusb(); 2192 ohci_add_ed(sc, sed, sc->sc_ctrl_head); 2193 splx(s); 2194 break; 2195 case UE_INTERRUPT: 2196 pipe->methods = &ohci_device_intr_methods; 2197 ival = pipe->interval; 2198 if (ival == USBD_DEFAULT_INTERVAL) 2199 ival = ed->bInterval; 2200 return (ohci_device_setintr(sc, opipe, ival)); 2201 case UE_ISOCHRONOUS: 2202 pipe->methods = &ohci_device_isoc_methods; 2203 return (ohci_setup_isoc(pipe)); 2204 case UE_BULK: 2205 pipe->methods = &ohci_device_bulk_methods; 2206 s = splusb(); 2207 ohci_add_ed(sc, sed, sc->sc_bulk_head); 2208 splx(s); 2209 break; 2210 } 2211 } 2212 return (USBD_NORMAL_COMPLETION); 2213 2214 bad: 2215 if (std != NULL) 2216 ohci_free_std(sc, std); 2217 bad1: 2218 if (sed != NULL) 2219 ohci_free_sed(sc, sed); 2220 bad0: 2221 return (USBD_NOMEM); 2222 2223 } 2224 2225 /* 2226 * Close a reqular pipe. 2227 * Assumes that there are no pending transactions. 2228 */ 2229 void 2230 ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head) 2231 { 2232 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2233 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2234 ohci_soft_ed_t *sed = opipe->sed; 2235 int s; 2236 2237 s = splusb(); 2238 #ifdef DIAGNOSTIC 2239 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 2240 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2241 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) { 2242 ohci_soft_td_t *std; 2243 std = ohci_hash_find_td(sc, O32TOH(sed->ed.ed_headp)); 2244 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 2245 "tl=0x%x pipe=%p, std=%p\n", sed, 2246 (int)O32TOH(sed->ed.ed_headp), 2247 (int)O32TOH(sed->ed.ed_tailp), 2248 pipe, std); 2249 #ifdef USB_DEBUG 2250 usbd_dump_pipe(&opipe->pipe); 2251 #endif 2252 #ifdef OHCI_DEBUG 2253 ohci_dump_ed(sc, sed); 2254 if (std) 2255 ohci_dump_td(sc, std); 2256 #endif 2257 usb_delay_ms(&sc->sc_bus, 2); 2258 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2259 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) 2260 printf("ohci_close_pipe: pipe still not empty\n"); 2261 } 2262 #endif 2263 ohci_rem_ed(sed, head); 2264 /* Make sure the host controller is not touching this ED */ 2265 usb_delay_ms(&sc->sc_bus, 1); 2266 splx(s); 2267 ohci_free_sed(sc, opipe->sed); 2268 } 2269 2270 /* 2271 * Abort a device request. 2272 * If this routine is called at splusb() it guarantees that the request 2273 * will be removed from the hardware scheduling and that the callback 2274 * for it will be called with USBD_CANCELLED status. 2275 * It's impossible to guarantee that the requested transfer will not 2276 * have happened since the hardware runs concurrently. 2277 * If the transaction has already happened we rely on the ordinary 2278 * interrupt processing to process it. 2279 */ 2280 void 2281 ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2282 { 2283 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2284 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 2285 ohci_soft_ed_t *sed = opipe->sed; 2286 ohci_soft_td_t *p, *n; 2287 ohci_physaddr_t headp; 2288 int s, hit; 2289 int wake; 2290 2291 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p sed=%p\n", xfer, opipe,sed)); 2292 2293 if (sc->sc_dying) { 2294 /* If we're dying, just do the software part. */ 2295 s = splusb(); 2296 xfer->status = status; /* make software ignore it */ 2297 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 2298 usb_transfer_complete(xfer); 2299 splx(s); 2300 return; 2301 } 2302 2303 if (xfer->device->bus->intr_context || !curproc) 2304 panic("ohci_abort_xfer: not in process context"); 2305 2306 /* 2307 * If an abort is already in progress then just wait for it to 2308 * complete and return. 2309 */ 2310 if (xfer->hcflags & UXFER_ABORTING) { 2311 DPRINTFN(2, ("ohci_abort_xfer: already aborting\n")); 2312 #ifdef DIAGNOSTIC 2313 if (status == USBD_TIMEOUT) 2314 printf("0hci_abort_xfer: TIMEOUT while aborting\n"); 2315 #endif 2316 /* Override the status which might be USBD_TIMEOUT. */ 2317 xfer->status = status; 2318 DPRINTFN(2, ("ohci_abort_xfer: waiting for abort to finish\n")); 2319 xfer->hcflags |= UXFER_ABORTWAIT; 2320 while (xfer->hcflags & UXFER_ABORTING) 2321 tsleep(&xfer->hcflags, PZERO, "ohciaw", 0); 2322 return; 2323 } 2324 xfer->hcflags |= UXFER_ABORTING; 2325 2326 /* 2327 * Step 1: Make interrupt routine and hardware ignore xfer. 2328 */ 2329 s = splusb(); 2330 xfer->status = status; /* make software ignore it */ 2331 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 2332 splx(s); 2333 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed)); 2334 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2335 sizeof(sed->ed.ed_flags), 2336 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2337 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */ 2338 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2339 sizeof(sed->ed.ed_flags), 2340 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2341 2342 /* 2343 * Step 2: Wait until we know hardware has finished any possible 2344 * use of the xfer. Also make sure the soft interrupt routine 2345 * has run. 2346 */ 2347 usb_delay_ms(opipe->pipe.device->bus, 20); /* Hardware finishes in 1ms */ 2348 s = splusb(); 2349 #ifdef USB_USE_SOFTINTR 2350 sc->sc_softwake = 1; 2351 #endif /* USB_USE_SOFTINTR */ 2352 usb_schedsoftintr(&sc->sc_bus); 2353 #ifdef USB_USE_SOFTINTR 2354 tsleep(&sc->sc_softwake, PZERO, "ohciab", 0); 2355 #endif /* USB_USE_SOFTINTR */ 2356 splx(s); 2357 2358 /* 2359 * Step 3: Remove any vestiges of the xfer from the hardware. 2360 * The complication here is that the hardware may have executed 2361 * beyond the xfer we're trying to abort. So as we're scanning 2362 * the TDs of this xfer we check if the hardware points to 2363 * any of them. 2364 */ 2365 s = splusb(); /* XXX why? */ 2366 p = xfer->hcpriv; 2367 #ifdef DIAGNOSTIC 2368 if (p == NULL) { 2369 xfer->hcflags &= ~UXFER_ABORTING; /* XXX */ 2370 splx(s); 2371 printf("ohci_abort_xfer: hcpriv is NULL\n"); 2372 return; 2373 } 2374 #endif 2375 #ifdef OHCI_DEBUG 2376 if (ohcidebug > 1) { 2377 DPRINTF(("ohci_abort_xfer: sed=\n")); 2378 ohci_dump_ed(sc, sed); 2379 ohci_dump_tds(sc, p); 2380 } 2381 #endif 2382 headp = O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK; 2383 hit = 0; 2384 for (; p->xfer == xfer; p = n) { 2385 hit |= headp == p->physaddr; 2386 n = p->nexttd; 2387 ohci_free_std(sc, p); 2388 } 2389 /* Zap headp register if hardware pointed inside the xfer. */ 2390 if (hit) { 2391 DPRINTFN(1,("ohci_abort_xfer: set hd=0x%08x, tl=0x%08x\n", 2392 (int)p->physaddr, (int)O32TOH(sed->ed.ed_tailp))); 2393 sed->ed.ed_headp = HTOO32(p->physaddr); /* unlink TDs */ 2394 usb_syncmem(&sed->dma, 2395 sed->offs + offsetof(ohci_ed_t, ed_headp), 2396 sizeof(sed->ed.ed_headp), 2397 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2398 } else { 2399 DPRINTFN(1,("ohci_abort_xfer: no hit\n")); 2400 } 2401 2402 /* 2403 * Step 4: Turn on hardware again. 2404 */ 2405 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2406 sizeof(sed->ed.ed_flags), 2407 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2408 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */ 2409 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2410 sizeof(sed->ed.ed_flags), 2411 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2412 2413 /* 2414 * Step 5: Execute callback. 2415 */ 2416 wake = xfer->hcflags & UXFER_ABORTWAIT; 2417 xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT); 2418 usb_transfer_complete(xfer); 2419 if (wake) 2420 wakeup(&xfer->hcflags); 2421 2422 splx(s); 2423 } 2424 2425 /* 2426 * Data structures and routines to emulate the root hub. 2427 */ 2428 Static usb_device_descriptor_t ohci_devd = { 2429 USB_DEVICE_DESCRIPTOR_SIZE, 2430 UDESC_DEVICE, /* type */ 2431 {0x00, 0x01}, /* USB version */ 2432 UDCLASS_HUB, /* class */ 2433 UDSUBCLASS_HUB, /* subclass */ 2434 UDPROTO_FSHUB, 2435 64, /* max packet */ 2436 {0},{0},{0x00,0x01}, /* device id */ 2437 1,2,0, /* string indicies */ 2438 1 /* # of configurations */ 2439 }; 2440 2441 Static usb_config_descriptor_t ohci_confd = { 2442 USB_CONFIG_DESCRIPTOR_SIZE, 2443 UDESC_CONFIG, 2444 {USB_CONFIG_DESCRIPTOR_SIZE + 2445 USB_INTERFACE_DESCRIPTOR_SIZE + 2446 USB_ENDPOINT_DESCRIPTOR_SIZE}, 2447 1, 2448 1, 2449 0, 2450 UC_SELF_POWERED, 2451 0 /* max power */ 2452 }; 2453 2454 Static usb_interface_descriptor_t ohci_ifcd = { 2455 USB_INTERFACE_DESCRIPTOR_SIZE, 2456 UDESC_INTERFACE, 2457 0, 2458 0, 2459 1, 2460 UICLASS_HUB, 2461 UISUBCLASS_HUB, 2462 UIPROTO_FSHUB, 2463 0 2464 }; 2465 2466 Static usb_endpoint_descriptor_t ohci_endpd = { 2467 .bLength = USB_ENDPOINT_DESCRIPTOR_SIZE, 2468 .bDescriptorType = UDESC_ENDPOINT, 2469 .bEndpointAddress = UE_DIR_IN | OHCI_INTR_ENDPT, 2470 .bmAttributes = UE_INTERRUPT, 2471 .wMaxPacketSize = {8, 0}, /* max packet */ 2472 .bInterval = 255, 2473 }; 2474 2475 Static usb_hub_descriptor_t ohci_hubd = { 2476 .bDescLength = USB_HUB_DESCRIPTOR_SIZE, 2477 .bDescriptorType = UDESC_HUB, 2478 }; 2479 2480 Static int 2481 ohci_str(usb_string_descriptor_t *p, int l, const char *s) 2482 { 2483 int i; 2484 2485 if (l == 0) 2486 return (0); 2487 p->bLength = 2 * strlen(s) + 2; 2488 if (l == 1) 2489 return (1); 2490 p->bDescriptorType = UDESC_STRING; 2491 l -= 2; 2492 for (i = 0; s[i] && l > 1; i++, l -= 2) 2493 USETW2(p->bString[i], 0, s[i]); 2494 return (2*i+2); 2495 } 2496 2497 /* 2498 * Simulate a hardware hub by handling all the necessary requests. 2499 */ 2500 Static usbd_status 2501 ohci_root_ctrl_transfer(usbd_xfer_handle xfer) 2502 { 2503 usbd_status err; 2504 2505 /* Insert last in queue. */ 2506 err = usb_insert_transfer(xfer); 2507 if (err) 2508 return (err); 2509 2510 /* Pipe isn't running, start first */ 2511 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2512 } 2513 2514 Static usbd_status 2515 ohci_root_ctrl_start(usbd_xfer_handle xfer) 2516 { 2517 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2518 usb_device_request_t *req; 2519 void *buf = NULL; 2520 int port, i; 2521 int s, len, value, index, l, totlen = 0; 2522 usb_port_status_t ps; 2523 usb_hub_descriptor_t hubd; 2524 usbd_status err; 2525 u_int32_t v; 2526 2527 if (sc->sc_dying) 2528 return (USBD_IOERROR); 2529 2530 #ifdef DIAGNOSTIC 2531 if (!(xfer->rqflags & URQ_REQUEST)) 2532 /* XXX panic */ 2533 return (USBD_INVAL); 2534 #endif 2535 req = &xfer->request; 2536 2537 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 2538 req->bmRequestType, req->bRequest)); 2539 2540 len = UGETW(req->wLength); 2541 value = UGETW(req->wValue); 2542 index = UGETW(req->wIndex); 2543 2544 if (len != 0) 2545 buf = KERNADDR(&xfer->dmabuf, 0); 2546 2547 #define C(x,y) ((x) | ((y) << 8)) 2548 switch(C(req->bRequest, req->bmRequestType)) { 2549 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 2550 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 2551 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 2552 /* 2553 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 2554 * for the integrated root hub. 2555 */ 2556 break; 2557 case C(UR_GET_CONFIG, UT_READ_DEVICE): 2558 if (len > 0) { 2559 *(u_int8_t *)buf = sc->sc_conf; 2560 totlen = 1; 2561 } 2562 break; 2563 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2564 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 2565 if (len == 0) 2566 break; 2567 switch(value >> 8) { 2568 case UDESC_DEVICE: 2569 if ((value & 0xff) != 0) { 2570 err = USBD_IOERROR; 2571 goto ret; 2572 } 2573 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 2574 USETW(ohci_devd.idVendor, sc->sc_id_vendor); 2575 memcpy(buf, &ohci_devd, l); 2576 break; 2577 case UDESC_CONFIG: 2578 if ((value & 0xff) != 0) { 2579 err = USBD_IOERROR; 2580 goto ret; 2581 } 2582 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 2583 memcpy(buf, &ohci_confd, l); 2584 buf = (char *)buf + l; 2585 len -= l; 2586 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 2587 totlen += l; 2588 memcpy(buf, &ohci_ifcd, l); 2589 buf = (char *)buf + l; 2590 len -= l; 2591 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 2592 totlen += l; 2593 memcpy(buf, &ohci_endpd, l); 2594 break; 2595 case UDESC_STRING: 2596 *(u_int8_t *)buf = 0; 2597 totlen = 1; 2598 switch (value & 0xff) { 2599 case 0: /* Language table */ 2600 totlen = ohci_str(buf, len, "\001"); 2601 break; 2602 case 1: /* Vendor */ 2603 totlen = ohci_str(buf, len, sc->sc_vendor); 2604 break; 2605 case 2: /* Product */ 2606 totlen = ohci_str(buf, len, "OHCI root hub"); 2607 break; 2608 } 2609 break; 2610 default: 2611 err = USBD_IOERROR; 2612 goto ret; 2613 } 2614 break; 2615 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 2616 if (len > 0) { 2617 *(u_int8_t *)buf = 0; 2618 totlen = 1; 2619 } 2620 break; 2621 case C(UR_GET_STATUS, UT_READ_DEVICE): 2622 if (len > 1) { 2623 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 2624 totlen = 2; 2625 } 2626 break; 2627 case C(UR_GET_STATUS, UT_READ_INTERFACE): 2628 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 2629 if (len > 1) { 2630 USETW(((usb_status_t *)buf)->wStatus, 0); 2631 totlen = 2; 2632 } 2633 break; 2634 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 2635 if (value >= USB_MAX_DEVICES) { 2636 err = USBD_IOERROR; 2637 goto ret; 2638 } 2639 sc->sc_addr = value; 2640 break; 2641 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 2642 if (value != 0 && value != 1) { 2643 err = USBD_IOERROR; 2644 goto ret; 2645 } 2646 sc->sc_conf = value; 2647 break; 2648 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 2649 break; 2650 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 2651 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 2652 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 2653 err = USBD_IOERROR; 2654 goto ret; 2655 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 2656 break; 2657 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 2658 break; 2659 /* Hub requests */ 2660 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2661 break; 2662 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2663 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 2664 "port=%d feature=%d\n", 2665 index, value)); 2666 if (index < 1 || index > sc->sc_noport) { 2667 err = USBD_IOERROR; 2668 goto ret; 2669 } 2670 port = OHCI_RH_PORT_STATUS(index); 2671 switch(value) { 2672 case UHF_PORT_ENABLE: 2673 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2674 break; 2675 case UHF_PORT_SUSPEND: 2676 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2677 break; 2678 case UHF_PORT_POWER: 2679 /* Yes, writing to the LOW_SPEED bit clears power. */ 2680 OWRITE4(sc, port, UPS_LOW_SPEED); 2681 break; 2682 case UHF_C_PORT_CONNECTION: 2683 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2684 break; 2685 case UHF_C_PORT_ENABLE: 2686 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2687 break; 2688 case UHF_C_PORT_SUSPEND: 2689 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2690 break; 2691 case UHF_C_PORT_OVER_CURRENT: 2692 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2693 break; 2694 case UHF_C_PORT_RESET: 2695 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2696 break; 2697 default: 2698 err = USBD_IOERROR; 2699 goto ret; 2700 } 2701 switch(value) { 2702 case UHF_C_PORT_CONNECTION: 2703 case UHF_C_PORT_ENABLE: 2704 case UHF_C_PORT_SUSPEND: 2705 case UHF_C_PORT_OVER_CURRENT: 2706 case UHF_C_PORT_RESET: 2707 /* Enable RHSC interrupt if condition is cleared. */ 2708 if ((OREAD4(sc, port) >> 16) == 0) 2709 ohci_rhsc_enable(sc); 2710 break; 2711 default: 2712 break; 2713 } 2714 break; 2715 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2716 if (len == 0) 2717 break; 2718 if ((value & 0xff) != 0) { 2719 err = USBD_IOERROR; 2720 goto ret; 2721 } 2722 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2723 hubd = ohci_hubd; 2724 hubd.bNbrPorts = sc->sc_noport; 2725 USETW(hubd.wHubCharacteristics, 2726 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2727 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2728 /* XXX overcurrent */ 2729 ); 2730 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2731 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2732 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2733 hubd.DeviceRemovable[i++] = (u_int8_t)v; 2734 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2735 l = min(len, hubd.bDescLength); 2736 totlen = l; 2737 memcpy(buf, &hubd, l); 2738 break; 2739 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2740 if (len != 4) { 2741 err = USBD_IOERROR; 2742 goto ret; 2743 } 2744 memset(buf, 0, len); /* ? XXX */ 2745 totlen = len; 2746 break; 2747 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2748 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 2749 index)); 2750 if (index < 1 || index > sc->sc_noport) { 2751 err = USBD_IOERROR; 2752 goto ret; 2753 } 2754 if (len != 4) { 2755 err = USBD_IOERROR; 2756 goto ret; 2757 } 2758 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2759 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 2760 v)); 2761 USETW(ps.wPortStatus, v); 2762 USETW(ps.wPortChange, v >> 16); 2763 l = min(len, sizeof ps); 2764 memcpy(buf, &ps, l); 2765 totlen = l; 2766 break; 2767 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2768 err = USBD_IOERROR; 2769 goto ret; 2770 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2771 break; 2772 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2773 if (index < 1 || index > sc->sc_noport) { 2774 err = USBD_IOERROR; 2775 goto ret; 2776 } 2777 port = OHCI_RH_PORT_STATUS(index); 2778 switch(value) { 2779 case UHF_PORT_ENABLE: 2780 OWRITE4(sc, port, UPS_PORT_ENABLED); 2781 break; 2782 case UHF_PORT_SUSPEND: 2783 OWRITE4(sc, port, UPS_SUSPEND); 2784 break; 2785 case UHF_PORT_RESET: 2786 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 2787 index)); 2788 OWRITE4(sc, port, UPS_RESET); 2789 for (i = 0; i < 5; i++) { 2790 usb_delay_ms(&sc->sc_bus, 2791 USB_PORT_ROOT_RESET_DELAY); 2792 if (sc->sc_dying) { 2793 err = USBD_IOERROR; 2794 goto ret; 2795 } 2796 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2797 break; 2798 } 2799 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 2800 index, OREAD4(sc, port))); 2801 break; 2802 case UHF_PORT_POWER: 2803 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 2804 "%d\n", index)); 2805 OWRITE4(sc, port, UPS_PORT_POWER); 2806 break; 2807 default: 2808 err = USBD_IOERROR; 2809 goto ret; 2810 } 2811 break; 2812 default: 2813 err = USBD_IOERROR; 2814 goto ret; 2815 } 2816 xfer->actlen = totlen; 2817 err = USBD_NORMAL_COMPLETION; 2818 ret: 2819 xfer->status = err; 2820 s = splusb(); 2821 usb_transfer_complete(xfer); 2822 splx(s); 2823 return (USBD_IN_PROGRESS); 2824 } 2825 2826 /* Abort a root control request. */ 2827 Static void 2828 ohci_root_ctrl_abort(usbd_xfer_handle xfer) 2829 { 2830 /* Nothing to do, all transfers are synchronous. */ 2831 } 2832 2833 /* Close the root pipe. */ 2834 Static void 2835 ohci_root_ctrl_close(usbd_pipe_handle pipe) 2836 { 2837 DPRINTF(("ohci_root_ctrl_close\n")); 2838 /* Nothing to do. */ 2839 } 2840 2841 Static usbd_status 2842 ohci_root_intr_transfer(usbd_xfer_handle xfer) 2843 { 2844 usbd_status err; 2845 2846 /* Insert last in queue. */ 2847 err = usb_insert_transfer(xfer); 2848 if (err) 2849 return (err); 2850 2851 /* Pipe isn't running, start first */ 2852 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2853 } 2854 2855 Static usbd_status 2856 ohci_root_intr_start(usbd_xfer_handle xfer) 2857 { 2858 usbd_pipe_handle pipe = xfer->pipe; 2859 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2860 2861 if (sc->sc_dying) 2862 return (USBD_IOERROR); 2863 2864 sc->sc_intrxfer = xfer; 2865 2866 return (USBD_IN_PROGRESS); 2867 } 2868 2869 /* Abort a root interrupt request. */ 2870 Static void 2871 ohci_root_intr_abort(usbd_xfer_handle xfer) 2872 { 2873 int s; 2874 2875 if (xfer->pipe->intrxfer == xfer) { 2876 DPRINTF(("ohci_root_intr_abort: remove\n")); 2877 xfer->pipe->intrxfer = NULL; 2878 } 2879 xfer->status = USBD_CANCELLED; 2880 s = splusb(); 2881 usb_transfer_complete(xfer); 2882 splx(s); 2883 } 2884 2885 /* Close the root pipe. */ 2886 Static void 2887 ohci_root_intr_close(usbd_pipe_handle pipe) 2888 { 2889 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2890 2891 DPRINTF(("ohci_root_intr_close\n")); 2892 2893 sc->sc_intrxfer = NULL; 2894 } 2895 2896 /************************/ 2897 2898 Static usbd_status 2899 ohci_device_ctrl_transfer(usbd_xfer_handle xfer) 2900 { 2901 usbd_status err; 2902 2903 /* Insert last in queue. */ 2904 err = usb_insert_transfer(xfer); 2905 if (err) 2906 return (err); 2907 2908 /* Pipe isn't running, start first */ 2909 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2910 } 2911 2912 Static usbd_status 2913 ohci_device_ctrl_start(usbd_xfer_handle xfer) 2914 { 2915 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2916 usbd_status err; 2917 2918 if (sc->sc_dying) 2919 return (USBD_IOERROR); 2920 2921 #ifdef DIAGNOSTIC 2922 if (!(xfer->rqflags & URQ_REQUEST)) { 2923 /* XXX panic */ 2924 printf("ohci_device_ctrl_transfer: not a request\n"); 2925 return (USBD_INVAL); 2926 } 2927 #endif 2928 2929 err = ohci_device_request(xfer); 2930 if (err) 2931 return (err); 2932 2933 if (sc->sc_bus.use_polling) 2934 ohci_waitintr(sc, xfer); 2935 return (USBD_IN_PROGRESS); 2936 } 2937 2938 /* Abort a device control request. */ 2939 Static void 2940 ohci_device_ctrl_abort(usbd_xfer_handle xfer) 2941 { 2942 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer)); 2943 ohci_abort_xfer(xfer, USBD_CANCELLED); 2944 } 2945 2946 /* Close a device control pipe. */ 2947 Static void 2948 ohci_device_ctrl_close(usbd_pipe_handle pipe) 2949 { 2950 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2951 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2952 2953 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe)); 2954 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2955 ohci_free_std(sc, opipe->tail.td); 2956 } 2957 2958 /************************/ 2959 2960 Static void 2961 ohci_device_clear_toggle(usbd_pipe_handle pipe) 2962 { 2963 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2964 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2965 2966 opipe->sed->ed.ed_headp &= HTOO32(~OHCI_TOGGLECARRY); 2967 } 2968 2969 Static void 2970 ohci_noop(usbd_pipe_handle pipe) 2971 { 2972 } 2973 2974 Static usbd_status 2975 ohci_device_bulk_transfer(usbd_xfer_handle xfer) 2976 { 2977 usbd_status err; 2978 2979 /* Insert last in queue. */ 2980 err = usb_insert_transfer(xfer); 2981 if (err) 2982 return (err); 2983 2984 /* Pipe isn't running, start first */ 2985 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2986 } 2987 2988 Static usbd_status 2989 ohci_device_bulk_start(usbd_xfer_handle xfer) 2990 { 2991 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2992 usbd_device_handle dev = opipe->pipe.device; 2993 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2994 int addr = dev->address; 2995 ohci_soft_td_t *data, *tail, *tdp; 2996 ohci_soft_ed_t *sed; 2997 int s, len, isread, endpt; 2998 usbd_status err; 2999 3000 if (sc->sc_dying) 3001 return (USBD_IOERROR); 3002 3003 #ifdef DIAGNOSTIC 3004 if (xfer->rqflags & URQ_REQUEST) { 3005 /* XXX panic */ 3006 printf("ohci_device_bulk_start: a request\n"); 3007 return (USBD_INVAL); 3008 } 3009 #endif 3010 3011 len = xfer->length; 3012 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 3013 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3014 sed = opipe->sed; 3015 3016 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d " 3017 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags, 3018 endpt)); 3019 3020 opipe->u.bulk.isread = isread; 3021 opipe->u.bulk.length = len; 3022 3023 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3024 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3025 /* Update device address */ 3026 sed->ed.ed_flags = HTOO32( 3027 (O32TOH(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) | 3028 OHCI_ED_SET_FA(addr)); 3029 3030 /* Allocate a chain of new TDs (including a new tail). */ 3031 data = opipe->tail.td; 3032 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 3033 data, &tail); 3034 /* We want interrupt at the end of the transfer. */ 3035 tail->td.td_flags &= HTOO32(~OHCI_TD_INTR_MASK); 3036 tail->td.td_flags |= HTOO32(OHCI_TD_SET_DI(1)); 3037 tail->flags |= OHCI_CALL_DONE; 3038 tail = tail->nexttd; /* point at sentinel */ 3039 usb_syncmem(&tail->dma, tail->offs + offsetof(ohci_td_t, td_flags), 3040 sizeof(tail->td.td_flags), 3041 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3042 if (err) 3043 return (err); 3044 3045 tail->xfer = NULL; 3046 xfer->hcpriv = data; 3047 3048 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x " 3049 "td_cbp=0x%08x td_be=0x%08x\n", 3050 (int)O32TOH(sed->ed.ed_flags), 3051 (int)O32TOH(data->td.td_flags), 3052 (int)O32TOH(data->td.td_cbp), 3053 (int)O32TOH(data->td.td_be))); 3054 3055 #ifdef OHCI_DEBUG 3056 if (ohcidebug > 5) { 3057 ohci_dump_ed(sc, sed); 3058 ohci_dump_tds(sc, data); 3059 } 3060 #endif 3061 3062 /* Insert ED in schedule */ 3063 s = splusb(); 3064 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 3065 tdp->xfer = xfer; 3066 } 3067 sed->ed.ed_tailp = HTOO32(tail->physaddr); 3068 opipe->tail.td = tail; 3069 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3070 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3071 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3072 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 3073 if (xfer->timeout && !sc->sc_bus.use_polling) { 3074 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 3075 ohci_timeout, xfer); 3076 } 3077 3078 #if 0 3079 /* This goes wrong if we are too slow. */ 3080 if (ohcidebug > 10) { 3081 delay(10000); 3082 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 3083 OREAD4(sc, OHCI_COMMAND_STATUS))); 3084 ohci_dump_ed(sc, sed); 3085 ohci_dump_tds(sc, data); 3086 } 3087 #endif 3088 3089 splx(s); 3090 3091 return (USBD_IN_PROGRESS); 3092 } 3093 3094 Static void 3095 ohci_device_bulk_abort(usbd_xfer_handle xfer) 3096 { 3097 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer)); 3098 ohci_abort_xfer(xfer, USBD_CANCELLED); 3099 } 3100 3101 /* 3102 * Close a device bulk pipe. 3103 */ 3104 Static void 3105 ohci_device_bulk_close(usbd_pipe_handle pipe) 3106 { 3107 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3108 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3109 3110 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe)); 3111 ohci_close_pipe(pipe, sc->sc_bulk_head); 3112 ohci_free_std(sc, opipe->tail.td); 3113 } 3114 3115 /************************/ 3116 3117 Static usbd_status 3118 ohci_device_intr_transfer(usbd_xfer_handle xfer) 3119 { 3120 usbd_status err; 3121 3122 /* Insert last in queue. */ 3123 err = usb_insert_transfer(xfer); 3124 if (err) 3125 return (err); 3126 3127 /* Pipe isn't running, start first */ 3128 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 3129 } 3130 3131 Static usbd_status 3132 ohci_device_intr_start(usbd_xfer_handle xfer) 3133 { 3134 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3135 usbd_device_handle dev = opipe->pipe.device; 3136 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 3137 ohci_soft_ed_t *sed = opipe->sed; 3138 ohci_soft_td_t *data, *tail; 3139 int s, len, isread, endpt; 3140 3141 if (sc->sc_dying) 3142 return (USBD_IOERROR); 3143 3144 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d " 3145 "flags=%d priv=%p\n", 3146 xfer, xfer->length, xfer->flags, xfer->priv)); 3147 3148 #ifdef DIAGNOSTIC 3149 if (xfer->rqflags & URQ_REQUEST) 3150 panic("ohci_device_intr_transfer: a request"); 3151 #endif 3152 3153 len = xfer->length; 3154 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 3155 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3156 3157 data = opipe->tail.td; 3158 tail = ohci_alloc_std(sc); 3159 if (tail == NULL) 3160 return (USBD_NOMEM); 3161 tail->xfer = NULL; 3162 3163 data->td.td_flags = HTOO32( 3164 isread ? OHCI_TD_IN : OHCI_TD_OUT | 3165 OHCI_TD_NOCC | 3166 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 3167 if (xfer->flags & USBD_SHORT_XFER_OK) 3168 data->td.td_flags |= HTOO32(OHCI_TD_R); 3169 data->td.td_cbp = HTOO32(DMAADDR(&xfer->dmabuf, 0)); 3170 data->nexttd = tail; 3171 data->td.td_nexttd = HTOO32(tail->physaddr); 3172 data->td.td_be = HTOO32(O32TOH(data->td.td_cbp) + len - 1); 3173 data->len = len; 3174 data->xfer = xfer; 3175 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 3176 usb_syncmem(&data->dma, data->offs, sizeof(data->td), 3177 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3178 xfer->hcpriv = data; 3179 3180 #ifdef OHCI_DEBUG 3181 if (ohcidebug > 5) { 3182 DPRINTF(("ohci_device_intr_transfer:\n")); 3183 ohci_dump_ed(sc, sed); 3184 ohci_dump_tds(sc, data); 3185 } 3186 #endif 3187 3188 /* Insert ED in schedule */ 3189 s = splusb(); 3190 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3191 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3192 sed->ed.ed_tailp = HTOO32(tail->physaddr); 3193 opipe->tail.td = tail; 3194 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3195 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3196 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3197 3198 #if 0 3199 /* 3200 * This goes horribly wrong, printing thousands of descriptors, 3201 * because false references are followed due to the fact that the 3202 * TD is gone. 3203 */ 3204 if (ohcidebug > 5) { 3205 usb_delay_ms(&sc->sc_bus, 5); 3206 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 3207 OREAD4(sc, OHCI_COMMAND_STATUS))); 3208 ohci_dump_ed(sc, sed); 3209 ohci_dump_tds(sc, data); 3210 } 3211 #endif 3212 splx(s); 3213 3214 return (USBD_IN_PROGRESS); 3215 } 3216 3217 /* Abort a device control request. */ 3218 Static void 3219 ohci_device_intr_abort(usbd_xfer_handle xfer) 3220 { 3221 if (xfer->pipe->intrxfer == xfer) { 3222 DPRINTF(("ohci_device_intr_abort: remove\n")); 3223 xfer->pipe->intrxfer = NULL; 3224 } 3225 ohci_abort_xfer(xfer, USBD_CANCELLED); 3226 } 3227 3228 /* Close a device interrupt pipe. */ 3229 Static void 3230 ohci_device_intr_close(usbd_pipe_handle pipe) 3231 { 3232 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3233 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3234 int nslots = opipe->u.intr.nslots; 3235 int pos = opipe->u.intr.pos; 3236 int j; 3237 ohci_soft_ed_t *p, *sed = opipe->sed; 3238 int s; 3239 3240 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 3241 pipe, nslots, pos)); 3242 s = splusb(); 3243 usb_syncmem(&sed->dma, sed->offs, 3244 sizeof(sed->ed), BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3245 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 3246 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3247 sizeof(sed->ed.ed_flags), 3248 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3249 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 3250 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) 3251 usb_delay_ms(&sc->sc_bus, 2); 3252 3253 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 3254 continue; 3255 #ifdef DIAGNOSTIC 3256 if (p == NULL) 3257 panic("ohci_device_intr_close: ED not found"); 3258 #endif 3259 p->next = sed->next; 3260 p->ed.ed_nexted = sed->ed.ed_nexted; 3261 usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted), 3262 sizeof(p->ed.ed_nexted), 3263 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3264 splx(s); 3265 3266 for (j = 0; j < nslots; j++) 3267 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 3268 3269 ohci_free_std(sc, opipe->tail.td); 3270 ohci_free_sed(sc, opipe->sed); 3271 } 3272 3273 Static usbd_status 3274 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival) 3275 { 3276 int i, j, s, best; 3277 u_int npoll, slow, shigh, nslots; 3278 u_int bestbw, bw; 3279 ohci_soft_ed_t *hsed, *sed = opipe->sed; 3280 3281 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 3282 if (ival == 0) { 3283 printf("ohci_setintr: 0 interval\n"); 3284 return (USBD_INVAL); 3285 } 3286 3287 npoll = OHCI_NO_INTRS; 3288 while (npoll > ival) 3289 npoll /= 2; 3290 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 3291 3292 /* 3293 * We now know which level in the tree the ED must go into. 3294 * Figure out which slot has most bandwidth left over. 3295 * Slots to examine: 3296 * npoll 3297 * 1 0 3298 * 2 1 2 3299 * 4 3 4 5 6 3300 * 8 7 8 9 10 11 12 13 14 3301 * N (N-1) .. (N-1+N-1) 3302 */ 3303 slow = npoll-1; 3304 shigh = slow + npoll; 3305 nslots = OHCI_NO_INTRS / npoll; 3306 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 3307 bw = 0; 3308 for (j = 0; j < nslots; j++) 3309 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 3310 if (bw < bestbw) { 3311 best = i; 3312 bestbw = bw; 3313 } 3314 } 3315 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 3316 best, slow, shigh, bestbw)); 3317 3318 s = splusb(); 3319 hsed = sc->sc_eds[best]; 3320 sed->next = hsed->next; 3321 usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags), 3322 sizeof(hsed->ed.ed_flags), 3323 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3324 sed->ed.ed_nexted = hsed->ed.ed_nexted; 3325 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3326 sizeof(sed->ed.ed_flags), 3327 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3328 hsed->next = sed; 3329 hsed->ed.ed_nexted = HTOO32(sed->physaddr); 3330 usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags), 3331 sizeof(hsed->ed.ed_flags), 3332 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3333 splx(s); 3334 3335 for (j = 0; j < nslots; j++) 3336 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 3337 opipe->u.intr.nslots = nslots; 3338 opipe->u.intr.pos = best; 3339 3340 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 3341 return (USBD_NORMAL_COMPLETION); 3342 } 3343 3344 /***********************/ 3345 3346 usbd_status 3347 ohci_device_isoc_transfer(usbd_xfer_handle xfer) 3348 { 3349 usbd_status err; 3350 3351 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer)); 3352 3353 /* Put it on our queue, */ 3354 err = usb_insert_transfer(xfer); 3355 3356 /* bail out on error, */ 3357 if (err && err != USBD_IN_PROGRESS) 3358 return (err); 3359 3360 /* XXX should check inuse here */ 3361 3362 /* insert into schedule, */ 3363 ohci_device_isoc_enter(xfer); 3364 3365 /* and start if the pipe wasn't running */ 3366 if (!err) 3367 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 3368 3369 return (err); 3370 } 3371 3372 void 3373 ohci_device_isoc_enter(usbd_xfer_handle xfer) 3374 { 3375 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3376 usbd_device_handle dev = opipe->pipe.device; 3377 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 3378 ohci_soft_ed_t *sed = opipe->sed; 3379 struct iso *iso = &opipe->u.iso; 3380 ohci_soft_itd_t *sitd, *nsitd; 3381 ohci_physaddr_t buf, offs, noffs, bp0; 3382 int i, ncur, nframes; 3383 int s; 3384 3385 DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p " 3386 "nframes=%d\n", 3387 iso->inuse, iso->next, xfer, xfer->nframes)); 3388 3389 if (sc->sc_dying) 3390 return; 3391 3392 if (iso->next == -1) { 3393 /* Not in use yet, schedule it a few frames ahead. */ 3394 iso->next = O32TOH(sc->sc_hcca->hcca_frame_number) + 5; 3395 DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n", 3396 iso->next)); 3397 } 3398 3399 sitd = opipe->tail.itd; 3400 buf = DMAADDR(&xfer->dmabuf, 0); 3401 bp0 = OHCI_PAGE(buf); 3402 offs = OHCI_PAGE_OFFSET(buf); 3403 nframes = xfer->nframes; 3404 xfer->hcpriv = sitd; 3405 for (i = ncur = 0; i < nframes; i++, ncur++) { 3406 noffs = offs + xfer->frlengths[i]; 3407 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ 3408 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */ 3409 3410 /* Allocate next ITD */ 3411 nsitd = ohci_alloc_sitd(sc); 3412 if (nsitd == NULL) { 3413 /* XXX what now? */ 3414 printf("%s: isoc TD alloc failed\n", 3415 USBDEVNAME(sc->sc_bus.bdev)); 3416 return; 3417 } 3418 3419 /* Fill current ITD */ 3420 sitd->itd.itd_flags = HTOO32( 3421 OHCI_ITD_NOCC | 3422 OHCI_ITD_SET_SF(iso->next) | 3423 OHCI_ITD_SET_DI(6) | /* delay intr a little */ 3424 OHCI_ITD_SET_FC(ncur)); 3425 sitd->itd.itd_bp0 = HTOO32(bp0); 3426 sitd->nextitd = nsitd; 3427 sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr); 3428 sitd->itd.itd_be = HTOO32(bp0 + offs - 1); 3429 sitd->xfer = xfer; 3430 sitd->flags = 0; 3431 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 3432 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3433 3434 sitd = nsitd; 3435 iso->next = iso->next + ncur; 3436 bp0 = OHCI_PAGE(buf + offs); 3437 ncur = 0; 3438 } 3439 sitd->itd.itd_offset[ncur] = HTOO16(OHCI_ITD_MK_OFFS(offs)); 3440 offs = noffs; 3441 } 3442 nsitd = ohci_alloc_sitd(sc); 3443 if (nsitd == NULL) { 3444 /* XXX what now? */ 3445 printf("%s: isoc TD alloc failed\n", 3446 USBDEVNAME(sc->sc_bus.bdev)); 3447 return; 3448 } 3449 /* Fixup last used ITD */ 3450 sitd->itd.itd_flags = HTOO32( 3451 OHCI_ITD_NOCC | 3452 OHCI_ITD_SET_SF(iso->next) | 3453 OHCI_ITD_SET_DI(0) | 3454 OHCI_ITD_SET_FC(ncur)); 3455 sitd->itd.itd_bp0 = HTOO32(bp0); 3456 sitd->nextitd = nsitd; 3457 sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr); 3458 sitd->itd.itd_be = HTOO32(bp0 + offs - 1); 3459 sitd->xfer = xfer; 3460 sitd->flags = OHCI_CALL_DONE; 3461 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 3462 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3463 3464 iso->next = iso->next + ncur; 3465 iso->inuse += nframes; 3466 3467 xfer->actlen = offs; /* XXX pretend we did it all */ 3468 3469 xfer->status = USBD_IN_PROGRESS; 3470 3471 #ifdef OHCI_DEBUG 3472 if (ohcidebug > 5) { 3473 DPRINTF(("ohci_device_isoc_enter: frame=%d\n", 3474 O32TOH(sc->sc_hcca->hcca_frame_number))); 3475 ohci_dump_itds(sc, xfer->hcpriv); 3476 ohci_dump_ed(sc, sed); 3477 } 3478 #endif 3479 3480 s = splusb(); 3481 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3482 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3483 sed->ed.ed_tailp = HTOO32(nsitd->physaddr); 3484 opipe->tail.itd = nsitd; 3485 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3486 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3487 sizeof(sed->ed.ed_flags), 3488 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3489 splx(s); 3490 3491 #ifdef OHCI_DEBUG 3492 if (ohcidebug > 5) { 3493 delay(150000); 3494 DPRINTF(("ohci_device_isoc_enter: after frame=%d\n", 3495 O32TOH(sc->sc_hcca->hcca_frame_number))); 3496 ohci_dump_itds(sc, xfer->hcpriv); 3497 ohci_dump_ed(sc, sed); 3498 } 3499 #endif 3500 } 3501 3502 usbd_status 3503 ohci_device_isoc_start(usbd_xfer_handle xfer) 3504 { 3505 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3506 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3507 3508 DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer)); 3509 3510 if (sc->sc_dying) 3511 return (USBD_IOERROR); 3512 3513 #ifdef DIAGNOSTIC 3514 if (xfer->status != USBD_IN_PROGRESS) 3515 printf("ohci_device_isoc_start: not in progress %p\n", xfer); 3516 #endif 3517 3518 /* XXX anything to do? */ 3519 3520 return (USBD_IN_PROGRESS); 3521 } 3522 3523 void 3524 ohci_device_isoc_abort(usbd_xfer_handle xfer) 3525 { 3526 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3527 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3528 ohci_soft_ed_t *sed; 3529 ohci_soft_itd_t *sitd; 3530 int s; 3531 3532 s = splusb(); 3533 3534 DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer)); 3535 3536 /* Transfer is already done. */ 3537 if (xfer->status != USBD_NOT_STARTED && 3538 xfer->status != USBD_IN_PROGRESS) { 3539 splx(s); 3540 printf("ohci_device_isoc_abort: early return\n"); 3541 return; 3542 } 3543 3544 /* Give xfer the requested abort code. */ 3545 xfer->status = USBD_CANCELLED; 3546 3547 sed = opipe->sed; 3548 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3549 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3550 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */ 3551 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3552 sizeof(sed->ed.ed_flags), 3553 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3554 3555 sitd = xfer->hcpriv; 3556 #ifdef DIAGNOSTIC 3557 if (sitd == NULL) { 3558 splx(s); 3559 printf("ohci_device_isoc_abort: hcpriv==0\n"); 3560 return; 3561 } 3562 #endif 3563 for (; sitd->xfer == xfer; sitd = sitd->nextitd) { 3564 #ifdef DIAGNOSTIC 3565 DPRINTFN(1,("abort sets done sitd=%p\n", sitd)); 3566 sitd->isdone = 1; 3567 #endif 3568 } 3569 3570 splx(s); 3571 3572 usb_delay_ms(&sc->sc_bus, OHCI_ITD_NOFFSET); 3573 3574 s = splusb(); 3575 3576 /* Run callback. */ 3577 usb_transfer_complete(xfer); 3578 3579 sed->ed.ed_headp = HTOO32(sitd->physaddr); /* unlink TDs */ 3580 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */ 3581 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3582 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3583 3584 splx(s); 3585 } 3586 3587 void 3588 ohci_device_isoc_done(usbd_xfer_handle xfer) 3589 { 3590 DPRINTFN(1,("ohci_device_isoc_done: xfer=%p\n", xfer)); 3591 } 3592 3593 usbd_status 3594 ohci_setup_isoc(usbd_pipe_handle pipe) 3595 { 3596 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3597 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3598 struct iso *iso = &opipe->u.iso; 3599 int s; 3600 3601 iso->next = -1; 3602 iso->inuse = 0; 3603 3604 s = splusb(); 3605 ohci_add_ed(sc, opipe->sed, sc->sc_isoc_head); 3606 splx(s); 3607 3608 return (USBD_NORMAL_COMPLETION); 3609 } 3610 3611 void 3612 ohci_device_isoc_close(usbd_pipe_handle pipe) 3613 { 3614 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3615 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3616 3617 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe)); 3618 ohci_close_pipe(pipe, sc->sc_isoc_head); 3619 #ifdef DIAGNOSTIC 3620 opipe->tail.itd->isdone = 1; 3621 #endif 3622 ohci_free_sitd(sc, opipe->tail.itd); 3623 } 3624
Indexes created Fri Oct 03 02:09:57 GMT 2025