ohci.c revision 1.182.18.2
1 /* $NetBSD: ohci.c,v 1.182.18.2 2007/08/16 11:03:22 jmcneill Exp $ */ 2 /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */ 3 4 /* 5 * Copyright (c) 1998, 2004, 2005 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Lennart Augustsson (lennart (at) augustsson.net) at 10 * Carlstedt Research & Technology. 11 * This code is derived from software contributed to The NetBSD Foundation 12 * by Charles M. Hannum. 13 * 14 * Redistribution and use in source and binary forms, with or without 15 * modification, are permitted provided that the following conditions 16 * are met: 17 * 1. Redistributions of source code must retain the above copyright 18 * notice, this list of conditions and the following disclaimer. 19 * 2. Redistributions in binary form must reproduce the above copyright 20 * notice, this list of conditions and the following disclaimer in the 21 * documentation and/or other materials provided with the distribution. 22 * 3. All advertising materials mentioning features or use of this software 23 * must display the following acknowledgement: 24 * This product includes software developed by the NetBSD 25 * Foundation, Inc. and its contributors. 26 * 4. Neither the name of The NetBSD Foundation nor the names of its 27 * contributors may be used to endorse or promote products derived 28 * from this software without specific prior written permission. 29 * 30 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 31 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 32 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 33 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 34 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 35 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 36 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 37 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 38 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 39 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 40 * POSSIBILITY OF SUCH DAMAGE. 41 */ 42 43 /* 44 * USB Open Host Controller driver. 45 * 46 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html 47 * USB spec: http://www.usb.org/developers/docs/usbspec.zip 48 */ 49 50 #include <sys/cdefs.h> 51 __KERNEL_RCSID(0, "$NetBSD: ohci.c,v 1.182.18.2 2007/08/16 11:03:22 jmcneill Exp $"); 52 53 #include <sys/param.h> 54 #include <sys/systm.h> 55 #include <sys/malloc.h> 56 #if defined(__NetBSD__) || defined(__OpenBSD__) 57 #include <sys/kernel.h> 58 #include <sys/device.h> 59 #include <sys/select.h> 60 #include <uvm/uvm_extern.h> 61 #elif defined(__FreeBSD__) 62 #include <sys/module.h> 63 #include <sys/bus.h> 64 #include <machine/bus_pio.h> 65 #include <machine/bus_memio.h> 66 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 67 #include <machine/cpu.h> 68 #endif 69 #endif 70 #include <sys/proc.h> 71 #include <sys/queue.h> 72 73 #include <machine/bus.h> 74 #include <machine/endian.h> 75 76 #include <dev/usb/usb.h> 77 #include <dev/usb/usbdi.h> 78 #include <dev/usb/usbdivar.h> 79 #include <dev/usb/usb_mem.h> 80 #include <dev/usb/usb_quirks.h> 81 82 #include <dev/usb/ohcireg.h> 83 #include <dev/usb/ohcivar.h> 84 85 #if defined(__FreeBSD__) 86 #include <machine/clock.h> 87 88 #define delay(d) DELAY(d) 89 #endif 90 91 #if defined(__OpenBSD__) 92 struct cfdriver ohci_cd = { 93 NULL, "ohci", DV_DULL 94 }; 95 #endif 96 97 #ifdef OHCI_DEBUG 98 #define DPRINTF(x) if (ohcidebug) logprintf x 99 #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x 100 int ohcidebug = 0; 101 #ifndef __NetBSD__ 102 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 103 #endif 104 #else 105 #define DPRINTF(x) 106 #define DPRINTFN(n,x) 107 #endif 108 109 #if BYTE_ORDER == BIG_ENDIAN 110 #define SWAP_ENDIAN OHCI_LITTLE_ENDIAN 111 #else 112 #define SWAP_ENDIAN OHCI_BIG_ENDIAN 113 #endif 114 115 #define O16TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap16(val) : val) 116 #define O32TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap32(val) : val) 117 #define HTOO16(val) O16TOH(val) 118 #define HTOO32(val) O32TOH(val) 119 120 struct ohci_pipe; 121 122 pnp_status_t ohci_power(device_t, pnp_request_t, void *); 123 124 Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *); 125 Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *); 126 127 Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *); 128 Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *); 129 130 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *); 131 Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *); 132 133 #if 0 134 Static void ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *, 135 ohci_soft_td_t *); 136 #endif 137 Static usbd_status ohci_alloc_std_chain(struct ohci_pipe *, 138 ohci_softc_t *, int, int, usbd_xfer_handle, 139 ohci_soft_td_t *, ohci_soft_td_t **); 140 141 Static void ohci_shutdown(void *v); 142 Static usbd_status ohci_open(usbd_pipe_handle); 143 Static void ohci_poll(struct usbd_bus *); 144 Static void ohci_softintr(void *); 145 Static void ohci_waitintr(ohci_softc_t *, usbd_xfer_handle); 146 Static void ohci_rhsc(ohci_softc_t *, usbd_xfer_handle); 147 148 Static usbd_status ohci_device_request(usbd_xfer_handle xfer); 149 Static void ohci_add_ed(ohci_softc_t *, ohci_soft_ed_t *, 150 ohci_soft_ed_t *); 151 152 Static void ohci_rem_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 153 Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *); 154 Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *); 155 Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t); 156 Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *); 157 Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *); 158 Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t); 159 160 Static usbd_status ohci_setup_isoc(usbd_pipe_handle pipe); 161 Static void ohci_device_isoc_enter(usbd_xfer_handle); 162 163 Static usbd_status ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 164 Static void ohci_freem(struct usbd_bus *, usb_dma_t *); 165 166 Static usbd_xfer_handle ohci_allocx(struct usbd_bus *); 167 Static void ohci_freex(struct usbd_bus *, usbd_xfer_handle); 168 169 Static usbd_status ohci_root_ctrl_transfer(usbd_xfer_handle); 170 Static usbd_status ohci_root_ctrl_start(usbd_xfer_handle); 171 Static void ohci_root_ctrl_abort(usbd_xfer_handle); 172 Static void ohci_root_ctrl_close(usbd_pipe_handle); 173 Static void ohci_root_ctrl_done(usbd_xfer_handle); 174 175 Static usbd_status ohci_root_intr_transfer(usbd_xfer_handle); 176 Static usbd_status ohci_root_intr_start(usbd_xfer_handle); 177 Static void ohci_root_intr_abort(usbd_xfer_handle); 178 Static void ohci_root_intr_close(usbd_pipe_handle); 179 Static void ohci_root_intr_done(usbd_xfer_handle); 180 181 Static usbd_status ohci_device_ctrl_transfer(usbd_xfer_handle); 182 Static usbd_status ohci_device_ctrl_start(usbd_xfer_handle); 183 Static void ohci_device_ctrl_abort(usbd_xfer_handle); 184 Static void ohci_device_ctrl_close(usbd_pipe_handle); 185 Static void ohci_device_ctrl_done(usbd_xfer_handle); 186 187 Static usbd_status ohci_device_bulk_transfer(usbd_xfer_handle); 188 Static usbd_status ohci_device_bulk_start(usbd_xfer_handle); 189 Static void ohci_device_bulk_abort(usbd_xfer_handle); 190 Static void ohci_device_bulk_close(usbd_pipe_handle); 191 Static void ohci_device_bulk_done(usbd_xfer_handle); 192 193 Static usbd_status ohci_device_intr_transfer(usbd_xfer_handle); 194 Static usbd_status ohci_device_intr_start(usbd_xfer_handle); 195 Static void ohci_device_intr_abort(usbd_xfer_handle); 196 Static void ohci_device_intr_close(usbd_pipe_handle); 197 Static void ohci_device_intr_done(usbd_xfer_handle); 198 199 Static usbd_status ohci_device_isoc_transfer(usbd_xfer_handle); 200 Static usbd_status ohci_device_isoc_start(usbd_xfer_handle); 201 Static void ohci_device_isoc_abort(usbd_xfer_handle); 202 Static void ohci_device_isoc_close(usbd_pipe_handle); 203 Static void ohci_device_isoc_done(usbd_xfer_handle); 204 205 Static usbd_status ohci_device_setintr(ohci_softc_t *sc, 206 struct ohci_pipe *pipe, int ival); 207 208 Static int ohci_str(usb_string_descriptor_t *, int, const char *); 209 210 Static void ohci_timeout(void *); 211 Static void ohci_timeout_task(void *); 212 Static void ohci_rhsc_enable(void *); 213 214 Static void ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *); 215 Static void ohci_abort_xfer(usbd_xfer_handle, usbd_status); 216 217 Static void ohci_device_clear_toggle(usbd_pipe_handle pipe); 218 Static void ohci_noop(usbd_pipe_handle pipe); 219 220 #ifdef OHCI_DEBUG 221 Static void ohci_dumpregs(ohci_softc_t *); 222 Static void ohci_dump_tds(ohci_softc_t *, ohci_soft_td_t *); 223 Static void ohci_dump_td(ohci_softc_t *, ohci_soft_td_t *); 224 Static void ohci_dump_ed(ohci_softc_t *, ohci_soft_ed_t *); 225 Static void ohci_dump_itd(ohci_softc_t *, ohci_soft_itd_t *); 226 Static void ohci_dump_itds(ohci_softc_t *, ohci_soft_itd_t *); 227 #endif 228 229 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 230 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 231 #define OWRITE1(sc, r, x) \ 232 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 233 #define OWRITE2(sc, r, x) \ 234 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 235 #define OWRITE4(sc, r, x) \ 236 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 237 static __inline uint8_t 238 OREAD1(ohci_softc_t *sc, bus_size_t r) 239 { 240 241 OBARR(sc); 242 return bus_space_read_1(sc->iot, sc->ioh, r); 243 } 244 245 static __inline uint16_t 246 OREAD2(ohci_softc_t *sc, bus_size_t r) 247 { 248 249 OBARR(sc); 250 return bus_space_read_2(sc->iot, sc->ioh, r); 251 } 252 253 static __inline uint32_t 254 OREAD4(ohci_softc_t *sc, bus_size_t r) 255 { 256 257 OBARR(sc); 258 return bus_space_read_4(sc->iot, sc->ioh, r); 259 } 260 261 /* Reverse the bits in a value 0 .. 31 */ 262 Static u_int8_t revbits[OHCI_NO_INTRS] = 263 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 264 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 265 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 266 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 267 268 struct ohci_pipe { 269 struct usbd_pipe pipe; 270 ohci_soft_ed_t *sed; 271 union { 272 ohci_soft_td_t *td; 273 ohci_soft_itd_t *itd; 274 } tail; 275 /* Info needed for different pipe kinds. */ 276 union { 277 /* Control pipe */ 278 struct { 279 usb_dma_t reqdma; 280 u_int length; 281 ohci_soft_td_t *setup, *data, *stat; 282 } ctl; 283 /* Interrupt pipe */ 284 struct { 285 int nslots; 286 int pos; 287 } intr; 288 /* Bulk pipe */ 289 struct { 290 u_int length; 291 int isread; 292 } bulk; 293 /* Iso pipe */ 294 struct iso { 295 int next, inuse; 296 } iso; 297 } u; 298 }; 299 300 #define OHCI_INTR_ENDPT 1 301 302 Static const struct usbd_bus_methods ohci_bus_methods = { 303 ohci_open, 304 ohci_softintr, 305 ohci_poll, 306 ohci_allocm, 307 ohci_freem, 308 ohci_allocx, 309 ohci_freex, 310 }; 311 312 Static const struct usbd_pipe_methods ohci_root_ctrl_methods = { 313 ohci_root_ctrl_transfer, 314 ohci_root_ctrl_start, 315 ohci_root_ctrl_abort, 316 ohci_root_ctrl_close, 317 ohci_noop, 318 ohci_root_ctrl_done, 319 }; 320 321 Static const struct usbd_pipe_methods ohci_root_intr_methods = { 322 ohci_root_intr_transfer, 323 ohci_root_intr_start, 324 ohci_root_intr_abort, 325 ohci_root_intr_close, 326 ohci_noop, 327 ohci_root_intr_done, 328 }; 329 330 Static const struct usbd_pipe_methods ohci_device_ctrl_methods = { 331 ohci_device_ctrl_transfer, 332 ohci_device_ctrl_start, 333 ohci_device_ctrl_abort, 334 ohci_device_ctrl_close, 335 ohci_noop, 336 ohci_device_ctrl_done, 337 }; 338 339 Static const struct usbd_pipe_methods ohci_device_intr_methods = { 340 ohci_device_intr_transfer, 341 ohci_device_intr_start, 342 ohci_device_intr_abort, 343 ohci_device_intr_close, 344 ohci_device_clear_toggle, 345 ohci_device_intr_done, 346 }; 347 348 Static const struct usbd_pipe_methods ohci_device_bulk_methods = { 349 ohci_device_bulk_transfer, 350 ohci_device_bulk_start, 351 ohci_device_bulk_abort, 352 ohci_device_bulk_close, 353 ohci_device_clear_toggle, 354 ohci_device_bulk_done, 355 }; 356 357 Static const struct usbd_pipe_methods ohci_device_isoc_methods = { 358 ohci_device_isoc_transfer, 359 ohci_device_isoc_start, 360 ohci_device_isoc_abort, 361 ohci_device_isoc_close, 362 ohci_noop, 363 ohci_device_isoc_done, 364 }; 365 366 #if defined(__NetBSD__) || defined(__OpenBSD__) 367 int 368 ohci_activate(device_ptr_t self, enum devact act) 369 { 370 struct ohci_softc *sc = (struct ohci_softc *)self; 371 int rv = 0; 372 373 switch (act) { 374 case DVACT_ACTIVATE: 375 return (EOPNOTSUPP); 376 377 case DVACT_DEACTIVATE: 378 sc->sc_dying = 1; 379 if (sc->sc_child != NULL) 380 rv = config_deactivate(sc->sc_child); 381 break; 382 } 383 return (rv); 384 } 385 386 int 387 ohci_detach(struct ohci_softc *sc, int flags) 388 { 389 int rv = 0; 390 391 if (sc->sc_child != NULL) 392 rv = config_detach(sc->sc_child, flags); 393 394 if (rv != 0) 395 return (rv); 396 397 usb_uncallout(sc->sc_tmo_rhsc, ohci_rhsc_enable, sc); 398 399 #if defined(__NetBSD__) || defined(__OpenBSD__) 400 shutdownhook_disestablish(sc->sc_shutdownhook); 401 #endif 402 403 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 404 405 /* free data structures XXX */ 406 407 return (rv); 408 } 409 #endif 410 411 ohci_soft_ed_t * 412 ohci_alloc_sed(ohci_softc_t *sc) 413 { 414 ohci_soft_ed_t *sed; 415 usbd_status err; 416 int i, offs; 417 usb_dma_t dma; 418 419 if (sc->sc_freeeds == NULL) { 420 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 421 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 422 OHCI_ED_ALIGN, &dma); 423 if (err) 424 return (0); 425 for(i = 0; i < OHCI_SED_CHUNK; i++) { 426 offs = i * OHCI_SED_SIZE; 427 sed = KERNADDR(&dma, offs); 428 sed->physaddr = DMAADDR(&dma, offs); 429 sed->next = sc->sc_freeeds; 430 sc->sc_freeeds = sed; 431 } 432 } 433 sed = sc->sc_freeeds; 434 sc->sc_freeeds = sed->next; 435 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 436 sed->next = 0; 437 return (sed); 438 } 439 440 void 441 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 442 { 443 sed->next = sc->sc_freeeds; 444 sc->sc_freeeds = sed; 445 } 446 447 ohci_soft_td_t * 448 ohci_alloc_std(ohci_softc_t *sc) 449 { 450 ohci_soft_td_t *std; 451 usbd_status err; 452 int i, offs; 453 usb_dma_t dma; 454 int s; 455 456 if (sc->sc_freetds == NULL) { 457 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 458 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 459 OHCI_TD_ALIGN, &dma); 460 if (err) 461 return (NULL); 462 s = splusb(); 463 for(i = 0; i < OHCI_STD_CHUNK; i++) { 464 offs = i * OHCI_STD_SIZE; 465 std = KERNADDR(&dma, offs); 466 std->physaddr = DMAADDR(&dma, offs); 467 std->nexttd = sc->sc_freetds; 468 sc->sc_freetds = std; 469 } 470 splx(s); 471 } 472 473 s = splusb(); 474 std = sc->sc_freetds; 475 sc->sc_freetds = std->nexttd; 476 memset(&std->td, 0, sizeof(ohci_td_t)); 477 std->nexttd = NULL; 478 std->xfer = NULL; 479 ohci_hash_add_td(sc, std); 480 splx(s); 481 482 return (std); 483 } 484 485 void 486 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std) 487 { 488 int s; 489 490 s = splusb(); 491 ohci_hash_rem_td(sc, std); 492 std->nexttd = sc->sc_freetds; 493 sc->sc_freetds = std; 494 splx(s); 495 } 496 497 usbd_status 498 ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc, 499 int alen, int rd, usbd_xfer_handle xfer, 500 ohci_soft_td_t *sp, ohci_soft_td_t **ep) 501 { 502 ohci_soft_td_t *next, *cur; 503 ohci_physaddr_t dataphys, dataphysend; 504 u_int32_t tdflags; 505 int len, curlen; 506 usb_dma_t *dma = &xfer->dmabuf; 507 u_int16_t flags = xfer->flags; 508 509 DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen)); 510 511 len = alen; 512 cur = sp; 513 dataphys = DMAADDR(dma, 0); 514 dataphysend = OHCI_PAGE(dataphys + len - 1); 515 tdflags = HTOO32( 516 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 517 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) | 518 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR); 519 520 for (;;) { 521 next = ohci_alloc_std(sc); 522 if (next == NULL) 523 goto nomem; 524 525 /* The OHCI hardware can handle at most one page crossing. */ 526 if (OHCI_PAGE(dataphys) == dataphysend || 527 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) { 528 /* we can handle it in this TD */ 529 curlen = len; 530 } else { 531 /* must use multiple TDs, fill as much as possible. */ 532 curlen = 2 * OHCI_PAGE_SIZE - 533 (dataphys & (OHCI_PAGE_SIZE-1)); 534 /* the length must be a multiple of the max size */ 535 curlen -= curlen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize); 536 #ifdef DIAGNOSTIC 537 if (curlen == 0) 538 panic("ohci_alloc_std: curlen == 0"); 539 #endif 540 } 541 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x " 542 "dataphysend=0x%08x len=%d curlen=%d\n", 543 dataphys, dataphysend, 544 len, curlen)); 545 len -= curlen; 546 547 cur->td.td_flags = tdflags; 548 cur->td.td_cbp = HTOO32(dataphys); 549 cur->nexttd = next; 550 cur->td.td_nexttd = HTOO32(next->physaddr); 551 cur->td.td_be = HTOO32(dataphys + curlen - 1); 552 cur->len = curlen; 553 cur->flags = OHCI_ADD_LEN; 554 cur->xfer = xfer; 555 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n", 556 dataphys, dataphys + curlen - 1)); 557 if (len == 0) 558 break; 559 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n")); 560 dataphys += curlen; 561 cur = next; 562 } 563 if (!rd && (flags & USBD_FORCE_SHORT_XFER) && 564 alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) { 565 /* Force a 0 length transfer at the end. */ 566 567 cur = next; 568 next = ohci_alloc_std(sc); 569 if (next == NULL) 570 goto nomem; 571 572 cur->td.td_flags = tdflags; 573 cur->td.td_cbp = 0; /* indicate 0 length packet */ 574 cur->nexttd = next; 575 cur->td.td_nexttd = HTOO32(next->physaddr); 576 cur->td.td_be = ~0; 577 cur->len = 0; 578 cur->flags = 0; 579 cur->xfer = xfer; 580 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n")); 581 } 582 *ep = cur; 583 584 return (USBD_NORMAL_COMPLETION); 585 586 nomem: 587 /* XXX free chain */ 588 return (USBD_NOMEM); 589 } 590 591 #if 0 592 Static void 593 ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std, 594 ohci_soft_td_t *stdend) 595 { 596 ohci_soft_td_t *p; 597 598 for (; std != stdend; std = p) { 599 p = std->nexttd; 600 ohci_free_std(sc, std); 601 } 602 } 603 #endif 604 605 ohci_soft_itd_t * 606 ohci_alloc_sitd(ohci_softc_t *sc) 607 { 608 ohci_soft_itd_t *sitd; 609 usbd_status err; 610 int i, s, offs; 611 usb_dma_t dma; 612 613 if (sc->sc_freeitds == NULL) { 614 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n")); 615 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK, 616 OHCI_ITD_ALIGN, &dma); 617 if (err) 618 return (NULL); 619 s = splusb(); 620 for(i = 0; i < OHCI_SITD_CHUNK; i++) { 621 offs = i * OHCI_SITD_SIZE; 622 sitd = KERNADDR(&dma, offs); 623 sitd->physaddr = DMAADDR(&dma, offs); 624 sitd->nextitd = sc->sc_freeitds; 625 sc->sc_freeitds = sitd; 626 } 627 splx(s); 628 } 629 630 s = splusb(); 631 sitd = sc->sc_freeitds; 632 sc->sc_freeitds = sitd->nextitd; 633 memset(&sitd->itd, 0, sizeof(ohci_itd_t)); 634 sitd->nextitd = NULL; 635 sitd->xfer = NULL; 636 ohci_hash_add_itd(sc, sitd); 637 splx(s); 638 639 #ifdef DIAGNOSTIC 640 sitd->isdone = 0; 641 #endif 642 643 return (sitd); 644 } 645 646 void 647 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 648 { 649 int s; 650 651 DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd)); 652 653 #ifdef DIAGNOSTIC 654 if (!sitd->isdone) { 655 panic("ohci_free_sitd: sitd=%p not done", sitd); 656 return; 657 } 658 /* Warn double free */ 659 sitd->isdone = 0; 660 #endif 661 662 s = splusb(); 663 ohci_hash_rem_itd(sc, sitd); 664 sitd->nextitd = sc->sc_freeitds; 665 sc->sc_freeitds = sitd; 666 splx(s); 667 } 668 669 usbd_status 670 ohci_init(ohci_softc_t *sc) 671 { 672 ohci_soft_ed_t *sed, *psed; 673 usbd_status err; 674 int i; 675 u_int32_t s, ctl, rwc, ival, hcr, fm, per, rev, desca, descb; 676 677 DPRINTF(("ohci_init: start\n")); 678 #if defined(__OpenBSD__) 679 printf(","); 680 #else 681 printf("%s:", USBDEVNAME(sc->sc_bus.bdev)); 682 #endif 683 rev = OREAD4(sc, OHCI_REVISION); 684 printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev), 685 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 686 687 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 688 printf("%s: unsupported OHCI revision\n", 689 USBDEVNAME(sc->sc_bus.bdev)); 690 sc->sc_bus.usbrev = USBREV_UNKNOWN; 691 return (USBD_INVAL); 692 } 693 sc->sc_bus.usbrev = USBREV_1_0; 694 695 for (i = 0; i < OHCI_HASH_SIZE; i++) 696 LIST_INIT(&sc->sc_hash_tds[i]); 697 for (i = 0; i < OHCI_HASH_SIZE; i++) 698 LIST_INIT(&sc->sc_hash_itds[i]); 699 700 SIMPLEQ_INIT(&sc->sc_free_xfers); 701 702 #ifdef __NetBSD__ 703 usb_setup_reserve(sc, &sc->sc_dma_reserve, sc->sc_bus.dmatag, 704 USB_MEM_RESERVE); 705 #endif 706 707 /* XXX determine alignment by R/W */ 708 /* Allocate the HCCA area. */ 709 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 710 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 711 if (err) 712 return (err); 713 sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0); 714 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 715 716 sc->sc_eintrs = OHCI_NORMAL_INTRS; 717 718 /* Allocate dummy ED that starts the control list. */ 719 sc->sc_ctrl_head = ohci_alloc_sed(sc); 720 if (sc->sc_ctrl_head == NULL) { 721 err = USBD_NOMEM; 722 goto bad1; 723 } 724 sc->sc_ctrl_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 725 726 /* Allocate dummy ED that starts the bulk list. */ 727 sc->sc_bulk_head = ohci_alloc_sed(sc); 728 if (sc->sc_bulk_head == NULL) { 729 err = USBD_NOMEM; 730 goto bad2; 731 } 732 sc->sc_bulk_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 733 734 /* Allocate dummy ED that starts the isochronous list. */ 735 sc->sc_isoc_head = ohci_alloc_sed(sc); 736 if (sc->sc_isoc_head == NULL) { 737 err = USBD_NOMEM; 738 goto bad3; 739 } 740 sc->sc_isoc_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 741 742 /* Allocate all the dummy EDs that make up the interrupt tree. */ 743 for (i = 0; i < OHCI_NO_EDS; i++) { 744 sed = ohci_alloc_sed(sc); 745 if (sed == NULL) { 746 while (--i >= 0) 747 ohci_free_sed(sc, sc->sc_eds[i]); 748 err = USBD_NOMEM; 749 goto bad4; 750 } 751 /* All ED fields are set to 0. */ 752 sc->sc_eds[i] = sed; 753 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 754 if (i != 0) 755 psed = sc->sc_eds[(i-1) / 2]; 756 else 757 psed= sc->sc_isoc_head; 758 sed->next = psed; 759 sed->ed.ed_nexted = HTOO32(psed->physaddr); 760 } 761 /* 762 * Fill HCCA interrupt table. The bit reversal is to get 763 * the tree set up properly to spread the interrupts. 764 */ 765 for (i = 0; i < OHCI_NO_INTRS; i++) 766 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 767 HTOO32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 768 769 #ifdef OHCI_DEBUG 770 if (ohcidebug > 15) { 771 for (i = 0; i < OHCI_NO_EDS; i++) { 772 printf("ed#%d ", i); 773 ohci_dump_ed(sc, sc->sc_eds[i]); 774 } 775 printf("iso "); 776 ohci_dump_ed(sc, sc->sc_isoc_head); 777 } 778 #endif 779 780 /* Preserve values programmed by SMM/BIOS but lost over reset. */ 781 ctl = OREAD4(sc, OHCI_CONTROL); 782 rwc = ctl & OHCI_RWC; 783 fm = OREAD4(sc, OHCI_FM_INTERVAL); 784 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 785 descb = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 786 787 /* Determine in what context we are running. */ 788 if (ctl & OHCI_IR) { 789 /* SMM active, request change */ 790 DPRINTF(("ohci_init: SMM active, request owner change\n")); 791 if ((sc->sc_intre & (OHCI_OC | OHCI_MIE)) == 792 (OHCI_OC | OHCI_MIE)) 793 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_MIE); 794 s = OREAD4(sc, OHCI_COMMAND_STATUS); 795 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 796 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 797 usb_delay_ms(&sc->sc_bus, 1); 798 ctl = OREAD4(sc, OHCI_CONTROL); 799 } 800 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_MIE); 801 if ((ctl & OHCI_IR) == 0) { 802 printf("%s: SMM does not respond, resetting\n", 803 USBDEVNAME(sc->sc_bus.bdev)); 804 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 805 goto reset; 806 } 807 #if 0 808 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */ 809 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 810 /* BIOS started controller. */ 811 DPRINTF(("ohci_init: BIOS active\n")); 812 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 813 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL | rwc); 814 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 815 } 816 #endif 817 } else { 818 DPRINTF(("ohci_init: cold started\n")); 819 reset: 820 /* Controller was cold started. */ 821 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 822 } 823 824 /* 825 * This reset should not be necessary according to the OHCI spec, but 826 * without it some controllers do not start. 827 */ 828 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 829 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 830 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 831 832 /* We now own the host controller and the bus has been reset. */ 833 834 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 835 /* Nominal time for a reset is 10 us. */ 836 for (i = 0; i < 10; i++) { 837 delay(10); 838 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 839 if (!hcr) 840 break; 841 } 842 if (hcr) { 843 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 844 err = USBD_IOERROR; 845 goto bad5; 846 } 847 #ifdef OHCI_DEBUG 848 if (ohcidebug > 15) 849 ohci_dumpregs(sc); 850 #endif 851 852 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 853 854 /* Set up HC registers. */ 855 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 856 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 857 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 858 /* disable all interrupts and then switch on all desired interrupts */ 859 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 860 /* switch on desired functional features */ 861 ctl = OREAD4(sc, OHCI_CONTROL); 862 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 863 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 864 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL | rwc; 865 /* And finally start it! */ 866 OWRITE4(sc, OHCI_CONTROL, ctl); 867 868 /* 869 * The controller is now OPERATIONAL. Set a some final 870 * registers that should be set earlier, but that the 871 * controller ignores when in the SUSPEND state. 872 */ 873 ival = OHCI_GET_IVAL(fm); 874 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 875 fm |= OHCI_FSMPS(ival) | ival; 876 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 877 per = OHCI_PERIODIC(ival); /* 90% periodic */ 878 OWRITE4(sc, OHCI_PERIODIC_START, per); 879 880 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */ 881 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP); 882 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 883 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY); 884 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca); 885 886 /* 887 * The AMD756 requires a delay before re-reading the register, 888 * otherwise it will occasionally report 0 ports. 889 */ 890 sc->sc_noport = 0; 891 for (i = 0; i < 10 && sc->sc_noport == 0; i++) { 892 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY); 893 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 894 } 895 896 #ifdef OHCI_DEBUG 897 if (ohcidebug > 5) 898 ohci_dumpregs(sc); 899 #endif 900 901 /* Set up the bus struct. */ 902 sc->sc_bus.methods = &ohci_bus_methods; 903 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 904 905 #if defined(__NetBSD__) || defined(__OpenBSD__) 906 sc->sc_control = sc->sc_intre = 0; 907 sc->sc_shutdownhook = shutdownhook_establish(ohci_shutdown, sc); 908 #endif 909 910 usb_callout_init(sc->sc_tmo_rhsc); 911 912 /* Finally, turn on interrupts. */ 913 DPRINTFN(1,("ohci_init: enabling\n")); 914 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 915 916 return (USBD_NORMAL_COMPLETION); 917 918 bad5: 919 for (i = 0; i < OHCI_NO_EDS; i++) 920 ohci_free_sed(sc, sc->sc_eds[i]); 921 bad4: 922 ohci_free_sed(sc, sc->sc_isoc_head); 923 bad3: 924 ohci_free_sed(sc, sc->sc_bulk_head); 925 bad2: 926 ohci_free_sed(sc, sc->sc_ctrl_head); 927 bad1: 928 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 929 return (err); 930 } 931 932 usbd_status 933 ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 934 { 935 #if defined(__NetBSD__) || defined(__OpenBSD__) 936 struct ohci_softc *sc = (struct ohci_softc *)bus; 937 #endif 938 usbd_status status; 939 940 status = usb_allocmem(&sc->sc_bus, size, 0, dma); 941 #ifdef __NetBSD__ 942 if (status == USBD_NOMEM) 943 status = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size); 944 #endif 945 return status; 946 } 947 948 void 949 ohci_freem(struct usbd_bus *bus, usb_dma_t *dma) 950 { 951 #if defined(__NetBSD__) || defined(__OpenBSD__) 952 struct ohci_softc *sc = (struct ohci_softc *)bus; 953 #endif 954 #ifdef __NetBSD__ 955 if (dma->block->flags & USB_DMA_RESERVE) { 956 usb_reserve_freem(&((struct ohci_softc *)bus)->sc_dma_reserve, 957 dma); 958 return; 959 } 960 #endif 961 usb_freemem(&sc->sc_bus, dma); 962 } 963 964 usbd_xfer_handle 965 ohci_allocx(struct usbd_bus *bus) 966 { 967 struct ohci_softc *sc = (struct ohci_softc *)bus; 968 usbd_xfer_handle xfer; 969 970 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 971 if (xfer != NULL) { 972 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 973 #ifdef DIAGNOSTIC 974 if (xfer->busy_free != XFER_FREE) { 975 printf("ohci_allocx: xfer=%p not free, 0x%08x\n", xfer, 976 xfer->busy_free); 977 } 978 #endif 979 } else { 980 xfer = malloc(sizeof(struct ohci_xfer), M_USB, M_NOWAIT); 981 } 982 if (xfer != NULL) { 983 memset(xfer, 0, sizeof (struct ohci_xfer)); 984 #ifdef DIAGNOSTIC 985 xfer->busy_free = XFER_BUSY; 986 #endif 987 } 988 return (xfer); 989 } 990 991 void 992 ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 993 { 994 struct ohci_softc *sc = (struct ohci_softc *)bus; 995 996 #ifdef DIAGNOSTIC 997 if (xfer->busy_free != XFER_BUSY) { 998 printf("ohci_freex: xfer=%p not busy, 0x%08x\n", xfer, 999 xfer->busy_free); 1000 } 1001 xfer->busy_free = XFER_FREE; 1002 #endif 1003 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 1004 } 1005 1006 /* 1007 * Shut down the controller when the system is going down. 1008 */ 1009 void 1010 ohci_shutdown(void *v) 1011 { 1012 ohci_softc_t *sc = v; 1013 1014 DPRINTF(("ohci_shutdown: stopping the HC\n")); 1015 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1016 } 1017 1018 /* 1019 * Handle suspend/resume. 1020 * 1021 * We need to switch to polling mode here, because this routine is 1022 * called from an interupt context. This is all right since we 1023 * are almost suspended anyway. 1024 */ 1025 pnp_status_t 1026 ohci_power(device_t dv, pnp_request_t req, void *opaque) 1027 { 1028 ohci_softc_t *sc = (ohci_softc_t *)dv; 1029 pnp_capabilities_t *pcaps; 1030 pnp_state_t *pstate; 1031 u_int32_t ctl; 1032 int s; 1033 1034 #ifdef OHCI_DEBUG 1035 DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why)); 1036 ohci_dumpregs(sc); 1037 #endif 1038 1039 switch (req) { 1040 case PNP_REQUEST_GET_CAPABILITIES: 1041 pcaps = opaque; 1042 pcaps->state = PNP_STATE_D0 | PNP_STATE_D3; 1043 break; 1044 case PNP_REQUEST_GET_STATE: 1045 pstate = opaque; 1046 *pstate = PNP_STATE_D0; /* XXX */ 1047 break; 1048 case PNP_REQUEST_SET_STATE: 1049 pstate = opaque; 1050 switch (*pstate) { 1051 case PNP_STATE_D3: 1052 s = splhardusb(); 1053 sc->sc_bus.use_polling++; 1054 ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK; 1055 if (sc->sc_control == 0) { 1056 /* 1057 * Preserve register values, in case that BIOS 1058 * does not recover them. 1059 */ 1060 sc->sc_control = ctl; 1061 sc->sc_intre = OREAD4(sc, 1062 OHCI_INTERRUPT_ENABLE); 1063 } 1064 ctl |= OHCI_HCFS_SUSPEND; 1065 OWRITE4(sc, OHCI_CONTROL, ctl); 1066 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1067 sc->sc_bus.use_polling--; 1068 splx(s); 1069 break; 1070 case PNP_STATE_D0: 1071 s = splhardusb(); 1072 sc->sc_bus.use_polling++; 1073 /* Some broken BIOSes do not recover these values */ 1074 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 1075 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, 1076 sc->sc_ctrl_head->physaddr); 1077 OWRITE4(sc, OHCI_BULK_HEAD_ED, 1078 sc->sc_bulk_head->physaddr); 1079 if (sc->sc_intre) 1080 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, 1081 sc->sc_intre & 1082 (OHCI_ALL_INTRS | OHCI_MIE)); 1083 if (sc->sc_control) 1084 ctl = sc->sc_control; 1085 else 1086 ctl = OREAD4(sc, OHCI_CONTROL); 1087 ctl |= OHCI_HCFS_RESUME; 1088 OWRITE4(sc, OHCI_CONTROL, ctl); 1089 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 1090 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL; 1091 OWRITE4(sc, OHCI_CONTROL, ctl); 1092 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 1093 sc->sc_control = sc->sc_intre = 0; 1094 sc->sc_bus.use_polling--; 1095 splx(s); 1096 break; 1097 default: 1098 return PNP_STATUS_UNSUPPORTED; 1099 } 1100 break; 1101 default: 1102 return PNP_STATUS_UNSUPPORTED; 1103 } 1104 1105 return PNP_STATUS_SUCCESS; 1106 } 1107 1108 #ifdef OHCI_DEBUG 1109 void 1110 ohci_dumpregs(ohci_softc_t *sc) 1111 { 1112 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 1113 OREAD4(sc, OHCI_REVISION), 1114 OREAD4(sc, OHCI_CONTROL), 1115 OREAD4(sc, OHCI_COMMAND_STATUS))); 1116 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 1117 OREAD4(sc, OHCI_INTERRUPT_STATUS), 1118 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 1119 OREAD4(sc, OHCI_INTERRUPT_DISABLE))); 1120 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 1121 OREAD4(sc, OHCI_HCCA), 1122 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 1123 OREAD4(sc, OHCI_CONTROL_HEAD_ED))); 1124 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 1125 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 1126 OREAD4(sc, OHCI_BULK_HEAD_ED), 1127 OREAD4(sc, OHCI_BULK_CURRENT_ED))); 1128 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 1129 OREAD4(sc, OHCI_DONE_HEAD), 1130 OREAD4(sc, OHCI_FM_INTERVAL), 1131 OREAD4(sc, OHCI_FM_REMAINING))); 1132 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 1133 OREAD4(sc, OHCI_FM_NUMBER), 1134 OREAD4(sc, OHCI_PERIODIC_START), 1135 OREAD4(sc, OHCI_LS_THRESHOLD))); 1136 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n", 1137 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 1138 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 1139 OREAD4(sc, OHCI_RH_STATUS))); 1140 DPRINTF((" port1=0x%08x port2=0x%08x\n", 1141 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 1142 OREAD4(sc, OHCI_RH_PORT_STATUS(2)))); 1143 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n", 1144 O32TOH(sc->sc_hcca->hcca_frame_number), 1145 O32TOH(sc->sc_hcca->hcca_done_head))); 1146 } 1147 #endif 1148 1149 Static int ohci_intr1(ohci_softc_t *); 1150 1151 int 1152 ohci_intr(void *p) 1153 { 1154 ohci_softc_t *sc = p; 1155 1156 if (sc == NULL || sc->sc_dying) 1157 return (0); 1158 1159 /* If we get an interrupt while polling, then just ignore it. */ 1160 if (sc->sc_bus.use_polling) { 1161 #ifdef DIAGNOSTIC 1162 DPRINTFN(16, ("ohci_intr: ignored interrupt while polling\n")); 1163 #endif 1164 /* for level triggered intrs, should do something to ack */ 1165 OWRITE4(sc, OHCI_INTERRUPT_STATUS, 1166 OREAD4(sc, OHCI_INTERRUPT_STATUS)); 1167 1168 return (0); 1169 } 1170 1171 return (ohci_intr1(sc)); 1172 } 1173 1174 Static int 1175 ohci_intr1(ohci_softc_t *sc) 1176 { 1177 u_int32_t intrs, eintrs; 1178 1179 DPRINTFN(14,("ohci_intr1: enter\n")); 1180 1181 /* In case the interrupt occurs before initialization has completed. */ 1182 if (sc == NULL || sc->sc_hcca == NULL) { 1183 #ifdef DIAGNOSTIC 1184 printf("ohci_intr: sc->sc_hcca == NULL\n"); 1185 #endif 1186 return (0); 1187 } 1188 1189 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1190 if (!intrs) 1191 return (0); 1192 1193 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs & ~(OHCI_MIE|OHCI_WDH)); /* Acknowledge */ 1194 eintrs = intrs & sc->sc_eintrs; 1195 if (!eintrs) 1196 return (0); 1197 1198 sc->sc_bus.intr_context++; 1199 sc->sc_bus.no_intrs++; 1200 DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 1201 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 1202 (u_int)eintrs)); 1203 1204 if (eintrs & OHCI_SO) { 1205 sc->sc_overrun_cnt++; 1206 if (usbd_ratecheck(&sc->sc_overrun_ntc)) { 1207 printf("%s: %u scheduling overruns\n", 1208 USBDEVNAME(sc->sc_bus.bdev), sc->sc_overrun_cnt); 1209 sc->sc_overrun_cnt = 0; 1210 } 1211 /* XXX do what */ 1212 eintrs &= ~OHCI_SO; 1213 } 1214 if (eintrs & OHCI_WDH) { 1215 /* 1216 * We block the interrupt below, and reenable it later from 1217 * ohci_softintr(). 1218 */ 1219 usb_schedsoftintr(&sc->sc_bus); 1220 } 1221 if (eintrs & OHCI_RD) { 1222 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev)); 1223 /* XXX process resume detect */ 1224 } 1225 if (eintrs & OHCI_UE) { 1226 printf("%s: unrecoverable error, controller halted\n", 1227 USBDEVNAME(sc->sc_bus.bdev)); 1228 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1229 /* XXX what else */ 1230 } 1231 if (eintrs & OHCI_RHSC) { 1232 /* 1233 * We block the interrupt below, and reenable it later from 1234 * a timeout. 1235 */ 1236 ohci_rhsc(sc, sc->sc_intrxfer); 1237 /* Do not allow RHSC interrupts > 1 per second */ 1238 usb_callout(sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc); 1239 } 1240 1241 sc->sc_bus.intr_context--; 1242 1243 if (eintrs != 0) { 1244 /* Block unprocessed interrupts. */ 1245 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs); 1246 sc->sc_eintrs &= ~eintrs; 1247 DPRINTFN(1, ("%s: blocking intrs 0x%x\n", 1248 USBDEVNAME(sc->sc_bus.bdev), eintrs)); 1249 } 1250 1251 return (1); 1252 } 1253 1254 void 1255 ohci_rhsc_enable(void *v_sc) 1256 { 1257 ohci_softc_t *sc = v_sc; 1258 int s; 1259 1260 s = splhardusb(); 1261 sc->sc_eintrs |= OHCI_RHSC; 1262 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1263 splx(s); 1264 } 1265 1266 #ifdef OHCI_DEBUG 1267 const char *ohci_cc_strs[] = { 1268 "NO_ERROR", 1269 "CRC", 1270 "BIT_STUFFING", 1271 "DATA_TOGGLE_MISMATCH", 1272 "STALL", 1273 "DEVICE_NOT_RESPONDING", 1274 "PID_CHECK_FAILURE", 1275 "UNEXPECTED_PID", 1276 "DATA_OVERRUN", 1277 "DATA_UNDERRUN", 1278 "BUFFER_OVERRUN", 1279 "BUFFER_UNDERRUN", 1280 "reserved", 1281 "reserved", 1282 "NOT_ACCESSED", 1283 "NOT_ACCESSED", 1284 }; 1285 #endif 1286 1287 void 1288 ohci_softintr(void *v) 1289 { 1290 ohci_softc_t *sc = v; 1291 ohci_soft_itd_t *sitd, *sidone, *sitdnext; 1292 ohci_soft_td_t *std, *sdone, *stdnext; 1293 usbd_xfer_handle xfer; 1294 struct ohci_pipe *opipe; 1295 int len, cc, s; 1296 int i, j, actlen, iframes, uedir; 1297 ohci_physaddr_t done; 1298 1299 DPRINTFN(10,("ohci_softintr: enter\n")); 1300 1301 sc->sc_bus.intr_context++; 1302 1303 s = splhardusb(); 1304 done = O32TOH(sc->sc_hcca->hcca_done_head) & ~OHCI_DONE_INTRS; 1305 sc->sc_hcca->hcca_done_head = 0; 1306 OWRITE4(sc, OHCI_INTERRUPT_STATUS, OHCI_WDH); 1307 sc->sc_eintrs |= OHCI_WDH; 1308 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_WDH); 1309 splx(s); 1310 1311 /* Reverse the done list. */ 1312 for (sdone = NULL, sidone = NULL; done != 0; ) { 1313 std = ohci_hash_find_td(sc, done); 1314 if (std != NULL) { 1315 std->dnext = sdone; 1316 done = O32TOH(std->td.td_nexttd); 1317 sdone = std; 1318 DPRINTFN(10,("add TD %p\n", std)); 1319 continue; 1320 } 1321 sitd = ohci_hash_find_itd(sc, done); 1322 if (sitd != NULL) { 1323 sitd->dnext = sidone; 1324 done = O32TOH(sitd->itd.itd_nextitd); 1325 sidone = sitd; 1326 DPRINTFN(5,("add ITD %p\n", sitd)); 1327 continue; 1328 } 1329 panic("ohci_softintr: addr 0x%08lx not found", (u_long)done); 1330 } 1331 1332 DPRINTFN(10,("ohci_softintr: sdone=%p sidone=%p\n", sdone, sidone)); 1333 1334 #ifdef OHCI_DEBUG 1335 if (ohcidebug > 10) { 1336 DPRINTF(("ohci_process_done: TD done:\n")); 1337 ohci_dump_tds(sc, sdone); 1338 } 1339 #endif 1340 1341 for (std = sdone; std; std = stdnext) { 1342 xfer = std->xfer; 1343 stdnext = std->dnext; 1344 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n", 1345 std, xfer, xfer ? xfer->hcpriv : 0)); 1346 if (xfer == NULL) { 1347 /* 1348 * xfer == NULL: There seems to be no xfer associated 1349 * with this TD. It is tailp that happened to end up on 1350 * the done queue. 1351 * Shouldn't happen, but some chips are broken(?). 1352 */ 1353 continue; 1354 } 1355 if (xfer->status == USBD_CANCELLED || 1356 xfer->status == USBD_TIMEOUT) { 1357 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1358 xfer)); 1359 /* Handled by abort routine. */ 1360 continue; 1361 } 1362 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 1363 1364 len = std->len; 1365 if (std->td.td_cbp != 0) 1366 len -= O32TOH(std->td.td_be) - 1367 O32TOH(std->td.td_cbp) + 1; 1368 DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", len, 1369 std->flags)); 1370 if (std->flags & OHCI_ADD_LEN) 1371 xfer->actlen += len; 1372 1373 cc = OHCI_TD_GET_CC(O32TOH(std->td.td_flags)); 1374 if (cc == OHCI_CC_NO_ERROR) { 1375 if (std->flags & OHCI_CALL_DONE) { 1376 xfer->status = USBD_NORMAL_COMPLETION; 1377 s = splusb(); 1378 usb_transfer_complete(xfer); 1379 splx(s); 1380 } 1381 ohci_free_std(sc, std); 1382 } else { 1383 /* 1384 * Endpoint is halted. First unlink all the TDs 1385 * belonging to the failed transfer, and then restart 1386 * the endpoint. 1387 */ 1388 ohci_soft_td_t *p, *n; 1389 opipe = (struct ohci_pipe *)xfer->pipe; 1390 1391 DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n", 1392 OHCI_TD_GET_CC(O32TOH(std->td.td_flags)), 1393 ohci_cc_strs[OHCI_TD_GET_CC(O32TOH(std->td.td_flags))])); 1394 1395 /* remove TDs */ 1396 for (p = std; p->xfer == xfer; p = n) { 1397 n = p->nexttd; 1398 ohci_free_std(sc, p); 1399 } 1400 1401 /* clear halt */ 1402 opipe->sed->ed.ed_headp = HTOO32(p->physaddr); 1403 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1404 1405 if (cc == OHCI_CC_STALL) 1406 xfer->status = USBD_STALLED; 1407 else 1408 xfer->status = USBD_IOERROR; 1409 s = splusb(); 1410 usb_transfer_complete(xfer); 1411 splx(s); 1412 } 1413 } 1414 1415 #ifdef OHCI_DEBUG 1416 if (ohcidebug > 10) { 1417 DPRINTF(("ohci_softintr: ITD done:\n")); 1418 ohci_dump_itds(sc, sidone); 1419 } 1420 #endif 1421 1422 for (sitd = sidone; sitd != NULL; sitd = sitdnext) { 1423 xfer = sitd->xfer; 1424 sitdnext = sitd->dnext; 1425 DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n", 1426 sitd, xfer, xfer ? xfer->hcpriv : 0)); 1427 if (xfer == NULL) 1428 continue; 1429 if (xfer->status == USBD_CANCELLED || 1430 xfer->status == USBD_TIMEOUT) { 1431 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1432 xfer)); 1433 /* Handled by abort routine. */ 1434 continue; 1435 } 1436 #ifdef DIAGNOSTIC 1437 if (sitd->isdone) 1438 printf("ohci_softintr: sitd=%p is done\n", sitd); 1439 sitd->isdone = 1; 1440 #endif 1441 if (sitd->flags & OHCI_CALL_DONE) { 1442 ohci_soft_itd_t *next; 1443 1444 opipe = (struct ohci_pipe *)xfer->pipe; 1445 opipe->u.iso.inuse -= xfer->nframes; 1446 uedir = UE_GET_DIR(xfer->pipe->endpoint->edesc-> 1447 bEndpointAddress); 1448 xfer->status = USBD_NORMAL_COMPLETION; 1449 actlen = 0; 1450 for (i = 0, sitd = xfer->hcpriv;; 1451 sitd = next) { 1452 next = sitd->nextitd; 1453 if (OHCI_ITD_GET_CC(O32TOH(sitd-> 1454 itd.itd_flags)) != OHCI_CC_NO_ERROR) 1455 xfer->status = USBD_IOERROR; 1456 /* For input, update frlengths with actual */ 1457 /* XXX anything necessary for output? */ 1458 if (uedir == UE_DIR_IN && 1459 xfer->status == USBD_NORMAL_COMPLETION) { 1460 iframes = OHCI_ITD_GET_FC(O32TOH( 1461 sitd->itd.itd_flags)); 1462 for (j = 0; j < iframes; i++, j++) { 1463 len = O16TOH(sitd-> 1464 itd.itd_offset[j]); 1465 if ((OHCI_ITD_PSW_GET_CC(len) & 1466 OHCI_CC_NOT_ACCESSED_MASK) 1467 == OHCI_CC_NOT_ACCESSED) 1468 len = 0; 1469 else 1470 len = OHCI_ITD_PSW_LENGTH(len); 1471 xfer->frlengths[i] = len; 1472 actlen += len; 1473 } 1474 } 1475 if (sitd->flags & OHCI_CALL_DONE) 1476 break; 1477 ohci_free_sitd(sc, sitd); 1478 } 1479 ohci_free_sitd(sc, sitd); 1480 if (uedir == UE_DIR_IN && 1481 xfer->status == USBD_NORMAL_COMPLETION) 1482 xfer->actlen = actlen; 1483 xfer->hcpriv = NULL; 1484 1485 s = splusb(); 1486 usb_transfer_complete(xfer); 1487 splx(s); 1488 } 1489 } 1490 1491 #ifdef USB_USE_SOFTINTR 1492 if (sc->sc_softwake) { 1493 sc->sc_softwake = 0; 1494 wakeup(&sc->sc_softwake); 1495 } 1496 #endif /* USB_USE_SOFTINTR */ 1497 1498 sc->sc_bus.intr_context--; 1499 DPRINTFN(10,("ohci_softintr: done:\n")); 1500 } 1501 1502 void 1503 ohci_device_ctrl_done(usbd_xfer_handle xfer) 1504 { 1505 DPRINTFN(10,("ohci_device_ctrl_done: xfer=%p\n", xfer)); 1506 1507 #ifdef DIAGNOSTIC 1508 if (!(xfer->rqflags & URQ_REQUEST)) { 1509 panic("ohci_device_ctrl_done: not a request"); 1510 } 1511 #endif 1512 } 1513 1514 void 1515 ohci_device_intr_done(usbd_xfer_handle xfer) 1516 { 1517 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1518 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1519 ohci_soft_ed_t *sed = opipe->sed; 1520 ohci_soft_td_t *data, *tail; 1521 1522 1523 DPRINTFN(10,("ohci_device_intr_done: xfer=%p, actlen=%d\n", 1524 xfer, xfer->actlen)); 1525 1526 if (xfer->pipe->repeat) { 1527 data = opipe->tail.td; 1528 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 1529 if (tail == NULL) { 1530 xfer->status = USBD_NOMEM; 1531 return; 1532 } 1533 tail->xfer = NULL; 1534 1535 data->td.td_flags = HTOO32( 1536 OHCI_TD_IN | OHCI_TD_NOCC | 1537 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 1538 if (xfer->flags & USBD_SHORT_XFER_OK) 1539 data->td.td_flags |= HTOO32(OHCI_TD_R); 1540 data->td.td_cbp = HTOO32(DMAADDR(&xfer->dmabuf, 0)); 1541 data->nexttd = tail; 1542 data->td.td_nexttd = HTOO32(tail->physaddr); 1543 data->td.td_be = HTOO32(O32TOH(data->td.td_cbp) + 1544 xfer->length - 1); 1545 data->len = xfer->length; 1546 data->xfer = xfer; 1547 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1548 xfer->hcpriv = data; 1549 xfer->actlen = 0; 1550 1551 sed->ed.ed_tailp = HTOO32(tail->physaddr); 1552 opipe->tail.td = tail; 1553 } 1554 } 1555 1556 void 1557 ohci_device_bulk_done(usbd_xfer_handle xfer) 1558 { 1559 DPRINTFN(10,("ohci_device_bulk_done: xfer=%p, actlen=%d\n", 1560 xfer, xfer->actlen)); 1561 } 1562 1563 void 1564 ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer) 1565 { 1566 usbd_pipe_handle pipe; 1567 u_char *p; 1568 int i, m; 1569 int hstatus; 1570 1571 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1572 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n", 1573 sc, xfer, hstatus)); 1574 1575 if (xfer == NULL) { 1576 /* Just ignore the change. */ 1577 return; 1578 } 1579 1580 pipe = xfer->pipe; 1581 1582 p = KERNADDR(&xfer->dmabuf, 0); 1583 m = min(sc->sc_noport, xfer->length * 8 - 1); 1584 memset(p, 0, xfer->length); 1585 for (i = 1; i <= m; i++) { 1586 /* Pick out CHANGE bits from the status reg. */ 1587 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1588 p[i/8] |= 1 << (i%8); 1589 } 1590 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 1591 xfer->actlen = xfer->length; 1592 xfer->status = USBD_NORMAL_COMPLETION; 1593 1594 usb_transfer_complete(xfer); 1595 } 1596 1597 void 1598 ohci_root_intr_done(usbd_xfer_handle xfer) 1599 { 1600 } 1601 1602 void 1603 ohci_root_ctrl_done(usbd_xfer_handle xfer) 1604 { 1605 } 1606 1607 /* 1608 * Wait here until controller claims to have an interrupt. 1609 * Then call ohci_intr and return. Use timeout to avoid waiting 1610 * too long. 1611 */ 1612 void 1613 ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer) 1614 { 1615 int timo; 1616 u_int32_t intrs; 1617 1618 xfer->status = USBD_IN_PROGRESS; 1619 for (timo = xfer->timeout; timo >= 0; timo--) { 1620 usb_delay_ms(&sc->sc_bus, 1); 1621 if (sc->sc_dying) 1622 break; 1623 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 1624 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs)); 1625 #ifdef OHCI_DEBUG 1626 if (ohcidebug > 15) 1627 ohci_dumpregs(sc); 1628 #endif 1629 if (intrs) { 1630 ohci_intr1(sc); 1631 if (xfer->status != USBD_IN_PROGRESS) 1632 return; 1633 } 1634 } 1635 1636 /* Timeout */ 1637 DPRINTF(("ohci_waitintr: timeout\n")); 1638 xfer->status = USBD_TIMEOUT; 1639 usb_transfer_complete(xfer); 1640 /* XXX should free TD */ 1641 } 1642 1643 void 1644 ohci_poll(struct usbd_bus *bus) 1645 { 1646 ohci_softc_t *sc = (ohci_softc_t *)bus; 1647 #ifdef OHCI_DEBUG 1648 static int last; 1649 int new; 1650 new = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1651 if (new != last) { 1652 DPRINTFN(10,("ohci_poll: intrs=0x%04x\n", new)); 1653 last = new; 1654 } 1655 #endif 1656 1657 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) 1658 ohci_intr1(sc); 1659 } 1660 1661 usbd_status 1662 ohci_device_request(usbd_xfer_handle xfer) 1663 { 1664 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1665 usb_device_request_t *req = &xfer->request; 1666 usbd_device_handle dev = opipe->pipe.device; 1667 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1668 int addr = dev->address; 1669 ohci_soft_td_t *setup, *stat, *next, *tail; 1670 ohci_soft_ed_t *sed; 1671 int isread; 1672 int len; 1673 usbd_status err; 1674 int s; 1675 1676 isread = req->bmRequestType & UT_READ; 1677 len = UGETW(req->wLength); 1678 1679 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 1680 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 1681 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1682 UGETW(req->wIndex), len, addr, 1683 opipe->pipe.endpoint->edesc->bEndpointAddress)); 1684 1685 setup = opipe->tail.td; 1686 stat = ohci_alloc_std(sc); 1687 if (stat == NULL) { 1688 err = USBD_NOMEM; 1689 goto bad1; 1690 } 1691 tail = ohci_alloc_std(sc); 1692 if (tail == NULL) { 1693 err = USBD_NOMEM; 1694 goto bad2; 1695 } 1696 tail->xfer = NULL; 1697 1698 sed = opipe->sed; 1699 opipe->u.ctl.length = len; 1700 1701 /* Update device address and length since they may have changed 1702 during the setup of the control pipe in usbd_new_device(). */ 1703 /* XXX This only needs to be done once, but it's too early in open. */ 1704 /* XXXX Should not touch ED here! */ 1705 sed->ed.ed_flags = HTOO32( 1706 (O32TOH(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) | 1707 OHCI_ED_SET_FA(addr) | 1708 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize))); 1709 1710 next = stat; 1711 1712 /* Set up data transaction */ 1713 if (len != 0) { 1714 ohci_soft_td_t *std = stat; 1715 1716 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 1717 std, &stat); 1718 stat = stat->nexttd; /* point at free TD */ 1719 if (err) 1720 goto bad3; 1721 /* Start toggle at 1 and then use the carried toggle. */ 1722 std->td.td_flags &= HTOO32(~OHCI_TD_TOGGLE_MASK); 1723 std->td.td_flags |= HTOO32(OHCI_TD_TOGGLE_1); 1724 } 1725 1726 memcpy(KERNADDR(&opipe->u.ctl.reqdma, 0), req, sizeof *req); 1727 1728 setup->td.td_flags = HTOO32(OHCI_TD_SETUP | OHCI_TD_NOCC | 1729 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1730 setup->td.td_cbp = HTOO32(DMAADDR(&opipe->u.ctl.reqdma, 0)); 1731 setup->nexttd = next; 1732 setup->td.td_nexttd = HTOO32(next->physaddr); 1733 setup->td.td_be = HTOO32(O32TOH(setup->td.td_cbp) + sizeof *req - 1); 1734 setup->len = 0; 1735 setup->xfer = xfer; 1736 setup->flags = 0; 1737 xfer->hcpriv = setup; 1738 1739 stat->td.td_flags = HTOO32( 1740 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | 1741 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1742 stat->td.td_cbp = 0; 1743 stat->nexttd = tail; 1744 stat->td.td_nexttd = HTOO32(tail->physaddr); 1745 stat->td.td_be = 0; 1746 stat->flags = OHCI_CALL_DONE; 1747 stat->len = 0; 1748 stat->xfer = xfer; 1749 1750 #ifdef OHCI_DEBUG 1751 if (ohcidebug > 5) { 1752 DPRINTF(("ohci_device_request:\n")); 1753 ohci_dump_ed(sc, sed); 1754 ohci_dump_tds(sc, setup); 1755 } 1756 #endif 1757 1758 /* Insert ED in schedule */ 1759 s = splusb(); 1760 sed->ed.ed_tailp = HTOO32(tail->physaddr); 1761 opipe->tail.td = tail; 1762 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1763 if (xfer->timeout && !sc->sc_bus.use_polling) { 1764 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 1765 ohci_timeout, xfer); 1766 } 1767 splx(s); 1768 1769 #ifdef OHCI_DEBUG 1770 if (ohcidebug > 20) { 1771 delay(10000); 1772 DPRINTF(("ohci_device_request: status=%x\n", 1773 OREAD4(sc, OHCI_COMMAND_STATUS))); 1774 ohci_dumpregs(sc); 1775 printf("ctrl head:\n"); 1776 ohci_dump_ed(sc, sc->sc_ctrl_head); 1777 printf("sed:\n"); 1778 ohci_dump_ed(sc, sed); 1779 ohci_dump_tds(sc, setup); 1780 } 1781 #endif 1782 1783 return (USBD_NORMAL_COMPLETION); 1784 1785 bad3: 1786 ohci_free_std(sc, tail); 1787 bad2: 1788 ohci_free_std(sc, stat); 1789 bad1: 1790 return (err); 1791 } 1792 1793 /* 1794 * Add an ED to the schedule. Called at splusb(). 1795 */ 1796 void 1797 ohci_add_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1798 { 1799 DPRINTFN(8,("ohci_add_ed: sed=%p head=%p\n", sed, head)); 1800 1801 SPLUSBCHECK; 1802 sed->next = head->next; 1803 sed->ed.ed_nexted = head->ed.ed_nexted; 1804 head->next = sed; 1805 head->ed.ed_nexted = HTOO32(sed->physaddr); 1806 } 1807 1808 /* 1809 * Remove an ED from the schedule. Called at splusb(). 1810 */ 1811 void 1812 ohci_rem_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1813 { 1814 ohci_soft_ed_t *p; 1815 1816 SPLUSBCHECK; 1817 1818 /* XXX */ 1819 for (p = head; p != NULL && p->next != sed; p = p->next) 1820 ; 1821 if (p == NULL) 1822 panic("ohci_rem_ed: ED not found"); 1823 p->next = sed->next; 1824 p->ed.ed_nexted = sed->ed.ed_nexted; 1825 } 1826 1827 /* 1828 * When a transfer is completed the TD is added to the done queue by 1829 * the host controller. This queue is the processed by software. 1830 * Unfortunately the queue contains the physical address of the TD 1831 * and we have no simple way to translate this back to a kernel address. 1832 * To make the translation possible (and fast) we use a hash table of 1833 * TDs currently in the schedule. The physical address is used as the 1834 * hash value. 1835 */ 1836 1837 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1838 /* Called at splusb() */ 1839 void 1840 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1841 { 1842 int h = HASH(std->physaddr); 1843 1844 SPLUSBCHECK; 1845 1846 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1847 } 1848 1849 /* Called at splusb() */ 1850 void 1851 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1852 { 1853 SPLUSBCHECK; 1854 1855 LIST_REMOVE(std, hnext); 1856 } 1857 1858 ohci_soft_td_t * 1859 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a) 1860 { 1861 int h = HASH(a); 1862 ohci_soft_td_t *std; 1863 1864 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1865 std != NULL; 1866 std = LIST_NEXT(std, hnext)) 1867 if (std->physaddr == a) 1868 return (std); 1869 return (NULL); 1870 } 1871 1872 /* Called at splusb() */ 1873 void 1874 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1875 { 1876 int h = HASH(sitd->physaddr); 1877 1878 SPLUSBCHECK; 1879 1880 DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n", 1881 sitd, (u_long)sitd->physaddr)); 1882 1883 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext); 1884 } 1885 1886 /* Called at splusb() */ 1887 void 1888 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1889 { 1890 SPLUSBCHECK; 1891 1892 DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n", 1893 sitd, (u_long)sitd->physaddr)); 1894 1895 LIST_REMOVE(sitd, hnext); 1896 } 1897 1898 ohci_soft_itd_t * 1899 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a) 1900 { 1901 int h = HASH(a); 1902 ohci_soft_itd_t *sitd; 1903 1904 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]); 1905 sitd != NULL; 1906 sitd = LIST_NEXT(sitd, hnext)) 1907 if (sitd->physaddr == a) 1908 return (sitd); 1909 return (NULL); 1910 } 1911 1912 void 1913 ohci_timeout(void *addr) 1914 { 1915 struct ohci_xfer *oxfer = addr; 1916 struct ohci_pipe *opipe = (struct ohci_pipe *)oxfer->xfer.pipe; 1917 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1918 1919 DPRINTF(("ohci_timeout: oxfer=%p\n", oxfer)); 1920 1921 if (sc->sc_dying) { 1922 ohci_abort_xfer(&oxfer->xfer, USBD_TIMEOUT); 1923 return; 1924 } 1925 1926 /* Execute the abort in a process context. */ 1927 usb_init_task(&oxfer->abort_task, ohci_timeout_task, addr); 1928 usb_add_task(oxfer->xfer.pipe->device, &oxfer->abort_task, 1929 USB_TASKQ_HC); 1930 } 1931 1932 void 1933 ohci_timeout_task(void *addr) 1934 { 1935 usbd_xfer_handle xfer = addr; 1936 int s; 1937 1938 DPRINTF(("ohci_timeout_task: xfer=%p\n", xfer)); 1939 1940 s = splusb(); 1941 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1942 splx(s); 1943 } 1944 1945 #ifdef OHCI_DEBUG 1946 void 1947 ohci_dump_tds(ohci_softc_t *sc, ohci_soft_td_t *std) 1948 { 1949 for (; std; std = std->nexttd) 1950 ohci_dump_td(sc, std); 1951 } 1952 1953 void 1954 ohci_dump_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1955 { 1956 char sbuf[128]; 1957 1958 bitmask_snprintf((u_int32_t)O32TOH(std->td.td_flags), 1959 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 1960 sbuf, sizeof(sbuf)); 1961 1962 printf("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx " 1963 "nexttd=0x%08lx be=0x%08lx\n", 1964 std, (u_long)std->physaddr, sbuf, 1965 OHCI_TD_GET_DI(O32TOH(std->td.td_flags)), 1966 OHCI_TD_GET_EC(O32TOH(std->td.td_flags)), 1967 OHCI_TD_GET_CC(O32TOH(std->td.td_flags)), 1968 (u_long)O32TOH(std->td.td_cbp), 1969 (u_long)O32TOH(std->td.td_nexttd), 1970 (u_long)O32TOH(std->td.td_be)); 1971 } 1972 1973 void 1974 ohci_dump_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1975 { 1976 int i; 1977 1978 printf("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n" 1979 "bp0=0x%08lx next=0x%08lx be=0x%08lx\n", 1980 sitd, (u_long)sitd->physaddr, 1981 OHCI_ITD_GET_SF(O32TOH(sitd->itd.itd_flags)), 1982 OHCI_ITD_GET_DI(O32TOH(sitd->itd.itd_flags)), 1983 OHCI_ITD_GET_FC(O32TOH(sitd->itd.itd_flags)), 1984 OHCI_ITD_GET_CC(O32TOH(sitd->itd.itd_flags)), 1985 (u_long)O32TOH(sitd->itd.itd_bp0), 1986 (u_long)O32TOH(sitd->itd.itd_nextitd), 1987 (u_long)O32TOH(sitd->itd.itd_be)); 1988 for (i = 0; i < OHCI_ITD_NOFFSET; i++) 1989 printf("offs[%d]=0x%04x ", i, 1990 (u_int)O16TOH(sitd->itd.itd_offset[i])); 1991 printf("\n"); 1992 } 1993 1994 void 1995 ohci_dump_itds(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1996 { 1997 for (; sitd; sitd = sitd->nextitd) 1998 ohci_dump_itd(sc, sitd); 1999 } 2000 2001 void 2002 ohci_dump_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 2003 { 2004 char sbuf[128], sbuf2[128]; 2005 2006 bitmask_snprintf((u_int32_t)O32TOH(sed->ed.ed_flags), 2007 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO", 2008 sbuf, sizeof(sbuf)); 2009 bitmask_snprintf((u_int32_t)O32TOH(sed->ed.ed_headp), 2010 "\20\1HALT\2CARRY", sbuf2, sizeof(sbuf2)); 2011 2012 printf("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d flags=%s\ntailp=0x%08lx " 2013 "headflags=%s headp=0x%08lx nexted=0x%08lx\n", 2014 sed, (u_long)sed->physaddr, 2015 OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)), 2016 OHCI_ED_GET_EN(O32TOH(sed->ed.ed_flags)), 2017 OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)), sbuf, 2018 (u_long)O32TOH(sed->ed.ed_tailp), sbuf2, 2019 (u_long)O32TOH(sed->ed.ed_headp), 2020 (u_long)O32TOH(sed->ed.ed_nexted)); 2021 } 2022 #endif 2023 2024 usbd_status 2025 ohci_open(usbd_pipe_handle pipe) 2026 { 2027 usbd_device_handle dev = pipe->device; 2028 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2029 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 2030 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2031 u_int8_t addr = dev->address; 2032 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 2033 ohci_soft_ed_t *sed; 2034 ohci_soft_td_t *std; 2035 ohci_soft_itd_t *sitd; 2036 ohci_physaddr_t tdphys; 2037 u_int32_t fmt; 2038 usbd_status err; 2039 int s; 2040 int ival; 2041 2042 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 2043 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 2044 2045 if (sc->sc_dying) 2046 return (USBD_IOERROR); 2047 2048 std = NULL; 2049 sed = NULL; 2050 2051 if (addr == sc->sc_addr) { 2052 switch (ed->bEndpointAddress) { 2053 case USB_CONTROL_ENDPOINT: 2054 pipe->methods = &ohci_root_ctrl_methods; 2055 break; 2056 case UE_DIR_IN | OHCI_INTR_ENDPT: 2057 pipe->methods = &ohci_root_intr_methods; 2058 break; 2059 default: 2060 return (USBD_INVAL); 2061 } 2062 } else { 2063 sed = ohci_alloc_sed(sc); 2064 if (sed == NULL) 2065 goto bad0; 2066 opipe->sed = sed; 2067 if (xfertype == UE_ISOCHRONOUS) { 2068 sitd = ohci_alloc_sitd(sc); 2069 if (sitd == NULL) 2070 goto bad1; 2071 opipe->tail.itd = sitd; 2072 tdphys = sitd->physaddr; 2073 fmt = OHCI_ED_FORMAT_ISO; 2074 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 2075 fmt |= OHCI_ED_DIR_IN; 2076 else 2077 fmt |= OHCI_ED_DIR_OUT; 2078 } else { 2079 std = ohci_alloc_std(sc); 2080 if (std == NULL) 2081 goto bad1; 2082 opipe->tail.td = std; 2083 tdphys = std->physaddr; 2084 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD; 2085 } 2086 sed->ed.ed_flags = HTOO32( 2087 OHCI_ED_SET_FA(addr) | 2088 OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) | 2089 (dev->speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) | 2090 fmt | 2091 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 2092 sed->ed.ed_headp = sed->ed.ed_tailp = HTOO32(tdphys); 2093 2094 switch (xfertype) { 2095 case UE_CONTROL: 2096 pipe->methods = &ohci_device_ctrl_methods; 2097 err = usb_allocmem(&sc->sc_bus, 2098 sizeof(usb_device_request_t), 2099 0, &opipe->u.ctl.reqdma); 2100 if (err) 2101 goto bad; 2102 s = splusb(); 2103 ohci_add_ed(sc, sed, sc->sc_ctrl_head); 2104 splx(s); 2105 break; 2106 case UE_INTERRUPT: 2107 pipe->methods = &ohci_device_intr_methods; 2108 ival = pipe->interval; 2109 if (ival == USBD_DEFAULT_INTERVAL) 2110 ival = ed->bInterval; 2111 return (ohci_device_setintr(sc, opipe, ival)); 2112 case UE_ISOCHRONOUS: 2113 pipe->methods = &ohci_device_isoc_methods; 2114 return (ohci_setup_isoc(pipe)); 2115 case UE_BULK: 2116 pipe->methods = &ohci_device_bulk_methods; 2117 s = splusb(); 2118 ohci_add_ed(sc, sed, sc->sc_bulk_head); 2119 splx(s); 2120 break; 2121 } 2122 } 2123 return (USBD_NORMAL_COMPLETION); 2124 2125 bad: 2126 if (std != NULL) 2127 ohci_free_std(sc, std); 2128 bad1: 2129 if (sed != NULL) 2130 ohci_free_sed(sc, sed); 2131 bad0: 2132 return (USBD_NOMEM); 2133 2134 } 2135 2136 /* 2137 * Close a reqular pipe. 2138 * Assumes that there are no pending transactions. 2139 */ 2140 void 2141 ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head) 2142 { 2143 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2144 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2145 ohci_soft_ed_t *sed = opipe->sed; 2146 int s; 2147 2148 s = splusb(); 2149 #ifdef DIAGNOSTIC 2150 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 2151 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2152 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) { 2153 ohci_soft_td_t *std; 2154 std = ohci_hash_find_td(sc, O32TOH(sed->ed.ed_headp)); 2155 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 2156 "tl=0x%x pipe=%p, std=%p\n", sed, 2157 (int)O32TOH(sed->ed.ed_headp), 2158 (int)O32TOH(sed->ed.ed_tailp), 2159 pipe, std); 2160 #ifdef USB_DEBUG 2161 usbd_dump_pipe(&opipe->pipe); 2162 #endif 2163 #ifdef OHCI_DEBUG 2164 ohci_dump_ed(sc, sed); 2165 if (std) 2166 ohci_dump_td(sc, std); 2167 #endif 2168 usb_delay_ms(&sc->sc_bus, 2); 2169 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2170 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) 2171 printf("ohci_close_pipe: pipe still not empty\n"); 2172 } 2173 #endif 2174 ohci_rem_ed(sed, head); 2175 /* Make sure the host controller is not touching this ED */ 2176 usb_delay_ms(&sc->sc_bus, 1); 2177 splx(s); 2178 ohci_free_sed(sc, opipe->sed); 2179 } 2180 2181 /* 2182 * Abort a device request. 2183 * If this routine is called at splusb() it guarantees that the request 2184 * will be removed from the hardware scheduling and that the callback 2185 * for it will be called with USBD_CANCELLED status. 2186 * It's impossible to guarantee that the requested transfer will not 2187 * have happened since the hardware runs concurrently. 2188 * If the transaction has already happened we rely on the ordinary 2189 * interrupt processing to process it. 2190 */ 2191 void 2192 ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2193 { 2194 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2195 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 2196 ohci_soft_ed_t *sed = opipe->sed; 2197 ohci_soft_td_t *p, *n; 2198 ohci_physaddr_t headp; 2199 int s, hit; 2200 int wake; 2201 2202 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p sed=%p\n", xfer, opipe,sed)); 2203 2204 if (sc->sc_dying) { 2205 /* If we're dying, just do the software part. */ 2206 s = splusb(); 2207 xfer->status = status; /* make software ignore it */ 2208 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 2209 usb_transfer_complete(xfer); 2210 splx(s); 2211 return; 2212 } 2213 2214 if (xfer->device->bus->intr_context || !curproc) 2215 panic("ohci_abort_xfer: not in process context"); 2216 2217 /* 2218 * If an abort is already in progress then just wait for it to 2219 * complete and return. 2220 */ 2221 if (xfer->hcflags & UXFER_ABORTING) { 2222 DPRINTFN(2, ("ohci_abort_xfer: already aborting\n")); 2223 #ifdef DIAGNOSTIC 2224 if (status == USBD_TIMEOUT) 2225 printf("0hci_abort_xfer: TIMEOUT while aborting\n"); 2226 #endif 2227 /* Override the status which might be USBD_TIMEOUT. */ 2228 xfer->status = status; 2229 DPRINTFN(2, ("ohci_abort_xfer: waiting for abort to finish\n")); 2230 xfer->hcflags |= UXFER_ABORTWAIT; 2231 while (xfer->hcflags & UXFER_ABORTING) 2232 tsleep(&xfer->hcflags, PZERO, "ohciaw", 0); 2233 return; 2234 } 2235 xfer->hcflags |= UXFER_ABORTING; 2236 2237 /* 2238 * Step 1: Make interrupt routine and hardware ignore xfer. 2239 */ 2240 s = splusb(); 2241 xfer->status = status; /* make software ignore it */ 2242 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 2243 splx(s); 2244 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed)); 2245 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */ 2246 2247 /* 2248 * Step 2: Wait until we know hardware has finished any possible 2249 * use of the xfer. Also make sure the soft interrupt routine 2250 * has run. 2251 */ 2252 usb_delay_ms(opipe->pipe.device->bus, 20); /* Hardware finishes in 1ms */ 2253 s = splusb(); 2254 #ifdef USB_USE_SOFTINTR 2255 sc->sc_softwake = 1; 2256 #endif /* USB_USE_SOFTINTR */ 2257 usb_schedsoftintr(&sc->sc_bus); 2258 #ifdef USB_USE_SOFTINTR 2259 tsleep(&sc->sc_softwake, PZERO, "ohciab", 0); 2260 #endif /* USB_USE_SOFTINTR */ 2261 splx(s); 2262 2263 /* 2264 * Step 3: Remove any vestiges of the xfer from the hardware. 2265 * The complication here is that the hardware may have executed 2266 * beyond the xfer we're trying to abort. So as we're scanning 2267 * the TDs of this xfer we check if the hardware points to 2268 * any of them. 2269 */ 2270 s = splusb(); /* XXX why? */ 2271 p = xfer->hcpriv; 2272 #ifdef DIAGNOSTIC 2273 if (p == NULL) { 2274 xfer->hcflags &= ~UXFER_ABORTING; /* XXX */ 2275 splx(s); 2276 printf("ohci_abort_xfer: hcpriv is NULL\n"); 2277 return; 2278 } 2279 #endif 2280 #ifdef OHCI_DEBUG 2281 if (ohcidebug > 1) { 2282 DPRINTF(("ohci_abort_xfer: sed=\n")); 2283 ohci_dump_ed(sc, sed); 2284 ohci_dump_tds(sc, p); 2285 } 2286 #endif 2287 headp = O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK; 2288 hit = 0; 2289 for (; p->xfer == xfer; p = n) { 2290 hit |= headp == p->physaddr; 2291 n = p->nexttd; 2292 ohci_free_std(sc, p); 2293 } 2294 /* Zap headp register if hardware pointed inside the xfer. */ 2295 if (hit) { 2296 DPRINTFN(1,("ohci_abort_xfer: set hd=0x%08x, tl=0x%08x\n", 2297 (int)p->physaddr, (int)O32TOH(sed->ed.ed_tailp))); 2298 sed->ed.ed_headp = HTOO32(p->physaddr); /* unlink TDs */ 2299 } else { 2300 DPRINTFN(1,("ohci_abort_xfer: no hit\n")); 2301 } 2302 2303 /* 2304 * Step 4: Turn on hardware again. 2305 */ 2306 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */ 2307 2308 /* 2309 * Step 5: Execute callback. 2310 */ 2311 wake = xfer->hcflags & UXFER_ABORTWAIT; 2312 xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT); 2313 usb_transfer_complete(xfer); 2314 if (wake) 2315 wakeup(&xfer->hcflags); 2316 2317 splx(s); 2318 } 2319 2320 /* 2321 * Data structures and routines to emulate the root hub. 2322 */ 2323 Static usb_device_descriptor_t ohci_devd = { 2324 USB_DEVICE_DESCRIPTOR_SIZE, 2325 UDESC_DEVICE, /* type */ 2326 {0x00, 0x01}, /* USB version */ 2327 UDCLASS_HUB, /* class */ 2328 UDSUBCLASS_HUB, /* subclass */ 2329 UDPROTO_FSHUB, 2330 64, /* max packet */ 2331 {0},{0},{0x00,0x01}, /* device id */ 2332 1,2,0, /* string indicies */ 2333 1 /* # of configurations */ 2334 }; 2335 2336 Static const usb_config_descriptor_t ohci_confd = { 2337 USB_CONFIG_DESCRIPTOR_SIZE, 2338 UDESC_CONFIG, 2339 {USB_CONFIG_DESCRIPTOR_SIZE + 2340 USB_INTERFACE_DESCRIPTOR_SIZE + 2341 USB_ENDPOINT_DESCRIPTOR_SIZE}, 2342 1, 2343 1, 2344 0, 2345 UC_ATTR_MBO | UC_SELF_POWERED, 2346 0 /* max power */ 2347 }; 2348 2349 Static const usb_interface_descriptor_t ohci_ifcd = { 2350 USB_INTERFACE_DESCRIPTOR_SIZE, 2351 UDESC_INTERFACE, 2352 0, 2353 0, 2354 1, 2355 UICLASS_HUB, 2356 UISUBCLASS_HUB, 2357 UIPROTO_FSHUB, 2358 0 2359 }; 2360 2361 Static const usb_endpoint_descriptor_t ohci_endpd = { 2362 .bLength = USB_ENDPOINT_DESCRIPTOR_SIZE, 2363 .bDescriptorType = UDESC_ENDPOINT, 2364 .bEndpointAddress = UE_DIR_IN | OHCI_INTR_ENDPT, 2365 .bmAttributes = UE_INTERRUPT, 2366 .wMaxPacketSize = {8, 0}, /* max packet */ 2367 .bInterval = 255, 2368 }; 2369 2370 Static const usb_hub_descriptor_t ohci_hubd = { 2371 .bDescLength = USB_HUB_DESCRIPTOR_SIZE, 2372 .bDescriptorType = UDESC_HUB, 2373 }; 2374 2375 Static int 2376 ohci_str(usb_string_descriptor_t *p, int l, const char *s) 2377 { 2378 int i; 2379 2380 if (l == 0) 2381 return (0); 2382 p->bLength = 2 * strlen(s) + 2; 2383 if (l == 1) 2384 return (1); 2385 p->bDescriptorType = UDESC_STRING; 2386 l -= 2; 2387 for (i = 0; s[i] && l > 1; i++, l -= 2) 2388 USETW2(p->bString[i], 0, s[i]); 2389 return (2*i+2); 2390 } 2391 2392 /* 2393 * Simulate a hardware hub by handling all the necessary requests. 2394 */ 2395 Static usbd_status 2396 ohci_root_ctrl_transfer(usbd_xfer_handle xfer) 2397 { 2398 usbd_status err; 2399 2400 /* Insert last in queue. */ 2401 err = usb_insert_transfer(xfer); 2402 if (err) 2403 return (err); 2404 2405 /* Pipe isn't running, start first */ 2406 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2407 } 2408 2409 Static usbd_status 2410 ohci_root_ctrl_start(usbd_xfer_handle xfer) 2411 { 2412 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2413 usb_device_request_t *req; 2414 void *buf = NULL; 2415 int port, i; 2416 int s, len, value, index, l, totlen = 0; 2417 usb_port_status_t ps; 2418 usb_hub_descriptor_t hubd; 2419 usbd_status err; 2420 u_int32_t v; 2421 2422 if (sc->sc_dying) 2423 return (USBD_IOERROR); 2424 2425 #ifdef DIAGNOSTIC 2426 if (!(xfer->rqflags & URQ_REQUEST)) 2427 /* XXX panic */ 2428 return (USBD_INVAL); 2429 #endif 2430 req = &xfer->request; 2431 2432 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 2433 req->bmRequestType, req->bRequest)); 2434 2435 len = UGETW(req->wLength); 2436 value = UGETW(req->wValue); 2437 index = UGETW(req->wIndex); 2438 2439 if (len != 0) 2440 buf = KERNADDR(&xfer->dmabuf, 0); 2441 2442 #define C(x,y) ((x) | ((y) << 8)) 2443 switch(C(req->bRequest, req->bmRequestType)) { 2444 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 2445 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 2446 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 2447 /* 2448 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 2449 * for the integrated root hub. 2450 */ 2451 break; 2452 case C(UR_GET_CONFIG, UT_READ_DEVICE): 2453 if (len > 0) { 2454 *(u_int8_t *)buf = sc->sc_conf; 2455 totlen = 1; 2456 } 2457 break; 2458 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2459 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 2460 if (len == 0) 2461 break; 2462 switch(value >> 8) { 2463 case UDESC_DEVICE: 2464 if ((value & 0xff) != 0) { 2465 err = USBD_IOERROR; 2466 goto ret; 2467 } 2468 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 2469 USETW(ohci_devd.idVendor, sc->sc_id_vendor); 2470 memcpy(buf, &ohci_devd, l); 2471 break; 2472 case UDESC_CONFIG: 2473 if ((value & 0xff) != 0) { 2474 err = USBD_IOERROR; 2475 goto ret; 2476 } 2477 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 2478 memcpy(buf, &ohci_confd, l); 2479 buf = (char *)buf + l; 2480 len -= l; 2481 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 2482 totlen += l; 2483 memcpy(buf, &ohci_ifcd, l); 2484 buf = (char *)buf + l; 2485 len -= l; 2486 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 2487 totlen += l; 2488 memcpy(buf, &ohci_endpd, l); 2489 break; 2490 case UDESC_STRING: 2491 *(u_int8_t *)buf = 0; 2492 totlen = 1; 2493 switch (value & 0xff) { 2494 case 0: /* Language table */ 2495 if (len > 0) 2496 *(u_int8_t *)buf = 4; 2497 if (len >= 4) { 2498 USETW(((usb_string_descriptor_t *)buf)->bString[0], 0x0409); 2499 totlen = 4; 2500 } 2501 break; 2502 case 1: /* Vendor */ 2503 totlen = ohci_str(buf, len, sc->sc_vendor); 2504 break; 2505 case 2: /* Product */ 2506 totlen = ohci_str(buf, len, "OHCI root hub"); 2507 break; 2508 } 2509 break; 2510 default: 2511 err = USBD_IOERROR; 2512 goto ret; 2513 } 2514 break; 2515 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 2516 if (len > 0) { 2517 *(u_int8_t *)buf = 0; 2518 totlen = 1; 2519 } 2520 break; 2521 case C(UR_GET_STATUS, UT_READ_DEVICE): 2522 if (len > 1) { 2523 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 2524 totlen = 2; 2525 } 2526 break; 2527 case C(UR_GET_STATUS, UT_READ_INTERFACE): 2528 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 2529 if (len > 1) { 2530 USETW(((usb_status_t *)buf)->wStatus, 0); 2531 totlen = 2; 2532 } 2533 break; 2534 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 2535 if (value >= USB_MAX_DEVICES) { 2536 err = USBD_IOERROR; 2537 goto ret; 2538 } 2539 sc->sc_addr = value; 2540 break; 2541 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 2542 if (value != 0 && value != 1) { 2543 err = USBD_IOERROR; 2544 goto ret; 2545 } 2546 sc->sc_conf = value; 2547 break; 2548 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 2549 break; 2550 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 2551 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 2552 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 2553 err = USBD_IOERROR; 2554 goto ret; 2555 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 2556 break; 2557 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 2558 break; 2559 /* Hub requests */ 2560 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2561 break; 2562 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2563 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 2564 "port=%d feature=%d\n", 2565 index, value)); 2566 if (index < 1 || index > sc->sc_noport) { 2567 err = USBD_IOERROR; 2568 goto ret; 2569 } 2570 port = OHCI_RH_PORT_STATUS(index); 2571 switch(value) { 2572 case UHF_PORT_ENABLE: 2573 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2574 break; 2575 case UHF_PORT_SUSPEND: 2576 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2577 break; 2578 case UHF_PORT_POWER: 2579 /* Yes, writing to the LOW_SPEED bit clears power. */ 2580 OWRITE4(sc, port, UPS_LOW_SPEED); 2581 break; 2582 case UHF_C_PORT_CONNECTION: 2583 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2584 break; 2585 case UHF_C_PORT_ENABLE: 2586 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2587 break; 2588 case UHF_C_PORT_SUSPEND: 2589 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2590 break; 2591 case UHF_C_PORT_OVER_CURRENT: 2592 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2593 break; 2594 case UHF_C_PORT_RESET: 2595 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2596 break; 2597 default: 2598 err = USBD_IOERROR; 2599 goto ret; 2600 } 2601 switch(value) { 2602 case UHF_C_PORT_CONNECTION: 2603 case UHF_C_PORT_ENABLE: 2604 case UHF_C_PORT_SUSPEND: 2605 case UHF_C_PORT_OVER_CURRENT: 2606 case UHF_C_PORT_RESET: 2607 /* Enable RHSC interrupt if condition is cleared. */ 2608 if ((OREAD4(sc, port) >> 16) == 0) 2609 ohci_rhsc_enable(sc); 2610 break; 2611 default: 2612 break; 2613 } 2614 break; 2615 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2616 if (len == 0) 2617 break; 2618 if ((value & 0xff) != 0) { 2619 err = USBD_IOERROR; 2620 goto ret; 2621 } 2622 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2623 hubd = ohci_hubd; 2624 hubd.bNbrPorts = sc->sc_noport; 2625 USETW(hubd.wHubCharacteristics, 2626 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2627 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2628 /* XXX overcurrent */ 2629 ); 2630 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2631 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2632 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2633 hubd.DeviceRemovable[i++] = (u_int8_t)v; 2634 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2635 l = min(len, hubd.bDescLength); 2636 totlen = l; 2637 memcpy(buf, &hubd, l); 2638 break; 2639 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2640 if (len != 4) { 2641 err = USBD_IOERROR; 2642 goto ret; 2643 } 2644 memset(buf, 0, len); /* ? XXX */ 2645 totlen = len; 2646 break; 2647 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2648 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 2649 index)); 2650 if (index < 1 || index > sc->sc_noport) { 2651 err = USBD_IOERROR; 2652 goto ret; 2653 } 2654 if (len != 4) { 2655 err = USBD_IOERROR; 2656 goto ret; 2657 } 2658 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2659 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 2660 v)); 2661 USETW(ps.wPortStatus, v); 2662 USETW(ps.wPortChange, v >> 16); 2663 l = min(len, sizeof ps); 2664 memcpy(buf, &ps, l); 2665 totlen = l; 2666 break; 2667 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2668 err = USBD_IOERROR; 2669 goto ret; 2670 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2671 break; 2672 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2673 if (index < 1 || index > sc->sc_noport) { 2674 err = USBD_IOERROR; 2675 goto ret; 2676 } 2677 port = OHCI_RH_PORT_STATUS(index); 2678 switch(value) { 2679 case UHF_PORT_ENABLE: 2680 OWRITE4(sc, port, UPS_PORT_ENABLED); 2681 break; 2682 case UHF_PORT_SUSPEND: 2683 OWRITE4(sc, port, UPS_SUSPEND); 2684 break; 2685 case UHF_PORT_RESET: 2686 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 2687 index)); 2688 OWRITE4(sc, port, UPS_RESET); 2689 for (i = 0; i < 5; i++) { 2690 usb_delay_ms(&sc->sc_bus, 2691 USB_PORT_ROOT_RESET_DELAY); 2692 if (sc->sc_dying) { 2693 err = USBD_IOERROR; 2694 goto ret; 2695 } 2696 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2697 break; 2698 } 2699 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 2700 index, OREAD4(sc, port))); 2701 break; 2702 case UHF_PORT_POWER: 2703 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 2704 "%d\n", index)); 2705 OWRITE4(sc, port, UPS_PORT_POWER); 2706 break; 2707 default: 2708 err = USBD_IOERROR; 2709 goto ret; 2710 } 2711 break; 2712 default: 2713 err = USBD_IOERROR; 2714 goto ret; 2715 } 2716 xfer->actlen = totlen; 2717 err = USBD_NORMAL_COMPLETION; 2718 ret: 2719 xfer->status = err; 2720 s = splusb(); 2721 usb_transfer_complete(xfer); 2722 splx(s); 2723 return (USBD_IN_PROGRESS); 2724 } 2725 2726 /* Abort a root control request. */ 2727 Static void 2728 ohci_root_ctrl_abort(usbd_xfer_handle xfer) 2729 { 2730 /* Nothing to do, all transfers are synchronous. */ 2731 } 2732 2733 /* Close the root pipe. */ 2734 Static void 2735 ohci_root_ctrl_close(usbd_pipe_handle pipe) 2736 { 2737 DPRINTF(("ohci_root_ctrl_close\n")); 2738 /* Nothing to do. */ 2739 } 2740 2741 Static usbd_status 2742 ohci_root_intr_transfer(usbd_xfer_handle xfer) 2743 { 2744 usbd_status err; 2745 2746 /* Insert last in queue. */ 2747 err = usb_insert_transfer(xfer); 2748 if (err) 2749 return (err); 2750 2751 /* Pipe isn't running, start first */ 2752 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2753 } 2754 2755 Static usbd_status 2756 ohci_root_intr_start(usbd_xfer_handle xfer) 2757 { 2758 usbd_pipe_handle pipe = xfer->pipe; 2759 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2760 2761 if (sc->sc_dying) 2762 return (USBD_IOERROR); 2763 2764 sc->sc_intrxfer = xfer; 2765 2766 return (USBD_IN_PROGRESS); 2767 } 2768 2769 /* Abort a root interrupt request. */ 2770 Static void 2771 ohci_root_intr_abort(usbd_xfer_handle xfer) 2772 { 2773 int s; 2774 2775 if (xfer->pipe->intrxfer == xfer) { 2776 DPRINTF(("ohci_root_intr_abort: remove\n")); 2777 xfer->pipe->intrxfer = NULL; 2778 } 2779 xfer->status = USBD_CANCELLED; 2780 s = splusb(); 2781 usb_transfer_complete(xfer); 2782 splx(s); 2783 } 2784 2785 /* Close the root pipe. */ 2786 Static void 2787 ohci_root_intr_close(usbd_pipe_handle pipe) 2788 { 2789 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2790 2791 DPRINTF(("ohci_root_intr_close\n")); 2792 2793 sc->sc_intrxfer = NULL; 2794 } 2795 2796 /************************/ 2797 2798 Static usbd_status 2799 ohci_device_ctrl_transfer(usbd_xfer_handle xfer) 2800 { 2801 usbd_status err; 2802 2803 /* Insert last in queue. */ 2804 err = usb_insert_transfer(xfer); 2805 if (err) 2806 return (err); 2807 2808 /* Pipe isn't running, start first */ 2809 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2810 } 2811 2812 Static usbd_status 2813 ohci_device_ctrl_start(usbd_xfer_handle xfer) 2814 { 2815 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2816 usbd_status err; 2817 2818 if (sc->sc_dying) 2819 return (USBD_IOERROR); 2820 2821 #ifdef DIAGNOSTIC 2822 if (!(xfer->rqflags & URQ_REQUEST)) { 2823 /* XXX panic */ 2824 printf("ohci_device_ctrl_transfer: not a request\n"); 2825 return (USBD_INVAL); 2826 } 2827 #endif 2828 2829 err = ohci_device_request(xfer); 2830 if (err) 2831 return (err); 2832 2833 if (sc->sc_bus.use_polling) 2834 ohci_waitintr(sc, xfer); 2835 return (USBD_IN_PROGRESS); 2836 } 2837 2838 /* Abort a device control request. */ 2839 Static void 2840 ohci_device_ctrl_abort(usbd_xfer_handle xfer) 2841 { 2842 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer)); 2843 ohci_abort_xfer(xfer, USBD_CANCELLED); 2844 } 2845 2846 /* Close a device control pipe. */ 2847 Static void 2848 ohci_device_ctrl_close(usbd_pipe_handle pipe) 2849 { 2850 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2851 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2852 2853 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe)); 2854 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2855 ohci_free_std(sc, opipe->tail.td); 2856 } 2857 2858 /************************/ 2859 2860 Static void 2861 ohci_device_clear_toggle(usbd_pipe_handle pipe) 2862 { 2863 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2864 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2865 2866 opipe->sed->ed.ed_headp &= HTOO32(~OHCI_TOGGLECARRY); 2867 } 2868 2869 Static void 2870 ohci_noop(usbd_pipe_handle pipe) 2871 { 2872 } 2873 2874 Static usbd_status 2875 ohci_device_bulk_transfer(usbd_xfer_handle xfer) 2876 { 2877 usbd_status err; 2878 2879 /* Insert last in queue. */ 2880 err = usb_insert_transfer(xfer); 2881 if (err) 2882 return (err); 2883 2884 /* Pipe isn't running, start first */ 2885 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2886 } 2887 2888 Static usbd_status 2889 ohci_device_bulk_start(usbd_xfer_handle xfer) 2890 { 2891 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2892 usbd_device_handle dev = opipe->pipe.device; 2893 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2894 int addr = dev->address; 2895 ohci_soft_td_t *data, *tail, *tdp; 2896 ohci_soft_ed_t *sed; 2897 int s, len, isread, endpt; 2898 usbd_status err; 2899 2900 if (sc->sc_dying) 2901 return (USBD_IOERROR); 2902 2903 #ifdef DIAGNOSTIC 2904 if (xfer->rqflags & URQ_REQUEST) { 2905 /* XXX panic */ 2906 printf("ohci_device_bulk_start: a request\n"); 2907 return (USBD_INVAL); 2908 } 2909 #endif 2910 2911 len = xfer->length; 2912 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 2913 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2914 sed = opipe->sed; 2915 2916 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d " 2917 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags, 2918 endpt)); 2919 2920 opipe->u.bulk.isread = isread; 2921 opipe->u.bulk.length = len; 2922 2923 /* Update device address */ 2924 sed->ed.ed_flags = HTOO32( 2925 (O32TOH(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) | 2926 OHCI_ED_SET_FA(addr)); 2927 2928 /* Allocate a chain of new TDs (including a new tail). */ 2929 data = opipe->tail.td; 2930 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 2931 data, &tail); 2932 /* We want interrupt at the end of the transfer. */ 2933 tail->td.td_flags &= HTOO32(~OHCI_TD_INTR_MASK); 2934 tail->td.td_flags |= HTOO32(OHCI_TD_SET_DI(1)); 2935 tail->flags |= OHCI_CALL_DONE; 2936 tail = tail->nexttd; /* point at sentinel */ 2937 if (err) 2938 return (err); 2939 2940 tail->xfer = NULL; 2941 xfer->hcpriv = data; 2942 2943 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x " 2944 "td_cbp=0x%08x td_be=0x%08x\n", 2945 (int)O32TOH(sed->ed.ed_flags), 2946 (int)O32TOH(data->td.td_flags), 2947 (int)O32TOH(data->td.td_cbp), 2948 (int)O32TOH(data->td.td_be))); 2949 2950 #ifdef OHCI_DEBUG 2951 if (ohcidebug > 5) { 2952 ohci_dump_ed(sc, sed); 2953 ohci_dump_tds(sc, data); 2954 } 2955 #endif 2956 2957 /* Insert ED in schedule */ 2958 s = splusb(); 2959 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 2960 tdp->xfer = xfer; 2961 } 2962 sed->ed.ed_tailp = HTOO32(tail->physaddr); 2963 opipe->tail.td = tail; 2964 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 2965 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 2966 if (xfer->timeout && !sc->sc_bus.use_polling) { 2967 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2968 ohci_timeout, xfer); 2969 } 2970 2971 #if 0 2972 /* This goes wrong if we are too slow. */ 2973 if (ohcidebug > 10) { 2974 delay(10000); 2975 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2976 OREAD4(sc, OHCI_COMMAND_STATUS))); 2977 ohci_dump_ed(sc, sed); 2978 ohci_dump_tds(sc, data); 2979 } 2980 #endif 2981 2982 splx(s); 2983 2984 return (USBD_IN_PROGRESS); 2985 } 2986 2987 Static void 2988 ohci_device_bulk_abort(usbd_xfer_handle xfer) 2989 { 2990 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer)); 2991 ohci_abort_xfer(xfer, USBD_CANCELLED); 2992 } 2993 2994 /* 2995 * Close a device bulk pipe. 2996 */ 2997 Static void 2998 ohci_device_bulk_close(usbd_pipe_handle pipe) 2999 { 3000 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3001 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3002 3003 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe)); 3004 ohci_close_pipe(pipe, sc->sc_bulk_head); 3005 ohci_free_std(sc, opipe->tail.td); 3006 } 3007 3008 /************************/ 3009 3010 Static usbd_status 3011 ohci_device_intr_transfer(usbd_xfer_handle xfer) 3012 { 3013 usbd_status err; 3014 3015 /* Insert last in queue. */ 3016 err = usb_insert_transfer(xfer); 3017 if (err) 3018 return (err); 3019 3020 /* Pipe isn't running, start first */ 3021 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 3022 } 3023 3024 Static usbd_status 3025 ohci_device_intr_start(usbd_xfer_handle xfer) 3026 { 3027 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3028 usbd_device_handle dev = opipe->pipe.device; 3029 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 3030 ohci_soft_ed_t *sed = opipe->sed; 3031 ohci_soft_td_t *data, *tail; 3032 int s, len, isread, endpt; 3033 3034 if (sc->sc_dying) 3035 return (USBD_IOERROR); 3036 3037 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d " 3038 "flags=%d priv=%p\n", 3039 xfer, xfer->length, xfer->flags, xfer->priv)); 3040 3041 #ifdef DIAGNOSTIC 3042 if (xfer->rqflags & URQ_REQUEST) 3043 panic("ohci_device_intr_transfer: a request"); 3044 #endif 3045 3046 len = xfer->length; 3047 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 3048 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3049 3050 data = opipe->tail.td; 3051 tail = ohci_alloc_std(sc); 3052 if (tail == NULL) 3053 return (USBD_NOMEM); 3054 tail->xfer = NULL; 3055 3056 data->td.td_flags = HTOO32( 3057 isread ? OHCI_TD_IN : OHCI_TD_OUT | 3058 OHCI_TD_NOCC | 3059 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 3060 if (xfer->flags & USBD_SHORT_XFER_OK) 3061 data->td.td_flags |= HTOO32(OHCI_TD_R); 3062 data->td.td_cbp = HTOO32(DMAADDR(&xfer->dmabuf, 0)); 3063 data->nexttd = tail; 3064 data->td.td_nexttd = HTOO32(tail->physaddr); 3065 data->td.td_be = HTOO32(O32TOH(data->td.td_cbp) + len - 1); 3066 data->len = len; 3067 data->xfer = xfer; 3068 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 3069 xfer->hcpriv = data; 3070 3071 #ifdef OHCI_DEBUG 3072 if (ohcidebug > 5) { 3073 DPRINTF(("ohci_device_intr_transfer:\n")); 3074 ohci_dump_ed(sc, sed); 3075 ohci_dump_tds(sc, data); 3076 } 3077 #endif 3078 3079 /* Insert ED in schedule */ 3080 s = splusb(); 3081 sed->ed.ed_tailp = HTOO32(tail->physaddr); 3082 opipe->tail.td = tail; 3083 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3084 3085 #if 0 3086 /* 3087 * This goes horribly wrong, printing thousands of descriptors, 3088 * because false references are followed due to the fact that the 3089 * TD is gone. 3090 */ 3091 if (ohcidebug > 5) { 3092 usb_delay_ms(&sc->sc_bus, 5); 3093 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 3094 OREAD4(sc, OHCI_COMMAND_STATUS))); 3095 ohci_dump_ed(sc, sed); 3096 ohci_dump_tds(sc, data); 3097 } 3098 #endif 3099 splx(s); 3100 3101 return (USBD_IN_PROGRESS); 3102 } 3103 3104 /* Abort a device control request. */ 3105 Static void 3106 ohci_device_intr_abort(usbd_xfer_handle xfer) 3107 { 3108 if (xfer->pipe->intrxfer == xfer) { 3109 DPRINTF(("ohci_device_intr_abort: remove\n")); 3110 xfer->pipe->intrxfer = NULL; 3111 } 3112 ohci_abort_xfer(xfer, USBD_CANCELLED); 3113 } 3114 3115 /* Close a device interrupt pipe. */ 3116 Static void 3117 ohci_device_intr_close(usbd_pipe_handle pipe) 3118 { 3119 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3120 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3121 int nslots = opipe->u.intr.nslots; 3122 int pos = opipe->u.intr.pos; 3123 int j; 3124 ohci_soft_ed_t *p, *sed = opipe->sed; 3125 int s; 3126 3127 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 3128 pipe, nslots, pos)); 3129 s = splusb(); 3130 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 3131 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 3132 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) 3133 usb_delay_ms(&sc->sc_bus, 2); 3134 3135 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 3136 continue; 3137 #ifdef DIAGNOSTIC 3138 if (p == NULL) 3139 panic("ohci_device_intr_close: ED not found"); 3140 #endif 3141 p->next = sed->next; 3142 p->ed.ed_nexted = sed->ed.ed_nexted; 3143 splx(s); 3144 3145 for (j = 0; j < nslots; j++) 3146 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 3147 3148 ohci_free_std(sc, opipe->tail.td); 3149 ohci_free_sed(sc, opipe->sed); 3150 } 3151 3152 Static usbd_status 3153 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival) 3154 { 3155 int i, j, s, best; 3156 u_int npoll, slow, shigh, nslots; 3157 u_int bestbw, bw; 3158 ohci_soft_ed_t *hsed, *sed = opipe->sed; 3159 3160 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 3161 if (ival == 0) { 3162 printf("ohci_setintr: 0 interval\n"); 3163 return (USBD_INVAL); 3164 } 3165 3166 npoll = OHCI_NO_INTRS; 3167 while (npoll > ival) 3168 npoll /= 2; 3169 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 3170 3171 /* 3172 * We now know which level in the tree the ED must go into. 3173 * Figure out which slot has most bandwidth left over. 3174 * Slots to examine: 3175 * npoll 3176 * 1 0 3177 * 2 1 2 3178 * 4 3 4 5 6 3179 * 8 7 8 9 10 11 12 13 14 3180 * N (N-1) .. (N-1+N-1) 3181 */ 3182 slow = npoll-1; 3183 shigh = slow + npoll; 3184 nslots = OHCI_NO_INTRS / npoll; 3185 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 3186 bw = 0; 3187 for (j = 0; j < nslots; j++) 3188 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 3189 if (bw < bestbw) { 3190 best = i; 3191 bestbw = bw; 3192 } 3193 } 3194 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 3195 best, slow, shigh, bestbw)); 3196 3197 s = splusb(); 3198 hsed = sc->sc_eds[best]; 3199 sed->next = hsed->next; 3200 sed->ed.ed_nexted = hsed->ed.ed_nexted; 3201 hsed->next = sed; 3202 hsed->ed.ed_nexted = HTOO32(sed->physaddr); 3203 splx(s); 3204 3205 for (j = 0; j < nslots; j++) 3206 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 3207 opipe->u.intr.nslots = nslots; 3208 opipe->u.intr.pos = best; 3209 3210 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 3211 return (USBD_NORMAL_COMPLETION); 3212 } 3213 3214 /***********************/ 3215 3216 usbd_status 3217 ohci_device_isoc_transfer(usbd_xfer_handle xfer) 3218 { 3219 usbd_status err; 3220 3221 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer)); 3222 3223 /* Put it on our queue, */ 3224 err = usb_insert_transfer(xfer); 3225 3226 /* bail out on error, */ 3227 if (err && err != USBD_IN_PROGRESS) 3228 return (err); 3229 3230 /* XXX should check inuse here */ 3231 3232 /* insert into schedule, */ 3233 ohci_device_isoc_enter(xfer); 3234 3235 /* and start if the pipe wasn't running */ 3236 if (!err) 3237 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 3238 3239 return (err); 3240 } 3241 3242 void 3243 ohci_device_isoc_enter(usbd_xfer_handle xfer) 3244 { 3245 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3246 usbd_device_handle dev = opipe->pipe.device; 3247 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 3248 ohci_soft_ed_t *sed = opipe->sed; 3249 struct iso *iso = &opipe->u.iso; 3250 ohci_soft_itd_t *sitd, *nsitd; 3251 ohci_physaddr_t buf, offs, noffs, bp0; 3252 int i, ncur, nframes; 3253 int s; 3254 3255 DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p " 3256 "nframes=%d\n", 3257 iso->inuse, iso->next, xfer, xfer->nframes)); 3258 3259 if (sc->sc_dying) 3260 return; 3261 3262 if (iso->next == -1) { 3263 /* Not in use yet, schedule it a few frames ahead. */ 3264 iso->next = O32TOH(sc->sc_hcca->hcca_frame_number) + 5; 3265 DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n", 3266 iso->next)); 3267 } 3268 3269 sitd = opipe->tail.itd; 3270 buf = DMAADDR(&xfer->dmabuf, 0); 3271 bp0 = OHCI_PAGE(buf); 3272 offs = OHCI_PAGE_OFFSET(buf); 3273 nframes = xfer->nframes; 3274 xfer->hcpriv = sitd; 3275 for (i = ncur = 0; i < nframes; i++, ncur++) { 3276 noffs = offs + xfer->frlengths[i]; 3277 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ 3278 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */ 3279 3280 /* Allocate next ITD */ 3281 nsitd = ohci_alloc_sitd(sc); 3282 if (nsitd == NULL) { 3283 /* XXX what now? */ 3284 printf("%s: isoc TD alloc failed\n", 3285 USBDEVNAME(sc->sc_bus.bdev)); 3286 return; 3287 } 3288 3289 /* Fill current ITD */ 3290 sitd->itd.itd_flags = HTOO32( 3291 OHCI_ITD_NOCC | 3292 OHCI_ITD_SET_SF(iso->next) | 3293 OHCI_ITD_SET_DI(6) | /* delay intr a little */ 3294 OHCI_ITD_SET_FC(ncur)); 3295 sitd->itd.itd_bp0 = HTOO32(bp0); 3296 sitd->nextitd = nsitd; 3297 sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr); 3298 sitd->itd.itd_be = HTOO32(bp0 + offs - 1); 3299 sitd->xfer = xfer; 3300 sitd->flags = 0; 3301 3302 sitd = nsitd; 3303 iso->next = iso->next + ncur; 3304 bp0 = OHCI_PAGE(buf + offs); 3305 ncur = 0; 3306 } 3307 sitd->itd.itd_offset[ncur] = HTOO16(OHCI_ITD_MK_OFFS(offs)); 3308 offs = noffs; 3309 } 3310 nsitd = ohci_alloc_sitd(sc); 3311 if (nsitd == NULL) { 3312 /* XXX what now? */ 3313 printf("%s: isoc TD alloc failed\n", 3314 USBDEVNAME(sc->sc_bus.bdev)); 3315 return; 3316 } 3317 /* Fixup last used ITD */ 3318 sitd->itd.itd_flags = HTOO32( 3319 OHCI_ITD_NOCC | 3320 OHCI_ITD_SET_SF(iso->next) | 3321 OHCI_ITD_SET_DI(0) | 3322 OHCI_ITD_SET_FC(ncur)); 3323 sitd->itd.itd_bp0 = HTOO32(bp0); 3324 sitd->nextitd = nsitd; 3325 sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr); 3326 sitd->itd.itd_be = HTOO32(bp0 + offs - 1); 3327 sitd->xfer = xfer; 3328 sitd->flags = OHCI_CALL_DONE; 3329 3330 iso->next = iso->next + ncur; 3331 iso->inuse += nframes; 3332 3333 xfer->actlen = offs; /* XXX pretend we did it all */ 3334 3335 xfer->status = USBD_IN_PROGRESS; 3336 3337 #ifdef OHCI_DEBUG 3338 if (ohcidebug > 5) { 3339 DPRINTF(("ohci_device_isoc_enter: frame=%d\n", 3340 O32TOH(sc->sc_hcca->hcca_frame_number))); 3341 ohci_dump_itds(sc, xfer->hcpriv); 3342 ohci_dump_ed(sc, sed); 3343 } 3344 #endif 3345 3346 s = splusb(); 3347 sed->ed.ed_tailp = HTOO32(nsitd->physaddr); 3348 opipe->tail.itd = nsitd; 3349 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3350 splx(s); 3351 3352 #ifdef OHCI_DEBUG 3353 if (ohcidebug > 5) { 3354 delay(150000); 3355 DPRINTF(("ohci_device_isoc_enter: after frame=%d\n", 3356 O32TOH(sc->sc_hcca->hcca_frame_number))); 3357 ohci_dump_itds(sc, xfer->hcpriv); 3358 ohci_dump_ed(sc, sed); 3359 } 3360 #endif 3361 } 3362 3363 usbd_status 3364 ohci_device_isoc_start(usbd_xfer_handle xfer) 3365 { 3366 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3367 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3368 3369 DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer)); 3370 3371 if (sc->sc_dying) 3372 return (USBD_IOERROR); 3373 3374 #ifdef DIAGNOSTIC 3375 if (xfer->status != USBD_IN_PROGRESS) 3376 printf("ohci_device_isoc_start: not in progress %p\n", xfer); 3377 #endif 3378 3379 /* XXX anything to do? */ 3380 3381 return (USBD_IN_PROGRESS); 3382 } 3383 3384 void 3385 ohci_device_isoc_abort(usbd_xfer_handle xfer) 3386 { 3387 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3388 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3389 ohci_soft_ed_t *sed; 3390 ohci_soft_itd_t *sitd; 3391 int s; 3392 3393 s = splusb(); 3394 3395 DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer)); 3396 3397 /* Transfer is already done. */ 3398 if (xfer->status != USBD_NOT_STARTED && 3399 xfer->status != USBD_IN_PROGRESS) { 3400 splx(s); 3401 printf("ohci_device_isoc_abort: early return\n"); 3402 return; 3403 } 3404 3405 /* Give xfer the requested abort code. */ 3406 xfer->status = USBD_CANCELLED; 3407 3408 sed = opipe->sed; 3409 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */ 3410 3411 sitd = xfer->hcpriv; 3412 #ifdef DIAGNOSTIC 3413 if (sitd == NULL) { 3414 splx(s); 3415 printf("ohci_device_isoc_abort: hcpriv==0\n"); 3416 return; 3417 } 3418 #endif 3419 for (; sitd->xfer == xfer; sitd = sitd->nextitd) { 3420 #ifdef DIAGNOSTIC 3421 DPRINTFN(1,("abort sets done sitd=%p\n", sitd)); 3422 sitd->isdone = 1; 3423 #endif 3424 } 3425 3426 splx(s); 3427 3428 usb_delay_ms(&sc->sc_bus, OHCI_ITD_NOFFSET); 3429 3430 s = splusb(); 3431 3432 /* Run callback. */ 3433 usb_transfer_complete(xfer); 3434 3435 sed->ed.ed_headp = HTOO32(sitd->physaddr); /* unlink TDs */ 3436 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */ 3437 3438 splx(s); 3439 } 3440 3441 void 3442 ohci_device_isoc_done(usbd_xfer_handle xfer) 3443 { 3444 DPRINTFN(1,("ohci_device_isoc_done: xfer=%p\n", xfer)); 3445 } 3446 3447 usbd_status 3448 ohci_setup_isoc(usbd_pipe_handle pipe) 3449 { 3450 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3451 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3452 struct iso *iso = &opipe->u.iso; 3453 int s; 3454 3455 iso->next = -1; 3456 iso->inuse = 0; 3457 3458 s = splusb(); 3459 ohci_add_ed(sc, opipe->sed, sc->sc_isoc_head); 3460 splx(s); 3461 3462 return (USBD_NORMAL_COMPLETION); 3463 } 3464 3465 void 3466 ohci_device_isoc_close(usbd_pipe_handle pipe) 3467 { 3468 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3469 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3470 3471 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe)); 3472 ohci_close_pipe(pipe, sc->sc_isoc_head); 3473 #ifdef DIAGNOSTIC 3474 opipe->tail.itd->isdone = 1; 3475 #endif 3476 ohci_free_sitd(sc, opipe->tail.itd); 3477 } 3478
Indexes created Fri Oct 03 02:09:57 GMT 2025