ohci.c revision 1.184
1 /* $NetBSD: ohci.c,v 1.184 2007/10/19 12:01:21 ad Exp $ */ 2 /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */ 3 4 /* 5 * Copyright (c) 1998, 2004, 2005 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Lennart Augustsson (lennart (at) augustsson.net) at 10 * Carlstedt Research & Technology. 11 * This code is derived from software contributed to The NetBSD Foundation 12 * by Charles M. Hannum. 13 * 14 * Redistribution and use in source and binary forms, with or without 15 * modification, are permitted provided that the following conditions 16 * are met: 17 * 1. Redistributions of source code must retain the above copyright 18 * notice, this list of conditions and the following disclaimer. 19 * 2. Redistributions in binary form must reproduce the above copyright 20 * notice, this list of conditions and the following disclaimer in the 21 * documentation and/or other materials provided with the distribution. 22 * 3. All advertising materials mentioning features or use of this software 23 * must display the following acknowledgement: 24 * This product includes software developed by the NetBSD 25 * Foundation, Inc. and its contributors. 26 * 4. Neither the name of The NetBSD Foundation nor the names of its 27 * contributors may be used to endorse or promote products derived 28 * from this software without specific prior written permission. 29 * 30 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 31 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 32 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 33 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 34 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 35 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 36 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 37 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 38 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 39 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 40 * POSSIBILITY OF SUCH DAMAGE. 41 */ 42 43 /* 44 * USB Open Host Controller driver. 45 * 46 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html 47 * USB spec: http://www.usb.org/developers/docs/usbspec.zip 48 */ 49 50 #include <sys/cdefs.h> 51 __KERNEL_RCSID(0, "$NetBSD: ohci.c,v 1.184 2007/10/19 12:01:21 ad Exp $"); 52 53 #include <sys/param.h> 54 #include <sys/systm.h> 55 #include <sys/malloc.h> 56 #if defined(__NetBSD__) || defined(__OpenBSD__) 57 #include <sys/kernel.h> 58 #include <sys/device.h> 59 #include <sys/select.h> 60 #include <uvm/uvm_extern.h> 61 #elif defined(__FreeBSD__) 62 #include <sys/module.h> 63 #include <sys/bus.h> 64 #include <machine/bus_pio.h> 65 #include <machine/bus_memio.h> 66 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 67 #include <sys/cpu.h> 68 #endif 69 #endif 70 #include <sys/proc.h> 71 #include <sys/queue.h> 72 73 #include <sys/bus.h> 74 #include <machine/endian.h> 75 76 #include <dev/usb/usb.h> 77 #include <dev/usb/usbdi.h> 78 #include <dev/usb/usbdivar.h> 79 #include <dev/usb/usb_mem.h> 80 #include <dev/usb/usb_quirks.h> 81 82 #include <dev/usb/ohcireg.h> 83 #include <dev/usb/ohcivar.h> 84 85 #if defined(__FreeBSD__) 86 #include <machine/clock.h> 87 88 #define delay(d) DELAY(d) 89 #endif 90 91 #if defined(__OpenBSD__) 92 struct cfdriver ohci_cd = { 93 NULL, "ohci", DV_DULL 94 }; 95 #endif 96 97 #ifdef OHCI_DEBUG 98 #define DPRINTF(x) if (ohcidebug) logprintf x 99 #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x 100 int ohcidebug = 0; 101 #ifndef __NetBSD__ 102 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 103 #endif 104 #else 105 #define DPRINTF(x) 106 #define DPRINTFN(n,x) 107 #endif 108 109 #if BYTE_ORDER == BIG_ENDIAN 110 #define SWAP_ENDIAN OHCI_LITTLE_ENDIAN 111 #else 112 #define SWAP_ENDIAN OHCI_BIG_ENDIAN 113 #endif 114 115 #define O16TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap16(val) : val) 116 #define O32TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap32(val) : val) 117 #define HTOO16(val) O16TOH(val) 118 #define HTOO32(val) O32TOH(val) 119 120 struct ohci_pipe; 121 122 Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *); 123 Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *); 124 125 Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *); 126 Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *); 127 128 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *); 129 Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *); 130 131 #if 0 132 Static void ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *, 133 ohci_soft_td_t *); 134 #endif 135 Static usbd_status ohci_alloc_std_chain(struct ohci_pipe *, 136 ohci_softc_t *, int, int, usbd_xfer_handle, 137 ohci_soft_td_t *, ohci_soft_td_t **); 138 139 Static void ohci_shutdown(void *v); 140 Static void ohci_power(int, void *); 141 Static usbd_status ohci_open(usbd_pipe_handle); 142 Static void ohci_poll(struct usbd_bus *); 143 Static void ohci_softintr(void *); 144 Static void ohci_waitintr(ohci_softc_t *, usbd_xfer_handle); 145 Static void ohci_rhsc(ohci_softc_t *, usbd_xfer_handle); 146 147 Static usbd_status ohci_device_request(usbd_xfer_handle xfer); 148 Static void ohci_add_ed(ohci_softc_t *, ohci_soft_ed_t *, 149 ohci_soft_ed_t *); 150 151 Static void ohci_rem_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 152 Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *); 153 Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *); 154 Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t); 155 Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *); 156 Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *); 157 Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t); 158 159 Static usbd_status ohci_setup_isoc(usbd_pipe_handle pipe); 160 Static void ohci_device_isoc_enter(usbd_xfer_handle); 161 162 Static usbd_status ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 163 Static void ohci_freem(struct usbd_bus *, usb_dma_t *); 164 165 Static usbd_xfer_handle ohci_allocx(struct usbd_bus *); 166 Static void ohci_freex(struct usbd_bus *, usbd_xfer_handle); 167 168 Static usbd_status ohci_root_ctrl_transfer(usbd_xfer_handle); 169 Static usbd_status ohci_root_ctrl_start(usbd_xfer_handle); 170 Static void ohci_root_ctrl_abort(usbd_xfer_handle); 171 Static void ohci_root_ctrl_close(usbd_pipe_handle); 172 Static void ohci_root_ctrl_done(usbd_xfer_handle); 173 174 Static usbd_status ohci_root_intr_transfer(usbd_xfer_handle); 175 Static usbd_status ohci_root_intr_start(usbd_xfer_handle); 176 Static void ohci_root_intr_abort(usbd_xfer_handle); 177 Static void ohci_root_intr_close(usbd_pipe_handle); 178 Static void ohci_root_intr_done(usbd_xfer_handle); 179 180 Static usbd_status ohci_device_ctrl_transfer(usbd_xfer_handle); 181 Static usbd_status ohci_device_ctrl_start(usbd_xfer_handle); 182 Static void ohci_device_ctrl_abort(usbd_xfer_handle); 183 Static void ohci_device_ctrl_close(usbd_pipe_handle); 184 Static void ohci_device_ctrl_done(usbd_xfer_handle); 185 186 Static usbd_status ohci_device_bulk_transfer(usbd_xfer_handle); 187 Static usbd_status ohci_device_bulk_start(usbd_xfer_handle); 188 Static void ohci_device_bulk_abort(usbd_xfer_handle); 189 Static void ohci_device_bulk_close(usbd_pipe_handle); 190 Static void ohci_device_bulk_done(usbd_xfer_handle); 191 192 Static usbd_status ohci_device_intr_transfer(usbd_xfer_handle); 193 Static usbd_status ohci_device_intr_start(usbd_xfer_handle); 194 Static void ohci_device_intr_abort(usbd_xfer_handle); 195 Static void ohci_device_intr_close(usbd_pipe_handle); 196 Static void ohci_device_intr_done(usbd_xfer_handle); 197 198 Static usbd_status ohci_device_isoc_transfer(usbd_xfer_handle); 199 Static usbd_status ohci_device_isoc_start(usbd_xfer_handle); 200 Static void ohci_device_isoc_abort(usbd_xfer_handle); 201 Static void ohci_device_isoc_close(usbd_pipe_handle); 202 Static void ohci_device_isoc_done(usbd_xfer_handle); 203 204 Static usbd_status ohci_device_setintr(ohci_softc_t *sc, 205 struct ohci_pipe *pipe, int ival); 206 207 Static int ohci_str(usb_string_descriptor_t *, int, const char *); 208 209 Static void ohci_timeout(void *); 210 Static void ohci_timeout_task(void *); 211 Static void ohci_rhsc_enable(void *); 212 213 Static void ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *); 214 Static void ohci_abort_xfer(usbd_xfer_handle, usbd_status); 215 216 Static void ohci_device_clear_toggle(usbd_pipe_handle pipe); 217 Static void ohci_noop(usbd_pipe_handle pipe); 218 219 #ifdef OHCI_DEBUG 220 Static void ohci_dumpregs(ohci_softc_t *); 221 Static void ohci_dump_tds(ohci_softc_t *, ohci_soft_td_t *); 222 Static void ohci_dump_td(ohci_softc_t *, ohci_soft_td_t *); 223 Static void ohci_dump_ed(ohci_softc_t *, ohci_soft_ed_t *); 224 Static void ohci_dump_itd(ohci_softc_t *, ohci_soft_itd_t *); 225 Static void ohci_dump_itds(ohci_softc_t *, ohci_soft_itd_t *); 226 #endif 227 228 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 229 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 230 #define OWRITE1(sc, r, x) \ 231 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 232 #define OWRITE2(sc, r, x) \ 233 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 234 #define OWRITE4(sc, r, x) \ 235 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 236 static __inline uint8_t 237 OREAD1(ohci_softc_t *sc, bus_size_t r) 238 { 239 240 OBARR(sc); 241 return bus_space_read_1(sc->iot, sc->ioh, r); 242 } 243 244 static __inline uint16_t 245 OREAD2(ohci_softc_t *sc, bus_size_t r) 246 { 247 248 OBARR(sc); 249 return bus_space_read_2(sc->iot, sc->ioh, r); 250 } 251 252 static __inline uint32_t 253 OREAD4(ohci_softc_t *sc, bus_size_t r) 254 { 255 256 OBARR(sc); 257 return bus_space_read_4(sc->iot, sc->ioh, r); 258 } 259 260 /* Reverse the bits in a value 0 .. 31 */ 261 Static u_int8_t revbits[OHCI_NO_INTRS] = 262 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 263 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 264 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 265 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 266 267 struct ohci_pipe { 268 struct usbd_pipe pipe; 269 ohci_soft_ed_t *sed; 270 union { 271 ohci_soft_td_t *td; 272 ohci_soft_itd_t *itd; 273 } tail; 274 /* Info needed for different pipe kinds. */ 275 union { 276 /* Control pipe */ 277 struct { 278 usb_dma_t reqdma; 279 u_int length; 280 ohci_soft_td_t *setup, *data, *stat; 281 } ctl; 282 /* Interrupt pipe */ 283 struct { 284 int nslots; 285 int pos; 286 } intr; 287 /* Bulk pipe */ 288 struct { 289 u_int length; 290 int isread; 291 } bulk; 292 /* Iso pipe */ 293 struct iso { 294 int next, inuse; 295 } iso; 296 } u; 297 }; 298 299 #define OHCI_INTR_ENDPT 1 300 301 Static const struct usbd_bus_methods ohci_bus_methods = { 302 ohci_open, 303 ohci_softintr, 304 ohci_poll, 305 ohci_allocm, 306 ohci_freem, 307 ohci_allocx, 308 ohci_freex, 309 }; 310 311 Static const struct usbd_pipe_methods ohci_root_ctrl_methods = { 312 ohci_root_ctrl_transfer, 313 ohci_root_ctrl_start, 314 ohci_root_ctrl_abort, 315 ohci_root_ctrl_close, 316 ohci_noop, 317 ohci_root_ctrl_done, 318 }; 319 320 Static const struct usbd_pipe_methods ohci_root_intr_methods = { 321 ohci_root_intr_transfer, 322 ohci_root_intr_start, 323 ohci_root_intr_abort, 324 ohci_root_intr_close, 325 ohci_noop, 326 ohci_root_intr_done, 327 }; 328 329 Static const struct usbd_pipe_methods ohci_device_ctrl_methods = { 330 ohci_device_ctrl_transfer, 331 ohci_device_ctrl_start, 332 ohci_device_ctrl_abort, 333 ohci_device_ctrl_close, 334 ohci_noop, 335 ohci_device_ctrl_done, 336 }; 337 338 Static const struct usbd_pipe_methods ohci_device_intr_methods = { 339 ohci_device_intr_transfer, 340 ohci_device_intr_start, 341 ohci_device_intr_abort, 342 ohci_device_intr_close, 343 ohci_device_clear_toggle, 344 ohci_device_intr_done, 345 }; 346 347 Static const struct usbd_pipe_methods ohci_device_bulk_methods = { 348 ohci_device_bulk_transfer, 349 ohci_device_bulk_start, 350 ohci_device_bulk_abort, 351 ohci_device_bulk_close, 352 ohci_device_clear_toggle, 353 ohci_device_bulk_done, 354 }; 355 356 Static const struct usbd_pipe_methods ohci_device_isoc_methods = { 357 ohci_device_isoc_transfer, 358 ohci_device_isoc_start, 359 ohci_device_isoc_abort, 360 ohci_device_isoc_close, 361 ohci_noop, 362 ohci_device_isoc_done, 363 }; 364 365 #if defined(__NetBSD__) || defined(__OpenBSD__) 366 int 367 ohci_activate(device_ptr_t self, enum devact act) 368 { 369 struct ohci_softc *sc = (struct ohci_softc *)self; 370 int rv = 0; 371 372 switch (act) { 373 case DVACT_ACTIVATE: 374 return (EOPNOTSUPP); 375 376 case DVACT_DEACTIVATE: 377 sc->sc_dying = 1; 378 if (sc->sc_child != NULL) 379 rv = config_deactivate(sc->sc_child); 380 break; 381 } 382 return (rv); 383 } 384 385 int 386 ohci_detach(struct ohci_softc *sc, int flags) 387 { 388 int rv = 0; 389 390 if (sc->sc_child != NULL) 391 rv = config_detach(sc->sc_child, flags); 392 393 if (rv != 0) 394 return (rv); 395 396 usb_uncallout(sc->sc_tmo_rhsc, ohci_rhsc_enable, sc); 397 398 #if defined(__NetBSD__) || defined(__OpenBSD__) 399 powerhook_disestablish(sc->sc_powerhook); 400 shutdownhook_disestablish(sc->sc_shutdownhook); 401 #endif 402 403 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 404 405 /* free data structures XXX */ 406 407 return (rv); 408 } 409 #endif 410 411 ohci_soft_ed_t * 412 ohci_alloc_sed(ohci_softc_t *sc) 413 { 414 ohci_soft_ed_t *sed; 415 usbd_status err; 416 int i, offs; 417 usb_dma_t dma; 418 419 if (sc->sc_freeeds == NULL) { 420 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 421 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 422 OHCI_ED_ALIGN, &dma); 423 if (err) 424 return (0); 425 for(i = 0; i < OHCI_SED_CHUNK; i++) { 426 offs = i * OHCI_SED_SIZE; 427 sed = KERNADDR(&dma, offs); 428 sed->physaddr = DMAADDR(&dma, offs); 429 sed->next = sc->sc_freeeds; 430 sc->sc_freeeds = sed; 431 } 432 } 433 sed = sc->sc_freeeds; 434 sc->sc_freeeds = sed->next; 435 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 436 sed->next = 0; 437 return (sed); 438 } 439 440 void 441 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 442 { 443 sed->next = sc->sc_freeeds; 444 sc->sc_freeeds = sed; 445 } 446 447 ohci_soft_td_t * 448 ohci_alloc_std(ohci_softc_t *sc) 449 { 450 ohci_soft_td_t *std; 451 usbd_status err; 452 int i, offs; 453 usb_dma_t dma; 454 int s; 455 456 if (sc->sc_freetds == NULL) { 457 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 458 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 459 OHCI_TD_ALIGN, &dma); 460 if (err) 461 return (NULL); 462 s = splusb(); 463 for(i = 0; i < OHCI_STD_CHUNK; i++) { 464 offs = i * OHCI_STD_SIZE; 465 std = KERNADDR(&dma, offs); 466 std->physaddr = DMAADDR(&dma, offs); 467 std->nexttd = sc->sc_freetds; 468 sc->sc_freetds = std; 469 } 470 splx(s); 471 } 472 473 s = splusb(); 474 std = sc->sc_freetds; 475 sc->sc_freetds = std->nexttd; 476 memset(&std->td, 0, sizeof(ohci_td_t)); 477 std->nexttd = NULL; 478 std->xfer = NULL; 479 ohci_hash_add_td(sc, std); 480 splx(s); 481 482 return (std); 483 } 484 485 void 486 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std) 487 { 488 int s; 489 490 s = splusb(); 491 ohci_hash_rem_td(sc, std); 492 std->nexttd = sc->sc_freetds; 493 sc->sc_freetds = std; 494 splx(s); 495 } 496 497 usbd_status 498 ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc, 499 int alen, int rd, usbd_xfer_handle xfer, 500 ohci_soft_td_t *sp, ohci_soft_td_t **ep) 501 { 502 ohci_soft_td_t *next, *cur; 503 ohci_physaddr_t dataphys, dataphysend; 504 u_int32_t tdflags; 505 int len, curlen; 506 usb_dma_t *dma = &xfer->dmabuf; 507 u_int16_t flags = xfer->flags; 508 509 DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen)); 510 511 len = alen; 512 cur = sp; 513 dataphys = DMAADDR(dma, 0); 514 dataphysend = OHCI_PAGE(dataphys + len - 1); 515 tdflags = HTOO32( 516 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 517 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) | 518 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR); 519 520 for (;;) { 521 next = ohci_alloc_std(sc); 522 if (next == NULL) 523 goto nomem; 524 525 /* The OHCI hardware can handle at most one page crossing. */ 526 if (OHCI_PAGE(dataphys) == dataphysend || 527 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) { 528 /* we can handle it in this TD */ 529 curlen = len; 530 } else { 531 /* must use multiple TDs, fill as much as possible. */ 532 curlen = 2 * OHCI_PAGE_SIZE - 533 (dataphys & (OHCI_PAGE_SIZE-1)); 534 /* the length must be a multiple of the max size */ 535 curlen -= curlen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize); 536 #ifdef DIAGNOSTIC 537 if (curlen == 0) 538 panic("ohci_alloc_std: curlen == 0"); 539 #endif 540 } 541 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x " 542 "dataphysend=0x%08x len=%d curlen=%d\n", 543 dataphys, dataphysend, 544 len, curlen)); 545 len -= curlen; 546 547 cur->td.td_flags = tdflags; 548 cur->td.td_cbp = HTOO32(dataphys); 549 cur->nexttd = next; 550 cur->td.td_nexttd = HTOO32(next->physaddr); 551 cur->td.td_be = HTOO32(dataphys + curlen - 1); 552 cur->len = curlen; 553 cur->flags = OHCI_ADD_LEN; 554 cur->xfer = xfer; 555 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n", 556 dataphys, dataphys + curlen - 1)); 557 if (len == 0) 558 break; 559 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n")); 560 dataphys += curlen; 561 cur = next; 562 } 563 if (!rd && (flags & USBD_FORCE_SHORT_XFER) && 564 alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) { 565 /* Force a 0 length transfer at the end. */ 566 567 cur = next; 568 next = ohci_alloc_std(sc); 569 if (next == NULL) 570 goto nomem; 571 572 cur->td.td_flags = tdflags; 573 cur->td.td_cbp = 0; /* indicate 0 length packet */ 574 cur->nexttd = next; 575 cur->td.td_nexttd = HTOO32(next->physaddr); 576 cur->td.td_be = ~0; 577 cur->len = 0; 578 cur->flags = 0; 579 cur->xfer = xfer; 580 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n")); 581 } 582 *ep = cur; 583 584 return (USBD_NORMAL_COMPLETION); 585 586 nomem: 587 /* XXX free chain */ 588 return (USBD_NOMEM); 589 } 590 591 #if 0 592 Static void 593 ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std, 594 ohci_soft_td_t *stdend) 595 { 596 ohci_soft_td_t *p; 597 598 for (; std != stdend; std = p) { 599 p = std->nexttd; 600 ohci_free_std(sc, std); 601 } 602 } 603 #endif 604 605 ohci_soft_itd_t * 606 ohci_alloc_sitd(ohci_softc_t *sc) 607 { 608 ohci_soft_itd_t *sitd; 609 usbd_status err; 610 int i, s, offs; 611 usb_dma_t dma; 612 613 if (sc->sc_freeitds == NULL) { 614 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n")); 615 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK, 616 OHCI_ITD_ALIGN, &dma); 617 if (err) 618 return (NULL); 619 s = splusb(); 620 for(i = 0; i < OHCI_SITD_CHUNK; i++) { 621 offs = i * OHCI_SITD_SIZE; 622 sitd = KERNADDR(&dma, offs); 623 sitd->physaddr = DMAADDR(&dma, offs); 624 sitd->nextitd = sc->sc_freeitds; 625 sc->sc_freeitds = sitd; 626 } 627 splx(s); 628 } 629 630 s = splusb(); 631 sitd = sc->sc_freeitds; 632 sc->sc_freeitds = sitd->nextitd; 633 memset(&sitd->itd, 0, sizeof(ohci_itd_t)); 634 sitd->nextitd = NULL; 635 sitd->xfer = NULL; 636 ohci_hash_add_itd(sc, sitd); 637 splx(s); 638 639 #ifdef DIAGNOSTIC 640 sitd->isdone = 0; 641 #endif 642 643 return (sitd); 644 } 645 646 void 647 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 648 { 649 int s; 650 651 DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd)); 652 653 #ifdef DIAGNOSTIC 654 if (!sitd->isdone) { 655 panic("ohci_free_sitd: sitd=%p not done", sitd); 656 return; 657 } 658 /* Warn double free */ 659 sitd->isdone = 0; 660 #endif 661 662 s = splusb(); 663 ohci_hash_rem_itd(sc, sitd); 664 sitd->nextitd = sc->sc_freeitds; 665 sc->sc_freeitds = sitd; 666 splx(s); 667 } 668 669 usbd_status 670 ohci_init(ohci_softc_t *sc) 671 { 672 ohci_soft_ed_t *sed, *psed; 673 usbd_status err; 674 int i; 675 u_int32_t s, ctl, rwc, ival, hcr, fm, per, rev, desca, descb; 676 677 DPRINTF(("ohci_init: start\n")); 678 #if defined(__OpenBSD__) 679 printf(","); 680 #else 681 printf("%s:", USBDEVNAME(sc->sc_bus.bdev)); 682 #endif 683 rev = OREAD4(sc, OHCI_REVISION); 684 printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev), 685 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 686 687 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 688 printf("%s: unsupported OHCI revision\n", 689 USBDEVNAME(sc->sc_bus.bdev)); 690 sc->sc_bus.usbrev = USBREV_UNKNOWN; 691 return (USBD_INVAL); 692 } 693 sc->sc_bus.usbrev = USBREV_1_0; 694 695 for (i = 0; i < OHCI_HASH_SIZE; i++) 696 LIST_INIT(&sc->sc_hash_tds[i]); 697 for (i = 0; i < OHCI_HASH_SIZE; i++) 698 LIST_INIT(&sc->sc_hash_itds[i]); 699 700 SIMPLEQ_INIT(&sc->sc_free_xfers); 701 702 #ifdef __NetBSD__ 703 usb_setup_reserve(sc, &sc->sc_dma_reserve, sc->sc_bus.dmatag, 704 USB_MEM_RESERVE); 705 #endif 706 707 /* XXX determine alignment by R/W */ 708 /* Allocate the HCCA area. */ 709 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 710 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 711 if (err) 712 return (err); 713 sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0); 714 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 715 716 sc->sc_eintrs = OHCI_NORMAL_INTRS; 717 718 /* Allocate dummy ED that starts the control list. */ 719 sc->sc_ctrl_head = ohci_alloc_sed(sc); 720 if (sc->sc_ctrl_head == NULL) { 721 err = USBD_NOMEM; 722 goto bad1; 723 } 724 sc->sc_ctrl_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 725 726 /* Allocate dummy ED that starts the bulk list. */ 727 sc->sc_bulk_head = ohci_alloc_sed(sc); 728 if (sc->sc_bulk_head == NULL) { 729 err = USBD_NOMEM; 730 goto bad2; 731 } 732 sc->sc_bulk_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 733 734 /* Allocate dummy ED that starts the isochronous list. */ 735 sc->sc_isoc_head = ohci_alloc_sed(sc); 736 if (sc->sc_isoc_head == NULL) { 737 err = USBD_NOMEM; 738 goto bad3; 739 } 740 sc->sc_isoc_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 741 742 /* Allocate all the dummy EDs that make up the interrupt tree. */ 743 for (i = 0; i < OHCI_NO_EDS; i++) { 744 sed = ohci_alloc_sed(sc); 745 if (sed == NULL) { 746 while (--i >= 0) 747 ohci_free_sed(sc, sc->sc_eds[i]); 748 err = USBD_NOMEM; 749 goto bad4; 750 } 751 /* All ED fields are set to 0. */ 752 sc->sc_eds[i] = sed; 753 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 754 if (i != 0) 755 psed = sc->sc_eds[(i-1) / 2]; 756 else 757 psed= sc->sc_isoc_head; 758 sed->next = psed; 759 sed->ed.ed_nexted = HTOO32(psed->physaddr); 760 } 761 /* 762 * Fill HCCA interrupt table. The bit reversal is to get 763 * the tree set up properly to spread the interrupts. 764 */ 765 for (i = 0; i < OHCI_NO_INTRS; i++) 766 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 767 HTOO32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 768 769 #ifdef OHCI_DEBUG 770 if (ohcidebug > 15) { 771 for (i = 0; i < OHCI_NO_EDS; i++) { 772 printf("ed#%d ", i); 773 ohci_dump_ed(sc, sc->sc_eds[i]); 774 } 775 printf("iso "); 776 ohci_dump_ed(sc, sc->sc_isoc_head); 777 } 778 #endif 779 780 /* Preserve values programmed by SMM/BIOS but lost over reset. */ 781 ctl = OREAD4(sc, OHCI_CONTROL); 782 rwc = ctl & OHCI_RWC; 783 fm = OREAD4(sc, OHCI_FM_INTERVAL); 784 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 785 descb = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 786 787 /* Determine in what context we are running. */ 788 if (ctl & OHCI_IR) { 789 /* SMM active, request change */ 790 DPRINTF(("ohci_init: SMM active, request owner change\n")); 791 if ((sc->sc_intre & (OHCI_OC | OHCI_MIE)) == 792 (OHCI_OC | OHCI_MIE)) 793 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_MIE); 794 s = OREAD4(sc, OHCI_COMMAND_STATUS); 795 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 796 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 797 usb_delay_ms(&sc->sc_bus, 1); 798 ctl = OREAD4(sc, OHCI_CONTROL); 799 } 800 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_MIE); 801 if ((ctl & OHCI_IR) == 0) { 802 printf("%s: SMM does not respond, resetting\n", 803 USBDEVNAME(sc->sc_bus.bdev)); 804 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 805 goto reset; 806 } 807 #if 0 808 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */ 809 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 810 /* BIOS started controller. */ 811 DPRINTF(("ohci_init: BIOS active\n")); 812 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 813 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL | rwc); 814 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 815 } 816 #endif 817 } else { 818 DPRINTF(("ohci_init: cold started\n")); 819 reset: 820 /* Controller was cold started. */ 821 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 822 } 823 824 /* 825 * This reset should not be necessary according to the OHCI spec, but 826 * without it some controllers do not start. 827 */ 828 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 829 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 830 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 831 832 /* We now own the host controller and the bus has been reset. */ 833 834 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 835 /* Nominal time for a reset is 10 us. */ 836 for (i = 0; i < 10; i++) { 837 delay(10); 838 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 839 if (!hcr) 840 break; 841 } 842 if (hcr) { 843 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 844 err = USBD_IOERROR; 845 goto bad5; 846 } 847 #ifdef OHCI_DEBUG 848 if (ohcidebug > 15) 849 ohci_dumpregs(sc); 850 #endif 851 852 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 853 854 /* Set up HC registers. */ 855 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 856 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 857 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 858 /* disable all interrupts and then switch on all desired interrupts */ 859 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 860 /* switch on desired functional features */ 861 ctl = OREAD4(sc, OHCI_CONTROL); 862 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 863 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 864 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL | rwc; 865 /* And finally start it! */ 866 OWRITE4(sc, OHCI_CONTROL, ctl); 867 868 /* 869 * The controller is now OPERATIONAL. Set a some final 870 * registers that should be set earlier, but that the 871 * controller ignores when in the SUSPEND state. 872 */ 873 ival = OHCI_GET_IVAL(fm); 874 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 875 fm |= OHCI_FSMPS(ival) | ival; 876 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 877 per = OHCI_PERIODIC(ival); /* 90% periodic */ 878 OWRITE4(sc, OHCI_PERIODIC_START, per); 879 880 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */ 881 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP); 882 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 883 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY); 884 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca); 885 886 /* 887 * The AMD756 requires a delay before re-reading the register, 888 * otherwise it will occasionally report 0 ports. 889 */ 890 sc->sc_noport = 0; 891 for (i = 0; i < 10 && sc->sc_noport == 0; i++) { 892 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY); 893 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 894 } 895 896 #ifdef OHCI_DEBUG 897 if (ohcidebug > 5) 898 ohci_dumpregs(sc); 899 #endif 900 901 /* Set up the bus struct. */ 902 sc->sc_bus.methods = &ohci_bus_methods; 903 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 904 905 #if defined(__NetBSD__) || defined(__OpenBSD__) 906 sc->sc_control = sc->sc_intre = 0; 907 sc->sc_powerhook = powerhook_establish(USBDEVNAME(sc->sc_bus.bdev), 908 ohci_power, sc); 909 sc->sc_shutdownhook = shutdownhook_establish(ohci_shutdown, sc); 910 #endif 911 912 usb_callout_init(sc->sc_tmo_rhsc); 913 914 /* Finally, turn on interrupts. */ 915 DPRINTFN(1,("ohci_init: enabling\n")); 916 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 917 918 return (USBD_NORMAL_COMPLETION); 919 920 bad5: 921 for (i = 0; i < OHCI_NO_EDS; i++) 922 ohci_free_sed(sc, sc->sc_eds[i]); 923 bad4: 924 ohci_free_sed(sc, sc->sc_isoc_head); 925 bad3: 926 ohci_free_sed(sc, sc->sc_bulk_head); 927 bad2: 928 ohci_free_sed(sc, sc->sc_ctrl_head); 929 bad1: 930 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 931 return (err); 932 } 933 934 usbd_status 935 ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 936 { 937 #if defined(__NetBSD__) || defined(__OpenBSD__) 938 struct ohci_softc *sc = (struct ohci_softc *)bus; 939 #endif 940 usbd_status status; 941 942 status = usb_allocmem(&sc->sc_bus, size, 0, dma); 943 #ifdef __NetBSD__ 944 if (status == USBD_NOMEM) 945 status = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size); 946 #endif 947 return status; 948 } 949 950 void 951 ohci_freem(struct usbd_bus *bus, usb_dma_t *dma) 952 { 953 #if defined(__NetBSD__) || defined(__OpenBSD__) 954 struct ohci_softc *sc = (struct ohci_softc *)bus; 955 #endif 956 #ifdef __NetBSD__ 957 if (dma->block->flags & USB_DMA_RESERVE) { 958 usb_reserve_freem(&((struct ohci_softc *)bus)->sc_dma_reserve, 959 dma); 960 return; 961 } 962 #endif 963 usb_freemem(&sc->sc_bus, dma); 964 } 965 966 usbd_xfer_handle 967 ohci_allocx(struct usbd_bus *bus) 968 { 969 struct ohci_softc *sc = (struct ohci_softc *)bus; 970 usbd_xfer_handle xfer; 971 972 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 973 if (xfer != NULL) { 974 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 975 #ifdef DIAGNOSTIC 976 if (xfer->busy_free != XFER_FREE) { 977 printf("ohci_allocx: xfer=%p not free, 0x%08x\n", xfer, 978 xfer->busy_free); 979 } 980 #endif 981 } else { 982 xfer = malloc(sizeof(struct ohci_xfer), M_USB, M_NOWAIT); 983 } 984 if (xfer != NULL) { 985 memset(xfer, 0, sizeof (struct ohci_xfer)); 986 #ifdef DIAGNOSTIC 987 xfer->busy_free = XFER_BUSY; 988 #endif 989 } 990 return (xfer); 991 } 992 993 void 994 ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 995 { 996 struct ohci_softc *sc = (struct ohci_softc *)bus; 997 998 #ifdef DIAGNOSTIC 999 if (xfer->busy_free != XFER_BUSY) { 1000 printf("ohci_freex: xfer=%p not busy, 0x%08x\n", xfer, 1001 xfer->busy_free); 1002 } 1003 xfer->busy_free = XFER_FREE; 1004 #endif 1005 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 1006 } 1007 1008 /* 1009 * Shut down the controller when the system is going down. 1010 */ 1011 void 1012 ohci_shutdown(void *v) 1013 { 1014 ohci_softc_t *sc = v; 1015 1016 DPRINTF(("ohci_shutdown: stopping the HC\n")); 1017 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1018 } 1019 1020 /* 1021 * Handle suspend/resume. 1022 * 1023 * We need to switch to polling mode here, because this routine is 1024 * called from an interupt context. This is all right since we 1025 * are almost suspended anyway. 1026 */ 1027 void 1028 ohci_power(int why, void *v) 1029 { 1030 ohci_softc_t *sc = v; 1031 u_int32_t ctl; 1032 int s; 1033 1034 #ifdef OHCI_DEBUG 1035 DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why)); 1036 ohci_dumpregs(sc); 1037 #endif 1038 1039 s = splhardusb(); 1040 switch (why) { 1041 case PWR_SUSPEND: 1042 case PWR_STANDBY: 1043 sc->sc_bus.use_polling++; 1044 ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK; 1045 if (sc->sc_control == 0) { 1046 /* 1047 * Preserve register values, in case that APM BIOS 1048 * does not recover them. 1049 */ 1050 sc->sc_control = ctl; 1051 sc->sc_intre = OREAD4(sc, OHCI_INTERRUPT_ENABLE); 1052 } 1053 ctl |= OHCI_HCFS_SUSPEND; 1054 OWRITE4(sc, OHCI_CONTROL, ctl); 1055 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1056 sc->sc_bus.use_polling--; 1057 break; 1058 case PWR_RESUME: 1059 sc->sc_bus.use_polling++; 1060 /* Some broken BIOSes do not recover these values */ 1061 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 1062 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 1063 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 1064 if (sc->sc_intre) 1065 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, 1066 sc->sc_intre & (OHCI_ALL_INTRS | OHCI_MIE)); 1067 if (sc->sc_control) 1068 ctl = sc->sc_control; 1069 else 1070 ctl = OREAD4(sc, OHCI_CONTROL); 1071 ctl |= OHCI_HCFS_RESUME; 1072 OWRITE4(sc, OHCI_CONTROL, ctl); 1073 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 1074 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL; 1075 OWRITE4(sc, OHCI_CONTROL, ctl); 1076 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 1077 sc->sc_control = sc->sc_intre = 0; 1078 sc->sc_bus.use_polling--; 1079 break; 1080 case PWR_SOFTSUSPEND: 1081 case PWR_SOFTSTANDBY: 1082 case PWR_SOFTRESUME: 1083 break; 1084 } 1085 splx(s); 1086 } 1087 1088 #ifdef OHCI_DEBUG 1089 void 1090 ohci_dumpregs(ohci_softc_t *sc) 1091 { 1092 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 1093 OREAD4(sc, OHCI_REVISION), 1094 OREAD4(sc, OHCI_CONTROL), 1095 OREAD4(sc, OHCI_COMMAND_STATUS))); 1096 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 1097 OREAD4(sc, OHCI_INTERRUPT_STATUS), 1098 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 1099 OREAD4(sc, OHCI_INTERRUPT_DISABLE))); 1100 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 1101 OREAD4(sc, OHCI_HCCA), 1102 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 1103 OREAD4(sc, OHCI_CONTROL_HEAD_ED))); 1104 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 1105 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 1106 OREAD4(sc, OHCI_BULK_HEAD_ED), 1107 OREAD4(sc, OHCI_BULK_CURRENT_ED))); 1108 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 1109 OREAD4(sc, OHCI_DONE_HEAD), 1110 OREAD4(sc, OHCI_FM_INTERVAL), 1111 OREAD4(sc, OHCI_FM_REMAINING))); 1112 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 1113 OREAD4(sc, OHCI_FM_NUMBER), 1114 OREAD4(sc, OHCI_PERIODIC_START), 1115 OREAD4(sc, OHCI_LS_THRESHOLD))); 1116 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n", 1117 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 1118 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 1119 OREAD4(sc, OHCI_RH_STATUS))); 1120 DPRINTF((" port1=0x%08x port2=0x%08x\n", 1121 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 1122 OREAD4(sc, OHCI_RH_PORT_STATUS(2)))); 1123 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n", 1124 O32TOH(sc->sc_hcca->hcca_frame_number), 1125 O32TOH(sc->sc_hcca->hcca_done_head))); 1126 } 1127 #endif 1128 1129 Static int ohci_intr1(ohci_softc_t *); 1130 1131 int 1132 ohci_intr(void *p) 1133 { 1134 ohci_softc_t *sc = p; 1135 1136 if (sc == NULL || sc->sc_dying) 1137 return (0); 1138 1139 /* If we get an interrupt while polling, then just ignore it. */ 1140 if (sc->sc_bus.use_polling) { 1141 #ifdef DIAGNOSTIC 1142 DPRINTFN(16, ("ohci_intr: ignored interrupt while polling\n")); 1143 #endif 1144 /* for level triggered intrs, should do something to ack */ 1145 OWRITE4(sc, OHCI_INTERRUPT_STATUS, 1146 OREAD4(sc, OHCI_INTERRUPT_STATUS)); 1147 1148 return (0); 1149 } 1150 1151 return (ohci_intr1(sc)); 1152 } 1153 1154 Static int 1155 ohci_intr1(ohci_softc_t *sc) 1156 { 1157 u_int32_t intrs, eintrs; 1158 1159 DPRINTFN(14,("ohci_intr1: enter\n")); 1160 1161 /* In case the interrupt occurs before initialization has completed. */ 1162 if (sc == NULL || sc->sc_hcca == NULL) { 1163 #ifdef DIAGNOSTIC 1164 printf("ohci_intr: sc->sc_hcca == NULL\n"); 1165 #endif 1166 return (0); 1167 } 1168 1169 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1170 if (!intrs) 1171 return (0); 1172 1173 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs & ~(OHCI_MIE|OHCI_WDH)); /* Acknowledge */ 1174 eintrs = intrs & sc->sc_eintrs; 1175 if (!eintrs) 1176 return (0); 1177 1178 sc->sc_bus.intr_context++; 1179 sc->sc_bus.no_intrs++; 1180 DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 1181 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 1182 (u_int)eintrs)); 1183 1184 if (eintrs & OHCI_SO) { 1185 sc->sc_overrun_cnt++; 1186 if (usbd_ratecheck(&sc->sc_overrun_ntc)) { 1187 printf("%s: %u scheduling overruns\n", 1188 USBDEVNAME(sc->sc_bus.bdev), sc->sc_overrun_cnt); 1189 sc->sc_overrun_cnt = 0; 1190 } 1191 /* XXX do what */ 1192 eintrs &= ~OHCI_SO; 1193 } 1194 if (eintrs & OHCI_WDH) { 1195 /* 1196 * We block the interrupt below, and reenable it later from 1197 * ohci_softintr(). 1198 */ 1199 usb_schedsoftintr(&sc->sc_bus); 1200 } 1201 if (eintrs & OHCI_RD) { 1202 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev)); 1203 /* XXX process resume detect */ 1204 } 1205 if (eintrs & OHCI_UE) { 1206 printf("%s: unrecoverable error, controller halted\n", 1207 USBDEVNAME(sc->sc_bus.bdev)); 1208 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1209 /* XXX what else */ 1210 } 1211 if (eintrs & OHCI_RHSC) { 1212 /* 1213 * We block the interrupt below, and reenable it later from 1214 * a timeout. 1215 */ 1216 ohci_rhsc(sc, sc->sc_intrxfer); 1217 /* Do not allow RHSC interrupts > 1 per second */ 1218 usb_callout(sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc); 1219 } 1220 1221 sc->sc_bus.intr_context--; 1222 1223 if (eintrs != 0) { 1224 /* Block unprocessed interrupts. */ 1225 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs); 1226 sc->sc_eintrs &= ~eintrs; 1227 DPRINTFN(1, ("%s: blocking intrs 0x%x\n", 1228 USBDEVNAME(sc->sc_bus.bdev), eintrs)); 1229 } 1230 1231 return (1); 1232 } 1233 1234 void 1235 ohci_rhsc_enable(void *v_sc) 1236 { 1237 ohci_softc_t *sc = v_sc; 1238 int s; 1239 1240 s = splhardusb(); 1241 sc->sc_eintrs |= OHCI_RHSC; 1242 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1243 splx(s); 1244 } 1245 1246 #ifdef OHCI_DEBUG 1247 const char *ohci_cc_strs[] = { 1248 "NO_ERROR", 1249 "CRC", 1250 "BIT_STUFFING", 1251 "DATA_TOGGLE_MISMATCH", 1252 "STALL", 1253 "DEVICE_NOT_RESPONDING", 1254 "PID_CHECK_FAILURE", 1255 "UNEXPECTED_PID", 1256 "DATA_OVERRUN", 1257 "DATA_UNDERRUN", 1258 "BUFFER_OVERRUN", 1259 "BUFFER_UNDERRUN", 1260 "reserved", 1261 "reserved", 1262 "NOT_ACCESSED", 1263 "NOT_ACCESSED", 1264 }; 1265 #endif 1266 1267 void 1268 ohci_softintr(void *v) 1269 { 1270 ohci_softc_t *sc = v; 1271 ohci_soft_itd_t *sitd, *sidone, *sitdnext; 1272 ohci_soft_td_t *std, *sdone, *stdnext; 1273 usbd_xfer_handle xfer; 1274 struct ohci_pipe *opipe; 1275 int len, cc, s; 1276 int i, j, actlen, iframes, uedir; 1277 ohci_physaddr_t done; 1278 1279 DPRINTFN(10,("ohci_softintr: enter\n")); 1280 1281 sc->sc_bus.intr_context++; 1282 1283 s = splhardusb(); 1284 done = O32TOH(sc->sc_hcca->hcca_done_head) & ~OHCI_DONE_INTRS; 1285 sc->sc_hcca->hcca_done_head = 0; 1286 OWRITE4(sc, OHCI_INTERRUPT_STATUS, OHCI_WDH); 1287 sc->sc_eintrs |= OHCI_WDH; 1288 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_WDH); 1289 splx(s); 1290 1291 /* Reverse the done list. */ 1292 for (sdone = NULL, sidone = NULL; done != 0; ) { 1293 std = ohci_hash_find_td(sc, done); 1294 if (std != NULL) { 1295 std->dnext = sdone; 1296 done = O32TOH(std->td.td_nexttd); 1297 sdone = std; 1298 DPRINTFN(10,("add TD %p\n", std)); 1299 continue; 1300 } 1301 sitd = ohci_hash_find_itd(sc, done); 1302 if (sitd != NULL) { 1303 sitd->dnext = sidone; 1304 done = O32TOH(sitd->itd.itd_nextitd); 1305 sidone = sitd; 1306 DPRINTFN(5,("add ITD %p\n", sitd)); 1307 continue; 1308 } 1309 panic("ohci_softintr: addr 0x%08lx not found", (u_long)done); 1310 } 1311 1312 DPRINTFN(10,("ohci_softintr: sdone=%p sidone=%p\n", sdone, sidone)); 1313 1314 #ifdef OHCI_DEBUG 1315 if (ohcidebug > 10) { 1316 DPRINTF(("ohci_process_done: TD done:\n")); 1317 ohci_dump_tds(sc, sdone); 1318 } 1319 #endif 1320 1321 for (std = sdone; std; std = stdnext) { 1322 xfer = std->xfer; 1323 stdnext = std->dnext; 1324 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n", 1325 std, xfer, xfer ? xfer->hcpriv : 0)); 1326 if (xfer == NULL) { 1327 /* 1328 * xfer == NULL: There seems to be no xfer associated 1329 * with this TD. It is tailp that happened to end up on 1330 * the done queue. 1331 * Shouldn't happen, but some chips are broken(?). 1332 */ 1333 continue; 1334 } 1335 if (xfer->status == USBD_CANCELLED || 1336 xfer->status == USBD_TIMEOUT) { 1337 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1338 xfer)); 1339 /* Handled by abort routine. */ 1340 continue; 1341 } 1342 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 1343 1344 len = std->len; 1345 if (std->td.td_cbp != 0) 1346 len -= O32TOH(std->td.td_be) - 1347 O32TOH(std->td.td_cbp) + 1; 1348 DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", len, 1349 std->flags)); 1350 if (std->flags & OHCI_ADD_LEN) 1351 xfer->actlen += len; 1352 1353 cc = OHCI_TD_GET_CC(O32TOH(std->td.td_flags)); 1354 if (cc == OHCI_CC_NO_ERROR) { 1355 if (std->flags & OHCI_CALL_DONE) { 1356 xfer->status = USBD_NORMAL_COMPLETION; 1357 s = splusb(); 1358 usb_transfer_complete(xfer); 1359 splx(s); 1360 } 1361 ohci_free_std(sc, std); 1362 } else { 1363 /* 1364 * Endpoint is halted. First unlink all the TDs 1365 * belonging to the failed transfer, and then restart 1366 * the endpoint. 1367 */ 1368 ohci_soft_td_t *p, *n; 1369 opipe = (struct ohci_pipe *)xfer->pipe; 1370 1371 DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n", 1372 OHCI_TD_GET_CC(O32TOH(std->td.td_flags)), 1373 ohci_cc_strs[OHCI_TD_GET_CC(O32TOH(std->td.td_flags))])); 1374 1375 /* remove TDs */ 1376 for (p = std; p->xfer == xfer; p = n) { 1377 n = p->nexttd; 1378 ohci_free_std(sc, p); 1379 } 1380 1381 /* clear halt */ 1382 opipe->sed->ed.ed_headp = HTOO32(p->physaddr); 1383 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1384 1385 if (cc == OHCI_CC_STALL) 1386 xfer->status = USBD_STALLED; 1387 else 1388 xfer->status = USBD_IOERROR; 1389 s = splusb(); 1390 usb_transfer_complete(xfer); 1391 splx(s); 1392 } 1393 } 1394 1395 #ifdef OHCI_DEBUG 1396 if (ohcidebug > 10) { 1397 DPRINTF(("ohci_softintr: ITD done:\n")); 1398 ohci_dump_itds(sc, sidone); 1399 } 1400 #endif 1401 1402 for (sitd = sidone; sitd != NULL; sitd = sitdnext) { 1403 xfer = sitd->xfer; 1404 sitdnext = sitd->dnext; 1405 DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n", 1406 sitd, xfer, xfer ? xfer->hcpriv : 0)); 1407 if (xfer == NULL) 1408 continue; 1409 if (xfer->status == USBD_CANCELLED || 1410 xfer->status == USBD_TIMEOUT) { 1411 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1412 xfer)); 1413 /* Handled by abort routine. */ 1414 continue; 1415 } 1416 #ifdef DIAGNOSTIC 1417 if (sitd->isdone) 1418 printf("ohci_softintr: sitd=%p is done\n", sitd); 1419 sitd->isdone = 1; 1420 #endif 1421 if (sitd->flags & OHCI_CALL_DONE) { 1422 ohci_soft_itd_t *next; 1423 1424 opipe = (struct ohci_pipe *)xfer->pipe; 1425 opipe->u.iso.inuse -= xfer->nframes; 1426 uedir = UE_GET_DIR(xfer->pipe->endpoint->edesc-> 1427 bEndpointAddress); 1428 xfer->status = USBD_NORMAL_COMPLETION; 1429 actlen = 0; 1430 for (i = 0, sitd = xfer->hcpriv;; 1431 sitd = next) { 1432 next = sitd->nextitd; 1433 if (OHCI_ITD_GET_CC(O32TOH(sitd-> 1434 itd.itd_flags)) != OHCI_CC_NO_ERROR) 1435 xfer->status = USBD_IOERROR; 1436 /* For input, update frlengths with actual */ 1437 /* XXX anything necessary for output? */ 1438 if (uedir == UE_DIR_IN && 1439 xfer->status == USBD_NORMAL_COMPLETION) { 1440 iframes = OHCI_ITD_GET_FC(O32TOH( 1441 sitd->itd.itd_flags)); 1442 for (j = 0; j < iframes; i++, j++) { 1443 len = O16TOH(sitd-> 1444 itd.itd_offset[j]); 1445 if ((OHCI_ITD_PSW_GET_CC(len) & 1446 OHCI_CC_NOT_ACCESSED_MASK) 1447 == OHCI_CC_NOT_ACCESSED) 1448 len = 0; 1449 else 1450 len = OHCI_ITD_PSW_LENGTH(len); 1451 xfer->frlengths[i] = len; 1452 actlen += len; 1453 } 1454 } 1455 if (sitd->flags & OHCI_CALL_DONE) 1456 break; 1457 ohci_free_sitd(sc, sitd); 1458 } 1459 ohci_free_sitd(sc, sitd); 1460 if (uedir == UE_DIR_IN && 1461 xfer->status == USBD_NORMAL_COMPLETION) 1462 xfer->actlen = actlen; 1463 xfer->hcpriv = NULL; 1464 1465 s = splusb(); 1466 usb_transfer_complete(xfer); 1467 splx(s); 1468 } 1469 } 1470 1471 #ifdef USB_USE_SOFTINTR 1472 if (sc->sc_softwake) { 1473 sc->sc_softwake = 0; 1474 wakeup(&sc->sc_softwake); 1475 } 1476 #endif /* USB_USE_SOFTINTR */ 1477 1478 sc->sc_bus.intr_context--; 1479 DPRINTFN(10,("ohci_softintr: done:\n")); 1480 } 1481 1482 void 1483 ohci_device_ctrl_done(usbd_xfer_handle xfer) 1484 { 1485 DPRINTFN(10,("ohci_device_ctrl_done: xfer=%p\n", xfer)); 1486 1487 #ifdef DIAGNOSTIC 1488 if (!(xfer->rqflags & URQ_REQUEST)) { 1489 panic("ohci_device_ctrl_done: not a request"); 1490 } 1491 #endif 1492 } 1493 1494 void 1495 ohci_device_intr_done(usbd_xfer_handle xfer) 1496 { 1497 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1498 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1499 ohci_soft_ed_t *sed = opipe->sed; 1500 ohci_soft_td_t *data, *tail; 1501 1502 1503 DPRINTFN(10,("ohci_device_intr_done: xfer=%p, actlen=%d\n", 1504 xfer, xfer->actlen)); 1505 1506 if (xfer->pipe->repeat) { 1507 data = opipe->tail.td; 1508 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 1509 if (tail == NULL) { 1510 xfer->status = USBD_NOMEM; 1511 return; 1512 } 1513 tail->xfer = NULL; 1514 1515 data->td.td_flags = HTOO32( 1516 OHCI_TD_IN | OHCI_TD_NOCC | 1517 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 1518 if (xfer->flags & USBD_SHORT_XFER_OK) 1519 data->td.td_flags |= HTOO32(OHCI_TD_R); 1520 data->td.td_cbp = HTOO32(DMAADDR(&xfer->dmabuf, 0)); 1521 data->nexttd = tail; 1522 data->td.td_nexttd = HTOO32(tail->physaddr); 1523 data->td.td_be = HTOO32(O32TOH(data->td.td_cbp) + 1524 xfer->length - 1); 1525 data->len = xfer->length; 1526 data->xfer = xfer; 1527 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1528 xfer->hcpriv = data; 1529 xfer->actlen = 0; 1530 1531 sed->ed.ed_tailp = HTOO32(tail->physaddr); 1532 opipe->tail.td = tail; 1533 } 1534 } 1535 1536 void 1537 ohci_device_bulk_done(usbd_xfer_handle xfer) 1538 { 1539 DPRINTFN(10,("ohci_device_bulk_done: xfer=%p, actlen=%d\n", 1540 xfer, xfer->actlen)); 1541 } 1542 1543 void 1544 ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer) 1545 { 1546 usbd_pipe_handle pipe; 1547 u_char *p; 1548 int i, m; 1549 int hstatus; 1550 1551 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1552 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n", 1553 sc, xfer, hstatus)); 1554 1555 if (xfer == NULL) { 1556 /* Just ignore the change. */ 1557 return; 1558 } 1559 1560 pipe = xfer->pipe; 1561 1562 p = KERNADDR(&xfer->dmabuf, 0); 1563 m = min(sc->sc_noport, xfer->length * 8 - 1); 1564 memset(p, 0, xfer->length); 1565 for (i = 1; i <= m; i++) { 1566 /* Pick out CHANGE bits from the status reg. */ 1567 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1568 p[i/8] |= 1 << (i%8); 1569 } 1570 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 1571 xfer->actlen = xfer->length; 1572 xfer->status = USBD_NORMAL_COMPLETION; 1573 1574 usb_transfer_complete(xfer); 1575 } 1576 1577 void 1578 ohci_root_intr_done(usbd_xfer_handle xfer) 1579 { 1580 } 1581 1582 void 1583 ohci_root_ctrl_done(usbd_xfer_handle xfer) 1584 { 1585 } 1586 1587 /* 1588 * Wait here until controller claims to have an interrupt. 1589 * Then call ohci_intr and return. Use timeout to avoid waiting 1590 * too long. 1591 */ 1592 void 1593 ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer) 1594 { 1595 int timo; 1596 u_int32_t intrs; 1597 1598 xfer->status = USBD_IN_PROGRESS; 1599 for (timo = xfer->timeout; timo >= 0; timo--) { 1600 usb_delay_ms(&sc->sc_bus, 1); 1601 if (sc->sc_dying) 1602 break; 1603 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 1604 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs)); 1605 #ifdef OHCI_DEBUG 1606 if (ohcidebug > 15) 1607 ohci_dumpregs(sc); 1608 #endif 1609 if (intrs) { 1610 ohci_intr1(sc); 1611 if (xfer->status != USBD_IN_PROGRESS) 1612 return; 1613 } 1614 } 1615 1616 /* Timeout */ 1617 DPRINTF(("ohci_waitintr: timeout\n")); 1618 xfer->status = USBD_TIMEOUT; 1619 usb_transfer_complete(xfer); 1620 /* XXX should free TD */ 1621 } 1622 1623 void 1624 ohci_poll(struct usbd_bus *bus) 1625 { 1626 ohci_softc_t *sc = (ohci_softc_t *)bus; 1627 #ifdef OHCI_DEBUG 1628 static int last; 1629 int new; 1630 new = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1631 if (new != last) { 1632 DPRINTFN(10,("ohci_poll: intrs=0x%04x\n", new)); 1633 last = new; 1634 } 1635 #endif 1636 1637 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) 1638 ohci_intr1(sc); 1639 } 1640 1641 usbd_status 1642 ohci_device_request(usbd_xfer_handle xfer) 1643 { 1644 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1645 usb_device_request_t *req = &xfer->request; 1646 usbd_device_handle dev = opipe->pipe.device; 1647 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1648 int addr = dev->address; 1649 ohci_soft_td_t *setup, *stat, *next, *tail; 1650 ohci_soft_ed_t *sed; 1651 int isread; 1652 int len; 1653 usbd_status err; 1654 int s; 1655 1656 isread = req->bmRequestType & UT_READ; 1657 len = UGETW(req->wLength); 1658 1659 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 1660 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 1661 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1662 UGETW(req->wIndex), len, addr, 1663 opipe->pipe.endpoint->edesc->bEndpointAddress)); 1664 1665 setup = opipe->tail.td; 1666 stat = ohci_alloc_std(sc); 1667 if (stat == NULL) { 1668 err = USBD_NOMEM; 1669 goto bad1; 1670 } 1671 tail = ohci_alloc_std(sc); 1672 if (tail == NULL) { 1673 err = USBD_NOMEM; 1674 goto bad2; 1675 } 1676 tail->xfer = NULL; 1677 1678 sed = opipe->sed; 1679 opipe->u.ctl.length = len; 1680 1681 /* Update device address and length since they may have changed 1682 during the setup of the control pipe in usbd_new_device(). */ 1683 /* XXX This only needs to be done once, but it's too early in open. */ 1684 /* XXXX Should not touch ED here! */ 1685 sed->ed.ed_flags = HTOO32( 1686 (O32TOH(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) | 1687 OHCI_ED_SET_FA(addr) | 1688 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize))); 1689 1690 next = stat; 1691 1692 /* Set up data transaction */ 1693 if (len != 0) { 1694 ohci_soft_td_t *std = stat; 1695 1696 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 1697 std, &stat); 1698 stat = stat->nexttd; /* point at free TD */ 1699 if (err) 1700 goto bad3; 1701 /* Start toggle at 1 and then use the carried toggle. */ 1702 std->td.td_flags &= HTOO32(~OHCI_TD_TOGGLE_MASK); 1703 std->td.td_flags |= HTOO32(OHCI_TD_TOGGLE_1); 1704 } 1705 1706 memcpy(KERNADDR(&opipe->u.ctl.reqdma, 0), req, sizeof *req); 1707 1708 setup->td.td_flags = HTOO32(OHCI_TD_SETUP | OHCI_TD_NOCC | 1709 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1710 setup->td.td_cbp = HTOO32(DMAADDR(&opipe->u.ctl.reqdma, 0)); 1711 setup->nexttd = next; 1712 setup->td.td_nexttd = HTOO32(next->physaddr); 1713 setup->td.td_be = HTOO32(O32TOH(setup->td.td_cbp) + sizeof *req - 1); 1714 setup->len = 0; 1715 setup->xfer = xfer; 1716 setup->flags = 0; 1717 xfer->hcpriv = setup; 1718 1719 stat->td.td_flags = HTOO32( 1720 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | 1721 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1722 stat->td.td_cbp = 0; 1723 stat->nexttd = tail; 1724 stat->td.td_nexttd = HTOO32(tail->physaddr); 1725 stat->td.td_be = 0; 1726 stat->flags = OHCI_CALL_DONE; 1727 stat->len = 0; 1728 stat->xfer = xfer; 1729 1730 #ifdef OHCI_DEBUG 1731 if (ohcidebug > 5) { 1732 DPRINTF(("ohci_device_request:\n")); 1733 ohci_dump_ed(sc, sed); 1734 ohci_dump_tds(sc, setup); 1735 } 1736 #endif 1737 1738 /* Insert ED in schedule */ 1739 s = splusb(); 1740 sed->ed.ed_tailp = HTOO32(tail->physaddr); 1741 opipe->tail.td = tail; 1742 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1743 if (xfer->timeout && !sc->sc_bus.use_polling) { 1744 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 1745 ohci_timeout, xfer); 1746 } 1747 splx(s); 1748 1749 #ifdef OHCI_DEBUG 1750 if (ohcidebug > 20) { 1751 delay(10000); 1752 DPRINTF(("ohci_device_request: status=%x\n", 1753 OREAD4(sc, OHCI_COMMAND_STATUS))); 1754 ohci_dumpregs(sc); 1755 printf("ctrl head:\n"); 1756 ohci_dump_ed(sc, sc->sc_ctrl_head); 1757 printf("sed:\n"); 1758 ohci_dump_ed(sc, sed); 1759 ohci_dump_tds(sc, setup); 1760 } 1761 #endif 1762 1763 return (USBD_NORMAL_COMPLETION); 1764 1765 bad3: 1766 ohci_free_std(sc, tail); 1767 bad2: 1768 ohci_free_std(sc, stat); 1769 bad1: 1770 return (err); 1771 } 1772 1773 /* 1774 * Add an ED to the schedule. Called at splusb(). 1775 */ 1776 void 1777 ohci_add_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1778 { 1779 DPRINTFN(8,("ohci_add_ed: sed=%p head=%p\n", sed, head)); 1780 1781 SPLUSBCHECK; 1782 sed->next = head->next; 1783 sed->ed.ed_nexted = head->ed.ed_nexted; 1784 head->next = sed; 1785 head->ed.ed_nexted = HTOO32(sed->physaddr); 1786 } 1787 1788 /* 1789 * Remove an ED from the schedule. Called at splusb(). 1790 */ 1791 void 1792 ohci_rem_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1793 { 1794 ohci_soft_ed_t *p; 1795 1796 SPLUSBCHECK; 1797 1798 /* XXX */ 1799 for (p = head; p != NULL && p->next != sed; p = p->next) 1800 ; 1801 if (p == NULL) 1802 panic("ohci_rem_ed: ED not found"); 1803 p->next = sed->next; 1804 p->ed.ed_nexted = sed->ed.ed_nexted; 1805 } 1806 1807 /* 1808 * When a transfer is completed the TD is added to the done queue by 1809 * the host controller. This queue is the processed by software. 1810 * Unfortunately the queue contains the physical address of the TD 1811 * and we have no simple way to translate this back to a kernel address. 1812 * To make the translation possible (and fast) we use a hash table of 1813 * TDs currently in the schedule. The physical address is used as the 1814 * hash value. 1815 */ 1816 1817 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1818 /* Called at splusb() */ 1819 void 1820 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1821 { 1822 int h = HASH(std->physaddr); 1823 1824 SPLUSBCHECK; 1825 1826 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1827 } 1828 1829 /* Called at splusb() */ 1830 void 1831 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1832 { 1833 SPLUSBCHECK; 1834 1835 LIST_REMOVE(std, hnext); 1836 } 1837 1838 ohci_soft_td_t * 1839 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a) 1840 { 1841 int h = HASH(a); 1842 ohci_soft_td_t *std; 1843 1844 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1845 std != NULL; 1846 std = LIST_NEXT(std, hnext)) 1847 if (std->physaddr == a) 1848 return (std); 1849 return (NULL); 1850 } 1851 1852 /* Called at splusb() */ 1853 void 1854 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1855 { 1856 int h = HASH(sitd->physaddr); 1857 1858 SPLUSBCHECK; 1859 1860 DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n", 1861 sitd, (u_long)sitd->physaddr)); 1862 1863 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext); 1864 } 1865 1866 /* Called at splusb() */ 1867 void 1868 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1869 { 1870 SPLUSBCHECK; 1871 1872 DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n", 1873 sitd, (u_long)sitd->physaddr)); 1874 1875 LIST_REMOVE(sitd, hnext); 1876 } 1877 1878 ohci_soft_itd_t * 1879 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a) 1880 { 1881 int h = HASH(a); 1882 ohci_soft_itd_t *sitd; 1883 1884 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]); 1885 sitd != NULL; 1886 sitd = LIST_NEXT(sitd, hnext)) 1887 if (sitd->physaddr == a) 1888 return (sitd); 1889 return (NULL); 1890 } 1891 1892 void 1893 ohci_timeout(void *addr) 1894 { 1895 struct ohci_xfer *oxfer = addr; 1896 struct ohci_pipe *opipe = (struct ohci_pipe *)oxfer->xfer.pipe; 1897 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1898 1899 DPRINTF(("ohci_timeout: oxfer=%p\n", oxfer)); 1900 1901 if (sc->sc_dying) { 1902 ohci_abort_xfer(&oxfer->xfer, USBD_TIMEOUT); 1903 return; 1904 } 1905 1906 /* Execute the abort in a process context. */ 1907 usb_init_task(&oxfer->abort_task, ohci_timeout_task, addr); 1908 usb_add_task(oxfer->xfer.pipe->device, &oxfer->abort_task, 1909 USB_TASKQ_HC); 1910 } 1911 1912 void 1913 ohci_timeout_task(void *addr) 1914 { 1915 usbd_xfer_handle xfer = addr; 1916 int s; 1917 1918 DPRINTF(("ohci_timeout_task: xfer=%p\n", xfer)); 1919 1920 s = splusb(); 1921 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1922 splx(s); 1923 } 1924 1925 #ifdef OHCI_DEBUG 1926 void 1927 ohci_dump_tds(ohci_softc_t *sc, ohci_soft_td_t *std) 1928 { 1929 for (; std; std = std->nexttd) 1930 ohci_dump_td(sc, std); 1931 } 1932 1933 void 1934 ohci_dump_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1935 { 1936 char sbuf[128]; 1937 1938 bitmask_snprintf((u_int32_t)O32TOH(std->td.td_flags), 1939 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 1940 sbuf, sizeof(sbuf)); 1941 1942 printf("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx " 1943 "nexttd=0x%08lx be=0x%08lx\n", 1944 std, (u_long)std->physaddr, sbuf, 1945 OHCI_TD_GET_DI(O32TOH(std->td.td_flags)), 1946 OHCI_TD_GET_EC(O32TOH(std->td.td_flags)), 1947 OHCI_TD_GET_CC(O32TOH(std->td.td_flags)), 1948 (u_long)O32TOH(std->td.td_cbp), 1949 (u_long)O32TOH(std->td.td_nexttd), 1950 (u_long)O32TOH(std->td.td_be)); 1951 } 1952 1953 void 1954 ohci_dump_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1955 { 1956 int i; 1957 1958 printf("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n" 1959 "bp0=0x%08lx next=0x%08lx be=0x%08lx\n", 1960 sitd, (u_long)sitd->physaddr, 1961 OHCI_ITD_GET_SF(O32TOH(sitd->itd.itd_flags)), 1962 OHCI_ITD_GET_DI(O32TOH(sitd->itd.itd_flags)), 1963 OHCI_ITD_GET_FC(O32TOH(sitd->itd.itd_flags)), 1964 OHCI_ITD_GET_CC(O32TOH(sitd->itd.itd_flags)), 1965 (u_long)O32TOH(sitd->itd.itd_bp0), 1966 (u_long)O32TOH(sitd->itd.itd_nextitd), 1967 (u_long)O32TOH(sitd->itd.itd_be)); 1968 for (i = 0; i < OHCI_ITD_NOFFSET; i++) 1969 printf("offs[%d]=0x%04x ", i, 1970 (u_int)O16TOH(sitd->itd.itd_offset[i])); 1971 printf("\n"); 1972 } 1973 1974 void 1975 ohci_dump_itds(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1976 { 1977 for (; sitd; sitd = sitd->nextitd) 1978 ohci_dump_itd(sc, sitd); 1979 } 1980 1981 void 1982 ohci_dump_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 1983 { 1984 char sbuf[128], sbuf2[128]; 1985 1986 bitmask_snprintf((u_int32_t)O32TOH(sed->ed.ed_flags), 1987 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO", 1988 sbuf, sizeof(sbuf)); 1989 bitmask_snprintf((u_int32_t)O32TOH(sed->ed.ed_headp), 1990 "\20\1HALT\2CARRY", sbuf2, sizeof(sbuf2)); 1991 1992 printf("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d flags=%s\ntailp=0x%08lx " 1993 "headflags=%s headp=0x%08lx nexted=0x%08lx\n", 1994 sed, (u_long)sed->physaddr, 1995 OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)), 1996 OHCI_ED_GET_EN(O32TOH(sed->ed.ed_flags)), 1997 OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)), sbuf, 1998 (u_long)O32TOH(sed->ed.ed_tailp), sbuf2, 1999 (u_long)O32TOH(sed->ed.ed_headp), 2000 (u_long)O32TOH(sed->ed.ed_nexted)); 2001 } 2002 #endif 2003 2004 usbd_status 2005 ohci_open(usbd_pipe_handle pipe) 2006 { 2007 usbd_device_handle dev = pipe->device; 2008 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2009 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 2010 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2011 u_int8_t addr = dev->address; 2012 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 2013 ohci_soft_ed_t *sed; 2014 ohci_soft_td_t *std; 2015 ohci_soft_itd_t *sitd; 2016 ohci_physaddr_t tdphys; 2017 u_int32_t fmt; 2018 usbd_status err; 2019 int s; 2020 int ival; 2021 2022 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 2023 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 2024 2025 if (sc->sc_dying) 2026 return (USBD_IOERROR); 2027 2028 std = NULL; 2029 sed = NULL; 2030 2031 if (addr == sc->sc_addr) { 2032 switch (ed->bEndpointAddress) { 2033 case USB_CONTROL_ENDPOINT: 2034 pipe->methods = &ohci_root_ctrl_methods; 2035 break; 2036 case UE_DIR_IN | OHCI_INTR_ENDPT: 2037 pipe->methods = &ohci_root_intr_methods; 2038 break; 2039 default: 2040 return (USBD_INVAL); 2041 } 2042 } else { 2043 sed = ohci_alloc_sed(sc); 2044 if (sed == NULL) 2045 goto bad0; 2046 opipe->sed = sed; 2047 if (xfertype == UE_ISOCHRONOUS) { 2048 sitd = ohci_alloc_sitd(sc); 2049 if (sitd == NULL) 2050 goto bad1; 2051 opipe->tail.itd = sitd; 2052 tdphys = sitd->physaddr; 2053 fmt = OHCI_ED_FORMAT_ISO; 2054 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 2055 fmt |= OHCI_ED_DIR_IN; 2056 else 2057 fmt |= OHCI_ED_DIR_OUT; 2058 } else { 2059 std = ohci_alloc_std(sc); 2060 if (std == NULL) 2061 goto bad1; 2062 opipe->tail.td = std; 2063 tdphys = std->physaddr; 2064 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD; 2065 } 2066 sed->ed.ed_flags = HTOO32( 2067 OHCI_ED_SET_FA(addr) | 2068 OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) | 2069 (dev->speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) | 2070 fmt | 2071 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 2072 sed->ed.ed_headp = sed->ed.ed_tailp = HTOO32(tdphys); 2073 2074 switch (xfertype) { 2075 case UE_CONTROL: 2076 pipe->methods = &ohci_device_ctrl_methods; 2077 err = usb_allocmem(&sc->sc_bus, 2078 sizeof(usb_device_request_t), 2079 0, &opipe->u.ctl.reqdma); 2080 if (err) 2081 goto bad; 2082 s = splusb(); 2083 ohci_add_ed(sc, sed, sc->sc_ctrl_head); 2084 splx(s); 2085 break; 2086 case UE_INTERRUPT: 2087 pipe->methods = &ohci_device_intr_methods; 2088 ival = pipe->interval; 2089 if (ival == USBD_DEFAULT_INTERVAL) 2090 ival = ed->bInterval; 2091 return (ohci_device_setintr(sc, opipe, ival)); 2092 case UE_ISOCHRONOUS: 2093 pipe->methods = &ohci_device_isoc_methods; 2094 return (ohci_setup_isoc(pipe)); 2095 case UE_BULK: 2096 pipe->methods = &ohci_device_bulk_methods; 2097 s = splusb(); 2098 ohci_add_ed(sc, sed, sc->sc_bulk_head); 2099 splx(s); 2100 break; 2101 } 2102 } 2103 return (USBD_NORMAL_COMPLETION); 2104 2105 bad: 2106 if (std != NULL) 2107 ohci_free_std(sc, std); 2108 bad1: 2109 if (sed != NULL) 2110 ohci_free_sed(sc, sed); 2111 bad0: 2112 return (USBD_NOMEM); 2113 2114 } 2115 2116 /* 2117 * Close a reqular pipe. 2118 * Assumes that there are no pending transactions. 2119 */ 2120 void 2121 ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head) 2122 { 2123 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2124 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2125 ohci_soft_ed_t *sed = opipe->sed; 2126 int s; 2127 2128 s = splusb(); 2129 #ifdef DIAGNOSTIC 2130 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 2131 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2132 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) { 2133 ohci_soft_td_t *std; 2134 std = ohci_hash_find_td(sc, O32TOH(sed->ed.ed_headp)); 2135 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 2136 "tl=0x%x pipe=%p, std=%p\n", sed, 2137 (int)O32TOH(sed->ed.ed_headp), 2138 (int)O32TOH(sed->ed.ed_tailp), 2139 pipe, std); 2140 #ifdef USB_DEBUG 2141 usbd_dump_pipe(&opipe->pipe); 2142 #endif 2143 #ifdef OHCI_DEBUG 2144 ohci_dump_ed(sc, sed); 2145 if (std) 2146 ohci_dump_td(sc, std); 2147 #endif 2148 usb_delay_ms(&sc->sc_bus, 2); 2149 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2150 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) 2151 printf("ohci_close_pipe: pipe still not empty\n"); 2152 } 2153 #endif 2154 ohci_rem_ed(sed, head); 2155 /* Make sure the host controller is not touching this ED */ 2156 usb_delay_ms(&sc->sc_bus, 1); 2157 splx(s); 2158 ohci_free_sed(sc, opipe->sed); 2159 } 2160 2161 /* 2162 * Abort a device request. 2163 * If this routine is called at splusb() it guarantees that the request 2164 * will be removed from the hardware scheduling and that the callback 2165 * for it will be called with USBD_CANCELLED status. 2166 * It's impossible to guarantee that the requested transfer will not 2167 * have happened since the hardware runs concurrently. 2168 * If the transaction has already happened we rely on the ordinary 2169 * interrupt processing to process it. 2170 */ 2171 void 2172 ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2173 { 2174 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2175 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 2176 ohci_soft_ed_t *sed = opipe->sed; 2177 ohci_soft_td_t *p, *n; 2178 ohci_physaddr_t headp; 2179 int s, hit; 2180 int wake; 2181 2182 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p sed=%p\n", xfer, opipe,sed)); 2183 2184 if (sc->sc_dying) { 2185 /* If we're dying, just do the software part. */ 2186 s = splusb(); 2187 xfer->status = status; /* make software ignore it */ 2188 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 2189 usb_transfer_complete(xfer); 2190 splx(s); 2191 return; 2192 } 2193 2194 if (xfer->device->bus->intr_context || !curproc) 2195 panic("ohci_abort_xfer: not in process context"); 2196 2197 /* 2198 * If an abort is already in progress then just wait for it to 2199 * complete and return. 2200 */ 2201 if (xfer->hcflags & UXFER_ABORTING) { 2202 DPRINTFN(2, ("ohci_abort_xfer: already aborting\n")); 2203 #ifdef DIAGNOSTIC 2204 if (status == USBD_TIMEOUT) 2205 printf("0hci_abort_xfer: TIMEOUT while aborting\n"); 2206 #endif 2207 /* Override the status which might be USBD_TIMEOUT. */ 2208 xfer->status = status; 2209 DPRINTFN(2, ("ohci_abort_xfer: waiting for abort to finish\n")); 2210 xfer->hcflags |= UXFER_ABORTWAIT; 2211 while (xfer->hcflags & UXFER_ABORTING) 2212 tsleep(&xfer->hcflags, PZERO, "ohciaw", 0); 2213 return; 2214 } 2215 xfer->hcflags |= UXFER_ABORTING; 2216 2217 /* 2218 * Step 1: Make interrupt routine and hardware ignore xfer. 2219 */ 2220 s = splusb(); 2221 xfer->status = status; /* make software ignore it */ 2222 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 2223 splx(s); 2224 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed)); 2225 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */ 2226 2227 /* 2228 * Step 2: Wait until we know hardware has finished any possible 2229 * use of the xfer. Also make sure the soft interrupt routine 2230 * has run. 2231 */ 2232 usb_delay_ms(opipe->pipe.device->bus, 20); /* Hardware finishes in 1ms */ 2233 s = splusb(); 2234 #ifdef USB_USE_SOFTINTR 2235 sc->sc_softwake = 1; 2236 #endif /* USB_USE_SOFTINTR */ 2237 usb_schedsoftintr(&sc->sc_bus); 2238 #ifdef USB_USE_SOFTINTR 2239 tsleep(&sc->sc_softwake, PZERO, "ohciab", 0); 2240 #endif /* USB_USE_SOFTINTR */ 2241 splx(s); 2242 2243 /* 2244 * Step 3: Remove any vestiges of the xfer from the hardware. 2245 * The complication here is that the hardware may have executed 2246 * beyond the xfer we're trying to abort. So as we're scanning 2247 * the TDs of this xfer we check if the hardware points to 2248 * any of them. 2249 */ 2250 s = splusb(); /* XXX why? */ 2251 p = xfer->hcpriv; 2252 #ifdef DIAGNOSTIC 2253 if (p == NULL) { 2254 xfer->hcflags &= ~UXFER_ABORTING; /* XXX */ 2255 splx(s); 2256 printf("ohci_abort_xfer: hcpriv is NULL\n"); 2257 return; 2258 } 2259 #endif 2260 #ifdef OHCI_DEBUG 2261 if (ohcidebug > 1) { 2262 DPRINTF(("ohci_abort_xfer: sed=\n")); 2263 ohci_dump_ed(sc, sed); 2264 ohci_dump_tds(sc, p); 2265 } 2266 #endif 2267 headp = O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK; 2268 hit = 0; 2269 for (; p->xfer == xfer; p = n) { 2270 hit |= headp == p->physaddr; 2271 n = p->nexttd; 2272 ohci_free_std(sc, p); 2273 } 2274 /* Zap headp register if hardware pointed inside the xfer. */ 2275 if (hit) { 2276 DPRINTFN(1,("ohci_abort_xfer: set hd=0x%08x, tl=0x%08x\n", 2277 (int)p->physaddr, (int)O32TOH(sed->ed.ed_tailp))); 2278 sed->ed.ed_headp = HTOO32(p->physaddr); /* unlink TDs */ 2279 } else { 2280 DPRINTFN(1,("ohci_abort_xfer: no hit\n")); 2281 } 2282 2283 /* 2284 * Step 4: Turn on hardware again. 2285 */ 2286 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */ 2287 2288 /* 2289 * Step 5: Execute callback. 2290 */ 2291 wake = xfer->hcflags & UXFER_ABORTWAIT; 2292 xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT); 2293 usb_transfer_complete(xfer); 2294 if (wake) 2295 wakeup(&xfer->hcflags); 2296 2297 splx(s); 2298 } 2299 2300 /* 2301 * Data structures and routines to emulate the root hub. 2302 */ 2303 Static usb_device_descriptor_t ohci_devd = { 2304 USB_DEVICE_DESCRIPTOR_SIZE, 2305 UDESC_DEVICE, /* type */ 2306 {0x00, 0x01}, /* USB version */ 2307 UDCLASS_HUB, /* class */ 2308 UDSUBCLASS_HUB, /* subclass */ 2309 UDPROTO_FSHUB, 2310 64, /* max packet */ 2311 {0},{0},{0x00,0x01}, /* device id */ 2312 1,2,0, /* string indicies */ 2313 1 /* # of configurations */ 2314 }; 2315 2316 Static const usb_config_descriptor_t ohci_confd = { 2317 USB_CONFIG_DESCRIPTOR_SIZE, 2318 UDESC_CONFIG, 2319 {USB_CONFIG_DESCRIPTOR_SIZE + 2320 USB_INTERFACE_DESCRIPTOR_SIZE + 2321 USB_ENDPOINT_DESCRIPTOR_SIZE}, 2322 1, 2323 1, 2324 0, 2325 UC_ATTR_MBO | UC_SELF_POWERED, 2326 0 /* max power */ 2327 }; 2328 2329 Static const usb_interface_descriptor_t ohci_ifcd = { 2330 USB_INTERFACE_DESCRIPTOR_SIZE, 2331 UDESC_INTERFACE, 2332 0, 2333 0, 2334 1, 2335 UICLASS_HUB, 2336 UISUBCLASS_HUB, 2337 UIPROTO_FSHUB, 2338 0 2339 }; 2340 2341 Static const usb_endpoint_descriptor_t ohci_endpd = { 2342 .bLength = USB_ENDPOINT_DESCRIPTOR_SIZE, 2343 .bDescriptorType = UDESC_ENDPOINT, 2344 .bEndpointAddress = UE_DIR_IN | OHCI_INTR_ENDPT, 2345 .bmAttributes = UE_INTERRUPT, 2346 .wMaxPacketSize = {8, 0}, /* max packet */ 2347 .bInterval = 255, 2348 }; 2349 2350 Static const usb_hub_descriptor_t ohci_hubd = { 2351 .bDescLength = USB_HUB_DESCRIPTOR_SIZE, 2352 .bDescriptorType = UDESC_HUB, 2353 }; 2354 2355 Static int 2356 ohci_str(usb_string_descriptor_t *p, int l, const char *s) 2357 { 2358 int i; 2359 2360 if (l == 0) 2361 return (0); 2362 p->bLength = 2 * strlen(s) + 2; 2363 if (l == 1) 2364 return (1); 2365 p->bDescriptorType = UDESC_STRING; 2366 l -= 2; 2367 for (i = 0; s[i] && l > 1; i++, l -= 2) 2368 USETW2(p->bString[i], 0, s[i]); 2369 return (2*i+2); 2370 } 2371 2372 /* 2373 * Simulate a hardware hub by handling all the necessary requests. 2374 */ 2375 Static usbd_status 2376 ohci_root_ctrl_transfer(usbd_xfer_handle xfer) 2377 { 2378 usbd_status err; 2379 2380 /* Insert last in queue. */ 2381 err = usb_insert_transfer(xfer); 2382 if (err) 2383 return (err); 2384 2385 /* Pipe isn't running, start first */ 2386 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2387 } 2388 2389 Static usbd_status 2390 ohci_root_ctrl_start(usbd_xfer_handle xfer) 2391 { 2392 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2393 usb_device_request_t *req; 2394 void *buf = NULL; 2395 int port, i; 2396 int s, len, value, index, l, totlen = 0; 2397 usb_port_status_t ps; 2398 usb_hub_descriptor_t hubd; 2399 usbd_status err; 2400 u_int32_t v; 2401 2402 if (sc->sc_dying) 2403 return (USBD_IOERROR); 2404 2405 #ifdef DIAGNOSTIC 2406 if (!(xfer->rqflags & URQ_REQUEST)) 2407 /* XXX panic */ 2408 return (USBD_INVAL); 2409 #endif 2410 req = &xfer->request; 2411 2412 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 2413 req->bmRequestType, req->bRequest)); 2414 2415 len = UGETW(req->wLength); 2416 value = UGETW(req->wValue); 2417 index = UGETW(req->wIndex); 2418 2419 if (len != 0) 2420 buf = KERNADDR(&xfer->dmabuf, 0); 2421 2422 #define C(x,y) ((x) | ((y) << 8)) 2423 switch(C(req->bRequest, req->bmRequestType)) { 2424 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 2425 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 2426 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 2427 /* 2428 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 2429 * for the integrated root hub. 2430 */ 2431 break; 2432 case C(UR_GET_CONFIG, UT_READ_DEVICE): 2433 if (len > 0) { 2434 *(u_int8_t *)buf = sc->sc_conf; 2435 totlen = 1; 2436 } 2437 break; 2438 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2439 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 2440 if (len == 0) 2441 break; 2442 switch(value >> 8) { 2443 case UDESC_DEVICE: 2444 if ((value & 0xff) != 0) { 2445 err = USBD_IOERROR; 2446 goto ret; 2447 } 2448 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 2449 USETW(ohci_devd.idVendor, sc->sc_id_vendor); 2450 memcpy(buf, &ohci_devd, l); 2451 break; 2452 case UDESC_CONFIG: 2453 if ((value & 0xff) != 0) { 2454 err = USBD_IOERROR; 2455 goto ret; 2456 } 2457 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 2458 memcpy(buf, &ohci_confd, l); 2459 buf = (char *)buf + l; 2460 len -= l; 2461 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 2462 totlen += l; 2463 memcpy(buf, &ohci_ifcd, l); 2464 buf = (char *)buf + l; 2465 len -= l; 2466 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 2467 totlen += l; 2468 memcpy(buf, &ohci_endpd, l); 2469 break; 2470 case UDESC_STRING: 2471 *(u_int8_t *)buf = 0; 2472 totlen = 1; 2473 switch (value & 0xff) { 2474 case 0: /* Language table */ 2475 if (len > 0) 2476 *(u_int8_t *)buf = 4; 2477 if (len >= 4) { 2478 USETW(((usb_string_descriptor_t *)buf)->bString[0], 0x0409); 2479 totlen = 4; 2480 } 2481 break; 2482 case 1: /* Vendor */ 2483 totlen = ohci_str(buf, len, sc->sc_vendor); 2484 break; 2485 case 2: /* Product */ 2486 totlen = ohci_str(buf, len, "OHCI root hub"); 2487 break; 2488 } 2489 break; 2490 default: 2491 err = USBD_IOERROR; 2492 goto ret; 2493 } 2494 break; 2495 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 2496 if (len > 0) { 2497 *(u_int8_t *)buf = 0; 2498 totlen = 1; 2499 } 2500 break; 2501 case C(UR_GET_STATUS, UT_READ_DEVICE): 2502 if (len > 1) { 2503 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 2504 totlen = 2; 2505 } 2506 break; 2507 case C(UR_GET_STATUS, UT_READ_INTERFACE): 2508 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 2509 if (len > 1) { 2510 USETW(((usb_status_t *)buf)->wStatus, 0); 2511 totlen = 2; 2512 } 2513 break; 2514 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 2515 if (value >= USB_MAX_DEVICES) { 2516 err = USBD_IOERROR; 2517 goto ret; 2518 } 2519 sc->sc_addr = value; 2520 break; 2521 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 2522 if (value != 0 && value != 1) { 2523 err = USBD_IOERROR; 2524 goto ret; 2525 } 2526 sc->sc_conf = value; 2527 break; 2528 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 2529 break; 2530 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 2531 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 2532 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 2533 err = USBD_IOERROR; 2534 goto ret; 2535 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 2536 break; 2537 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 2538 break; 2539 /* Hub requests */ 2540 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2541 break; 2542 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2543 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 2544 "port=%d feature=%d\n", 2545 index, value)); 2546 if (index < 1 || index > sc->sc_noport) { 2547 err = USBD_IOERROR; 2548 goto ret; 2549 } 2550 port = OHCI_RH_PORT_STATUS(index); 2551 switch(value) { 2552 case UHF_PORT_ENABLE: 2553 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2554 break; 2555 case UHF_PORT_SUSPEND: 2556 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2557 break; 2558 case UHF_PORT_POWER: 2559 /* Yes, writing to the LOW_SPEED bit clears power. */ 2560 OWRITE4(sc, port, UPS_LOW_SPEED); 2561 break; 2562 case UHF_C_PORT_CONNECTION: 2563 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2564 break; 2565 case UHF_C_PORT_ENABLE: 2566 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2567 break; 2568 case UHF_C_PORT_SUSPEND: 2569 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2570 break; 2571 case UHF_C_PORT_OVER_CURRENT: 2572 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2573 break; 2574 case UHF_C_PORT_RESET: 2575 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2576 break; 2577 default: 2578 err = USBD_IOERROR; 2579 goto ret; 2580 } 2581 switch(value) { 2582 case UHF_C_PORT_CONNECTION: 2583 case UHF_C_PORT_ENABLE: 2584 case UHF_C_PORT_SUSPEND: 2585 case UHF_C_PORT_OVER_CURRENT: 2586 case UHF_C_PORT_RESET: 2587 /* Enable RHSC interrupt if condition is cleared. */ 2588 if ((OREAD4(sc, port) >> 16) == 0) 2589 ohci_rhsc_enable(sc); 2590 break; 2591 default: 2592 break; 2593 } 2594 break; 2595 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2596 if (len == 0) 2597 break; 2598 if ((value & 0xff) != 0) { 2599 err = USBD_IOERROR; 2600 goto ret; 2601 } 2602 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2603 hubd = ohci_hubd; 2604 hubd.bNbrPorts = sc->sc_noport; 2605 USETW(hubd.wHubCharacteristics, 2606 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2607 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2608 /* XXX overcurrent */ 2609 ); 2610 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2611 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2612 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2613 hubd.DeviceRemovable[i++] = (u_int8_t)v; 2614 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2615 l = min(len, hubd.bDescLength); 2616 totlen = l; 2617 memcpy(buf, &hubd, l); 2618 break; 2619 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2620 if (len != 4) { 2621 err = USBD_IOERROR; 2622 goto ret; 2623 } 2624 memset(buf, 0, len); /* ? XXX */ 2625 totlen = len; 2626 break; 2627 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2628 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 2629 index)); 2630 if (index < 1 || index > sc->sc_noport) { 2631 err = USBD_IOERROR; 2632 goto ret; 2633 } 2634 if (len != 4) { 2635 err = USBD_IOERROR; 2636 goto ret; 2637 } 2638 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2639 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 2640 v)); 2641 USETW(ps.wPortStatus, v); 2642 USETW(ps.wPortChange, v >> 16); 2643 l = min(len, sizeof ps); 2644 memcpy(buf, &ps, l); 2645 totlen = l; 2646 break; 2647 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2648 err = USBD_IOERROR; 2649 goto ret; 2650 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2651 break; 2652 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2653 if (index < 1 || index > sc->sc_noport) { 2654 err = USBD_IOERROR; 2655 goto ret; 2656 } 2657 port = OHCI_RH_PORT_STATUS(index); 2658 switch(value) { 2659 case UHF_PORT_ENABLE: 2660 OWRITE4(sc, port, UPS_PORT_ENABLED); 2661 break; 2662 case UHF_PORT_SUSPEND: 2663 OWRITE4(sc, port, UPS_SUSPEND); 2664 break; 2665 case UHF_PORT_RESET: 2666 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 2667 index)); 2668 OWRITE4(sc, port, UPS_RESET); 2669 for (i = 0; i < 5; i++) { 2670 usb_delay_ms(&sc->sc_bus, 2671 USB_PORT_ROOT_RESET_DELAY); 2672 if (sc->sc_dying) { 2673 err = USBD_IOERROR; 2674 goto ret; 2675 } 2676 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2677 break; 2678 } 2679 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 2680 index, OREAD4(sc, port))); 2681 break; 2682 case UHF_PORT_POWER: 2683 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 2684 "%d\n", index)); 2685 OWRITE4(sc, port, UPS_PORT_POWER); 2686 break; 2687 default: 2688 err = USBD_IOERROR; 2689 goto ret; 2690 } 2691 break; 2692 default: 2693 err = USBD_IOERROR; 2694 goto ret; 2695 } 2696 xfer->actlen = totlen; 2697 err = USBD_NORMAL_COMPLETION; 2698 ret: 2699 xfer->status = err; 2700 s = splusb(); 2701 usb_transfer_complete(xfer); 2702 splx(s); 2703 return (USBD_IN_PROGRESS); 2704 } 2705 2706 /* Abort a root control request. */ 2707 Static void 2708 ohci_root_ctrl_abort(usbd_xfer_handle xfer) 2709 { 2710 /* Nothing to do, all transfers are synchronous. */ 2711 } 2712 2713 /* Close the root pipe. */ 2714 Static void 2715 ohci_root_ctrl_close(usbd_pipe_handle pipe) 2716 { 2717 DPRINTF(("ohci_root_ctrl_close\n")); 2718 /* Nothing to do. */ 2719 } 2720 2721 Static usbd_status 2722 ohci_root_intr_transfer(usbd_xfer_handle xfer) 2723 { 2724 usbd_status err; 2725 2726 /* Insert last in queue. */ 2727 err = usb_insert_transfer(xfer); 2728 if (err) 2729 return (err); 2730 2731 /* Pipe isn't running, start first */ 2732 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2733 } 2734 2735 Static usbd_status 2736 ohci_root_intr_start(usbd_xfer_handle xfer) 2737 { 2738 usbd_pipe_handle pipe = xfer->pipe; 2739 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2740 2741 if (sc->sc_dying) 2742 return (USBD_IOERROR); 2743 2744 sc->sc_intrxfer = xfer; 2745 2746 return (USBD_IN_PROGRESS); 2747 } 2748 2749 /* Abort a root interrupt request. */ 2750 Static void 2751 ohci_root_intr_abort(usbd_xfer_handle xfer) 2752 { 2753 int s; 2754 2755 if (xfer->pipe->intrxfer == xfer) { 2756 DPRINTF(("ohci_root_intr_abort: remove\n")); 2757 xfer->pipe->intrxfer = NULL; 2758 } 2759 xfer->status = USBD_CANCELLED; 2760 s = splusb(); 2761 usb_transfer_complete(xfer); 2762 splx(s); 2763 } 2764 2765 /* Close the root pipe. */ 2766 Static void 2767 ohci_root_intr_close(usbd_pipe_handle pipe) 2768 { 2769 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2770 2771 DPRINTF(("ohci_root_intr_close\n")); 2772 2773 sc->sc_intrxfer = NULL; 2774 } 2775 2776 /************************/ 2777 2778 Static usbd_status 2779 ohci_device_ctrl_transfer(usbd_xfer_handle xfer) 2780 { 2781 usbd_status err; 2782 2783 /* Insert last in queue. */ 2784 err = usb_insert_transfer(xfer); 2785 if (err) 2786 return (err); 2787 2788 /* Pipe isn't running, start first */ 2789 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2790 } 2791 2792 Static usbd_status 2793 ohci_device_ctrl_start(usbd_xfer_handle xfer) 2794 { 2795 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2796 usbd_status err; 2797 2798 if (sc->sc_dying) 2799 return (USBD_IOERROR); 2800 2801 #ifdef DIAGNOSTIC 2802 if (!(xfer->rqflags & URQ_REQUEST)) { 2803 /* XXX panic */ 2804 printf("ohci_device_ctrl_transfer: not a request\n"); 2805 return (USBD_INVAL); 2806 } 2807 #endif 2808 2809 err = ohci_device_request(xfer); 2810 if (err) 2811 return (err); 2812 2813 if (sc->sc_bus.use_polling) 2814 ohci_waitintr(sc, xfer); 2815 return (USBD_IN_PROGRESS); 2816 } 2817 2818 /* Abort a device control request. */ 2819 Static void 2820 ohci_device_ctrl_abort(usbd_xfer_handle xfer) 2821 { 2822 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer)); 2823 ohci_abort_xfer(xfer, USBD_CANCELLED); 2824 } 2825 2826 /* Close a device control pipe. */ 2827 Static void 2828 ohci_device_ctrl_close(usbd_pipe_handle pipe) 2829 { 2830 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2831 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2832 2833 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe)); 2834 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2835 ohci_free_std(sc, opipe->tail.td); 2836 } 2837 2838 /************************/ 2839 2840 Static void 2841 ohci_device_clear_toggle(usbd_pipe_handle pipe) 2842 { 2843 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2844 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2845 2846 opipe->sed->ed.ed_headp &= HTOO32(~OHCI_TOGGLECARRY); 2847 } 2848 2849 Static void 2850 ohci_noop(usbd_pipe_handle pipe) 2851 { 2852 } 2853 2854 Static usbd_status 2855 ohci_device_bulk_transfer(usbd_xfer_handle xfer) 2856 { 2857 usbd_status err; 2858 2859 /* Insert last in queue. */ 2860 err = usb_insert_transfer(xfer); 2861 if (err) 2862 return (err); 2863 2864 /* Pipe isn't running, start first */ 2865 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2866 } 2867 2868 Static usbd_status 2869 ohci_device_bulk_start(usbd_xfer_handle xfer) 2870 { 2871 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2872 usbd_device_handle dev = opipe->pipe.device; 2873 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2874 int addr = dev->address; 2875 ohci_soft_td_t *data, *tail, *tdp; 2876 ohci_soft_ed_t *sed; 2877 int s, len, isread, endpt; 2878 usbd_status err; 2879 2880 if (sc->sc_dying) 2881 return (USBD_IOERROR); 2882 2883 #ifdef DIAGNOSTIC 2884 if (xfer->rqflags & URQ_REQUEST) { 2885 /* XXX panic */ 2886 printf("ohci_device_bulk_start: a request\n"); 2887 return (USBD_INVAL); 2888 } 2889 #endif 2890 2891 len = xfer->length; 2892 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 2893 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2894 sed = opipe->sed; 2895 2896 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d " 2897 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags, 2898 endpt)); 2899 2900 opipe->u.bulk.isread = isread; 2901 opipe->u.bulk.length = len; 2902 2903 /* Update device address */ 2904 sed->ed.ed_flags = HTOO32( 2905 (O32TOH(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) | 2906 OHCI_ED_SET_FA(addr)); 2907 2908 /* Allocate a chain of new TDs (including a new tail). */ 2909 data = opipe->tail.td; 2910 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 2911 data, &tail); 2912 /* We want interrupt at the end of the transfer. */ 2913 tail->td.td_flags &= HTOO32(~OHCI_TD_INTR_MASK); 2914 tail->td.td_flags |= HTOO32(OHCI_TD_SET_DI(1)); 2915 tail->flags |= OHCI_CALL_DONE; 2916 tail = tail->nexttd; /* point at sentinel */ 2917 if (err) 2918 return (err); 2919 2920 tail->xfer = NULL; 2921 xfer->hcpriv = data; 2922 2923 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x " 2924 "td_cbp=0x%08x td_be=0x%08x\n", 2925 (int)O32TOH(sed->ed.ed_flags), 2926 (int)O32TOH(data->td.td_flags), 2927 (int)O32TOH(data->td.td_cbp), 2928 (int)O32TOH(data->td.td_be))); 2929 2930 #ifdef OHCI_DEBUG 2931 if (ohcidebug > 5) { 2932 ohci_dump_ed(sc, sed); 2933 ohci_dump_tds(sc, data); 2934 } 2935 #endif 2936 2937 /* Insert ED in schedule */ 2938 s = splusb(); 2939 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 2940 tdp->xfer = xfer; 2941 } 2942 sed->ed.ed_tailp = HTOO32(tail->physaddr); 2943 opipe->tail.td = tail; 2944 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 2945 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 2946 if (xfer->timeout && !sc->sc_bus.use_polling) { 2947 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2948 ohci_timeout, xfer); 2949 } 2950 2951 #if 0 2952 /* This goes wrong if we are too slow. */ 2953 if (ohcidebug > 10) { 2954 delay(10000); 2955 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2956 OREAD4(sc, OHCI_COMMAND_STATUS))); 2957 ohci_dump_ed(sc, sed); 2958 ohci_dump_tds(sc, data); 2959 } 2960 #endif 2961 2962 splx(s); 2963 2964 return (USBD_IN_PROGRESS); 2965 } 2966 2967 Static void 2968 ohci_device_bulk_abort(usbd_xfer_handle xfer) 2969 { 2970 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer)); 2971 ohci_abort_xfer(xfer, USBD_CANCELLED); 2972 } 2973 2974 /* 2975 * Close a device bulk pipe. 2976 */ 2977 Static void 2978 ohci_device_bulk_close(usbd_pipe_handle pipe) 2979 { 2980 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2981 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2982 2983 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe)); 2984 ohci_close_pipe(pipe, sc->sc_bulk_head); 2985 ohci_free_std(sc, opipe->tail.td); 2986 } 2987 2988 /************************/ 2989 2990 Static usbd_status 2991 ohci_device_intr_transfer(usbd_xfer_handle xfer) 2992 { 2993 usbd_status err; 2994 2995 /* Insert last in queue. */ 2996 err = usb_insert_transfer(xfer); 2997 if (err) 2998 return (err); 2999 3000 /* Pipe isn't running, start first */ 3001 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 3002 } 3003 3004 Static usbd_status 3005 ohci_device_intr_start(usbd_xfer_handle xfer) 3006 { 3007 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3008 usbd_device_handle dev = opipe->pipe.device; 3009 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 3010 ohci_soft_ed_t *sed = opipe->sed; 3011 ohci_soft_td_t *data, *tail; 3012 int s, len, isread, endpt; 3013 3014 if (sc->sc_dying) 3015 return (USBD_IOERROR); 3016 3017 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d " 3018 "flags=%d priv=%p\n", 3019 xfer, xfer->length, xfer->flags, xfer->priv)); 3020 3021 #ifdef DIAGNOSTIC 3022 if (xfer->rqflags & URQ_REQUEST) 3023 panic("ohci_device_intr_transfer: a request"); 3024 #endif 3025 3026 len = xfer->length; 3027 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 3028 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3029 3030 data = opipe->tail.td; 3031 tail = ohci_alloc_std(sc); 3032 if (tail == NULL) 3033 return (USBD_NOMEM); 3034 tail->xfer = NULL; 3035 3036 data->td.td_flags = HTOO32( 3037 isread ? OHCI_TD_IN : OHCI_TD_OUT | 3038 OHCI_TD_NOCC | 3039 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 3040 if (xfer->flags & USBD_SHORT_XFER_OK) 3041 data->td.td_flags |= HTOO32(OHCI_TD_R); 3042 data->td.td_cbp = HTOO32(DMAADDR(&xfer->dmabuf, 0)); 3043 data->nexttd = tail; 3044 data->td.td_nexttd = HTOO32(tail->physaddr); 3045 data->td.td_be = HTOO32(O32TOH(data->td.td_cbp) + len - 1); 3046 data->len = len; 3047 data->xfer = xfer; 3048 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 3049 xfer->hcpriv = data; 3050 3051 #ifdef OHCI_DEBUG 3052 if (ohcidebug > 5) { 3053 DPRINTF(("ohci_device_intr_transfer:\n")); 3054 ohci_dump_ed(sc, sed); 3055 ohci_dump_tds(sc, data); 3056 } 3057 #endif 3058 3059 /* Insert ED in schedule */ 3060 s = splusb(); 3061 sed->ed.ed_tailp = HTOO32(tail->physaddr); 3062 opipe->tail.td = tail; 3063 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3064 3065 #if 0 3066 /* 3067 * This goes horribly wrong, printing thousands of descriptors, 3068 * because false references are followed due to the fact that the 3069 * TD is gone. 3070 */ 3071 if (ohcidebug > 5) { 3072 usb_delay_ms(&sc->sc_bus, 5); 3073 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 3074 OREAD4(sc, OHCI_COMMAND_STATUS))); 3075 ohci_dump_ed(sc, sed); 3076 ohci_dump_tds(sc, data); 3077 } 3078 #endif 3079 splx(s); 3080 3081 return (USBD_IN_PROGRESS); 3082 } 3083 3084 /* Abort a device control request. */ 3085 Static void 3086 ohci_device_intr_abort(usbd_xfer_handle xfer) 3087 { 3088 if (xfer->pipe->intrxfer == xfer) { 3089 DPRINTF(("ohci_device_intr_abort: remove\n")); 3090 xfer->pipe->intrxfer = NULL; 3091 } 3092 ohci_abort_xfer(xfer, USBD_CANCELLED); 3093 } 3094 3095 /* Close a device interrupt pipe. */ 3096 Static void 3097 ohci_device_intr_close(usbd_pipe_handle pipe) 3098 { 3099 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3100 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3101 int nslots = opipe->u.intr.nslots; 3102 int pos = opipe->u.intr.pos; 3103 int j; 3104 ohci_soft_ed_t *p, *sed = opipe->sed; 3105 int s; 3106 3107 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 3108 pipe, nslots, pos)); 3109 s = splusb(); 3110 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 3111 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 3112 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) 3113 usb_delay_ms(&sc->sc_bus, 2); 3114 3115 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 3116 continue; 3117 #ifdef DIAGNOSTIC 3118 if (p == NULL) 3119 panic("ohci_device_intr_close: ED not found"); 3120 #endif 3121 p->next = sed->next; 3122 p->ed.ed_nexted = sed->ed.ed_nexted; 3123 splx(s); 3124 3125 for (j = 0; j < nslots; j++) 3126 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 3127 3128 ohci_free_std(sc, opipe->tail.td); 3129 ohci_free_sed(sc, opipe->sed); 3130 } 3131 3132 Static usbd_status 3133 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival) 3134 { 3135 int i, j, s, best; 3136 u_int npoll, slow, shigh, nslots; 3137 u_int bestbw, bw; 3138 ohci_soft_ed_t *hsed, *sed = opipe->sed; 3139 3140 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 3141 if (ival == 0) { 3142 printf("ohci_setintr: 0 interval\n"); 3143 return (USBD_INVAL); 3144 } 3145 3146 npoll = OHCI_NO_INTRS; 3147 while (npoll > ival) 3148 npoll /= 2; 3149 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 3150 3151 /* 3152 * We now know which level in the tree the ED must go into. 3153 * Figure out which slot has most bandwidth left over. 3154 * Slots to examine: 3155 * npoll 3156 * 1 0 3157 * 2 1 2 3158 * 4 3 4 5 6 3159 * 8 7 8 9 10 11 12 13 14 3160 * N (N-1) .. (N-1+N-1) 3161 */ 3162 slow = npoll-1; 3163 shigh = slow + npoll; 3164 nslots = OHCI_NO_INTRS / npoll; 3165 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 3166 bw = 0; 3167 for (j = 0; j < nslots; j++) 3168 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 3169 if (bw < bestbw) { 3170 best = i; 3171 bestbw = bw; 3172 } 3173 } 3174 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 3175 best, slow, shigh, bestbw)); 3176 3177 s = splusb(); 3178 hsed = sc->sc_eds[best]; 3179 sed->next = hsed->next; 3180 sed->ed.ed_nexted = hsed->ed.ed_nexted; 3181 hsed->next = sed; 3182 hsed->ed.ed_nexted = HTOO32(sed->physaddr); 3183 splx(s); 3184 3185 for (j = 0; j < nslots; j++) 3186 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 3187 opipe->u.intr.nslots = nslots; 3188 opipe->u.intr.pos = best; 3189 3190 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 3191 return (USBD_NORMAL_COMPLETION); 3192 } 3193 3194 /***********************/ 3195 3196 usbd_status 3197 ohci_device_isoc_transfer(usbd_xfer_handle xfer) 3198 { 3199 usbd_status err; 3200 3201 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer)); 3202 3203 /* Put it on our queue, */ 3204 err = usb_insert_transfer(xfer); 3205 3206 /* bail out on error, */ 3207 if (err && err != USBD_IN_PROGRESS) 3208 return (err); 3209 3210 /* XXX should check inuse here */ 3211 3212 /* insert into schedule, */ 3213 ohci_device_isoc_enter(xfer); 3214 3215 /* and start if the pipe wasn't running */ 3216 if (!err) 3217 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 3218 3219 return (err); 3220 } 3221 3222 void 3223 ohci_device_isoc_enter(usbd_xfer_handle xfer) 3224 { 3225 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3226 usbd_device_handle dev = opipe->pipe.device; 3227 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 3228 ohci_soft_ed_t *sed = opipe->sed; 3229 struct iso *iso = &opipe->u.iso; 3230 ohci_soft_itd_t *sitd, *nsitd; 3231 ohci_physaddr_t buf, offs, noffs, bp0; 3232 int i, ncur, nframes; 3233 int s; 3234 3235 DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p " 3236 "nframes=%d\n", 3237 iso->inuse, iso->next, xfer, xfer->nframes)); 3238 3239 if (sc->sc_dying) 3240 return; 3241 3242 if (iso->next == -1) { 3243 /* Not in use yet, schedule it a few frames ahead. */ 3244 iso->next = O32TOH(sc->sc_hcca->hcca_frame_number) + 5; 3245 DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n", 3246 iso->next)); 3247 } 3248 3249 sitd = opipe->tail.itd; 3250 buf = DMAADDR(&xfer->dmabuf, 0); 3251 bp0 = OHCI_PAGE(buf); 3252 offs = OHCI_PAGE_OFFSET(buf); 3253 nframes = xfer->nframes; 3254 xfer->hcpriv = sitd; 3255 for (i = ncur = 0; i < nframes; i++, ncur++) { 3256 noffs = offs + xfer->frlengths[i]; 3257 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ 3258 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */ 3259 3260 /* Allocate next ITD */ 3261 nsitd = ohci_alloc_sitd(sc); 3262 if (nsitd == NULL) { 3263 /* XXX what now? */ 3264 printf("%s: isoc TD alloc failed\n", 3265 USBDEVNAME(sc->sc_bus.bdev)); 3266 return; 3267 } 3268 3269 /* Fill current ITD */ 3270 sitd->itd.itd_flags = HTOO32( 3271 OHCI_ITD_NOCC | 3272 OHCI_ITD_SET_SF(iso->next) | 3273 OHCI_ITD_SET_DI(6) | /* delay intr a little */ 3274 OHCI_ITD_SET_FC(ncur)); 3275 sitd->itd.itd_bp0 = HTOO32(bp0); 3276 sitd->nextitd = nsitd; 3277 sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr); 3278 sitd->itd.itd_be = HTOO32(bp0 + offs - 1); 3279 sitd->xfer = xfer; 3280 sitd->flags = 0; 3281 3282 sitd = nsitd; 3283 iso->next = iso->next + ncur; 3284 bp0 = OHCI_PAGE(buf + offs); 3285 ncur = 0; 3286 } 3287 sitd->itd.itd_offset[ncur] = HTOO16(OHCI_ITD_MK_OFFS(offs)); 3288 offs = noffs; 3289 } 3290 nsitd = ohci_alloc_sitd(sc); 3291 if (nsitd == NULL) { 3292 /* XXX what now? */ 3293 printf("%s: isoc TD alloc failed\n", 3294 USBDEVNAME(sc->sc_bus.bdev)); 3295 return; 3296 } 3297 /* Fixup last used ITD */ 3298 sitd->itd.itd_flags = HTOO32( 3299 OHCI_ITD_NOCC | 3300 OHCI_ITD_SET_SF(iso->next) | 3301 OHCI_ITD_SET_DI(0) | 3302 OHCI_ITD_SET_FC(ncur)); 3303 sitd->itd.itd_bp0 = HTOO32(bp0); 3304 sitd->nextitd = nsitd; 3305 sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr); 3306 sitd->itd.itd_be = HTOO32(bp0 + offs - 1); 3307 sitd->xfer = xfer; 3308 sitd->flags = OHCI_CALL_DONE; 3309 3310 iso->next = iso->next + ncur; 3311 iso->inuse += nframes; 3312 3313 xfer->actlen = offs; /* XXX pretend we did it all */ 3314 3315 xfer->status = USBD_IN_PROGRESS; 3316 3317 #ifdef OHCI_DEBUG 3318 if (ohcidebug > 5) { 3319 DPRINTF(("ohci_device_isoc_enter: frame=%d\n", 3320 O32TOH(sc->sc_hcca->hcca_frame_number))); 3321 ohci_dump_itds(sc, xfer->hcpriv); 3322 ohci_dump_ed(sc, sed); 3323 } 3324 #endif 3325 3326 s = splusb(); 3327 sed->ed.ed_tailp = HTOO32(nsitd->physaddr); 3328 opipe->tail.itd = nsitd; 3329 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3330 splx(s); 3331 3332 #ifdef OHCI_DEBUG 3333 if (ohcidebug > 5) { 3334 delay(150000); 3335 DPRINTF(("ohci_device_isoc_enter: after frame=%d\n", 3336 O32TOH(sc->sc_hcca->hcca_frame_number))); 3337 ohci_dump_itds(sc, xfer->hcpriv); 3338 ohci_dump_ed(sc, sed); 3339 } 3340 #endif 3341 } 3342 3343 usbd_status 3344 ohci_device_isoc_start(usbd_xfer_handle xfer) 3345 { 3346 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3347 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3348 3349 DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer)); 3350 3351 if (sc->sc_dying) 3352 return (USBD_IOERROR); 3353 3354 #ifdef DIAGNOSTIC 3355 if (xfer->status != USBD_IN_PROGRESS) 3356 printf("ohci_device_isoc_start: not in progress %p\n", xfer); 3357 #endif 3358 3359 /* XXX anything to do? */ 3360 3361 return (USBD_IN_PROGRESS); 3362 } 3363 3364 void 3365 ohci_device_isoc_abort(usbd_xfer_handle xfer) 3366 { 3367 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3368 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3369 ohci_soft_ed_t *sed; 3370 ohci_soft_itd_t *sitd; 3371 int s; 3372 3373 s = splusb(); 3374 3375 DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer)); 3376 3377 /* Transfer is already done. */ 3378 if (xfer->status != USBD_NOT_STARTED && 3379 xfer->status != USBD_IN_PROGRESS) { 3380 splx(s); 3381 printf("ohci_device_isoc_abort: early return\n"); 3382 return; 3383 } 3384 3385 /* Give xfer the requested abort code. */ 3386 xfer->status = USBD_CANCELLED; 3387 3388 sed = opipe->sed; 3389 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */ 3390 3391 sitd = xfer->hcpriv; 3392 #ifdef DIAGNOSTIC 3393 if (sitd == NULL) { 3394 splx(s); 3395 printf("ohci_device_isoc_abort: hcpriv==0\n"); 3396 return; 3397 } 3398 #endif 3399 for (; sitd->xfer == xfer; sitd = sitd->nextitd) { 3400 #ifdef DIAGNOSTIC 3401 DPRINTFN(1,("abort sets done sitd=%p\n", sitd)); 3402 sitd->isdone = 1; 3403 #endif 3404 } 3405 3406 splx(s); 3407 3408 usb_delay_ms(&sc->sc_bus, OHCI_ITD_NOFFSET); 3409 3410 s = splusb(); 3411 3412 /* Run callback. */ 3413 usb_transfer_complete(xfer); 3414 3415 sed->ed.ed_headp = HTOO32(sitd->physaddr); /* unlink TDs */ 3416 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */ 3417 3418 splx(s); 3419 } 3420 3421 void 3422 ohci_device_isoc_done(usbd_xfer_handle xfer) 3423 { 3424 DPRINTFN(1,("ohci_device_isoc_done: xfer=%p\n", xfer)); 3425 } 3426 3427 usbd_status 3428 ohci_setup_isoc(usbd_pipe_handle pipe) 3429 { 3430 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3431 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3432 struct iso *iso = &opipe->u.iso; 3433 int s; 3434 3435 iso->next = -1; 3436 iso->inuse = 0; 3437 3438 s = splusb(); 3439 ohci_add_ed(sc, opipe->sed, sc->sc_isoc_head); 3440 splx(s); 3441 3442 return (USBD_NORMAL_COMPLETION); 3443 } 3444 3445 void 3446 ohci_device_isoc_close(usbd_pipe_handle pipe) 3447 { 3448 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3449 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3450 3451 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe)); 3452 ohci_close_pipe(pipe, sc->sc_isoc_head); 3453 #ifdef DIAGNOSTIC 3454 opipe->tail.itd->isdone = 1; 3455 #endif 3456 ohci_free_sitd(sc, opipe->tail.itd); 3457 } 3458
Indexes created Wed Sep 24 05:09:52 GMT 2025