ohci.c revision 1.187
1 /* $NetBSD: ohci.c,v 1.187 2008/02/22 22:22:27 dyoung Exp $ */ 2 /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */ 3 4 /* 5 * Copyright (c) 1998, 2004, 2005 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Lennart Augustsson (lennart (at) augustsson.net) at 10 * Carlstedt Research & Technology. 11 * This code is derived from software contributed to The NetBSD Foundation 12 * by Charles M. Hannum. 13 * 14 * Redistribution and use in source and binary forms, with or without 15 * modification, are permitted provided that the following conditions 16 * are met: 17 * 1. Redistributions of source code must retain the above copyright 18 * notice, this list of conditions and the following disclaimer. 19 * 2. Redistributions in binary form must reproduce the above copyright 20 * notice, this list of conditions and the following disclaimer in the 21 * documentation and/or other materials provided with the distribution. 22 * 3. All advertising materials mentioning features or use of this software 23 * must display the following acknowledgement: 24 * This product includes software developed by the NetBSD 25 * Foundation, Inc. and its contributors. 26 * 4. Neither the name of The NetBSD Foundation nor the names of its 27 * contributors may be used to endorse or promote products derived 28 * from this software without specific prior written permission. 29 * 30 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 31 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 32 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 33 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 34 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 35 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 36 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 37 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 38 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 39 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 40 * POSSIBILITY OF SUCH DAMAGE. 41 */ 42 43 /* 44 * USB Open Host Controller driver. 45 * 46 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html 47 * USB spec: http://www.usb.org/developers/docs/usbspec.zip 48 */ 49 50 #include <sys/cdefs.h> 51 __KERNEL_RCSID(0, "$NetBSD: ohci.c,v 1.187 2008/02/22 22:22:27 dyoung Exp $"); 52 53 #include <sys/param.h> 54 #include <sys/systm.h> 55 #include <sys/malloc.h> 56 #if defined(__NetBSD__) || defined(__OpenBSD__) 57 #include <sys/kernel.h> 58 #include <sys/device.h> 59 #include <sys/select.h> 60 #include <uvm/uvm_extern.h> 61 #elif defined(__FreeBSD__) 62 #include <sys/module.h> 63 #include <sys/bus.h> 64 #include <machine/bus_pio.h> 65 #include <machine/bus_memio.h> 66 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 67 #include <sys/cpu.h> 68 #endif 69 #endif 70 #include <sys/proc.h> 71 #include <sys/queue.h> 72 73 #include <sys/bus.h> 74 #include <machine/endian.h> 75 76 #include <dev/usb/usb.h> 77 #include <dev/usb/usbdi.h> 78 #include <dev/usb/usbdivar.h> 79 #include <dev/usb/usb_mem.h> 80 #include <dev/usb/usb_quirks.h> 81 82 #include <dev/usb/ohcireg.h> 83 #include <dev/usb/ohcivar.h> 84 #include <dev/usb/usbroothub_subr.h> 85 86 #if defined(__FreeBSD__) 87 #include <machine/clock.h> 88 89 #define delay(d) DELAY(d) 90 #endif 91 92 #if defined(__OpenBSD__) 93 struct cfdriver ohci_cd = { 94 NULL, "ohci", DV_DULL 95 }; 96 #endif 97 98 #ifdef OHCI_DEBUG 99 #define DPRINTF(x) if (ohcidebug) logprintf x 100 #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x 101 int ohcidebug = 0; 102 #ifndef __NetBSD__ 103 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 104 #endif 105 #else 106 #define DPRINTF(x) 107 #define DPRINTFN(n,x) 108 #endif 109 110 #if BYTE_ORDER == BIG_ENDIAN 111 #define SWAP_ENDIAN OHCI_LITTLE_ENDIAN 112 #else 113 #define SWAP_ENDIAN OHCI_BIG_ENDIAN 114 #endif 115 116 #define O16TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap16(val) : val) 117 #define O32TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap32(val) : val) 118 #define HTOO16(val) O16TOH(val) 119 #define HTOO32(val) O32TOH(val) 120 121 struct ohci_pipe; 122 123 Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *); 124 Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *); 125 126 Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *); 127 Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *); 128 129 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *); 130 Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *); 131 132 #if 0 133 Static void ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *, 134 ohci_soft_td_t *); 135 #endif 136 Static usbd_status ohci_alloc_std_chain(struct ohci_pipe *, 137 ohci_softc_t *, int, int, usbd_xfer_handle, 138 ohci_soft_td_t *, ohci_soft_td_t **); 139 140 Static void ohci_shutdown(void *v); 141 Static usbd_status ohci_open(usbd_pipe_handle); 142 Static void ohci_poll(struct usbd_bus *); 143 Static void ohci_softintr(void *); 144 Static void ohci_waitintr(ohci_softc_t *, usbd_xfer_handle); 145 Static void ohci_rhsc(ohci_softc_t *, usbd_xfer_handle); 146 147 Static usbd_status ohci_device_request(usbd_xfer_handle xfer); 148 Static void ohci_add_ed(ohci_softc_t *, ohci_soft_ed_t *, 149 ohci_soft_ed_t *); 150 151 Static void ohci_rem_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 152 Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *); 153 Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *); 154 Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t); 155 Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *); 156 Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *); 157 Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t); 158 159 Static usbd_status ohci_setup_isoc(usbd_pipe_handle pipe); 160 Static void ohci_device_isoc_enter(usbd_xfer_handle); 161 162 Static usbd_status ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 163 Static void ohci_freem(struct usbd_bus *, usb_dma_t *); 164 165 Static usbd_xfer_handle ohci_allocx(struct usbd_bus *); 166 Static void ohci_freex(struct usbd_bus *, usbd_xfer_handle); 167 168 Static usbd_status ohci_root_ctrl_transfer(usbd_xfer_handle); 169 Static usbd_status ohci_root_ctrl_start(usbd_xfer_handle); 170 Static void ohci_root_ctrl_abort(usbd_xfer_handle); 171 Static void ohci_root_ctrl_close(usbd_pipe_handle); 172 Static void ohci_root_ctrl_done(usbd_xfer_handle); 173 174 Static usbd_status ohci_root_intr_transfer(usbd_xfer_handle); 175 Static usbd_status ohci_root_intr_start(usbd_xfer_handle); 176 Static void ohci_root_intr_abort(usbd_xfer_handle); 177 Static void ohci_root_intr_close(usbd_pipe_handle); 178 Static void ohci_root_intr_done(usbd_xfer_handle); 179 180 Static usbd_status ohci_device_ctrl_transfer(usbd_xfer_handle); 181 Static usbd_status ohci_device_ctrl_start(usbd_xfer_handle); 182 Static void ohci_device_ctrl_abort(usbd_xfer_handle); 183 Static void ohci_device_ctrl_close(usbd_pipe_handle); 184 Static void ohci_device_ctrl_done(usbd_xfer_handle); 185 186 Static usbd_status ohci_device_bulk_transfer(usbd_xfer_handle); 187 Static usbd_status ohci_device_bulk_start(usbd_xfer_handle); 188 Static void ohci_device_bulk_abort(usbd_xfer_handle); 189 Static void ohci_device_bulk_close(usbd_pipe_handle); 190 Static void ohci_device_bulk_done(usbd_xfer_handle); 191 192 Static usbd_status ohci_device_intr_transfer(usbd_xfer_handle); 193 Static usbd_status ohci_device_intr_start(usbd_xfer_handle); 194 Static void ohci_device_intr_abort(usbd_xfer_handle); 195 Static void ohci_device_intr_close(usbd_pipe_handle); 196 Static void ohci_device_intr_done(usbd_xfer_handle); 197 198 Static usbd_status ohci_device_isoc_transfer(usbd_xfer_handle); 199 Static usbd_status ohci_device_isoc_start(usbd_xfer_handle); 200 Static void ohci_device_isoc_abort(usbd_xfer_handle); 201 Static void ohci_device_isoc_close(usbd_pipe_handle); 202 Static void ohci_device_isoc_done(usbd_xfer_handle); 203 204 Static usbd_status ohci_device_setintr(ohci_softc_t *sc, 205 struct ohci_pipe *pipe, int ival); 206 207 Static void ohci_timeout(void *); 208 Static void ohci_timeout_task(void *); 209 Static void ohci_rhsc_enable(void *); 210 211 Static void ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *); 212 Static void ohci_abort_xfer(usbd_xfer_handle, usbd_status); 213 214 Static void ohci_device_clear_toggle(usbd_pipe_handle pipe); 215 Static void ohci_noop(usbd_pipe_handle pipe); 216 217 #ifdef OHCI_DEBUG 218 Static void ohci_dumpregs(ohci_softc_t *); 219 Static void ohci_dump_tds(ohci_softc_t *, ohci_soft_td_t *); 220 Static void ohci_dump_td(ohci_softc_t *, ohci_soft_td_t *); 221 Static void ohci_dump_ed(ohci_softc_t *, ohci_soft_ed_t *); 222 Static void ohci_dump_itd(ohci_softc_t *, ohci_soft_itd_t *); 223 Static void ohci_dump_itds(ohci_softc_t *, ohci_soft_itd_t *); 224 #endif 225 226 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 227 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 228 #define OWRITE1(sc, r, x) \ 229 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 230 #define OWRITE2(sc, r, x) \ 231 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 232 #define OWRITE4(sc, r, x) \ 233 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 234 static __inline uint8_t 235 OREAD1(ohci_softc_t *sc, bus_size_t r) 236 { 237 238 OBARR(sc); 239 return bus_space_read_1(sc->iot, sc->ioh, r); 240 } 241 242 static __inline uint16_t 243 OREAD2(ohci_softc_t *sc, bus_size_t r) 244 { 245 246 OBARR(sc); 247 return bus_space_read_2(sc->iot, sc->ioh, r); 248 } 249 250 static __inline uint32_t 251 OREAD4(ohci_softc_t *sc, bus_size_t r) 252 { 253 254 OBARR(sc); 255 return bus_space_read_4(sc->iot, sc->ioh, r); 256 } 257 258 /* Reverse the bits in a value 0 .. 31 */ 259 Static u_int8_t revbits[OHCI_NO_INTRS] = 260 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 261 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 262 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 263 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 264 265 struct ohci_pipe { 266 struct usbd_pipe pipe; 267 ohci_soft_ed_t *sed; 268 union { 269 ohci_soft_td_t *td; 270 ohci_soft_itd_t *itd; 271 } tail; 272 /* Info needed for different pipe kinds. */ 273 union { 274 /* Control pipe */ 275 struct { 276 usb_dma_t reqdma; 277 u_int length; 278 ohci_soft_td_t *setup, *data, *stat; 279 } ctl; 280 /* Interrupt pipe */ 281 struct { 282 int nslots; 283 int pos; 284 } intr; 285 /* Bulk pipe */ 286 struct { 287 u_int length; 288 int isread; 289 } bulk; 290 /* Iso pipe */ 291 struct iso { 292 int next, inuse; 293 } iso; 294 } u; 295 }; 296 297 #define OHCI_INTR_ENDPT 1 298 299 Static const struct usbd_bus_methods ohci_bus_methods = { 300 ohci_open, 301 ohci_softintr, 302 ohci_poll, 303 ohci_allocm, 304 ohci_freem, 305 ohci_allocx, 306 ohci_freex, 307 }; 308 309 Static const struct usbd_pipe_methods ohci_root_ctrl_methods = { 310 ohci_root_ctrl_transfer, 311 ohci_root_ctrl_start, 312 ohci_root_ctrl_abort, 313 ohci_root_ctrl_close, 314 ohci_noop, 315 ohci_root_ctrl_done, 316 }; 317 318 Static const struct usbd_pipe_methods ohci_root_intr_methods = { 319 ohci_root_intr_transfer, 320 ohci_root_intr_start, 321 ohci_root_intr_abort, 322 ohci_root_intr_close, 323 ohci_noop, 324 ohci_root_intr_done, 325 }; 326 327 Static const struct usbd_pipe_methods ohci_device_ctrl_methods = { 328 ohci_device_ctrl_transfer, 329 ohci_device_ctrl_start, 330 ohci_device_ctrl_abort, 331 ohci_device_ctrl_close, 332 ohci_noop, 333 ohci_device_ctrl_done, 334 }; 335 336 Static const struct usbd_pipe_methods ohci_device_intr_methods = { 337 ohci_device_intr_transfer, 338 ohci_device_intr_start, 339 ohci_device_intr_abort, 340 ohci_device_intr_close, 341 ohci_device_clear_toggle, 342 ohci_device_intr_done, 343 }; 344 345 Static const struct usbd_pipe_methods ohci_device_bulk_methods = { 346 ohci_device_bulk_transfer, 347 ohci_device_bulk_start, 348 ohci_device_bulk_abort, 349 ohci_device_bulk_close, 350 ohci_device_clear_toggle, 351 ohci_device_bulk_done, 352 }; 353 354 Static const struct usbd_pipe_methods ohci_device_isoc_methods = { 355 ohci_device_isoc_transfer, 356 ohci_device_isoc_start, 357 ohci_device_isoc_abort, 358 ohci_device_isoc_close, 359 ohci_noop, 360 ohci_device_isoc_done, 361 }; 362 363 #if defined(__NetBSD__) || defined(__OpenBSD__) 364 int 365 ohci_activate(device_ptr_t self, enum devact act) 366 { 367 struct ohci_softc *sc = (struct ohci_softc *)self; 368 int rv = 0; 369 370 switch (act) { 371 case DVACT_ACTIVATE: 372 return (EOPNOTSUPP); 373 374 case DVACT_DEACTIVATE: 375 sc->sc_dying = 1; 376 if (sc->sc_child != NULL) 377 rv = config_deactivate(sc->sc_child); 378 break; 379 } 380 return (rv); 381 } 382 383 void 384 ohci_childdet(device_t self, device_t child) 385 { 386 struct ohci_softc *sc = device_private(self); 387 388 KASSERT(sc->sc_child == child); 389 sc->sc_child = NULL; 390 } 391 392 int 393 ohci_detach(struct ohci_softc *sc, int flags) 394 { 395 int rv = 0; 396 397 if (sc->sc_child != NULL) 398 rv = config_detach(sc->sc_child, flags); 399 400 if (rv != 0) 401 return (rv); 402 403 usb_uncallout(sc->sc_tmo_rhsc, ohci_rhsc_enable, sc); 404 405 #if defined(__NetBSD__) || defined(__OpenBSD__) 406 shutdownhook_disestablish(sc->sc_shutdownhook); 407 #endif 408 409 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 410 411 /* free data structures XXX */ 412 413 return (rv); 414 } 415 #endif 416 417 ohci_soft_ed_t * 418 ohci_alloc_sed(ohci_softc_t *sc) 419 { 420 ohci_soft_ed_t *sed; 421 usbd_status err; 422 int i, offs; 423 usb_dma_t dma; 424 425 if (sc->sc_freeeds == NULL) { 426 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 427 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 428 OHCI_ED_ALIGN, &dma); 429 if (err) 430 return (0); 431 for(i = 0; i < OHCI_SED_CHUNK; i++) { 432 offs = i * OHCI_SED_SIZE; 433 sed = KERNADDR(&dma, offs); 434 sed->physaddr = DMAADDR(&dma, offs); 435 sed->next = sc->sc_freeeds; 436 sc->sc_freeeds = sed; 437 } 438 } 439 sed = sc->sc_freeeds; 440 sc->sc_freeeds = sed->next; 441 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 442 sed->next = 0; 443 return (sed); 444 } 445 446 void 447 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 448 { 449 sed->next = sc->sc_freeeds; 450 sc->sc_freeeds = sed; 451 } 452 453 ohci_soft_td_t * 454 ohci_alloc_std(ohci_softc_t *sc) 455 { 456 ohci_soft_td_t *std; 457 usbd_status err; 458 int i, offs; 459 usb_dma_t dma; 460 int s; 461 462 if (sc->sc_freetds == NULL) { 463 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 464 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 465 OHCI_TD_ALIGN, &dma); 466 if (err) 467 return (NULL); 468 s = splusb(); 469 for(i = 0; i < OHCI_STD_CHUNK; i++) { 470 offs = i * OHCI_STD_SIZE; 471 std = KERNADDR(&dma, offs); 472 std->physaddr = DMAADDR(&dma, offs); 473 std->nexttd = sc->sc_freetds; 474 sc->sc_freetds = std; 475 } 476 splx(s); 477 } 478 479 s = splusb(); 480 std = sc->sc_freetds; 481 sc->sc_freetds = std->nexttd; 482 memset(&std->td, 0, sizeof(ohci_td_t)); 483 std->nexttd = NULL; 484 std->xfer = NULL; 485 ohci_hash_add_td(sc, std); 486 splx(s); 487 488 return (std); 489 } 490 491 void 492 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std) 493 { 494 int s; 495 496 s = splusb(); 497 ohci_hash_rem_td(sc, std); 498 std->nexttd = sc->sc_freetds; 499 sc->sc_freetds = std; 500 splx(s); 501 } 502 503 usbd_status 504 ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc, 505 int alen, int rd, usbd_xfer_handle xfer, 506 ohci_soft_td_t *sp, ohci_soft_td_t **ep) 507 { 508 ohci_soft_td_t *next, *cur; 509 ohci_physaddr_t dataphys, dataphysend; 510 u_int32_t tdflags; 511 int len, curlen; 512 usb_dma_t *dma = &xfer->dmabuf; 513 u_int16_t flags = xfer->flags; 514 515 DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen)); 516 517 len = alen; 518 cur = sp; 519 dataphys = DMAADDR(dma, 0); 520 dataphysend = OHCI_PAGE(dataphys + len - 1); 521 tdflags = HTOO32( 522 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 523 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) | 524 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR); 525 526 for (;;) { 527 next = ohci_alloc_std(sc); 528 if (next == NULL) 529 goto nomem; 530 531 /* The OHCI hardware can handle at most one page crossing. */ 532 if (OHCI_PAGE(dataphys) == dataphysend || 533 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) { 534 /* we can handle it in this TD */ 535 curlen = len; 536 } else { 537 /* must use multiple TDs, fill as much as possible. */ 538 curlen = 2 * OHCI_PAGE_SIZE - 539 (dataphys & (OHCI_PAGE_SIZE-1)); 540 /* the length must be a multiple of the max size */ 541 curlen -= curlen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize); 542 #ifdef DIAGNOSTIC 543 if (curlen == 0) 544 panic("ohci_alloc_std: curlen == 0"); 545 #endif 546 } 547 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x " 548 "dataphysend=0x%08x len=%d curlen=%d\n", 549 dataphys, dataphysend, 550 len, curlen)); 551 len -= curlen; 552 553 cur->td.td_flags = tdflags; 554 cur->td.td_cbp = HTOO32(dataphys); 555 cur->nexttd = next; 556 cur->td.td_nexttd = HTOO32(next->physaddr); 557 cur->td.td_be = HTOO32(dataphys + curlen - 1); 558 cur->len = curlen; 559 cur->flags = OHCI_ADD_LEN; 560 cur->xfer = xfer; 561 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n", 562 dataphys, dataphys + curlen - 1)); 563 if (len == 0) 564 break; 565 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n")); 566 dataphys += curlen; 567 cur = next; 568 } 569 if (!rd && (flags & USBD_FORCE_SHORT_XFER) && 570 alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) { 571 /* Force a 0 length transfer at the end. */ 572 573 cur = next; 574 next = ohci_alloc_std(sc); 575 if (next == NULL) 576 goto nomem; 577 578 cur->td.td_flags = tdflags; 579 cur->td.td_cbp = 0; /* indicate 0 length packet */ 580 cur->nexttd = next; 581 cur->td.td_nexttd = HTOO32(next->physaddr); 582 cur->td.td_be = ~0; 583 cur->len = 0; 584 cur->flags = 0; 585 cur->xfer = xfer; 586 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n")); 587 } 588 *ep = cur; 589 590 return (USBD_NORMAL_COMPLETION); 591 592 nomem: 593 /* XXX free chain */ 594 return (USBD_NOMEM); 595 } 596 597 #if 0 598 Static void 599 ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std, 600 ohci_soft_td_t *stdend) 601 { 602 ohci_soft_td_t *p; 603 604 for (; std != stdend; std = p) { 605 p = std->nexttd; 606 ohci_free_std(sc, std); 607 } 608 } 609 #endif 610 611 ohci_soft_itd_t * 612 ohci_alloc_sitd(ohci_softc_t *sc) 613 { 614 ohci_soft_itd_t *sitd; 615 usbd_status err; 616 int i, s, offs; 617 usb_dma_t dma; 618 619 if (sc->sc_freeitds == NULL) { 620 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n")); 621 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK, 622 OHCI_ITD_ALIGN, &dma); 623 if (err) 624 return (NULL); 625 s = splusb(); 626 for(i = 0; i < OHCI_SITD_CHUNK; i++) { 627 offs = i * OHCI_SITD_SIZE; 628 sitd = KERNADDR(&dma, offs); 629 sitd->physaddr = DMAADDR(&dma, offs); 630 sitd->nextitd = sc->sc_freeitds; 631 sc->sc_freeitds = sitd; 632 } 633 splx(s); 634 } 635 636 s = splusb(); 637 sitd = sc->sc_freeitds; 638 sc->sc_freeitds = sitd->nextitd; 639 memset(&sitd->itd, 0, sizeof(ohci_itd_t)); 640 sitd->nextitd = NULL; 641 sitd->xfer = NULL; 642 ohci_hash_add_itd(sc, sitd); 643 splx(s); 644 645 #ifdef DIAGNOSTIC 646 sitd->isdone = 0; 647 #endif 648 649 return (sitd); 650 } 651 652 void 653 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 654 { 655 int s; 656 657 DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd)); 658 659 #ifdef DIAGNOSTIC 660 if (!sitd->isdone) { 661 panic("ohci_free_sitd: sitd=%p not done", sitd); 662 return; 663 } 664 /* Warn double free */ 665 sitd->isdone = 0; 666 #endif 667 668 s = splusb(); 669 ohci_hash_rem_itd(sc, sitd); 670 sitd->nextitd = sc->sc_freeitds; 671 sc->sc_freeitds = sitd; 672 splx(s); 673 } 674 675 usbd_status 676 ohci_init(ohci_softc_t *sc) 677 { 678 ohci_soft_ed_t *sed, *psed; 679 usbd_status err; 680 int i; 681 u_int32_t s, ctl, rwc, ival, hcr, fm, per, rev, desca, descb; 682 683 DPRINTF(("ohci_init: start\n")); 684 #if defined(__OpenBSD__) 685 printf(","); 686 #else 687 printf("%s:", USBDEVNAME(sc->sc_bus.bdev)); 688 #endif 689 rev = OREAD4(sc, OHCI_REVISION); 690 printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev), 691 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 692 693 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 694 printf("%s: unsupported OHCI revision\n", 695 USBDEVNAME(sc->sc_bus.bdev)); 696 sc->sc_bus.usbrev = USBREV_UNKNOWN; 697 return (USBD_INVAL); 698 } 699 sc->sc_bus.usbrev = USBREV_1_0; 700 701 for (i = 0; i < OHCI_HASH_SIZE; i++) 702 LIST_INIT(&sc->sc_hash_tds[i]); 703 for (i = 0; i < OHCI_HASH_SIZE; i++) 704 LIST_INIT(&sc->sc_hash_itds[i]); 705 706 SIMPLEQ_INIT(&sc->sc_free_xfers); 707 708 #ifdef __NetBSD__ 709 usb_setup_reserve(sc, &sc->sc_dma_reserve, sc->sc_bus.dmatag, 710 USB_MEM_RESERVE); 711 #endif 712 713 /* XXX determine alignment by R/W */ 714 /* Allocate the HCCA area. */ 715 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 716 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 717 if (err) 718 return (err); 719 sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0); 720 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 721 722 sc->sc_eintrs = OHCI_NORMAL_INTRS; 723 724 /* Allocate dummy ED that starts the control list. */ 725 sc->sc_ctrl_head = ohci_alloc_sed(sc); 726 if (sc->sc_ctrl_head == NULL) { 727 err = USBD_NOMEM; 728 goto bad1; 729 } 730 sc->sc_ctrl_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 731 732 /* Allocate dummy ED that starts the bulk list. */ 733 sc->sc_bulk_head = ohci_alloc_sed(sc); 734 if (sc->sc_bulk_head == NULL) { 735 err = USBD_NOMEM; 736 goto bad2; 737 } 738 sc->sc_bulk_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 739 740 /* Allocate dummy ED that starts the isochronous list. */ 741 sc->sc_isoc_head = ohci_alloc_sed(sc); 742 if (sc->sc_isoc_head == NULL) { 743 err = USBD_NOMEM; 744 goto bad3; 745 } 746 sc->sc_isoc_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 747 748 /* Allocate all the dummy EDs that make up the interrupt tree. */ 749 for (i = 0; i < OHCI_NO_EDS; i++) { 750 sed = ohci_alloc_sed(sc); 751 if (sed == NULL) { 752 while (--i >= 0) 753 ohci_free_sed(sc, sc->sc_eds[i]); 754 err = USBD_NOMEM; 755 goto bad4; 756 } 757 /* All ED fields are set to 0. */ 758 sc->sc_eds[i] = sed; 759 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 760 if (i != 0) 761 psed = sc->sc_eds[(i-1) / 2]; 762 else 763 psed= sc->sc_isoc_head; 764 sed->next = psed; 765 sed->ed.ed_nexted = HTOO32(psed->physaddr); 766 } 767 /* 768 * Fill HCCA interrupt table. The bit reversal is to get 769 * the tree set up properly to spread the interrupts. 770 */ 771 for (i = 0; i < OHCI_NO_INTRS; i++) 772 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 773 HTOO32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 774 775 #ifdef OHCI_DEBUG 776 if (ohcidebug > 15) { 777 for (i = 0; i < OHCI_NO_EDS; i++) { 778 printf("ed#%d ", i); 779 ohci_dump_ed(sc, sc->sc_eds[i]); 780 } 781 printf("iso "); 782 ohci_dump_ed(sc, sc->sc_isoc_head); 783 } 784 #endif 785 786 /* Preserve values programmed by SMM/BIOS but lost over reset. */ 787 ctl = OREAD4(sc, OHCI_CONTROL); 788 rwc = ctl & OHCI_RWC; 789 fm = OREAD4(sc, OHCI_FM_INTERVAL); 790 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 791 descb = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 792 793 /* Determine in what context we are running. */ 794 if (ctl & OHCI_IR) { 795 /* SMM active, request change */ 796 DPRINTF(("ohci_init: SMM active, request owner change\n")); 797 if ((sc->sc_intre & (OHCI_OC | OHCI_MIE)) == 798 (OHCI_OC | OHCI_MIE)) 799 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_MIE); 800 s = OREAD4(sc, OHCI_COMMAND_STATUS); 801 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 802 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 803 usb_delay_ms(&sc->sc_bus, 1); 804 ctl = OREAD4(sc, OHCI_CONTROL); 805 } 806 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_MIE); 807 if ((ctl & OHCI_IR) == 0) { 808 printf("%s: SMM does not respond, resetting\n", 809 USBDEVNAME(sc->sc_bus.bdev)); 810 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 811 goto reset; 812 } 813 #if 0 814 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */ 815 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 816 /* BIOS started controller. */ 817 DPRINTF(("ohci_init: BIOS active\n")); 818 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 819 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL | rwc); 820 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 821 } 822 #endif 823 } else { 824 DPRINTF(("ohci_init: cold started\n")); 825 reset: 826 /* Controller was cold started. */ 827 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 828 } 829 830 /* 831 * This reset should not be necessary according to the OHCI spec, but 832 * without it some controllers do not start. 833 */ 834 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 835 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 836 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 837 838 /* We now own the host controller and the bus has been reset. */ 839 840 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 841 /* Nominal time for a reset is 10 us. */ 842 for (i = 0; i < 10; i++) { 843 delay(10); 844 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 845 if (!hcr) 846 break; 847 } 848 if (hcr) { 849 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 850 err = USBD_IOERROR; 851 goto bad5; 852 } 853 #ifdef OHCI_DEBUG 854 if (ohcidebug > 15) 855 ohci_dumpregs(sc); 856 #endif 857 858 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 859 860 /* Set up HC registers. */ 861 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 862 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 863 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 864 /* disable all interrupts and then switch on all desired interrupts */ 865 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 866 /* switch on desired functional features */ 867 ctl = OREAD4(sc, OHCI_CONTROL); 868 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 869 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 870 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL | rwc; 871 /* And finally start it! */ 872 OWRITE4(sc, OHCI_CONTROL, ctl); 873 874 /* 875 * The controller is now OPERATIONAL. Set a some final 876 * registers that should be set earlier, but that the 877 * controller ignores when in the SUSPEND state. 878 */ 879 ival = OHCI_GET_IVAL(fm); 880 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 881 fm |= OHCI_FSMPS(ival) | ival; 882 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 883 per = OHCI_PERIODIC(ival); /* 90% periodic */ 884 OWRITE4(sc, OHCI_PERIODIC_START, per); 885 886 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */ 887 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP); 888 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 889 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY); 890 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca); 891 892 /* 893 * The AMD756 requires a delay before re-reading the register, 894 * otherwise it will occasionally report 0 ports. 895 */ 896 sc->sc_noport = 0; 897 for (i = 0; i < 10 && sc->sc_noport == 0; i++) { 898 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY); 899 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 900 } 901 902 #ifdef OHCI_DEBUG 903 if (ohcidebug > 5) 904 ohci_dumpregs(sc); 905 #endif 906 907 /* Set up the bus struct. */ 908 sc->sc_bus.methods = &ohci_bus_methods; 909 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 910 911 #if defined(__NetBSD__) || defined(__OpenBSD__) 912 sc->sc_control = sc->sc_intre = 0; 913 sc->sc_shutdownhook = shutdownhook_establish(ohci_shutdown, sc); 914 #endif 915 916 usb_callout_init(sc->sc_tmo_rhsc); 917 918 /* Finally, turn on interrupts. */ 919 DPRINTFN(1,("ohci_init: enabling\n")); 920 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 921 922 return (USBD_NORMAL_COMPLETION); 923 924 bad5: 925 for (i = 0; i < OHCI_NO_EDS; i++) 926 ohci_free_sed(sc, sc->sc_eds[i]); 927 bad4: 928 ohci_free_sed(sc, sc->sc_isoc_head); 929 bad3: 930 ohci_free_sed(sc, sc->sc_bulk_head); 931 bad2: 932 ohci_free_sed(sc, sc->sc_ctrl_head); 933 bad1: 934 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 935 return (err); 936 } 937 938 usbd_status 939 ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 940 { 941 #if defined(__NetBSD__) || defined(__OpenBSD__) 942 struct ohci_softc *sc = (struct ohci_softc *)bus; 943 #endif 944 usbd_status status; 945 946 status = usb_allocmem(&sc->sc_bus, size, 0, dma); 947 #ifdef __NetBSD__ 948 if (status == USBD_NOMEM) 949 status = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size); 950 #endif 951 return status; 952 } 953 954 void 955 ohci_freem(struct usbd_bus *bus, usb_dma_t *dma) 956 { 957 #if defined(__NetBSD__) || defined(__OpenBSD__) 958 struct ohci_softc *sc = (struct ohci_softc *)bus; 959 #endif 960 #ifdef __NetBSD__ 961 if (dma->block->flags & USB_DMA_RESERVE) { 962 usb_reserve_freem(&((struct ohci_softc *)bus)->sc_dma_reserve, 963 dma); 964 return; 965 } 966 #endif 967 usb_freemem(&sc->sc_bus, dma); 968 } 969 970 usbd_xfer_handle 971 ohci_allocx(struct usbd_bus *bus) 972 { 973 struct ohci_softc *sc = (struct ohci_softc *)bus; 974 usbd_xfer_handle xfer; 975 976 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 977 if (xfer != NULL) { 978 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 979 #ifdef DIAGNOSTIC 980 if (xfer->busy_free != XFER_FREE) { 981 printf("ohci_allocx: xfer=%p not free, 0x%08x\n", xfer, 982 xfer->busy_free); 983 } 984 #endif 985 } else { 986 xfer = malloc(sizeof(struct ohci_xfer), M_USB, M_NOWAIT); 987 } 988 if (xfer != NULL) { 989 memset(xfer, 0, sizeof (struct ohci_xfer)); 990 #ifdef DIAGNOSTIC 991 xfer->busy_free = XFER_BUSY; 992 #endif 993 } 994 return (xfer); 995 } 996 997 void 998 ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 999 { 1000 struct ohci_softc *sc = (struct ohci_softc *)bus; 1001 1002 #ifdef DIAGNOSTIC 1003 if (xfer->busy_free != XFER_BUSY) { 1004 printf("ohci_freex: xfer=%p not busy, 0x%08x\n", xfer, 1005 xfer->busy_free); 1006 } 1007 xfer->busy_free = XFER_FREE; 1008 #endif 1009 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 1010 } 1011 1012 /* 1013 * Shut down the controller when the system is going down. 1014 */ 1015 void 1016 ohci_shutdown(void *v) 1017 { 1018 ohci_softc_t *sc = v; 1019 1020 DPRINTF(("ohci_shutdown: stopping the HC\n")); 1021 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1022 } 1023 1024 bool 1025 ohci_resume(device_t dv PMF_FN_ARGS) 1026 { 1027 ohci_softc_t *sc = device_private(dv); 1028 uint32_t ctl; 1029 int s; 1030 1031 s = splhardusb(); 1032 sc->sc_bus.use_polling++; 1033 /* Some broken BIOSes do not recover these values */ 1034 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 1035 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, 1036 sc->sc_ctrl_head->physaddr); 1037 OWRITE4(sc, OHCI_BULK_HEAD_ED, 1038 sc->sc_bulk_head->physaddr); 1039 if (sc->sc_intre) 1040 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_intre & 1041 (OHCI_ALL_INTRS | OHCI_MIE)); 1042 if (sc->sc_control) 1043 ctl = sc->sc_control; 1044 else 1045 ctl = OREAD4(sc, OHCI_CONTROL); 1046 ctl |= OHCI_HCFS_RESUME; 1047 OWRITE4(sc, OHCI_CONTROL, ctl); 1048 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 1049 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL; 1050 OWRITE4(sc, OHCI_CONTROL, ctl); 1051 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 1052 sc->sc_control = sc->sc_intre = 0; 1053 sc->sc_bus.use_polling--; 1054 1055 return true; 1056 } 1057 1058 bool 1059 ohci_suspend(device_t dv PMF_FN_ARGS) 1060 { 1061 ohci_softc_t *sc = device_private(dv); 1062 uint32_t ctl; 1063 int s; 1064 1065 s = splhardusb(); 1066 sc->sc_bus.use_polling++; 1067 ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK; 1068 if (sc->sc_control == 0) { 1069 /* 1070 * Preserve register values, in case that BIOS 1071 * does not recover them. 1072 */ 1073 sc->sc_control = ctl; 1074 sc->sc_intre = OREAD4(sc, 1075 OHCI_INTERRUPT_ENABLE); 1076 } 1077 ctl |= OHCI_HCFS_SUSPEND; 1078 OWRITE4(sc, OHCI_CONTROL, ctl); 1079 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1080 sc->sc_bus.use_polling--; 1081 splx(s); 1082 1083 return true; 1084 } 1085 1086 #ifdef OHCI_DEBUG 1087 void 1088 ohci_dumpregs(ohci_softc_t *sc) 1089 { 1090 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 1091 OREAD4(sc, OHCI_REVISION), 1092 OREAD4(sc, OHCI_CONTROL), 1093 OREAD4(sc, OHCI_COMMAND_STATUS))); 1094 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 1095 OREAD4(sc, OHCI_INTERRUPT_STATUS), 1096 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 1097 OREAD4(sc, OHCI_INTERRUPT_DISABLE))); 1098 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 1099 OREAD4(sc, OHCI_HCCA), 1100 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 1101 OREAD4(sc, OHCI_CONTROL_HEAD_ED))); 1102 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 1103 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 1104 OREAD4(sc, OHCI_BULK_HEAD_ED), 1105 OREAD4(sc, OHCI_BULK_CURRENT_ED))); 1106 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 1107 OREAD4(sc, OHCI_DONE_HEAD), 1108 OREAD4(sc, OHCI_FM_INTERVAL), 1109 OREAD4(sc, OHCI_FM_REMAINING))); 1110 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 1111 OREAD4(sc, OHCI_FM_NUMBER), 1112 OREAD4(sc, OHCI_PERIODIC_START), 1113 OREAD4(sc, OHCI_LS_THRESHOLD))); 1114 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n", 1115 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 1116 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 1117 OREAD4(sc, OHCI_RH_STATUS))); 1118 DPRINTF((" port1=0x%08x port2=0x%08x\n", 1119 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 1120 OREAD4(sc, OHCI_RH_PORT_STATUS(2)))); 1121 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n", 1122 O32TOH(sc->sc_hcca->hcca_frame_number), 1123 O32TOH(sc->sc_hcca->hcca_done_head))); 1124 } 1125 #endif 1126 1127 Static int ohci_intr1(ohci_softc_t *); 1128 1129 int 1130 ohci_intr(void *p) 1131 { 1132 ohci_softc_t *sc = p; 1133 1134 if (sc == NULL || sc->sc_dying || !device_has_power(&sc->sc_bus.bdev)) 1135 return (0); 1136 1137 /* If we get an interrupt while polling, then just ignore it. */ 1138 if (sc->sc_bus.use_polling) { 1139 #ifdef DIAGNOSTIC 1140 DPRINTFN(16, ("ohci_intr: ignored interrupt while polling\n")); 1141 #endif 1142 /* for level triggered intrs, should do something to ack */ 1143 OWRITE4(sc, OHCI_INTERRUPT_STATUS, 1144 OREAD4(sc, OHCI_INTERRUPT_STATUS)); 1145 1146 return (0); 1147 } 1148 1149 return (ohci_intr1(sc)); 1150 } 1151 1152 Static int 1153 ohci_intr1(ohci_softc_t *sc) 1154 { 1155 u_int32_t intrs, eintrs; 1156 1157 DPRINTFN(14,("ohci_intr1: enter\n")); 1158 1159 /* In case the interrupt occurs before initialization has completed. */ 1160 if (sc == NULL || sc->sc_hcca == NULL) { 1161 #ifdef DIAGNOSTIC 1162 printf("ohci_intr: sc->sc_hcca == NULL\n"); 1163 #endif 1164 return (0); 1165 } 1166 1167 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1168 if (!intrs) 1169 return (0); 1170 1171 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs & ~(OHCI_MIE|OHCI_WDH)); /* Acknowledge */ 1172 eintrs = intrs & sc->sc_eintrs; 1173 if (!eintrs) 1174 return (0); 1175 1176 sc->sc_bus.intr_context++; 1177 sc->sc_bus.no_intrs++; 1178 DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 1179 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 1180 (u_int)eintrs)); 1181 1182 if (eintrs & OHCI_SO) { 1183 sc->sc_overrun_cnt++; 1184 if (usbd_ratecheck(&sc->sc_overrun_ntc)) { 1185 printf("%s: %u scheduling overruns\n", 1186 USBDEVNAME(sc->sc_bus.bdev), sc->sc_overrun_cnt); 1187 sc->sc_overrun_cnt = 0; 1188 } 1189 /* XXX do what */ 1190 eintrs &= ~OHCI_SO; 1191 } 1192 if (eintrs & OHCI_WDH) { 1193 /* 1194 * We block the interrupt below, and reenable it later from 1195 * ohci_softintr(). 1196 */ 1197 usb_schedsoftintr(&sc->sc_bus); 1198 } 1199 if (eintrs & OHCI_RD) { 1200 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev)); 1201 /* XXX process resume detect */ 1202 } 1203 if (eintrs & OHCI_UE) { 1204 printf("%s: unrecoverable error, controller halted\n", 1205 USBDEVNAME(sc->sc_bus.bdev)); 1206 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1207 /* XXX what else */ 1208 } 1209 if (eintrs & OHCI_RHSC) { 1210 /* 1211 * We block the interrupt below, and reenable it later from 1212 * a timeout. 1213 */ 1214 ohci_rhsc(sc, sc->sc_intrxfer); 1215 /* Do not allow RHSC interrupts > 1 per second */ 1216 usb_callout(sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc); 1217 } 1218 1219 sc->sc_bus.intr_context--; 1220 1221 if (eintrs != 0) { 1222 /* Block unprocessed interrupts. */ 1223 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs); 1224 sc->sc_eintrs &= ~eintrs; 1225 DPRINTFN(1, ("%s: blocking intrs 0x%x\n", 1226 USBDEVNAME(sc->sc_bus.bdev), eintrs)); 1227 } 1228 1229 return (1); 1230 } 1231 1232 void 1233 ohci_rhsc_enable(void *v_sc) 1234 { 1235 ohci_softc_t *sc = v_sc; 1236 int s; 1237 1238 s = splhardusb(); 1239 sc->sc_eintrs |= OHCI_RHSC; 1240 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1241 splx(s); 1242 } 1243 1244 #ifdef OHCI_DEBUG 1245 const char *ohci_cc_strs[] = { 1246 "NO_ERROR", 1247 "CRC", 1248 "BIT_STUFFING", 1249 "DATA_TOGGLE_MISMATCH", 1250 "STALL", 1251 "DEVICE_NOT_RESPONDING", 1252 "PID_CHECK_FAILURE", 1253 "UNEXPECTED_PID", 1254 "DATA_OVERRUN", 1255 "DATA_UNDERRUN", 1256 "BUFFER_OVERRUN", 1257 "BUFFER_UNDERRUN", 1258 "reserved", 1259 "reserved", 1260 "NOT_ACCESSED", 1261 "NOT_ACCESSED", 1262 }; 1263 #endif 1264 1265 void 1266 ohci_softintr(void *v) 1267 { 1268 ohci_softc_t *sc = v; 1269 ohci_soft_itd_t *sitd, *sidone, *sitdnext; 1270 ohci_soft_td_t *std, *sdone, *stdnext; 1271 usbd_xfer_handle xfer; 1272 struct ohci_pipe *opipe; 1273 int len, cc, s; 1274 int i, j, actlen, iframes, uedir; 1275 ohci_physaddr_t done; 1276 1277 DPRINTFN(10,("ohci_softintr: enter\n")); 1278 1279 sc->sc_bus.intr_context++; 1280 1281 s = splhardusb(); 1282 done = O32TOH(sc->sc_hcca->hcca_done_head) & ~OHCI_DONE_INTRS; 1283 sc->sc_hcca->hcca_done_head = 0; 1284 OWRITE4(sc, OHCI_INTERRUPT_STATUS, OHCI_WDH); 1285 sc->sc_eintrs |= OHCI_WDH; 1286 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_WDH); 1287 splx(s); 1288 1289 /* Reverse the done list. */ 1290 for (sdone = NULL, sidone = NULL; done != 0; ) { 1291 std = ohci_hash_find_td(sc, done); 1292 if (std != NULL) { 1293 std->dnext = sdone; 1294 done = O32TOH(std->td.td_nexttd); 1295 sdone = std; 1296 DPRINTFN(10,("add TD %p\n", std)); 1297 continue; 1298 } 1299 sitd = ohci_hash_find_itd(sc, done); 1300 if (sitd != NULL) { 1301 sitd->dnext = sidone; 1302 done = O32TOH(sitd->itd.itd_nextitd); 1303 sidone = sitd; 1304 DPRINTFN(5,("add ITD %p\n", sitd)); 1305 continue; 1306 } 1307 panic("ohci_softintr: addr 0x%08lx not found", (u_long)done); 1308 } 1309 1310 DPRINTFN(10,("ohci_softintr: sdone=%p sidone=%p\n", sdone, sidone)); 1311 1312 #ifdef OHCI_DEBUG 1313 if (ohcidebug > 10) { 1314 DPRINTF(("ohci_process_done: TD done:\n")); 1315 ohci_dump_tds(sc, sdone); 1316 } 1317 #endif 1318 1319 for (std = sdone; std; std = stdnext) { 1320 xfer = std->xfer; 1321 stdnext = std->dnext; 1322 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n", 1323 std, xfer, xfer ? xfer->hcpriv : 0)); 1324 if (xfer == NULL) { 1325 /* 1326 * xfer == NULL: There seems to be no xfer associated 1327 * with this TD. It is tailp that happened to end up on 1328 * the done queue. 1329 * Shouldn't happen, but some chips are broken(?). 1330 */ 1331 continue; 1332 } 1333 if (xfer->status == USBD_CANCELLED || 1334 xfer->status == USBD_TIMEOUT) { 1335 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1336 xfer)); 1337 /* Handled by abort routine. */ 1338 continue; 1339 } 1340 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 1341 1342 len = std->len; 1343 if (std->td.td_cbp != 0) 1344 len -= O32TOH(std->td.td_be) - 1345 O32TOH(std->td.td_cbp) + 1; 1346 DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", len, 1347 std->flags)); 1348 if (std->flags & OHCI_ADD_LEN) 1349 xfer->actlen += len; 1350 1351 cc = OHCI_TD_GET_CC(O32TOH(std->td.td_flags)); 1352 if (cc == OHCI_CC_NO_ERROR) { 1353 if (std->flags & OHCI_CALL_DONE) { 1354 xfer->status = USBD_NORMAL_COMPLETION; 1355 s = splusb(); 1356 usb_transfer_complete(xfer); 1357 splx(s); 1358 } 1359 ohci_free_std(sc, std); 1360 } else { 1361 /* 1362 * Endpoint is halted. First unlink all the TDs 1363 * belonging to the failed transfer, and then restart 1364 * the endpoint. 1365 */ 1366 ohci_soft_td_t *p, *n; 1367 opipe = (struct ohci_pipe *)xfer->pipe; 1368 1369 DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n", 1370 OHCI_TD_GET_CC(O32TOH(std->td.td_flags)), 1371 ohci_cc_strs[OHCI_TD_GET_CC(O32TOH(std->td.td_flags))])); 1372 1373 /* remove TDs */ 1374 for (p = std; p->xfer == xfer; p = n) { 1375 n = p->nexttd; 1376 ohci_free_std(sc, p); 1377 } 1378 1379 /* clear halt */ 1380 opipe->sed->ed.ed_headp = HTOO32(p->physaddr); 1381 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1382 1383 if (cc == OHCI_CC_STALL) 1384 xfer->status = USBD_STALLED; 1385 else 1386 xfer->status = USBD_IOERROR; 1387 s = splusb(); 1388 usb_transfer_complete(xfer); 1389 splx(s); 1390 } 1391 } 1392 1393 #ifdef OHCI_DEBUG 1394 if (ohcidebug > 10) { 1395 DPRINTF(("ohci_softintr: ITD done:\n")); 1396 ohci_dump_itds(sc, sidone); 1397 } 1398 #endif 1399 1400 for (sitd = sidone; sitd != NULL; sitd = sitdnext) { 1401 xfer = sitd->xfer; 1402 sitdnext = sitd->dnext; 1403 DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n", 1404 sitd, xfer, xfer ? xfer->hcpriv : 0)); 1405 if (xfer == NULL) 1406 continue; 1407 if (xfer->status == USBD_CANCELLED || 1408 xfer->status == USBD_TIMEOUT) { 1409 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1410 xfer)); 1411 /* Handled by abort routine. */ 1412 continue; 1413 } 1414 #ifdef DIAGNOSTIC 1415 if (sitd->isdone) 1416 printf("ohci_softintr: sitd=%p is done\n", sitd); 1417 sitd->isdone = 1; 1418 #endif 1419 if (sitd->flags & OHCI_CALL_DONE) { 1420 ohci_soft_itd_t *next; 1421 1422 opipe = (struct ohci_pipe *)xfer->pipe; 1423 opipe->u.iso.inuse -= xfer->nframes; 1424 uedir = UE_GET_DIR(xfer->pipe->endpoint->edesc-> 1425 bEndpointAddress); 1426 xfer->status = USBD_NORMAL_COMPLETION; 1427 actlen = 0; 1428 for (i = 0, sitd = xfer->hcpriv;; 1429 sitd = next) { 1430 next = sitd->nextitd; 1431 if (OHCI_ITD_GET_CC(O32TOH(sitd-> 1432 itd.itd_flags)) != OHCI_CC_NO_ERROR) 1433 xfer->status = USBD_IOERROR; 1434 /* For input, update frlengths with actual */ 1435 /* XXX anything necessary for output? */ 1436 if (uedir == UE_DIR_IN && 1437 xfer->status == USBD_NORMAL_COMPLETION) { 1438 iframes = OHCI_ITD_GET_FC(O32TOH( 1439 sitd->itd.itd_flags)); 1440 for (j = 0; j < iframes; i++, j++) { 1441 len = O16TOH(sitd-> 1442 itd.itd_offset[j]); 1443 if ((OHCI_ITD_PSW_GET_CC(len) & 1444 OHCI_CC_NOT_ACCESSED_MASK) 1445 == OHCI_CC_NOT_ACCESSED) 1446 len = 0; 1447 else 1448 len = OHCI_ITD_PSW_LENGTH(len); 1449 xfer->frlengths[i] = len; 1450 actlen += len; 1451 } 1452 } 1453 if (sitd->flags & OHCI_CALL_DONE) 1454 break; 1455 ohci_free_sitd(sc, sitd); 1456 } 1457 ohci_free_sitd(sc, sitd); 1458 if (uedir == UE_DIR_IN && 1459 xfer->status == USBD_NORMAL_COMPLETION) 1460 xfer->actlen = actlen; 1461 xfer->hcpriv = NULL; 1462 1463 s = splusb(); 1464 usb_transfer_complete(xfer); 1465 splx(s); 1466 } 1467 } 1468 1469 #ifdef USB_USE_SOFTINTR 1470 if (sc->sc_softwake) { 1471 sc->sc_softwake = 0; 1472 wakeup(&sc->sc_softwake); 1473 } 1474 #endif /* USB_USE_SOFTINTR */ 1475 1476 sc->sc_bus.intr_context--; 1477 DPRINTFN(10,("ohci_softintr: done:\n")); 1478 } 1479 1480 void 1481 ohci_device_ctrl_done(usbd_xfer_handle xfer) 1482 { 1483 DPRINTFN(10,("ohci_device_ctrl_done: xfer=%p\n", xfer)); 1484 1485 #ifdef DIAGNOSTIC 1486 if (!(xfer->rqflags & URQ_REQUEST)) { 1487 panic("ohci_device_ctrl_done: not a request"); 1488 } 1489 #endif 1490 } 1491 1492 void 1493 ohci_device_intr_done(usbd_xfer_handle xfer) 1494 { 1495 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1496 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1497 ohci_soft_ed_t *sed = opipe->sed; 1498 ohci_soft_td_t *data, *tail; 1499 1500 1501 DPRINTFN(10,("ohci_device_intr_done: xfer=%p, actlen=%d\n", 1502 xfer, xfer->actlen)); 1503 1504 if (xfer->pipe->repeat) { 1505 data = opipe->tail.td; 1506 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 1507 if (tail == NULL) { 1508 xfer->status = USBD_NOMEM; 1509 return; 1510 } 1511 tail->xfer = NULL; 1512 1513 data->td.td_flags = HTOO32( 1514 OHCI_TD_IN | OHCI_TD_NOCC | 1515 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 1516 if (xfer->flags & USBD_SHORT_XFER_OK) 1517 data->td.td_flags |= HTOO32(OHCI_TD_R); 1518 data->td.td_cbp = HTOO32(DMAADDR(&xfer->dmabuf, 0)); 1519 data->nexttd = tail; 1520 data->td.td_nexttd = HTOO32(tail->physaddr); 1521 data->td.td_be = HTOO32(O32TOH(data->td.td_cbp) + 1522 xfer->length - 1); 1523 data->len = xfer->length; 1524 data->xfer = xfer; 1525 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1526 xfer->hcpriv = data; 1527 xfer->actlen = 0; 1528 1529 sed->ed.ed_tailp = HTOO32(tail->physaddr); 1530 opipe->tail.td = tail; 1531 } 1532 } 1533 1534 void 1535 ohci_device_bulk_done(usbd_xfer_handle xfer) 1536 { 1537 DPRINTFN(10,("ohci_device_bulk_done: xfer=%p, actlen=%d\n", 1538 xfer, xfer->actlen)); 1539 } 1540 1541 void 1542 ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer) 1543 { 1544 usbd_pipe_handle pipe; 1545 u_char *p; 1546 int i, m; 1547 int hstatus; 1548 1549 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1550 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n", 1551 sc, xfer, hstatus)); 1552 1553 if (xfer == NULL) { 1554 /* Just ignore the change. */ 1555 return; 1556 } 1557 1558 pipe = xfer->pipe; 1559 1560 p = KERNADDR(&xfer->dmabuf, 0); 1561 m = min(sc->sc_noport, xfer->length * 8 - 1); 1562 memset(p, 0, xfer->length); 1563 for (i = 1; i <= m; i++) { 1564 /* Pick out CHANGE bits from the status reg. */ 1565 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1566 p[i/8] |= 1 << (i%8); 1567 } 1568 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 1569 xfer->actlen = xfer->length; 1570 xfer->status = USBD_NORMAL_COMPLETION; 1571 1572 usb_transfer_complete(xfer); 1573 } 1574 1575 void 1576 ohci_root_intr_done(usbd_xfer_handle xfer) 1577 { 1578 } 1579 1580 void 1581 ohci_root_ctrl_done(usbd_xfer_handle xfer) 1582 { 1583 } 1584 1585 /* 1586 * Wait here until controller claims to have an interrupt. 1587 * Then call ohci_intr and return. Use timeout to avoid waiting 1588 * too long. 1589 */ 1590 void 1591 ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer) 1592 { 1593 int timo; 1594 u_int32_t intrs; 1595 1596 xfer->status = USBD_IN_PROGRESS; 1597 for (timo = xfer->timeout; timo >= 0; timo--) { 1598 usb_delay_ms(&sc->sc_bus, 1); 1599 if (sc->sc_dying) 1600 break; 1601 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 1602 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs)); 1603 #ifdef OHCI_DEBUG 1604 if (ohcidebug > 15) 1605 ohci_dumpregs(sc); 1606 #endif 1607 if (intrs) { 1608 ohci_intr1(sc); 1609 if (xfer->status != USBD_IN_PROGRESS) 1610 return; 1611 } 1612 } 1613 1614 /* Timeout */ 1615 DPRINTF(("ohci_waitintr: timeout\n")); 1616 xfer->status = USBD_TIMEOUT; 1617 usb_transfer_complete(xfer); 1618 /* XXX should free TD */ 1619 } 1620 1621 void 1622 ohci_poll(struct usbd_bus *bus) 1623 { 1624 ohci_softc_t *sc = (ohci_softc_t *)bus; 1625 #ifdef OHCI_DEBUG 1626 static int last; 1627 int new; 1628 new = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1629 if (new != last) { 1630 DPRINTFN(10,("ohci_poll: intrs=0x%04x\n", new)); 1631 last = new; 1632 } 1633 #endif 1634 1635 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) 1636 ohci_intr1(sc); 1637 } 1638 1639 usbd_status 1640 ohci_device_request(usbd_xfer_handle xfer) 1641 { 1642 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1643 usb_device_request_t *req = &xfer->request; 1644 usbd_device_handle dev = opipe->pipe.device; 1645 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1646 int addr = dev->address; 1647 ohci_soft_td_t *setup, *stat, *next, *tail; 1648 ohci_soft_ed_t *sed; 1649 int isread; 1650 int len; 1651 usbd_status err; 1652 int s; 1653 1654 isread = req->bmRequestType & UT_READ; 1655 len = UGETW(req->wLength); 1656 1657 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 1658 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 1659 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1660 UGETW(req->wIndex), len, addr, 1661 opipe->pipe.endpoint->edesc->bEndpointAddress)); 1662 1663 setup = opipe->tail.td; 1664 stat = ohci_alloc_std(sc); 1665 if (stat == NULL) { 1666 err = USBD_NOMEM; 1667 goto bad1; 1668 } 1669 tail = ohci_alloc_std(sc); 1670 if (tail == NULL) { 1671 err = USBD_NOMEM; 1672 goto bad2; 1673 } 1674 tail->xfer = NULL; 1675 1676 sed = opipe->sed; 1677 opipe->u.ctl.length = len; 1678 1679 /* Update device address and length since they may have changed 1680 during the setup of the control pipe in usbd_new_device(). */ 1681 /* XXX This only needs to be done once, but it's too early in open. */ 1682 /* XXXX Should not touch ED here! */ 1683 sed->ed.ed_flags = HTOO32( 1684 (O32TOH(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) | 1685 OHCI_ED_SET_FA(addr) | 1686 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize))); 1687 1688 next = stat; 1689 1690 /* Set up data transaction */ 1691 if (len != 0) { 1692 ohci_soft_td_t *std = stat; 1693 1694 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 1695 std, &stat); 1696 stat = stat->nexttd; /* point at free TD */ 1697 if (err) 1698 goto bad3; 1699 /* Start toggle at 1 and then use the carried toggle. */ 1700 std->td.td_flags &= HTOO32(~OHCI_TD_TOGGLE_MASK); 1701 std->td.td_flags |= HTOO32(OHCI_TD_TOGGLE_1); 1702 } 1703 1704 memcpy(KERNADDR(&opipe->u.ctl.reqdma, 0), req, sizeof *req); 1705 1706 setup->td.td_flags = HTOO32(OHCI_TD_SETUP | OHCI_TD_NOCC | 1707 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1708 setup->td.td_cbp = HTOO32(DMAADDR(&opipe->u.ctl.reqdma, 0)); 1709 setup->nexttd = next; 1710 setup->td.td_nexttd = HTOO32(next->physaddr); 1711 setup->td.td_be = HTOO32(O32TOH(setup->td.td_cbp) + sizeof *req - 1); 1712 setup->len = 0; 1713 setup->xfer = xfer; 1714 setup->flags = 0; 1715 xfer->hcpriv = setup; 1716 1717 stat->td.td_flags = HTOO32( 1718 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | 1719 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1720 stat->td.td_cbp = 0; 1721 stat->nexttd = tail; 1722 stat->td.td_nexttd = HTOO32(tail->physaddr); 1723 stat->td.td_be = 0; 1724 stat->flags = OHCI_CALL_DONE; 1725 stat->len = 0; 1726 stat->xfer = xfer; 1727 1728 #ifdef OHCI_DEBUG 1729 if (ohcidebug > 5) { 1730 DPRINTF(("ohci_device_request:\n")); 1731 ohci_dump_ed(sc, sed); 1732 ohci_dump_tds(sc, setup); 1733 } 1734 #endif 1735 1736 /* Insert ED in schedule */ 1737 s = splusb(); 1738 sed->ed.ed_tailp = HTOO32(tail->physaddr); 1739 opipe->tail.td = tail; 1740 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1741 if (xfer->timeout && !sc->sc_bus.use_polling) { 1742 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 1743 ohci_timeout, xfer); 1744 } 1745 splx(s); 1746 1747 #ifdef OHCI_DEBUG 1748 if (ohcidebug > 20) { 1749 delay(10000); 1750 DPRINTF(("ohci_device_request: status=%x\n", 1751 OREAD4(sc, OHCI_COMMAND_STATUS))); 1752 ohci_dumpregs(sc); 1753 printf("ctrl head:\n"); 1754 ohci_dump_ed(sc, sc->sc_ctrl_head); 1755 printf("sed:\n"); 1756 ohci_dump_ed(sc, sed); 1757 ohci_dump_tds(sc, setup); 1758 } 1759 #endif 1760 1761 return (USBD_NORMAL_COMPLETION); 1762 1763 bad3: 1764 ohci_free_std(sc, tail); 1765 bad2: 1766 ohci_free_std(sc, stat); 1767 bad1: 1768 return (err); 1769 } 1770 1771 /* 1772 * Add an ED to the schedule. Called at splusb(). 1773 */ 1774 void 1775 ohci_add_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1776 { 1777 DPRINTFN(8,("ohci_add_ed: sed=%p head=%p\n", sed, head)); 1778 1779 SPLUSBCHECK; 1780 sed->next = head->next; 1781 sed->ed.ed_nexted = head->ed.ed_nexted; 1782 head->next = sed; 1783 head->ed.ed_nexted = HTOO32(sed->physaddr); 1784 } 1785 1786 /* 1787 * Remove an ED from the schedule. Called at splusb(). 1788 */ 1789 void 1790 ohci_rem_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1791 { 1792 ohci_soft_ed_t *p; 1793 1794 SPLUSBCHECK; 1795 1796 /* XXX */ 1797 for (p = head; p != NULL && p->next != sed; p = p->next) 1798 ; 1799 if (p == NULL) 1800 panic("ohci_rem_ed: ED not found"); 1801 p->next = sed->next; 1802 p->ed.ed_nexted = sed->ed.ed_nexted; 1803 } 1804 1805 /* 1806 * When a transfer is completed the TD is added to the done queue by 1807 * the host controller. This queue is the processed by software. 1808 * Unfortunately the queue contains the physical address of the TD 1809 * and we have no simple way to translate this back to a kernel address. 1810 * To make the translation possible (and fast) we use a hash table of 1811 * TDs currently in the schedule. The physical address is used as the 1812 * hash value. 1813 */ 1814 1815 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1816 /* Called at splusb() */ 1817 void 1818 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1819 { 1820 int h = HASH(std->physaddr); 1821 1822 SPLUSBCHECK; 1823 1824 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1825 } 1826 1827 /* Called at splusb() */ 1828 void 1829 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1830 { 1831 SPLUSBCHECK; 1832 1833 LIST_REMOVE(std, hnext); 1834 } 1835 1836 ohci_soft_td_t * 1837 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a) 1838 { 1839 int h = HASH(a); 1840 ohci_soft_td_t *std; 1841 1842 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1843 std != NULL; 1844 std = LIST_NEXT(std, hnext)) 1845 if (std->physaddr == a) 1846 return (std); 1847 return (NULL); 1848 } 1849 1850 /* Called at splusb() */ 1851 void 1852 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1853 { 1854 int h = HASH(sitd->physaddr); 1855 1856 SPLUSBCHECK; 1857 1858 DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n", 1859 sitd, (u_long)sitd->physaddr)); 1860 1861 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext); 1862 } 1863 1864 /* Called at splusb() */ 1865 void 1866 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1867 { 1868 SPLUSBCHECK; 1869 1870 DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n", 1871 sitd, (u_long)sitd->physaddr)); 1872 1873 LIST_REMOVE(sitd, hnext); 1874 } 1875 1876 ohci_soft_itd_t * 1877 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a) 1878 { 1879 int h = HASH(a); 1880 ohci_soft_itd_t *sitd; 1881 1882 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]); 1883 sitd != NULL; 1884 sitd = LIST_NEXT(sitd, hnext)) 1885 if (sitd->physaddr == a) 1886 return (sitd); 1887 return (NULL); 1888 } 1889 1890 void 1891 ohci_timeout(void *addr) 1892 { 1893 struct ohci_xfer *oxfer = addr; 1894 struct ohci_pipe *opipe = (struct ohci_pipe *)oxfer->xfer.pipe; 1895 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1896 1897 DPRINTF(("ohci_timeout: oxfer=%p\n", oxfer)); 1898 1899 if (sc->sc_dying) { 1900 ohci_abort_xfer(&oxfer->xfer, USBD_TIMEOUT); 1901 return; 1902 } 1903 1904 /* Execute the abort in a process context. */ 1905 usb_init_task(&oxfer->abort_task, ohci_timeout_task, addr); 1906 usb_add_task(oxfer->xfer.pipe->device, &oxfer->abort_task, 1907 USB_TASKQ_HC); 1908 } 1909 1910 void 1911 ohci_timeout_task(void *addr) 1912 { 1913 usbd_xfer_handle xfer = addr; 1914 int s; 1915 1916 DPRINTF(("ohci_timeout_task: xfer=%p\n", xfer)); 1917 1918 s = splusb(); 1919 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1920 splx(s); 1921 } 1922 1923 #ifdef OHCI_DEBUG 1924 void 1925 ohci_dump_tds(ohci_softc_t *sc, ohci_soft_td_t *std) 1926 { 1927 for (; std; std = std->nexttd) 1928 ohci_dump_td(sc, std); 1929 } 1930 1931 void 1932 ohci_dump_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1933 { 1934 char sbuf[128]; 1935 1936 bitmask_snprintf((u_int32_t)O32TOH(std->td.td_flags), 1937 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 1938 sbuf, sizeof(sbuf)); 1939 1940 printf("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx " 1941 "nexttd=0x%08lx be=0x%08lx\n", 1942 std, (u_long)std->physaddr, sbuf, 1943 OHCI_TD_GET_DI(O32TOH(std->td.td_flags)), 1944 OHCI_TD_GET_EC(O32TOH(std->td.td_flags)), 1945 OHCI_TD_GET_CC(O32TOH(std->td.td_flags)), 1946 (u_long)O32TOH(std->td.td_cbp), 1947 (u_long)O32TOH(std->td.td_nexttd), 1948 (u_long)O32TOH(std->td.td_be)); 1949 } 1950 1951 void 1952 ohci_dump_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1953 { 1954 int i; 1955 1956 printf("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n" 1957 "bp0=0x%08lx next=0x%08lx be=0x%08lx\n", 1958 sitd, (u_long)sitd->physaddr, 1959 OHCI_ITD_GET_SF(O32TOH(sitd->itd.itd_flags)), 1960 OHCI_ITD_GET_DI(O32TOH(sitd->itd.itd_flags)), 1961 OHCI_ITD_GET_FC(O32TOH(sitd->itd.itd_flags)), 1962 OHCI_ITD_GET_CC(O32TOH(sitd->itd.itd_flags)), 1963 (u_long)O32TOH(sitd->itd.itd_bp0), 1964 (u_long)O32TOH(sitd->itd.itd_nextitd), 1965 (u_long)O32TOH(sitd->itd.itd_be)); 1966 for (i = 0; i < OHCI_ITD_NOFFSET; i++) 1967 printf("offs[%d]=0x%04x ", i, 1968 (u_int)O16TOH(sitd->itd.itd_offset[i])); 1969 printf("\n"); 1970 } 1971 1972 void 1973 ohci_dump_itds(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1974 { 1975 for (; sitd; sitd = sitd->nextitd) 1976 ohci_dump_itd(sc, sitd); 1977 } 1978 1979 void 1980 ohci_dump_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 1981 { 1982 char sbuf[128], sbuf2[128]; 1983 1984 bitmask_snprintf((u_int32_t)O32TOH(sed->ed.ed_flags), 1985 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO", 1986 sbuf, sizeof(sbuf)); 1987 bitmask_snprintf((u_int32_t)O32TOH(sed->ed.ed_headp), 1988 "\20\1HALT\2CARRY", sbuf2, sizeof(sbuf2)); 1989 1990 printf("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d flags=%s\ntailp=0x%08lx " 1991 "headflags=%s headp=0x%08lx nexted=0x%08lx\n", 1992 sed, (u_long)sed->physaddr, 1993 OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)), 1994 OHCI_ED_GET_EN(O32TOH(sed->ed.ed_flags)), 1995 OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)), sbuf, 1996 (u_long)O32TOH(sed->ed.ed_tailp), sbuf2, 1997 (u_long)O32TOH(sed->ed.ed_headp), 1998 (u_long)O32TOH(sed->ed.ed_nexted)); 1999 } 2000 #endif 2001 2002 usbd_status 2003 ohci_open(usbd_pipe_handle pipe) 2004 { 2005 usbd_device_handle dev = pipe->device; 2006 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2007 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 2008 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2009 u_int8_t addr = dev->address; 2010 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 2011 ohci_soft_ed_t *sed; 2012 ohci_soft_td_t *std; 2013 ohci_soft_itd_t *sitd; 2014 ohci_physaddr_t tdphys; 2015 u_int32_t fmt; 2016 usbd_status err; 2017 int s; 2018 int ival; 2019 2020 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 2021 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 2022 2023 if (sc->sc_dying) 2024 return (USBD_IOERROR); 2025 2026 std = NULL; 2027 sed = NULL; 2028 2029 if (addr == sc->sc_addr) { 2030 switch (ed->bEndpointAddress) { 2031 case USB_CONTROL_ENDPOINT: 2032 pipe->methods = &ohci_root_ctrl_methods; 2033 break; 2034 case UE_DIR_IN | OHCI_INTR_ENDPT: 2035 pipe->methods = &ohci_root_intr_methods; 2036 break; 2037 default: 2038 return (USBD_INVAL); 2039 } 2040 } else { 2041 sed = ohci_alloc_sed(sc); 2042 if (sed == NULL) 2043 goto bad0; 2044 opipe->sed = sed; 2045 if (xfertype == UE_ISOCHRONOUS) { 2046 sitd = ohci_alloc_sitd(sc); 2047 if (sitd == NULL) 2048 goto bad1; 2049 opipe->tail.itd = sitd; 2050 tdphys = sitd->physaddr; 2051 fmt = OHCI_ED_FORMAT_ISO; 2052 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 2053 fmt |= OHCI_ED_DIR_IN; 2054 else 2055 fmt |= OHCI_ED_DIR_OUT; 2056 } else { 2057 std = ohci_alloc_std(sc); 2058 if (std == NULL) 2059 goto bad1; 2060 opipe->tail.td = std; 2061 tdphys = std->physaddr; 2062 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD; 2063 } 2064 sed->ed.ed_flags = HTOO32( 2065 OHCI_ED_SET_FA(addr) | 2066 OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) | 2067 (dev->speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) | 2068 fmt | 2069 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 2070 sed->ed.ed_headp = sed->ed.ed_tailp = HTOO32(tdphys); 2071 2072 switch (xfertype) { 2073 case UE_CONTROL: 2074 pipe->methods = &ohci_device_ctrl_methods; 2075 err = usb_allocmem(&sc->sc_bus, 2076 sizeof(usb_device_request_t), 2077 0, &opipe->u.ctl.reqdma); 2078 if (err) 2079 goto bad; 2080 s = splusb(); 2081 ohci_add_ed(sc, sed, sc->sc_ctrl_head); 2082 splx(s); 2083 break; 2084 case UE_INTERRUPT: 2085 pipe->methods = &ohci_device_intr_methods; 2086 ival = pipe->interval; 2087 if (ival == USBD_DEFAULT_INTERVAL) 2088 ival = ed->bInterval; 2089 return (ohci_device_setintr(sc, opipe, ival)); 2090 case UE_ISOCHRONOUS: 2091 pipe->methods = &ohci_device_isoc_methods; 2092 return (ohci_setup_isoc(pipe)); 2093 case UE_BULK: 2094 pipe->methods = &ohci_device_bulk_methods; 2095 s = splusb(); 2096 ohci_add_ed(sc, sed, sc->sc_bulk_head); 2097 splx(s); 2098 break; 2099 } 2100 } 2101 return (USBD_NORMAL_COMPLETION); 2102 2103 bad: 2104 if (std != NULL) 2105 ohci_free_std(sc, std); 2106 bad1: 2107 if (sed != NULL) 2108 ohci_free_sed(sc, sed); 2109 bad0: 2110 return (USBD_NOMEM); 2111 2112 } 2113 2114 /* 2115 * Close a reqular pipe. 2116 * Assumes that there are no pending transactions. 2117 */ 2118 void 2119 ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head) 2120 { 2121 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2122 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2123 ohci_soft_ed_t *sed = opipe->sed; 2124 int s; 2125 2126 s = splusb(); 2127 #ifdef DIAGNOSTIC 2128 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 2129 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2130 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) { 2131 ohci_soft_td_t *std; 2132 std = ohci_hash_find_td(sc, O32TOH(sed->ed.ed_headp)); 2133 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 2134 "tl=0x%x pipe=%p, std=%p\n", sed, 2135 (int)O32TOH(sed->ed.ed_headp), 2136 (int)O32TOH(sed->ed.ed_tailp), 2137 pipe, std); 2138 #ifdef USB_DEBUG 2139 usbd_dump_pipe(&opipe->pipe); 2140 #endif 2141 #ifdef OHCI_DEBUG 2142 ohci_dump_ed(sc, sed); 2143 if (std) 2144 ohci_dump_td(sc, std); 2145 #endif 2146 usb_delay_ms(&sc->sc_bus, 2); 2147 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2148 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) 2149 printf("ohci_close_pipe: pipe still not empty\n"); 2150 } 2151 #endif 2152 ohci_rem_ed(sed, head); 2153 /* Make sure the host controller is not touching this ED */ 2154 usb_delay_ms(&sc->sc_bus, 1); 2155 splx(s); 2156 ohci_free_sed(sc, opipe->sed); 2157 } 2158 2159 /* 2160 * Abort a device request. 2161 * If this routine is called at splusb() it guarantees that the request 2162 * will be removed from the hardware scheduling and that the callback 2163 * for it will be called with USBD_CANCELLED status. 2164 * It's impossible to guarantee that the requested transfer will not 2165 * have happened since the hardware runs concurrently. 2166 * If the transaction has already happened we rely on the ordinary 2167 * interrupt processing to process it. 2168 */ 2169 void 2170 ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2171 { 2172 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2173 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 2174 ohci_soft_ed_t *sed = opipe->sed; 2175 ohci_soft_td_t *p, *n; 2176 ohci_physaddr_t headp; 2177 int s, hit; 2178 int wake; 2179 2180 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p sed=%p\n", xfer, opipe,sed)); 2181 2182 if (sc->sc_dying) { 2183 /* If we're dying, just do the software part. */ 2184 s = splusb(); 2185 xfer->status = status; /* make software ignore it */ 2186 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 2187 usb_transfer_complete(xfer); 2188 splx(s); 2189 return; 2190 } 2191 2192 if (xfer->device->bus->intr_context || !curproc) 2193 panic("ohci_abort_xfer: not in process context"); 2194 2195 /* 2196 * If an abort is already in progress then just wait for it to 2197 * complete and return. 2198 */ 2199 if (xfer->hcflags & UXFER_ABORTING) { 2200 DPRINTFN(2, ("ohci_abort_xfer: already aborting\n")); 2201 #ifdef DIAGNOSTIC 2202 if (status == USBD_TIMEOUT) 2203 printf("0hci_abort_xfer: TIMEOUT while aborting\n"); 2204 #endif 2205 /* Override the status which might be USBD_TIMEOUT. */ 2206 xfer->status = status; 2207 DPRINTFN(2, ("ohci_abort_xfer: waiting for abort to finish\n")); 2208 xfer->hcflags |= UXFER_ABORTWAIT; 2209 while (xfer->hcflags & UXFER_ABORTING) 2210 tsleep(&xfer->hcflags, PZERO, "ohciaw", 0); 2211 return; 2212 } 2213 xfer->hcflags |= UXFER_ABORTING; 2214 2215 /* 2216 * Step 1: Make interrupt routine and hardware ignore xfer. 2217 */ 2218 s = splusb(); 2219 xfer->status = status; /* make software ignore it */ 2220 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 2221 splx(s); 2222 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed)); 2223 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */ 2224 2225 /* 2226 * Step 2: Wait until we know hardware has finished any possible 2227 * use of the xfer. Also make sure the soft interrupt routine 2228 * has run. 2229 */ 2230 usb_delay_ms(opipe->pipe.device->bus, 20); /* Hardware finishes in 1ms */ 2231 s = splusb(); 2232 #ifdef USB_USE_SOFTINTR 2233 sc->sc_softwake = 1; 2234 #endif /* USB_USE_SOFTINTR */ 2235 usb_schedsoftintr(&sc->sc_bus); 2236 #ifdef USB_USE_SOFTINTR 2237 tsleep(&sc->sc_softwake, PZERO, "ohciab", 0); 2238 #endif /* USB_USE_SOFTINTR */ 2239 splx(s); 2240 2241 /* 2242 * Step 3: Remove any vestiges of the xfer from the hardware. 2243 * The complication here is that the hardware may have executed 2244 * beyond the xfer we're trying to abort. So as we're scanning 2245 * the TDs of this xfer we check if the hardware points to 2246 * any of them. 2247 */ 2248 s = splusb(); /* XXX why? */ 2249 p = xfer->hcpriv; 2250 #ifdef DIAGNOSTIC 2251 if (p == NULL) { 2252 xfer->hcflags &= ~UXFER_ABORTING; /* XXX */ 2253 splx(s); 2254 printf("ohci_abort_xfer: hcpriv is NULL\n"); 2255 return; 2256 } 2257 #endif 2258 #ifdef OHCI_DEBUG 2259 if (ohcidebug > 1) { 2260 DPRINTF(("ohci_abort_xfer: sed=\n")); 2261 ohci_dump_ed(sc, sed); 2262 ohci_dump_tds(sc, p); 2263 } 2264 #endif 2265 headp = O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK; 2266 hit = 0; 2267 for (; p->xfer == xfer; p = n) { 2268 hit |= headp == p->physaddr; 2269 n = p->nexttd; 2270 ohci_free_std(sc, p); 2271 } 2272 /* Zap headp register if hardware pointed inside the xfer. */ 2273 if (hit) { 2274 DPRINTFN(1,("ohci_abort_xfer: set hd=0x%08x, tl=0x%08x\n", 2275 (int)p->physaddr, (int)O32TOH(sed->ed.ed_tailp))); 2276 sed->ed.ed_headp = HTOO32(p->physaddr); /* unlink TDs */ 2277 } else { 2278 DPRINTFN(1,("ohci_abort_xfer: no hit\n")); 2279 } 2280 2281 /* 2282 * Step 4: Turn on hardware again. 2283 */ 2284 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */ 2285 2286 /* 2287 * Step 5: Execute callback. 2288 */ 2289 wake = xfer->hcflags & UXFER_ABORTWAIT; 2290 xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT); 2291 usb_transfer_complete(xfer); 2292 if (wake) 2293 wakeup(&xfer->hcflags); 2294 2295 splx(s); 2296 } 2297 2298 /* 2299 * Data structures and routines to emulate the root hub. 2300 */ 2301 Static usb_device_descriptor_t ohci_devd = { 2302 USB_DEVICE_DESCRIPTOR_SIZE, 2303 UDESC_DEVICE, /* type */ 2304 {0x00, 0x01}, /* USB version */ 2305 UDCLASS_HUB, /* class */ 2306 UDSUBCLASS_HUB, /* subclass */ 2307 UDPROTO_FSHUB, 2308 64, /* max packet */ 2309 {0},{0},{0x00,0x01}, /* device id */ 2310 1,2,0, /* string indicies */ 2311 1 /* # of configurations */ 2312 }; 2313 2314 Static const usb_config_descriptor_t ohci_confd = { 2315 USB_CONFIG_DESCRIPTOR_SIZE, 2316 UDESC_CONFIG, 2317 {USB_CONFIG_DESCRIPTOR_SIZE + 2318 USB_INTERFACE_DESCRIPTOR_SIZE + 2319 USB_ENDPOINT_DESCRIPTOR_SIZE}, 2320 1, 2321 1, 2322 0, 2323 UC_ATTR_MBO | UC_SELF_POWERED, 2324 0 /* max power */ 2325 }; 2326 2327 Static const usb_interface_descriptor_t ohci_ifcd = { 2328 USB_INTERFACE_DESCRIPTOR_SIZE, 2329 UDESC_INTERFACE, 2330 0, 2331 0, 2332 1, 2333 UICLASS_HUB, 2334 UISUBCLASS_HUB, 2335 UIPROTO_FSHUB, 2336 0 2337 }; 2338 2339 Static const usb_endpoint_descriptor_t ohci_endpd = { 2340 .bLength = USB_ENDPOINT_DESCRIPTOR_SIZE, 2341 .bDescriptorType = UDESC_ENDPOINT, 2342 .bEndpointAddress = UE_DIR_IN | OHCI_INTR_ENDPT, 2343 .bmAttributes = UE_INTERRUPT, 2344 .wMaxPacketSize = {8, 0}, /* max packet */ 2345 .bInterval = 255, 2346 }; 2347 2348 Static const usb_hub_descriptor_t ohci_hubd = { 2349 .bDescLength = USB_HUB_DESCRIPTOR_SIZE, 2350 .bDescriptorType = UDESC_HUB, 2351 }; 2352 2353 /* 2354 * Simulate a hardware hub by handling all the necessary requests. 2355 */ 2356 Static usbd_status 2357 ohci_root_ctrl_transfer(usbd_xfer_handle xfer) 2358 { 2359 usbd_status err; 2360 2361 /* Insert last in queue. */ 2362 err = usb_insert_transfer(xfer); 2363 if (err) 2364 return (err); 2365 2366 /* Pipe isn't running, start first */ 2367 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2368 } 2369 2370 Static usbd_status 2371 ohci_root_ctrl_start(usbd_xfer_handle xfer) 2372 { 2373 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2374 usb_device_request_t *req; 2375 void *buf = NULL; 2376 int port, i; 2377 int s, len, value, index, l, totlen = 0; 2378 usb_port_status_t ps; 2379 usb_hub_descriptor_t hubd; 2380 usbd_status err; 2381 u_int32_t v; 2382 2383 if (sc->sc_dying) 2384 return (USBD_IOERROR); 2385 2386 #ifdef DIAGNOSTIC 2387 if (!(xfer->rqflags & URQ_REQUEST)) 2388 /* XXX panic */ 2389 return (USBD_INVAL); 2390 #endif 2391 req = &xfer->request; 2392 2393 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 2394 req->bmRequestType, req->bRequest)); 2395 2396 len = UGETW(req->wLength); 2397 value = UGETW(req->wValue); 2398 index = UGETW(req->wIndex); 2399 2400 if (len != 0) 2401 buf = KERNADDR(&xfer->dmabuf, 0); 2402 2403 #define C(x,y) ((x) | ((y) << 8)) 2404 switch(C(req->bRequest, req->bmRequestType)) { 2405 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 2406 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 2407 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 2408 /* 2409 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 2410 * for the integrated root hub. 2411 */ 2412 break; 2413 case C(UR_GET_CONFIG, UT_READ_DEVICE): 2414 if (len > 0) { 2415 *(u_int8_t *)buf = sc->sc_conf; 2416 totlen = 1; 2417 } 2418 break; 2419 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2420 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 2421 if (len == 0) 2422 break; 2423 switch(value >> 8) { 2424 case UDESC_DEVICE: 2425 if ((value & 0xff) != 0) { 2426 err = USBD_IOERROR; 2427 goto ret; 2428 } 2429 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 2430 USETW(ohci_devd.idVendor, sc->sc_id_vendor); 2431 memcpy(buf, &ohci_devd, l); 2432 break; 2433 case UDESC_CONFIG: 2434 if ((value & 0xff) != 0) { 2435 err = USBD_IOERROR; 2436 goto ret; 2437 } 2438 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 2439 memcpy(buf, &ohci_confd, l); 2440 buf = (char *)buf + l; 2441 len -= l; 2442 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 2443 totlen += l; 2444 memcpy(buf, &ohci_ifcd, l); 2445 buf = (char *)buf + l; 2446 len -= l; 2447 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 2448 totlen += l; 2449 memcpy(buf, &ohci_endpd, l); 2450 break; 2451 case UDESC_STRING: 2452 #define sd ((usb_string_descriptor_t *)buf) 2453 switch (value & 0xff) { 2454 case 0: /* Language table */ 2455 totlen = usb_makelangtbl(sd, len); 2456 break; 2457 case 1: /* Vendor */ 2458 totlen = usb_makestrdesc(sd, len, 2459 sc->sc_vendor); 2460 break; 2461 case 2: /* Product */ 2462 totlen = usb_makestrdesc(sd, len, 2463 "OHCI root hub"); 2464 break; 2465 } 2466 #undef sd 2467 break; 2468 default: 2469 err = USBD_IOERROR; 2470 goto ret; 2471 } 2472 break; 2473 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 2474 if (len > 0) { 2475 *(u_int8_t *)buf = 0; 2476 totlen = 1; 2477 } 2478 break; 2479 case C(UR_GET_STATUS, UT_READ_DEVICE): 2480 if (len > 1) { 2481 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 2482 totlen = 2; 2483 } 2484 break; 2485 case C(UR_GET_STATUS, UT_READ_INTERFACE): 2486 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 2487 if (len > 1) { 2488 USETW(((usb_status_t *)buf)->wStatus, 0); 2489 totlen = 2; 2490 } 2491 break; 2492 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 2493 if (value >= USB_MAX_DEVICES) { 2494 err = USBD_IOERROR; 2495 goto ret; 2496 } 2497 sc->sc_addr = value; 2498 break; 2499 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 2500 if (value != 0 && value != 1) { 2501 err = USBD_IOERROR; 2502 goto ret; 2503 } 2504 sc->sc_conf = value; 2505 break; 2506 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 2507 break; 2508 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 2509 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 2510 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 2511 err = USBD_IOERROR; 2512 goto ret; 2513 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 2514 break; 2515 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 2516 break; 2517 /* Hub requests */ 2518 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2519 break; 2520 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2521 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 2522 "port=%d feature=%d\n", 2523 index, value)); 2524 if (index < 1 || index > sc->sc_noport) { 2525 err = USBD_IOERROR; 2526 goto ret; 2527 } 2528 port = OHCI_RH_PORT_STATUS(index); 2529 switch(value) { 2530 case UHF_PORT_ENABLE: 2531 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2532 break; 2533 case UHF_PORT_SUSPEND: 2534 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2535 break; 2536 case UHF_PORT_POWER: 2537 /* Yes, writing to the LOW_SPEED bit clears power. */ 2538 OWRITE4(sc, port, UPS_LOW_SPEED); 2539 break; 2540 case UHF_C_PORT_CONNECTION: 2541 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2542 break; 2543 case UHF_C_PORT_ENABLE: 2544 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2545 break; 2546 case UHF_C_PORT_SUSPEND: 2547 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2548 break; 2549 case UHF_C_PORT_OVER_CURRENT: 2550 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2551 break; 2552 case UHF_C_PORT_RESET: 2553 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2554 break; 2555 default: 2556 err = USBD_IOERROR; 2557 goto ret; 2558 } 2559 switch(value) { 2560 case UHF_C_PORT_CONNECTION: 2561 case UHF_C_PORT_ENABLE: 2562 case UHF_C_PORT_SUSPEND: 2563 case UHF_C_PORT_OVER_CURRENT: 2564 case UHF_C_PORT_RESET: 2565 /* Enable RHSC interrupt if condition is cleared. */ 2566 if ((OREAD4(sc, port) >> 16) == 0) 2567 ohci_rhsc_enable(sc); 2568 break; 2569 default: 2570 break; 2571 } 2572 break; 2573 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2574 if (len == 0) 2575 break; 2576 if ((value & 0xff) != 0) { 2577 err = USBD_IOERROR; 2578 goto ret; 2579 } 2580 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2581 hubd = ohci_hubd; 2582 hubd.bNbrPorts = sc->sc_noport; 2583 USETW(hubd.wHubCharacteristics, 2584 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2585 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2586 /* XXX overcurrent */ 2587 ); 2588 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2589 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2590 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2591 hubd.DeviceRemovable[i++] = (u_int8_t)v; 2592 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2593 l = min(len, hubd.bDescLength); 2594 totlen = l; 2595 memcpy(buf, &hubd, l); 2596 break; 2597 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2598 if (len != 4) { 2599 err = USBD_IOERROR; 2600 goto ret; 2601 } 2602 memset(buf, 0, len); /* ? XXX */ 2603 totlen = len; 2604 break; 2605 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2606 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 2607 index)); 2608 if (index < 1 || index > sc->sc_noport) { 2609 err = USBD_IOERROR; 2610 goto ret; 2611 } 2612 if (len != 4) { 2613 err = USBD_IOERROR; 2614 goto ret; 2615 } 2616 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2617 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 2618 v)); 2619 USETW(ps.wPortStatus, v); 2620 USETW(ps.wPortChange, v >> 16); 2621 l = min(len, sizeof ps); 2622 memcpy(buf, &ps, l); 2623 totlen = l; 2624 break; 2625 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2626 err = USBD_IOERROR; 2627 goto ret; 2628 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2629 break; 2630 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2631 if (index < 1 || index > sc->sc_noport) { 2632 err = USBD_IOERROR; 2633 goto ret; 2634 } 2635 port = OHCI_RH_PORT_STATUS(index); 2636 switch(value) { 2637 case UHF_PORT_ENABLE: 2638 OWRITE4(sc, port, UPS_PORT_ENABLED); 2639 break; 2640 case UHF_PORT_SUSPEND: 2641 OWRITE4(sc, port, UPS_SUSPEND); 2642 break; 2643 case UHF_PORT_RESET: 2644 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 2645 index)); 2646 OWRITE4(sc, port, UPS_RESET); 2647 for (i = 0; i < 5; i++) { 2648 usb_delay_ms(&sc->sc_bus, 2649 USB_PORT_ROOT_RESET_DELAY); 2650 if (sc->sc_dying) { 2651 err = USBD_IOERROR; 2652 goto ret; 2653 } 2654 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2655 break; 2656 } 2657 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 2658 index, OREAD4(sc, port))); 2659 break; 2660 case UHF_PORT_POWER: 2661 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 2662 "%d\n", index)); 2663 OWRITE4(sc, port, UPS_PORT_POWER); 2664 break; 2665 default: 2666 err = USBD_IOERROR; 2667 goto ret; 2668 } 2669 break; 2670 default: 2671 err = USBD_IOERROR; 2672 goto ret; 2673 } 2674 xfer->actlen = totlen; 2675 err = USBD_NORMAL_COMPLETION; 2676 ret: 2677 xfer->status = err; 2678 s = splusb(); 2679 usb_transfer_complete(xfer); 2680 splx(s); 2681 return (USBD_IN_PROGRESS); 2682 } 2683 2684 /* Abort a root control request. */ 2685 Static void 2686 ohci_root_ctrl_abort(usbd_xfer_handle xfer) 2687 { 2688 /* Nothing to do, all transfers are synchronous. */ 2689 } 2690 2691 /* Close the root pipe. */ 2692 Static void 2693 ohci_root_ctrl_close(usbd_pipe_handle pipe) 2694 { 2695 DPRINTF(("ohci_root_ctrl_close\n")); 2696 /* Nothing to do. */ 2697 } 2698 2699 Static usbd_status 2700 ohci_root_intr_transfer(usbd_xfer_handle xfer) 2701 { 2702 usbd_status err; 2703 2704 /* Insert last in queue. */ 2705 err = usb_insert_transfer(xfer); 2706 if (err) 2707 return (err); 2708 2709 /* Pipe isn't running, start first */ 2710 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2711 } 2712 2713 Static usbd_status 2714 ohci_root_intr_start(usbd_xfer_handle xfer) 2715 { 2716 usbd_pipe_handle pipe = xfer->pipe; 2717 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2718 2719 if (sc->sc_dying) 2720 return (USBD_IOERROR); 2721 2722 sc->sc_intrxfer = xfer; 2723 2724 return (USBD_IN_PROGRESS); 2725 } 2726 2727 /* Abort a root interrupt request. */ 2728 Static void 2729 ohci_root_intr_abort(usbd_xfer_handle xfer) 2730 { 2731 int s; 2732 2733 if (xfer->pipe->intrxfer == xfer) { 2734 DPRINTF(("ohci_root_intr_abort: remove\n")); 2735 xfer->pipe->intrxfer = NULL; 2736 } 2737 xfer->status = USBD_CANCELLED; 2738 s = splusb(); 2739 usb_transfer_complete(xfer); 2740 splx(s); 2741 } 2742 2743 /* Close the root pipe. */ 2744 Static void 2745 ohci_root_intr_close(usbd_pipe_handle pipe) 2746 { 2747 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2748 2749 DPRINTF(("ohci_root_intr_close\n")); 2750 2751 sc->sc_intrxfer = NULL; 2752 } 2753 2754 /************************/ 2755 2756 Static usbd_status 2757 ohci_device_ctrl_transfer(usbd_xfer_handle xfer) 2758 { 2759 usbd_status err; 2760 2761 /* Insert last in queue. */ 2762 err = usb_insert_transfer(xfer); 2763 if (err) 2764 return (err); 2765 2766 /* Pipe isn't running, start first */ 2767 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2768 } 2769 2770 Static usbd_status 2771 ohci_device_ctrl_start(usbd_xfer_handle xfer) 2772 { 2773 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2774 usbd_status err; 2775 2776 if (sc->sc_dying) 2777 return (USBD_IOERROR); 2778 2779 #ifdef DIAGNOSTIC 2780 if (!(xfer->rqflags & URQ_REQUEST)) { 2781 /* XXX panic */ 2782 printf("ohci_device_ctrl_transfer: not a request\n"); 2783 return (USBD_INVAL); 2784 } 2785 #endif 2786 2787 err = ohci_device_request(xfer); 2788 if (err) 2789 return (err); 2790 2791 if (sc->sc_bus.use_polling) 2792 ohci_waitintr(sc, xfer); 2793 return (USBD_IN_PROGRESS); 2794 } 2795 2796 /* Abort a device control request. */ 2797 Static void 2798 ohci_device_ctrl_abort(usbd_xfer_handle xfer) 2799 { 2800 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer)); 2801 ohci_abort_xfer(xfer, USBD_CANCELLED); 2802 } 2803 2804 /* Close a device control pipe. */ 2805 Static void 2806 ohci_device_ctrl_close(usbd_pipe_handle pipe) 2807 { 2808 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2809 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2810 2811 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe)); 2812 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2813 ohci_free_std(sc, opipe->tail.td); 2814 } 2815 2816 /************************/ 2817 2818 Static void 2819 ohci_device_clear_toggle(usbd_pipe_handle pipe) 2820 { 2821 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2822 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2823 2824 opipe->sed->ed.ed_headp &= HTOO32(~OHCI_TOGGLECARRY); 2825 } 2826 2827 Static void 2828 ohci_noop(usbd_pipe_handle pipe) 2829 { 2830 } 2831 2832 Static usbd_status 2833 ohci_device_bulk_transfer(usbd_xfer_handle xfer) 2834 { 2835 usbd_status err; 2836 2837 /* Insert last in queue. */ 2838 err = usb_insert_transfer(xfer); 2839 if (err) 2840 return (err); 2841 2842 /* Pipe isn't running, start first */ 2843 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2844 } 2845 2846 Static usbd_status 2847 ohci_device_bulk_start(usbd_xfer_handle xfer) 2848 { 2849 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2850 usbd_device_handle dev = opipe->pipe.device; 2851 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2852 int addr = dev->address; 2853 ohci_soft_td_t *data, *tail, *tdp; 2854 ohci_soft_ed_t *sed; 2855 int s, len, isread, endpt; 2856 usbd_status err; 2857 2858 if (sc->sc_dying) 2859 return (USBD_IOERROR); 2860 2861 #ifdef DIAGNOSTIC 2862 if (xfer->rqflags & URQ_REQUEST) { 2863 /* XXX panic */ 2864 printf("ohci_device_bulk_start: a request\n"); 2865 return (USBD_INVAL); 2866 } 2867 #endif 2868 2869 len = xfer->length; 2870 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 2871 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2872 sed = opipe->sed; 2873 2874 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d " 2875 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags, 2876 endpt)); 2877 2878 opipe->u.bulk.isread = isread; 2879 opipe->u.bulk.length = len; 2880 2881 /* Update device address */ 2882 sed->ed.ed_flags = HTOO32( 2883 (O32TOH(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) | 2884 OHCI_ED_SET_FA(addr)); 2885 2886 /* Allocate a chain of new TDs (including a new tail). */ 2887 data = opipe->tail.td; 2888 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 2889 data, &tail); 2890 /* We want interrupt at the end of the transfer. */ 2891 tail->td.td_flags &= HTOO32(~OHCI_TD_INTR_MASK); 2892 tail->td.td_flags |= HTOO32(OHCI_TD_SET_DI(1)); 2893 tail->flags |= OHCI_CALL_DONE; 2894 tail = tail->nexttd; /* point at sentinel */ 2895 if (err) 2896 return (err); 2897 2898 tail->xfer = NULL; 2899 xfer->hcpriv = data; 2900 2901 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x " 2902 "td_cbp=0x%08x td_be=0x%08x\n", 2903 (int)O32TOH(sed->ed.ed_flags), 2904 (int)O32TOH(data->td.td_flags), 2905 (int)O32TOH(data->td.td_cbp), 2906 (int)O32TOH(data->td.td_be))); 2907 2908 #ifdef OHCI_DEBUG 2909 if (ohcidebug > 5) { 2910 ohci_dump_ed(sc, sed); 2911 ohci_dump_tds(sc, data); 2912 } 2913 #endif 2914 2915 /* Insert ED in schedule */ 2916 s = splusb(); 2917 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 2918 tdp->xfer = xfer; 2919 } 2920 sed->ed.ed_tailp = HTOO32(tail->physaddr); 2921 opipe->tail.td = tail; 2922 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 2923 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 2924 if (xfer->timeout && !sc->sc_bus.use_polling) { 2925 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2926 ohci_timeout, xfer); 2927 } 2928 2929 #if 0 2930 /* This goes wrong if we are too slow. */ 2931 if (ohcidebug > 10) { 2932 delay(10000); 2933 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2934 OREAD4(sc, OHCI_COMMAND_STATUS))); 2935 ohci_dump_ed(sc, sed); 2936 ohci_dump_tds(sc, data); 2937 } 2938 #endif 2939 2940 splx(s); 2941 2942 return (USBD_IN_PROGRESS); 2943 } 2944 2945 Static void 2946 ohci_device_bulk_abort(usbd_xfer_handle xfer) 2947 { 2948 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer)); 2949 ohci_abort_xfer(xfer, USBD_CANCELLED); 2950 } 2951 2952 /* 2953 * Close a device bulk pipe. 2954 */ 2955 Static void 2956 ohci_device_bulk_close(usbd_pipe_handle pipe) 2957 { 2958 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2959 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2960 2961 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe)); 2962 ohci_close_pipe(pipe, sc->sc_bulk_head); 2963 ohci_free_std(sc, opipe->tail.td); 2964 } 2965 2966 /************************/ 2967 2968 Static usbd_status 2969 ohci_device_intr_transfer(usbd_xfer_handle xfer) 2970 { 2971 usbd_status err; 2972 2973 /* Insert last in queue. */ 2974 err = usb_insert_transfer(xfer); 2975 if (err) 2976 return (err); 2977 2978 /* Pipe isn't running, start first */ 2979 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2980 } 2981 2982 Static usbd_status 2983 ohci_device_intr_start(usbd_xfer_handle xfer) 2984 { 2985 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2986 usbd_device_handle dev = opipe->pipe.device; 2987 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2988 ohci_soft_ed_t *sed = opipe->sed; 2989 ohci_soft_td_t *data, *tail; 2990 int s, len, isread, endpt; 2991 2992 if (sc->sc_dying) 2993 return (USBD_IOERROR); 2994 2995 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d " 2996 "flags=%d priv=%p\n", 2997 xfer, xfer->length, xfer->flags, xfer->priv)); 2998 2999 #ifdef DIAGNOSTIC 3000 if (xfer->rqflags & URQ_REQUEST) 3001 panic("ohci_device_intr_transfer: a request"); 3002 #endif 3003 3004 len = xfer->length; 3005 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 3006 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3007 3008 data = opipe->tail.td; 3009 tail = ohci_alloc_std(sc); 3010 if (tail == NULL) 3011 return (USBD_NOMEM); 3012 tail->xfer = NULL; 3013 3014 data->td.td_flags = HTOO32( 3015 isread ? OHCI_TD_IN : OHCI_TD_OUT | 3016 OHCI_TD_NOCC | 3017 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 3018 if (xfer->flags & USBD_SHORT_XFER_OK) 3019 data->td.td_flags |= HTOO32(OHCI_TD_R); 3020 data->td.td_cbp = HTOO32(DMAADDR(&xfer->dmabuf, 0)); 3021 data->nexttd = tail; 3022 data->td.td_nexttd = HTOO32(tail->physaddr); 3023 data->td.td_be = HTOO32(O32TOH(data->td.td_cbp) + len - 1); 3024 data->len = len; 3025 data->xfer = xfer; 3026 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 3027 xfer->hcpriv = data; 3028 3029 #ifdef OHCI_DEBUG 3030 if (ohcidebug > 5) { 3031 DPRINTF(("ohci_device_intr_transfer:\n")); 3032 ohci_dump_ed(sc, sed); 3033 ohci_dump_tds(sc, data); 3034 } 3035 #endif 3036 3037 /* Insert ED in schedule */ 3038 s = splusb(); 3039 sed->ed.ed_tailp = HTOO32(tail->physaddr); 3040 opipe->tail.td = tail; 3041 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3042 3043 #if 0 3044 /* 3045 * This goes horribly wrong, printing thousands of descriptors, 3046 * because false references are followed due to the fact that the 3047 * TD is gone. 3048 */ 3049 if (ohcidebug > 5) { 3050 usb_delay_ms(&sc->sc_bus, 5); 3051 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 3052 OREAD4(sc, OHCI_COMMAND_STATUS))); 3053 ohci_dump_ed(sc, sed); 3054 ohci_dump_tds(sc, data); 3055 } 3056 #endif 3057 splx(s); 3058 3059 return (USBD_IN_PROGRESS); 3060 } 3061 3062 /* Abort a device control request. */ 3063 Static void 3064 ohci_device_intr_abort(usbd_xfer_handle xfer) 3065 { 3066 if (xfer->pipe->intrxfer == xfer) { 3067 DPRINTF(("ohci_device_intr_abort: remove\n")); 3068 xfer->pipe->intrxfer = NULL; 3069 } 3070 ohci_abort_xfer(xfer, USBD_CANCELLED); 3071 } 3072 3073 /* Close a device interrupt pipe. */ 3074 Static void 3075 ohci_device_intr_close(usbd_pipe_handle pipe) 3076 { 3077 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3078 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3079 int nslots = opipe->u.intr.nslots; 3080 int pos = opipe->u.intr.pos; 3081 int j; 3082 ohci_soft_ed_t *p, *sed = opipe->sed; 3083 int s; 3084 3085 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 3086 pipe, nslots, pos)); 3087 s = splusb(); 3088 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 3089 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 3090 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) 3091 usb_delay_ms(&sc->sc_bus, 2); 3092 3093 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 3094 continue; 3095 #ifdef DIAGNOSTIC 3096 if (p == NULL) 3097 panic("ohci_device_intr_close: ED not found"); 3098 #endif 3099 p->next = sed->next; 3100 p->ed.ed_nexted = sed->ed.ed_nexted; 3101 splx(s); 3102 3103 for (j = 0; j < nslots; j++) 3104 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 3105 3106 ohci_free_std(sc, opipe->tail.td); 3107 ohci_free_sed(sc, opipe->sed); 3108 } 3109 3110 Static usbd_status 3111 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival) 3112 { 3113 int i, j, s, best; 3114 u_int npoll, slow, shigh, nslots; 3115 u_int bestbw, bw; 3116 ohci_soft_ed_t *hsed, *sed = opipe->sed; 3117 3118 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 3119 if (ival == 0) { 3120 printf("ohci_setintr: 0 interval\n"); 3121 return (USBD_INVAL); 3122 } 3123 3124 npoll = OHCI_NO_INTRS; 3125 while (npoll > ival) 3126 npoll /= 2; 3127 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 3128 3129 /* 3130 * We now know which level in the tree the ED must go into. 3131 * Figure out which slot has most bandwidth left over. 3132 * Slots to examine: 3133 * npoll 3134 * 1 0 3135 * 2 1 2 3136 * 4 3 4 5 6 3137 * 8 7 8 9 10 11 12 13 14 3138 * N (N-1) .. (N-1+N-1) 3139 */ 3140 slow = npoll-1; 3141 shigh = slow + npoll; 3142 nslots = OHCI_NO_INTRS / npoll; 3143 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 3144 bw = 0; 3145 for (j = 0; j < nslots; j++) 3146 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 3147 if (bw < bestbw) { 3148 best = i; 3149 bestbw = bw; 3150 } 3151 } 3152 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 3153 best, slow, shigh, bestbw)); 3154 3155 s = splusb(); 3156 hsed = sc->sc_eds[best]; 3157 sed->next = hsed->next; 3158 sed->ed.ed_nexted = hsed->ed.ed_nexted; 3159 hsed->next = sed; 3160 hsed->ed.ed_nexted = HTOO32(sed->physaddr); 3161 splx(s); 3162 3163 for (j = 0; j < nslots; j++) 3164 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 3165 opipe->u.intr.nslots = nslots; 3166 opipe->u.intr.pos = best; 3167 3168 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 3169 return (USBD_NORMAL_COMPLETION); 3170 } 3171 3172 /***********************/ 3173 3174 usbd_status 3175 ohci_device_isoc_transfer(usbd_xfer_handle xfer) 3176 { 3177 usbd_status err; 3178 3179 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer)); 3180 3181 /* Put it on our queue, */ 3182 err = usb_insert_transfer(xfer); 3183 3184 /* bail out on error, */ 3185 if (err && err != USBD_IN_PROGRESS) 3186 return (err); 3187 3188 /* XXX should check inuse here */ 3189 3190 /* insert into schedule, */ 3191 ohci_device_isoc_enter(xfer); 3192 3193 /* and start if the pipe wasn't running */ 3194 if (!err) 3195 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 3196 3197 return (err); 3198 } 3199 3200 void 3201 ohci_device_isoc_enter(usbd_xfer_handle xfer) 3202 { 3203 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3204 usbd_device_handle dev = opipe->pipe.device; 3205 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 3206 ohci_soft_ed_t *sed = opipe->sed; 3207 struct iso *iso = &opipe->u.iso; 3208 ohci_soft_itd_t *sitd, *nsitd; 3209 ohci_physaddr_t buf, offs, noffs, bp0; 3210 int i, ncur, nframes; 3211 int s; 3212 3213 DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p " 3214 "nframes=%d\n", 3215 iso->inuse, iso->next, xfer, xfer->nframes)); 3216 3217 if (sc->sc_dying) 3218 return; 3219 3220 if (iso->next == -1) { 3221 /* Not in use yet, schedule it a few frames ahead. */ 3222 iso->next = O32TOH(sc->sc_hcca->hcca_frame_number) + 5; 3223 DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n", 3224 iso->next)); 3225 } 3226 3227 sitd = opipe->tail.itd; 3228 buf = DMAADDR(&xfer->dmabuf, 0); 3229 bp0 = OHCI_PAGE(buf); 3230 offs = OHCI_PAGE_OFFSET(buf); 3231 nframes = xfer->nframes; 3232 xfer->hcpriv = sitd; 3233 for (i = ncur = 0; i < nframes; i++, ncur++) { 3234 noffs = offs + xfer->frlengths[i]; 3235 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ 3236 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */ 3237 3238 /* Allocate next ITD */ 3239 nsitd = ohci_alloc_sitd(sc); 3240 if (nsitd == NULL) { 3241 /* XXX what now? */ 3242 printf("%s: isoc TD alloc failed\n", 3243 USBDEVNAME(sc->sc_bus.bdev)); 3244 return; 3245 } 3246 3247 /* Fill current ITD */ 3248 sitd->itd.itd_flags = HTOO32( 3249 OHCI_ITD_NOCC | 3250 OHCI_ITD_SET_SF(iso->next) | 3251 OHCI_ITD_SET_DI(6) | /* delay intr a little */ 3252 OHCI_ITD_SET_FC(ncur)); 3253 sitd->itd.itd_bp0 = HTOO32(bp0); 3254 sitd->nextitd = nsitd; 3255 sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr); 3256 sitd->itd.itd_be = HTOO32(bp0 + offs - 1); 3257 sitd->xfer = xfer; 3258 sitd->flags = 0; 3259 3260 sitd = nsitd; 3261 iso->next = iso->next + ncur; 3262 bp0 = OHCI_PAGE(buf + offs); 3263 ncur = 0; 3264 } 3265 sitd->itd.itd_offset[ncur] = HTOO16(OHCI_ITD_MK_OFFS(offs)); 3266 offs = noffs; 3267 } 3268 nsitd = ohci_alloc_sitd(sc); 3269 if (nsitd == NULL) { 3270 /* XXX what now? */ 3271 printf("%s: isoc TD alloc failed\n", 3272 USBDEVNAME(sc->sc_bus.bdev)); 3273 return; 3274 } 3275 /* Fixup last used ITD */ 3276 sitd->itd.itd_flags = HTOO32( 3277 OHCI_ITD_NOCC | 3278 OHCI_ITD_SET_SF(iso->next) | 3279 OHCI_ITD_SET_DI(0) | 3280 OHCI_ITD_SET_FC(ncur)); 3281 sitd->itd.itd_bp0 = HTOO32(bp0); 3282 sitd->nextitd = nsitd; 3283 sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr); 3284 sitd->itd.itd_be = HTOO32(bp0 + offs - 1); 3285 sitd->xfer = xfer; 3286 sitd->flags = OHCI_CALL_DONE; 3287 3288 iso->next = iso->next + ncur; 3289 iso->inuse += nframes; 3290 3291 xfer->actlen = offs; /* XXX pretend we did it all */ 3292 3293 xfer->status = USBD_IN_PROGRESS; 3294 3295 #ifdef OHCI_DEBUG 3296 if (ohcidebug > 5) { 3297 DPRINTF(("ohci_device_isoc_enter: frame=%d\n", 3298 O32TOH(sc->sc_hcca->hcca_frame_number))); 3299 ohci_dump_itds(sc, xfer->hcpriv); 3300 ohci_dump_ed(sc, sed); 3301 } 3302 #endif 3303 3304 s = splusb(); 3305 sed->ed.ed_tailp = HTOO32(nsitd->physaddr); 3306 opipe->tail.itd = nsitd; 3307 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3308 splx(s); 3309 3310 #ifdef OHCI_DEBUG 3311 if (ohcidebug > 5) { 3312 delay(150000); 3313 DPRINTF(("ohci_device_isoc_enter: after frame=%d\n", 3314 O32TOH(sc->sc_hcca->hcca_frame_number))); 3315 ohci_dump_itds(sc, xfer->hcpriv); 3316 ohci_dump_ed(sc, sed); 3317 } 3318 #endif 3319 } 3320 3321 usbd_status 3322 ohci_device_isoc_start(usbd_xfer_handle xfer) 3323 { 3324 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3325 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3326 3327 DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer)); 3328 3329 if (sc->sc_dying) 3330 return (USBD_IOERROR); 3331 3332 #ifdef DIAGNOSTIC 3333 if (xfer->status != USBD_IN_PROGRESS) 3334 printf("ohci_device_isoc_start: not in progress %p\n", xfer); 3335 #endif 3336 3337 /* XXX anything to do? */ 3338 3339 return (USBD_IN_PROGRESS); 3340 } 3341 3342 void 3343 ohci_device_isoc_abort(usbd_xfer_handle xfer) 3344 { 3345 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3346 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3347 ohci_soft_ed_t *sed; 3348 ohci_soft_itd_t *sitd; 3349 int s; 3350 3351 s = splusb(); 3352 3353 DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer)); 3354 3355 /* Transfer is already done. */ 3356 if (xfer->status != USBD_NOT_STARTED && 3357 xfer->status != USBD_IN_PROGRESS) { 3358 splx(s); 3359 printf("ohci_device_isoc_abort: early return\n"); 3360 return; 3361 } 3362 3363 /* Give xfer the requested abort code. */ 3364 xfer->status = USBD_CANCELLED; 3365 3366 sed = opipe->sed; 3367 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */ 3368 3369 sitd = xfer->hcpriv; 3370 #ifdef DIAGNOSTIC 3371 if (sitd == NULL) { 3372 splx(s); 3373 printf("ohci_device_isoc_abort: hcpriv==0\n"); 3374 return; 3375 } 3376 #endif 3377 for (; sitd->xfer == xfer; sitd = sitd->nextitd) { 3378 #ifdef DIAGNOSTIC 3379 DPRINTFN(1,("abort sets done sitd=%p\n", sitd)); 3380 sitd->isdone = 1; 3381 #endif 3382 } 3383 3384 splx(s); 3385 3386 usb_delay_ms(&sc->sc_bus, OHCI_ITD_NOFFSET); 3387 3388 s = splusb(); 3389 3390 /* Run callback. */ 3391 usb_transfer_complete(xfer); 3392 3393 sed->ed.ed_headp = HTOO32(sitd->physaddr); /* unlink TDs */ 3394 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */ 3395 3396 splx(s); 3397 } 3398 3399 void 3400 ohci_device_isoc_done(usbd_xfer_handle xfer) 3401 { 3402 DPRINTFN(1,("ohci_device_isoc_done: xfer=%p\n", xfer)); 3403 } 3404 3405 usbd_status 3406 ohci_setup_isoc(usbd_pipe_handle pipe) 3407 { 3408 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3409 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3410 struct iso *iso = &opipe->u.iso; 3411 int s; 3412 3413 iso->next = -1; 3414 iso->inuse = 0; 3415 3416 s = splusb(); 3417 ohci_add_ed(sc, opipe->sed, sc->sc_isoc_head); 3418 splx(s); 3419 3420 return (USBD_NORMAL_COMPLETION); 3421 } 3422 3423 void 3424 ohci_device_isoc_close(usbd_pipe_handle pipe) 3425 { 3426 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3427 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3428 3429 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe)); 3430 ohci_close_pipe(pipe, sc->sc_isoc_head); 3431 #ifdef DIAGNOSTIC 3432 opipe->tail.itd->isdone = 1; 3433 #endif 3434 ohci_free_sitd(sc, opipe->tail.itd); 3435 } 3436
Indexes created Tue Sep 23 23:09:58 GMT 2025