ohci.c revision 1.19
1 /* $NetBSD: ohci.c,v 1.19 1998/12/29 05:08:57 augustss Exp $ */ 2 3 /* 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (augustss (at) carlstedt.se) at 9 * Carlstedt Research & Technology. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * USB Open Host Controller driver. 42 * 43 * OHCI spec: http://www.intel.com/design/usb/ohci11d.pdf 44 * USB spec: http://www.teleport.com/cgi-bin/mailmerge.cgi/~usb/cgiform.tpl 45 */ 46 47 #include <sys/param.h> 48 #include <sys/systm.h> 49 #include <sys/kernel.h> 50 #include <sys/malloc.h> 51 #if defined(__NetBSD__) 52 #include <sys/device.h> 53 #elif defined(__FreeBSD__) 54 #include <sys/module.h> 55 #include <sys/bus.h> 56 #endif 57 #include <sys/proc.h> 58 #include <sys/queue.h> 59 #include <sys/select.h> 60 61 #include <machine/bus.h> 62 #include <machine/endian.h> 63 64 #include <dev/usb/usb.h> 65 #include <dev/usb/usbdi.h> 66 #include <dev/usb/usbdivar.h> 67 #include <dev/usb/usb_quirks.h> 68 #include <dev/usb/usb_mem.h> 69 70 #include <dev/usb/ohcireg.h> 71 #include <dev/usb/ohcivar.h> 72 73 #if defined(__FreeBSD__) 74 #include <machine/clock.h> 75 #include "dev/usb/queue.addendum.h" 76 77 #define delay(d) DELAY(d) 78 79 #endif 80 81 /* 82 * The OHCI controller is little endian, so on big endian machines 83 * the data strored in memory needs to be swapped. 84 */ 85 #if BYTE_ORDER == BIG_ENDIAN 86 #define LE(x) (bswap32(x)) 87 #else 88 #define LE(x) (x) 89 #endif 90 91 struct ohci_pipe; 92 93 ohci_soft_ed_t *ohci_alloc_sed __P((ohci_softc_t *)); 94 void ohci_free_sed __P((ohci_softc_t *, ohci_soft_ed_t *)); 95 96 ohci_soft_td_t *ohci_alloc_std __P((ohci_softc_t *)); 97 void ohci_free_std __P((ohci_softc_t *, ohci_soft_td_t *)); 98 99 usbd_status ohci_open __P((usbd_pipe_handle)); 100 void ohci_poll __P((struct usbd_bus *)); 101 void ohci_waitintr __P((ohci_softc_t *, usbd_request_handle)); 102 void ohci_rhsc __P((ohci_softc_t *, usbd_request_handle)); 103 void ohci_process_done __P((ohci_softc_t *, ohci_physaddr_t)); 104 void ohci_ii_done __P((ohci_softc_t *, usbd_request_handle)); 105 void ohci_ctrl_done __P((ohci_softc_t *, usbd_request_handle)); 106 void ohci_intr_done __P((ohci_softc_t *, usbd_request_handle)); 107 void ohci_bulk_done __P((ohci_softc_t *, usbd_request_handle)); 108 109 usbd_status ohci_device_request __P((usbd_request_handle reqh)); 110 void ohci_add_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *)); 111 void ohci_rem_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *)); 112 void ohci_hash_add_td __P((ohci_softc_t *, ohci_soft_td_t *)); 113 void ohci_hash_rem_td __P((ohci_softc_t *, ohci_soft_td_t *)); 114 ohci_soft_td_t *ohci_hash_find_td __P((ohci_softc_t *, ohci_physaddr_t)); 115 116 usbd_status ohci_root_ctrl_transfer __P((usbd_request_handle)); 117 usbd_status ohci_root_ctrl_start __P((usbd_request_handle)); 118 void ohci_root_ctrl_abort __P((usbd_request_handle)); 119 void ohci_root_ctrl_close __P((usbd_pipe_handle)); 120 121 usbd_status ohci_root_intr_transfer __P((usbd_request_handle)); 122 usbd_status ohci_root_intr_start __P((usbd_request_handle)); 123 void ohci_root_intr_abort __P((usbd_request_handle)); 124 void ohci_root_intr_close __P((usbd_pipe_handle)); 125 126 usbd_status ohci_device_ctrl_transfer __P((usbd_request_handle)); 127 usbd_status ohci_device_ctrl_start __P((usbd_request_handle)); 128 void ohci_device_ctrl_abort __P((usbd_request_handle)); 129 void ohci_device_ctrl_close __P((usbd_pipe_handle)); 130 131 usbd_status ohci_device_bulk_transfer __P((usbd_request_handle)); 132 usbd_status ohci_device_bulk_start __P((usbd_request_handle)); 133 void ohci_device_bulk_abort __P((usbd_request_handle)); 134 void ohci_device_bulk_close __P((usbd_pipe_handle)); 135 136 usbd_status ohci_device_intr_transfer __P((usbd_request_handle)); 137 usbd_status ohci_device_intr_start __P((usbd_request_handle)); 138 void ohci_device_intr_abort __P((usbd_request_handle)); 139 void ohci_device_intr_close __P((usbd_pipe_handle)); 140 usbd_status ohci_device_setintr __P((ohci_softc_t *sc, 141 struct ohci_pipe *pipe, int ival)); 142 143 int ohci_str __P((usb_string_descriptor_t *, int, char *)); 144 145 void ohci_timeout __P((void *)); 146 void ohci_rhsc_able __P((ohci_softc_t *, int)); 147 148 #ifdef USB_DEBUG 149 ohci_softc_t *thesc; 150 void ohci_dumpregs __P((ohci_softc_t *)); 151 void ohci_dump_tds __P((ohci_soft_td_t *)); 152 void ohci_dump_td __P((ohci_soft_td_t *)); 153 void ohci_dump_ed __P((ohci_soft_ed_t *)); 154 #endif 155 156 #if defined(__NetBSD__) 157 #define OWRITE4(sc, r, x) bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)) 158 #define OREAD4(sc, r) bus_space_read_4((sc)->iot, (sc)->ioh, (r)) 159 #define OREAD2(sc, r) bus_space_read_2((sc)->iot, (sc)->ioh, (r)) 160 #elif defined(__FreeBSD__) 161 #define OWRITE4(sc, r, x) outl((sc)->sc_iobase + (r), (x)) 162 #define OREAD4(sc, r) inl((sc)->sc_iobase + (r)) 163 #define OREAD2(sc, r) inw((sc)->sc_iobase + (r)) 164 #endif 165 166 /* Reverse the bits in a value 0 .. 31 */ 167 static u_int8_t revbits[OHCI_NO_INTRS] = 168 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 169 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 170 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 171 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 172 173 struct ohci_pipe { 174 struct usbd_pipe pipe; 175 ohci_soft_ed_t *sed; 176 ohci_soft_td_t *tail; 177 /* Info needed for different pipe kinds. */ 178 union { 179 /* Control pipe */ 180 struct { 181 usb_dma_t datadma; 182 usb_dma_t reqdma; 183 u_int length; 184 ohci_soft_td_t *setup, *xfer, *stat; 185 } ctl; 186 /* Interrupt pipe */ 187 struct { 188 usb_dma_t datadma; 189 int nslots; 190 int pos; 191 } intr; 192 /* Bulk pipe */ 193 struct { 194 usb_dma_t datadma; 195 u_int length; 196 } bulk; 197 } u; 198 }; 199 200 #define OHCI_INTR_ENDPT 1 201 202 struct usbd_methods ohci_root_ctrl_methods = { 203 ohci_root_ctrl_transfer, 204 ohci_root_ctrl_start, 205 ohci_root_ctrl_abort, 206 ohci_root_ctrl_close, 207 0, 208 }; 209 210 struct usbd_methods ohci_root_intr_methods = { 211 ohci_root_intr_transfer, 212 ohci_root_intr_start, 213 ohci_root_intr_abort, 214 ohci_root_intr_close, 215 0, 216 }; 217 218 struct usbd_methods ohci_device_ctrl_methods = { 219 ohci_device_ctrl_transfer, 220 ohci_device_ctrl_start, 221 ohci_device_ctrl_abort, 222 ohci_device_ctrl_close, 223 0, 224 }; 225 226 struct usbd_methods ohci_device_intr_methods = { 227 ohci_device_intr_transfer, 228 ohci_device_intr_start, 229 ohci_device_intr_abort, 230 ohci_device_intr_close, 231 }; 232 233 struct usbd_methods ohci_device_bulk_methods = { 234 ohci_device_bulk_transfer, 235 ohci_device_bulk_start, 236 ohci_device_bulk_abort, 237 ohci_device_bulk_close, 238 0, 239 }; 240 241 ohci_soft_ed_t * 242 ohci_alloc_sed(sc) 243 ohci_softc_t *sc; 244 { 245 ohci_soft_ed_t *sed; 246 usbd_status r; 247 int i, offs; 248 usb_dma_t dma; 249 250 if (!sc->sc_freeeds) { 251 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 252 sed = malloc(sizeof(ohci_soft_ed_t) * OHCI_ED_CHUNK, 253 M_USBDEV, M_NOWAIT); 254 if (!sed) 255 return 0; 256 r = usb_allocmem(sc->sc_dmatag, OHCI_ED_SIZE * OHCI_ED_CHUNK, 257 OHCI_ED_ALIGN, &dma); 258 if (r != USBD_NORMAL_COMPLETION) { 259 free(sed, M_USBDEV); 260 return 0; 261 } 262 for(i = 0; i < OHCI_ED_CHUNK; i++, sed++) { 263 offs = i * OHCI_ED_SIZE; 264 sed->physaddr = DMAADDR(&dma) + offs; 265 sed->ed = (ohci_ed_t *) 266 ((char *)KERNADDR(&dma) + offs); 267 sed->next = sc->sc_freeeds; 268 sc->sc_freeeds = sed; 269 } 270 } 271 sed = sc->sc_freeeds; 272 sc->sc_freeeds = sed->next; 273 memset(sed->ed, 0, OHCI_ED_SIZE); 274 sed->next = 0; 275 return sed; 276 } 277 278 void 279 ohci_free_sed(sc, sed) 280 ohci_softc_t *sc; 281 ohci_soft_ed_t *sed; 282 { 283 sed->next = sc->sc_freeeds; 284 sc->sc_freeeds = sed; 285 } 286 287 ohci_soft_td_t * 288 ohci_alloc_std(sc) 289 ohci_softc_t *sc; 290 { 291 ohci_soft_td_t *std; 292 usbd_status r; 293 int i, offs; 294 usb_dma_t dma; 295 296 if (!sc->sc_freetds) { 297 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 298 std = malloc(sizeof(ohci_soft_td_t) * OHCI_TD_CHUNK, 299 M_USBDEV, M_NOWAIT); 300 if (!std) 301 return 0; 302 r = usb_allocmem(sc->sc_dmatag, OHCI_TD_SIZE * OHCI_TD_CHUNK, 303 OHCI_TD_ALIGN, &dma); 304 if (r != USBD_NORMAL_COMPLETION) { 305 free(std, M_USBDEV); 306 return 0; 307 } 308 for(i = 0; i < OHCI_TD_CHUNK; i++, std++) { 309 offs = i * OHCI_TD_SIZE; 310 std->physaddr = DMAADDR(&dma) + offs; 311 std->td = (ohci_td_t *) 312 ((char *)KERNADDR(&dma) + offs); 313 std->nexttd = sc->sc_freetds; 314 sc->sc_freetds = std; 315 } 316 } 317 std = sc->sc_freetds; 318 sc->sc_freetds = std->nexttd; 319 memset(std->td, 0, OHCI_TD_SIZE); 320 std->nexttd = 0; 321 return (std); 322 } 323 324 void 325 ohci_free_std(sc, std) 326 ohci_softc_t *sc; 327 ohci_soft_td_t *std; 328 { 329 std->nexttd = sc->sc_freetds; 330 sc->sc_freetds = std; 331 } 332 333 usbd_status 334 ohci_init(sc) 335 ohci_softc_t *sc; 336 { 337 ohci_soft_ed_t *sed, *psed; 338 usbd_status r; 339 int rev; 340 int i; 341 u_int32_t s, ctl, ival, hcr, fm, per; 342 343 DPRINTF(("ohci_init: start\n")); 344 rev = OREAD4(sc, OHCI_REVISION); 345 printf("%s: OHCI version %d.%d%s\n", USBDEVNAME(sc->sc_bus.bdev), 346 OHCI_REV_HI(rev), OHCI_REV_LO(rev), 347 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 348 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 349 printf("%s: unsupported OHCI revision\n", 350 USBDEVNAME(sc->sc_bus.bdev)); 351 return (USBD_INVAL); 352 } 353 354 for (i = 0; i < OHCI_HASH_SIZE; i++) 355 LIST_INIT(&sc->sc_hash_tds[i]); 356 357 /* Allocate the HCCA area. */ 358 r = usb_allocmem(sc->sc_dmatag, OHCI_HCCA_SIZE, 359 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 360 if (r != USBD_NORMAL_COMPLETION) 361 return (r); 362 sc->sc_hcca = (struct ohci_hcca *)KERNADDR(&sc->sc_hccadma); 363 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 364 365 sc->sc_eintrs = OHCI_NORMAL_INTRS; 366 367 sc->sc_ctrl_head = ohci_alloc_sed(sc); 368 if (!sc->sc_ctrl_head) { 369 r = USBD_NOMEM; 370 goto bad1; 371 } 372 sc->sc_ctrl_head->ed->ed_flags |= LE(OHCI_ED_SKIP); 373 sc->sc_bulk_head = ohci_alloc_sed(sc); 374 if (!sc->sc_bulk_head) { 375 r = USBD_NOMEM; 376 goto bad2; 377 } 378 sc->sc_bulk_head->ed->ed_flags |= LE(OHCI_ED_SKIP); 379 380 /* Allocate all the dummy EDs that make up the interrupt tree. */ 381 for (i = 0; i < OHCI_NO_EDS; i++) { 382 sed = ohci_alloc_sed(sc); 383 if (!sed) { 384 while (--i >= 0) 385 ohci_free_sed(sc, sc->sc_eds[i]); 386 r = USBD_NOMEM; 387 goto bad3; 388 } 389 /* All ED fields are set to 0. */ 390 sc->sc_eds[i] = sed; 391 sed->ed->ed_flags |= LE(OHCI_ED_SKIP); 392 if (i != 0) { 393 psed = sc->sc_eds[(i-1) / 2]; 394 sed->next = psed; 395 sed->ed->ed_nexted = LE(psed->physaddr); 396 } 397 } 398 /* 399 * Fill HCCA interrupt table. The bit reversal is to get 400 * the tree set up properly to spread the interrupts. 401 */ 402 for (i = 0; i < OHCI_NO_INTRS; i++) 403 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 404 LE(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 405 406 /* Determine in what context we are running. */ 407 ctl = OREAD4(sc, OHCI_CONTROL); 408 if (ctl & OHCI_IR) { 409 /* SMM active, request change */ 410 DPRINTF(("ohci_init: SMM active, request owner change\n")); 411 s = OREAD4(sc, OHCI_COMMAND_STATUS); 412 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 413 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 414 delay(1000); 415 ctl = OREAD4(sc, OHCI_CONTROL); 416 } 417 if ((ctl & OHCI_IR) == 0) { 418 printf("%s: SMM does not respond, resetting\n", 419 USBDEVNAME(sc->sc_bus.bdev)); 420 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 421 goto reset; 422 } 423 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 424 /* BIOS started controller. */ 425 DPRINTF(("ohci_init: BIOS active\n")); 426 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 427 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL); 428 delay(USB_RESUME_DELAY * 1000); 429 } 430 } else { 431 DPRINTF(("ohci_init: cold started\n")); 432 reset: 433 /* Controller was cold started. */ 434 delay(USB_BUS_RESET_DELAY * 1000); 435 } 436 437 /* 438 * This reset should be necessary according to the OHCI spec, but 439 * without it some controller don't start. 440 */ 441 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 442 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 443 delay(USB_BUS_RESET_DELAY * 1000); 444 445 /* We now own the host controller and the bus has been reset. */ 446 ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL)); 447 448 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 449 /* Nominal time for a reset is 10 us. */ 450 for (i = 0; i < 10; i++) { 451 delay(10); 452 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 453 if (!hcr) 454 break; 455 } 456 if (hcr) { 457 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 458 r = USBD_IOERROR; 459 goto bad3; 460 } 461 #ifdef USB_DEBUG 462 thesc = sc; 463 if (ohcidebug > 15) 464 ohci_dumpregs(sc); 465 #endif 466 467 /* The controller is now in suspend state, we have 2ms to finish. */ 468 469 /* Set up HC registers. */ 470 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma)); 471 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 472 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 473 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 474 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 475 ctl = OREAD4(sc, OHCI_CONTROL); 476 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 477 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 478 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL; 479 /* And finally start it! */ 480 OWRITE4(sc, OHCI_CONTROL, ctl); 481 482 /* 483 * The controller is now OPERATIONAL. Set a some final 484 * registers that should be set earlier, but that the 485 * controller ignores when in the SUSPEND state. 486 */ 487 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 488 fm |= OHCI_FSMPS(ival) | ival; 489 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 490 per = OHCI_PERIODIC(ival); /* 90% periodic */ 491 OWRITE4(sc, OHCI_PERIODIC_START, per); 492 493 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 494 495 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 496 497 #ifdef USB_DEBUG 498 if (ohcidebug > 5) 499 ohci_dumpregs(sc); 500 #endif 501 502 /* Set up the bus struct. */ 503 sc->sc_bus.open_pipe = ohci_open; 504 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 505 sc->sc_bus.do_poll = ohci_poll; 506 507 return (USBD_NORMAL_COMPLETION); 508 509 bad3: 510 ohci_free_sed(sc, sc->sc_ctrl_head); 511 bad2: 512 ohci_free_sed(sc, sc->sc_bulk_head); 513 bad1: 514 usb_freemem(sc->sc_dmatag, &sc->sc_hccadma); 515 return (r); 516 } 517 518 #ifdef USB_DEBUG 519 void ohcidump(void); 520 void ohcidump(void) { ohci_dumpregs(thesc); } 521 522 void 523 ohci_dumpregs(sc) 524 ohci_softc_t *sc; 525 { 526 printf("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 527 OREAD4(sc, OHCI_REVISION), 528 OREAD4(sc, OHCI_CONTROL), 529 OREAD4(sc, OHCI_COMMAND_STATUS)); 530 printf(" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 531 OREAD4(sc, OHCI_INTERRUPT_STATUS), 532 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 533 OREAD4(sc, OHCI_INTERRUPT_DISABLE)); 534 printf(" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 535 OREAD4(sc, OHCI_HCCA), 536 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 537 OREAD4(sc, OHCI_CONTROL_HEAD_ED)); 538 printf(" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 539 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 540 OREAD4(sc, OHCI_BULK_HEAD_ED), 541 OREAD4(sc, OHCI_BULK_CURRENT_ED)); 542 printf(" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 543 OREAD4(sc, OHCI_DONE_HEAD), 544 OREAD4(sc, OHCI_FM_INTERVAL), 545 OREAD4(sc, OHCI_FM_REMAINING)); 546 printf(" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 547 OREAD4(sc, OHCI_FM_NUMBER), 548 OREAD4(sc, OHCI_PERIODIC_START), 549 OREAD4(sc, OHCI_LS_THRESHOLD)); 550 printf(" desca=0x%08x descb=0x%08x stat=0x%08x\n", 551 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 552 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 553 OREAD4(sc, OHCI_RH_STATUS)); 554 printf(" port1=0x%08x port2=0x%08x\n", 555 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 556 OREAD4(sc, OHCI_RH_PORT_STATUS(2))); 557 printf(" HCCA: frame_number=0x%04x done_head=0x%08x\n", 558 LE(sc->sc_hcca->hcca_frame_number), 559 LE(sc->sc_hcca->hcca_done_head)); 560 } 561 #endif 562 563 int 564 ohci_intr(p) 565 void *p; 566 { 567 ohci_softc_t *sc = p; 568 u_int32_t intrs, eintrs; 569 ohci_physaddr_t done; 570 571 /* In case the interrupt occurs before initialization has completed. */ 572 if (sc->sc_hcca == NULL) { 573 #ifdef DIAGNOSTIC 574 printf("ohci_intr: sc->sc_hcca == NULL\n"); 575 #endif 576 return (0); 577 } 578 579 done = LE(sc->sc_hcca->hcca_done_head); 580 if (done != 0) { 581 intrs = OHCI_WDH; 582 if (done & OHCI_DONE_INTRS) 583 intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS); 584 } else 585 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 586 if (!intrs) 587 return (0); 588 intrs &= ~OHCI_MIE; 589 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */ 590 eintrs = intrs & sc->sc_eintrs; 591 if (!eintrs) 592 return (0); 593 594 sc->sc_intrs++; 595 DPRINTFN(7, ("ohci_intr: sc=%p intrs=%x(%x) eintr=%x\n", 596 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 597 (u_int)eintrs)); 598 599 if (eintrs & OHCI_SO) { 600 printf("%s: scheduling overrun\n",USBDEVNAME(sc->sc_bus.bdev)); 601 /* XXX do what */ 602 intrs &= ~OHCI_SO; 603 } 604 if (eintrs & OHCI_WDH) { 605 ohci_process_done(sc, done &~ OHCI_DONE_INTRS); 606 sc->sc_hcca->hcca_done_head = 0; 607 intrs &= ~OHCI_WDH; 608 } 609 if (eintrs & OHCI_RD) { 610 /* XXX process resume detect */ 611 } 612 if (eintrs & OHCI_UE) { 613 printf("%s: unrecoverable error, controller halted\n", 614 USBDEVNAME(sc->sc_bus.bdev)); 615 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 616 /* XXX what else */ 617 } 618 if (eintrs & OHCI_RHSC) { 619 ohci_rhsc(sc, sc->sc_intrreqh); 620 intrs &= ~OHCI_RHSC; 621 622 /* 623 * Disable RHSC interrupt for now, because it will be 624 * on until the port has been reset. 625 */ 626 ohci_rhsc_able(sc, 0); 627 } 628 629 /* Block unprocessed interrupts. XXX */ 630 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, intrs); 631 sc->sc_eintrs &= ~intrs; 632 633 return (1); 634 } 635 636 void 637 ohci_rhsc_able(sc, on) 638 ohci_softc_t *sc; 639 int on; 640 { 641 DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on)); 642 if (on) { 643 sc->sc_eintrs |= OHCI_RHSC; 644 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 645 } else { 646 sc->sc_eintrs &= ~OHCI_RHSC; 647 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC); 648 } 649 } 650 651 #ifdef USB_DEBUG 652 char *ohci_cc_strs[] = { 653 "NO_ERROR", 654 "CRC", 655 "BIT_STUFFING", 656 "DATA_TOGGLE_MISMATCH", 657 "STALL", 658 "DEVICE_NOT_RESPONDING", 659 "PID_CHECK_FAILURE", 660 "UNEXPECTED_PID", 661 "DATA_OVERRUN", 662 "DATA_UNDERRUN", 663 "BUFFER_OVERRUN", 664 "BUFFER_UNDERRUN", 665 "NOT_ACCESSED", 666 }; 667 #endif 668 669 void 670 ohci_process_done(sc, done) 671 ohci_softc_t *sc; 672 ohci_physaddr_t done; 673 { 674 ohci_soft_td_t *std, *sdone; 675 usbd_request_handle reqh; 676 int len, cc; 677 678 DPRINTFN(10,("ohci_process_done: done=0x%08lx\n", (u_long)done)); 679 680 /* Reverse the done list. */ 681 for (sdone = 0; done; done = LE(std->td->td_nexttd)) { 682 std = ohci_hash_find_td(sc, done); 683 std->dnext = sdone; 684 sdone = std; 685 } 686 687 #ifdef USB_DEBUG 688 if (ohcidebug > 10) { 689 printf("ohci_process_done: TD done:\n"); 690 ohci_dump_tds(sdone); 691 } 692 #endif 693 694 for (std = sdone; std; std = std->dnext) { 695 reqh = std->reqh; 696 DPRINTFN(10, ("ohci_process_done: std=%p reqh=%p\n",std,reqh)); 697 cc = OHCI_TD_GET_CC(LE(std->td->td_flags)); 698 if (cc == OHCI_CC_NO_ERROR) { 699 if (std->td->td_cbp == 0) 700 len = std->len; 701 else 702 len = LE(std->td->td_be) - 703 LE(std->td->td_cbp) + 1; 704 reqh->actlen += len; 705 reqh->status = USBD_NORMAL_COMPLETION; 706 /* 707 * Only do a callback on the last stage of a transfer. 708 * Others have hcpriv = 0. 709 */ 710 if (reqh->hcpriv == std) 711 ohci_ii_done(sc, reqh); 712 } else { 713 ohci_soft_td_t *p, *n; 714 struct ohci_pipe *opipe = 715 (struct ohci_pipe *)reqh->pipe; 716 DPRINTFN(-1,("ohci_process_done: error cc=%d (%s)\n", 717 OHCI_TD_GET_CC(LE(std->td->td_flags)), 718 ohci_cc_strs[OHCI_TD_GET_CC(LE(std->td->td_flags))])); 719 /* 720 * Endpoint is halted. First unlink all the TDs 721 * belonging to the failed transfer, and then restart 722 * the endpoint. 723 */ 724 for (p = std->nexttd; p->reqh == reqh; p = n) { 725 n = p->nexttd; 726 ohci_hash_rem_td(sc, p); 727 ohci_free_std(sc, p); 728 } 729 /* clear halt */ 730 opipe->sed->ed->ed_headp = LE(p->physaddr); 731 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 732 733 if (cc == OHCI_CC_STALL) 734 reqh->status = USBD_STALLED; 735 else 736 reqh->status = USBD_IOERROR; 737 ohci_ii_done(sc, reqh); 738 } 739 ohci_hash_rem_td(sc, std); 740 ohci_free_std(sc, std); 741 } 742 } 743 744 void 745 ohci_ii_done(sc, reqh) 746 ohci_softc_t *sc; 747 usbd_request_handle reqh; 748 { 749 switch (reqh->pipe->endpoint->edesc->bmAttributes & UE_XFERTYPE) { 750 case UE_CONTROL: 751 ohci_ctrl_done(sc, reqh); 752 usb_start_next(reqh->pipe); 753 break; 754 case UE_INTERRUPT: 755 ohci_intr_done(sc, reqh); 756 break; 757 case UE_BULK: 758 ohci_bulk_done(sc, reqh); 759 usb_start_next(reqh->pipe); 760 break; 761 case UE_ISOCHRONOUS: 762 printf("ohci_process_done: ISO done?\n"); 763 usb_start_next(reqh->pipe); 764 break; 765 } 766 767 /* And finally execute callback. */ 768 reqh->xfercb(reqh); 769 } 770 771 void 772 ohci_ctrl_done(sc, reqh) 773 ohci_softc_t *sc; 774 usbd_request_handle reqh; 775 { 776 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe; 777 u_int len = opipe->u.ctl.length; 778 usb_dma_t *dma; 779 780 DPRINTFN(10,("ohci_ctrl_done: reqh=%p\n", reqh)); 781 782 if (!reqh->isreq) { 783 panic("ohci_ctrl_done: not a request\n"); 784 return; 785 } 786 787 if (len != 0) { 788 dma = &opipe->u.ctl.datadma; 789 if (reqh->request.bmRequestType & UT_READ) 790 memcpy(reqh->buffer, KERNADDR(dma), len); 791 usb_freemem(sc->sc_dmatag, dma); 792 } 793 usb_untimeout(ohci_timeout, reqh, reqh->timo_handle); 794 } 795 796 void 797 ohci_intr_done(sc, reqh) 798 ohci_softc_t *sc; 799 usbd_request_handle reqh; 800 { 801 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe; 802 usb_dma_t *dma; 803 ohci_soft_ed_t *sed = opipe->sed; 804 ohci_soft_td_t *xfer, *tail; 805 806 807 DPRINTFN(10,("ohci_intr_done: reqh=%p, actlen=%d\n", 808 reqh, reqh->actlen)); 809 810 dma = &opipe->u.intr.datadma; 811 memcpy(reqh->buffer, KERNADDR(dma), reqh->actlen); 812 813 if (reqh->pipe->intrreqh == reqh) { 814 xfer = opipe->tail; 815 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 816 if (!tail) { 817 reqh->status = USBD_NOMEM; 818 return; 819 } 820 tail->reqh = 0; 821 822 xfer->td->td_flags = LE( 823 OHCI_TD_IN | OHCI_TD_NOCC | 824 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 825 if (reqh->flags & USBD_SHORT_XFER_OK) 826 xfer->td->td_flags |= LE(OHCI_TD_R); 827 xfer->td->td_cbp = LE(DMAADDR(dma)); 828 xfer->nexttd = tail; 829 xfer->td->td_nexttd = LE(tail->physaddr); 830 xfer->td->td_be = LE(LE(xfer->td->td_cbp) + reqh->length - 1); 831 xfer->len = reqh->length; 832 xfer->reqh = reqh; 833 834 reqh->actlen = 0; 835 reqh->hcpriv = xfer; 836 837 ohci_hash_add_td(sc, xfer); 838 sed->ed->ed_tailp = LE(tail->physaddr); 839 opipe->tail = tail; 840 } else { 841 usb_freemem(sc->sc_dmatag, dma); 842 usb_start_next(reqh->pipe); 843 } 844 } 845 846 void 847 ohci_bulk_done(sc, reqh) 848 ohci_softc_t *sc; 849 usbd_request_handle reqh; 850 { 851 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe; 852 usb_dma_t *dma; 853 854 855 DPRINTFN(10,("ohci_bulk_done: reqh=%p, actlen=%d\n", 856 reqh, reqh->actlen)); 857 858 dma = &opipe->u.bulk.datadma; 859 if (reqh->request.bmRequestType & UT_READ) 860 memcpy(reqh->buffer, KERNADDR(dma), reqh->actlen); 861 usb_freemem(sc->sc_dmatag, dma); 862 usb_untimeout(ohci_timeout, reqh, reqh->timo_handle); 863 } 864 865 void 866 ohci_rhsc(sc, reqh) 867 ohci_softc_t *sc; 868 usbd_request_handle reqh; 869 { 870 usbd_pipe_handle pipe; 871 struct ohci_pipe *opipe; 872 u_char *p; 873 int i, m; 874 int hstatus; 875 876 hstatus = OREAD4(sc, OHCI_RH_STATUS); 877 DPRINTF(("ohci_rhsc: sc=%p reqh=%p hstatus=0x%08x\n", 878 sc, reqh, hstatus)); 879 880 if (reqh == 0) { 881 /* Just ignore the change. */ 882 return; 883 } 884 885 pipe = reqh->pipe; 886 opipe = (struct ohci_pipe *)pipe; 887 888 p = KERNADDR(&opipe->u.intr.datadma); 889 m = min(sc->sc_noport, reqh->length * 8 - 1); 890 memset(p, 0, reqh->length); 891 for (i = 1; i <= m; i++) { 892 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 893 p[i/8] |= 1 << (i%8); 894 } 895 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 896 reqh->actlen = reqh->length; 897 reqh->status = USBD_NORMAL_COMPLETION; 898 reqh->xfercb(reqh); 899 900 if (reqh->pipe->intrreqh != reqh) { 901 sc->sc_intrreqh = 0; 902 usb_freemem(sc->sc_dmatag, &opipe->u.intr.datadma); 903 usb_start_next(reqh->pipe); 904 } 905 } 906 907 /* 908 * Wait here until controller claims to have an interrupt. 909 * Then call ohci_intr and return. Use timeout to avoid waiting 910 * too long. 911 */ 912 void 913 ohci_waitintr(sc, reqh) 914 ohci_softc_t *sc; 915 usbd_request_handle reqh; 916 { 917 int timo = reqh->timeout; 918 int usecs; 919 u_int32_t intrs; 920 921 reqh->status = USBD_IN_PROGRESS; 922 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 923 usbd_delay_ms(&sc->sc_bus, 1); 924 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 925 DPRINTFN(10,("ohci_waitintr: 0x%04x\n", intrs)); 926 #ifdef USB_DEBUG 927 if (ohcidebug > 15) 928 ohci_dumpregs(sc); 929 #endif 930 if (intrs) { 931 ohci_intr(sc); 932 if (reqh->status != USBD_IN_PROGRESS) 933 return; 934 } 935 } 936 937 /* Timeout */ 938 DPRINTF(("ohci_waitintr: timeout\n")); 939 reqh->status = USBD_TIMEOUT; 940 ohci_ii_done(sc, reqh); 941 /* XXX should free TD */ 942 } 943 944 void 945 ohci_poll(bus) 946 struct usbd_bus *bus; 947 { 948 ohci_softc_t *sc = (ohci_softc_t *)bus; 949 950 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) 951 ohci_intr(sc); 952 } 953 954 usbd_status 955 ohci_device_request(reqh) 956 usbd_request_handle reqh; 957 { 958 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe; 959 usb_device_request_t *req = &reqh->request; 960 usbd_device_handle dev = opipe->pipe.device; 961 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 962 int addr = dev->address; 963 ohci_soft_td_t *setup, *xfer = 0, *stat, *next, *tail; 964 ohci_soft_ed_t *sed; 965 usb_dma_t *dmap; 966 int isread; 967 int len; 968 usbd_status r; 969 int s; 970 971 isread = req->bmRequestType & UT_READ; 972 len = UGETW(req->wLength); 973 974 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 975 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 976 req->bmRequestType, req->bRequest, UGETW(req->wValue), 977 UGETW(req->wIndex), len, addr, 978 opipe->pipe.endpoint->edesc->bEndpointAddress)); 979 980 setup = opipe->tail; 981 stat = ohci_alloc_std(sc); 982 if (!stat) { 983 r = USBD_NOMEM; 984 goto bad1; 985 } 986 tail = ohci_alloc_std(sc); 987 if (!tail) { 988 r = USBD_NOMEM; 989 goto bad2; 990 } 991 tail->reqh = 0; 992 993 sed = opipe->sed; 994 dmap = &opipe->u.ctl.datadma; 995 opipe->u.ctl.length = len; 996 997 /* Update device address and length since they may have changed. */ 998 /* XXX This only needs to be done once, but it's too early in open. */ 999 sed->ed->ed_flags = LE( 1000 (LE(sed->ed->ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) | 1001 OHCI_ED_SET_FA(addr) | 1002 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize))); 1003 1004 /* Set up data transaction */ 1005 if (len != 0) { 1006 xfer = ohci_alloc_std(sc); 1007 if (!xfer) { 1008 r = USBD_NOMEM; 1009 goto bad3; 1010 } 1011 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap); 1012 if (r != USBD_NORMAL_COMPLETION) 1013 goto bad4; 1014 xfer->td->td_flags = LE( 1015 (isread ? OHCI_TD_IN : OHCI_TD_OUT) | OHCI_TD_NOCC | 1016 OHCI_TD_TOGGLE_1 | OHCI_TD_NOINTR | 1017 (reqh->flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0)); 1018 xfer->td->td_cbp = LE(DMAADDR(dmap)); 1019 xfer->nexttd = stat; 1020 xfer->td->td_nexttd = LE(stat->physaddr); 1021 xfer->td->td_be = LE(LE(xfer->td->td_cbp) + len - 1); 1022 xfer->len = len; 1023 xfer->reqh = reqh; 1024 1025 next = xfer; 1026 } else 1027 next = stat; 1028 1029 memcpy(KERNADDR(&opipe->u.ctl.reqdma), req, sizeof *req); 1030 if (!isread && len != 0) 1031 memcpy(KERNADDR(dmap), reqh->buffer, len); 1032 1033 setup->td->td_flags = LE(OHCI_TD_SETUP | OHCI_TD_NOCC | 1034 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1035 setup->td->td_cbp = LE(DMAADDR(&opipe->u.ctl.reqdma)); 1036 setup->nexttd = next; 1037 setup->td->td_nexttd = LE(next->physaddr); 1038 setup->td->td_be = LE(LE(setup->td->td_cbp) + sizeof *req - 1); 1039 setup->len = 0; /* XXX The number of byte we count */ 1040 setup->reqh = reqh; 1041 1042 stat->td->td_flags = LE( 1043 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | OHCI_TD_NOCC | 1044 OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1045 stat->td->td_cbp = 0; 1046 stat->nexttd = tail; 1047 stat->td->td_nexttd = LE(tail->physaddr); 1048 stat->td->td_be = 0; 1049 stat->len = 0; 1050 stat->reqh = reqh; 1051 1052 reqh->actlen = 0; 1053 reqh->hcpriv = stat; 1054 1055 #if USB_DEBUG 1056 if (ohcidebug > 5) { 1057 printf("ohci_device_request:\n"); 1058 ohci_dump_ed(sed); 1059 ohci_dump_tds(setup); 1060 } 1061 #endif 1062 1063 /* Insert ED in schedule */ 1064 s = splusb(); 1065 ohci_hash_add_td(sc, setup); 1066 if (len != 0) 1067 ohci_hash_add_td(sc, xfer); 1068 ohci_hash_add_td(sc, stat); 1069 sed->ed->ed_tailp = LE(tail->physaddr); 1070 opipe->tail = tail; 1071 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1072 if (reqh->timeout && !sc->sc_bus.use_polling) { 1073 usb_timeout(ohci_timeout, reqh, 1074 MS_TO_TICKS(reqh->timeout), reqh->timo_handle); 1075 } 1076 splx(s); 1077 1078 #if USB_DEBUG 1079 if (ohcidebug > 5) { 1080 delay(5000); 1081 printf("ohci_device_request: status=%x\n", 1082 OREAD4(sc, OHCI_COMMAND_STATUS)); 1083 ohci_dump_ed(sed); 1084 ohci_dump_tds(setup); 1085 } 1086 #endif 1087 1088 return (USBD_NORMAL_COMPLETION); 1089 1090 bad4: 1091 ohci_free_std(sc, xfer); 1092 bad3: 1093 ohci_free_std(sc, tail); 1094 bad2: 1095 ohci_free_std(sc, stat); 1096 bad1: 1097 return (r); 1098 } 1099 1100 /* 1101 * Add an ED to the schedule. Called at splusb(). 1102 */ 1103 void 1104 ohci_add_ed(sed, head) 1105 ohci_soft_ed_t *sed; 1106 ohci_soft_ed_t *head; 1107 { 1108 sed->next = head->next; 1109 sed->ed->ed_nexted = head->ed->ed_nexted; 1110 head->next = sed; 1111 head->ed->ed_nexted = LE(sed->physaddr); 1112 } 1113 1114 /* 1115 * Remove an ED from the schedule. Called at splusb(). 1116 */ 1117 void 1118 ohci_rem_ed(sed, head) 1119 ohci_soft_ed_t *sed; 1120 ohci_soft_ed_t *head; 1121 { 1122 ohci_soft_ed_t *p; 1123 1124 /* XXX */ 1125 for (p = head; p && p->next != sed; p = p->next) 1126 ; 1127 if (!p) 1128 panic("ohci_rem_ed: ED not found\n"); 1129 p->next = sed->next; 1130 p->ed->ed_nexted = sed->ed->ed_nexted; 1131 } 1132 1133 /* 1134 * When a transfer is completed the TD is added to the done queue by 1135 * the host controller. This queue is the processed by software. 1136 * Unfortunately the queue contains the physical address of the TD 1137 * and we have no simple way to translate this back to a kernel address. 1138 * To make the translation possible (and fast) we use a hash table of 1139 * TDs currently in the schedule. The physical address is used as the 1140 * hash value. 1141 */ 1142 1143 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1144 /* Called at splusb() */ 1145 void 1146 ohci_hash_add_td(sc, std) 1147 ohci_softc_t *sc; 1148 ohci_soft_td_t *std; 1149 { 1150 int h = HASH(std->physaddr); 1151 1152 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1153 } 1154 1155 /* Called at splusb() */ 1156 void 1157 ohci_hash_rem_td(sc, std) 1158 ohci_softc_t *sc; 1159 ohci_soft_td_t *std; 1160 { 1161 LIST_REMOVE(std, hnext); 1162 } 1163 1164 ohci_soft_td_t * 1165 ohci_hash_find_td(sc, a) 1166 ohci_softc_t *sc; 1167 ohci_physaddr_t a; 1168 { 1169 int h = HASH(a); 1170 ohci_soft_td_t *std; 1171 1172 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1173 std != 0; 1174 std = LIST_NEXT(std, hnext)) 1175 if (std->physaddr == a) 1176 return (std); 1177 panic("ohci_hash_find_td: addr 0x%08lx not found\n", (u_long)a); 1178 } 1179 1180 void 1181 ohci_timeout(addr) 1182 void *addr; 1183 { 1184 #if 0 1185 usbd_request_handle *reqh = addr; 1186 int s; 1187 1188 DPRINTF(("ohci_timeout: reqh=%p\n", reqh)); 1189 s = splusb(); 1190 /* XXX need to inactivate TD before calling interrupt routine */ 1191 ohci_XXX_done(reqh); 1192 splx(s); 1193 #endif 1194 } 1195 1196 #ifdef USB_DEBUG 1197 void 1198 ohci_dump_tds(std) 1199 ohci_soft_td_t *std; 1200 { 1201 for (; std; std = std->nexttd) 1202 ohci_dump_td(std); 1203 } 1204 1205 void 1206 ohci_dump_td(std) 1207 ohci_soft_td_t *std; 1208 { 1209 printf("TD(%p) at %08lx: %b delay=%d ec=%d cc=%d\ncbp=0x%08lx " 1210 "nexttd=0x%08lx be=0x%08lx\n", 1211 std, (u_long)std->physaddr, 1212 (u_long)LE(std->td->td_flags), 1213 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 1214 OHCI_TD_GET_DI(LE(std->td->td_flags)), 1215 OHCI_TD_GET_EC(LE(std->td->td_flags)), 1216 OHCI_TD_GET_CC(LE(std->td->td_flags)), 1217 (u_long)LE(std->td->td_cbp), 1218 (u_long)LE(std->td->td_nexttd), (u_long)LE(std->td->td_be)); 1219 } 1220 1221 void 1222 ohci_dump_ed(sed) 1223 ohci_soft_ed_t *sed; 1224 { 1225 printf("ED(%p) at %08lx: addr=%d endpt=%d maxp=%d %b\ntailp=0x%08lx " 1226 "headp=%b nexted=0x%08lx\n", 1227 sed, (u_long)sed->physaddr, 1228 OHCI_ED_GET_FA(LE(sed->ed->ed_flags)), 1229 OHCI_ED_GET_EN(LE(sed->ed->ed_flags)), 1230 OHCI_ED_GET_MAXP(LE(sed->ed->ed_flags)), 1231 (u_long)LE(sed->ed->ed_flags), 1232 "\20\14OUT\15IN\16LOWSPEED\17SKIP\18ISO", 1233 (u_long)LE(sed->ed->ed_tailp), 1234 (u_long)LE(sed->ed->ed_headp), "\20\1HALT\2CARRY", 1235 (u_long)LE(sed->ed->ed_nexted)); 1236 } 1237 #endif 1238 1239 usbd_status 1240 ohci_open(pipe) 1241 usbd_pipe_handle pipe; 1242 { 1243 usbd_device_handle dev = pipe->device; 1244 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1245 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1246 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1247 u_int8_t addr = dev->address; 1248 ohci_soft_ed_t *sed; 1249 ohci_soft_td_t *std; 1250 usbd_status r; 1251 int s; 1252 1253 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1254 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1255 if (addr == sc->sc_addr) { 1256 switch (ed->bEndpointAddress) { 1257 case USB_CONTROL_ENDPOINT: 1258 pipe->methods = &ohci_root_ctrl_methods; 1259 break; 1260 case UE_IN | OHCI_INTR_ENDPT: 1261 pipe->methods = &ohci_root_intr_methods; 1262 break; 1263 default: 1264 return (USBD_INVAL); 1265 } 1266 } else { 1267 sed = ohci_alloc_sed(sc); 1268 if (sed == 0) 1269 goto bad0; 1270 std = ohci_alloc_std(sc); 1271 if (std == 0) 1272 goto bad1; 1273 opipe->sed = sed; 1274 opipe->tail = std; 1275 sed->ed->ed_flags = LE( 1276 OHCI_ED_SET_FA(addr) | 1277 OHCI_ED_SET_EN(ed->bEndpointAddress) | 1278 OHCI_ED_DIR_TD | 1279 (dev->lowspeed ? OHCI_ED_SPEED : 0) | 1280 ((ed->bmAttributes & UE_XFERTYPE) == UE_ISOCHRONOUS ? 1281 OHCI_ED_FORMAT_ISO : OHCI_ED_FORMAT_GEN) | 1282 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 1283 sed->ed->ed_headp = sed->ed->ed_tailp = LE(std->physaddr); 1284 1285 switch (ed->bmAttributes & UE_XFERTYPE) { 1286 case UE_CONTROL: 1287 pipe->methods = &ohci_device_ctrl_methods; 1288 r = usb_allocmem(sc->sc_dmatag, 1289 sizeof(usb_device_request_t), 1290 0, &opipe->u.ctl.reqdma); 1291 if (r != USBD_NORMAL_COMPLETION) 1292 goto bad; 1293 s = splusb(); 1294 ohci_add_ed(sed, sc->sc_ctrl_head); 1295 splx(s); 1296 break; 1297 case UE_INTERRUPT: 1298 pipe->methods = &ohci_device_intr_methods; 1299 return (ohci_device_setintr(sc, opipe, ed->bInterval)); 1300 case UE_ISOCHRONOUS: 1301 printf("ohci_open: open iso unimplemented\n"); 1302 return (USBD_XXX); 1303 case UE_BULK: 1304 pipe->methods = &ohci_device_bulk_methods; 1305 s = splusb(); 1306 ohci_add_ed(sed, sc->sc_bulk_head); 1307 splx(s); 1308 break; 1309 } 1310 } 1311 return (USBD_NORMAL_COMPLETION); 1312 1313 bad: 1314 ohci_free_std(sc, std); 1315 bad1: 1316 ohci_free_sed(sc, sed); 1317 bad0: 1318 return (USBD_NOMEM); 1319 1320 } 1321 1322 /* 1323 * Data structures and routines to emulate the root hub. 1324 */ 1325 usb_device_descriptor_t ohci_devd = { 1326 USB_DEVICE_DESCRIPTOR_SIZE, 1327 UDESC_DEVICE, /* type */ 1328 {0x00, 0x01}, /* USB version */ 1329 UCLASS_HUB, /* class */ 1330 USUBCLASS_HUB, /* subclass */ 1331 0, /* protocol */ 1332 64, /* max packet */ 1333 {0},{0},{0x00,0x01}, /* device id */ 1334 1,2,0, /* string indicies */ 1335 1 /* # of configurations */ 1336 }; 1337 1338 usb_config_descriptor_t ohci_confd = { 1339 USB_CONFIG_DESCRIPTOR_SIZE, 1340 UDESC_CONFIG, 1341 {USB_CONFIG_DESCRIPTOR_SIZE + 1342 USB_INTERFACE_DESCRIPTOR_SIZE + 1343 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1344 1, 1345 1, 1346 0, 1347 UC_SELF_POWERED, 1348 0 /* max power */ 1349 }; 1350 1351 usb_interface_descriptor_t ohci_ifcd = { 1352 USB_INTERFACE_DESCRIPTOR_SIZE, 1353 UDESC_INTERFACE, 1354 0, 1355 0, 1356 1, 1357 UCLASS_HUB, 1358 USUBCLASS_HUB, 1359 0, 1360 0 1361 }; 1362 1363 usb_endpoint_descriptor_t ohci_endpd = { 1364 USB_ENDPOINT_DESCRIPTOR_SIZE, 1365 UDESC_ENDPOINT, 1366 UE_IN | OHCI_INTR_ENDPT, 1367 UE_INTERRUPT, 1368 {8, 0}, /* max packet */ 1369 255 1370 }; 1371 1372 usb_hub_descriptor_t ohci_hubd = { 1373 USB_HUB_DESCRIPTOR_SIZE, 1374 UDESC_HUB, 1375 0, 1376 {0,0}, 1377 0, 1378 0, 1379 {0}, 1380 }; 1381 1382 int 1383 ohci_str(p, l, s) 1384 usb_string_descriptor_t *p; 1385 int l; 1386 char *s; 1387 { 1388 int i; 1389 1390 if (l == 0) 1391 return (0); 1392 p->bLength = 2 * strlen(s) + 2; 1393 if (l == 1) 1394 return (1); 1395 p->bDescriptorType = UDESC_STRING; 1396 l -= 2; 1397 for (i = 0; s[i] && l > 1; i++, l -= 2) 1398 USETW2(p->bString[i], 0, s[i]); 1399 return (2*i+2); 1400 } 1401 1402 /* 1403 * Simulate a hardware hub by handling all the necessary requests. 1404 */ 1405 usbd_status 1406 ohci_root_ctrl_transfer(reqh) 1407 usbd_request_handle reqh; 1408 { 1409 int s; 1410 usbd_status r; 1411 1412 s = splusb(); 1413 r = usb_insert_transfer(reqh); 1414 splx(s); 1415 if (r != USBD_NORMAL_COMPLETION) 1416 return (r); 1417 else 1418 return (ohci_root_ctrl_start(reqh)); 1419 } 1420 1421 usbd_status 1422 ohci_root_ctrl_start(reqh) 1423 usbd_request_handle reqh; 1424 { 1425 ohci_softc_t *sc = (ohci_softc_t *)reqh->pipe->device->bus; 1426 usb_device_request_t *req; 1427 void *buf; 1428 int port, i; 1429 int len, value, index, l, totlen = 0; 1430 usb_port_status_t ps; 1431 usb_hub_descriptor_t hubd; 1432 usbd_status r; 1433 u_int32_t v; 1434 1435 if (!reqh->isreq) 1436 /* XXX panic */ 1437 return (USBD_INVAL); 1438 req = &reqh->request; 1439 buf = reqh->buffer; 1440 1441 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 1442 req->bmRequestType, req->bRequest)); 1443 1444 len = UGETW(req->wLength); 1445 value = UGETW(req->wValue); 1446 index = UGETW(req->wIndex); 1447 #define C(x,y) ((x) | ((y) << 8)) 1448 switch(C(req->bRequest, req->bmRequestType)) { 1449 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 1450 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 1451 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 1452 /* 1453 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 1454 * for the integrated root hub. 1455 */ 1456 break; 1457 case C(UR_GET_CONFIG, UT_READ_DEVICE): 1458 if (len > 0) { 1459 *(u_int8_t *)buf = sc->sc_conf; 1460 totlen = 1; 1461 } 1462 break; 1463 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 1464 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 1465 switch(value >> 8) { 1466 case UDESC_DEVICE: 1467 if ((value & 0xff) != 0) { 1468 r = USBD_IOERROR; 1469 goto ret; 1470 } 1471 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1472 memcpy(buf, &ohci_devd, l); 1473 break; 1474 case UDESC_CONFIG: 1475 if ((value & 0xff) != 0) { 1476 r = USBD_IOERROR; 1477 goto ret; 1478 } 1479 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 1480 memcpy(buf, &ohci_confd, l); 1481 buf = (char *)buf + l; 1482 len -= l; 1483 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 1484 totlen += l; 1485 memcpy(buf, &ohci_ifcd, l); 1486 buf = (char *)buf + l; 1487 len -= l; 1488 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 1489 totlen += l; 1490 memcpy(buf, &ohci_endpd, l); 1491 break; 1492 case UDESC_STRING: 1493 if (len == 0) 1494 break; 1495 *(u_int8_t *)buf = 0; 1496 totlen = 1; 1497 switch (value & 0xff) { 1498 case 1: /* Vendor */ 1499 totlen = ohci_str(buf, len, sc->sc_vendor); 1500 break; 1501 case 2: /* Product */ 1502 totlen = ohci_str(buf, len, "OHCI root hub"); 1503 break; 1504 } 1505 break; 1506 default: 1507 r = USBD_IOERROR; 1508 goto ret; 1509 } 1510 break; 1511 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 1512 if (len > 0) { 1513 *(u_int8_t *)buf = 0; 1514 totlen = 1; 1515 } 1516 break; 1517 case C(UR_GET_STATUS, UT_READ_DEVICE): 1518 if (len > 1) { 1519 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 1520 totlen = 2; 1521 } 1522 break; 1523 case C(UR_GET_STATUS, UT_READ_INTERFACE): 1524 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 1525 if (len > 1) { 1526 USETW(((usb_status_t *)buf)->wStatus, 0); 1527 totlen = 2; 1528 } 1529 break; 1530 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 1531 if (value >= USB_MAX_DEVICES) { 1532 r = USBD_IOERROR; 1533 goto ret; 1534 } 1535 sc->sc_addr = value; 1536 break; 1537 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 1538 if (value != 0 && value != 1) { 1539 r = USBD_IOERROR; 1540 goto ret; 1541 } 1542 sc->sc_conf = value; 1543 break; 1544 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 1545 break; 1546 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 1547 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 1548 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 1549 r = USBD_IOERROR; 1550 goto ret; 1551 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 1552 break; 1553 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 1554 break; 1555 /* Hub requests */ 1556 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 1557 break; 1558 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 1559 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 1560 "port=%d feature=%d\n", 1561 index, value)); 1562 if (index < 1 || index > sc->sc_noport) { 1563 r = USBD_IOERROR; 1564 goto ret; 1565 } 1566 port = OHCI_RH_PORT_STATUS(index); 1567 switch(value) { 1568 case UHF_PORT_ENABLE: 1569 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 1570 break; 1571 case UHF_PORT_SUSPEND: 1572 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 1573 break; 1574 case UHF_PORT_POWER: 1575 OWRITE4(sc, port, UPS_LOW_SPEED); 1576 break; 1577 case UHF_C_PORT_CONNECTION: 1578 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 1579 break; 1580 case UHF_C_PORT_ENABLE: 1581 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 1582 break; 1583 case UHF_C_PORT_SUSPEND: 1584 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 1585 break; 1586 case UHF_C_PORT_OVER_CURRENT: 1587 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 1588 break; 1589 case UHF_C_PORT_RESET: 1590 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 1591 break; 1592 default: 1593 r = USBD_IOERROR; 1594 goto ret; 1595 } 1596 switch(value) { 1597 case UHF_C_PORT_CONNECTION: 1598 case UHF_C_PORT_ENABLE: 1599 case UHF_C_PORT_SUSPEND: 1600 case UHF_C_PORT_OVER_CURRENT: 1601 case UHF_C_PORT_RESET: 1602 /* Enable RHSC interrupt if condition is cleared. */ 1603 if ((OREAD4(sc, port) >> 16) == 0) 1604 ohci_rhsc_able(sc, 1); 1605 break; 1606 default: 1607 break; 1608 } 1609 break; 1610 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 1611 if (value != 0) { 1612 r = USBD_IOERROR; 1613 goto ret; 1614 } 1615 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 1616 hubd = ohci_hubd; 1617 hubd.bNbrPorts = sc->sc_noport; 1618 USETW(hubd.wHubCharacteristics, 1619 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 1620 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 1621 /* XXX overcurrent */ 1622 ); 1623 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 1624 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 1625 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 1626 hubd.DeviceRemovable[i++] = (u_int8_t)v; 1627 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 1628 l = min(len, hubd.bDescLength); 1629 totlen = l; 1630 memcpy(buf, &hubd, l); 1631 break; 1632 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 1633 if (len != 4) { 1634 r = USBD_IOERROR; 1635 goto ret; 1636 } 1637 memset(buf, 0, len); /* ? XXX */ 1638 totlen = len; 1639 break; 1640 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 1641 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 1642 index)); 1643 if (index < 1 || index > sc->sc_noport) { 1644 r = USBD_IOERROR; 1645 goto ret; 1646 } 1647 if (len != 4) { 1648 r = USBD_IOERROR; 1649 goto ret; 1650 } 1651 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 1652 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 1653 v)); 1654 USETW(ps.wPortStatus, v); 1655 USETW(ps.wPortChange, v >> 16); 1656 l = min(len, sizeof ps); 1657 memcpy(buf, &ps, l); 1658 totlen = l; 1659 break; 1660 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 1661 r = USBD_IOERROR; 1662 goto ret; 1663 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 1664 break; 1665 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 1666 if (index < 1 || index > sc->sc_noport) { 1667 r = USBD_IOERROR; 1668 goto ret; 1669 } 1670 port = OHCI_RH_PORT_STATUS(index); 1671 switch(value) { 1672 case UHF_PORT_ENABLE: 1673 OWRITE4(sc, port, UPS_PORT_ENABLED); 1674 break; 1675 case UHF_PORT_SUSPEND: 1676 OWRITE4(sc, port, UPS_SUSPEND); 1677 break; 1678 case UHF_PORT_RESET: 1679 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 1680 index)); 1681 OWRITE4(sc, port, UPS_RESET); 1682 for (i = 0; i < 10; i++) { 1683 usbd_delay_ms(&sc->sc_bus, 10); 1684 if ((OREAD4(sc, port) & UPS_RESET) == 0) 1685 break; 1686 } 1687 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 1688 index, OREAD4(sc, port))); 1689 break; 1690 case UHF_PORT_POWER: 1691 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 1692 "%d\n", index)); 1693 OWRITE4(sc, port, UPS_PORT_POWER); 1694 break; 1695 default: 1696 r = USBD_IOERROR; 1697 goto ret; 1698 } 1699 break; 1700 default: 1701 r = USBD_IOERROR; 1702 goto ret; 1703 } 1704 reqh->actlen = totlen; 1705 r = USBD_NORMAL_COMPLETION; 1706 ret: 1707 reqh->status = r; 1708 reqh->xfercb(reqh); 1709 usb_start_next(reqh->pipe); 1710 return (USBD_IN_PROGRESS); 1711 } 1712 1713 /* Abort a root control request. */ 1714 void 1715 ohci_root_ctrl_abort(reqh) 1716 usbd_request_handle reqh; 1717 { 1718 /* Nothing to do, all transfers are synchronous. */ 1719 } 1720 1721 /* Close the root pipe. */ 1722 void 1723 ohci_root_ctrl_close(pipe) 1724 usbd_pipe_handle pipe; 1725 { 1726 DPRINTF(("ohci_root_ctrl_close\n")); 1727 } 1728 1729 usbd_status 1730 ohci_root_intr_transfer(reqh) 1731 usbd_request_handle reqh; 1732 { 1733 int s; 1734 usbd_status r; 1735 1736 s = splusb(); 1737 r = usb_insert_transfer(reqh); 1738 splx(s); 1739 if (r != USBD_NORMAL_COMPLETION) 1740 return (r); 1741 else 1742 return (ohci_root_intr_start(reqh)); 1743 } 1744 1745 usbd_status 1746 ohci_root_intr_start(reqh) 1747 usbd_request_handle reqh; 1748 { 1749 usbd_pipe_handle pipe = reqh->pipe; 1750 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 1751 struct ohci_pipe *upipe = (struct ohci_pipe *)pipe; 1752 usb_dma_t *dmap; 1753 usbd_status r; 1754 int len; 1755 1756 len = reqh->length; 1757 dmap = &upipe->u.intr.datadma; 1758 if (len == 0) 1759 return (USBD_INVAL); /* XXX should it be? */ 1760 1761 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap); 1762 if (r != USBD_NORMAL_COMPLETION) 1763 return (r); 1764 sc->sc_intrreqh = reqh; 1765 1766 return (USBD_IN_PROGRESS); 1767 } 1768 1769 /* Abort a root interrupt request. */ 1770 void 1771 ohci_root_intr_abort(reqh) 1772 usbd_request_handle reqh; 1773 { 1774 /* No need to abort. */ 1775 } 1776 1777 /* Close the root pipe. */ 1778 void 1779 ohci_root_intr_close(pipe) 1780 usbd_pipe_handle pipe; 1781 { 1782 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 1783 sc->sc_intrreqh = 0; 1784 1785 DPRINTF(("ohci_root_intr_close\n")); 1786 } 1787 1788 /************************/ 1789 1790 usbd_status 1791 ohci_device_ctrl_transfer(reqh) 1792 usbd_request_handle reqh; 1793 { 1794 int s; 1795 usbd_status r; 1796 1797 s = splusb(); 1798 r = usb_insert_transfer(reqh); 1799 splx(s); 1800 if (r != USBD_NORMAL_COMPLETION) 1801 return (r); 1802 else 1803 return (ohci_device_ctrl_start(reqh)); 1804 } 1805 1806 usbd_status 1807 ohci_device_ctrl_start(reqh) 1808 usbd_request_handle reqh; 1809 { 1810 ohci_softc_t *sc = (ohci_softc_t *)reqh->pipe->device->bus; 1811 usbd_status r; 1812 1813 if (!reqh->isreq) { 1814 /* XXX panic */ 1815 printf("ohci_device_ctrl_transfer: not a request\n"); 1816 return (USBD_INVAL); 1817 } 1818 1819 r = ohci_device_request(reqh); 1820 if (r != USBD_NORMAL_COMPLETION) 1821 return (r); 1822 1823 if (sc->sc_bus.use_polling) 1824 ohci_waitintr(sc, reqh); 1825 return (USBD_IN_PROGRESS); 1826 } 1827 1828 /* Abort a device control request. */ 1829 void 1830 ohci_device_ctrl_abort(reqh) 1831 usbd_request_handle reqh; 1832 { 1833 /* XXX inactivate */ 1834 usbd_delay_ms(reqh->pipe->device->bus, 1); /* make sure it is donw */ 1835 /* XXX call done */ 1836 } 1837 1838 /* Close a device control pipe. */ 1839 void 1840 ohci_device_ctrl_close(pipe) 1841 usbd_pipe_handle pipe; 1842 { 1843 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1844 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 1845 ohci_soft_ed_t *sed = opipe->sed; 1846 int s; 1847 1848 s = splusb(); 1849 sed->ed->ed_flags |= LE(OHCI_ED_SKIP); 1850 if ((LE(sed->ed->ed_tailp) & OHCI_TAILMASK) != LE(sed->ed->ed_headp)) 1851 usbd_delay_ms(&sc->sc_bus, 2); 1852 ohci_rem_ed(sed, sc->sc_ctrl_head); 1853 splx(s); 1854 ohci_free_std(sc, opipe->tail); 1855 ohci_free_sed(sc, opipe->sed); 1856 /* XXX free other resources */ 1857 } 1858 1859 /************************/ 1860 1861 usbd_status 1862 ohci_device_bulk_transfer(reqh) 1863 usbd_request_handle reqh; 1864 { 1865 int s; 1866 usbd_status r; 1867 1868 s = splusb(); 1869 r = usb_insert_transfer(reqh); 1870 splx(s); 1871 if (r != USBD_NORMAL_COMPLETION) 1872 return (r); 1873 else 1874 return (ohci_device_bulk_start(reqh)); 1875 } 1876 1877 usbd_status 1878 ohci_device_bulk_start(reqh) 1879 usbd_request_handle reqh; 1880 { 1881 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe; 1882 usbd_device_handle dev = opipe->pipe.device; 1883 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1884 int addr = dev->address; 1885 ohci_soft_td_t *xfer, *tail; 1886 ohci_soft_ed_t *sed; 1887 usb_dma_t *dmap; 1888 usbd_status r; 1889 int s, len, isread; 1890 1891 if (reqh->isreq) { 1892 /* XXX panic */ 1893 printf("ohci_device_bulk_transfer: a request\n"); 1894 return (USBD_INVAL); 1895 } 1896 1897 len = reqh->length; 1898 dmap = &opipe->u.bulk.datadma; 1899 isread = reqh->pipe->endpoint->edesc->bEndpointAddress & UE_IN; 1900 sed = opipe->sed; 1901 1902 opipe->u.bulk.length = len; 1903 1904 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap); 1905 if (r != USBD_NORMAL_COMPLETION) 1906 goto ret1; 1907 1908 tail = ohci_alloc_std(sc); 1909 if (!tail) { 1910 r = USBD_NOMEM; 1911 goto ret2; 1912 } 1913 tail->reqh = 0; 1914 1915 /* Update device address */ 1916 sed->ed->ed_flags = LE( 1917 (LE(sed->ed->ed_flags) & ~OHCI_ED_ADDRMASK) | 1918 OHCI_ED_SET_FA(addr)); 1919 1920 /* Set up data transaction */ 1921 xfer = opipe->tail; 1922 xfer->td->td_flags = LE( 1923 (isread ? OHCI_TD_IN : OHCI_TD_OUT) | OHCI_TD_NOCC | 1924 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY | 1925 (reqh->flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0)); 1926 xfer->td->td_cbp = LE(DMAADDR(dmap)); 1927 xfer->nexttd = tail; 1928 xfer->td->td_nexttd = LE(tail->physaddr); 1929 xfer->td->td_be = LE(LE(xfer->td->td_cbp) + len - 1); 1930 xfer->len = len; 1931 xfer->reqh = reqh; 1932 1933 reqh->actlen = 0; 1934 reqh->hcpriv = xfer; 1935 1936 if (!isread) 1937 memcpy(KERNADDR(dmap), reqh->buffer, len); 1938 1939 /* Insert ED in schedule */ 1940 s = splusb(); 1941 ohci_hash_add_td(sc, xfer); 1942 sed->ed->ed_tailp = LE(tail->physaddr); 1943 opipe->tail = tail; 1944 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 1945 if (reqh->timeout && !sc->sc_bus.use_polling) { 1946 usb_timeout(ohci_timeout, reqh, 1947 MS_TO_TICKS(reqh->timeout), reqh->timo_handle); 1948 } 1949 splx(s); 1950 1951 return (USBD_IN_PROGRESS); 1952 1953 ret2: 1954 usb_freemem(sc->sc_dmatag, dmap); 1955 ret1: 1956 return (r); 1957 } 1958 1959 /* Abort a device bulk request. */ 1960 void 1961 ohci_device_bulk_abort(reqh) 1962 usbd_request_handle reqh; 1963 { 1964 #if 0 1965 sed->ed->ed_flags |= LE(OHCI_ED_SKIP); 1966 if ((LE(sed->ed->ed_tailp) & OHCI_TAILMASK) != LE(sed->ed->ed_headp)) 1967 usbd_delay_ms(reqh->pipe->device->bus, 2); 1968 #endif 1969 /* XXX inactivate */ 1970 usbd_delay_ms(reqh->pipe->device->bus, 1); /* make sure it is done */ 1971 /* XXX call done */ 1972 } 1973 1974 /* Close a device bulk pipe. */ 1975 void 1976 ohci_device_bulk_close(pipe) 1977 usbd_pipe_handle pipe; 1978 { 1979 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1980 usbd_device_handle dev = opipe->pipe.device; 1981 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1982 int s; 1983 1984 s = splusb(); 1985 ohci_rem_ed(opipe->sed, sc->sc_bulk_head); 1986 splx(s); 1987 ohci_free_std(sc, opipe->tail); 1988 ohci_free_sed(sc, opipe->sed); 1989 /* XXX free other resources */ 1990 } 1991 1992 /************************/ 1993 1994 usbd_status 1995 ohci_device_intr_transfer(reqh) 1996 usbd_request_handle reqh; 1997 { 1998 int s; 1999 usbd_status r; 2000 2001 s = splusb(); 2002 r = usb_insert_transfer(reqh); 2003 splx(s); 2004 if (r != USBD_NORMAL_COMPLETION) 2005 return (r); 2006 else 2007 return (ohci_device_intr_start(reqh)); 2008 } 2009 2010 usbd_status 2011 ohci_device_intr_start(reqh) 2012 usbd_request_handle reqh; 2013 { 2014 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe; 2015 usbd_device_handle dev = opipe->pipe.device; 2016 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2017 ohci_soft_ed_t *sed = opipe->sed; 2018 ohci_soft_td_t *xfer, *tail; 2019 usb_dma_t *dmap; 2020 usbd_status r; 2021 int len; 2022 int s; 2023 2024 DPRINTFN(3, ("ohci_device_intr_transfer: reqh=%p buf=%p len=%d " 2025 "flags=%d priv=%p\n", 2026 reqh, reqh->buffer, reqh->length, reqh->flags, reqh->priv)); 2027 2028 if (reqh->isreq) 2029 panic("ohci_device_intr_transfer: a request\n"); 2030 2031 len = reqh->length; 2032 dmap = &opipe->u.intr.datadma; 2033 if (len == 0) 2034 return (USBD_INVAL); /* XXX should it be? */ 2035 2036 xfer = opipe->tail; 2037 tail = ohci_alloc_std(sc); 2038 if (!tail) { 2039 r = USBD_NOMEM; 2040 goto ret1; 2041 } 2042 tail->reqh = 0; 2043 2044 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap); 2045 if (r != USBD_NORMAL_COMPLETION) 2046 goto ret2; 2047 2048 xfer->td->td_flags = LE( 2049 OHCI_TD_IN | OHCI_TD_NOCC | 2050 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 2051 if (reqh->flags & USBD_SHORT_XFER_OK) 2052 xfer->td->td_flags |= LE(OHCI_TD_R); 2053 xfer->td->td_cbp = LE(DMAADDR(dmap)); 2054 xfer->nexttd = tail; 2055 xfer->td->td_nexttd = LE(tail->physaddr); 2056 xfer->td->td_be = LE(LE(xfer->td->td_cbp) + len - 1); 2057 xfer->len = len; 2058 xfer->reqh = reqh; 2059 2060 reqh->actlen = 0; 2061 reqh->hcpriv = xfer; 2062 2063 #if USB_DEBUG 2064 if (ohcidebug > 5) { 2065 printf("ohci_device_intr_transfer:\n"); 2066 ohci_dump_ed(sed); 2067 ohci_dump_tds(xfer); 2068 } 2069 #endif 2070 2071 /* Insert ED in schedule */ 2072 s = splusb(); 2073 ohci_hash_add_td(sc, xfer); 2074 sed->ed->ed_tailp = LE(tail->physaddr); 2075 opipe->tail = tail; 2076 #if 0 2077 if (reqh->timeout && !sc->sc_bus.use_polling) { 2078 usb_timeout(ohci_timeout, reqh, 2079 MS_TO_TICKS(reqh->timeout), reqh->timo_handle); 2080 } 2081 #endif 2082 sed->ed->ed_flags &= LE(~OHCI_ED_SKIP); 2083 splx(s); 2084 2085 #ifdef USB_DEBUG 2086 if (ohcidebug > 5) { 2087 delay(5000); 2088 printf("ohci_device_intr_transfer: status=%x\n", 2089 OREAD4(sc, OHCI_COMMAND_STATUS)); 2090 ohci_dump_ed(sed); 2091 ohci_dump_tds(xfer); 2092 } 2093 #endif 2094 2095 return (USBD_IN_PROGRESS); 2096 2097 ret2: 2098 ohci_free_std(sc, xfer); 2099 ret1: 2100 return (r); 2101 } 2102 2103 /* Abort a device control request. */ 2104 void 2105 ohci_device_intr_abort(reqh) 2106 usbd_request_handle reqh; 2107 { 2108 /* XXX inactivate */ 2109 usbd_delay_ms(reqh->pipe->device->bus, 1); /* make sure it is done */ 2110 if (reqh->pipe->intrreqh == reqh) { 2111 DPRINTF(("ohci_device_intr_abort: remove\n")); 2112 reqh->pipe->intrreqh = 0; 2113 ohci_intr_done((ohci_softc_t *)reqh->pipe->device->bus, reqh); 2114 } 2115 } 2116 2117 /* Close a device interrupt pipe. */ 2118 void 2119 ohci_device_intr_close(pipe) 2120 usbd_pipe_handle pipe; 2121 { 2122 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2123 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2124 int nslots = opipe->u.intr.nslots; 2125 int pos = opipe->u.intr.pos; 2126 int j; 2127 ohci_soft_ed_t *p, *sed = opipe->sed; 2128 int s; 2129 2130 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 2131 pipe, nslots, pos)); 2132 s = splusb(); 2133 sed->ed->ed_flags |= LE(OHCI_ED_SKIP); 2134 if ((sed->ed->ed_tailp & LE(OHCI_TAILMASK)) != sed->ed->ed_headp) 2135 usbd_delay_ms(&sc->sc_bus, 2); 2136 2137 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 2138 ; 2139 if (!p) 2140 panic("ohci_device_intr_close: ED not found\n"); 2141 p->next = sed->next; 2142 p->ed->ed_nexted = sed->ed->ed_nexted; 2143 splx(s); 2144 2145 for (j = 0; j < nslots; j++) 2146 --sc->sc_bws[pos * nslots + j]; 2147 2148 ohci_free_std(sc, opipe->tail); 2149 ohci_free_sed(sc, opipe->sed); 2150 /* XXX free other resources */ 2151 } 2152 2153 usbd_status 2154 ohci_device_setintr(sc, opipe, ival) 2155 ohci_softc_t *sc; 2156 struct ohci_pipe *opipe; 2157 int ival; 2158 { 2159 int i, j, s, best; 2160 u_int npoll, slow, shigh, nslots; 2161 u_int bestbw, bw; 2162 ohci_soft_ed_t *hsed, *sed = opipe->sed; 2163 2164 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 2165 if (ival == 0) { 2166 printf("ohci_setintr: 0 interval\n"); 2167 return (USBD_INVAL); 2168 } 2169 2170 npoll = OHCI_NO_INTRS; 2171 while (npoll > ival) 2172 npoll /= 2; 2173 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 2174 2175 /* 2176 * We now know which level in the tree the ED must go into. 2177 * Figure out which slot has most bandwidth left over. 2178 * Slots to examine: 2179 * npoll 2180 * 1 0 2181 * 2 1 2 2182 * 4 3 4 5 6 2183 * 8 7 8 9 10 11 12 13 14 2184 * N (N-1) .. (N-1+N-1) 2185 */ 2186 slow = npoll-1; 2187 shigh = slow + npoll; 2188 nslots = OHCI_NO_INTRS / npoll; 2189 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 2190 bw = 0; 2191 for (j = 0; j < nslots; j++) 2192 bw += sc->sc_bws[i * nslots + j]; 2193 if (bw < bestbw) { 2194 best = i; 2195 bestbw = bw; 2196 } 2197 } 2198 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 2199 best, slow, shigh, bestbw)); 2200 2201 s = splusb(); 2202 hsed = sc->sc_eds[best]; 2203 sed->next = hsed->next; 2204 sed->ed->ed_nexted = hsed->ed->ed_nexted; 2205 hsed->next = sed; 2206 hsed->ed->ed_nexted = LE(sed->physaddr); 2207 splx(s); 2208 2209 for (j = 0; j < nslots; j++) 2210 ++sc->sc_bws[best * nslots + j]; 2211 opipe->u.intr.nslots = nslots; 2212 opipe->u.intr.pos = best; 2213 2214 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 2215 return (USBD_NORMAL_COMPLETION); 2216 } 2217 2218
Indexes created Wed Sep 24 05:09:52 GMT 2025