ohci.c revision 1.193
1 /* $NetBSD: ohci.c,v 1.193 2008/05/21 17:19:44 drochner Exp $ */ 2 /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */ 3 4 /* 5 * Copyright (c) 1998, 2004, 2005 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Lennart Augustsson (lennart (at) augustsson.net) at 10 * Carlstedt Research & Technology. 11 * This code is derived from software contributed to The NetBSD Foundation 12 * by Charles M. Hannum. 13 * 14 * Redistribution and use in source and binary forms, with or without 15 * modification, are permitted provided that the following conditions 16 * are met: 17 * 1. Redistributions of source code must retain the above copyright 18 * notice, this list of conditions and the following disclaimer. 19 * 2. Redistributions in binary form must reproduce the above copyright 20 * notice, this list of conditions and the following disclaimer in the 21 * documentation and/or other materials provided with the distribution. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 24 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 25 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 26 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 27 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 31 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 32 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 33 * POSSIBILITY OF SUCH DAMAGE. 34 */ 35 36 /* 37 * USB Open Host Controller driver. 38 * 39 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html 40 * USB spec: http://www.usb.org/developers/docs/usbspec.zip 41 */ 42 43 #include <sys/cdefs.h> 44 __KERNEL_RCSID(0, "$NetBSD: ohci.c,v 1.193 2008/05/21 17:19:44 drochner Exp $"); 45 46 #include <sys/param.h> 47 #include <sys/systm.h> 48 #include <sys/malloc.h> 49 #if defined(__NetBSD__) || defined(__OpenBSD__) 50 #include <sys/kernel.h> 51 #include <sys/device.h> 52 #include <sys/select.h> 53 #include <uvm/uvm_extern.h> 54 #elif defined(__FreeBSD__) 55 #include <sys/module.h> 56 #include <sys/bus.h> 57 #include <machine/bus_pio.h> 58 #include <machine/bus_memio.h> 59 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 60 #include <sys/cpu.h> 61 #endif 62 #endif 63 #include <sys/proc.h> 64 #include <sys/queue.h> 65 66 #include <sys/bus.h> 67 #include <machine/endian.h> 68 69 #include <dev/usb/usb.h> 70 #include <dev/usb/usbdi.h> 71 #include <dev/usb/usbdivar.h> 72 #include <dev/usb/usb_mem.h> 73 #include <dev/usb/usb_quirks.h> 74 75 #include <dev/usb/ohcireg.h> 76 #include <dev/usb/ohcivar.h> 77 #include <dev/usb/usbroothub_subr.h> 78 79 #if defined(__FreeBSD__) 80 #include <machine/clock.h> 81 82 #define delay(d) DELAY(d) 83 #endif 84 85 #if defined(__OpenBSD__) 86 struct cfdriver ohci_cd = { 87 NULL, "ohci", DV_DULL 88 }; 89 #endif 90 91 #ifdef OHCI_DEBUG 92 #define DPRINTF(x) if (ohcidebug) logprintf x 93 #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x 94 int ohcidebug = 0; 95 #ifndef __NetBSD__ 96 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 97 #endif 98 #else 99 #define DPRINTF(x) 100 #define DPRINTFN(n,x) 101 #endif 102 103 #if BYTE_ORDER == BIG_ENDIAN 104 #define SWAP_ENDIAN OHCI_LITTLE_ENDIAN 105 #else 106 #define SWAP_ENDIAN OHCI_BIG_ENDIAN 107 #endif 108 109 #define O16TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap16(val) : val) 110 #define O32TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap32(val) : val) 111 #define HTOO16(val) O16TOH(val) 112 #define HTOO32(val) O32TOH(val) 113 114 struct ohci_pipe; 115 116 Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *); 117 Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *); 118 119 Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *); 120 Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *); 121 122 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *); 123 Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *); 124 125 #if 0 126 Static void ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *, 127 ohci_soft_td_t *); 128 #endif 129 Static usbd_status ohci_alloc_std_chain(struct ohci_pipe *, 130 ohci_softc_t *, int, int, usbd_xfer_handle, 131 ohci_soft_td_t *, ohci_soft_td_t **); 132 133 Static usbd_status ohci_open(usbd_pipe_handle); 134 Static void ohci_poll(struct usbd_bus *); 135 Static void ohci_softintr(void *); 136 Static void ohci_waitintr(ohci_softc_t *, usbd_xfer_handle); 137 Static void ohci_rhsc(ohci_softc_t *, usbd_xfer_handle); 138 139 Static usbd_status ohci_device_request(usbd_xfer_handle xfer); 140 Static void ohci_add_ed(ohci_softc_t *, ohci_soft_ed_t *, 141 ohci_soft_ed_t *); 142 143 Static void ohci_rem_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 144 Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *); 145 Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *); 146 Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t); 147 Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *); 148 Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *); 149 Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t); 150 151 Static usbd_status ohci_setup_isoc(usbd_pipe_handle pipe); 152 Static void ohci_device_isoc_enter(usbd_xfer_handle); 153 154 Static usbd_status ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 155 Static void ohci_freem(struct usbd_bus *, usb_dma_t *); 156 157 Static usbd_xfer_handle ohci_allocx(struct usbd_bus *); 158 Static void ohci_freex(struct usbd_bus *, usbd_xfer_handle); 159 160 Static usbd_status ohci_root_ctrl_transfer(usbd_xfer_handle); 161 Static usbd_status ohci_root_ctrl_start(usbd_xfer_handle); 162 Static void ohci_root_ctrl_abort(usbd_xfer_handle); 163 Static void ohci_root_ctrl_close(usbd_pipe_handle); 164 Static void ohci_root_ctrl_done(usbd_xfer_handle); 165 166 Static usbd_status ohci_root_intr_transfer(usbd_xfer_handle); 167 Static usbd_status ohci_root_intr_start(usbd_xfer_handle); 168 Static void ohci_root_intr_abort(usbd_xfer_handle); 169 Static void ohci_root_intr_close(usbd_pipe_handle); 170 Static void ohci_root_intr_done(usbd_xfer_handle); 171 172 Static usbd_status ohci_device_ctrl_transfer(usbd_xfer_handle); 173 Static usbd_status ohci_device_ctrl_start(usbd_xfer_handle); 174 Static void ohci_device_ctrl_abort(usbd_xfer_handle); 175 Static void ohci_device_ctrl_close(usbd_pipe_handle); 176 Static void ohci_device_ctrl_done(usbd_xfer_handle); 177 178 Static usbd_status ohci_device_bulk_transfer(usbd_xfer_handle); 179 Static usbd_status ohci_device_bulk_start(usbd_xfer_handle); 180 Static void ohci_device_bulk_abort(usbd_xfer_handle); 181 Static void ohci_device_bulk_close(usbd_pipe_handle); 182 Static void ohci_device_bulk_done(usbd_xfer_handle); 183 184 Static usbd_status ohci_device_intr_transfer(usbd_xfer_handle); 185 Static usbd_status ohci_device_intr_start(usbd_xfer_handle); 186 Static void ohci_device_intr_abort(usbd_xfer_handle); 187 Static void ohci_device_intr_close(usbd_pipe_handle); 188 Static void ohci_device_intr_done(usbd_xfer_handle); 189 190 Static usbd_status ohci_device_isoc_transfer(usbd_xfer_handle); 191 Static usbd_status ohci_device_isoc_start(usbd_xfer_handle); 192 Static void ohci_device_isoc_abort(usbd_xfer_handle); 193 Static void ohci_device_isoc_close(usbd_pipe_handle); 194 Static void ohci_device_isoc_done(usbd_xfer_handle); 195 196 Static usbd_status ohci_device_setintr(ohci_softc_t *sc, 197 struct ohci_pipe *pipe, int ival); 198 199 Static void ohci_timeout(void *); 200 Static void ohci_timeout_task(void *); 201 Static void ohci_rhsc_enable(void *); 202 203 Static void ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *); 204 Static void ohci_abort_xfer(usbd_xfer_handle, usbd_status); 205 206 Static void ohci_device_clear_toggle(usbd_pipe_handle pipe); 207 Static void ohci_noop(usbd_pipe_handle pipe); 208 209 #ifdef OHCI_DEBUG 210 Static void ohci_dumpregs(ohci_softc_t *); 211 Static void ohci_dump_tds(ohci_softc_t *, ohci_soft_td_t *); 212 Static void ohci_dump_td(ohci_softc_t *, ohci_soft_td_t *); 213 Static void ohci_dump_ed(ohci_softc_t *, ohci_soft_ed_t *); 214 Static void ohci_dump_itd(ohci_softc_t *, ohci_soft_itd_t *); 215 Static void ohci_dump_itds(ohci_softc_t *, ohci_soft_itd_t *); 216 #endif 217 218 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 219 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 220 #define OWRITE1(sc, r, x) \ 221 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 222 #define OWRITE2(sc, r, x) \ 223 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 224 #define OWRITE4(sc, r, x) \ 225 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 226 static __inline uint8_t 227 OREAD1(ohci_softc_t *sc, bus_size_t r) 228 { 229 230 OBARR(sc); 231 return bus_space_read_1(sc->iot, sc->ioh, r); 232 } 233 234 static __inline uint16_t 235 OREAD2(ohci_softc_t *sc, bus_size_t r) 236 { 237 238 OBARR(sc); 239 return bus_space_read_2(sc->iot, sc->ioh, r); 240 } 241 242 static __inline uint32_t 243 OREAD4(ohci_softc_t *sc, bus_size_t r) 244 { 245 246 OBARR(sc); 247 return bus_space_read_4(sc->iot, sc->ioh, r); 248 } 249 250 /* Reverse the bits in a value 0 .. 31 */ 251 Static u_int8_t revbits[OHCI_NO_INTRS] = 252 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 253 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 254 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 255 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 256 257 struct ohci_pipe { 258 struct usbd_pipe pipe; 259 ohci_soft_ed_t *sed; 260 union { 261 ohci_soft_td_t *td; 262 ohci_soft_itd_t *itd; 263 } tail; 264 /* Info needed for different pipe kinds. */ 265 union { 266 /* Control pipe */ 267 struct { 268 usb_dma_t reqdma; 269 u_int length; 270 ohci_soft_td_t *setup, *data, *stat; 271 } ctl; 272 /* Interrupt pipe */ 273 struct { 274 int nslots; 275 int pos; 276 } intr; 277 /* Bulk pipe */ 278 struct { 279 u_int length; 280 int isread; 281 } bulk; 282 /* Iso pipe */ 283 struct iso { 284 int next, inuse; 285 } iso; 286 } u; 287 }; 288 289 #define OHCI_INTR_ENDPT 1 290 291 Static const struct usbd_bus_methods ohci_bus_methods = { 292 ohci_open, 293 ohci_softintr, 294 ohci_poll, 295 ohci_allocm, 296 ohci_freem, 297 ohci_allocx, 298 ohci_freex, 299 }; 300 301 Static const struct usbd_pipe_methods ohci_root_ctrl_methods = { 302 ohci_root_ctrl_transfer, 303 ohci_root_ctrl_start, 304 ohci_root_ctrl_abort, 305 ohci_root_ctrl_close, 306 ohci_noop, 307 ohci_root_ctrl_done, 308 }; 309 310 Static const struct usbd_pipe_methods ohci_root_intr_methods = { 311 ohci_root_intr_transfer, 312 ohci_root_intr_start, 313 ohci_root_intr_abort, 314 ohci_root_intr_close, 315 ohci_noop, 316 ohci_root_intr_done, 317 }; 318 319 Static const struct usbd_pipe_methods ohci_device_ctrl_methods = { 320 ohci_device_ctrl_transfer, 321 ohci_device_ctrl_start, 322 ohci_device_ctrl_abort, 323 ohci_device_ctrl_close, 324 ohci_noop, 325 ohci_device_ctrl_done, 326 }; 327 328 Static const struct usbd_pipe_methods ohci_device_intr_methods = { 329 ohci_device_intr_transfer, 330 ohci_device_intr_start, 331 ohci_device_intr_abort, 332 ohci_device_intr_close, 333 ohci_device_clear_toggle, 334 ohci_device_intr_done, 335 }; 336 337 Static const struct usbd_pipe_methods ohci_device_bulk_methods = { 338 ohci_device_bulk_transfer, 339 ohci_device_bulk_start, 340 ohci_device_bulk_abort, 341 ohci_device_bulk_close, 342 ohci_device_clear_toggle, 343 ohci_device_bulk_done, 344 }; 345 346 Static const struct usbd_pipe_methods ohci_device_isoc_methods = { 347 ohci_device_isoc_transfer, 348 ohci_device_isoc_start, 349 ohci_device_isoc_abort, 350 ohci_device_isoc_close, 351 ohci_noop, 352 ohci_device_isoc_done, 353 }; 354 355 #if defined(__NetBSD__) || defined(__OpenBSD__) 356 int 357 ohci_activate(device_t self, enum devact act) 358 { 359 struct ohci_softc *sc = device_private(self); 360 int rv = 0; 361 362 switch (act) { 363 case DVACT_ACTIVATE: 364 return (EOPNOTSUPP); 365 366 case DVACT_DEACTIVATE: 367 sc->sc_dying = 1; 368 if (sc->sc_child != NULL) 369 rv = config_deactivate(sc->sc_child); 370 break; 371 } 372 return (rv); 373 } 374 375 void 376 ohci_childdet(device_t self, device_t child) 377 { 378 struct ohci_softc *sc = device_private(self); 379 380 KASSERT(sc->sc_child == child); 381 sc->sc_child = NULL; 382 } 383 384 int 385 ohci_detach(struct ohci_softc *sc, int flags) 386 { 387 int rv = 0; 388 389 if (sc->sc_child != NULL) 390 rv = config_detach(sc->sc_child, flags); 391 392 if (rv != 0) 393 return (rv); 394 395 usb_uncallout(sc->sc_tmo_rhsc, ohci_rhsc_enable, sc); 396 397 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 398 399 /* free data structures XXX */ 400 401 return (rv); 402 } 403 #endif 404 405 ohci_soft_ed_t * 406 ohci_alloc_sed(ohci_softc_t *sc) 407 { 408 ohci_soft_ed_t *sed; 409 usbd_status err; 410 int i, offs; 411 usb_dma_t dma; 412 413 if (sc->sc_freeeds == NULL) { 414 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 415 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 416 OHCI_ED_ALIGN, &dma); 417 if (err) 418 return (0); 419 for(i = 0; i < OHCI_SED_CHUNK; i++) { 420 offs = i * OHCI_SED_SIZE; 421 sed = KERNADDR(&dma, offs); 422 sed->physaddr = DMAADDR(&dma, offs); 423 sed->next = sc->sc_freeeds; 424 sc->sc_freeeds = sed; 425 } 426 } 427 sed = sc->sc_freeeds; 428 sc->sc_freeeds = sed->next; 429 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 430 sed->next = 0; 431 return (sed); 432 } 433 434 void 435 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 436 { 437 sed->next = sc->sc_freeeds; 438 sc->sc_freeeds = sed; 439 } 440 441 ohci_soft_td_t * 442 ohci_alloc_std(ohci_softc_t *sc) 443 { 444 ohci_soft_td_t *std; 445 usbd_status err; 446 int i, offs; 447 usb_dma_t dma; 448 int s; 449 450 if (sc->sc_freetds == NULL) { 451 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 452 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 453 OHCI_TD_ALIGN, &dma); 454 if (err) 455 return (NULL); 456 s = splusb(); 457 for(i = 0; i < OHCI_STD_CHUNK; i++) { 458 offs = i * OHCI_STD_SIZE; 459 std = KERNADDR(&dma, offs); 460 std->physaddr = DMAADDR(&dma, offs); 461 std->nexttd = sc->sc_freetds; 462 sc->sc_freetds = std; 463 } 464 splx(s); 465 } 466 467 s = splusb(); 468 std = sc->sc_freetds; 469 sc->sc_freetds = std->nexttd; 470 memset(&std->td, 0, sizeof(ohci_td_t)); 471 std->nexttd = NULL; 472 std->xfer = NULL; 473 ohci_hash_add_td(sc, std); 474 splx(s); 475 476 return (std); 477 } 478 479 void 480 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std) 481 { 482 int s; 483 484 s = splusb(); 485 ohci_hash_rem_td(sc, std); 486 std->nexttd = sc->sc_freetds; 487 sc->sc_freetds = std; 488 splx(s); 489 } 490 491 usbd_status 492 ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc, 493 int alen, int rd, usbd_xfer_handle xfer, 494 ohci_soft_td_t *sp, ohci_soft_td_t **ep) 495 { 496 ohci_soft_td_t *next, *cur; 497 ohci_physaddr_t dataphys, dataphysend; 498 u_int32_t tdflags; 499 int len, curlen; 500 usb_dma_t *dma = &xfer->dmabuf; 501 u_int16_t flags = xfer->flags; 502 503 DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen)); 504 505 len = alen; 506 cur = sp; 507 dataphys = DMAADDR(dma, 0); 508 dataphysend = OHCI_PAGE(dataphys + len - 1); 509 tdflags = HTOO32( 510 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 511 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) | 512 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR); 513 514 for (;;) { 515 next = ohci_alloc_std(sc); 516 if (next == NULL) 517 goto nomem; 518 519 /* The OHCI hardware can handle at most one page crossing. */ 520 if (OHCI_PAGE(dataphys) == dataphysend || 521 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) { 522 /* we can handle it in this TD */ 523 curlen = len; 524 } else { 525 /* must use multiple TDs, fill as much as possible. */ 526 curlen = 2 * OHCI_PAGE_SIZE - 527 (dataphys & (OHCI_PAGE_SIZE-1)); 528 /* the length must be a multiple of the max size */ 529 curlen -= curlen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize); 530 #ifdef DIAGNOSTIC 531 if (curlen == 0) 532 panic("ohci_alloc_std: curlen == 0"); 533 #endif 534 } 535 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x " 536 "dataphysend=0x%08x len=%d curlen=%d\n", 537 dataphys, dataphysend, 538 len, curlen)); 539 len -= curlen; 540 541 cur->td.td_flags = tdflags; 542 cur->td.td_cbp = HTOO32(dataphys); 543 cur->nexttd = next; 544 cur->td.td_nexttd = HTOO32(next->physaddr); 545 cur->td.td_be = HTOO32(dataphys + curlen - 1); 546 cur->len = curlen; 547 cur->flags = OHCI_ADD_LEN; 548 cur->xfer = xfer; 549 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n", 550 dataphys, dataphys + curlen - 1)); 551 if (len == 0) 552 break; 553 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n")); 554 dataphys += curlen; 555 cur = next; 556 } 557 if (!rd && (flags & USBD_FORCE_SHORT_XFER) && 558 alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) { 559 /* Force a 0 length transfer at the end. */ 560 561 cur = next; 562 next = ohci_alloc_std(sc); 563 if (next == NULL) 564 goto nomem; 565 566 cur->td.td_flags = tdflags; 567 cur->td.td_cbp = 0; /* indicate 0 length packet */ 568 cur->nexttd = next; 569 cur->td.td_nexttd = HTOO32(next->physaddr); 570 cur->td.td_be = ~0; 571 cur->len = 0; 572 cur->flags = 0; 573 cur->xfer = xfer; 574 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n")); 575 } 576 *ep = cur; 577 578 return (USBD_NORMAL_COMPLETION); 579 580 nomem: 581 /* XXX free chain */ 582 return (USBD_NOMEM); 583 } 584 585 #if 0 586 Static void 587 ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std, 588 ohci_soft_td_t *stdend) 589 { 590 ohci_soft_td_t *p; 591 592 for (; std != stdend; std = p) { 593 p = std->nexttd; 594 ohci_free_std(sc, std); 595 } 596 } 597 #endif 598 599 ohci_soft_itd_t * 600 ohci_alloc_sitd(ohci_softc_t *sc) 601 { 602 ohci_soft_itd_t *sitd; 603 usbd_status err; 604 int i, s, offs; 605 usb_dma_t dma; 606 607 if (sc->sc_freeitds == NULL) { 608 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n")); 609 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK, 610 OHCI_ITD_ALIGN, &dma); 611 if (err) 612 return (NULL); 613 s = splusb(); 614 for(i = 0; i < OHCI_SITD_CHUNK; i++) { 615 offs = i * OHCI_SITD_SIZE; 616 sitd = KERNADDR(&dma, offs); 617 sitd->physaddr = DMAADDR(&dma, offs); 618 sitd->nextitd = sc->sc_freeitds; 619 sc->sc_freeitds = sitd; 620 } 621 splx(s); 622 } 623 624 s = splusb(); 625 sitd = sc->sc_freeitds; 626 sc->sc_freeitds = sitd->nextitd; 627 memset(&sitd->itd, 0, sizeof(ohci_itd_t)); 628 sitd->nextitd = NULL; 629 sitd->xfer = NULL; 630 ohci_hash_add_itd(sc, sitd); 631 splx(s); 632 633 #ifdef DIAGNOSTIC 634 sitd->isdone = 0; 635 #endif 636 637 return (sitd); 638 } 639 640 void 641 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 642 { 643 int s; 644 645 DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd)); 646 647 #ifdef DIAGNOSTIC 648 if (!sitd->isdone) { 649 panic("ohci_free_sitd: sitd=%p not done", sitd); 650 return; 651 } 652 /* Warn double free */ 653 sitd->isdone = 0; 654 #endif 655 656 s = splusb(); 657 ohci_hash_rem_itd(sc, sitd); 658 sitd->nextitd = sc->sc_freeitds; 659 sc->sc_freeitds = sitd; 660 splx(s); 661 } 662 663 usbd_status 664 ohci_init(ohci_softc_t *sc) 665 { 666 ohci_soft_ed_t *sed, *psed; 667 usbd_status err; 668 int i; 669 u_int32_t s, ctl, rwc, ival, hcr, fm, per, rev, desca, descb; 670 671 DPRINTF(("ohci_init: start\n")); 672 #if defined(__OpenBSD__) 673 printf(","); 674 #else 675 printf("%s:", device_xname(sc->sc_dev)); 676 #endif 677 rev = OREAD4(sc, OHCI_REVISION); 678 printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev), 679 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 680 681 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 682 printf("%s: unsupported OHCI revision\n", 683 device_xname(sc->sc_dev)); 684 sc->sc_bus.usbrev = USBREV_UNKNOWN; 685 return (USBD_INVAL); 686 } 687 sc->sc_bus.usbrev = USBREV_1_0; 688 689 for (i = 0; i < OHCI_HASH_SIZE; i++) 690 LIST_INIT(&sc->sc_hash_tds[i]); 691 for (i = 0; i < OHCI_HASH_SIZE; i++) 692 LIST_INIT(&sc->sc_hash_itds[i]); 693 694 SIMPLEQ_INIT(&sc->sc_free_xfers); 695 696 #ifdef __NetBSD__ 697 usb_setup_reserve(sc->sc_dev, &sc->sc_dma_reserve, sc->sc_bus.dmatag, 698 USB_MEM_RESERVE); 699 #endif 700 701 /* XXX determine alignment by R/W */ 702 /* Allocate the HCCA area. */ 703 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 704 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 705 if (err) 706 return (err); 707 sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0); 708 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 709 710 sc->sc_eintrs = OHCI_NORMAL_INTRS; 711 712 /* Allocate dummy ED that starts the control list. */ 713 sc->sc_ctrl_head = ohci_alloc_sed(sc); 714 if (sc->sc_ctrl_head == NULL) { 715 err = USBD_NOMEM; 716 goto bad1; 717 } 718 sc->sc_ctrl_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 719 720 /* Allocate dummy ED that starts the bulk list. */ 721 sc->sc_bulk_head = ohci_alloc_sed(sc); 722 if (sc->sc_bulk_head == NULL) { 723 err = USBD_NOMEM; 724 goto bad2; 725 } 726 sc->sc_bulk_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 727 728 /* Allocate dummy ED that starts the isochronous list. */ 729 sc->sc_isoc_head = ohci_alloc_sed(sc); 730 if (sc->sc_isoc_head == NULL) { 731 err = USBD_NOMEM; 732 goto bad3; 733 } 734 sc->sc_isoc_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 735 736 /* Allocate all the dummy EDs that make up the interrupt tree. */ 737 for (i = 0; i < OHCI_NO_EDS; i++) { 738 sed = ohci_alloc_sed(sc); 739 if (sed == NULL) { 740 while (--i >= 0) 741 ohci_free_sed(sc, sc->sc_eds[i]); 742 err = USBD_NOMEM; 743 goto bad4; 744 } 745 /* All ED fields are set to 0. */ 746 sc->sc_eds[i] = sed; 747 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 748 if (i != 0) 749 psed = sc->sc_eds[(i-1) / 2]; 750 else 751 psed= sc->sc_isoc_head; 752 sed->next = psed; 753 sed->ed.ed_nexted = HTOO32(psed->physaddr); 754 } 755 /* 756 * Fill HCCA interrupt table. The bit reversal is to get 757 * the tree set up properly to spread the interrupts. 758 */ 759 for (i = 0; i < OHCI_NO_INTRS; i++) 760 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 761 HTOO32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 762 763 #ifdef OHCI_DEBUG 764 if (ohcidebug > 15) { 765 for (i = 0; i < OHCI_NO_EDS; i++) { 766 printf("ed#%d ", i); 767 ohci_dump_ed(sc, sc->sc_eds[i]); 768 } 769 printf("iso "); 770 ohci_dump_ed(sc, sc->sc_isoc_head); 771 } 772 #endif 773 774 /* Preserve values programmed by SMM/BIOS but lost over reset. */ 775 ctl = OREAD4(sc, OHCI_CONTROL); 776 rwc = ctl & OHCI_RWC; 777 fm = OREAD4(sc, OHCI_FM_INTERVAL); 778 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 779 descb = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 780 781 /* Determine in what context we are running. */ 782 if (ctl & OHCI_IR) { 783 /* SMM active, request change */ 784 DPRINTF(("ohci_init: SMM active, request owner change\n")); 785 if ((sc->sc_intre & (OHCI_OC | OHCI_MIE)) == 786 (OHCI_OC | OHCI_MIE)) 787 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_MIE); 788 s = OREAD4(sc, OHCI_COMMAND_STATUS); 789 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 790 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 791 usb_delay_ms(&sc->sc_bus, 1); 792 ctl = OREAD4(sc, OHCI_CONTROL); 793 } 794 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_MIE); 795 if ((ctl & OHCI_IR) == 0) { 796 printf("%s: SMM does not respond, resetting\n", 797 device_xname(sc->sc_dev)); 798 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 799 goto reset; 800 } 801 #if 0 802 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */ 803 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 804 /* BIOS started controller. */ 805 DPRINTF(("ohci_init: BIOS active\n")); 806 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 807 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL | rwc); 808 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 809 } 810 #endif 811 } else { 812 DPRINTF(("ohci_init: cold started\n")); 813 reset: 814 /* Controller was cold started. */ 815 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 816 } 817 818 /* 819 * This reset should not be necessary according to the OHCI spec, but 820 * without it some controllers do not start. 821 */ 822 DPRINTF(("%s: resetting\n", device_xname(sc->sc_dev))); 823 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 824 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 825 826 /* We now own the host controller and the bus has been reset. */ 827 828 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 829 /* Nominal time for a reset is 10 us. */ 830 for (i = 0; i < 10; i++) { 831 delay(10); 832 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 833 if (!hcr) 834 break; 835 } 836 if (hcr) { 837 printf("%s: reset timeout\n", device_xname(sc->sc_dev)); 838 err = USBD_IOERROR; 839 goto bad5; 840 } 841 #ifdef OHCI_DEBUG 842 if (ohcidebug > 15) 843 ohci_dumpregs(sc); 844 #endif 845 846 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 847 848 /* Set up HC registers. */ 849 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 850 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 851 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 852 /* disable all interrupts and then switch on all desired interrupts */ 853 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 854 /* switch on desired functional features */ 855 ctl = OREAD4(sc, OHCI_CONTROL); 856 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 857 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 858 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL | rwc; 859 /* And finally start it! */ 860 OWRITE4(sc, OHCI_CONTROL, ctl); 861 862 /* 863 * The controller is now OPERATIONAL. Set a some final 864 * registers that should be set earlier, but that the 865 * controller ignores when in the SUSPEND state. 866 */ 867 ival = OHCI_GET_IVAL(fm); 868 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 869 fm |= OHCI_FSMPS(ival) | ival; 870 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 871 per = OHCI_PERIODIC(ival); /* 90% periodic */ 872 OWRITE4(sc, OHCI_PERIODIC_START, per); 873 874 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */ 875 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP); 876 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 877 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY); 878 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca); 879 880 /* 881 * The AMD756 requires a delay before re-reading the register, 882 * otherwise it will occasionally report 0 ports. 883 */ 884 sc->sc_noport = 0; 885 for (i = 0; i < 10 && sc->sc_noport == 0; i++) { 886 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY); 887 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 888 } 889 890 #ifdef OHCI_DEBUG 891 if (ohcidebug > 5) 892 ohci_dumpregs(sc); 893 #endif 894 895 /* Set up the bus struct. */ 896 sc->sc_bus.methods = &ohci_bus_methods; 897 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 898 899 #if defined(__NetBSD__) || defined(__OpenBSD__) 900 sc->sc_control = sc->sc_intre = 0; 901 #endif 902 903 usb_callout_init(sc->sc_tmo_rhsc); 904 905 /* Finally, turn on interrupts. */ 906 DPRINTFN(1,("ohci_init: enabling\n")); 907 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 908 909 return (USBD_NORMAL_COMPLETION); 910 911 bad5: 912 for (i = 0; i < OHCI_NO_EDS; i++) 913 ohci_free_sed(sc, sc->sc_eds[i]); 914 bad4: 915 ohci_free_sed(sc, sc->sc_isoc_head); 916 bad3: 917 ohci_free_sed(sc, sc->sc_bulk_head); 918 bad2: 919 ohci_free_sed(sc, sc->sc_ctrl_head); 920 bad1: 921 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 922 return (err); 923 } 924 925 usbd_status 926 ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 927 { 928 #if defined(__NetBSD__) || defined(__OpenBSD__) 929 struct ohci_softc *sc = bus->hci_private; 930 #endif 931 usbd_status status; 932 933 status = usb_allocmem(&sc->sc_bus, size, 0, dma); 934 #ifdef __NetBSD__ 935 if (status == USBD_NOMEM) 936 status = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size); 937 #endif 938 return status; 939 } 940 941 void 942 ohci_freem(struct usbd_bus *bus, usb_dma_t *dma) 943 { 944 #if defined(__NetBSD__) || defined(__OpenBSD__) 945 struct ohci_softc *sc = bus->hci_private; 946 #endif 947 #ifdef __NetBSD__ 948 if (dma->block->flags & USB_DMA_RESERVE) { 949 usb_reserve_freem(&sc->sc_dma_reserve, dma); 950 return; 951 } 952 #endif 953 usb_freemem(&sc->sc_bus, dma); 954 } 955 956 usbd_xfer_handle 957 ohci_allocx(struct usbd_bus *bus) 958 { 959 struct ohci_softc *sc = bus->hci_private; 960 usbd_xfer_handle xfer; 961 962 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 963 if (xfer != NULL) { 964 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 965 #ifdef DIAGNOSTIC 966 if (xfer->busy_free != XFER_FREE) { 967 printf("ohci_allocx: xfer=%p not free, 0x%08x\n", xfer, 968 xfer->busy_free); 969 } 970 #endif 971 } else { 972 xfer = malloc(sizeof(struct ohci_xfer), M_USB, M_NOWAIT); 973 } 974 if (xfer != NULL) { 975 memset(xfer, 0, sizeof (struct ohci_xfer)); 976 #ifdef DIAGNOSTIC 977 xfer->busy_free = XFER_BUSY; 978 #endif 979 } 980 return (xfer); 981 } 982 983 void 984 ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 985 { 986 struct ohci_softc *sc = bus->hci_private; 987 988 #ifdef DIAGNOSTIC 989 if (xfer->busy_free != XFER_BUSY) { 990 printf("ohci_freex: xfer=%p not busy, 0x%08x\n", xfer, 991 xfer->busy_free); 992 } 993 xfer->busy_free = XFER_FREE; 994 #endif 995 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 996 } 997 998 /* 999 * Shut down the controller when the system is going down. 1000 */ 1001 bool 1002 ohci_shutdown(device_t self, int flags) 1003 { 1004 ohci_softc_t *sc = device_private(self); 1005 1006 DPRINTF(("ohci_shutdown: stopping the HC\n")); 1007 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1008 return true; 1009 } 1010 1011 bool 1012 ohci_resume(device_t dv PMF_FN_ARGS) 1013 { 1014 ohci_softc_t *sc = device_private(dv); 1015 uint32_t ctl; 1016 int s; 1017 1018 s = splhardusb(); 1019 sc->sc_bus.use_polling++; 1020 /* Some broken BIOSes do not recover these values */ 1021 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 1022 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, 1023 sc->sc_ctrl_head->physaddr); 1024 OWRITE4(sc, OHCI_BULK_HEAD_ED, 1025 sc->sc_bulk_head->physaddr); 1026 if (sc->sc_intre) 1027 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_intre & 1028 (OHCI_ALL_INTRS | OHCI_MIE)); 1029 if (sc->sc_control) 1030 ctl = sc->sc_control; 1031 else 1032 ctl = OREAD4(sc, OHCI_CONTROL); 1033 ctl |= OHCI_HCFS_RESUME; 1034 OWRITE4(sc, OHCI_CONTROL, ctl); 1035 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 1036 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL; 1037 OWRITE4(sc, OHCI_CONTROL, ctl); 1038 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 1039 sc->sc_control = sc->sc_intre = 0; 1040 sc->sc_bus.use_polling--; 1041 1042 return true; 1043 } 1044 1045 bool 1046 ohci_suspend(device_t dv PMF_FN_ARGS) 1047 { 1048 ohci_softc_t *sc = device_private(dv); 1049 uint32_t ctl; 1050 int s; 1051 1052 s = splhardusb(); 1053 sc->sc_bus.use_polling++; 1054 ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK; 1055 if (sc->sc_control == 0) { 1056 /* 1057 * Preserve register values, in case that BIOS 1058 * does not recover them. 1059 */ 1060 sc->sc_control = ctl; 1061 sc->sc_intre = OREAD4(sc, 1062 OHCI_INTERRUPT_ENABLE); 1063 } 1064 ctl |= OHCI_HCFS_SUSPEND; 1065 OWRITE4(sc, OHCI_CONTROL, ctl); 1066 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1067 sc->sc_bus.use_polling--; 1068 splx(s); 1069 1070 return true; 1071 } 1072 1073 #ifdef OHCI_DEBUG 1074 void 1075 ohci_dumpregs(ohci_softc_t *sc) 1076 { 1077 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 1078 OREAD4(sc, OHCI_REVISION), 1079 OREAD4(sc, OHCI_CONTROL), 1080 OREAD4(sc, OHCI_COMMAND_STATUS))); 1081 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 1082 OREAD4(sc, OHCI_INTERRUPT_STATUS), 1083 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 1084 OREAD4(sc, OHCI_INTERRUPT_DISABLE))); 1085 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 1086 OREAD4(sc, OHCI_HCCA), 1087 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 1088 OREAD4(sc, OHCI_CONTROL_HEAD_ED))); 1089 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 1090 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 1091 OREAD4(sc, OHCI_BULK_HEAD_ED), 1092 OREAD4(sc, OHCI_BULK_CURRENT_ED))); 1093 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 1094 OREAD4(sc, OHCI_DONE_HEAD), 1095 OREAD4(sc, OHCI_FM_INTERVAL), 1096 OREAD4(sc, OHCI_FM_REMAINING))); 1097 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 1098 OREAD4(sc, OHCI_FM_NUMBER), 1099 OREAD4(sc, OHCI_PERIODIC_START), 1100 OREAD4(sc, OHCI_LS_THRESHOLD))); 1101 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n", 1102 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 1103 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 1104 OREAD4(sc, OHCI_RH_STATUS))); 1105 DPRINTF((" port1=0x%08x port2=0x%08x\n", 1106 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 1107 OREAD4(sc, OHCI_RH_PORT_STATUS(2)))); 1108 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n", 1109 O32TOH(sc->sc_hcca->hcca_frame_number), 1110 O32TOH(sc->sc_hcca->hcca_done_head))); 1111 } 1112 #endif 1113 1114 Static int ohci_intr1(ohci_softc_t *); 1115 1116 int 1117 ohci_intr(void *p) 1118 { 1119 ohci_softc_t *sc = p; 1120 1121 if (sc == NULL || sc->sc_dying || !device_has_power(sc->sc_dev)) 1122 return (0); 1123 1124 /* If we get an interrupt while polling, then just ignore it. */ 1125 if (sc->sc_bus.use_polling) { 1126 #ifdef DIAGNOSTIC 1127 DPRINTFN(16, ("ohci_intr: ignored interrupt while polling\n")); 1128 #endif 1129 /* for level triggered intrs, should do something to ack */ 1130 OWRITE4(sc, OHCI_INTERRUPT_STATUS, 1131 OREAD4(sc, OHCI_INTERRUPT_STATUS)); 1132 1133 return (0); 1134 } 1135 1136 return (ohci_intr1(sc)); 1137 } 1138 1139 Static int 1140 ohci_intr1(ohci_softc_t *sc) 1141 { 1142 u_int32_t intrs, eintrs; 1143 1144 DPRINTFN(14,("ohci_intr1: enter\n")); 1145 1146 /* In case the interrupt occurs before initialization has completed. */ 1147 if (sc == NULL || sc->sc_hcca == NULL) { 1148 #ifdef DIAGNOSTIC 1149 printf("ohci_intr: sc->sc_hcca == NULL\n"); 1150 #endif 1151 return (0); 1152 } 1153 1154 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1155 if (!intrs) 1156 return (0); 1157 1158 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs & ~(OHCI_MIE|OHCI_WDH)); /* Acknowledge */ 1159 eintrs = intrs & sc->sc_eintrs; 1160 if (!eintrs) 1161 return (0); 1162 1163 sc->sc_bus.intr_context++; 1164 sc->sc_bus.no_intrs++; 1165 DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 1166 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 1167 (u_int)eintrs)); 1168 1169 if (eintrs & OHCI_SO) { 1170 sc->sc_overrun_cnt++; 1171 if (usbd_ratecheck(&sc->sc_overrun_ntc)) { 1172 printf("%s: %u scheduling overruns\n", 1173 device_xname(sc->sc_dev), sc->sc_overrun_cnt); 1174 sc->sc_overrun_cnt = 0; 1175 } 1176 /* XXX do what */ 1177 eintrs &= ~OHCI_SO; 1178 } 1179 if (eintrs & OHCI_WDH) { 1180 /* 1181 * We block the interrupt below, and reenable it later from 1182 * ohci_softintr(). 1183 */ 1184 usb_schedsoftintr(&sc->sc_bus); 1185 } 1186 if (eintrs & OHCI_RD) { 1187 printf("%s: resume detect\n", device_xname(sc->sc_dev)); 1188 /* XXX process resume detect */ 1189 } 1190 if (eintrs & OHCI_UE) { 1191 printf("%s: unrecoverable error, controller halted\n", 1192 device_xname(sc->sc_dev)); 1193 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1194 /* XXX what else */ 1195 } 1196 if (eintrs & OHCI_RHSC) { 1197 /* 1198 * We block the interrupt below, and reenable it later from 1199 * a timeout. 1200 */ 1201 ohci_rhsc(sc, sc->sc_intrxfer); 1202 /* Do not allow RHSC interrupts > 1 per second */ 1203 usb_callout(sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc); 1204 } 1205 1206 sc->sc_bus.intr_context--; 1207 1208 if (eintrs != 0) { 1209 /* Block unprocessed interrupts. */ 1210 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs); 1211 sc->sc_eintrs &= ~eintrs; 1212 DPRINTFN(1, ("%s: blocking intrs 0x%x\n", 1213 device_xname(sc->sc_dev), eintrs)); 1214 } 1215 1216 return (1); 1217 } 1218 1219 void 1220 ohci_rhsc_enable(void *v_sc) 1221 { 1222 ohci_softc_t *sc = v_sc; 1223 int s; 1224 1225 s = splhardusb(); 1226 sc->sc_eintrs |= OHCI_RHSC; 1227 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1228 splx(s); 1229 } 1230 1231 #ifdef OHCI_DEBUG 1232 const char *ohci_cc_strs[] = { 1233 "NO_ERROR", 1234 "CRC", 1235 "BIT_STUFFING", 1236 "DATA_TOGGLE_MISMATCH", 1237 "STALL", 1238 "DEVICE_NOT_RESPONDING", 1239 "PID_CHECK_FAILURE", 1240 "UNEXPECTED_PID", 1241 "DATA_OVERRUN", 1242 "DATA_UNDERRUN", 1243 "BUFFER_OVERRUN", 1244 "BUFFER_UNDERRUN", 1245 "reserved", 1246 "reserved", 1247 "NOT_ACCESSED", 1248 "NOT_ACCESSED", 1249 }; 1250 #endif 1251 1252 void 1253 ohci_softintr(void *v) 1254 { 1255 struct usbd_bus *bus = v; 1256 ohci_softc_t *sc = bus->hci_private; 1257 ohci_soft_itd_t *sitd, *sidone, *sitdnext; 1258 ohci_soft_td_t *std, *sdone, *stdnext; 1259 usbd_xfer_handle xfer; 1260 struct ohci_pipe *opipe; 1261 int len, cc, s; 1262 int i, j, actlen, iframes, uedir; 1263 ohci_physaddr_t done; 1264 1265 DPRINTFN(10,("ohci_softintr: enter\n")); 1266 1267 sc->sc_bus.intr_context++; 1268 1269 s = splhardusb(); 1270 done = O32TOH(sc->sc_hcca->hcca_done_head) & ~OHCI_DONE_INTRS; 1271 sc->sc_hcca->hcca_done_head = 0; 1272 OWRITE4(sc, OHCI_INTERRUPT_STATUS, OHCI_WDH); 1273 sc->sc_eintrs |= OHCI_WDH; 1274 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_WDH); 1275 splx(s); 1276 1277 /* Reverse the done list. */ 1278 for (sdone = NULL, sidone = NULL; done != 0; ) { 1279 std = ohci_hash_find_td(sc, done); 1280 if (std != NULL) { 1281 std->dnext = sdone; 1282 done = O32TOH(std->td.td_nexttd); 1283 sdone = std; 1284 DPRINTFN(10,("add TD %p\n", std)); 1285 continue; 1286 } 1287 sitd = ohci_hash_find_itd(sc, done); 1288 if (sitd != NULL) { 1289 sitd->dnext = sidone; 1290 done = O32TOH(sitd->itd.itd_nextitd); 1291 sidone = sitd; 1292 DPRINTFN(5,("add ITD %p\n", sitd)); 1293 continue; 1294 } 1295 panic("ohci_softintr: addr 0x%08lx not found", (u_long)done); 1296 } 1297 1298 DPRINTFN(10,("ohci_softintr: sdone=%p sidone=%p\n", sdone, sidone)); 1299 1300 #ifdef OHCI_DEBUG 1301 if (ohcidebug > 10) { 1302 DPRINTF(("ohci_process_done: TD done:\n")); 1303 ohci_dump_tds(sc, sdone); 1304 } 1305 #endif 1306 1307 for (std = sdone; std; std = stdnext) { 1308 xfer = std->xfer; 1309 stdnext = std->dnext; 1310 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n", 1311 std, xfer, xfer ? xfer->hcpriv : 0)); 1312 if (xfer == NULL) { 1313 /* 1314 * xfer == NULL: There seems to be no xfer associated 1315 * with this TD. It is tailp that happened to end up on 1316 * the done queue. 1317 * Shouldn't happen, but some chips are broken(?). 1318 */ 1319 continue; 1320 } 1321 if (xfer->status == USBD_CANCELLED || 1322 xfer->status == USBD_TIMEOUT) { 1323 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1324 xfer)); 1325 /* Handled by abort routine. */ 1326 continue; 1327 } 1328 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 1329 1330 len = std->len; 1331 if (std->td.td_cbp != 0) 1332 len -= O32TOH(std->td.td_be) - 1333 O32TOH(std->td.td_cbp) + 1; 1334 DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", len, 1335 std->flags)); 1336 if (std->flags & OHCI_ADD_LEN) 1337 xfer->actlen += len; 1338 1339 cc = OHCI_TD_GET_CC(O32TOH(std->td.td_flags)); 1340 if (cc == OHCI_CC_NO_ERROR) { 1341 if (std->flags & OHCI_CALL_DONE) { 1342 xfer->status = USBD_NORMAL_COMPLETION; 1343 s = splusb(); 1344 usb_transfer_complete(xfer); 1345 splx(s); 1346 } 1347 ohci_free_std(sc, std); 1348 } else { 1349 /* 1350 * Endpoint is halted. First unlink all the TDs 1351 * belonging to the failed transfer, and then restart 1352 * the endpoint. 1353 */ 1354 ohci_soft_td_t *p, *n; 1355 opipe = (struct ohci_pipe *)xfer->pipe; 1356 1357 DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n", 1358 OHCI_TD_GET_CC(O32TOH(std->td.td_flags)), 1359 ohci_cc_strs[OHCI_TD_GET_CC(O32TOH(std->td.td_flags))])); 1360 1361 /* remove TDs */ 1362 for (p = std; p->xfer == xfer; p = n) { 1363 n = p->nexttd; 1364 ohci_free_std(sc, p); 1365 } 1366 1367 /* clear halt */ 1368 opipe->sed->ed.ed_headp = HTOO32(p->physaddr); 1369 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1370 1371 if (cc == OHCI_CC_STALL) 1372 xfer->status = USBD_STALLED; 1373 else 1374 xfer->status = USBD_IOERROR; 1375 s = splusb(); 1376 usb_transfer_complete(xfer); 1377 splx(s); 1378 } 1379 } 1380 1381 #ifdef OHCI_DEBUG 1382 if (ohcidebug > 10) { 1383 DPRINTF(("ohci_softintr: ITD done:\n")); 1384 ohci_dump_itds(sc, sidone); 1385 } 1386 #endif 1387 1388 for (sitd = sidone; sitd != NULL; sitd = sitdnext) { 1389 xfer = sitd->xfer; 1390 sitdnext = sitd->dnext; 1391 DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n", 1392 sitd, xfer, xfer ? xfer->hcpriv : 0)); 1393 if (xfer == NULL) 1394 continue; 1395 if (xfer->status == USBD_CANCELLED || 1396 xfer->status == USBD_TIMEOUT) { 1397 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1398 xfer)); 1399 /* Handled by abort routine. */ 1400 continue; 1401 } 1402 #ifdef DIAGNOSTIC 1403 if (sitd->isdone) 1404 printf("ohci_softintr: sitd=%p is done\n", sitd); 1405 sitd->isdone = 1; 1406 #endif 1407 if (sitd->flags & OHCI_CALL_DONE) { 1408 ohci_soft_itd_t *next; 1409 1410 opipe = (struct ohci_pipe *)xfer->pipe; 1411 opipe->u.iso.inuse -= xfer->nframes; 1412 uedir = UE_GET_DIR(xfer->pipe->endpoint->edesc-> 1413 bEndpointAddress); 1414 xfer->status = USBD_NORMAL_COMPLETION; 1415 actlen = 0; 1416 for (i = 0, sitd = xfer->hcpriv;; 1417 sitd = next) { 1418 next = sitd->nextitd; 1419 if (OHCI_ITD_GET_CC(O32TOH(sitd-> 1420 itd.itd_flags)) != OHCI_CC_NO_ERROR) 1421 xfer->status = USBD_IOERROR; 1422 /* For input, update frlengths with actual */ 1423 /* XXX anything necessary for output? */ 1424 if (uedir == UE_DIR_IN && 1425 xfer->status == USBD_NORMAL_COMPLETION) { 1426 iframes = OHCI_ITD_GET_FC(O32TOH( 1427 sitd->itd.itd_flags)); 1428 for (j = 0; j < iframes; i++, j++) { 1429 len = O16TOH(sitd-> 1430 itd.itd_offset[j]); 1431 if ((OHCI_ITD_PSW_GET_CC(len) & 1432 OHCI_CC_NOT_ACCESSED_MASK) 1433 == OHCI_CC_NOT_ACCESSED) 1434 len = 0; 1435 else 1436 len = OHCI_ITD_PSW_LENGTH(len); 1437 xfer->frlengths[i] = len; 1438 actlen += len; 1439 } 1440 } 1441 if (sitd->flags & OHCI_CALL_DONE) 1442 break; 1443 ohci_free_sitd(sc, sitd); 1444 } 1445 ohci_free_sitd(sc, sitd); 1446 if (uedir == UE_DIR_IN && 1447 xfer->status == USBD_NORMAL_COMPLETION) 1448 xfer->actlen = actlen; 1449 xfer->hcpriv = NULL; 1450 1451 s = splusb(); 1452 usb_transfer_complete(xfer); 1453 splx(s); 1454 } 1455 } 1456 1457 #ifdef USB_USE_SOFTINTR 1458 if (sc->sc_softwake) { 1459 sc->sc_softwake = 0; 1460 wakeup(&sc->sc_softwake); 1461 } 1462 #endif /* USB_USE_SOFTINTR */ 1463 1464 sc->sc_bus.intr_context--; 1465 DPRINTFN(10,("ohci_softintr: done:\n")); 1466 } 1467 1468 void 1469 ohci_device_ctrl_done(usbd_xfer_handle xfer) 1470 { 1471 DPRINTFN(10,("ohci_device_ctrl_done: xfer=%p\n", xfer)); 1472 1473 #ifdef DIAGNOSTIC 1474 if (!(xfer->rqflags & URQ_REQUEST)) { 1475 panic("ohci_device_ctrl_done: not a request"); 1476 } 1477 #endif 1478 } 1479 1480 void 1481 ohci_device_intr_done(usbd_xfer_handle xfer) 1482 { 1483 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1484 ohci_softc_t *sc = opipe->pipe.device->bus->hci_private; 1485 ohci_soft_ed_t *sed = opipe->sed; 1486 ohci_soft_td_t *data, *tail; 1487 1488 1489 DPRINTFN(10,("ohci_device_intr_done: xfer=%p, actlen=%d\n", 1490 xfer, xfer->actlen)); 1491 1492 if (xfer->pipe->repeat) { 1493 data = opipe->tail.td; 1494 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 1495 if (tail == NULL) { 1496 xfer->status = USBD_NOMEM; 1497 return; 1498 } 1499 tail->xfer = NULL; 1500 1501 data->td.td_flags = HTOO32( 1502 OHCI_TD_IN | OHCI_TD_NOCC | 1503 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 1504 if (xfer->flags & USBD_SHORT_XFER_OK) 1505 data->td.td_flags |= HTOO32(OHCI_TD_R); 1506 data->td.td_cbp = HTOO32(DMAADDR(&xfer->dmabuf, 0)); 1507 data->nexttd = tail; 1508 data->td.td_nexttd = HTOO32(tail->physaddr); 1509 data->td.td_be = HTOO32(O32TOH(data->td.td_cbp) + 1510 xfer->length - 1); 1511 data->len = xfer->length; 1512 data->xfer = xfer; 1513 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1514 xfer->hcpriv = data; 1515 xfer->actlen = 0; 1516 1517 sed->ed.ed_tailp = HTOO32(tail->physaddr); 1518 opipe->tail.td = tail; 1519 } 1520 } 1521 1522 void 1523 ohci_device_bulk_done(usbd_xfer_handle xfer) 1524 { 1525 DPRINTFN(10,("ohci_device_bulk_done: xfer=%p, actlen=%d\n", 1526 xfer, xfer->actlen)); 1527 } 1528 1529 void 1530 ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer) 1531 { 1532 usbd_pipe_handle pipe; 1533 u_char *p; 1534 int i, m; 1535 int hstatus; 1536 1537 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1538 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n", 1539 sc, xfer, hstatus)); 1540 1541 if (xfer == NULL) { 1542 /* Just ignore the change. */ 1543 return; 1544 } 1545 1546 pipe = xfer->pipe; 1547 1548 p = KERNADDR(&xfer->dmabuf, 0); 1549 m = min(sc->sc_noport, xfer->length * 8 - 1); 1550 memset(p, 0, xfer->length); 1551 for (i = 1; i <= m; i++) { 1552 /* Pick out CHANGE bits from the status reg. */ 1553 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1554 p[i/8] |= 1 << (i%8); 1555 } 1556 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 1557 xfer->actlen = xfer->length; 1558 xfer->status = USBD_NORMAL_COMPLETION; 1559 1560 usb_transfer_complete(xfer); 1561 } 1562 1563 void 1564 ohci_root_intr_done(usbd_xfer_handle xfer) 1565 { 1566 } 1567 1568 void 1569 ohci_root_ctrl_done(usbd_xfer_handle xfer) 1570 { 1571 } 1572 1573 /* 1574 * Wait here until controller claims to have an interrupt. 1575 * Then call ohci_intr and return. Use timeout to avoid waiting 1576 * too long. 1577 */ 1578 void 1579 ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer) 1580 { 1581 int timo; 1582 u_int32_t intrs; 1583 1584 xfer->status = USBD_IN_PROGRESS; 1585 for (timo = xfer->timeout; timo >= 0; timo--) { 1586 usb_delay_ms(&sc->sc_bus, 1); 1587 if (sc->sc_dying) 1588 break; 1589 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 1590 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs)); 1591 #ifdef OHCI_DEBUG 1592 if (ohcidebug > 15) 1593 ohci_dumpregs(sc); 1594 #endif 1595 if (intrs) { 1596 ohci_intr1(sc); 1597 if (xfer->status != USBD_IN_PROGRESS) 1598 return; 1599 } 1600 } 1601 1602 /* Timeout */ 1603 DPRINTF(("ohci_waitintr: timeout\n")); 1604 xfer->status = USBD_TIMEOUT; 1605 usb_transfer_complete(xfer); 1606 /* XXX should free TD */ 1607 } 1608 1609 void 1610 ohci_poll(struct usbd_bus *bus) 1611 { 1612 ohci_softc_t *sc = bus->hci_private; 1613 #ifdef OHCI_DEBUG 1614 static int last; 1615 int new; 1616 new = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1617 if (new != last) { 1618 DPRINTFN(10,("ohci_poll: intrs=0x%04x\n", new)); 1619 last = new; 1620 } 1621 #endif 1622 1623 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) 1624 ohci_intr1(sc); 1625 } 1626 1627 usbd_status 1628 ohci_device_request(usbd_xfer_handle xfer) 1629 { 1630 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1631 usb_device_request_t *req = &xfer->request; 1632 usbd_device_handle dev = opipe->pipe.device; 1633 ohci_softc_t *sc = dev->bus->hci_private; 1634 int addr = dev->address; 1635 ohci_soft_td_t *setup, *stat, *next, *tail; 1636 ohci_soft_ed_t *sed; 1637 int isread; 1638 int len; 1639 usbd_status err; 1640 int s; 1641 1642 isread = req->bmRequestType & UT_READ; 1643 len = UGETW(req->wLength); 1644 1645 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 1646 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 1647 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1648 UGETW(req->wIndex), len, addr, 1649 opipe->pipe.endpoint->edesc->bEndpointAddress)); 1650 1651 setup = opipe->tail.td; 1652 stat = ohci_alloc_std(sc); 1653 if (stat == NULL) { 1654 err = USBD_NOMEM; 1655 goto bad1; 1656 } 1657 tail = ohci_alloc_std(sc); 1658 if (tail == NULL) { 1659 err = USBD_NOMEM; 1660 goto bad2; 1661 } 1662 tail->xfer = NULL; 1663 1664 sed = opipe->sed; 1665 opipe->u.ctl.length = len; 1666 1667 /* Update device address and length since they may have changed 1668 during the setup of the control pipe in usbd_new_device(). */ 1669 /* XXX This only needs to be done once, but it's too early in open. */ 1670 /* XXXX Should not touch ED here! */ 1671 sed->ed.ed_flags = HTOO32( 1672 (O32TOH(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) | 1673 OHCI_ED_SET_FA(addr) | 1674 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize))); 1675 1676 next = stat; 1677 1678 /* Set up data transaction */ 1679 if (len != 0) { 1680 ohci_soft_td_t *std = stat; 1681 1682 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 1683 std, &stat); 1684 stat = stat->nexttd; /* point at free TD */ 1685 if (err) 1686 goto bad3; 1687 /* Start toggle at 1 and then use the carried toggle. */ 1688 std->td.td_flags &= HTOO32(~OHCI_TD_TOGGLE_MASK); 1689 std->td.td_flags |= HTOO32(OHCI_TD_TOGGLE_1); 1690 } 1691 1692 memcpy(KERNADDR(&opipe->u.ctl.reqdma, 0), req, sizeof *req); 1693 1694 setup->td.td_flags = HTOO32(OHCI_TD_SETUP | OHCI_TD_NOCC | 1695 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1696 setup->td.td_cbp = HTOO32(DMAADDR(&opipe->u.ctl.reqdma, 0)); 1697 setup->nexttd = next; 1698 setup->td.td_nexttd = HTOO32(next->physaddr); 1699 setup->td.td_be = HTOO32(O32TOH(setup->td.td_cbp) + sizeof *req - 1); 1700 setup->len = 0; 1701 setup->xfer = xfer; 1702 setup->flags = 0; 1703 xfer->hcpriv = setup; 1704 1705 stat->td.td_flags = HTOO32( 1706 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | 1707 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1708 stat->td.td_cbp = 0; 1709 stat->nexttd = tail; 1710 stat->td.td_nexttd = HTOO32(tail->physaddr); 1711 stat->td.td_be = 0; 1712 stat->flags = OHCI_CALL_DONE; 1713 stat->len = 0; 1714 stat->xfer = xfer; 1715 1716 #ifdef OHCI_DEBUG 1717 if (ohcidebug > 5) { 1718 DPRINTF(("ohci_device_request:\n")); 1719 ohci_dump_ed(sc, sed); 1720 ohci_dump_tds(sc, setup); 1721 } 1722 #endif 1723 1724 /* Insert ED in schedule */ 1725 s = splusb(); 1726 sed->ed.ed_tailp = HTOO32(tail->physaddr); 1727 opipe->tail.td = tail; 1728 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1729 if (xfer->timeout && !sc->sc_bus.use_polling) { 1730 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 1731 ohci_timeout, xfer); 1732 } 1733 splx(s); 1734 1735 #ifdef OHCI_DEBUG 1736 if (ohcidebug > 20) { 1737 delay(10000); 1738 DPRINTF(("ohci_device_request: status=%x\n", 1739 OREAD4(sc, OHCI_COMMAND_STATUS))); 1740 ohci_dumpregs(sc); 1741 printf("ctrl head:\n"); 1742 ohci_dump_ed(sc, sc->sc_ctrl_head); 1743 printf("sed:\n"); 1744 ohci_dump_ed(sc, sed); 1745 ohci_dump_tds(sc, setup); 1746 } 1747 #endif 1748 1749 return (USBD_NORMAL_COMPLETION); 1750 1751 bad3: 1752 ohci_free_std(sc, tail); 1753 bad2: 1754 ohci_free_std(sc, stat); 1755 bad1: 1756 return (err); 1757 } 1758 1759 /* 1760 * Add an ED to the schedule. Called at splusb(). 1761 */ 1762 void 1763 ohci_add_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1764 { 1765 DPRINTFN(8,("ohci_add_ed: sed=%p head=%p\n", sed, head)); 1766 1767 SPLUSBCHECK; 1768 sed->next = head->next; 1769 sed->ed.ed_nexted = head->ed.ed_nexted; 1770 head->next = sed; 1771 head->ed.ed_nexted = HTOO32(sed->physaddr); 1772 } 1773 1774 /* 1775 * Remove an ED from the schedule. Called at splusb(). 1776 */ 1777 void 1778 ohci_rem_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1779 { 1780 ohci_soft_ed_t *p; 1781 1782 SPLUSBCHECK; 1783 1784 /* XXX */ 1785 for (p = head; p != NULL && p->next != sed; p = p->next) 1786 ; 1787 if (p == NULL) 1788 panic("ohci_rem_ed: ED not found"); 1789 p->next = sed->next; 1790 p->ed.ed_nexted = sed->ed.ed_nexted; 1791 } 1792 1793 /* 1794 * When a transfer is completed the TD is added to the done queue by 1795 * the host controller. This queue is the processed by software. 1796 * Unfortunately the queue contains the physical address of the TD 1797 * and we have no simple way to translate this back to a kernel address. 1798 * To make the translation possible (and fast) we use a hash table of 1799 * TDs currently in the schedule. The physical address is used as the 1800 * hash value. 1801 */ 1802 1803 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1804 /* Called at splusb() */ 1805 void 1806 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1807 { 1808 int h = HASH(std->physaddr); 1809 1810 SPLUSBCHECK; 1811 1812 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1813 } 1814 1815 /* Called at splusb() */ 1816 void 1817 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1818 { 1819 SPLUSBCHECK; 1820 1821 LIST_REMOVE(std, hnext); 1822 } 1823 1824 ohci_soft_td_t * 1825 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a) 1826 { 1827 int h = HASH(a); 1828 ohci_soft_td_t *std; 1829 1830 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1831 std != NULL; 1832 std = LIST_NEXT(std, hnext)) 1833 if (std->physaddr == a) 1834 return (std); 1835 return (NULL); 1836 } 1837 1838 /* Called at splusb() */ 1839 void 1840 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1841 { 1842 int h = HASH(sitd->physaddr); 1843 1844 SPLUSBCHECK; 1845 1846 DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n", 1847 sitd, (u_long)sitd->physaddr)); 1848 1849 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext); 1850 } 1851 1852 /* Called at splusb() */ 1853 void 1854 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1855 { 1856 SPLUSBCHECK; 1857 1858 DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n", 1859 sitd, (u_long)sitd->physaddr)); 1860 1861 LIST_REMOVE(sitd, hnext); 1862 } 1863 1864 ohci_soft_itd_t * 1865 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a) 1866 { 1867 int h = HASH(a); 1868 ohci_soft_itd_t *sitd; 1869 1870 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]); 1871 sitd != NULL; 1872 sitd = LIST_NEXT(sitd, hnext)) 1873 if (sitd->physaddr == a) 1874 return (sitd); 1875 return (NULL); 1876 } 1877 1878 void 1879 ohci_timeout(void *addr) 1880 { 1881 struct ohci_xfer *oxfer = addr; 1882 struct ohci_pipe *opipe = (struct ohci_pipe *)oxfer->xfer.pipe; 1883 ohci_softc_t *sc = opipe->pipe.device->bus->hci_private; 1884 1885 DPRINTF(("ohci_timeout: oxfer=%p\n", oxfer)); 1886 1887 if (sc->sc_dying) { 1888 ohci_abort_xfer(&oxfer->xfer, USBD_TIMEOUT); 1889 return; 1890 } 1891 1892 /* Execute the abort in a process context. */ 1893 usb_init_task(&oxfer->abort_task, ohci_timeout_task, addr); 1894 usb_add_task(oxfer->xfer.pipe->device, &oxfer->abort_task, 1895 USB_TASKQ_HC); 1896 } 1897 1898 void 1899 ohci_timeout_task(void *addr) 1900 { 1901 usbd_xfer_handle xfer = addr; 1902 int s; 1903 1904 DPRINTF(("ohci_timeout_task: xfer=%p\n", xfer)); 1905 1906 s = splusb(); 1907 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1908 splx(s); 1909 } 1910 1911 #ifdef OHCI_DEBUG 1912 void 1913 ohci_dump_tds(ohci_softc_t *sc, ohci_soft_td_t *std) 1914 { 1915 for (; std; std = std->nexttd) 1916 ohci_dump_td(sc, std); 1917 } 1918 1919 void 1920 ohci_dump_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1921 { 1922 char sbuf[128]; 1923 1924 bitmask_snprintf((u_int32_t)O32TOH(std->td.td_flags), 1925 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 1926 sbuf, sizeof(sbuf)); 1927 1928 printf("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx " 1929 "nexttd=0x%08lx be=0x%08lx\n", 1930 std, (u_long)std->physaddr, sbuf, 1931 OHCI_TD_GET_DI(O32TOH(std->td.td_flags)), 1932 OHCI_TD_GET_EC(O32TOH(std->td.td_flags)), 1933 OHCI_TD_GET_CC(O32TOH(std->td.td_flags)), 1934 (u_long)O32TOH(std->td.td_cbp), 1935 (u_long)O32TOH(std->td.td_nexttd), 1936 (u_long)O32TOH(std->td.td_be)); 1937 } 1938 1939 void 1940 ohci_dump_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1941 { 1942 int i; 1943 1944 printf("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n" 1945 "bp0=0x%08lx next=0x%08lx be=0x%08lx\n", 1946 sitd, (u_long)sitd->physaddr, 1947 OHCI_ITD_GET_SF(O32TOH(sitd->itd.itd_flags)), 1948 OHCI_ITD_GET_DI(O32TOH(sitd->itd.itd_flags)), 1949 OHCI_ITD_GET_FC(O32TOH(sitd->itd.itd_flags)), 1950 OHCI_ITD_GET_CC(O32TOH(sitd->itd.itd_flags)), 1951 (u_long)O32TOH(sitd->itd.itd_bp0), 1952 (u_long)O32TOH(sitd->itd.itd_nextitd), 1953 (u_long)O32TOH(sitd->itd.itd_be)); 1954 for (i = 0; i < OHCI_ITD_NOFFSET; i++) 1955 printf("offs[%d]=0x%04x ", i, 1956 (u_int)O16TOH(sitd->itd.itd_offset[i])); 1957 printf("\n"); 1958 } 1959 1960 void 1961 ohci_dump_itds(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1962 { 1963 for (; sitd; sitd = sitd->nextitd) 1964 ohci_dump_itd(sc, sitd); 1965 } 1966 1967 void 1968 ohci_dump_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 1969 { 1970 char sbuf[128], sbuf2[128]; 1971 1972 bitmask_snprintf((u_int32_t)O32TOH(sed->ed.ed_flags), 1973 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO", 1974 sbuf, sizeof(sbuf)); 1975 bitmask_snprintf((u_int32_t)O32TOH(sed->ed.ed_headp), 1976 "\20\1HALT\2CARRY", sbuf2, sizeof(sbuf2)); 1977 1978 printf("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d flags=%s\ntailp=0x%08lx " 1979 "headflags=%s headp=0x%08lx nexted=0x%08lx\n", 1980 sed, (u_long)sed->physaddr, 1981 OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)), 1982 OHCI_ED_GET_EN(O32TOH(sed->ed.ed_flags)), 1983 OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)), sbuf, 1984 (u_long)O32TOH(sed->ed.ed_tailp), sbuf2, 1985 (u_long)O32TOH(sed->ed.ed_headp), 1986 (u_long)O32TOH(sed->ed.ed_nexted)); 1987 } 1988 #endif 1989 1990 usbd_status 1991 ohci_open(usbd_pipe_handle pipe) 1992 { 1993 usbd_device_handle dev = pipe->device; 1994 ohci_softc_t *sc = dev->bus->hci_private; 1995 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1996 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1997 u_int8_t addr = dev->address; 1998 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1999 ohci_soft_ed_t *sed; 2000 ohci_soft_td_t *std; 2001 ohci_soft_itd_t *sitd; 2002 ohci_physaddr_t tdphys; 2003 u_int32_t fmt; 2004 usbd_status err; 2005 int s; 2006 int ival; 2007 2008 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 2009 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 2010 2011 if (sc->sc_dying) 2012 return (USBD_IOERROR); 2013 2014 std = NULL; 2015 sed = NULL; 2016 2017 if (addr == sc->sc_addr) { 2018 switch (ed->bEndpointAddress) { 2019 case USB_CONTROL_ENDPOINT: 2020 pipe->methods = &ohci_root_ctrl_methods; 2021 break; 2022 case UE_DIR_IN | OHCI_INTR_ENDPT: 2023 pipe->methods = &ohci_root_intr_methods; 2024 break; 2025 default: 2026 return (USBD_INVAL); 2027 } 2028 } else { 2029 sed = ohci_alloc_sed(sc); 2030 if (sed == NULL) 2031 goto bad0; 2032 opipe->sed = sed; 2033 if (xfertype == UE_ISOCHRONOUS) { 2034 sitd = ohci_alloc_sitd(sc); 2035 if (sitd == NULL) 2036 goto bad1; 2037 opipe->tail.itd = sitd; 2038 tdphys = sitd->physaddr; 2039 fmt = OHCI_ED_FORMAT_ISO; 2040 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 2041 fmt |= OHCI_ED_DIR_IN; 2042 else 2043 fmt |= OHCI_ED_DIR_OUT; 2044 } else { 2045 std = ohci_alloc_std(sc); 2046 if (std == NULL) 2047 goto bad1; 2048 opipe->tail.td = std; 2049 tdphys = std->physaddr; 2050 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD; 2051 } 2052 sed->ed.ed_flags = HTOO32( 2053 OHCI_ED_SET_FA(addr) | 2054 OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) | 2055 (dev->speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) | 2056 fmt | 2057 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 2058 sed->ed.ed_headp = sed->ed.ed_tailp = HTOO32(tdphys); 2059 2060 switch (xfertype) { 2061 case UE_CONTROL: 2062 pipe->methods = &ohci_device_ctrl_methods; 2063 err = usb_allocmem(&sc->sc_bus, 2064 sizeof(usb_device_request_t), 2065 0, &opipe->u.ctl.reqdma); 2066 if (err) 2067 goto bad; 2068 s = splusb(); 2069 ohci_add_ed(sc, sed, sc->sc_ctrl_head); 2070 splx(s); 2071 break; 2072 case UE_INTERRUPT: 2073 pipe->methods = &ohci_device_intr_methods; 2074 ival = pipe->interval; 2075 if (ival == USBD_DEFAULT_INTERVAL) 2076 ival = ed->bInterval; 2077 return (ohci_device_setintr(sc, opipe, ival)); 2078 case UE_ISOCHRONOUS: 2079 pipe->methods = &ohci_device_isoc_methods; 2080 return (ohci_setup_isoc(pipe)); 2081 case UE_BULK: 2082 pipe->methods = &ohci_device_bulk_methods; 2083 s = splusb(); 2084 ohci_add_ed(sc, sed, sc->sc_bulk_head); 2085 splx(s); 2086 break; 2087 } 2088 } 2089 return (USBD_NORMAL_COMPLETION); 2090 2091 bad: 2092 if (std != NULL) 2093 ohci_free_std(sc, std); 2094 bad1: 2095 if (sed != NULL) 2096 ohci_free_sed(sc, sed); 2097 bad0: 2098 return (USBD_NOMEM); 2099 2100 } 2101 2102 /* 2103 * Close a reqular pipe. 2104 * Assumes that there are no pending transactions. 2105 */ 2106 void 2107 ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head) 2108 { 2109 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2110 ohci_softc_t *sc = pipe->device->bus->hci_private; 2111 ohci_soft_ed_t *sed = opipe->sed; 2112 int s; 2113 2114 s = splusb(); 2115 #ifdef DIAGNOSTIC 2116 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 2117 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2118 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) { 2119 ohci_soft_td_t *std; 2120 std = ohci_hash_find_td(sc, O32TOH(sed->ed.ed_headp)); 2121 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 2122 "tl=0x%x pipe=%p, std=%p\n", sed, 2123 (int)O32TOH(sed->ed.ed_headp), 2124 (int)O32TOH(sed->ed.ed_tailp), 2125 pipe, std); 2126 #ifdef USB_DEBUG 2127 usbd_dump_pipe(&opipe->pipe); 2128 #endif 2129 #ifdef OHCI_DEBUG 2130 ohci_dump_ed(sc, sed); 2131 if (std) 2132 ohci_dump_td(sc, std); 2133 #endif 2134 usb_delay_ms(&sc->sc_bus, 2); 2135 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2136 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) 2137 printf("ohci_close_pipe: pipe still not empty\n"); 2138 } 2139 #endif 2140 ohci_rem_ed(sed, head); 2141 /* Make sure the host controller is not touching this ED */ 2142 usb_delay_ms(&sc->sc_bus, 1); 2143 splx(s); 2144 ohci_free_sed(sc, opipe->sed); 2145 } 2146 2147 /* 2148 * Abort a device request. 2149 * If this routine is called at splusb() it guarantees that the request 2150 * will be removed from the hardware scheduling and that the callback 2151 * for it will be called with USBD_CANCELLED status. 2152 * It's impossible to guarantee that the requested transfer will not 2153 * have happened since the hardware runs concurrently. 2154 * If the transaction has already happened we rely on the ordinary 2155 * interrupt processing to process it. 2156 */ 2157 void 2158 ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2159 { 2160 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2161 ohci_softc_t *sc = opipe->pipe.device->bus->hci_private; 2162 ohci_soft_ed_t *sed = opipe->sed; 2163 ohci_soft_td_t *p, *n; 2164 ohci_physaddr_t headp; 2165 int s, hit; 2166 int wake; 2167 2168 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p sed=%p\n", xfer, opipe,sed)); 2169 2170 if (sc->sc_dying) { 2171 /* If we're dying, just do the software part. */ 2172 s = splusb(); 2173 xfer->status = status; /* make software ignore it */ 2174 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 2175 usb_transfer_complete(xfer); 2176 splx(s); 2177 return; 2178 } 2179 2180 if (xfer->device->bus->intr_context || !curproc) 2181 panic("ohci_abort_xfer: not in process context"); 2182 2183 /* 2184 * If an abort is already in progress then just wait for it to 2185 * complete and return. 2186 */ 2187 if (xfer->hcflags & UXFER_ABORTING) { 2188 DPRINTFN(2, ("ohci_abort_xfer: already aborting\n")); 2189 #ifdef DIAGNOSTIC 2190 if (status == USBD_TIMEOUT) 2191 printf("0hci_abort_xfer: TIMEOUT while aborting\n"); 2192 #endif 2193 /* Override the status which might be USBD_TIMEOUT. */ 2194 xfer->status = status; 2195 DPRINTFN(2, ("ohci_abort_xfer: waiting for abort to finish\n")); 2196 xfer->hcflags |= UXFER_ABORTWAIT; 2197 while (xfer->hcflags & UXFER_ABORTING) 2198 tsleep(&xfer->hcflags, PZERO, "ohciaw", 0); 2199 return; 2200 } 2201 xfer->hcflags |= UXFER_ABORTING; 2202 2203 /* 2204 * Step 1: Make interrupt routine and hardware ignore xfer. 2205 */ 2206 s = splusb(); 2207 xfer->status = status; /* make software ignore it */ 2208 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 2209 splx(s); 2210 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed)); 2211 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */ 2212 2213 /* 2214 * Step 2: Wait until we know hardware has finished any possible 2215 * use of the xfer. Also make sure the soft interrupt routine 2216 * has run. 2217 */ 2218 usb_delay_ms(opipe->pipe.device->bus, 20); /* Hardware finishes in 1ms */ 2219 s = splusb(); 2220 #ifdef USB_USE_SOFTINTR 2221 sc->sc_softwake = 1; 2222 #endif /* USB_USE_SOFTINTR */ 2223 usb_schedsoftintr(&sc->sc_bus); 2224 #ifdef USB_USE_SOFTINTR 2225 tsleep(&sc->sc_softwake, PZERO, "ohciab", 0); 2226 #endif /* USB_USE_SOFTINTR */ 2227 splx(s); 2228 2229 /* 2230 * Step 3: Remove any vestiges of the xfer from the hardware. 2231 * The complication here is that the hardware may have executed 2232 * beyond the xfer we're trying to abort. So as we're scanning 2233 * the TDs of this xfer we check if the hardware points to 2234 * any of them. 2235 */ 2236 s = splusb(); /* XXX why? */ 2237 p = xfer->hcpriv; 2238 #ifdef DIAGNOSTIC 2239 if (p == NULL) { 2240 xfer->hcflags &= ~UXFER_ABORTING; /* XXX */ 2241 splx(s); 2242 printf("ohci_abort_xfer: hcpriv is NULL\n"); 2243 return; 2244 } 2245 #endif 2246 #ifdef OHCI_DEBUG 2247 if (ohcidebug > 1) { 2248 DPRINTF(("ohci_abort_xfer: sed=\n")); 2249 ohci_dump_ed(sc, sed); 2250 ohci_dump_tds(sc, p); 2251 } 2252 #endif 2253 headp = O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK; 2254 hit = 0; 2255 for (; p->xfer == xfer; p = n) { 2256 hit |= headp == p->physaddr; 2257 n = p->nexttd; 2258 ohci_free_std(sc, p); 2259 } 2260 /* Zap headp register if hardware pointed inside the xfer. */ 2261 if (hit) { 2262 DPRINTFN(1,("ohci_abort_xfer: set hd=0x%08x, tl=0x%08x\n", 2263 (int)p->physaddr, (int)O32TOH(sed->ed.ed_tailp))); 2264 sed->ed.ed_headp = HTOO32(p->physaddr); /* unlink TDs */ 2265 } else { 2266 DPRINTFN(1,("ohci_abort_xfer: no hit\n")); 2267 } 2268 2269 /* 2270 * Step 4: Turn on hardware again. 2271 */ 2272 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */ 2273 2274 /* 2275 * Step 5: Execute callback. 2276 */ 2277 wake = xfer->hcflags & UXFER_ABORTWAIT; 2278 xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT); 2279 usb_transfer_complete(xfer); 2280 if (wake) 2281 wakeup(&xfer->hcflags); 2282 2283 splx(s); 2284 } 2285 2286 /* 2287 * Data structures and routines to emulate the root hub. 2288 */ 2289 Static usb_device_descriptor_t ohci_devd = { 2290 USB_DEVICE_DESCRIPTOR_SIZE, 2291 UDESC_DEVICE, /* type */ 2292 {0x00, 0x01}, /* USB version */ 2293 UDCLASS_HUB, /* class */ 2294 UDSUBCLASS_HUB, /* subclass */ 2295 UDPROTO_FSHUB, 2296 64, /* max packet */ 2297 {0},{0},{0x00,0x01}, /* device id */ 2298 1,2,0, /* string indicies */ 2299 1 /* # of configurations */ 2300 }; 2301 2302 Static const usb_config_descriptor_t ohci_confd = { 2303 USB_CONFIG_DESCRIPTOR_SIZE, 2304 UDESC_CONFIG, 2305 {USB_CONFIG_DESCRIPTOR_SIZE + 2306 USB_INTERFACE_DESCRIPTOR_SIZE + 2307 USB_ENDPOINT_DESCRIPTOR_SIZE}, 2308 1, 2309 1, 2310 0, 2311 UC_ATTR_MBO | UC_SELF_POWERED, 2312 0 /* max power */ 2313 }; 2314 2315 Static const usb_interface_descriptor_t ohci_ifcd = { 2316 USB_INTERFACE_DESCRIPTOR_SIZE, 2317 UDESC_INTERFACE, 2318 0, 2319 0, 2320 1, 2321 UICLASS_HUB, 2322 UISUBCLASS_HUB, 2323 UIPROTO_FSHUB, 2324 0 2325 }; 2326 2327 Static const usb_endpoint_descriptor_t ohci_endpd = { 2328 .bLength = USB_ENDPOINT_DESCRIPTOR_SIZE, 2329 .bDescriptorType = UDESC_ENDPOINT, 2330 .bEndpointAddress = UE_DIR_IN | OHCI_INTR_ENDPT, 2331 .bmAttributes = UE_INTERRUPT, 2332 .wMaxPacketSize = {8, 0}, /* max packet */ 2333 .bInterval = 255, 2334 }; 2335 2336 Static const usb_hub_descriptor_t ohci_hubd = { 2337 .bDescLength = USB_HUB_DESCRIPTOR_SIZE, 2338 .bDescriptorType = UDESC_HUB, 2339 }; 2340 2341 /* 2342 * Simulate a hardware hub by handling all the necessary requests. 2343 */ 2344 Static usbd_status 2345 ohci_root_ctrl_transfer(usbd_xfer_handle xfer) 2346 { 2347 usbd_status err; 2348 2349 /* Insert last in queue. */ 2350 err = usb_insert_transfer(xfer); 2351 if (err) 2352 return (err); 2353 2354 /* Pipe isn't running, start first */ 2355 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2356 } 2357 2358 Static usbd_status 2359 ohci_root_ctrl_start(usbd_xfer_handle xfer) 2360 { 2361 ohci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2362 usb_device_request_t *req; 2363 void *buf = NULL; 2364 int port, i; 2365 int s, len, value, index, l, totlen = 0; 2366 usb_port_status_t ps; 2367 usb_hub_descriptor_t hubd; 2368 usbd_status err; 2369 u_int32_t v; 2370 2371 if (sc->sc_dying) 2372 return (USBD_IOERROR); 2373 2374 #ifdef DIAGNOSTIC 2375 if (!(xfer->rqflags & URQ_REQUEST)) 2376 /* XXX panic */ 2377 return (USBD_INVAL); 2378 #endif 2379 req = &xfer->request; 2380 2381 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 2382 req->bmRequestType, req->bRequest)); 2383 2384 len = UGETW(req->wLength); 2385 value = UGETW(req->wValue); 2386 index = UGETW(req->wIndex); 2387 2388 if (len != 0) 2389 buf = KERNADDR(&xfer->dmabuf, 0); 2390 2391 #define C(x,y) ((x) | ((y) << 8)) 2392 switch(C(req->bRequest, req->bmRequestType)) { 2393 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 2394 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 2395 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 2396 /* 2397 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 2398 * for the integrated root hub. 2399 */ 2400 break; 2401 case C(UR_GET_CONFIG, UT_READ_DEVICE): 2402 if (len > 0) { 2403 *(u_int8_t *)buf = sc->sc_conf; 2404 totlen = 1; 2405 } 2406 break; 2407 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2408 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 2409 if (len == 0) 2410 break; 2411 switch(value >> 8) { 2412 case UDESC_DEVICE: 2413 if ((value & 0xff) != 0) { 2414 err = USBD_IOERROR; 2415 goto ret; 2416 } 2417 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 2418 USETW(ohci_devd.idVendor, sc->sc_id_vendor); 2419 memcpy(buf, &ohci_devd, l); 2420 break; 2421 case UDESC_CONFIG: 2422 if ((value & 0xff) != 0) { 2423 err = USBD_IOERROR; 2424 goto ret; 2425 } 2426 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 2427 memcpy(buf, &ohci_confd, l); 2428 buf = (char *)buf + l; 2429 len -= l; 2430 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 2431 totlen += l; 2432 memcpy(buf, &ohci_ifcd, l); 2433 buf = (char *)buf + l; 2434 len -= l; 2435 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 2436 totlen += l; 2437 memcpy(buf, &ohci_endpd, l); 2438 break; 2439 case UDESC_STRING: 2440 #define sd ((usb_string_descriptor_t *)buf) 2441 switch (value & 0xff) { 2442 case 0: /* Language table */ 2443 totlen = usb_makelangtbl(sd, len); 2444 break; 2445 case 1: /* Vendor */ 2446 totlen = usb_makestrdesc(sd, len, 2447 sc->sc_vendor); 2448 break; 2449 case 2: /* Product */ 2450 totlen = usb_makestrdesc(sd, len, 2451 "OHCI root hub"); 2452 break; 2453 } 2454 #undef sd 2455 break; 2456 default: 2457 err = USBD_IOERROR; 2458 goto ret; 2459 } 2460 break; 2461 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 2462 if (len > 0) { 2463 *(u_int8_t *)buf = 0; 2464 totlen = 1; 2465 } 2466 break; 2467 case C(UR_GET_STATUS, UT_READ_DEVICE): 2468 if (len > 1) { 2469 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 2470 totlen = 2; 2471 } 2472 break; 2473 case C(UR_GET_STATUS, UT_READ_INTERFACE): 2474 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 2475 if (len > 1) { 2476 USETW(((usb_status_t *)buf)->wStatus, 0); 2477 totlen = 2; 2478 } 2479 break; 2480 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 2481 if (value >= USB_MAX_DEVICES) { 2482 err = USBD_IOERROR; 2483 goto ret; 2484 } 2485 sc->sc_addr = value; 2486 break; 2487 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 2488 if (value != 0 && value != 1) { 2489 err = USBD_IOERROR; 2490 goto ret; 2491 } 2492 sc->sc_conf = value; 2493 break; 2494 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 2495 break; 2496 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 2497 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 2498 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 2499 err = USBD_IOERROR; 2500 goto ret; 2501 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 2502 break; 2503 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 2504 break; 2505 /* Hub requests */ 2506 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2507 break; 2508 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2509 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 2510 "port=%d feature=%d\n", 2511 index, value)); 2512 if (index < 1 || index > sc->sc_noport) { 2513 err = USBD_IOERROR; 2514 goto ret; 2515 } 2516 port = OHCI_RH_PORT_STATUS(index); 2517 switch(value) { 2518 case UHF_PORT_ENABLE: 2519 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2520 break; 2521 case UHF_PORT_SUSPEND: 2522 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2523 break; 2524 case UHF_PORT_POWER: 2525 /* Yes, writing to the LOW_SPEED bit clears power. */ 2526 OWRITE4(sc, port, UPS_LOW_SPEED); 2527 break; 2528 case UHF_C_PORT_CONNECTION: 2529 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2530 break; 2531 case UHF_C_PORT_ENABLE: 2532 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2533 break; 2534 case UHF_C_PORT_SUSPEND: 2535 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2536 break; 2537 case UHF_C_PORT_OVER_CURRENT: 2538 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2539 break; 2540 case UHF_C_PORT_RESET: 2541 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2542 break; 2543 default: 2544 err = USBD_IOERROR; 2545 goto ret; 2546 } 2547 switch(value) { 2548 case UHF_C_PORT_CONNECTION: 2549 case UHF_C_PORT_ENABLE: 2550 case UHF_C_PORT_SUSPEND: 2551 case UHF_C_PORT_OVER_CURRENT: 2552 case UHF_C_PORT_RESET: 2553 /* Enable RHSC interrupt if condition is cleared. */ 2554 if ((OREAD4(sc, port) >> 16) == 0) 2555 ohci_rhsc_enable(sc); 2556 break; 2557 default: 2558 break; 2559 } 2560 break; 2561 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2562 if (len == 0) 2563 break; 2564 if ((value & 0xff) != 0) { 2565 err = USBD_IOERROR; 2566 goto ret; 2567 } 2568 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2569 hubd = ohci_hubd; 2570 hubd.bNbrPorts = sc->sc_noport; 2571 USETW(hubd.wHubCharacteristics, 2572 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2573 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2574 /* XXX overcurrent */ 2575 ); 2576 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2577 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2578 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2579 hubd.DeviceRemovable[i++] = (u_int8_t)v; 2580 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2581 l = min(len, hubd.bDescLength); 2582 totlen = l; 2583 memcpy(buf, &hubd, l); 2584 break; 2585 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2586 if (len != 4) { 2587 err = USBD_IOERROR; 2588 goto ret; 2589 } 2590 memset(buf, 0, len); /* ? XXX */ 2591 totlen = len; 2592 break; 2593 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2594 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 2595 index)); 2596 if (index < 1 || index > sc->sc_noport) { 2597 err = USBD_IOERROR; 2598 goto ret; 2599 } 2600 if (len != 4) { 2601 err = USBD_IOERROR; 2602 goto ret; 2603 } 2604 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2605 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 2606 v)); 2607 USETW(ps.wPortStatus, v); 2608 USETW(ps.wPortChange, v >> 16); 2609 l = min(len, sizeof ps); 2610 memcpy(buf, &ps, l); 2611 totlen = l; 2612 break; 2613 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2614 err = USBD_IOERROR; 2615 goto ret; 2616 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2617 break; 2618 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2619 if (index < 1 || index > sc->sc_noport) { 2620 err = USBD_IOERROR; 2621 goto ret; 2622 } 2623 port = OHCI_RH_PORT_STATUS(index); 2624 switch(value) { 2625 case UHF_PORT_ENABLE: 2626 OWRITE4(sc, port, UPS_PORT_ENABLED); 2627 break; 2628 case UHF_PORT_SUSPEND: 2629 OWRITE4(sc, port, UPS_SUSPEND); 2630 break; 2631 case UHF_PORT_RESET: 2632 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 2633 index)); 2634 OWRITE4(sc, port, UPS_RESET); 2635 for (i = 0; i < 5; i++) { 2636 usb_delay_ms(&sc->sc_bus, 2637 USB_PORT_ROOT_RESET_DELAY); 2638 if (sc->sc_dying) { 2639 err = USBD_IOERROR; 2640 goto ret; 2641 } 2642 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2643 break; 2644 } 2645 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 2646 index, OREAD4(sc, port))); 2647 break; 2648 case UHF_PORT_POWER: 2649 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 2650 "%d\n", index)); 2651 OWRITE4(sc, port, UPS_PORT_POWER); 2652 break; 2653 default: 2654 err = USBD_IOERROR; 2655 goto ret; 2656 } 2657 break; 2658 default: 2659 err = USBD_IOERROR; 2660 goto ret; 2661 } 2662 xfer->actlen = totlen; 2663 err = USBD_NORMAL_COMPLETION; 2664 ret: 2665 xfer->status = err; 2666 s = splusb(); 2667 usb_transfer_complete(xfer); 2668 splx(s); 2669 return (USBD_IN_PROGRESS); 2670 } 2671 2672 /* Abort a root control request. */ 2673 Static void 2674 ohci_root_ctrl_abort(usbd_xfer_handle xfer) 2675 { 2676 /* Nothing to do, all transfers are synchronous. */ 2677 } 2678 2679 /* Close the root pipe. */ 2680 Static void 2681 ohci_root_ctrl_close(usbd_pipe_handle pipe) 2682 { 2683 DPRINTF(("ohci_root_ctrl_close\n")); 2684 /* Nothing to do. */ 2685 } 2686 2687 Static usbd_status 2688 ohci_root_intr_transfer(usbd_xfer_handle xfer) 2689 { 2690 usbd_status err; 2691 2692 /* Insert last in queue. */ 2693 err = usb_insert_transfer(xfer); 2694 if (err) 2695 return (err); 2696 2697 /* Pipe isn't running, start first */ 2698 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2699 } 2700 2701 Static usbd_status 2702 ohci_root_intr_start(usbd_xfer_handle xfer) 2703 { 2704 usbd_pipe_handle pipe = xfer->pipe; 2705 ohci_softc_t *sc = pipe->device->bus->hci_private; 2706 2707 if (sc->sc_dying) 2708 return (USBD_IOERROR); 2709 2710 sc->sc_intrxfer = xfer; 2711 2712 return (USBD_IN_PROGRESS); 2713 } 2714 2715 /* Abort a root interrupt request. */ 2716 Static void 2717 ohci_root_intr_abort(usbd_xfer_handle xfer) 2718 { 2719 int s; 2720 2721 if (xfer->pipe->intrxfer == xfer) { 2722 DPRINTF(("ohci_root_intr_abort: remove\n")); 2723 xfer->pipe->intrxfer = NULL; 2724 } 2725 xfer->status = USBD_CANCELLED; 2726 s = splusb(); 2727 usb_transfer_complete(xfer); 2728 splx(s); 2729 } 2730 2731 /* Close the root pipe. */ 2732 Static void 2733 ohci_root_intr_close(usbd_pipe_handle pipe) 2734 { 2735 ohci_softc_t *sc = pipe->device->bus->hci_private; 2736 2737 DPRINTF(("ohci_root_intr_close\n")); 2738 2739 sc->sc_intrxfer = NULL; 2740 } 2741 2742 /************************/ 2743 2744 Static usbd_status 2745 ohci_device_ctrl_transfer(usbd_xfer_handle xfer) 2746 { 2747 usbd_status err; 2748 2749 /* Insert last in queue. */ 2750 err = usb_insert_transfer(xfer); 2751 if (err) 2752 return (err); 2753 2754 /* Pipe isn't running, start first */ 2755 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2756 } 2757 2758 Static usbd_status 2759 ohci_device_ctrl_start(usbd_xfer_handle xfer) 2760 { 2761 ohci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2762 usbd_status err; 2763 2764 if (sc->sc_dying) 2765 return (USBD_IOERROR); 2766 2767 #ifdef DIAGNOSTIC 2768 if (!(xfer->rqflags & URQ_REQUEST)) { 2769 /* XXX panic */ 2770 printf("ohci_device_ctrl_transfer: not a request\n"); 2771 return (USBD_INVAL); 2772 } 2773 #endif 2774 2775 err = ohci_device_request(xfer); 2776 if (err) 2777 return (err); 2778 2779 if (sc->sc_bus.use_polling) 2780 ohci_waitintr(sc, xfer); 2781 return (USBD_IN_PROGRESS); 2782 } 2783 2784 /* Abort a device control request. */ 2785 Static void 2786 ohci_device_ctrl_abort(usbd_xfer_handle xfer) 2787 { 2788 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer)); 2789 ohci_abort_xfer(xfer, USBD_CANCELLED); 2790 } 2791 2792 /* Close a device control pipe. */ 2793 Static void 2794 ohci_device_ctrl_close(usbd_pipe_handle pipe) 2795 { 2796 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2797 ohci_softc_t *sc = pipe->device->bus->hci_private; 2798 2799 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe)); 2800 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2801 ohci_free_std(sc, opipe->tail.td); 2802 } 2803 2804 /************************/ 2805 2806 Static void 2807 ohci_device_clear_toggle(usbd_pipe_handle pipe) 2808 { 2809 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2810 ohci_softc_t *sc = pipe->device->bus->hci_private; 2811 2812 opipe->sed->ed.ed_headp &= HTOO32(~OHCI_TOGGLECARRY); 2813 } 2814 2815 Static void 2816 ohci_noop(usbd_pipe_handle pipe) 2817 { 2818 } 2819 2820 Static usbd_status 2821 ohci_device_bulk_transfer(usbd_xfer_handle xfer) 2822 { 2823 usbd_status err; 2824 2825 /* Insert last in queue. */ 2826 err = usb_insert_transfer(xfer); 2827 if (err) 2828 return (err); 2829 2830 /* Pipe isn't running, start first */ 2831 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2832 } 2833 2834 Static usbd_status 2835 ohci_device_bulk_start(usbd_xfer_handle xfer) 2836 { 2837 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2838 usbd_device_handle dev = opipe->pipe.device; 2839 ohci_softc_t *sc = dev->bus->hci_private; 2840 int addr = dev->address; 2841 ohci_soft_td_t *data, *tail, *tdp; 2842 ohci_soft_ed_t *sed; 2843 int s, len, isread, endpt; 2844 usbd_status err; 2845 2846 if (sc->sc_dying) 2847 return (USBD_IOERROR); 2848 2849 #ifdef DIAGNOSTIC 2850 if (xfer->rqflags & URQ_REQUEST) { 2851 /* XXX panic */ 2852 printf("ohci_device_bulk_start: a request\n"); 2853 return (USBD_INVAL); 2854 } 2855 #endif 2856 2857 len = xfer->length; 2858 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 2859 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2860 sed = opipe->sed; 2861 2862 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d " 2863 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags, 2864 endpt)); 2865 2866 opipe->u.bulk.isread = isread; 2867 opipe->u.bulk.length = len; 2868 2869 /* Update device address */ 2870 sed->ed.ed_flags = HTOO32( 2871 (O32TOH(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) | 2872 OHCI_ED_SET_FA(addr)); 2873 2874 /* Allocate a chain of new TDs (including a new tail). */ 2875 data = opipe->tail.td; 2876 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 2877 data, &tail); 2878 /* We want interrupt at the end of the transfer. */ 2879 tail->td.td_flags &= HTOO32(~OHCI_TD_INTR_MASK); 2880 tail->td.td_flags |= HTOO32(OHCI_TD_SET_DI(1)); 2881 tail->flags |= OHCI_CALL_DONE; 2882 tail = tail->nexttd; /* point at sentinel */ 2883 if (err) 2884 return (err); 2885 2886 tail->xfer = NULL; 2887 xfer->hcpriv = data; 2888 2889 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x " 2890 "td_cbp=0x%08x td_be=0x%08x\n", 2891 (int)O32TOH(sed->ed.ed_flags), 2892 (int)O32TOH(data->td.td_flags), 2893 (int)O32TOH(data->td.td_cbp), 2894 (int)O32TOH(data->td.td_be))); 2895 2896 #ifdef OHCI_DEBUG 2897 if (ohcidebug > 5) { 2898 ohci_dump_ed(sc, sed); 2899 ohci_dump_tds(sc, data); 2900 } 2901 #endif 2902 2903 /* Insert ED in schedule */ 2904 s = splusb(); 2905 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 2906 tdp->xfer = xfer; 2907 } 2908 sed->ed.ed_tailp = HTOO32(tail->physaddr); 2909 opipe->tail.td = tail; 2910 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 2911 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 2912 if (xfer->timeout && !sc->sc_bus.use_polling) { 2913 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2914 ohci_timeout, xfer); 2915 } 2916 2917 #if 0 2918 /* This goes wrong if we are too slow. */ 2919 if (ohcidebug > 10) { 2920 delay(10000); 2921 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2922 OREAD4(sc, OHCI_COMMAND_STATUS))); 2923 ohci_dump_ed(sc, sed); 2924 ohci_dump_tds(sc, data); 2925 } 2926 #endif 2927 2928 splx(s); 2929 2930 return (USBD_IN_PROGRESS); 2931 } 2932 2933 Static void 2934 ohci_device_bulk_abort(usbd_xfer_handle xfer) 2935 { 2936 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer)); 2937 ohci_abort_xfer(xfer, USBD_CANCELLED); 2938 } 2939 2940 /* 2941 * Close a device bulk pipe. 2942 */ 2943 Static void 2944 ohci_device_bulk_close(usbd_pipe_handle pipe) 2945 { 2946 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2947 ohci_softc_t *sc = pipe->device->bus->hci_private; 2948 2949 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe)); 2950 ohci_close_pipe(pipe, sc->sc_bulk_head); 2951 ohci_free_std(sc, opipe->tail.td); 2952 } 2953 2954 /************************/ 2955 2956 Static usbd_status 2957 ohci_device_intr_transfer(usbd_xfer_handle xfer) 2958 { 2959 usbd_status err; 2960 2961 /* Insert last in queue. */ 2962 err = usb_insert_transfer(xfer); 2963 if (err) 2964 return (err); 2965 2966 /* Pipe isn't running, start first */ 2967 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2968 } 2969 2970 Static usbd_status 2971 ohci_device_intr_start(usbd_xfer_handle xfer) 2972 { 2973 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2974 usbd_device_handle dev = opipe->pipe.device; 2975 ohci_softc_t *sc = dev->bus->hci_private; 2976 ohci_soft_ed_t *sed = opipe->sed; 2977 ohci_soft_td_t *data, *tail; 2978 int s, len, isread, endpt; 2979 2980 if (sc->sc_dying) 2981 return (USBD_IOERROR); 2982 2983 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d " 2984 "flags=%d priv=%p\n", 2985 xfer, xfer->length, xfer->flags, xfer->priv)); 2986 2987 #ifdef DIAGNOSTIC 2988 if (xfer->rqflags & URQ_REQUEST) 2989 panic("ohci_device_intr_transfer: a request"); 2990 #endif 2991 2992 len = xfer->length; 2993 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 2994 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2995 2996 data = opipe->tail.td; 2997 tail = ohci_alloc_std(sc); 2998 if (tail == NULL) 2999 return (USBD_NOMEM); 3000 tail->xfer = NULL; 3001 3002 data->td.td_flags = HTOO32( 3003 isread ? OHCI_TD_IN : OHCI_TD_OUT | 3004 OHCI_TD_NOCC | 3005 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 3006 if (xfer->flags & USBD_SHORT_XFER_OK) 3007 data->td.td_flags |= HTOO32(OHCI_TD_R); 3008 data->td.td_cbp = HTOO32(DMAADDR(&xfer->dmabuf, 0)); 3009 data->nexttd = tail; 3010 data->td.td_nexttd = HTOO32(tail->physaddr); 3011 data->td.td_be = HTOO32(O32TOH(data->td.td_cbp) + len - 1); 3012 data->len = len; 3013 data->xfer = xfer; 3014 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 3015 xfer->hcpriv = data; 3016 3017 #ifdef OHCI_DEBUG 3018 if (ohcidebug > 5) { 3019 DPRINTF(("ohci_device_intr_transfer:\n")); 3020 ohci_dump_ed(sc, sed); 3021 ohci_dump_tds(sc, data); 3022 } 3023 #endif 3024 3025 /* Insert ED in schedule */ 3026 s = splusb(); 3027 sed->ed.ed_tailp = HTOO32(tail->physaddr); 3028 opipe->tail.td = tail; 3029 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3030 3031 #if 0 3032 /* 3033 * This goes horribly wrong, printing thousands of descriptors, 3034 * because false references are followed due to the fact that the 3035 * TD is gone. 3036 */ 3037 if (ohcidebug > 5) { 3038 usb_delay_ms(&sc->sc_bus, 5); 3039 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 3040 OREAD4(sc, OHCI_COMMAND_STATUS))); 3041 ohci_dump_ed(sc, sed); 3042 ohci_dump_tds(sc, data); 3043 } 3044 #endif 3045 splx(s); 3046 3047 return (USBD_IN_PROGRESS); 3048 } 3049 3050 /* Abort a device control request. */ 3051 Static void 3052 ohci_device_intr_abort(usbd_xfer_handle xfer) 3053 { 3054 if (xfer->pipe->intrxfer == xfer) { 3055 DPRINTF(("ohci_device_intr_abort: remove\n")); 3056 xfer->pipe->intrxfer = NULL; 3057 } 3058 ohci_abort_xfer(xfer, USBD_CANCELLED); 3059 } 3060 3061 /* Close a device interrupt pipe. */ 3062 Static void 3063 ohci_device_intr_close(usbd_pipe_handle pipe) 3064 { 3065 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3066 ohci_softc_t *sc = pipe->device->bus->hci_private; 3067 int nslots = opipe->u.intr.nslots; 3068 int pos = opipe->u.intr.pos; 3069 int j; 3070 ohci_soft_ed_t *p, *sed = opipe->sed; 3071 int s; 3072 3073 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 3074 pipe, nslots, pos)); 3075 s = splusb(); 3076 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 3077 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 3078 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) 3079 usb_delay_ms(&sc->sc_bus, 2); 3080 3081 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 3082 continue; 3083 #ifdef DIAGNOSTIC 3084 if (p == NULL) 3085 panic("ohci_device_intr_close: ED not found"); 3086 #endif 3087 p->next = sed->next; 3088 p->ed.ed_nexted = sed->ed.ed_nexted; 3089 splx(s); 3090 3091 for (j = 0; j < nslots; j++) 3092 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 3093 3094 ohci_free_std(sc, opipe->tail.td); 3095 ohci_free_sed(sc, opipe->sed); 3096 } 3097 3098 Static usbd_status 3099 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival) 3100 { 3101 int i, j, s, best; 3102 u_int npoll, slow, shigh, nslots; 3103 u_int bestbw, bw; 3104 ohci_soft_ed_t *hsed, *sed = opipe->sed; 3105 3106 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 3107 if (ival == 0) { 3108 printf("ohci_setintr: 0 interval\n"); 3109 return (USBD_INVAL); 3110 } 3111 3112 npoll = OHCI_NO_INTRS; 3113 while (npoll > ival) 3114 npoll /= 2; 3115 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 3116 3117 /* 3118 * We now know which level in the tree the ED must go into. 3119 * Figure out which slot has most bandwidth left over. 3120 * Slots to examine: 3121 * npoll 3122 * 1 0 3123 * 2 1 2 3124 * 4 3 4 5 6 3125 * 8 7 8 9 10 11 12 13 14 3126 * N (N-1) .. (N-1+N-1) 3127 */ 3128 slow = npoll-1; 3129 shigh = slow + npoll; 3130 nslots = OHCI_NO_INTRS / npoll; 3131 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 3132 bw = 0; 3133 for (j = 0; j < nslots; j++) 3134 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 3135 if (bw < bestbw) { 3136 best = i; 3137 bestbw = bw; 3138 } 3139 } 3140 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 3141 best, slow, shigh, bestbw)); 3142 3143 s = splusb(); 3144 hsed = sc->sc_eds[best]; 3145 sed->next = hsed->next; 3146 sed->ed.ed_nexted = hsed->ed.ed_nexted; 3147 hsed->next = sed; 3148 hsed->ed.ed_nexted = HTOO32(sed->physaddr); 3149 splx(s); 3150 3151 for (j = 0; j < nslots; j++) 3152 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 3153 opipe->u.intr.nslots = nslots; 3154 opipe->u.intr.pos = best; 3155 3156 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 3157 return (USBD_NORMAL_COMPLETION); 3158 } 3159 3160 /***********************/ 3161 3162 usbd_status 3163 ohci_device_isoc_transfer(usbd_xfer_handle xfer) 3164 { 3165 usbd_status err; 3166 3167 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer)); 3168 3169 /* Put it on our queue, */ 3170 err = usb_insert_transfer(xfer); 3171 3172 /* bail out on error, */ 3173 if (err && err != USBD_IN_PROGRESS) 3174 return (err); 3175 3176 /* XXX should check inuse here */ 3177 3178 /* insert into schedule, */ 3179 ohci_device_isoc_enter(xfer); 3180 3181 /* and start if the pipe wasn't running */ 3182 if (!err) 3183 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 3184 3185 return (err); 3186 } 3187 3188 void 3189 ohci_device_isoc_enter(usbd_xfer_handle xfer) 3190 { 3191 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3192 usbd_device_handle dev = opipe->pipe.device; 3193 ohci_softc_t *sc = dev->bus->hci_private; 3194 ohci_soft_ed_t *sed = opipe->sed; 3195 struct iso *iso = &opipe->u.iso; 3196 ohci_soft_itd_t *sitd, *nsitd; 3197 ohci_physaddr_t buf, offs, noffs, bp0; 3198 int i, ncur, nframes; 3199 int s; 3200 3201 DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p " 3202 "nframes=%d\n", 3203 iso->inuse, iso->next, xfer, xfer->nframes)); 3204 3205 if (sc->sc_dying) 3206 return; 3207 3208 if (iso->next == -1) { 3209 /* Not in use yet, schedule it a few frames ahead. */ 3210 iso->next = O32TOH(sc->sc_hcca->hcca_frame_number) + 5; 3211 DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n", 3212 iso->next)); 3213 } 3214 3215 sitd = opipe->tail.itd; 3216 buf = DMAADDR(&xfer->dmabuf, 0); 3217 bp0 = OHCI_PAGE(buf); 3218 offs = OHCI_PAGE_OFFSET(buf); 3219 nframes = xfer->nframes; 3220 xfer->hcpriv = sitd; 3221 for (i = ncur = 0; i < nframes; i++, ncur++) { 3222 noffs = offs + xfer->frlengths[i]; 3223 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ 3224 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */ 3225 3226 /* Allocate next ITD */ 3227 nsitd = ohci_alloc_sitd(sc); 3228 if (nsitd == NULL) { 3229 /* XXX what now? */ 3230 printf("%s: isoc TD alloc failed\n", 3231 device_xname(sc->sc_dev)); 3232 return; 3233 } 3234 3235 /* Fill current ITD */ 3236 sitd->itd.itd_flags = HTOO32( 3237 OHCI_ITD_NOCC | 3238 OHCI_ITD_SET_SF(iso->next) | 3239 OHCI_ITD_SET_DI(6) | /* delay intr a little */ 3240 OHCI_ITD_SET_FC(ncur)); 3241 sitd->itd.itd_bp0 = HTOO32(bp0); 3242 sitd->nextitd = nsitd; 3243 sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr); 3244 sitd->itd.itd_be = HTOO32(bp0 + offs - 1); 3245 sitd->xfer = xfer; 3246 sitd->flags = 0; 3247 3248 sitd = nsitd; 3249 iso->next = iso->next + ncur; 3250 bp0 = OHCI_PAGE(buf + offs); 3251 ncur = 0; 3252 } 3253 sitd->itd.itd_offset[ncur] = HTOO16(OHCI_ITD_MK_OFFS(offs)); 3254 offs = noffs; 3255 } 3256 nsitd = ohci_alloc_sitd(sc); 3257 if (nsitd == NULL) { 3258 /* XXX what now? */ 3259 printf("%s: isoc TD alloc failed\n", 3260 device_xname(sc->sc_dev)); 3261 return; 3262 } 3263 /* Fixup last used ITD */ 3264 sitd->itd.itd_flags = HTOO32( 3265 OHCI_ITD_NOCC | 3266 OHCI_ITD_SET_SF(iso->next) | 3267 OHCI_ITD_SET_DI(0) | 3268 OHCI_ITD_SET_FC(ncur)); 3269 sitd->itd.itd_bp0 = HTOO32(bp0); 3270 sitd->nextitd = nsitd; 3271 sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr); 3272 sitd->itd.itd_be = HTOO32(bp0 + offs - 1); 3273 sitd->xfer = xfer; 3274 sitd->flags = OHCI_CALL_DONE; 3275 3276 iso->next = iso->next + ncur; 3277 iso->inuse += nframes; 3278 3279 xfer->actlen = offs; /* XXX pretend we did it all */ 3280 3281 xfer->status = USBD_IN_PROGRESS; 3282 3283 #ifdef OHCI_DEBUG 3284 if (ohcidebug > 5) { 3285 DPRINTF(("ohci_device_isoc_enter: frame=%d\n", 3286 O32TOH(sc->sc_hcca->hcca_frame_number))); 3287 ohci_dump_itds(sc, xfer->hcpriv); 3288 ohci_dump_ed(sc, sed); 3289 } 3290 #endif 3291 3292 s = splusb(); 3293 sed->ed.ed_tailp = HTOO32(nsitd->physaddr); 3294 opipe->tail.itd = nsitd; 3295 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3296 splx(s); 3297 3298 #ifdef OHCI_DEBUG 3299 if (ohcidebug > 5) { 3300 delay(150000); 3301 DPRINTF(("ohci_device_isoc_enter: after frame=%d\n", 3302 O32TOH(sc->sc_hcca->hcca_frame_number))); 3303 ohci_dump_itds(sc, xfer->hcpriv); 3304 ohci_dump_ed(sc, sed); 3305 } 3306 #endif 3307 } 3308 3309 usbd_status 3310 ohci_device_isoc_start(usbd_xfer_handle xfer) 3311 { 3312 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3313 ohci_softc_t *sc = opipe->pipe.device->bus->hci_private; 3314 3315 DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer)); 3316 3317 if (sc->sc_dying) 3318 return (USBD_IOERROR); 3319 3320 #ifdef DIAGNOSTIC 3321 if (xfer->status != USBD_IN_PROGRESS) 3322 printf("ohci_device_isoc_start: not in progress %p\n", xfer); 3323 #endif 3324 3325 /* XXX anything to do? */ 3326 3327 return (USBD_IN_PROGRESS); 3328 } 3329 3330 void 3331 ohci_device_isoc_abort(usbd_xfer_handle xfer) 3332 { 3333 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3334 ohci_softc_t *sc = opipe->pipe.device->bus->hci_private; 3335 ohci_soft_ed_t *sed; 3336 ohci_soft_itd_t *sitd; 3337 int s; 3338 3339 s = splusb(); 3340 3341 DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer)); 3342 3343 /* Transfer is already done. */ 3344 if (xfer->status != USBD_NOT_STARTED && 3345 xfer->status != USBD_IN_PROGRESS) { 3346 splx(s); 3347 printf("ohci_device_isoc_abort: early return\n"); 3348 return; 3349 } 3350 3351 /* Give xfer the requested abort code. */ 3352 xfer->status = USBD_CANCELLED; 3353 3354 sed = opipe->sed; 3355 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */ 3356 3357 sitd = xfer->hcpriv; 3358 #ifdef DIAGNOSTIC 3359 if (sitd == NULL) { 3360 splx(s); 3361 printf("ohci_device_isoc_abort: hcpriv==0\n"); 3362 return; 3363 } 3364 #endif 3365 for (; sitd->xfer == xfer; sitd = sitd->nextitd) { 3366 #ifdef DIAGNOSTIC 3367 DPRINTFN(1,("abort sets done sitd=%p\n", sitd)); 3368 sitd->isdone = 1; 3369 #endif 3370 } 3371 3372 splx(s); 3373 3374 usb_delay_ms(&sc->sc_bus, OHCI_ITD_NOFFSET); 3375 3376 s = splusb(); 3377 3378 /* Run callback. */ 3379 usb_transfer_complete(xfer); 3380 3381 sed->ed.ed_headp = HTOO32(sitd->physaddr); /* unlink TDs */ 3382 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */ 3383 3384 splx(s); 3385 } 3386 3387 void 3388 ohci_device_isoc_done(usbd_xfer_handle xfer) 3389 { 3390 DPRINTFN(1,("ohci_device_isoc_done: xfer=%p\n", xfer)); 3391 } 3392 3393 usbd_status 3394 ohci_setup_isoc(usbd_pipe_handle pipe) 3395 { 3396 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3397 ohci_softc_t *sc = pipe->device->bus->hci_private; 3398 struct iso *iso = &opipe->u.iso; 3399 int s; 3400 3401 iso->next = -1; 3402 iso->inuse = 0; 3403 3404 s = splusb(); 3405 ohci_add_ed(sc, opipe->sed, sc->sc_isoc_head); 3406 splx(s); 3407 3408 return (USBD_NORMAL_COMPLETION); 3409 } 3410 3411 void 3412 ohci_device_isoc_close(usbd_pipe_handle pipe) 3413 { 3414 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3415 ohci_softc_t *sc = pipe->device->bus->hci_private; 3416 3417 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe)); 3418 ohci_close_pipe(pipe, sc->sc_isoc_head); 3419 #ifdef DIAGNOSTIC 3420 opipe->tail.itd->isdone = 1; 3421 #endif 3422 ohci_free_sitd(sc, opipe->tail.itd); 3423 } 3424
Indexes created Wed Sep 24 22:09:59 GMT 2025