ohci.c revision 1.194
1 /* $NetBSD: ohci.c,v 1.194 2008/06/04 12:38:58 nonaka Exp $ */ 2 /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */ 3 4 /* 5 * Copyright (c) 1998, 2004, 2005 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Lennart Augustsson (lennart (at) augustsson.net) at 10 * Carlstedt Research & Technology. 11 * This code is derived from software contributed to The NetBSD Foundation 12 * by Charles M. Hannum. 13 * 14 * Redistribution and use in source and binary forms, with or without 15 * modification, are permitted provided that the following conditions 16 * are met: 17 * 1. Redistributions of source code must retain the above copyright 18 * notice, this list of conditions and the following disclaimer. 19 * 2. Redistributions in binary form must reproduce the above copyright 20 * notice, this list of conditions and the following disclaimer in the 21 * documentation and/or other materials provided with the distribution. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 24 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 25 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 26 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 27 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 31 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 32 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 33 * POSSIBILITY OF SUCH DAMAGE. 34 */ 35 36 /* 37 * USB Open Host Controller driver. 38 * 39 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html 40 * USB spec: http://www.usb.org/developers/docs/usbspec.zip 41 */ 42 43 #include <sys/cdefs.h> 44 __KERNEL_RCSID(0, "$NetBSD: ohci.c,v 1.194 2008/06/04 12:38:58 nonaka Exp $"); 45 46 #include <sys/param.h> 47 #include <sys/systm.h> 48 #include <sys/malloc.h> 49 #if defined(__NetBSD__) || defined(__OpenBSD__) 50 #include <sys/kernel.h> 51 #include <sys/device.h> 52 #include <sys/select.h> 53 #include <uvm/uvm_extern.h> 54 #elif defined(__FreeBSD__) 55 #include <sys/module.h> 56 #include <sys/bus.h> 57 #include <machine/bus_pio.h> 58 #include <machine/bus_memio.h> 59 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 60 #include <sys/cpu.h> 61 #endif 62 #endif 63 #include <sys/proc.h> 64 #include <sys/queue.h> 65 66 #include <sys/bus.h> 67 #include <machine/endian.h> 68 69 #include <dev/usb/usb.h> 70 #include <dev/usb/usbdi.h> 71 #include <dev/usb/usbdivar.h> 72 #include <dev/usb/usb_mem.h> 73 #include <dev/usb/usb_quirks.h> 74 75 #include <dev/usb/ohcireg.h> 76 #include <dev/usb/ohcivar.h> 77 #include <dev/usb/usbroothub_subr.h> 78 79 #if defined(__FreeBSD__) 80 #include <machine/clock.h> 81 82 #define delay(d) DELAY(d) 83 #endif 84 85 #if defined(__OpenBSD__) 86 struct cfdriver ohci_cd = { 87 NULL, "ohci", DV_DULL 88 }; 89 #endif 90 91 #ifdef OHCI_DEBUG 92 #define DPRINTF(x) if (ohcidebug) logprintf x 93 #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x 94 int ohcidebug = 0; 95 #ifndef __NetBSD__ 96 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 97 #endif 98 #else 99 #define DPRINTF(x) 100 #define DPRINTFN(n,x) 101 #endif 102 103 #if BYTE_ORDER == BIG_ENDIAN 104 #define SWAP_ENDIAN OHCI_LITTLE_ENDIAN 105 #else 106 #define SWAP_ENDIAN OHCI_BIG_ENDIAN 107 #endif 108 109 #define O16TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap16(val) : val) 110 #define O32TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap32(val) : val) 111 #define HTOO16(val) O16TOH(val) 112 #define HTOO32(val) O32TOH(val) 113 114 struct ohci_pipe; 115 116 Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *); 117 Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *); 118 119 Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *); 120 Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *); 121 122 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *); 123 Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *); 124 125 #if 0 126 Static void ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *, 127 ohci_soft_td_t *); 128 #endif 129 Static usbd_status ohci_alloc_std_chain(struct ohci_pipe *, 130 ohci_softc_t *, int, int, usbd_xfer_handle, 131 ohci_soft_td_t *, ohci_soft_td_t **); 132 133 Static usbd_status ohci_open(usbd_pipe_handle); 134 Static void ohci_poll(struct usbd_bus *); 135 Static void ohci_softintr(void *); 136 Static void ohci_waitintr(ohci_softc_t *, usbd_xfer_handle); 137 Static void ohci_rhsc(ohci_softc_t *, usbd_xfer_handle); 138 139 Static usbd_status ohci_device_request(usbd_xfer_handle xfer); 140 Static void ohci_add_ed(ohci_softc_t *, ohci_soft_ed_t *, 141 ohci_soft_ed_t *); 142 143 Static void ohci_rem_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 144 Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *); 145 Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *); 146 Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t); 147 Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *); 148 Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *); 149 Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t); 150 151 Static usbd_status ohci_setup_isoc(usbd_pipe_handle pipe); 152 Static void ohci_device_isoc_enter(usbd_xfer_handle); 153 154 Static usbd_status ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 155 Static void ohci_freem(struct usbd_bus *, usb_dma_t *); 156 157 Static usbd_xfer_handle ohci_allocx(struct usbd_bus *); 158 Static void ohci_freex(struct usbd_bus *, usbd_xfer_handle); 159 160 Static usbd_status ohci_root_ctrl_transfer(usbd_xfer_handle); 161 Static usbd_status ohci_root_ctrl_start(usbd_xfer_handle); 162 Static void ohci_root_ctrl_abort(usbd_xfer_handle); 163 Static void ohci_root_ctrl_close(usbd_pipe_handle); 164 Static void ohci_root_ctrl_done(usbd_xfer_handle); 165 166 Static usbd_status ohci_root_intr_transfer(usbd_xfer_handle); 167 Static usbd_status ohci_root_intr_start(usbd_xfer_handle); 168 Static void ohci_root_intr_abort(usbd_xfer_handle); 169 Static void ohci_root_intr_close(usbd_pipe_handle); 170 Static void ohci_root_intr_done(usbd_xfer_handle); 171 172 Static usbd_status ohci_device_ctrl_transfer(usbd_xfer_handle); 173 Static usbd_status ohci_device_ctrl_start(usbd_xfer_handle); 174 Static void ohci_device_ctrl_abort(usbd_xfer_handle); 175 Static void ohci_device_ctrl_close(usbd_pipe_handle); 176 Static void ohci_device_ctrl_done(usbd_xfer_handle); 177 178 Static usbd_status ohci_device_bulk_transfer(usbd_xfer_handle); 179 Static usbd_status ohci_device_bulk_start(usbd_xfer_handle); 180 Static void ohci_device_bulk_abort(usbd_xfer_handle); 181 Static void ohci_device_bulk_close(usbd_pipe_handle); 182 Static void ohci_device_bulk_done(usbd_xfer_handle); 183 184 Static usbd_status ohci_device_intr_transfer(usbd_xfer_handle); 185 Static usbd_status ohci_device_intr_start(usbd_xfer_handle); 186 Static void ohci_device_intr_abort(usbd_xfer_handle); 187 Static void ohci_device_intr_close(usbd_pipe_handle); 188 Static void ohci_device_intr_done(usbd_xfer_handle); 189 190 Static usbd_status ohci_device_isoc_transfer(usbd_xfer_handle); 191 Static usbd_status ohci_device_isoc_start(usbd_xfer_handle); 192 Static void ohci_device_isoc_abort(usbd_xfer_handle); 193 Static void ohci_device_isoc_close(usbd_pipe_handle); 194 Static void ohci_device_isoc_done(usbd_xfer_handle); 195 196 Static usbd_status ohci_device_setintr(ohci_softc_t *sc, 197 struct ohci_pipe *pipe, int ival); 198 199 Static void ohci_timeout(void *); 200 Static void ohci_timeout_task(void *); 201 Static void ohci_rhsc_enable(void *); 202 203 Static void ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *); 204 Static void ohci_abort_xfer(usbd_xfer_handle, usbd_status); 205 206 Static void ohci_device_clear_toggle(usbd_pipe_handle pipe); 207 Static void ohci_noop(usbd_pipe_handle pipe); 208 209 #ifdef OHCI_DEBUG 210 Static void ohci_dumpregs(ohci_softc_t *); 211 Static void ohci_dump_tds(ohci_softc_t *, ohci_soft_td_t *); 212 Static void ohci_dump_td(ohci_softc_t *, ohci_soft_td_t *); 213 Static void ohci_dump_ed(ohci_softc_t *, ohci_soft_ed_t *); 214 Static void ohci_dump_itd(ohci_softc_t *, ohci_soft_itd_t *); 215 Static void ohci_dump_itds(ohci_softc_t *, ohci_soft_itd_t *); 216 #endif 217 218 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 219 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 220 #define OWRITE1(sc, r, x) \ 221 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 222 #define OWRITE2(sc, r, x) \ 223 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 224 #define OWRITE4(sc, r, x) \ 225 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 226 static __inline uint8_t 227 OREAD1(ohci_softc_t *sc, bus_size_t r) 228 { 229 230 OBARR(sc); 231 return bus_space_read_1(sc->iot, sc->ioh, r); 232 } 233 234 static __inline uint16_t 235 OREAD2(ohci_softc_t *sc, bus_size_t r) 236 { 237 238 OBARR(sc); 239 return bus_space_read_2(sc->iot, sc->ioh, r); 240 } 241 242 static __inline uint32_t 243 OREAD4(ohci_softc_t *sc, bus_size_t r) 244 { 245 246 OBARR(sc); 247 return bus_space_read_4(sc->iot, sc->ioh, r); 248 } 249 250 /* Reverse the bits in a value 0 .. 31 */ 251 Static u_int8_t revbits[OHCI_NO_INTRS] = 252 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 253 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 254 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 255 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 256 257 struct ohci_pipe { 258 struct usbd_pipe pipe; 259 ohci_soft_ed_t *sed; 260 union { 261 ohci_soft_td_t *td; 262 ohci_soft_itd_t *itd; 263 } tail; 264 /* Info needed for different pipe kinds. */ 265 union { 266 /* Control pipe */ 267 struct { 268 usb_dma_t reqdma; 269 u_int length; 270 ohci_soft_td_t *setup, *data, *stat; 271 } ctl; 272 /* Interrupt pipe */ 273 struct { 274 int nslots; 275 int pos; 276 } intr; 277 /* Bulk pipe */ 278 struct { 279 u_int length; 280 int isread; 281 } bulk; 282 /* Iso pipe */ 283 struct iso { 284 int next, inuse; 285 } iso; 286 } u; 287 }; 288 289 #define OHCI_INTR_ENDPT 1 290 291 Static const struct usbd_bus_methods ohci_bus_methods = { 292 ohci_open, 293 ohci_softintr, 294 ohci_poll, 295 ohci_allocm, 296 ohci_freem, 297 ohci_allocx, 298 ohci_freex, 299 }; 300 301 Static const struct usbd_pipe_methods ohci_root_ctrl_methods = { 302 ohci_root_ctrl_transfer, 303 ohci_root_ctrl_start, 304 ohci_root_ctrl_abort, 305 ohci_root_ctrl_close, 306 ohci_noop, 307 ohci_root_ctrl_done, 308 }; 309 310 Static const struct usbd_pipe_methods ohci_root_intr_methods = { 311 ohci_root_intr_transfer, 312 ohci_root_intr_start, 313 ohci_root_intr_abort, 314 ohci_root_intr_close, 315 ohci_noop, 316 ohci_root_intr_done, 317 }; 318 319 Static const struct usbd_pipe_methods ohci_device_ctrl_methods = { 320 ohci_device_ctrl_transfer, 321 ohci_device_ctrl_start, 322 ohci_device_ctrl_abort, 323 ohci_device_ctrl_close, 324 ohci_noop, 325 ohci_device_ctrl_done, 326 }; 327 328 Static const struct usbd_pipe_methods ohci_device_intr_methods = { 329 ohci_device_intr_transfer, 330 ohci_device_intr_start, 331 ohci_device_intr_abort, 332 ohci_device_intr_close, 333 ohci_device_clear_toggle, 334 ohci_device_intr_done, 335 }; 336 337 Static const struct usbd_pipe_methods ohci_device_bulk_methods = { 338 ohci_device_bulk_transfer, 339 ohci_device_bulk_start, 340 ohci_device_bulk_abort, 341 ohci_device_bulk_close, 342 ohci_device_clear_toggle, 343 ohci_device_bulk_done, 344 }; 345 346 Static const struct usbd_pipe_methods ohci_device_isoc_methods = { 347 ohci_device_isoc_transfer, 348 ohci_device_isoc_start, 349 ohci_device_isoc_abort, 350 ohci_device_isoc_close, 351 ohci_noop, 352 ohci_device_isoc_done, 353 }; 354 355 #if defined(__NetBSD__) || defined(__OpenBSD__) 356 int 357 ohci_activate(device_t self, enum devact act) 358 { 359 struct ohci_softc *sc = device_private(self); 360 int rv = 0; 361 362 switch (act) { 363 case DVACT_ACTIVATE: 364 return (EOPNOTSUPP); 365 366 case DVACT_DEACTIVATE: 367 sc->sc_dying = 1; 368 if (sc->sc_child != NULL) 369 rv = config_deactivate(sc->sc_child); 370 break; 371 } 372 return (rv); 373 } 374 375 void 376 ohci_childdet(device_t self, device_t child) 377 { 378 struct ohci_softc *sc = device_private(self); 379 380 KASSERT(sc->sc_child == child); 381 sc->sc_child = NULL; 382 } 383 384 int 385 ohci_detach(struct ohci_softc *sc, int flags) 386 { 387 int rv = 0; 388 389 if (sc->sc_child != NULL) 390 rv = config_detach(sc->sc_child, flags); 391 392 if (rv != 0) 393 return (rv); 394 395 usb_uncallout(sc->sc_tmo_rhsc, ohci_rhsc_enable, sc); 396 397 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 398 399 /* free data structures XXX */ 400 401 return (rv); 402 } 403 #endif 404 405 ohci_soft_ed_t * 406 ohci_alloc_sed(ohci_softc_t *sc) 407 { 408 ohci_soft_ed_t *sed; 409 usbd_status err; 410 int i, offs; 411 usb_dma_t dma; 412 413 if (sc->sc_freeeds == NULL) { 414 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 415 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 416 OHCI_ED_ALIGN, &dma); 417 if (err) 418 return (0); 419 for(i = 0; i < OHCI_SED_CHUNK; i++) { 420 offs = i * OHCI_SED_SIZE; 421 sed = KERNADDR(&dma, offs); 422 sed->physaddr = DMAADDR(&dma, offs); 423 sed->next = sc->sc_freeeds; 424 sc->sc_freeeds = sed; 425 } 426 } 427 sed = sc->sc_freeeds; 428 sc->sc_freeeds = sed->next; 429 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 430 sed->next = 0; 431 return (sed); 432 } 433 434 void 435 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 436 { 437 sed->next = sc->sc_freeeds; 438 sc->sc_freeeds = sed; 439 } 440 441 ohci_soft_td_t * 442 ohci_alloc_std(ohci_softc_t *sc) 443 { 444 ohci_soft_td_t *std; 445 usbd_status err; 446 int i, offs; 447 usb_dma_t dma; 448 int s; 449 450 if (sc->sc_freetds == NULL) { 451 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 452 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 453 OHCI_TD_ALIGN, &dma); 454 if (err) 455 return (NULL); 456 s = splusb(); 457 for(i = 0; i < OHCI_STD_CHUNK; i++) { 458 offs = i * OHCI_STD_SIZE; 459 std = KERNADDR(&dma, offs); 460 std->physaddr = DMAADDR(&dma, offs); 461 std->nexttd = sc->sc_freetds; 462 sc->sc_freetds = std; 463 } 464 splx(s); 465 } 466 467 s = splusb(); 468 std = sc->sc_freetds; 469 sc->sc_freetds = std->nexttd; 470 memset(&std->td, 0, sizeof(ohci_td_t)); 471 std->nexttd = NULL; 472 std->xfer = NULL; 473 ohci_hash_add_td(sc, std); 474 splx(s); 475 476 return (std); 477 } 478 479 void 480 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std) 481 { 482 int s; 483 484 s = splusb(); 485 ohci_hash_rem_td(sc, std); 486 std->nexttd = sc->sc_freetds; 487 sc->sc_freetds = std; 488 splx(s); 489 } 490 491 usbd_status 492 ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc, 493 int alen, int rd, usbd_xfer_handle xfer, 494 ohci_soft_td_t *sp, ohci_soft_td_t **ep) 495 { 496 ohci_soft_td_t *next, *cur; 497 ohci_physaddr_t dataphys, dataphysend; 498 u_int32_t tdflags; 499 int len, curlen; 500 usb_dma_t *dma = &xfer->dmabuf; 501 u_int16_t flags = xfer->flags; 502 503 DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen)); 504 505 len = alen; 506 cur = sp; 507 dataphys = DMAADDR(dma, 0); 508 dataphysend = OHCI_PAGE(dataphys + len - 1); 509 tdflags = HTOO32( 510 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 511 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) | 512 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR); 513 514 for (;;) { 515 next = ohci_alloc_std(sc); 516 if (next == NULL) 517 goto nomem; 518 519 /* The OHCI hardware can handle at most one page crossing. */ 520 if (OHCI_PAGE(dataphys) == dataphysend || 521 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) { 522 /* we can handle it in this TD */ 523 curlen = len; 524 } else { 525 /* must use multiple TDs, fill as much as possible. */ 526 curlen = 2 * OHCI_PAGE_SIZE - 527 (dataphys & (OHCI_PAGE_SIZE-1)); 528 /* the length must be a multiple of the max size */ 529 curlen -= curlen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize); 530 #ifdef DIAGNOSTIC 531 if (curlen == 0) 532 panic("ohci_alloc_std: curlen == 0"); 533 #endif 534 } 535 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x " 536 "dataphysend=0x%08x len=%d curlen=%d\n", 537 dataphys, dataphysend, 538 len, curlen)); 539 len -= curlen; 540 541 cur->td.td_flags = tdflags; 542 cur->td.td_cbp = HTOO32(dataphys); 543 cur->nexttd = next; 544 cur->td.td_nexttd = HTOO32(next->physaddr); 545 cur->td.td_be = HTOO32(dataphys + curlen - 1); 546 cur->len = curlen; 547 cur->flags = OHCI_ADD_LEN; 548 cur->xfer = xfer; 549 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n", 550 dataphys, dataphys + curlen - 1)); 551 if (len == 0) 552 break; 553 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n")); 554 dataphys += curlen; 555 cur = next; 556 } 557 if (!rd && (flags & USBD_FORCE_SHORT_XFER) && 558 alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) { 559 /* Force a 0 length transfer at the end. */ 560 561 cur = next; 562 next = ohci_alloc_std(sc); 563 if (next == NULL) 564 goto nomem; 565 566 cur->td.td_flags = tdflags; 567 cur->td.td_cbp = 0; /* indicate 0 length packet */ 568 cur->nexttd = next; 569 cur->td.td_nexttd = HTOO32(next->physaddr); 570 cur->td.td_be = ~0; 571 cur->len = 0; 572 cur->flags = 0; 573 cur->xfer = xfer; 574 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n")); 575 } 576 *ep = cur; 577 578 return (USBD_NORMAL_COMPLETION); 579 580 nomem: 581 /* XXX free chain */ 582 return (USBD_NOMEM); 583 } 584 585 #if 0 586 Static void 587 ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std, 588 ohci_soft_td_t *stdend) 589 { 590 ohci_soft_td_t *p; 591 592 for (; std != stdend; std = p) { 593 p = std->nexttd; 594 ohci_free_std(sc, std); 595 } 596 } 597 #endif 598 599 ohci_soft_itd_t * 600 ohci_alloc_sitd(ohci_softc_t *sc) 601 { 602 ohci_soft_itd_t *sitd; 603 usbd_status err; 604 int i, s, offs; 605 usb_dma_t dma; 606 607 if (sc->sc_freeitds == NULL) { 608 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n")); 609 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK, 610 OHCI_ITD_ALIGN, &dma); 611 if (err) 612 return (NULL); 613 s = splusb(); 614 for(i = 0; i < OHCI_SITD_CHUNK; i++) { 615 offs = i * OHCI_SITD_SIZE; 616 sitd = KERNADDR(&dma, offs); 617 sitd->physaddr = DMAADDR(&dma, offs); 618 sitd->nextitd = sc->sc_freeitds; 619 sc->sc_freeitds = sitd; 620 } 621 splx(s); 622 } 623 624 s = splusb(); 625 sitd = sc->sc_freeitds; 626 sc->sc_freeitds = sitd->nextitd; 627 memset(&sitd->itd, 0, sizeof(ohci_itd_t)); 628 sitd->nextitd = NULL; 629 sitd->xfer = NULL; 630 ohci_hash_add_itd(sc, sitd); 631 splx(s); 632 633 #ifdef DIAGNOSTIC 634 sitd->isdone = 0; 635 #endif 636 637 return (sitd); 638 } 639 640 void 641 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 642 { 643 int s; 644 645 DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd)); 646 647 #ifdef DIAGNOSTIC 648 if (!sitd->isdone) { 649 panic("ohci_free_sitd: sitd=%p not done", sitd); 650 return; 651 } 652 /* Warn double free */ 653 sitd->isdone = 0; 654 #endif 655 656 s = splusb(); 657 ohci_hash_rem_itd(sc, sitd); 658 sitd->nextitd = sc->sc_freeitds; 659 sc->sc_freeitds = sitd; 660 splx(s); 661 } 662 663 usbd_status 664 ohci_init(ohci_softc_t *sc) 665 { 666 ohci_soft_ed_t *sed, *psed; 667 usbd_status err; 668 int i; 669 u_int32_t s, ctl, rwc, ival, hcr, fm, per, rev, desca, descb; 670 671 DPRINTF(("ohci_init: start\n")); 672 #if defined(__OpenBSD__) 673 printf(","); 674 #else 675 printf("%s:", device_xname(sc->sc_dev)); 676 #endif 677 rev = OREAD4(sc, OHCI_REVISION); 678 printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev), 679 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 680 681 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 682 printf("%s: unsupported OHCI revision\n", 683 device_xname(sc->sc_dev)); 684 sc->sc_bus.usbrev = USBREV_UNKNOWN; 685 return (USBD_INVAL); 686 } 687 sc->sc_bus.usbrev = USBREV_1_0; 688 689 for (i = 0; i < OHCI_HASH_SIZE; i++) 690 LIST_INIT(&sc->sc_hash_tds[i]); 691 for (i = 0; i < OHCI_HASH_SIZE; i++) 692 LIST_INIT(&sc->sc_hash_itds[i]); 693 694 SIMPLEQ_INIT(&sc->sc_free_xfers); 695 696 #ifdef __NetBSD__ 697 usb_setup_reserve(sc->sc_dev, &sc->sc_dma_reserve, sc->sc_bus.dmatag, 698 USB_MEM_RESERVE); 699 #endif 700 701 /* XXX determine alignment by R/W */ 702 /* Allocate the HCCA area. */ 703 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 704 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 705 if (err) 706 return (err); 707 sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0); 708 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 709 710 sc->sc_eintrs = OHCI_NORMAL_INTRS; 711 712 /* Allocate dummy ED that starts the control list. */ 713 sc->sc_ctrl_head = ohci_alloc_sed(sc); 714 if (sc->sc_ctrl_head == NULL) { 715 err = USBD_NOMEM; 716 goto bad1; 717 } 718 sc->sc_ctrl_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 719 720 /* Allocate dummy ED that starts the bulk list. */ 721 sc->sc_bulk_head = ohci_alloc_sed(sc); 722 if (sc->sc_bulk_head == NULL) { 723 err = USBD_NOMEM; 724 goto bad2; 725 } 726 sc->sc_bulk_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 727 728 /* Allocate dummy ED that starts the isochronous list. */ 729 sc->sc_isoc_head = ohci_alloc_sed(sc); 730 if (sc->sc_isoc_head == NULL) { 731 err = USBD_NOMEM; 732 goto bad3; 733 } 734 sc->sc_isoc_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 735 736 /* Allocate all the dummy EDs that make up the interrupt tree. */ 737 for (i = 0; i < OHCI_NO_EDS; i++) { 738 sed = ohci_alloc_sed(sc); 739 if (sed == NULL) { 740 while (--i >= 0) 741 ohci_free_sed(sc, sc->sc_eds[i]); 742 err = USBD_NOMEM; 743 goto bad4; 744 } 745 /* All ED fields are set to 0. */ 746 sc->sc_eds[i] = sed; 747 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 748 if (i != 0) 749 psed = sc->sc_eds[(i-1) / 2]; 750 else 751 psed= sc->sc_isoc_head; 752 sed->next = psed; 753 sed->ed.ed_nexted = HTOO32(psed->physaddr); 754 } 755 /* 756 * Fill HCCA interrupt table. The bit reversal is to get 757 * the tree set up properly to spread the interrupts. 758 */ 759 for (i = 0; i < OHCI_NO_INTRS; i++) 760 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 761 HTOO32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 762 763 #ifdef OHCI_DEBUG 764 if (ohcidebug > 15) { 765 for (i = 0; i < OHCI_NO_EDS; i++) { 766 printf("ed#%d ", i); 767 ohci_dump_ed(sc, sc->sc_eds[i]); 768 } 769 printf("iso "); 770 ohci_dump_ed(sc, sc->sc_isoc_head); 771 } 772 #endif 773 774 /* Preserve values programmed by SMM/BIOS but lost over reset. */ 775 ctl = OREAD4(sc, OHCI_CONTROL); 776 rwc = ctl & OHCI_RWC; 777 fm = OREAD4(sc, OHCI_FM_INTERVAL); 778 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 779 descb = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 780 781 /* Determine in what context we are running. */ 782 if (ctl & OHCI_IR) { 783 /* SMM active, request change */ 784 DPRINTF(("ohci_init: SMM active, request owner change\n")); 785 if ((sc->sc_intre & (OHCI_OC | OHCI_MIE)) == 786 (OHCI_OC | OHCI_MIE)) 787 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_MIE); 788 s = OREAD4(sc, OHCI_COMMAND_STATUS); 789 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 790 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 791 usb_delay_ms(&sc->sc_bus, 1); 792 ctl = OREAD4(sc, OHCI_CONTROL); 793 } 794 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_MIE); 795 if ((ctl & OHCI_IR) == 0) { 796 printf("%s: SMM does not respond, resetting\n", 797 device_xname(sc->sc_dev)); 798 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 799 goto reset; 800 } 801 #if 0 802 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */ 803 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 804 /* BIOS started controller. */ 805 DPRINTF(("ohci_init: BIOS active\n")); 806 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 807 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL | rwc); 808 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 809 } 810 #endif 811 } else { 812 DPRINTF(("ohci_init: cold started\n")); 813 reset: 814 /* Controller was cold started. */ 815 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 816 } 817 818 /* 819 * This reset should not be necessary according to the OHCI spec, but 820 * without it some controllers do not start. 821 */ 822 DPRINTF(("%s: resetting\n", device_xname(sc->sc_dev))); 823 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 824 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 825 826 /* We now own the host controller and the bus has been reset. */ 827 828 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 829 /* Nominal time for a reset is 10 us. */ 830 for (i = 0; i < 10; i++) { 831 delay(10); 832 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 833 if (!hcr) 834 break; 835 } 836 if (hcr) { 837 printf("%s: reset timeout\n", device_xname(sc->sc_dev)); 838 err = USBD_IOERROR; 839 goto bad5; 840 } 841 #ifdef OHCI_DEBUG 842 if (ohcidebug > 15) 843 ohci_dumpregs(sc); 844 #endif 845 846 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 847 848 /* Set up HC registers. */ 849 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 850 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 851 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 852 /* disable all interrupts and then switch on all desired interrupts */ 853 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 854 /* switch on desired functional features */ 855 ctl = OREAD4(sc, OHCI_CONTROL); 856 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 857 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 858 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL | rwc; 859 /* And finally start it! */ 860 OWRITE4(sc, OHCI_CONTROL, ctl); 861 862 /* 863 * The controller is now OPERATIONAL. Set a some final 864 * registers that should be set earlier, but that the 865 * controller ignores when in the SUSPEND state. 866 */ 867 ival = OHCI_GET_IVAL(fm); 868 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 869 fm |= OHCI_FSMPS(ival) | ival; 870 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 871 per = OHCI_PERIODIC(ival); /* 90% periodic */ 872 OWRITE4(sc, OHCI_PERIODIC_START, per); 873 874 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */ 875 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP); 876 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 877 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY); 878 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca); 879 880 /* 881 * The AMD756 requires a delay before re-reading the register, 882 * otherwise it will occasionally report 0 ports. 883 */ 884 sc->sc_noport = 0; 885 for (i = 0; i < 10 && sc->sc_noport == 0; i++) { 886 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY); 887 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 888 } 889 890 #ifdef OHCI_DEBUG 891 if (ohcidebug > 5) 892 ohci_dumpregs(sc); 893 #endif 894 895 /* Set up the bus struct. */ 896 sc->sc_bus.methods = &ohci_bus_methods; 897 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 898 899 #if defined(__NetBSD__) || defined(__OpenBSD__) 900 sc->sc_control = sc->sc_intre = 0; 901 #endif 902 903 usb_callout_init(sc->sc_tmo_rhsc); 904 905 /* Finally, turn on interrupts. */ 906 DPRINTFN(1,("ohci_init: enabling\n")); 907 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 908 909 return (USBD_NORMAL_COMPLETION); 910 911 bad5: 912 for (i = 0; i < OHCI_NO_EDS; i++) 913 ohci_free_sed(sc, sc->sc_eds[i]); 914 bad4: 915 ohci_free_sed(sc, sc->sc_isoc_head); 916 bad3: 917 ohci_free_sed(sc, sc->sc_bulk_head); 918 bad2: 919 ohci_free_sed(sc, sc->sc_ctrl_head); 920 bad1: 921 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 922 return (err); 923 } 924 925 usbd_status 926 ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 927 { 928 #if defined(__NetBSD__) || defined(__OpenBSD__) 929 struct ohci_softc *sc = bus->hci_private; 930 #endif 931 usbd_status status; 932 933 status = usb_allocmem(&sc->sc_bus, size, 0, dma); 934 #ifdef __NetBSD__ 935 if (status == USBD_NOMEM) 936 status = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size); 937 #endif 938 return status; 939 } 940 941 void 942 ohci_freem(struct usbd_bus *bus, usb_dma_t *dma) 943 { 944 #if defined(__NetBSD__) || defined(__OpenBSD__) 945 struct ohci_softc *sc = bus->hci_private; 946 #endif 947 #ifdef __NetBSD__ 948 if (dma->block->flags & USB_DMA_RESERVE) { 949 usb_reserve_freem(&sc->sc_dma_reserve, dma); 950 return; 951 } 952 #endif 953 usb_freemem(&sc->sc_bus, dma); 954 } 955 956 usbd_xfer_handle 957 ohci_allocx(struct usbd_bus *bus) 958 { 959 struct ohci_softc *sc = bus->hci_private; 960 usbd_xfer_handle xfer; 961 962 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 963 if (xfer != NULL) { 964 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 965 #ifdef DIAGNOSTIC 966 if (xfer->busy_free != XFER_FREE) { 967 printf("ohci_allocx: xfer=%p not free, 0x%08x\n", xfer, 968 xfer->busy_free); 969 } 970 #endif 971 } else { 972 xfer = malloc(sizeof(struct ohci_xfer), M_USB, M_NOWAIT); 973 } 974 if (xfer != NULL) { 975 memset(xfer, 0, sizeof (struct ohci_xfer)); 976 #ifdef DIAGNOSTIC 977 xfer->busy_free = XFER_BUSY; 978 #endif 979 } 980 return (xfer); 981 } 982 983 void 984 ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 985 { 986 struct ohci_softc *sc = bus->hci_private; 987 988 #ifdef DIAGNOSTIC 989 if (xfer->busy_free != XFER_BUSY) { 990 printf("ohci_freex: xfer=%p not busy, 0x%08x\n", xfer, 991 xfer->busy_free); 992 } 993 xfer->busy_free = XFER_FREE; 994 #endif 995 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 996 } 997 998 /* 999 * Shut down the controller when the system is going down. 1000 */ 1001 bool 1002 ohci_shutdown(device_t self, int flags) 1003 { 1004 ohci_softc_t *sc = device_private(self); 1005 1006 DPRINTF(("ohci_shutdown: stopping the HC\n")); 1007 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1008 return true; 1009 } 1010 1011 bool 1012 ohci_resume(device_t dv PMF_FN_ARGS) 1013 { 1014 ohci_softc_t *sc = device_private(dv); 1015 uint32_t ctl; 1016 int s; 1017 1018 s = splhardusb(); 1019 sc->sc_bus.use_polling++; 1020 /* Some broken BIOSes do not recover these values */ 1021 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 1022 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, 1023 sc->sc_ctrl_head->physaddr); 1024 OWRITE4(sc, OHCI_BULK_HEAD_ED, 1025 sc->sc_bulk_head->physaddr); 1026 if (sc->sc_intre) 1027 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_intre & 1028 (OHCI_ALL_INTRS | OHCI_MIE)); 1029 if (sc->sc_control) 1030 ctl = sc->sc_control; 1031 else 1032 ctl = OREAD4(sc, OHCI_CONTROL); 1033 ctl |= OHCI_HCFS_RESUME; 1034 OWRITE4(sc, OHCI_CONTROL, ctl); 1035 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 1036 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL; 1037 OWRITE4(sc, OHCI_CONTROL, ctl); 1038 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 1039 sc->sc_control = sc->sc_intre = 0; 1040 sc->sc_bus.use_polling--; 1041 splx(s); 1042 1043 return true; 1044 } 1045 1046 bool 1047 ohci_suspend(device_t dv PMF_FN_ARGS) 1048 { 1049 ohci_softc_t *sc = device_private(dv); 1050 uint32_t ctl; 1051 int s; 1052 1053 s = splhardusb(); 1054 sc->sc_bus.use_polling++; 1055 ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK; 1056 if (sc->sc_control == 0) { 1057 /* 1058 * Preserve register values, in case that BIOS 1059 * does not recover them. 1060 */ 1061 sc->sc_control = ctl; 1062 sc->sc_intre = OREAD4(sc, 1063 OHCI_INTERRUPT_ENABLE); 1064 } 1065 ctl |= OHCI_HCFS_SUSPEND; 1066 OWRITE4(sc, OHCI_CONTROL, ctl); 1067 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1068 sc->sc_bus.use_polling--; 1069 splx(s); 1070 1071 return true; 1072 } 1073 1074 #ifdef OHCI_DEBUG 1075 void 1076 ohci_dumpregs(ohci_softc_t *sc) 1077 { 1078 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 1079 OREAD4(sc, OHCI_REVISION), 1080 OREAD4(sc, OHCI_CONTROL), 1081 OREAD4(sc, OHCI_COMMAND_STATUS))); 1082 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 1083 OREAD4(sc, OHCI_INTERRUPT_STATUS), 1084 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 1085 OREAD4(sc, OHCI_INTERRUPT_DISABLE))); 1086 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 1087 OREAD4(sc, OHCI_HCCA), 1088 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 1089 OREAD4(sc, OHCI_CONTROL_HEAD_ED))); 1090 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 1091 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 1092 OREAD4(sc, OHCI_BULK_HEAD_ED), 1093 OREAD4(sc, OHCI_BULK_CURRENT_ED))); 1094 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 1095 OREAD4(sc, OHCI_DONE_HEAD), 1096 OREAD4(sc, OHCI_FM_INTERVAL), 1097 OREAD4(sc, OHCI_FM_REMAINING))); 1098 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 1099 OREAD4(sc, OHCI_FM_NUMBER), 1100 OREAD4(sc, OHCI_PERIODIC_START), 1101 OREAD4(sc, OHCI_LS_THRESHOLD))); 1102 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n", 1103 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 1104 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 1105 OREAD4(sc, OHCI_RH_STATUS))); 1106 DPRINTF((" port1=0x%08x port2=0x%08x\n", 1107 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 1108 OREAD4(sc, OHCI_RH_PORT_STATUS(2)))); 1109 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n", 1110 O32TOH(sc->sc_hcca->hcca_frame_number), 1111 O32TOH(sc->sc_hcca->hcca_done_head))); 1112 } 1113 #endif 1114 1115 Static int ohci_intr1(ohci_softc_t *); 1116 1117 int 1118 ohci_intr(void *p) 1119 { 1120 ohci_softc_t *sc = p; 1121 1122 if (sc == NULL || sc->sc_dying || !device_has_power(sc->sc_dev)) 1123 return (0); 1124 1125 /* If we get an interrupt while polling, then just ignore it. */ 1126 if (sc->sc_bus.use_polling) { 1127 #ifdef DIAGNOSTIC 1128 DPRINTFN(16, ("ohci_intr: ignored interrupt while polling\n")); 1129 #endif 1130 /* for level triggered intrs, should do something to ack */ 1131 OWRITE4(sc, OHCI_INTERRUPT_STATUS, 1132 OREAD4(sc, OHCI_INTERRUPT_STATUS)); 1133 1134 return (0); 1135 } 1136 1137 return (ohci_intr1(sc)); 1138 } 1139 1140 Static int 1141 ohci_intr1(ohci_softc_t *sc) 1142 { 1143 u_int32_t intrs, eintrs; 1144 1145 DPRINTFN(14,("ohci_intr1: enter\n")); 1146 1147 /* In case the interrupt occurs before initialization has completed. */ 1148 if (sc == NULL || sc->sc_hcca == NULL) { 1149 #ifdef DIAGNOSTIC 1150 printf("ohci_intr: sc->sc_hcca == NULL\n"); 1151 #endif 1152 return (0); 1153 } 1154 1155 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1156 if (!intrs) 1157 return (0); 1158 1159 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs & ~(OHCI_MIE|OHCI_WDH)); /* Acknowledge */ 1160 eintrs = intrs & sc->sc_eintrs; 1161 if (!eintrs) 1162 return (0); 1163 1164 sc->sc_bus.intr_context++; 1165 sc->sc_bus.no_intrs++; 1166 DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 1167 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 1168 (u_int)eintrs)); 1169 1170 if (eintrs & OHCI_SO) { 1171 sc->sc_overrun_cnt++; 1172 if (usbd_ratecheck(&sc->sc_overrun_ntc)) { 1173 printf("%s: %u scheduling overruns\n", 1174 device_xname(sc->sc_dev), sc->sc_overrun_cnt); 1175 sc->sc_overrun_cnt = 0; 1176 } 1177 /* XXX do what */ 1178 eintrs &= ~OHCI_SO; 1179 } 1180 if (eintrs & OHCI_WDH) { 1181 /* 1182 * We block the interrupt below, and reenable it later from 1183 * ohci_softintr(). 1184 */ 1185 usb_schedsoftintr(&sc->sc_bus); 1186 } 1187 if (eintrs & OHCI_RD) { 1188 printf("%s: resume detect\n", device_xname(sc->sc_dev)); 1189 /* XXX process resume detect */ 1190 } 1191 if (eintrs & OHCI_UE) { 1192 printf("%s: unrecoverable error, controller halted\n", 1193 device_xname(sc->sc_dev)); 1194 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1195 /* XXX what else */ 1196 } 1197 if (eintrs & OHCI_RHSC) { 1198 /* 1199 * We block the interrupt below, and reenable it later from 1200 * a timeout. 1201 */ 1202 ohci_rhsc(sc, sc->sc_intrxfer); 1203 /* Do not allow RHSC interrupts > 1 per second */ 1204 usb_callout(sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc); 1205 } 1206 1207 sc->sc_bus.intr_context--; 1208 1209 if (eintrs != 0) { 1210 /* Block unprocessed interrupts. */ 1211 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs); 1212 sc->sc_eintrs &= ~eintrs; 1213 DPRINTFN(1, ("%s: blocking intrs 0x%x\n", 1214 device_xname(sc->sc_dev), eintrs)); 1215 } 1216 1217 return (1); 1218 } 1219 1220 void 1221 ohci_rhsc_enable(void *v_sc) 1222 { 1223 ohci_softc_t *sc = v_sc; 1224 int s; 1225 1226 s = splhardusb(); 1227 sc->sc_eintrs |= OHCI_RHSC; 1228 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1229 splx(s); 1230 } 1231 1232 #ifdef OHCI_DEBUG 1233 const char *ohci_cc_strs[] = { 1234 "NO_ERROR", 1235 "CRC", 1236 "BIT_STUFFING", 1237 "DATA_TOGGLE_MISMATCH", 1238 "STALL", 1239 "DEVICE_NOT_RESPONDING", 1240 "PID_CHECK_FAILURE", 1241 "UNEXPECTED_PID", 1242 "DATA_OVERRUN", 1243 "DATA_UNDERRUN", 1244 "BUFFER_OVERRUN", 1245 "BUFFER_UNDERRUN", 1246 "reserved", 1247 "reserved", 1248 "NOT_ACCESSED", 1249 "NOT_ACCESSED", 1250 }; 1251 #endif 1252 1253 void 1254 ohci_softintr(void *v) 1255 { 1256 struct usbd_bus *bus = v; 1257 ohci_softc_t *sc = bus->hci_private; 1258 ohci_soft_itd_t *sitd, *sidone, *sitdnext; 1259 ohci_soft_td_t *std, *sdone, *stdnext; 1260 usbd_xfer_handle xfer; 1261 struct ohci_pipe *opipe; 1262 int len, cc, s; 1263 int i, j, actlen, iframes, uedir; 1264 ohci_physaddr_t done; 1265 1266 DPRINTFN(10,("ohci_softintr: enter\n")); 1267 1268 sc->sc_bus.intr_context++; 1269 1270 s = splhardusb(); 1271 done = O32TOH(sc->sc_hcca->hcca_done_head) & ~OHCI_DONE_INTRS; 1272 sc->sc_hcca->hcca_done_head = 0; 1273 OWRITE4(sc, OHCI_INTERRUPT_STATUS, OHCI_WDH); 1274 sc->sc_eintrs |= OHCI_WDH; 1275 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_WDH); 1276 splx(s); 1277 1278 /* Reverse the done list. */ 1279 for (sdone = NULL, sidone = NULL; done != 0; ) { 1280 std = ohci_hash_find_td(sc, done); 1281 if (std != NULL) { 1282 std->dnext = sdone; 1283 done = O32TOH(std->td.td_nexttd); 1284 sdone = std; 1285 DPRINTFN(10,("add TD %p\n", std)); 1286 continue; 1287 } 1288 sitd = ohci_hash_find_itd(sc, done); 1289 if (sitd != NULL) { 1290 sitd->dnext = sidone; 1291 done = O32TOH(sitd->itd.itd_nextitd); 1292 sidone = sitd; 1293 DPRINTFN(5,("add ITD %p\n", sitd)); 1294 continue; 1295 } 1296 panic("ohci_softintr: addr 0x%08lx not found", (u_long)done); 1297 } 1298 1299 DPRINTFN(10,("ohci_softintr: sdone=%p sidone=%p\n", sdone, sidone)); 1300 1301 #ifdef OHCI_DEBUG 1302 if (ohcidebug > 10) { 1303 DPRINTF(("ohci_process_done: TD done:\n")); 1304 ohci_dump_tds(sc, sdone); 1305 } 1306 #endif 1307 1308 for (std = sdone; std; std = stdnext) { 1309 xfer = std->xfer; 1310 stdnext = std->dnext; 1311 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n", 1312 std, xfer, xfer ? xfer->hcpriv : 0)); 1313 if (xfer == NULL) { 1314 /* 1315 * xfer == NULL: There seems to be no xfer associated 1316 * with this TD. It is tailp that happened to end up on 1317 * the done queue. 1318 * Shouldn't happen, but some chips are broken(?). 1319 */ 1320 continue; 1321 } 1322 if (xfer->status == USBD_CANCELLED || 1323 xfer->status == USBD_TIMEOUT) { 1324 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1325 xfer)); 1326 /* Handled by abort routine. */ 1327 continue; 1328 } 1329 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 1330 1331 len = std->len; 1332 if (std->td.td_cbp != 0) 1333 len -= O32TOH(std->td.td_be) - 1334 O32TOH(std->td.td_cbp) + 1; 1335 DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", len, 1336 std->flags)); 1337 if (std->flags & OHCI_ADD_LEN) 1338 xfer->actlen += len; 1339 1340 cc = OHCI_TD_GET_CC(O32TOH(std->td.td_flags)); 1341 if (cc == OHCI_CC_NO_ERROR) { 1342 if (std->flags & OHCI_CALL_DONE) { 1343 xfer->status = USBD_NORMAL_COMPLETION; 1344 s = splusb(); 1345 usb_transfer_complete(xfer); 1346 splx(s); 1347 } 1348 ohci_free_std(sc, std); 1349 } else { 1350 /* 1351 * Endpoint is halted. First unlink all the TDs 1352 * belonging to the failed transfer, and then restart 1353 * the endpoint. 1354 */ 1355 ohci_soft_td_t *p, *n; 1356 opipe = (struct ohci_pipe *)xfer->pipe; 1357 1358 DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n", 1359 OHCI_TD_GET_CC(O32TOH(std->td.td_flags)), 1360 ohci_cc_strs[OHCI_TD_GET_CC(O32TOH(std->td.td_flags))])); 1361 1362 /* remove TDs */ 1363 for (p = std; p->xfer == xfer; p = n) { 1364 n = p->nexttd; 1365 ohci_free_std(sc, p); 1366 } 1367 1368 /* clear halt */ 1369 opipe->sed->ed.ed_headp = HTOO32(p->physaddr); 1370 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1371 1372 if (cc == OHCI_CC_STALL) 1373 xfer->status = USBD_STALLED; 1374 else 1375 xfer->status = USBD_IOERROR; 1376 s = splusb(); 1377 usb_transfer_complete(xfer); 1378 splx(s); 1379 } 1380 } 1381 1382 #ifdef OHCI_DEBUG 1383 if (ohcidebug > 10) { 1384 DPRINTF(("ohci_softintr: ITD done:\n")); 1385 ohci_dump_itds(sc, sidone); 1386 } 1387 #endif 1388 1389 for (sitd = sidone; sitd != NULL; sitd = sitdnext) { 1390 xfer = sitd->xfer; 1391 sitdnext = sitd->dnext; 1392 DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n", 1393 sitd, xfer, xfer ? xfer->hcpriv : 0)); 1394 if (xfer == NULL) 1395 continue; 1396 if (xfer->status == USBD_CANCELLED || 1397 xfer->status == USBD_TIMEOUT) { 1398 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1399 xfer)); 1400 /* Handled by abort routine. */ 1401 continue; 1402 } 1403 #ifdef DIAGNOSTIC 1404 if (sitd->isdone) 1405 printf("ohci_softintr: sitd=%p is done\n", sitd); 1406 sitd->isdone = 1; 1407 #endif 1408 if (sitd->flags & OHCI_CALL_DONE) { 1409 ohci_soft_itd_t *next; 1410 1411 opipe = (struct ohci_pipe *)xfer->pipe; 1412 opipe->u.iso.inuse -= xfer->nframes; 1413 uedir = UE_GET_DIR(xfer->pipe->endpoint->edesc-> 1414 bEndpointAddress); 1415 xfer->status = USBD_NORMAL_COMPLETION; 1416 actlen = 0; 1417 for (i = 0, sitd = xfer->hcpriv;; 1418 sitd = next) { 1419 next = sitd->nextitd; 1420 if (OHCI_ITD_GET_CC(O32TOH(sitd-> 1421 itd.itd_flags)) != OHCI_CC_NO_ERROR) 1422 xfer->status = USBD_IOERROR; 1423 /* For input, update frlengths with actual */ 1424 /* XXX anything necessary for output? */ 1425 if (uedir == UE_DIR_IN && 1426 xfer->status == USBD_NORMAL_COMPLETION) { 1427 iframes = OHCI_ITD_GET_FC(O32TOH( 1428 sitd->itd.itd_flags)); 1429 for (j = 0; j < iframes; i++, j++) { 1430 len = O16TOH(sitd-> 1431 itd.itd_offset[j]); 1432 if ((OHCI_ITD_PSW_GET_CC(len) & 1433 OHCI_CC_NOT_ACCESSED_MASK) 1434 == OHCI_CC_NOT_ACCESSED) 1435 len = 0; 1436 else 1437 len = OHCI_ITD_PSW_LENGTH(len); 1438 xfer->frlengths[i] = len; 1439 actlen += len; 1440 } 1441 } 1442 if (sitd->flags & OHCI_CALL_DONE) 1443 break; 1444 ohci_free_sitd(sc, sitd); 1445 } 1446 ohci_free_sitd(sc, sitd); 1447 if (uedir == UE_DIR_IN && 1448 xfer->status == USBD_NORMAL_COMPLETION) 1449 xfer->actlen = actlen; 1450 xfer->hcpriv = NULL; 1451 1452 s = splusb(); 1453 usb_transfer_complete(xfer); 1454 splx(s); 1455 } 1456 } 1457 1458 #ifdef USB_USE_SOFTINTR 1459 if (sc->sc_softwake) { 1460 sc->sc_softwake = 0; 1461 wakeup(&sc->sc_softwake); 1462 } 1463 #endif /* USB_USE_SOFTINTR */ 1464 1465 sc->sc_bus.intr_context--; 1466 DPRINTFN(10,("ohci_softintr: done:\n")); 1467 } 1468 1469 void 1470 ohci_device_ctrl_done(usbd_xfer_handle xfer) 1471 { 1472 DPRINTFN(10,("ohci_device_ctrl_done: xfer=%p\n", xfer)); 1473 1474 #ifdef DIAGNOSTIC 1475 if (!(xfer->rqflags & URQ_REQUEST)) { 1476 panic("ohci_device_ctrl_done: not a request"); 1477 } 1478 #endif 1479 } 1480 1481 void 1482 ohci_device_intr_done(usbd_xfer_handle xfer) 1483 { 1484 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1485 ohci_softc_t *sc = opipe->pipe.device->bus->hci_private; 1486 ohci_soft_ed_t *sed = opipe->sed; 1487 ohci_soft_td_t *data, *tail; 1488 1489 1490 DPRINTFN(10,("ohci_device_intr_done: xfer=%p, actlen=%d\n", 1491 xfer, xfer->actlen)); 1492 1493 if (xfer->pipe->repeat) { 1494 data = opipe->tail.td; 1495 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 1496 if (tail == NULL) { 1497 xfer->status = USBD_NOMEM; 1498 return; 1499 } 1500 tail->xfer = NULL; 1501 1502 data->td.td_flags = HTOO32( 1503 OHCI_TD_IN | OHCI_TD_NOCC | 1504 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 1505 if (xfer->flags & USBD_SHORT_XFER_OK) 1506 data->td.td_flags |= HTOO32(OHCI_TD_R); 1507 data->td.td_cbp = HTOO32(DMAADDR(&xfer->dmabuf, 0)); 1508 data->nexttd = tail; 1509 data->td.td_nexttd = HTOO32(tail->physaddr); 1510 data->td.td_be = HTOO32(O32TOH(data->td.td_cbp) + 1511 xfer->length - 1); 1512 data->len = xfer->length; 1513 data->xfer = xfer; 1514 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1515 xfer->hcpriv = data; 1516 xfer->actlen = 0; 1517 1518 sed->ed.ed_tailp = HTOO32(tail->physaddr); 1519 opipe->tail.td = tail; 1520 } 1521 } 1522 1523 void 1524 ohci_device_bulk_done(usbd_xfer_handle xfer) 1525 { 1526 DPRINTFN(10,("ohci_device_bulk_done: xfer=%p, actlen=%d\n", 1527 xfer, xfer->actlen)); 1528 } 1529 1530 void 1531 ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer) 1532 { 1533 usbd_pipe_handle pipe; 1534 u_char *p; 1535 int i, m; 1536 int hstatus; 1537 1538 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1539 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n", 1540 sc, xfer, hstatus)); 1541 1542 if (xfer == NULL) { 1543 /* Just ignore the change. */ 1544 return; 1545 } 1546 1547 pipe = xfer->pipe; 1548 1549 p = KERNADDR(&xfer->dmabuf, 0); 1550 m = min(sc->sc_noport, xfer->length * 8 - 1); 1551 memset(p, 0, xfer->length); 1552 for (i = 1; i <= m; i++) { 1553 /* Pick out CHANGE bits from the status reg. */ 1554 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1555 p[i/8] |= 1 << (i%8); 1556 } 1557 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 1558 xfer->actlen = xfer->length; 1559 xfer->status = USBD_NORMAL_COMPLETION; 1560 1561 usb_transfer_complete(xfer); 1562 } 1563 1564 void 1565 ohci_root_intr_done(usbd_xfer_handle xfer) 1566 { 1567 } 1568 1569 void 1570 ohci_root_ctrl_done(usbd_xfer_handle xfer) 1571 { 1572 } 1573 1574 /* 1575 * Wait here until controller claims to have an interrupt. 1576 * Then call ohci_intr and return. Use timeout to avoid waiting 1577 * too long. 1578 */ 1579 void 1580 ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer) 1581 { 1582 int timo; 1583 u_int32_t intrs; 1584 1585 xfer->status = USBD_IN_PROGRESS; 1586 for (timo = xfer->timeout; timo >= 0; timo--) { 1587 usb_delay_ms(&sc->sc_bus, 1); 1588 if (sc->sc_dying) 1589 break; 1590 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 1591 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs)); 1592 #ifdef OHCI_DEBUG 1593 if (ohcidebug > 15) 1594 ohci_dumpregs(sc); 1595 #endif 1596 if (intrs) { 1597 ohci_intr1(sc); 1598 if (xfer->status != USBD_IN_PROGRESS) 1599 return; 1600 } 1601 } 1602 1603 /* Timeout */ 1604 DPRINTF(("ohci_waitintr: timeout\n")); 1605 xfer->status = USBD_TIMEOUT; 1606 usb_transfer_complete(xfer); 1607 /* XXX should free TD */ 1608 } 1609 1610 void 1611 ohci_poll(struct usbd_bus *bus) 1612 { 1613 ohci_softc_t *sc = bus->hci_private; 1614 #ifdef OHCI_DEBUG 1615 static int last; 1616 int new; 1617 new = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1618 if (new != last) { 1619 DPRINTFN(10,("ohci_poll: intrs=0x%04x\n", new)); 1620 last = new; 1621 } 1622 #endif 1623 1624 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) 1625 ohci_intr1(sc); 1626 } 1627 1628 usbd_status 1629 ohci_device_request(usbd_xfer_handle xfer) 1630 { 1631 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1632 usb_device_request_t *req = &xfer->request; 1633 usbd_device_handle dev = opipe->pipe.device; 1634 ohci_softc_t *sc = dev->bus->hci_private; 1635 int addr = dev->address; 1636 ohci_soft_td_t *setup, *stat, *next, *tail; 1637 ohci_soft_ed_t *sed; 1638 int isread; 1639 int len; 1640 usbd_status err; 1641 int s; 1642 1643 isread = req->bmRequestType & UT_READ; 1644 len = UGETW(req->wLength); 1645 1646 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 1647 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 1648 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1649 UGETW(req->wIndex), len, addr, 1650 opipe->pipe.endpoint->edesc->bEndpointAddress)); 1651 1652 setup = opipe->tail.td; 1653 stat = ohci_alloc_std(sc); 1654 if (stat == NULL) { 1655 err = USBD_NOMEM; 1656 goto bad1; 1657 } 1658 tail = ohci_alloc_std(sc); 1659 if (tail == NULL) { 1660 err = USBD_NOMEM; 1661 goto bad2; 1662 } 1663 tail->xfer = NULL; 1664 1665 sed = opipe->sed; 1666 opipe->u.ctl.length = len; 1667 1668 /* Update device address and length since they may have changed 1669 during the setup of the control pipe in usbd_new_device(). */ 1670 /* XXX This only needs to be done once, but it's too early in open. */ 1671 /* XXXX Should not touch ED here! */ 1672 sed->ed.ed_flags = HTOO32( 1673 (O32TOH(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) | 1674 OHCI_ED_SET_FA(addr) | 1675 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize))); 1676 1677 next = stat; 1678 1679 /* Set up data transaction */ 1680 if (len != 0) { 1681 ohci_soft_td_t *std = stat; 1682 1683 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 1684 std, &stat); 1685 stat = stat->nexttd; /* point at free TD */ 1686 if (err) 1687 goto bad3; 1688 /* Start toggle at 1 and then use the carried toggle. */ 1689 std->td.td_flags &= HTOO32(~OHCI_TD_TOGGLE_MASK); 1690 std->td.td_flags |= HTOO32(OHCI_TD_TOGGLE_1); 1691 } 1692 1693 memcpy(KERNADDR(&opipe->u.ctl.reqdma, 0), req, sizeof *req); 1694 1695 setup->td.td_flags = HTOO32(OHCI_TD_SETUP | OHCI_TD_NOCC | 1696 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1697 setup->td.td_cbp = HTOO32(DMAADDR(&opipe->u.ctl.reqdma, 0)); 1698 setup->nexttd = next; 1699 setup->td.td_nexttd = HTOO32(next->physaddr); 1700 setup->td.td_be = HTOO32(O32TOH(setup->td.td_cbp) + sizeof *req - 1); 1701 setup->len = 0; 1702 setup->xfer = xfer; 1703 setup->flags = 0; 1704 xfer->hcpriv = setup; 1705 1706 stat->td.td_flags = HTOO32( 1707 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | 1708 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1709 stat->td.td_cbp = 0; 1710 stat->nexttd = tail; 1711 stat->td.td_nexttd = HTOO32(tail->physaddr); 1712 stat->td.td_be = 0; 1713 stat->flags = OHCI_CALL_DONE; 1714 stat->len = 0; 1715 stat->xfer = xfer; 1716 1717 #ifdef OHCI_DEBUG 1718 if (ohcidebug > 5) { 1719 DPRINTF(("ohci_device_request:\n")); 1720 ohci_dump_ed(sc, sed); 1721 ohci_dump_tds(sc, setup); 1722 } 1723 #endif 1724 1725 /* Insert ED in schedule */ 1726 s = splusb(); 1727 sed->ed.ed_tailp = HTOO32(tail->physaddr); 1728 opipe->tail.td = tail; 1729 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1730 if (xfer->timeout && !sc->sc_bus.use_polling) { 1731 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 1732 ohci_timeout, xfer); 1733 } 1734 splx(s); 1735 1736 #ifdef OHCI_DEBUG 1737 if (ohcidebug > 20) { 1738 delay(10000); 1739 DPRINTF(("ohci_device_request: status=%x\n", 1740 OREAD4(sc, OHCI_COMMAND_STATUS))); 1741 ohci_dumpregs(sc); 1742 printf("ctrl head:\n"); 1743 ohci_dump_ed(sc, sc->sc_ctrl_head); 1744 printf("sed:\n"); 1745 ohci_dump_ed(sc, sed); 1746 ohci_dump_tds(sc, setup); 1747 } 1748 #endif 1749 1750 return (USBD_NORMAL_COMPLETION); 1751 1752 bad3: 1753 ohci_free_std(sc, tail); 1754 bad2: 1755 ohci_free_std(sc, stat); 1756 bad1: 1757 return (err); 1758 } 1759 1760 /* 1761 * Add an ED to the schedule. Called at splusb(). 1762 */ 1763 void 1764 ohci_add_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1765 { 1766 DPRINTFN(8,("ohci_add_ed: sed=%p head=%p\n", sed, head)); 1767 1768 SPLUSBCHECK; 1769 sed->next = head->next; 1770 sed->ed.ed_nexted = head->ed.ed_nexted; 1771 head->next = sed; 1772 head->ed.ed_nexted = HTOO32(sed->physaddr); 1773 } 1774 1775 /* 1776 * Remove an ED from the schedule. Called at splusb(). 1777 */ 1778 void 1779 ohci_rem_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1780 { 1781 ohci_soft_ed_t *p; 1782 1783 SPLUSBCHECK; 1784 1785 /* XXX */ 1786 for (p = head; p != NULL && p->next != sed; p = p->next) 1787 ; 1788 if (p == NULL) 1789 panic("ohci_rem_ed: ED not found"); 1790 p->next = sed->next; 1791 p->ed.ed_nexted = sed->ed.ed_nexted; 1792 } 1793 1794 /* 1795 * When a transfer is completed the TD is added to the done queue by 1796 * the host controller. This queue is the processed by software. 1797 * Unfortunately the queue contains the physical address of the TD 1798 * and we have no simple way to translate this back to a kernel address. 1799 * To make the translation possible (and fast) we use a hash table of 1800 * TDs currently in the schedule. The physical address is used as the 1801 * hash value. 1802 */ 1803 1804 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1805 /* Called at splusb() */ 1806 void 1807 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1808 { 1809 int h = HASH(std->physaddr); 1810 1811 SPLUSBCHECK; 1812 1813 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1814 } 1815 1816 /* Called at splusb() */ 1817 void 1818 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1819 { 1820 SPLUSBCHECK; 1821 1822 LIST_REMOVE(std, hnext); 1823 } 1824 1825 ohci_soft_td_t * 1826 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a) 1827 { 1828 int h = HASH(a); 1829 ohci_soft_td_t *std; 1830 1831 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1832 std != NULL; 1833 std = LIST_NEXT(std, hnext)) 1834 if (std->physaddr == a) 1835 return (std); 1836 return (NULL); 1837 } 1838 1839 /* Called at splusb() */ 1840 void 1841 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1842 { 1843 int h = HASH(sitd->physaddr); 1844 1845 SPLUSBCHECK; 1846 1847 DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n", 1848 sitd, (u_long)sitd->physaddr)); 1849 1850 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext); 1851 } 1852 1853 /* Called at splusb() */ 1854 void 1855 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1856 { 1857 SPLUSBCHECK; 1858 1859 DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n", 1860 sitd, (u_long)sitd->physaddr)); 1861 1862 LIST_REMOVE(sitd, hnext); 1863 } 1864 1865 ohci_soft_itd_t * 1866 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a) 1867 { 1868 int h = HASH(a); 1869 ohci_soft_itd_t *sitd; 1870 1871 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]); 1872 sitd != NULL; 1873 sitd = LIST_NEXT(sitd, hnext)) 1874 if (sitd->physaddr == a) 1875 return (sitd); 1876 return (NULL); 1877 } 1878 1879 void 1880 ohci_timeout(void *addr) 1881 { 1882 struct ohci_xfer *oxfer = addr; 1883 struct ohci_pipe *opipe = (struct ohci_pipe *)oxfer->xfer.pipe; 1884 ohci_softc_t *sc = opipe->pipe.device->bus->hci_private; 1885 1886 DPRINTF(("ohci_timeout: oxfer=%p\n", oxfer)); 1887 1888 if (sc->sc_dying) { 1889 ohci_abort_xfer(&oxfer->xfer, USBD_TIMEOUT); 1890 return; 1891 } 1892 1893 /* Execute the abort in a process context. */ 1894 usb_init_task(&oxfer->abort_task, ohci_timeout_task, addr); 1895 usb_add_task(oxfer->xfer.pipe->device, &oxfer->abort_task, 1896 USB_TASKQ_HC); 1897 } 1898 1899 void 1900 ohci_timeout_task(void *addr) 1901 { 1902 usbd_xfer_handle xfer = addr; 1903 int s; 1904 1905 DPRINTF(("ohci_timeout_task: xfer=%p\n", xfer)); 1906 1907 s = splusb(); 1908 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1909 splx(s); 1910 } 1911 1912 #ifdef OHCI_DEBUG 1913 void 1914 ohci_dump_tds(ohci_softc_t *sc, ohci_soft_td_t *std) 1915 { 1916 for (; std; std = std->nexttd) 1917 ohci_dump_td(sc, std); 1918 } 1919 1920 void 1921 ohci_dump_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1922 { 1923 char sbuf[128]; 1924 1925 bitmask_snprintf((u_int32_t)O32TOH(std->td.td_flags), 1926 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 1927 sbuf, sizeof(sbuf)); 1928 1929 printf("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx " 1930 "nexttd=0x%08lx be=0x%08lx\n", 1931 std, (u_long)std->physaddr, sbuf, 1932 OHCI_TD_GET_DI(O32TOH(std->td.td_flags)), 1933 OHCI_TD_GET_EC(O32TOH(std->td.td_flags)), 1934 OHCI_TD_GET_CC(O32TOH(std->td.td_flags)), 1935 (u_long)O32TOH(std->td.td_cbp), 1936 (u_long)O32TOH(std->td.td_nexttd), 1937 (u_long)O32TOH(std->td.td_be)); 1938 } 1939 1940 void 1941 ohci_dump_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1942 { 1943 int i; 1944 1945 printf("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n" 1946 "bp0=0x%08lx next=0x%08lx be=0x%08lx\n", 1947 sitd, (u_long)sitd->physaddr, 1948 OHCI_ITD_GET_SF(O32TOH(sitd->itd.itd_flags)), 1949 OHCI_ITD_GET_DI(O32TOH(sitd->itd.itd_flags)), 1950 OHCI_ITD_GET_FC(O32TOH(sitd->itd.itd_flags)), 1951 OHCI_ITD_GET_CC(O32TOH(sitd->itd.itd_flags)), 1952 (u_long)O32TOH(sitd->itd.itd_bp0), 1953 (u_long)O32TOH(sitd->itd.itd_nextitd), 1954 (u_long)O32TOH(sitd->itd.itd_be)); 1955 for (i = 0; i < OHCI_ITD_NOFFSET; i++) 1956 printf("offs[%d]=0x%04x ", i, 1957 (u_int)O16TOH(sitd->itd.itd_offset[i])); 1958 printf("\n"); 1959 } 1960 1961 void 1962 ohci_dump_itds(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1963 { 1964 for (; sitd; sitd = sitd->nextitd) 1965 ohci_dump_itd(sc, sitd); 1966 } 1967 1968 void 1969 ohci_dump_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 1970 { 1971 char sbuf[128], sbuf2[128]; 1972 1973 bitmask_snprintf((u_int32_t)O32TOH(sed->ed.ed_flags), 1974 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO", 1975 sbuf, sizeof(sbuf)); 1976 bitmask_snprintf((u_int32_t)O32TOH(sed->ed.ed_headp), 1977 "\20\1HALT\2CARRY", sbuf2, sizeof(sbuf2)); 1978 1979 printf("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d flags=%s\ntailp=0x%08lx " 1980 "headflags=%s headp=0x%08lx nexted=0x%08lx\n", 1981 sed, (u_long)sed->physaddr, 1982 OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)), 1983 OHCI_ED_GET_EN(O32TOH(sed->ed.ed_flags)), 1984 OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)), sbuf, 1985 (u_long)O32TOH(sed->ed.ed_tailp), sbuf2, 1986 (u_long)O32TOH(sed->ed.ed_headp), 1987 (u_long)O32TOH(sed->ed.ed_nexted)); 1988 } 1989 #endif 1990 1991 usbd_status 1992 ohci_open(usbd_pipe_handle pipe) 1993 { 1994 usbd_device_handle dev = pipe->device; 1995 ohci_softc_t *sc = dev->bus->hci_private; 1996 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1997 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1998 u_int8_t addr = dev->address; 1999 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 2000 ohci_soft_ed_t *sed; 2001 ohci_soft_td_t *std; 2002 ohci_soft_itd_t *sitd; 2003 ohci_physaddr_t tdphys; 2004 u_int32_t fmt; 2005 usbd_status err; 2006 int s; 2007 int ival; 2008 2009 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 2010 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 2011 2012 if (sc->sc_dying) 2013 return (USBD_IOERROR); 2014 2015 std = NULL; 2016 sed = NULL; 2017 2018 if (addr == sc->sc_addr) { 2019 switch (ed->bEndpointAddress) { 2020 case USB_CONTROL_ENDPOINT: 2021 pipe->methods = &ohci_root_ctrl_methods; 2022 break; 2023 case UE_DIR_IN | OHCI_INTR_ENDPT: 2024 pipe->methods = &ohci_root_intr_methods; 2025 break; 2026 default: 2027 return (USBD_INVAL); 2028 } 2029 } else { 2030 sed = ohci_alloc_sed(sc); 2031 if (sed == NULL) 2032 goto bad0; 2033 opipe->sed = sed; 2034 if (xfertype == UE_ISOCHRONOUS) { 2035 sitd = ohci_alloc_sitd(sc); 2036 if (sitd == NULL) 2037 goto bad1; 2038 opipe->tail.itd = sitd; 2039 tdphys = sitd->physaddr; 2040 fmt = OHCI_ED_FORMAT_ISO; 2041 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 2042 fmt |= OHCI_ED_DIR_IN; 2043 else 2044 fmt |= OHCI_ED_DIR_OUT; 2045 } else { 2046 std = ohci_alloc_std(sc); 2047 if (std == NULL) 2048 goto bad1; 2049 opipe->tail.td = std; 2050 tdphys = std->physaddr; 2051 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD; 2052 } 2053 sed->ed.ed_flags = HTOO32( 2054 OHCI_ED_SET_FA(addr) | 2055 OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) | 2056 (dev->speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) | 2057 fmt | 2058 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 2059 sed->ed.ed_headp = sed->ed.ed_tailp = HTOO32(tdphys); 2060 2061 switch (xfertype) { 2062 case UE_CONTROL: 2063 pipe->methods = &ohci_device_ctrl_methods; 2064 err = usb_allocmem(&sc->sc_bus, 2065 sizeof(usb_device_request_t), 2066 0, &opipe->u.ctl.reqdma); 2067 if (err) 2068 goto bad; 2069 s = splusb(); 2070 ohci_add_ed(sc, sed, sc->sc_ctrl_head); 2071 splx(s); 2072 break; 2073 case UE_INTERRUPT: 2074 pipe->methods = &ohci_device_intr_methods; 2075 ival = pipe->interval; 2076 if (ival == USBD_DEFAULT_INTERVAL) 2077 ival = ed->bInterval; 2078 return (ohci_device_setintr(sc, opipe, ival)); 2079 case UE_ISOCHRONOUS: 2080 pipe->methods = &ohci_device_isoc_methods; 2081 return (ohci_setup_isoc(pipe)); 2082 case UE_BULK: 2083 pipe->methods = &ohci_device_bulk_methods; 2084 s = splusb(); 2085 ohci_add_ed(sc, sed, sc->sc_bulk_head); 2086 splx(s); 2087 break; 2088 } 2089 } 2090 return (USBD_NORMAL_COMPLETION); 2091 2092 bad: 2093 if (std != NULL) 2094 ohci_free_std(sc, std); 2095 bad1: 2096 if (sed != NULL) 2097 ohci_free_sed(sc, sed); 2098 bad0: 2099 return (USBD_NOMEM); 2100 2101 } 2102 2103 /* 2104 * Close a reqular pipe. 2105 * Assumes that there are no pending transactions. 2106 */ 2107 void 2108 ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head) 2109 { 2110 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2111 ohci_softc_t *sc = pipe->device->bus->hci_private; 2112 ohci_soft_ed_t *sed = opipe->sed; 2113 int s; 2114 2115 s = splusb(); 2116 #ifdef DIAGNOSTIC 2117 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 2118 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2119 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) { 2120 ohci_soft_td_t *std; 2121 std = ohci_hash_find_td(sc, O32TOH(sed->ed.ed_headp)); 2122 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 2123 "tl=0x%x pipe=%p, std=%p\n", sed, 2124 (int)O32TOH(sed->ed.ed_headp), 2125 (int)O32TOH(sed->ed.ed_tailp), 2126 pipe, std); 2127 #ifdef USB_DEBUG 2128 usbd_dump_pipe(&opipe->pipe); 2129 #endif 2130 #ifdef OHCI_DEBUG 2131 ohci_dump_ed(sc, sed); 2132 if (std) 2133 ohci_dump_td(sc, std); 2134 #endif 2135 usb_delay_ms(&sc->sc_bus, 2); 2136 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2137 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) 2138 printf("ohci_close_pipe: pipe still not empty\n"); 2139 } 2140 #endif 2141 ohci_rem_ed(sed, head); 2142 /* Make sure the host controller is not touching this ED */ 2143 usb_delay_ms(&sc->sc_bus, 1); 2144 splx(s); 2145 ohci_free_sed(sc, opipe->sed); 2146 } 2147 2148 /* 2149 * Abort a device request. 2150 * If this routine is called at splusb() it guarantees that the request 2151 * will be removed from the hardware scheduling and that the callback 2152 * for it will be called with USBD_CANCELLED status. 2153 * It's impossible to guarantee that the requested transfer will not 2154 * have happened since the hardware runs concurrently. 2155 * If the transaction has already happened we rely on the ordinary 2156 * interrupt processing to process it. 2157 */ 2158 void 2159 ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2160 { 2161 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2162 ohci_softc_t *sc = opipe->pipe.device->bus->hci_private; 2163 ohci_soft_ed_t *sed = opipe->sed; 2164 ohci_soft_td_t *p, *n; 2165 ohci_physaddr_t headp; 2166 int s, hit; 2167 int wake; 2168 2169 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p sed=%p\n", xfer, opipe,sed)); 2170 2171 if (sc->sc_dying) { 2172 /* If we're dying, just do the software part. */ 2173 s = splusb(); 2174 xfer->status = status; /* make software ignore it */ 2175 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 2176 usb_transfer_complete(xfer); 2177 splx(s); 2178 return; 2179 } 2180 2181 if (xfer->device->bus->intr_context || !curproc) 2182 panic("ohci_abort_xfer: not in process context"); 2183 2184 /* 2185 * If an abort is already in progress then just wait for it to 2186 * complete and return. 2187 */ 2188 if (xfer->hcflags & UXFER_ABORTING) { 2189 DPRINTFN(2, ("ohci_abort_xfer: already aborting\n")); 2190 #ifdef DIAGNOSTIC 2191 if (status == USBD_TIMEOUT) 2192 printf("0hci_abort_xfer: TIMEOUT while aborting\n"); 2193 #endif 2194 /* Override the status which might be USBD_TIMEOUT. */ 2195 xfer->status = status; 2196 DPRINTFN(2, ("ohci_abort_xfer: waiting for abort to finish\n")); 2197 xfer->hcflags |= UXFER_ABORTWAIT; 2198 while (xfer->hcflags & UXFER_ABORTING) 2199 tsleep(&xfer->hcflags, PZERO, "ohciaw", 0); 2200 return; 2201 } 2202 xfer->hcflags |= UXFER_ABORTING; 2203 2204 /* 2205 * Step 1: Make interrupt routine and hardware ignore xfer. 2206 */ 2207 s = splusb(); 2208 xfer->status = status; /* make software ignore it */ 2209 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 2210 splx(s); 2211 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed)); 2212 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */ 2213 2214 /* 2215 * Step 2: Wait until we know hardware has finished any possible 2216 * use of the xfer. Also make sure the soft interrupt routine 2217 * has run. 2218 */ 2219 usb_delay_ms(opipe->pipe.device->bus, 20); /* Hardware finishes in 1ms */ 2220 s = splusb(); 2221 #ifdef USB_USE_SOFTINTR 2222 sc->sc_softwake = 1; 2223 #endif /* USB_USE_SOFTINTR */ 2224 usb_schedsoftintr(&sc->sc_bus); 2225 #ifdef USB_USE_SOFTINTR 2226 tsleep(&sc->sc_softwake, PZERO, "ohciab", 0); 2227 #endif /* USB_USE_SOFTINTR */ 2228 splx(s); 2229 2230 /* 2231 * Step 3: Remove any vestiges of the xfer from the hardware. 2232 * The complication here is that the hardware may have executed 2233 * beyond the xfer we're trying to abort. So as we're scanning 2234 * the TDs of this xfer we check if the hardware points to 2235 * any of them. 2236 */ 2237 s = splusb(); /* XXX why? */ 2238 p = xfer->hcpriv; 2239 #ifdef DIAGNOSTIC 2240 if (p == NULL) { 2241 xfer->hcflags &= ~UXFER_ABORTING; /* XXX */ 2242 splx(s); 2243 printf("ohci_abort_xfer: hcpriv is NULL\n"); 2244 return; 2245 } 2246 #endif 2247 #ifdef OHCI_DEBUG 2248 if (ohcidebug > 1) { 2249 DPRINTF(("ohci_abort_xfer: sed=\n")); 2250 ohci_dump_ed(sc, sed); 2251 ohci_dump_tds(sc, p); 2252 } 2253 #endif 2254 headp = O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK; 2255 hit = 0; 2256 for (; p->xfer == xfer; p = n) { 2257 hit |= headp == p->physaddr; 2258 n = p->nexttd; 2259 ohci_free_std(sc, p); 2260 } 2261 /* Zap headp register if hardware pointed inside the xfer. */ 2262 if (hit) { 2263 DPRINTFN(1,("ohci_abort_xfer: set hd=0x%08x, tl=0x%08x\n", 2264 (int)p->physaddr, (int)O32TOH(sed->ed.ed_tailp))); 2265 sed->ed.ed_headp = HTOO32(p->physaddr); /* unlink TDs */ 2266 } else { 2267 DPRINTFN(1,("ohci_abort_xfer: no hit\n")); 2268 } 2269 2270 /* 2271 * Step 4: Turn on hardware again. 2272 */ 2273 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */ 2274 2275 /* 2276 * Step 5: Execute callback. 2277 */ 2278 wake = xfer->hcflags & UXFER_ABORTWAIT; 2279 xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT); 2280 usb_transfer_complete(xfer); 2281 if (wake) 2282 wakeup(&xfer->hcflags); 2283 2284 splx(s); 2285 } 2286 2287 /* 2288 * Data structures and routines to emulate the root hub. 2289 */ 2290 Static usb_device_descriptor_t ohci_devd = { 2291 USB_DEVICE_DESCRIPTOR_SIZE, 2292 UDESC_DEVICE, /* type */ 2293 {0x00, 0x01}, /* USB version */ 2294 UDCLASS_HUB, /* class */ 2295 UDSUBCLASS_HUB, /* subclass */ 2296 UDPROTO_FSHUB, 2297 64, /* max packet */ 2298 {0},{0},{0x00,0x01}, /* device id */ 2299 1,2,0, /* string indicies */ 2300 1 /* # of configurations */ 2301 }; 2302 2303 Static const usb_config_descriptor_t ohci_confd = { 2304 USB_CONFIG_DESCRIPTOR_SIZE, 2305 UDESC_CONFIG, 2306 {USB_CONFIG_DESCRIPTOR_SIZE + 2307 USB_INTERFACE_DESCRIPTOR_SIZE + 2308 USB_ENDPOINT_DESCRIPTOR_SIZE}, 2309 1, 2310 1, 2311 0, 2312 UC_ATTR_MBO | UC_SELF_POWERED, 2313 0 /* max power */ 2314 }; 2315 2316 Static const usb_interface_descriptor_t ohci_ifcd = { 2317 USB_INTERFACE_DESCRIPTOR_SIZE, 2318 UDESC_INTERFACE, 2319 0, 2320 0, 2321 1, 2322 UICLASS_HUB, 2323 UISUBCLASS_HUB, 2324 UIPROTO_FSHUB, 2325 0 2326 }; 2327 2328 Static const usb_endpoint_descriptor_t ohci_endpd = { 2329 .bLength = USB_ENDPOINT_DESCRIPTOR_SIZE, 2330 .bDescriptorType = UDESC_ENDPOINT, 2331 .bEndpointAddress = UE_DIR_IN | OHCI_INTR_ENDPT, 2332 .bmAttributes = UE_INTERRUPT, 2333 .wMaxPacketSize = {8, 0}, /* max packet */ 2334 .bInterval = 255, 2335 }; 2336 2337 Static const usb_hub_descriptor_t ohci_hubd = { 2338 .bDescLength = USB_HUB_DESCRIPTOR_SIZE, 2339 .bDescriptorType = UDESC_HUB, 2340 }; 2341 2342 /* 2343 * Simulate a hardware hub by handling all the necessary requests. 2344 */ 2345 Static usbd_status 2346 ohci_root_ctrl_transfer(usbd_xfer_handle xfer) 2347 { 2348 usbd_status err; 2349 2350 /* Insert last in queue. */ 2351 err = usb_insert_transfer(xfer); 2352 if (err) 2353 return (err); 2354 2355 /* Pipe isn't running, start first */ 2356 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2357 } 2358 2359 Static usbd_status 2360 ohci_root_ctrl_start(usbd_xfer_handle xfer) 2361 { 2362 ohci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2363 usb_device_request_t *req; 2364 void *buf = NULL; 2365 int port, i; 2366 int s, len, value, index, l, totlen = 0; 2367 usb_port_status_t ps; 2368 usb_hub_descriptor_t hubd; 2369 usbd_status err; 2370 u_int32_t v; 2371 2372 if (sc->sc_dying) 2373 return (USBD_IOERROR); 2374 2375 #ifdef DIAGNOSTIC 2376 if (!(xfer->rqflags & URQ_REQUEST)) 2377 /* XXX panic */ 2378 return (USBD_INVAL); 2379 #endif 2380 req = &xfer->request; 2381 2382 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 2383 req->bmRequestType, req->bRequest)); 2384 2385 len = UGETW(req->wLength); 2386 value = UGETW(req->wValue); 2387 index = UGETW(req->wIndex); 2388 2389 if (len != 0) 2390 buf = KERNADDR(&xfer->dmabuf, 0); 2391 2392 #define C(x,y) ((x) | ((y) << 8)) 2393 switch(C(req->bRequest, req->bmRequestType)) { 2394 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 2395 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 2396 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 2397 /* 2398 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 2399 * for the integrated root hub. 2400 */ 2401 break; 2402 case C(UR_GET_CONFIG, UT_READ_DEVICE): 2403 if (len > 0) { 2404 *(u_int8_t *)buf = sc->sc_conf; 2405 totlen = 1; 2406 } 2407 break; 2408 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2409 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 2410 if (len == 0) 2411 break; 2412 switch(value >> 8) { 2413 case UDESC_DEVICE: 2414 if ((value & 0xff) != 0) { 2415 err = USBD_IOERROR; 2416 goto ret; 2417 } 2418 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 2419 USETW(ohci_devd.idVendor, sc->sc_id_vendor); 2420 memcpy(buf, &ohci_devd, l); 2421 break; 2422 case UDESC_CONFIG: 2423 if ((value & 0xff) != 0) { 2424 err = USBD_IOERROR; 2425 goto ret; 2426 } 2427 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 2428 memcpy(buf, &ohci_confd, l); 2429 buf = (char *)buf + l; 2430 len -= l; 2431 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 2432 totlen += l; 2433 memcpy(buf, &ohci_ifcd, l); 2434 buf = (char *)buf + l; 2435 len -= l; 2436 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 2437 totlen += l; 2438 memcpy(buf, &ohci_endpd, l); 2439 break; 2440 case UDESC_STRING: 2441 #define sd ((usb_string_descriptor_t *)buf) 2442 switch (value & 0xff) { 2443 case 0: /* Language table */ 2444 totlen = usb_makelangtbl(sd, len); 2445 break; 2446 case 1: /* Vendor */ 2447 totlen = usb_makestrdesc(sd, len, 2448 sc->sc_vendor); 2449 break; 2450 case 2: /* Product */ 2451 totlen = usb_makestrdesc(sd, len, 2452 "OHCI root hub"); 2453 break; 2454 } 2455 #undef sd 2456 break; 2457 default: 2458 err = USBD_IOERROR; 2459 goto ret; 2460 } 2461 break; 2462 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 2463 if (len > 0) { 2464 *(u_int8_t *)buf = 0; 2465 totlen = 1; 2466 } 2467 break; 2468 case C(UR_GET_STATUS, UT_READ_DEVICE): 2469 if (len > 1) { 2470 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 2471 totlen = 2; 2472 } 2473 break; 2474 case C(UR_GET_STATUS, UT_READ_INTERFACE): 2475 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 2476 if (len > 1) { 2477 USETW(((usb_status_t *)buf)->wStatus, 0); 2478 totlen = 2; 2479 } 2480 break; 2481 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 2482 if (value >= USB_MAX_DEVICES) { 2483 err = USBD_IOERROR; 2484 goto ret; 2485 } 2486 sc->sc_addr = value; 2487 break; 2488 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 2489 if (value != 0 && value != 1) { 2490 err = USBD_IOERROR; 2491 goto ret; 2492 } 2493 sc->sc_conf = value; 2494 break; 2495 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 2496 break; 2497 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 2498 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 2499 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 2500 err = USBD_IOERROR; 2501 goto ret; 2502 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 2503 break; 2504 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 2505 break; 2506 /* Hub requests */ 2507 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2508 break; 2509 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2510 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 2511 "port=%d feature=%d\n", 2512 index, value)); 2513 if (index < 1 || index > sc->sc_noport) { 2514 err = USBD_IOERROR; 2515 goto ret; 2516 } 2517 port = OHCI_RH_PORT_STATUS(index); 2518 switch(value) { 2519 case UHF_PORT_ENABLE: 2520 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2521 break; 2522 case UHF_PORT_SUSPEND: 2523 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2524 break; 2525 case UHF_PORT_POWER: 2526 /* Yes, writing to the LOW_SPEED bit clears power. */ 2527 OWRITE4(sc, port, UPS_LOW_SPEED); 2528 break; 2529 case UHF_C_PORT_CONNECTION: 2530 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2531 break; 2532 case UHF_C_PORT_ENABLE: 2533 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2534 break; 2535 case UHF_C_PORT_SUSPEND: 2536 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2537 break; 2538 case UHF_C_PORT_OVER_CURRENT: 2539 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2540 break; 2541 case UHF_C_PORT_RESET: 2542 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2543 break; 2544 default: 2545 err = USBD_IOERROR; 2546 goto ret; 2547 } 2548 switch(value) { 2549 case UHF_C_PORT_CONNECTION: 2550 case UHF_C_PORT_ENABLE: 2551 case UHF_C_PORT_SUSPEND: 2552 case UHF_C_PORT_OVER_CURRENT: 2553 case UHF_C_PORT_RESET: 2554 /* Enable RHSC interrupt if condition is cleared. */ 2555 if ((OREAD4(sc, port) >> 16) == 0) 2556 ohci_rhsc_enable(sc); 2557 break; 2558 default: 2559 break; 2560 } 2561 break; 2562 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2563 if (len == 0) 2564 break; 2565 if ((value & 0xff) != 0) { 2566 err = USBD_IOERROR; 2567 goto ret; 2568 } 2569 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2570 hubd = ohci_hubd; 2571 hubd.bNbrPorts = sc->sc_noport; 2572 USETW(hubd.wHubCharacteristics, 2573 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2574 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2575 /* XXX overcurrent */ 2576 ); 2577 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2578 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2579 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2580 hubd.DeviceRemovable[i++] = (u_int8_t)v; 2581 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2582 l = min(len, hubd.bDescLength); 2583 totlen = l; 2584 memcpy(buf, &hubd, l); 2585 break; 2586 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2587 if (len != 4) { 2588 err = USBD_IOERROR; 2589 goto ret; 2590 } 2591 memset(buf, 0, len); /* ? XXX */ 2592 totlen = len; 2593 break; 2594 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2595 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 2596 index)); 2597 if (index < 1 || index > sc->sc_noport) { 2598 err = USBD_IOERROR; 2599 goto ret; 2600 } 2601 if (len != 4) { 2602 err = USBD_IOERROR; 2603 goto ret; 2604 } 2605 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2606 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 2607 v)); 2608 USETW(ps.wPortStatus, v); 2609 USETW(ps.wPortChange, v >> 16); 2610 l = min(len, sizeof ps); 2611 memcpy(buf, &ps, l); 2612 totlen = l; 2613 break; 2614 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2615 err = USBD_IOERROR; 2616 goto ret; 2617 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2618 break; 2619 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2620 if (index < 1 || index > sc->sc_noport) { 2621 err = USBD_IOERROR; 2622 goto ret; 2623 } 2624 port = OHCI_RH_PORT_STATUS(index); 2625 switch(value) { 2626 case UHF_PORT_ENABLE: 2627 OWRITE4(sc, port, UPS_PORT_ENABLED); 2628 break; 2629 case UHF_PORT_SUSPEND: 2630 OWRITE4(sc, port, UPS_SUSPEND); 2631 break; 2632 case UHF_PORT_RESET: 2633 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 2634 index)); 2635 OWRITE4(sc, port, UPS_RESET); 2636 for (i = 0; i < 5; i++) { 2637 usb_delay_ms(&sc->sc_bus, 2638 USB_PORT_ROOT_RESET_DELAY); 2639 if (sc->sc_dying) { 2640 err = USBD_IOERROR; 2641 goto ret; 2642 } 2643 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2644 break; 2645 } 2646 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 2647 index, OREAD4(sc, port))); 2648 break; 2649 case UHF_PORT_POWER: 2650 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 2651 "%d\n", index)); 2652 OWRITE4(sc, port, UPS_PORT_POWER); 2653 break; 2654 default: 2655 err = USBD_IOERROR; 2656 goto ret; 2657 } 2658 break; 2659 default: 2660 err = USBD_IOERROR; 2661 goto ret; 2662 } 2663 xfer->actlen = totlen; 2664 err = USBD_NORMAL_COMPLETION; 2665 ret: 2666 xfer->status = err; 2667 s = splusb(); 2668 usb_transfer_complete(xfer); 2669 splx(s); 2670 return (USBD_IN_PROGRESS); 2671 } 2672 2673 /* Abort a root control request. */ 2674 Static void 2675 ohci_root_ctrl_abort(usbd_xfer_handle xfer) 2676 { 2677 /* Nothing to do, all transfers are synchronous. */ 2678 } 2679 2680 /* Close the root pipe. */ 2681 Static void 2682 ohci_root_ctrl_close(usbd_pipe_handle pipe) 2683 { 2684 DPRINTF(("ohci_root_ctrl_close\n")); 2685 /* Nothing to do. */ 2686 } 2687 2688 Static usbd_status 2689 ohci_root_intr_transfer(usbd_xfer_handle xfer) 2690 { 2691 usbd_status err; 2692 2693 /* Insert last in queue. */ 2694 err = usb_insert_transfer(xfer); 2695 if (err) 2696 return (err); 2697 2698 /* Pipe isn't running, start first */ 2699 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2700 } 2701 2702 Static usbd_status 2703 ohci_root_intr_start(usbd_xfer_handle xfer) 2704 { 2705 usbd_pipe_handle pipe = xfer->pipe; 2706 ohci_softc_t *sc = pipe->device->bus->hci_private; 2707 2708 if (sc->sc_dying) 2709 return (USBD_IOERROR); 2710 2711 sc->sc_intrxfer = xfer; 2712 2713 return (USBD_IN_PROGRESS); 2714 } 2715 2716 /* Abort a root interrupt request. */ 2717 Static void 2718 ohci_root_intr_abort(usbd_xfer_handle xfer) 2719 { 2720 int s; 2721 2722 if (xfer->pipe->intrxfer == xfer) { 2723 DPRINTF(("ohci_root_intr_abort: remove\n")); 2724 xfer->pipe->intrxfer = NULL; 2725 } 2726 xfer->status = USBD_CANCELLED; 2727 s = splusb(); 2728 usb_transfer_complete(xfer); 2729 splx(s); 2730 } 2731 2732 /* Close the root pipe. */ 2733 Static void 2734 ohci_root_intr_close(usbd_pipe_handle pipe) 2735 { 2736 ohci_softc_t *sc = pipe->device->bus->hci_private; 2737 2738 DPRINTF(("ohci_root_intr_close\n")); 2739 2740 sc->sc_intrxfer = NULL; 2741 } 2742 2743 /************************/ 2744 2745 Static usbd_status 2746 ohci_device_ctrl_transfer(usbd_xfer_handle xfer) 2747 { 2748 usbd_status err; 2749 2750 /* Insert last in queue. */ 2751 err = usb_insert_transfer(xfer); 2752 if (err) 2753 return (err); 2754 2755 /* Pipe isn't running, start first */ 2756 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2757 } 2758 2759 Static usbd_status 2760 ohci_device_ctrl_start(usbd_xfer_handle xfer) 2761 { 2762 ohci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2763 usbd_status err; 2764 2765 if (sc->sc_dying) 2766 return (USBD_IOERROR); 2767 2768 #ifdef DIAGNOSTIC 2769 if (!(xfer->rqflags & URQ_REQUEST)) { 2770 /* XXX panic */ 2771 printf("ohci_device_ctrl_transfer: not a request\n"); 2772 return (USBD_INVAL); 2773 } 2774 #endif 2775 2776 err = ohci_device_request(xfer); 2777 if (err) 2778 return (err); 2779 2780 if (sc->sc_bus.use_polling) 2781 ohci_waitintr(sc, xfer); 2782 return (USBD_IN_PROGRESS); 2783 } 2784 2785 /* Abort a device control request. */ 2786 Static void 2787 ohci_device_ctrl_abort(usbd_xfer_handle xfer) 2788 { 2789 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer)); 2790 ohci_abort_xfer(xfer, USBD_CANCELLED); 2791 } 2792 2793 /* Close a device control pipe. */ 2794 Static void 2795 ohci_device_ctrl_close(usbd_pipe_handle pipe) 2796 { 2797 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2798 ohci_softc_t *sc = pipe->device->bus->hci_private; 2799 2800 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe)); 2801 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2802 ohci_free_std(sc, opipe->tail.td); 2803 } 2804 2805 /************************/ 2806 2807 Static void 2808 ohci_device_clear_toggle(usbd_pipe_handle pipe) 2809 { 2810 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2811 ohci_softc_t *sc = pipe->device->bus->hci_private; 2812 2813 opipe->sed->ed.ed_headp &= HTOO32(~OHCI_TOGGLECARRY); 2814 } 2815 2816 Static void 2817 ohci_noop(usbd_pipe_handle pipe) 2818 { 2819 } 2820 2821 Static usbd_status 2822 ohci_device_bulk_transfer(usbd_xfer_handle xfer) 2823 { 2824 usbd_status err; 2825 2826 /* Insert last in queue. */ 2827 err = usb_insert_transfer(xfer); 2828 if (err) 2829 return (err); 2830 2831 /* Pipe isn't running, start first */ 2832 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2833 } 2834 2835 Static usbd_status 2836 ohci_device_bulk_start(usbd_xfer_handle xfer) 2837 { 2838 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2839 usbd_device_handle dev = opipe->pipe.device; 2840 ohci_softc_t *sc = dev->bus->hci_private; 2841 int addr = dev->address; 2842 ohci_soft_td_t *data, *tail, *tdp; 2843 ohci_soft_ed_t *sed; 2844 int s, len, isread, endpt; 2845 usbd_status err; 2846 2847 if (sc->sc_dying) 2848 return (USBD_IOERROR); 2849 2850 #ifdef DIAGNOSTIC 2851 if (xfer->rqflags & URQ_REQUEST) { 2852 /* XXX panic */ 2853 printf("ohci_device_bulk_start: a request\n"); 2854 return (USBD_INVAL); 2855 } 2856 #endif 2857 2858 len = xfer->length; 2859 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 2860 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2861 sed = opipe->sed; 2862 2863 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d " 2864 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags, 2865 endpt)); 2866 2867 opipe->u.bulk.isread = isread; 2868 opipe->u.bulk.length = len; 2869 2870 /* Update device address */ 2871 sed->ed.ed_flags = HTOO32( 2872 (O32TOH(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) | 2873 OHCI_ED_SET_FA(addr)); 2874 2875 /* Allocate a chain of new TDs (including a new tail). */ 2876 data = opipe->tail.td; 2877 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 2878 data, &tail); 2879 /* We want interrupt at the end of the transfer. */ 2880 tail->td.td_flags &= HTOO32(~OHCI_TD_INTR_MASK); 2881 tail->td.td_flags |= HTOO32(OHCI_TD_SET_DI(1)); 2882 tail->flags |= OHCI_CALL_DONE; 2883 tail = tail->nexttd; /* point at sentinel */ 2884 if (err) 2885 return (err); 2886 2887 tail->xfer = NULL; 2888 xfer->hcpriv = data; 2889 2890 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x " 2891 "td_cbp=0x%08x td_be=0x%08x\n", 2892 (int)O32TOH(sed->ed.ed_flags), 2893 (int)O32TOH(data->td.td_flags), 2894 (int)O32TOH(data->td.td_cbp), 2895 (int)O32TOH(data->td.td_be))); 2896 2897 #ifdef OHCI_DEBUG 2898 if (ohcidebug > 5) { 2899 ohci_dump_ed(sc, sed); 2900 ohci_dump_tds(sc, data); 2901 } 2902 #endif 2903 2904 /* Insert ED in schedule */ 2905 s = splusb(); 2906 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 2907 tdp->xfer = xfer; 2908 } 2909 sed->ed.ed_tailp = HTOO32(tail->physaddr); 2910 opipe->tail.td = tail; 2911 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 2912 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 2913 if (xfer->timeout && !sc->sc_bus.use_polling) { 2914 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2915 ohci_timeout, xfer); 2916 } 2917 2918 #if 0 2919 /* This goes wrong if we are too slow. */ 2920 if (ohcidebug > 10) { 2921 delay(10000); 2922 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2923 OREAD4(sc, OHCI_COMMAND_STATUS))); 2924 ohci_dump_ed(sc, sed); 2925 ohci_dump_tds(sc, data); 2926 } 2927 #endif 2928 2929 splx(s); 2930 2931 return (USBD_IN_PROGRESS); 2932 } 2933 2934 Static void 2935 ohci_device_bulk_abort(usbd_xfer_handle xfer) 2936 { 2937 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer)); 2938 ohci_abort_xfer(xfer, USBD_CANCELLED); 2939 } 2940 2941 /* 2942 * Close a device bulk pipe. 2943 */ 2944 Static void 2945 ohci_device_bulk_close(usbd_pipe_handle pipe) 2946 { 2947 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2948 ohci_softc_t *sc = pipe->device->bus->hci_private; 2949 2950 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe)); 2951 ohci_close_pipe(pipe, sc->sc_bulk_head); 2952 ohci_free_std(sc, opipe->tail.td); 2953 } 2954 2955 /************************/ 2956 2957 Static usbd_status 2958 ohci_device_intr_transfer(usbd_xfer_handle xfer) 2959 { 2960 usbd_status err; 2961 2962 /* Insert last in queue. */ 2963 err = usb_insert_transfer(xfer); 2964 if (err) 2965 return (err); 2966 2967 /* Pipe isn't running, start first */ 2968 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2969 } 2970 2971 Static usbd_status 2972 ohci_device_intr_start(usbd_xfer_handle xfer) 2973 { 2974 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2975 usbd_device_handle dev = opipe->pipe.device; 2976 ohci_softc_t *sc = dev->bus->hci_private; 2977 ohci_soft_ed_t *sed = opipe->sed; 2978 ohci_soft_td_t *data, *tail; 2979 int s, len, isread, endpt; 2980 2981 if (sc->sc_dying) 2982 return (USBD_IOERROR); 2983 2984 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d " 2985 "flags=%d priv=%p\n", 2986 xfer, xfer->length, xfer->flags, xfer->priv)); 2987 2988 #ifdef DIAGNOSTIC 2989 if (xfer->rqflags & URQ_REQUEST) 2990 panic("ohci_device_intr_transfer: a request"); 2991 #endif 2992 2993 len = xfer->length; 2994 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 2995 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2996 2997 data = opipe->tail.td; 2998 tail = ohci_alloc_std(sc); 2999 if (tail == NULL) 3000 return (USBD_NOMEM); 3001 tail->xfer = NULL; 3002 3003 data->td.td_flags = HTOO32( 3004 isread ? OHCI_TD_IN : OHCI_TD_OUT | 3005 OHCI_TD_NOCC | 3006 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 3007 if (xfer->flags & USBD_SHORT_XFER_OK) 3008 data->td.td_flags |= HTOO32(OHCI_TD_R); 3009 data->td.td_cbp = HTOO32(DMAADDR(&xfer->dmabuf, 0)); 3010 data->nexttd = tail; 3011 data->td.td_nexttd = HTOO32(tail->physaddr); 3012 data->td.td_be = HTOO32(O32TOH(data->td.td_cbp) + len - 1); 3013 data->len = len; 3014 data->xfer = xfer; 3015 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 3016 xfer->hcpriv = data; 3017 3018 #ifdef OHCI_DEBUG 3019 if (ohcidebug > 5) { 3020 DPRINTF(("ohci_device_intr_transfer:\n")); 3021 ohci_dump_ed(sc, sed); 3022 ohci_dump_tds(sc, data); 3023 } 3024 #endif 3025 3026 /* Insert ED in schedule */ 3027 s = splusb(); 3028 sed->ed.ed_tailp = HTOO32(tail->physaddr); 3029 opipe->tail.td = tail; 3030 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3031 3032 #if 0 3033 /* 3034 * This goes horribly wrong, printing thousands of descriptors, 3035 * because false references are followed due to the fact that the 3036 * TD is gone. 3037 */ 3038 if (ohcidebug > 5) { 3039 usb_delay_ms(&sc->sc_bus, 5); 3040 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 3041 OREAD4(sc, OHCI_COMMAND_STATUS))); 3042 ohci_dump_ed(sc, sed); 3043 ohci_dump_tds(sc, data); 3044 } 3045 #endif 3046 splx(s); 3047 3048 return (USBD_IN_PROGRESS); 3049 } 3050 3051 /* Abort a device control request. */ 3052 Static void 3053 ohci_device_intr_abort(usbd_xfer_handle xfer) 3054 { 3055 if (xfer->pipe->intrxfer == xfer) { 3056 DPRINTF(("ohci_device_intr_abort: remove\n")); 3057 xfer->pipe->intrxfer = NULL; 3058 } 3059 ohci_abort_xfer(xfer, USBD_CANCELLED); 3060 } 3061 3062 /* Close a device interrupt pipe. */ 3063 Static void 3064 ohci_device_intr_close(usbd_pipe_handle pipe) 3065 { 3066 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3067 ohci_softc_t *sc = pipe->device->bus->hci_private; 3068 int nslots = opipe->u.intr.nslots; 3069 int pos = opipe->u.intr.pos; 3070 int j; 3071 ohci_soft_ed_t *p, *sed = opipe->sed; 3072 int s; 3073 3074 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 3075 pipe, nslots, pos)); 3076 s = splusb(); 3077 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 3078 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 3079 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) 3080 usb_delay_ms(&sc->sc_bus, 2); 3081 3082 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 3083 continue; 3084 #ifdef DIAGNOSTIC 3085 if (p == NULL) 3086 panic("ohci_device_intr_close: ED not found"); 3087 #endif 3088 p->next = sed->next; 3089 p->ed.ed_nexted = sed->ed.ed_nexted; 3090 splx(s); 3091 3092 for (j = 0; j < nslots; j++) 3093 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 3094 3095 ohci_free_std(sc, opipe->tail.td); 3096 ohci_free_sed(sc, opipe->sed); 3097 } 3098 3099 Static usbd_status 3100 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival) 3101 { 3102 int i, j, s, best; 3103 u_int npoll, slow, shigh, nslots; 3104 u_int bestbw, bw; 3105 ohci_soft_ed_t *hsed, *sed = opipe->sed; 3106 3107 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 3108 if (ival == 0) { 3109 printf("ohci_setintr: 0 interval\n"); 3110 return (USBD_INVAL); 3111 } 3112 3113 npoll = OHCI_NO_INTRS; 3114 while (npoll > ival) 3115 npoll /= 2; 3116 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 3117 3118 /* 3119 * We now know which level in the tree the ED must go into. 3120 * Figure out which slot has most bandwidth left over. 3121 * Slots to examine: 3122 * npoll 3123 * 1 0 3124 * 2 1 2 3125 * 4 3 4 5 6 3126 * 8 7 8 9 10 11 12 13 14 3127 * N (N-1) .. (N-1+N-1) 3128 */ 3129 slow = npoll-1; 3130 shigh = slow + npoll; 3131 nslots = OHCI_NO_INTRS / npoll; 3132 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 3133 bw = 0; 3134 for (j = 0; j < nslots; j++) 3135 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 3136 if (bw < bestbw) { 3137 best = i; 3138 bestbw = bw; 3139 } 3140 } 3141 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 3142 best, slow, shigh, bestbw)); 3143 3144 s = splusb(); 3145 hsed = sc->sc_eds[best]; 3146 sed->next = hsed->next; 3147 sed->ed.ed_nexted = hsed->ed.ed_nexted; 3148 hsed->next = sed; 3149 hsed->ed.ed_nexted = HTOO32(sed->physaddr); 3150 splx(s); 3151 3152 for (j = 0; j < nslots; j++) 3153 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 3154 opipe->u.intr.nslots = nslots; 3155 opipe->u.intr.pos = best; 3156 3157 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 3158 return (USBD_NORMAL_COMPLETION); 3159 } 3160 3161 /***********************/ 3162 3163 usbd_status 3164 ohci_device_isoc_transfer(usbd_xfer_handle xfer) 3165 { 3166 usbd_status err; 3167 3168 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer)); 3169 3170 /* Put it on our queue, */ 3171 err = usb_insert_transfer(xfer); 3172 3173 /* bail out on error, */ 3174 if (err && err != USBD_IN_PROGRESS) 3175 return (err); 3176 3177 /* XXX should check inuse here */ 3178 3179 /* insert into schedule, */ 3180 ohci_device_isoc_enter(xfer); 3181 3182 /* and start if the pipe wasn't running */ 3183 if (!err) 3184 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 3185 3186 return (err); 3187 } 3188 3189 void 3190 ohci_device_isoc_enter(usbd_xfer_handle xfer) 3191 { 3192 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3193 usbd_device_handle dev = opipe->pipe.device; 3194 ohci_softc_t *sc = dev->bus->hci_private; 3195 ohci_soft_ed_t *sed = opipe->sed; 3196 struct iso *iso = &opipe->u.iso; 3197 ohci_soft_itd_t *sitd, *nsitd; 3198 ohci_physaddr_t buf, offs, noffs, bp0; 3199 int i, ncur, nframes; 3200 int s; 3201 3202 DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p " 3203 "nframes=%d\n", 3204 iso->inuse, iso->next, xfer, xfer->nframes)); 3205 3206 if (sc->sc_dying) 3207 return; 3208 3209 if (iso->next == -1) { 3210 /* Not in use yet, schedule it a few frames ahead. */ 3211 iso->next = O32TOH(sc->sc_hcca->hcca_frame_number) + 5; 3212 DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n", 3213 iso->next)); 3214 } 3215 3216 sitd = opipe->tail.itd; 3217 buf = DMAADDR(&xfer->dmabuf, 0); 3218 bp0 = OHCI_PAGE(buf); 3219 offs = OHCI_PAGE_OFFSET(buf); 3220 nframes = xfer->nframes; 3221 xfer->hcpriv = sitd; 3222 for (i = ncur = 0; i < nframes; i++, ncur++) { 3223 noffs = offs + xfer->frlengths[i]; 3224 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ 3225 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */ 3226 3227 /* Allocate next ITD */ 3228 nsitd = ohci_alloc_sitd(sc); 3229 if (nsitd == NULL) { 3230 /* XXX what now? */ 3231 printf("%s: isoc TD alloc failed\n", 3232 device_xname(sc->sc_dev)); 3233 return; 3234 } 3235 3236 /* Fill current ITD */ 3237 sitd->itd.itd_flags = HTOO32( 3238 OHCI_ITD_NOCC | 3239 OHCI_ITD_SET_SF(iso->next) | 3240 OHCI_ITD_SET_DI(6) | /* delay intr a little */ 3241 OHCI_ITD_SET_FC(ncur)); 3242 sitd->itd.itd_bp0 = HTOO32(bp0); 3243 sitd->nextitd = nsitd; 3244 sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr); 3245 sitd->itd.itd_be = HTOO32(bp0 + offs - 1); 3246 sitd->xfer = xfer; 3247 sitd->flags = 0; 3248 3249 sitd = nsitd; 3250 iso->next = iso->next + ncur; 3251 bp0 = OHCI_PAGE(buf + offs); 3252 ncur = 0; 3253 } 3254 sitd->itd.itd_offset[ncur] = HTOO16(OHCI_ITD_MK_OFFS(offs)); 3255 offs = noffs; 3256 } 3257 nsitd = ohci_alloc_sitd(sc); 3258 if (nsitd == NULL) { 3259 /* XXX what now? */ 3260 printf("%s: isoc TD alloc failed\n", 3261 device_xname(sc->sc_dev)); 3262 return; 3263 } 3264 /* Fixup last used ITD */ 3265 sitd->itd.itd_flags = HTOO32( 3266 OHCI_ITD_NOCC | 3267 OHCI_ITD_SET_SF(iso->next) | 3268 OHCI_ITD_SET_DI(0) | 3269 OHCI_ITD_SET_FC(ncur)); 3270 sitd->itd.itd_bp0 = HTOO32(bp0); 3271 sitd->nextitd = nsitd; 3272 sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr); 3273 sitd->itd.itd_be = HTOO32(bp0 + offs - 1); 3274 sitd->xfer = xfer; 3275 sitd->flags = OHCI_CALL_DONE; 3276 3277 iso->next = iso->next + ncur; 3278 iso->inuse += nframes; 3279 3280 xfer->actlen = offs; /* XXX pretend we did it all */ 3281 3282 xfer->status = USBD_IN_PROGRESS; 3283 3284 #ifdef OHCI_DEBUG 3285 if (ohcidebug > 5) { 3286 DPRINTF(("ohci_device_isoc_enter: frame=%d\n", 3287 O32TOH(sc->sc_hcca->hcca_frame_number))); 3288 ohci_dump_itds(sc, xfer->hcpriv); 3289 ohci_dump_ed(sc, sed); 3290 } 3291 #endif 3292 3293 s = splusb(); 3294 sed->ed.ed_tailp = HTOO32(nsitd->physaddr); 3295 opipe->tail.itd = nsitd; 3296 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3297 splx(s); 3298 3299 #ifdef OHCI_DEBUG 3300 if (ohcidebug > 5) { 3301 delay(150000); 3302 DPRINTF(("ohci_device_isoc_enter: after frame=%d\n", 3303 O32TOH(sc->sc_hcca->hcca_frame_number))); 3304 ohci_dump_itds(sc, xfer->hcpriv); 3305 ohci_dump_ed(sc, sed); 3306 } 3307 #endif 3308 } 3309 3310 usbd_status 3311 ohci_device_isoc_start(usbd_xfer_handle xfer) 3312 { 3313 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3314 ohci_softc_t *sc = opipe->pipe.device->bus->hci_private; 3315 3316 DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer)); 3317 3318 if (sc->sc_dying) 3319 return (USBD_IOERROR); 3320 3321 #ifdef DIAGNOSTIC 3322 if (xfer->status != USBD_IN_PROGRESS) 3323 printf("ohci_device_isoc_start: not in progress %p\n", xfer); 3324 #endif 3325 3326 /* XXX anything to do? */ 3327 3328 return (USBD_IN_PROGRESS); 3329 } 3330 3331 void 3332 ohci_device_isoc_abort(usbd_xfer_handle xfer) 3333 { 3334 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3335 ohci_softc_t *sc = opipe->pipe.device->bus->hci_private; 3336 ohci_soft_ed_t *sed; 3337 ohci_soft_itd_t *sitd; 3338 int s; 3339 3340 s = splusb(); 3341 3342 DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer)); 3343 3344 /* Transfer is already done. */ 3345 if (xfer->status != USBD_NOT_STARTED && 3346 xfer->status != USBD_IN_PROGRESS) { 3347 splx(s); 3348 printf("ohci_device_isoc_abort: early return\n"); 3349 return; 3350 } 3351 3352 /* Give xfer the requested abort code. */ 3353 xfer->status = USBD_CANCELLED; 3354 3355 sed = opipe->sed; 3356 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */ 3357 3358 sitd = xfer->hcpriv; 3359 #ifdef DIAGNOSTIC 3360 if (sitd == NULL) { 3361 splx(s); 3362 printf("ohci_device_isoc_abort: hcpriv==0\n"); 3363 return; 3364 } 3365 #endif 3366 for (; sitd->xfer == xfer; sitd = sitd->nextitd) { 3367 #ifdef DIAGNOSTIC 3368 DPRINTFN(1,("abort sets done sitd=%p\n", sitd)); 3369 sitd->isdone = 1; 3370 #endif 3371 } 3372 3373 splx(s); 3374 3375 usb_delay_ms(&sc->sc_bus, OHCI_ITD_NOFFSET); 3376 3377 s = splusb(); 3378 3379 /* Run callback. */ 3380 usb_transfer_complete(xfer); 3381 3382 sed->ed.ed_headp = HTOO32(sitd->physaddr); /* unlink TDs */ 3383 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */ 3384 3385 splx(s); 3386 } 3387 3388 void 3389 ohci_device_isoc_done(usbd_xfer_handle xfer) 3390 { 3391 DPRINTFN(1,("ohci_device_isoc_done: xfer=%p\n", xfer)); 3392 } 3393 3394 usbd_status 3395 ohci_setup_isoc(usbd_pipe_handle pipe) 3396 { 3397 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3398 ohci_softc_t *sc = pipe->device->bus->hci_private; 3399 struct iso *iso = &opipe->u.iso; 3400 int s; 3401 3402 iso->next = -1; 3403 iso->inuse = 0; 3404 3405 s = splusb(); 3406 ohci_add_ed(sc, opipe->sed, sc->sc_isoc_head); 3407 splx(s); 3408 3409 return (USBD_NORMAL_COMPLETION); 3410 } 3411 3412 void 3413 ohci_device_isoc_close(usbd_pipe_handle pipe) 3414 { 3415 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3416 ohci_softc_t *sc = pipe->device->bus->hci_private; 3417 3418 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe)); 3419 ohci_close_pipe(pipe, sc->sc_isoc_head); 3420 #ifdef DIAGNOSTIC 3421 opipe->tail.itd->isdone = 1; 3422 #endif 3423 ohci_free_sitd(sc, opipe->tail.itd); 3424 } 3425
Indexes created Thu Sep 25 16:09:42 GMT 2025