ohci.c revision 1.195
1 /* $NetBSD: ohci.c,v 1.195 2008/06/28 17:42:53 bouyer Exp $ */ 2 /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */ 3 4 /* 5 * Copyright (c) 1998, 2004, 2005 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Lennart Augustsson (lennart (at) augustsson.net) at 10 * Carlstedt Research & Technology. 11 * This code is derived from software contributed to The NetBSD Foundation 12 * by Charles M. Hannum. 13 * 14 * Redistribution and use in source and binary forms, with or without 15 * modification, are permitted provided that the following conditions 16 * are met: 17 * 1. Redistributions of source code must retain the above copyright 18 * notice, this list of conditions and the following disclaimer. 19 * 2. Redistributions in binary form must reproduce the above copyright 20 * notice, this list of conditions and the following disclaimer in the 21 * documentation and/or other materials provided with the distribution. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 24 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 25 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 26 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 27 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 31 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 32 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 33 * POSSIBILITY OF SUCH DAMAGE. 34 */ 35 36 /* 37 * USB Open Host Controller driver. 38 * 39 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html 40 * USB spec: http://www.usb.org/developers/docs/usbspec.zip 41 */ 42 43 #include <sys/cdefs.h> 44 __KERNEL_RCSID(0, "$NetBSD: ohci.c,v 1.195 2008/06/28 17:42:53 bouyer Exp $"); 45 46 #include <sys/param.h> 47 #include <sys/systm.h> 48 #include <sys/malloc.h> 49 #if defined(__NetBSD__) || defined(__OpenBSD__) 50 #include <sys/kernel.h> 51 #include <sys/device.h> 52 #include <sys/select.h> 53 #include <uvm/uvm_extern.h> 54 #elif defined(__FreeBSD__) 55 #include <sys/module.h> 56 #include <sys/bus.h> 57 #include <machine/bus_pio.h> 58 #include <machine/bus_memio.h> 59 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 60 #include <sys/cpu.h> 61 #endif 62 #endif 63 #include <sys/proc.h> 64 #include <sys/queue.h> 65 66 #include <sys/bus.h> 67 #include <machine/endian.h> 68 69 #include <dev/usb/usb.h> 70 #include <dev/usb/usbdi.h> 71 #include <dev/usb/usbdivar.h> 72 #include <dev/usb/usb_mem.h> 73 #include <dev/usb/usb_quirks.h> 74 75 #include <dev/usb/ohcireg.h> 76 #include <dev/usb/ohcivar.h> 77 #include <dev/usb/usbroothub_subr.h> 78 79 #if defined(__FreeBSD__) 80 #include <machine/clock.h> 81 82 #define delay(d) DELAY(d) 83 #endif 84 85 #if defined(__OpenBSD__) 86 struct cfdriver ohci_cd = { 87 NULL, "ohci", DV_DULL 88 }; 89 #endif 90 91 #ifdef OHCI_DEBUG 92 #define DPRINTF(x) if (ohcidebug) logprintf x 93 #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x 94 int ohcidebug = 0; 95 #ifndef __NetBSD__ 96 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 97 #endif 98 #else 99 #define DPRINTF(x) 100 #define DPRINTFN(n,x) 101 #endif 102 103 #if BYTE_ORDER == BIG_ENDIAN 104 #define SWAP_ENDIAN OHCI_LITTLE_ENDIAN 105 #else 106 #define SWAP_ENDIAN OHCI_BIG_ENDIAN 107 #endif 108 109 #define O16TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap16(val) : val) 110 #define O32TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap32(val) : val) 111 #define HTOO16(val) O16TOH(val) 112 #define HTOO32(val) O32TOH(val) 113 114 struct ohci_pipe; 115 116 Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *); 117 Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *); 118 119 Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *); 120 Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *); 121 122 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *); 123 Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *); 124 125 #if 0 126 Static void ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *, 127 ohci_soft_td_t *); 128 #endif 129 Static usbd_status ohci_alloc_std_chain(struct ohci_pipe *, 130 ohci_softc_t *, int, int, usbd_xfer_handle, 131 ohci_soft_td_t *, ohci_soft_td_t **); 132 133 Static usbd_status ohci_open(usbd_pipe_handle); 134 Static void ohci_poll(struct usbd_bus *); 135 Static void ohci_softintr(void *); 136 Static void ohci_waitintr(ohci_softc_t *, usbd_xfer_handle); 137 Static void ohci_rhsc(ohci_softc_t *, usbd_xfer_handle); 138 139 Static usbd_status ohci_device_request(usbd_xfer_handle xfer); 140 Static void ohci_add_ed(ohci_softc_t *, ohci_soft_ed_t *, 141 ohci_soft_ed_t *); 142 143 Static void ohci_rem_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 144 Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *); 145 Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *); 146 Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t); 147 Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *); 148 Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *); 149 Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t); 150 151 Static usbd_status ohci_setup_isoc(usbd_pipe_handle pipe); 152 Static void ohci_device_isoc_enter(usbd_xfer_handle); 153 154 Static usbd_status ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 155 Static void ohci_freem(struct usbd_bus *, usb_dma_t *); 156 157 Static usbd_xfer_handle ohci_allocx(struct usbd_bus *); 158 Static void ohci_freex(struct usbd_bus *, usbd_xfer_handle); 159 160 Static usbd_status ohci_root_ctrl_transfer(usbd_xfer_handle); 161 Static usbd_status ohci_root_ctrl_start(usbd_xfer_handle); 162 Static void ohci_root_ctrl_abort(usbd_xfer_handle); 163 Static void ohci_root_ctrl_close(usbd_pipe_handle); 164 Static void ohci_root_ctrl_done(usbd_xfer_handle); 165 166 Static usbd_status ohci_root_intr_transfer(usbd_xfer_handle); 167 Static usbd_status ohci_root_intr_start(usbd_xfer_handle); 168 Static void ohci_root_intr_abort(usbd_xfer_handle); 169 Static void ohci_root_intr_close(usbd_pipe_handle); 170 Static void ohci_root_intr_done(usbd_xfer_handle); 171 172 Static usbd_status ohci_device_ctrl_transfer(usbd_xfer_handle); 173 Static usbd_status ohci_device_ctrl_start(usbd_xfer_handle); 174 Static void ohci_device_ctrl_abort(usbd_xfer_handle); 175 Static void ohci_device_ctrl_close(usbd_pipe_handle); 176 Static void ohci_device_ctrl_done(usbd_xfer_handle); 177 178 Static usbd_status ohci_device_bulk_transfer(usbd_xfer_handle); 179 Static usbd_status ohci_device_bulk_start(usbd_xfer_handle); 180 Static void ohci_device_bulk_abort(usbd_xfer_handle); 181 Static void ohci_device_bulk_close(usbd_pipe_handle); 182 Static void ohci_device_bulk_done(usbd_xfer_handle); 183 184 Static usbd_status ohci_device_intr_transfer(usbd_xfer_handle); 185 Static usbd_status ohci_device_intr_start(usbd_xfer_handle); 186 Static void ohci_device_intr_abort(usbd_xfer_handle); 187 Static void ohci_device_intr_close(usbd_pipe_handle); 188 Static void ohci_device_intr_done(usbd_xfer_handle); 189 190 Static usbd_status ohci_device_isoc_transfer(usbd_xfer_handle); 191 Static usbd_status ohci_device_isoc_start(usbd_xfer_handle); 192 Static void ohci_device_isoc_abort(usbd_xfer_handle); 193 Static void ohci_device_isoc_close(usbd_pipe_handle); 194 Static void ohci_device_isoc_done(usbd_xfer_handle); 195 196 Static usbd_status ohci_device_setintr(ohci_softc_t *sc, 197 struct ohci_pipe *pipe, int ival); 198 199 Static void ohci_timeout(void *); 200 Static void ohci_timeout_task(void *); 201 Static void ohci_rhsc_enable(void *); 202 203 Static void ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *); 204 Static void ohci_abort_xfer(usbd_xfer_handle, usbd_status); 205 206 Static void ohci_device_clear_toggle(usbd_pipe_handle pipe); 207 Static void ohci_noop(usbd_pipe_handle pipe); 208 209 #ifdef OHCI_DEBUG 210 Static void ohci_dumpregs(ohci_softc_t *); 211 Static void ohci_dump_tds(ohci_softc_t *, ohci_soft_td_t *); 212 Static void ohci_dump_td(ohci_softc_t *, ohci_soft_td_t *); 213 Static void ohci_dump_ed(ohci_softc_t *, ohci_soft_ed_t *); 214 Static void ohci_dump_itd(ohci_softc_t *, ohci_soft_itd_t *); 215 Static void ohci_dump_itds(ohci_softc_t *, ohci_soft_itd_t *); 216 #endif 217 218 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 219 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 220 #define OWRITE1(sc, r, x) \ 221 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 222 #define OWRITE2(sc, r, x) \ 223 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 224 #define OWRITE4(sc, r, x) \ 225 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 226 static __inline uint8_t 227 OREAD1(ohci_softc_t *sc, bus_size_t r) 228 { 229 230 OBARR(sc); 231 return bus_space_read_1(sc->iot, sc->ioh, r); 232 } 233 234 static __inline uint16_t 235 OREAD2(ohci_softc_t *sc, bus_size_t r) 236 { 237 238 OBARR(sc); 239 return bus_space_read_2(sc->iot, sc->ioh, r); 240 } 241 242 static __inline uint32_t 243 OREAD4(ohci_softc_t *sc, bus_size_t r) 244 { 245 246 OBARR(sc); 247 return bus_space_read_4(sc->iot, sc->ioh, r); 248 } 249 250 /* Reverse the bits in a value 0 .. 31 */ 251 Static u_int8_t revbits[OHCI_NO_INTRS] = 252 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 253 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 254 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 255 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 256 257 struct ohci_pipe { 258 struct usbd_pipe pipe; 259 ohci_soft_ed_t *sed; 260 union { 261 ohci_soft_td_t *td; 262 ohci_soft_itd_t *itd; 263 } tail; 264 /* Info needed for different pipe kinds. */ 265 union { 266 /* Control pipe */ 267 struct { 268 usb_dma_t reqdma; 269 u_int length; 270 ohci_soft_td_t *setup, *data, *stat; 271 } ctl; 272 /* Interrupt pipe */ 273 struct { 274 int nslots; 275 int pos; 276 } intr; 277 /* Bulk pipe */ 278 struct { 279 u_int length; 280 int isread; 281 } bulk; 282 /* Iso pipe */ 283 struct iso { 284 int next, inuse; 285 } iso; 286 } u; 287 }; 288 289 #define OHCI_INTR_ENDPT 1 290 291 Static const struct usbd_bus_methods ohci_bus_methods = { 292 ohci_open, 293 ohci_softintr, 294 ohci_poll, 295 ohci_allocm, 296 ohci_freem, 297 ohci_allocx, 298 ohci_freex, 299 }; 300 301 Static const struct usbd_pipe_methods ohci_root_ctrl_methods = { 302 ohci_root_ctrl_transfer, 303 ohci_root_ctrl_start, 304 ohci_root_ctrl_abort, 305 ohci_root_ctrl_close, 306 ohci_noop, 307 ohci_root_ctrl_done, 308 }; 309 310 Static const struct usbd_pipe_methods ohci_root_intr_methods = { 311 ohci_root_intr_transfer, 312 ohci_root_intr_start, 313 ohci_root_intr_abort, 314 ohci_root_intr_close, 315 ohci_noop, 316 ohci_root_intr_done, 317 }; 318 319 Static const struct usbd_pipe_methods ohci_device_ctrl_methods = { 320 ohci_device_ctrl_transfer, 321 ohci_device_ctrl_start, 322 ohci_device_ctrl_abort, 323 ohci_device_ctrl_close, 324 ohci_noop, 325 ohci_device_ctrl_done, 326 }; 327 328 Static const struct usbd_pipe_methods ohci_device_intr_methods = { 329 ohci_device_intr_transfer, 330 ohci_device_intr_start, 331 ohci_device_intr_abort, 332 ohci_device_intr_close, 333 ohci_device_clear_toggle, 334 ohci_device_intr_done, 335 }; 336 337 Static const struct usbd_pipe_methods ohci_device_bulk_methods = { 338 ohci_device_bulk_transfer, 339 ohci_device_bulk_start, 340 ohci_device_bulk_abort, 341 ohci_device_bulk_close, 342 ohci_device_clear_toggle, 343 ohci_device_bulk_done, 344 }; 345 346 Static const struct usbd_pipe_methods ohci_device_isoc_methods = { 347 ohci_device_isoc_transfer, 348 ohci_device_isoc_start, 349 ohci_device_isoc_abort, 350 ohci_device_isoc_close, 351 ohci_noop, 352 ohci_device_isoc_done, 353 }; 354 355 #if defined(__NetBSD__) || defined(__OpenBSD__) 356 int 357 ohci_activate(device_t self, enum devact act) 358 { 359 struct ohci_softc *sc = device_private(self); 360 int rv = 0; 361 362 switch (act) { 363 case DVACT_ACTIVATE: 364 return (EOPNOTSUPP); 365 366 case DVACT_DEACTIVATE: 367 sc->sc_dying = 1; 368 if (sc->sc_child != NULL) 369 rv = config_deactivate(sc->sc_child); 370 break; 371 } 372 return (rv); 373 } 374 375 void 376 ohci_childdet(device_t self, device_t child) 377 { 378 struct ohci_softc *sc = device_private(self); 379 380 KASSERT(sc->sc_child == child); 381 sc->sc_child = NULL; 382 } 383 384 int 385 ohci_detach(struct ohci_softc *sc, int flags) 386 { 387 int rv = 0; 388 389 if (sc->sc_child != NULL) 390 rv = config_detach(sc->sc_child, flags); 391 392 if (rv != 0) 393 return (rv); 394 395 usb_uncallout(sc->sc_tmo_rhsc, ohci_rhsc_enable, sc); 396 397 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 398 399 /* free data structures XXX */ 400 401 return (rv); 402 } 403 #endif 404 405 ohci_soft_ed_t * 406 ohci_alloc_sed(ohci_softc_t *sc) 407 { 408 ohci_soft_ed_t *sed; 409 usbd_status err; 410 int i, offs; 411 usb_dma_t dma; 412 413 if (sc->sc_freeeds == NULL) { 414 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 415 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 416 OHCI_ED_ALIGN, &dma); 417 if (err) 418 return (0); 419 for(i = 0; i < OHCI_SED_CHUNK; i++) { 420 offs = i * OHCI_SED_SIZE; 421 sed = KERNADDR(&dma, offs); 422 sed->physaddr = DMAADDR(&dma, offs); 423 sed->dma = dma; 424 sed->offs = offs; 425 sed->next = sc->sc_freeeds; 426 sc->sc_freeeds = sed; 427 } 428 } 429 sed = sc->sc_freeeds; 430 sc->sc_freeeds = sed->next; 431 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 432 sed->next = 0; 433 return (sed); 434 } 435 436 void 437 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 438 { 439 sed->next = sc->sc_freeeds; 440 sc->sc_freeeds = sed; 441 } 442 443 ohci_soft_td_t * 444 ohci_alloc_std(ohci_softc_t *sc) 445 { 446 ohci_soft_td_t *std; 447 usbd_status err; 448 int i, offs; 449 usb_dma_t dma; 450 int s; 451 452 if (sc->sc_freetds == NULL) { 453 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 454 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 455 OHCI_TD_ALIGN, &dma); 456 if (err) 457 return (NULL); 458 s = splusb(); 459 for(i = 0; i < OHCI_STD_CHUNK; i++) { 460 offs = i * OHCI_STD_SIZE; 461 std = KERNADDR(&dma, offs); 462 std->physaddr = DMAADDR(&dma, offs); 463 std->dma = dma; 464 std->offs = offs; 465 std->nexttd = sc->sc_freetds; 466 sc->sc_freetds = std; 467 } 468 splx(s); 469 } 470 471 s = splusb(); 472 std = sc->sc_freetds; 473 sc->sc_freetds = std->nexttd; 474 memset(&std->td, 0, sizeof(ohci_td_t)); 475 std->nexttd = NULL; 476 std->xfer = NULL; 477 ohci_hash_add_td(sc, std); 478 splx(s); 479 480 return (std); 481 } 482 483 void 484 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std) 485 { 486 int s; 487 488 s = splusb(); 489 ohci_hash_rem_td(sc, std); 490 std->nexttd = sc->sc_freetds; 491 sc->sc_freetds = std; 492 splx(s); 493 } 494 495 usbd_status 496 ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc, 497 int alen, int rd, usbd_xfer_handle xfer, 498 ohci_soft_td_t *sp, ohci_soft_td_t **ep) 499 { 500 ohci_soft_td_t *next, *cur; 501 ohci_physaddr_t dataphys, dataphysend; 502 u_int32_t tdflags; 503 int len, curlen; 504 usb_dma_t *dma = &xfer->dmabuf; 505 u_int16_t flags = xfer->flags; 506 507 DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen)); 508 509 len = alen; 510 cur = sp; 511 dataphys = DMAADDR(dma, 0); 512 dataphysend = OHCI_PAGE(dataphys + len - 1); 513 usb_syncmem(dma, 0, len, 514 rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 515 tdflags = HTOO32( 516 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 517 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) | 518 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR); 519 520 for (;;) { 521 next = ohci_alloc_std(sc); 522 if (next == NULL) 523 goto nomem; 524 525 /* The OHCI hardware can handle at most one page crossing. */ 526 if (OHCI_PAGE(dataphys) == dataphysend || 527 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) { 528 /* we can handle it in this TD */ 529 curlen = len; 530 } else { 531 /* must use multiple TDs, fill as much as possible. */ 532 curlen = 2 * OHCI_PAGE_SIZE - 533 (dataphys & (OHCI_PAGE_SIZE-1)); 534 /* the length must be a multiple of the max size */ 535 curlen -= curlen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize); 536 #ifdef DIAGNOSTIC 537 if (curlen == 0) 538 panic("ohci_alloc_std: curlen == 0"); 539 #endif 540 } 541 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x " 542 "dataphysend=0x%08x len=%d curlen=%d\n", 543 dataphys, dataphysend, 544 len, curlen)); 545 len -= curlen; 546 547 cur->td.td_flags = tdflags; 548 cur->td.td_cbp = HTOO32(dataphys); 549 cur->nexttd = next; 550 cur->td.td_nexttd = HTOO32(next->physaddr); 551 cur->td.td_be = HTOO32(dataphys + curlen - 1); 552 cur->len = curlen; 553 cur->flags = OHCI_ADD_LEN; 554 cur->xfer = xfer; 555 usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td), 556 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 557 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n", 558 dataphys, dataphys + curlen - 1)); 559 if (len == 0) 560 break; 561 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n")); 562 dataphys += curlen; 563 cur = next; 564 } 565 if (!rd && (flags & USBD_FORCE_SHORT_XFER) && 566 alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) { 567 /* Force a 0 length transfer at the end. */ 568 569 cur = next; 570 next = ohci_alloc_std(sc); 571 if (next == NULL) 572 goto nomem; 573 574 cur->td.td_flags = tdflags; 575 cur->td.td_cbp = 0; /* indicate 0 length packet */ 576 cur->nexttd = next; 577 cur->td.td_nexttd = HTOO32(next->physaddr); 578 cur->td.td_be = ~0; 579 cur->len = 0; 580 cur->flags = 0; 581 cur->xfer = xfer; 582 usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td), 583 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 584 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n")); 585 } 586 *ep = cur; 587 588 return (USBD_NORMAL_COMPLETION); 589 590 nomem: 591 /* XXX free chain */ 592 return (USBD_NOMEM); 593 } 594 595 #if 0 596 Static void 597 ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std, 598 ohci_soft_td_t *stdend) 599 { 600 ohci_soft_td_t *p; 601 602 for (; std != stdend; std = p) { 603 p = std->nexttd; 604 ohci_free_std(sc, std); 605 } 606 } 607 #endif 608 609 ohci_soft_itd_t * 610 ohci_alloc_sitd(ohci_softc_t *sc) 611 { 612 ohci_soft_itd_t *sitd; 613 usbd_status err; 614 int i, s, offs; 615 usb_dma_t dma; 616 617 if (sc->sc_freeitds == NULL) { 618 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n")); 619 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK, 620 OHCI_ITD_ALIGN, &dma); 621 if (err) 622 return (NULL); 623 s = splusb(); 624 for(i = 0; i < OHCI_SITD_CHUNK; i++) { 625 offs = i * OHCI_SITD_SIZE; 626 sitd = KERNADDR(&dma, offs); 627 sitd->physaddr = DMAADDR(&dma, offs); 628 sitd->dma = dma; 629 sitd->offs = offs; 630 sitd->nextitd = sc->sc_freeitds; 631 sc->sc_freeitds = sitd; 632 } 633 splx(s); 634 } 635 636 s = splusb(); 637 sitd = sc->sc_freeitds; 638 sc->sc_freeitds = sitd->nextitd; 639 memset(&sitd->itd, 0, sizeof(ohci_itd_t)); 640 sitd->nextitd = NULL; 641 sitd->xfer = NULL; 642 ohci_hash_add_itd(sc, sitd); 643 splx(s); 644 645 #ifdef DIAGNOSTIC 646 sitd->isdone = 0; 647 #endif 648 649 return (sitd); 650 } 651 652 void 653 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 654 { 655 int s; 656 657 DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd)); 658 659 #ifdef DIAGNOSTIC 660 if (!sitd->isdone) { 661 panic("ohci_free_sitd: sitd=%p not done", sitd); 662 return; 663 } 664 /* Warn double free */ 665 sitd->isdone = 0; 666 #endif 667 668 s = splusb(); 669 ohci_hash_rem_itd(sc, sitd); 670 sitd->nextitd = sc->sc_freeitds; 671 sc->sc_freeitds = sitd; 672 splx(s); 673 } 674 675 usbd_status 676 ohci_init(ohci_softc_t *sc) 677 { 678 ohci_soft_ed_t *sed, *psed; 679 usbd_status err; 680 int i; 681 u_int32_t s, ctl, rwc, ival, hcr, fm, per, rev, desca, descb; 682 683 DPRINTF(("ohci_init: start\n")); 684 #if defined(__OpenBSD__) 685 printf(","); 686 #else 687 printf("%s:", device_xname(sc->sc_dev)); 688 #endif 689 rev = OREAD4(sc, OHCI_REVISION); 690 printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev), 691 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 692 693 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 694 printf("%s: unsupported OHCI revision\n", 695 device_xname(sc->sc_dev)); 696 sc->sc_bus.usbrev = USBREV_UNKNOWN; 697 return (USBD_INVAL); 698 } 699 sc->sc_bus.usbrev = USBREV_1_0; 700 701 for (i = 0; i < OHCI_HASH_SIZE; i++) 702 LIST_INIT(&sc->sc_hash_tds[i]); 703 for (i = 0; i < OHCI_HASH_SIZE; i++) 704 LIST_INIT(&sc->sc_hash_itds[i]); 705 706 SIMPLEQ_INIT(&sc->sc_free_xfers); 707 708 #ifdef __NetBSD__ 709 usb_setup_reserve(sc->sc_dev, &sc->sc_dma_reserve, sc->sc_bus.dmatag, 710 USB_MEM_RESERVE); 711 #endif 712 713 /* XXX determine alignment by R/W */ 714 /* Allocate the HCCA area. */ 715 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 716 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 717 if (err) 718 return (err); 719 sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0); 720 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 721 722 sc->sc_eintrs = OHCI_NORMAL_INTRS; 723 724 /* Allocate dummy ED that starts the control list. */ 725 sc->sc_ctrl_head = ohci_alloc_sed(sc); 726 if (sc->sc_ctrl_head == NULL) { 727 err = USBD_NOMEM; 728 goto bad1; 729 } 730 sc->sc_ctrl_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 731 732 /* Allocate dummy ED that starts the bulk list. */ 733 sc->sc_bulk_head = ohci_alloc_sed(sc); 734 if (sc->sc_bulk_head == NULL) { 735 err = USBD_NOMEM; 736 goto bad2; 737 } 738 sc->sc_bulk_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 739 usb_syncmem(&sc->sc_bulk_head->dma, sc->sc_bulk_head->offs, 740 sizeof(sc->sc_bulk_head->ed), 741 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 742 743 /* Allocate dummy ED that starts the isochronous list. */ 744 sc->sc_isoc_head = ohci_alloc_sed(sc); 745 if (sc->sc_isoc_head == NULL) { 746 err = USBD_NOMEM; 747 goto bad3; 748 } 749 sc->sc_isoc_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 750 usb_syncmem(&sc->sc_isoc_head->dma, sc->sc_isoc_head->offs, 751 sizeof(sc->sc_isoc_head->ed), 752 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 753 754 /* Allocate all the dummy EDs that make up the interrupt tree. */ 755 for (i = 0; i < OHCI_NO_EDS; i++) { 756 sed = ohci_alloc_sed(sc); 757 if (sed == NULL) { 758 while (--i >= 0) 759 ohci_free_sed(sc, sc->sc_eds[i]); 760 err = USBD_NOMEM; 761 goto bad4; 762 } 763 /* All ED fields are set to 0. */ 764 sc->sc_eds[i] = sed; 765 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 766 if (i != 0) 767 psed = sc->sc_eds[(i-1) / 2]; 768 else 769 psed= sc->sc_isoc_head; 770 sed->next = psed; 771 sed->ed.ed_nexted = HTOO32(psed->physaddr); 772 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 773 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 774 } 775 /* 776 * Fill HCCA interrupt table. The bit reversal is to get 777 * the tree set up properly to spread the interrupts. 778 */ 779 for (i = 0; i < OHCI_NO_INTRS; i++) 780 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 781 HTOO32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 782 usb_syncmem(&sc->sc_hccadma, 0, OHCI_HCCA_SIZE, 783 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 784 785 #ifdef OHCI_DEBUG 786 if (ohcidebug > 15) { 787 for (i = 0; i < OHCI_NO_EDS; i++) { 788 printf("ed#%d ", i); 789 ohci_dump_ed(sc, sc->sc_eds[i]); 790 } 791 printf("iso "); 792 ohci_dump_ed(sc, sc->sc_isoc_head); 793 } 794 #endif 795 796 /* Preserve values programmed by SMM/BIOS but lost over reset. */ 797 ctl = OREAD4(sc, OHCI_CONTROL); 798 rwc = ctl & OHCI_RWC; 799 fm = OREAD4(sc, OHCI_FM_INTERVAL); 800 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 801 descb = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 802 803 /* Determine in what context we are running. */ 804 if (ctl & OHCI_IR) { 805 /* SMM active, request change */ 806 DPRINTF(("ohci_init: SMM active, request owner change\n")); 807 if ((sc->sc_intre & (OHCI_OC | OHCI_MIE)) == 808 (OHCI_OC | OHCI_MIE)) 809 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_MIE); 810 s = OREAD4(sc, OHCI_COMMAND_STATUS); 811 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 812 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 813 usb_delay_ms(&sc->sc_bus, 1); 814 ctl = OREAD4(sc, OHCI_CONTROL); 815 } 816 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_MIE); 817 if ((ctl & OHCI_IR) == 0) { 818 printf("%s: SMM does not respond, resetting\n", 819 device_xname(sc->sc_dev)); 820 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 821 goto reset; 822 } 823 #if 0 824 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */ 825 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 826 /* BIOS started controller. */ 827 DPRINTF(("ohci_init: BIOS active\n")); 828 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 829 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL | rwc); 830 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 831 } 832 #endif 833 } else { 834 DPRINTF(("ohci_init: cold started\n")); 835 reset: 836 /* Controller was cold started. */ 837 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 838 } 839 840 /* 841 * This reset should not be necessary according to the OHCI spec, but 842 * without it some controllers do not start. 843 */ 844 DPRINTF(("%s: resetting\n", device_xname(sc->sc_dev))); 845 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 846 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 847 848 /* We now own the host controller and the bus has been reset. */ 849 850 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 851 /* Nominal time for a reset is 10 us. */ 852 for (i = 0; i < 10; i++) { 853 delay(10); 854 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 855 if (!hcr) 856 break; 857 } 858 if (hcr) { 859 printf("%s: reset timeout\n", device_xname(sc->sc_dev)); 860 err = USBD_IOERROR; 861 goto bad5; 862 } 863 #ifdef OHCI_DEBUG 864 if (ohcidebug > 15) 865 ohci_dumpregs(sc); 866 #endif 867 868 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 869 870 /* Set up HC registers. */ 871 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 872 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 873 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 874 /* disable all interrupts and then switch on all desired interrupts */ 875 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 876 /* switch on desired functional features */ 877 ctl = OREAD4(sc, OHCI_CONTROL); 878 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 879 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 880 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL | rwc; 881 /* And finally start it! */ 882 OWRITE4(sc, OHCI_CONTROL, ctl); 883 884 /* 885 * The controller is now OPERATIONAL. Set a some final 886 * registers that should be set earlier, but that the 887 * controller ignores when in the SUSPEND state. 888 */ 889 ival = OHCI_GET_IVAL(fm); 890 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 891 fm |= OHCI_FSMPS(ival) | ival; 892 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 893 per = OHCI_PERIODIC(ival); /* 90% periodic */ 894 OWRITE4(sc, OHCI_PERIODIC_START, per); 895 896 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */ 897 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP); 898 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 899 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY); 900 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca); 901 902 /* 903 * The AMD756 requires a delay before re-reading the register, 904 * otherwise it will occasionally report 0 ports. 905 */ 906 sc->sc_noport = 0; 907 for (i = 0; i < 10 && sc->sc_noport == 0; i++) { 908 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY); 909 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 910 } 911 912 #ifdef OHCI_DEBUG 913 if (ohcidebug > 5) 914 ohci_dumpregs(sc); 915 #endif 916 917 /* Set up the bus struct. */ 918 sc->sc_bus.methods = &ohci_bus_methods; 919 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 920 921 #if defined(__NetBSD__) || defined(__OpenBSD__) 922 sc->sc_control = sc->sc_intre = 0; 923 #endif 924 925 usb_callout_init(sc->sc_tmo_rhsc); 926 927 /* Finally, turn on interrupts. */ 928 DPRINTFN(1,("ohci_init: enabling\n")); 929 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 930 931 return (USBD_NORMAL_COMPLETION); 932 933 bad5: 934 for (i = 0; i < OHCI_NO_EDS; i++) 935 ohci_free_sed(sc, sc->sc_eds[i]); 936 bad4: 937 ohci_free_sed(sc, sc->sc_isoc_head); 938 bad3: 939 ohci_free_sed(sc, sc->sc_bulk_head); 940 bad2: 941 ohci_free_sed(sc, sc->sc_ctrl_head); 942 bad1: 943 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 944 return (err); 945 } 946 947 usbd_status 948 ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 949 { 950 #if defined(__NetBSD__) || defined(__OpenBSD__) 951 struct ohci_softc *sc = bus->hci_private; 952 #endif 953 usbd_status status; 954 955 status = usb_allocmem(&sc->sc_bus, size, 0, dma); 956 #ifdef __NetBSD__ 957 if (status == USBD_NOMEM) 958 status = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size); 959 #endif 960 return status; 961 } 962 963 void 964 ohci_freem(struct usbd_bus *bus, usb_dma_t *dma) 965 { 966 #if defined(__NetBSD__) || defined(__OpenBSD__) 967 struct ohci_softc *sc = bus->hci_private; 968 #endif 969 #ifdef __NetBSD__ 970 if (dma->block->flags & USB_DMA_RESERVE) { 971 usb_reserve_freem(&sc->sc_dma_reserve, dma); 972 return; 973 } 974 #endif 975 usb_freemem(&sc->sc_bus, dma); 976 } 977 978 usbd_xfer_handle 979 ohci_allocx(struct usbd_bus *bus) 980 { 981 struct ohci_softc *sc = bus->hci_private; 982 usbd_xfer_handle xfer; 983 984 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 985 if (xfer != NULL) { 986 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 987 #ifdef DIAGNOSTIC 988 if (xfer->busy_free != XFER_FREE) { 989 printf("ohci_allocx: xfer=%p not free, 0x%08x\n", xfer, 990 xfer->busy_free); 991 } 992 #endif 993 } else { 994 xfer = malloc(sizeof(struct ohci_xfer), M_USB, M_NOWAIT); 995 } 996 if (xfer != NULL) { 997 memset(xfer, 0, sizeof (struct ohci_xfer)); 998 #ifdef DIAGNOSTIC 999 xfer->busy_free = XFER_BUSY; 1000 #endif 1001 } 1002 return (xfer); 1003 } 1004 1005 void 1006 ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 1007 { 1008 struct ohci_softc *sc = bus->hci_private; 1009 1010 #ifdef DIAGNOSTIC 1011 if (xfer->busy_free != XFER_BUSY) { 1012 printf("ohci_freex: xfer=%p not busy, 0x%08x\n", xfer, 1013 xfer->busy_free); 1014 } 1015 xfer->busy_free = XFER_FREE; 1016 #endif 1017 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 1018 } 1019 1020 /* 1021 * Shut down the controller when the system is going down. 1022 */ 1023 bool 1024 ohci_shutdown(device_t self, int flags) 1025 { 1026 ohci_softc_t *sc = device_private(self); 1027 1028 DPRINTF(("ohci_shutdown: stopping the HC\n")); 1029 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1030 return true; 1031 } 1032 1033 bool 1034 ohci_resume(device_t dv PMF_FN_ARGS) 1035 { 1036 ohci_softc_t *sc = device_private(dv); 1037 uint32_t ctl; 1038 int s; 1039 1040 s = splhardusb(); 1041 sc->sc_bus.use_polling++; 1042 /* Some broken BIOSes do not recover these values */ 1043 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 1044 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, 1045 sc->sc_ctrl_head->physaddr); 1046 OWRITE4(sc, OHCI_BULK_HEAD_ED, 1047 sc->sc_bulk_head->physaddr); 1048 if (sc->sc_intre) 1049 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_intre & 1050 (OHCI_ALL_INTRS | OHCI_MIE)); 1051 if (sc->sc_control) 1052 ctl = sc->sc_control; 1053 else 1054 ctl = OREAD4(sc, OHCI_CONTROL); 1055 ctl |= OHCI_HCFS_RESUME; 1056 OWRITE4(sc, OHCI_CONTROL, ctl); 1057 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 1058 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL; 1059 OWRITE4(sc, OHCI_CONTROL, ctl); 1060 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 1061 sc->sc_control = sc->sc_intre = 0; 1062 sc->sc_bus.use_polling--; 1063 splx(s); 1064 1065 return true; 1066 } 1067 1068 bool 1069 ohci_suspend(device_t dv PMF_FN_ARGS) 1070 { 1071 ohci_softc_t *sc = device_private(dv); 1072 uint32_t ctl; 1073 int s; 1074 1075 s = splhardusb(); 1076 sc->sc_bus.use_polling++; 1077 ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK; 1078 if (sc->sc_control == 0) { 1079 /* 1080 * Preserve register values, in case that BIOS 1081 * does not recover them. 1082 */ 1083 sc->sc_control = ctl; 1084 sc->sc_intre = OREAD4(sc, 1085 OHCI_INTERRUPT_ENABLE); 1086 } 1087 ctl |= OHCI_HCFS_SUSPEND; 1088 OWRITE4(sc, OHCI_CONTROL, ctl); 1089 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1090 sc->sc_bus.use_polling--; 1091 splx(s); 1092 1093 return true; 1094 } 1095 1096 #ifdef OHCI_DEBUG 1097 void 1098 ohci_dumpregs(ohci_softc_t *sc) 1099 { 1100 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 1101 OREAD4(sc, OHCI_REVISION), 1102 OREAD4(sc, OHCI_CONTROL), 1103 OREAD4(sc, OHCI_COMMAND_STATUS))); 1104 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 1105 OREAD4(sc, OHCI_INTERRUPT_STATUS), 1106 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 1107 OREAD4(sc, OHCI_INTERRUPT_DISABLE))); 1108 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 1109 OREAD4(sc, OHCI_HCCA), 1110 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 1111 OREAD4(sc, OHCI_CONTROL_HEAD_ED))); 1112 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 1113 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 1114 OREAD4(sc, OHCI_BULK_HEAD_ED), 1115 OREAD4(sc, OHCI_BULK_CURRENT_ED))); 1116 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 1117 OREAD4(sc, OHCI_DONE_HEAD), 1118 OREAD4(sc, OHCI_FM_INTERVAL), 1119 OREAD4(sc, OHCI_FM_REMAINING))); 1120 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 1121 OREAD4(sc, OHCI_FM_NUMBER), 1122 OREAD4(sc, OHCI_PERIODIC_START), 1123 OREAD4(sc, OHCI_LS_THRESHOLD))); 1124 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n", 1125 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 1126 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 1127 OREAD4(sc, OHCI_RH_STATUS))); 1128 DPRINTF((" port1=0x%08x port2=0x%08x\n", 1129 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 1130 OREAD4(sc, OHCI_RH_PORT_STATUS(2)))); 1131 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n", 1132 O32TOH(sc->sc_hcca->hcca_frame_number), 1133 O32TOH(sc->sc_hcca->hcca_done_head))); 1134 } 1135 #endif 1136 1137 Static int ohci_intr1(ohci_softc_t *); 1138 1139 int 1140 ohci_intr(void *p) 1141 { 1142 ohci_softc_t *sc = p; 1143 1144 if (sc == NULL || sc->sc_dying || !device_has_power(sc->sc_dev)) 1145 return (0); 1146 1147 /* If we get an interrupt while polling, then just ignore it. */ 1148 if (sc->sc_bus.use_polling) { 1149 #ifdef DIAGNOSTIC 1150 DPRINTFN(16, ("ohci_intr: ignored interrupt while polling\n")); 1151 #endif 1152 /* for level triggered intrs, should do something to ack */ 1153 OWRITE4(sc, OHCI_INTERRUPT_STATUS, 1154 OREAD4(sc, OHCI_INTERRUPT_STATUS)); 1155 1156 return (0); 1157 } 1158 1159 return (ohci_intr1(sc)); 1160 } 1161 1162 Static int 1163 ohci_intr1(ohci_softc_t *sc) 1164 { 1165 u_int32_t intrs, eintrs; 1166 1167 DPRINTFN(14,("ohci_intr1: enter\n")); 1168 1169 /* In case the interrupt occurs before initialization has completed. */ 1170 if (sc == NULL || sc->sc_hcca == NULL) { 1171 #ifdef DIAGNOSTIC 1172 printf("ohci_intr: sc->sc_hcca == NULL\n"); 1173 #endif 1174 return (0); 1175 } 1176 1177 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1178 if (!intrs) 1179 return (0); 1180 1181 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs & ~(OHCI_MIE|OHCI_WDH)); /* Acknowledge */ 1182 eintrs = intrs & sc->sc_eintrs; 1183 if (!eintrs) 1184 return (0); 1185 1186 sc->sc_bus.intr_context++; 1187 sc->sc_bus.no_intrs++; 1188 DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 1189 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 1190 (u_int)eintrs)); 1191 1192 if (eintrs & OHCI_SO) { 1193 sc->sc_overrun_cnt++; 1194 if (usbd_ratecheck(&sc->sc_overrun_ntc)) { 1195 printf("%s: %u scheduling overruns\n", 1196 device_xname(sc->sc_dev), sc->sc_overrun_cnt); 1197 sc->sc_overrun_cnt = 0; 1198 } 1199 /* XXX do what */ 1200 eintrs &= ~OHCI_SO; 1201 } 1202 if (eintrs & OHCI_WDH) { 1203 /* 1204 * We block the interrupt below, and reenable it later from 1205 * ohci_softintr(). 1206 */ 1207 usb_schedsoftintr(&sc->sc_bus); 1208 } 1209 if (eintrs & OHCI_RD) { 1210 printf("%s: resume detect\n", device_xname(sc->sc_dev)); 1211 /* XXX process resume detect */ 1212 } 1213 if (eintrs & OHCI_UE) { 1214 printf("%s: unrecoverable error, controller halted\n", 1215 device_xname(sc->sc_dev)); 1216 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1217 /* XXX what else */ 1218 } 1219 if (eintrs & OHCI_RHSC) { 1220 /* 1221 * We block the interrupt below, and reenable it later from 1222 * a timeout. 1223 */ 1224 ohci_rhsc(sc, sc->sc_intrxfer); 1225 /* Do not allow RHSC interrupts > 1 per second */ 1226 usb_callout(sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc); 1227 } 1228 1229 sc->sc_bus.intr_context--; 1230 1231 if (eintrs != 0) { 1232 /* Block unprocessed interrupts. */ 1233 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs); 1234 sc->sc_eintrs &= ~eintrs; 1235 DPRINTFN(1, ("%s: blocking intrs 0x%x\n", 1236 device_xname(sc->sc_dev), eintrs)); 1237 } 1238 1239 return (1); 1240 } 1241 1242 void 1243 ohci_rhsc_enable(void *v_sc) 1244 { 1245 ohci_softc_t *sc = v_sc; 1246 int s; 1247 1248 s = splhardusb(); 1249 sc->sc_eintrs |= OHCI_RHSC; 1250 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1251 splx(s); 1252 } 1253 1254 #ifdef OHCI_DEBUG 1255 const char *ohci_cc_strs[] = { 1256 "NO_ERROR", 1257 "CRC", 1258 "BIT_STUFFING", 1259 "DATA_TOGGLE_MISMATCH", 1260 "STALL", 1261 "DEVICE_NOT_RESPONDING", 1262 "PID_CHECK_FAILURE", 1263 "UNEXPECTED_PID", 1264 "DATA_OVERRUN", 1265 "DATA_UNDERRUN", 1266 "BUFFER_OVERRUN", 1267 "BUFFER_UNDERRUN", 1268 "reserved", 1269 "reserved", 1270 "NOT_ACCESSED", 1271 "NOT_ACCESSED", 1272 }; 1273 #endif 1274 1275 void 1276 ohci_softintr(void *v) 1277 { 1278 struct usbd_bus *bus = v; 1279 ohci_softc_t *sc = bus->hci_private; 1280 ohci_soft_itd_t *sitd, *sidone, *sitdnext; 1281 ohci_soft_td_t *std, *sdone, *stdnext; 1282 usbd_xfer_handle xfer; 1283 struct ohci_pipe *opipe; 1284 int len, cc, s; 1285 int i, j, actlen, iframes, uedir; 1286 ohci_physaddr_t done; 1287 1288 DPRINTFN(10,("ohci_softintr: enter\n")); 1289 1290 sc->sc_bus.intr_context++; 1291 1292 s = splhardusb(); 1293 usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head), 1294 sizeof(sc->sc_hcca->hcca_done_head), 1295 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1296 done = O32TOH(sc->sc_hcca->hcca_done_head) & ~OHCI_DONE_INTRS; 1297 sc->sc_hcca->hcca_done_head = 0; 1298 usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head), 1299 sizeof(sc->sc_hcca->hcca_done_head), 1300 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1301 OWRITE4(sc, OHCI_INTERRUPT_STATUS, OHCI_WDH); 1302 sc->sc_eintrs |= OHCI_WDH; 1303 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_WDH); 1304 splx(s); 1305 1306 /* Reverse the done list. */ 1307 for (sdone = NULL, sidone = NULL; done != 0; ) { 1308 std = ohci_hash_find_td(sc, done); 1309 if (std != NULL) { 1310 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 1311 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1312 std->dnext = sdone; 1313 done = O32TOH(std->td.td_nexttd); 1314 sdone = std; 1315 DPRINTFN(10,("add TD %p\n", std)); 1316 continue; 1317 } 1318 sitd = ohci_hash_find_itd(sc, done); 1319 if (sitd != NULL) { 1320 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 1321 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1322 sitd->dnext = sidone; 1323 done = O32TOH(sitd->itd.itd_nextitd); 1324 sidone = sitd; 1325 DPRINTFN(5,("add ITD %p\n", sitd)); 1326 continue; 1327 } 1328 panic("ohci_softintr: addr 0x%08lx not found", (u_long)done); 1329 } 1330 1331 DPRINTFN(10,("ohci_softintr: sdone=%p sidone=%p\n", sdone, sidone)); 1332 1333 #ifdef OHCI_DEBUG 1334 if (ohcidebug > 10) { 1335 DPRINTF(("ohci_process_done: TD done:\n")); 1336 ohci_dump_tds(sc, sdone); 1337 } 1338 #endif 1339 1340 for (std = sdone; std; std = stdnext) { 1341 xfer = std->xfer; 1342 stdnext = std->dnext; 1343 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n", 1344 std, xfer, xfer ? xfer->hcpriv : 0)); 1345 if (xfer == NULL) { 1346 /* 1347 * xfer == NULL: There seems to be no xfer associated 1348 * with this TD. It is tailp that happened to end up on 1349 * the done queue. 1350 * Shouldn't happen, but some chips are broken(?). 1351 */ 1352 continue; 1353 } 1354 if (xfer->status == USBD_CANCELLED || 1355 xfer->status == USBD_TIMEOUT) { 1356 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1357 xfer)); 1358 /* Handled by abort routine. */ 1359 continue; 1360 } 1361 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 1362 1363 len = std->len; 1364 if (std->td.td_cbp != 0) 1365 len -= O32TOH(std->td.td_be) - 1366 O32TOH(std->td.td_cbp) + 1; 1367 DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", len, 1368 std->flags)); 1369 if (std->flags & OHCI_ADD_LEN) 1370 xfer->actlen += len; 1371 1372 cc = OHCI_TD_GET_CC(O32TOH(std->td.td_flags)); 1373 if (cc == OHCI_CC_NO_ERROR) { 1374 if (std->flags & OHCI_CALL_DONE) { 1375 xfer->status = USBD_NORMAL_COMPLETION; 1376 s = splusb(); 1377 usb_transfer_complete(xfer); 1378 splx(s); 1379 } 1380 ohci_free_std(sc, std); 1381 } else { 1382 /* 1383 * Endpoint is halted. First unlink all the TDs 1384 * belonging to the failed transfer, and then restart 1385 * the endpoint. 1386 */ 1387 ohci_soft_td_t *p, *n; 1388 opipe = (struct ohci_pipe *)xfer->pipe; 1389 1390 DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n", 1391 OHCI_TD_GET_CC(O32TOH(std->td.td_flags)), 1392 ohci_cc_strs[OHCI_TD_GET_CC(O32TOH(std->td.td_flags))])); 1393 1394 /* remove TDs */ 1395 for (p = std; p->xfer == xfer; p = n) { 1396 n = p->nexttd; 1397 ohci_free_std(sc, p); 1398 } 1399 1400 /* clear halt */ 1401 opipe->sed->ed.ed_headp = HTOO32(p->physaddr); 1402 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1403 1404 if (cc == OHCI_CC_STALL) 1405 xfer->status = USBD_STALLED; 1406 else 1407 xfer->status = USBD_IOERROR; 1408 s = splusb(); 1409 usb_transfer_complete(xfer); 1410 splx(s); 1411 } 1412 } 1413 1414 #ifdef OHCI_DEBUG 1415 if (ohcidebug > 10) { 1416 DPRINTF(("ohci_softintr: ITD done:\n")); 1417 ohci_dump_itds(sc, sidone); 1418 } 1419 #endif 1420 1421 for (sitd = sidone; sitd != NULL; sitd = sitdnext) { 1422 xfer = sitd->xfer; 1423 sitdnext = sitd->dnext; 1424 DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n", 1425 sitd, xfer, xfer ? xfer->hcpriv : 0)); 1426 if (xfer == NULL) 1427 continue; 1428 if (xfer->status == USBD_CANCELLED || 1429 xfer->status == USBD_TIMEOUT) { 1430 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1431 xfer)); 1432 /* Handled by abort routine. */ 1433 continue; 1434 } 1435 #ifdef DIAGNOSTIC 1436 if (sitd->isdone) 1437 printf("ohci_softintr: sitd=%p is done\n", sitd); 1438 sitd->isdone = 1; 1439 #endif 1440 if (sitd->flags & OHCI_CALL_DONE) { 1441 ohci_soft_itd_t *next; 1442 1443 opipe = (struct ohci_pipe *)xfer->pipe; 1444 opipe->u.iso.inuse -= xfer->nframes; 1445 uedir = UE_GET_DIR(xfer->pipe->endpoint->edesc-> 1446 bEndpointAddress); 1447 xfer->status = USBD_NORMAL_COMPLETION; 1448 actlen = 0; 1449 for (i = 0, sitd = xfer->hcpriv;; 1450 sitd = next) { 1451 next = sitd->nextitd; 1452 if (OHCI_ITD_GET_CC(O32TOH(sitd-> 1453 itd.itd_flags)) != OHCI_CC_NO_ERROR) 1454 xfer->status = USBD_IOERROR; 1455 /* For input, update frlengths with actual */ 1456 /* XXX anything necessary for output? */ 1457 if (uedir == UE_DIR_IN && 1458 xfer->status == USBD_NORMAL_COMPLETION) { 1459 iframes = OHCI_ITD_GET_FC(O32TOH( 1460 sitd->itd.itd_flags)); 1461 for (j = 0; j < iframes; i++, j++) { 1462 len = O16TOH(sitd-> 1463 itd.itd_offset[j]); 1464 if ((OHCI_ITD_PSW_GET_CC(len) & 1465 OHCI_CC_NOT_ACCESSED_MASK) 1466 == OHCI_CC_NOT_ACCESSED) 1467 len = 0; 1468 else 1469 len = OHCI_ITD_PSW_LENGTH(len); 1470 xfer->frlengths[i] = len; 1471 actlen += len; 1472 } 1473 } 1474 if (sitd->flags & OHCI_CALL_DONE) 1475 break; 1476 ohci_free_sitd(sc, sitd); 1477 } 1478 ohci_free_sitd(sc, sitd); 1479 if (uedir == UE_DIR_IN && 1480 xfer->status == USBD_NORMAL_COMPLETION) 1481 xfer->actlen = actlen; 1482 xfer->hcpriv = NULL; 1483 1484 s = splusb(); 1485 usb_transfer_complete(xfer); 1486 splx(s); 1487 } 1488 } 1489 1490 #ifdef USB_USE_SOFTINTR 1491 if (sc->sc_softwake) { 1492 sc->sc_softwake = 0; 1493 wakeup(&sc->sc_softwake); 1494 } 1495 #endif /* USB_USE_SOFTINTR */ 1496 1497 sc->sc_bus.intr_context--; 1498 DPRINTFN(10,("ohci_softintr: done:\n")); 1499 } 1500 1501 void 1502 ohci_device_ctrl_done(usbd_xfer_handle xfer) 1503 { 1504 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1505 int len = UGETW(xfer->request.wLength); 1506 int isread = (xfer->request.bmRequestType & UT_READ); 1507 1508 DPRINTFN(10,("ohci_device_ctrl_done: xfer=%p\n", xfer)); 1509 1510 #ifdef DIAGNOSTIC 1511 if (!(xfer->rqflags & URQ_REQUEST)) { 1512 panic("ohci_device_ctrl_done: not a request"); 1513 } 1514 #endif 1515 if (len) 1516 usb_syncmem(&xfer->dmabuf, 0, len, 1517 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1518 usb_syncmem(&opipe->u.ctl.reqdma, 0, 1519 sizeof(usb_device_request_t), BUS_DMASYNC_POSTWRITE); 1520 } 1521 1522 void 1523 ohci_device_intr_done(usbd_xfer_handle xfer) 1524 { 1525 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1526 ohci_softc_t *sc = opipe->pipe.device->bus->hci_private; 1527 ohci_soft_ed_t *sed = opipe->sed; 1528 ohci_soft_td_t *data, *tail; 1529 int isread = 1530 (UE_GET_DIR(xfer->pipe->endpoint->edesc->bEndpointAddress) == UE_DIR_IN); 1531 1532 1533 DPRINTFN(10,("ohci_device_intr_done: xfer=%p, actlen=%d\n", 1534 xfer, xfer->actlen)); 1535 1536 usb_syncmem(&xfer->dmabuf, 0, xfer->length, 1537 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1538 if (xfer->pipe->repeat) { 1539 data = opipe->tail.td; 1540 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 1541 if (tail == NULL) { 1542 xfer->status = USBD_NOMEM; 1543 return; 1544 } 1545 tail->xfer = NULL; 1546 1547 data->td.td_flags = HTOO32( 1548 OHCI_TD_IN | OHCI_TD_NOCC | 1549 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 1550 if (xfer->flags & USBD_SHORT_XFER_OK) 1551 data->td.td_flags |= HTOO32(OHCI_TD_R); 1552 data->td.td_cbp = HTOO32(DMAADDR(&xfer->dmabuf, 0)); 1553 data->nexttd = tail; 1554 data->td.td_nexttd = HTOO32(tail->physaddr); 1555 data->td.td_be = HTOO32(O32TOH(data->td.td_cbp) + 1556 xfer->length - 1); 1557 data->len = xfer->length; 1558 data->xfer = xfer; 1559 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1560 usb_syncmem(&data->dma, data->offs, sizeof(data->td), 1561 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1562 xfer->hcpriv = data; 1563 xfer->actlen = 0; 1564 1565 sed->ed.ed_tailp = HTOO32(tail->physaddr); 1566 usb_syncmem(&sed->dma, 1567 sed->offs + offsetof(ohci_ed_t, ed_tailp), 1568 sizeof(sed->ed.ed_tailp), 1569 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1570 opipe->tail.td = tail; 1571 } 1572 } 1573 1574 void 1575 ohci_device_bulk_done(usbd_xfer_handle xfer) 1576 { 1577 int isread = 1578 (UE_GET_DIR(xfer->pipe->endpoint->edesc->bEndpointAddress) == UE_DIR_IN); 1579 1580 DPRINTFN(10,("ohci_device_bulk_done: xfer=%p, actlen=%d\n", 1581 xfer, xfer->actlen)); 1582 usb_syncmem(&xfer->dmabuf, 0, xfer->length, 1583 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1584 } 1585 1586 void 1587 ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer) 1588 { 1589 usbd_pipe_handle pipe; 1590 u_char *p; 1591 int i, m; 1592 int hstatus; 1593 1594 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1595 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n", 1596 sc, xfer, hstatus)); 1597 1598 if (xfer == NULL) { 1599 /* Just ignore the change. */ 1600 return; 1601 } 1602 1603 pipe = xfer->pipe; 1604 1605 p = KERNADDR(&xfer->dmabuf, 0); 1606 m = min(sc->sc_noport, xfer->length * 8 - 1); 1607 memset(p, 0, xfer->length); 1608 for (i = 1; i <= m; i++) { 1609 /* Pick out CHANGE bits from the status reg. */ 1610 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1611 p[i/8] |= 1 << (i%8); 1612 } 1613 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 1614 xfer->actlen = xfer->length; 1615 xfer->status = USBD_NORMAL_COMPLETION; 1616 1617 usb_transfer_complete(xfer); 1618 } 1619 1620 void 1621 ohci_root_intr_done(usbd_xfer_handle xfer) 1622 { 1623 } 1624 1625 void 1626 ohci_root_ctrl_done(usbd_xfer_handle xfer) 1627 { 1628 } 1629 1630 /* 1631 * Wait here until controller claims to have an interrupt. 1632 * Then call ohci_intr and return. Use timeout to avoid waiting 1633 * too long. 1634 */ 1635 void 1636 ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer) 1637 { 1638 int timo; 1639 u_int32_t intrs; 1640 1641 xfer->status = USBD_IN_PROGRESS; 1642 for (timo = xfer->timeout; timo >= 0; timo--) { 1643 usb_delay_ms(&sc->sc_bus, 1); 1644 if (sc->sc_dying) 1645 break; 1646 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 1647 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs)); 1648 #ifdef OHCI_DEBUG 1649 if (ohcidebug > 15) 1650 ohci_dumpregs(sc); 1651 #endif 1652 if (intrs) { 1653 ohci_intr1(sc); 1654 if (xfer->status != USBD_IN_PROGRESS) 1655 return; 1656 } 1657 } 1658 1659 /* Timeout */ 1660 DPRINTF(("ohci_waitintr: timeout\n")); 1661 xfer->status = USBD_TIMEOUT; 1662 usb_transfer_complete(xfer); 1663 /* XXX should free TD */ 1664 } 1665 1666 void 1667 ohci_poll(struct usbd_bus *bus) 1668 { 1669 ohci_softc_t *sc = bus->hci_private; 1670 #ifdef OHCI_DEBUG 1671 static int last; 1672 int new; 1673 new = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1674 if (new != last) { 1675 DPRINTFN(10,("ohci_poll: intrs=0x%04x\n", new)); 1676 last = new; 1677 } 1678 #endif 1679 1680 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) 1681 ohci_intr1(sc); 1682 } 1683 1684 usbd_status 1685 ohci_device_request(usbd_xfer_handle xfer) 1686 { 1687 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1688 usb_device_request_t *req = &xfer->request; 1689 usbd_device_handle dev = opipe->pipe.device; 1690 ohci_softc_t *sc = dev->bus->hci_private; 1691 int addr = dev->address; 1692 ohci_soft_td_t *setup, *stat, *next, *tail; 1693 ohci_soft_ed_t *sed; 1694 int isread; 1695 int len; 1696 usbd_status err; 1697 int s; 1698 1699 isread = req->bmRequestType & UT_READ; 1700 len = UGETW(req->wLength); 1701 1702 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 1703 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 1704 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1705 UGETW(req->wIndex), len, addr, 1706 opipe->pipe.endpoint->edesc->bEndpointAddress)); 1707 1708 setup = opipe->tail.td; 1709 stat = ohci_alloc_std(sc); 1710 if (stat == NULL) { 1711 err = USBD_NOMEM; 1712 goto bad1; 1713 } 1714 tail = ohci_alloc_std(sc); 1715 if (tail == NULL) { 1716 err = USBD_NOMEM; 1717 goto bad2; 1718 } 1719 tail->xfer = NULL; 1720 1721 sed = opipe->sed; 1722 opipe->u.ctl.length = len; 1723 1724 /* Update device address and length since they may have changed 1725 during the setup of the control pipe in usbd_new_device(). */ 1726 /* XXX This only needs to be done once, but it's too early in open. */ 1727 /* XXXX Should not touch ED here! */ 1728 1729 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 1730 sizeof(sed->ed.ed_flags), 1731 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1732 sed->ed.ed_flags = HTOO32( 1733 (O32TOH(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) | 1734 OHCI_ED_SET_FA(addr) | 1735 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize))); 1736 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 1737 sizeof(sed->ed.ed_flags), 1738 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1739 1740 next = stat; 1741 1742 /* Set up data transaction */ 1743 if (len != 0) { 1744 ohci_soft_td_t *std = stat; 1745 1746 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 1747 std, &stat); 1748 stat = stat->nexttd; /* point at free TD */ 1749 if (err) 1750 goto bad3; 1751 /* Start toggle at 1 and then use the carried toggle. */ 1752 std->td.td_flags &= HTOO32(~OHCI_TD_TOGGLE_MASK); 1753 std->td.td_flags |= HTOO32(OHCI_TD_TOGGLE_1); 1754 usb_syncmem(&std->dma, 1755 std->offs + offsetof(ohci_td_t, td_flags), 1756 sizeof(std->td.td_flags), 1757 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1758 } 1759 1760 memcpy(KERNADDR(&opipe->u.ctl.reqdma, 0), req, sizeof *req); 1761 usb_syncmem(&opipe->u.ctl.reqdma, 0, sizeof *req, BUS_DMASYNC_PREWRITE); 1762 1763 setup->td.td_flags = HTOO32(OHCI_TD_SETUP | OHCI_TD_NOCC | 1764 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1765 setup->td.td_cbp = HTOO32(DMAADDR(&opipe->u.ctl.reqdma, 0)); 1766 setup->nexttd = next; 1767 setup->td.td_nexttd = HTOO32(next->physaddr); 1768 setup->td.td_be = HTOO32(O32TOH(setup->td.td_cbp) + sizeof *req - 1); 1769 setup->len = 0; 1770 setup->xfer = xfer; 1771 setup->flags = 0; 1772 xfer->hcpriv = setup; 1773 usb_syncmem(&setup->dma, setup->offs, sizeof(setup->td), 1774 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1775 1776 stat->td.td_flags = HTOO32( 1777 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | 1778 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1779 stat->td.td_cbp = 0; 1780 stat->nexttd = tail; 1781 stat->td.td_nexttd = HTOO32(tail->physaddr); 1782 stat->td.td_be = 0; 1783 stat->flags = OHCI_CALL_DONE; 1784 stat->len = 0; 1785 stat->xfer = xfer; 1786 usb_syncmem(&stat->dma, stat->offs, sizeof(stat->td), 1787 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1788 1789 #ifdef OHCI_DEBUG 1790 if (ohcidebug > 5) { 1791 DPRINTF(("ohci_device_request:\n")); 1792 ohci_dump_ed(sc, sed); 1793 ohci_dump_tds(sc, setup); 1794 } 1795 #endif 1796 1797 /* Insert ED in schedule */ 1798 s = splusb(); 1799 sed->ed.ed_tailp = HTOO32(tail->physaddr); 1800 usb_syncmem(&sed->dma, 1801 sed->offs + offsetof(ohci_ed_t, ed_tailp), 1802 sizeof(sed->ed.ed_tailp), 1803 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1804 opipe->tail.td = tail; 1805 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1806 if (xfer->timeout && !sc->sc_bus.use_polling) { 1807 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 1808 ohci_timeout, xfer); 1809 } 1810 splx(s); 1811 1812 #ifdef OHCI_DEBUG 1813 if (ohcidebug > 20) { 1814 delay(10000); 1815 DPRINTF(("ohci_device_request: status=%x\n", 1816 OREAD4(sc, OHCI_COMMAND_STATUS))); 1817 ohci_dumpregs(sc); 1818 printf("ctrl head:\n"); 1819 ohci_dump_ed(sc, sc->sc_ctrl_head); 1820 printf("sed:\n"); 1821 ohci_dump_ed(sc, sed); 1822 ohci_dump_tds(sc, setup); 1823 } 1824 #endif 1825 1826 return (USBD_NORMAL_COMPLETION); 1827 1828 bad3: 1829 ohci_free_std(sc, tail); 1830 bad2: 1831 ohci_free_std(sc, stat); 1832 bad1: 1833 return (err); 1834 } 1835 1836 /* 1837 * Add an ED to the schedule. Called at splusb(). 1838 */ 1839 void 1840 ohci_add_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1841 { 1842 DPRINTFN(8,("ohci_add_ed: sed=%p head=%p\n", sed, head)); 1843 1844 SPLUSBCHECK; 1845 usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted), 1846 sizeof(head->ed.ed_nexted), 1847 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1848 sed->next = head->next; 1849 sed->ed.ed_nexted = head->ed.ed_nexted; 1850 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted), 1851 sizeof(sed->ed.ed_nexted), 1852 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1853 head->next = sed; 1854 head->ed.ed_nexted = HTOO32(sed->physaddr); 1855 usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted), 1856 sizeof(head->ed.ed_nexted), 1857 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1858 } 1859 1860 /* 1861 * Remove an ED from the schedule. Called at splusb(). 1862 */ 1863 void 1864 ohci_rem_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1865 { 1866 ohci_soft_ed_t *p; 1867 1868 SPLUSBCHECK; 1869 1870 /* XXX */ 1871 for (p = head; p != NULL && p->next != sed; p = p->next) 1872 ; 1873 if (p == NULL) 1874 panic("ohci_rem_ed: ED not found"); 1875 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted), 1876 sizeof(sed->ed.ed_nexted), 1877 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1878 p->next = sed->next; 1879 p->ed.ed_nexted = sed->ed.ed_nexted; 1880 usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted), 1881 sizeof(p->ed.ed_nexted), 1882 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1883 } 1884 1885 /* 1886 * When a transfer is completed the TD is added to the done queue by 1887 * the host controller. This queue is the processed by software. 1888 * Unfortunately the queue contains the physical address of the TD 1889 * and we have no simple way to translate this back to a kernel address. 1890 * To make the translation possible (and fast) we use a hash table of 1891 * TDs currently in the schedule. The physical address is used as the 1892 * hash value. 1893 */ 1894 1895 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1896 /* Called at splusb() */ 1897 void 1898 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1899 { 1900 int h = HASH(std->physaddr); 1901 1902 SPLUSBCHECK; 1903 1904 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1905 } 1906 1907 /* Called at splusb() */ 1908 void 1909 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1910 { 1911 SPLUSBCHECK; 1912 1913 LIST_REMOVE(std, hnext); 1914 } 1915 1916 ohci_soft_td_t * 1917 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a) 1918 { 1919 int h = HASH(a); 1920 ohci_soft_td_t *std; 1921 1922 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1923 std != NULL; 1924 std = LIST_NEXT(std, hnext)) 1925 if (std->physaddr == a) 1926 return (std); 1927 return (NULL); 1928 } 1929 1930 /* Called at splusb() */ 1931 void 1932 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1933 { 1934 int h = HASH(sitd->physaddr); 1935 1936 SPLUSBCHECK; 1937 1938 DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n", 1939 sitd, (u_long)sitd->physaddr)); 1940 1941 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext); 1942 } 1943 1944 /* Called at splusb() */ 1945 void 1946 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1947 { 1948 SPLUSBCHECK; 1949 1950 DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n", 1951 sitd, (u_long)sitd->physaddr)); 1952 1953 LIST_REMOVE(sitd, hnext); 1954 } 1955 1956 ohci_soft_itd_t * 1957 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a) 1958 { 1959 int h = HASH(a); 1960 ohci_soft_itd_t *sitd; 1961 1962 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]); 1963 sitd != NULL; 1964 sitd = LIST_NEXT(sitd, hnext)) 1965 if (sitd->physaddr == a) 1966 return (sitd); 1967 return (NULL); 1968 } 1969 1970 void 1971 ohci_timeout(void *addr) 1972 { 1973 struct ohci_xfer *oxfer = addr; 1974 struct ohci_pipe *opipe = (struct ohci_pipe *)oxfer->xfer.pipe; 1975 ohci_softc_t *sc = opipe->pipe.device->bus->hci_private; 1976 1977 DPRINTF(("ohci_timeout: oxfer=%p\n", oxfer)); 1978 1979 if (sc->sc_dying) { 1980 ohci_abort_xfer(&oxfer->xfer, USBD_TIMEOUT); 1981 return; 1982 } 1983 1984 /* Execute the abort in a process context. */ 1985 usb_init_task(&oxfer->abort_task, ohci_timeout_task, addr); 1986 usb_add_task(oxfer->xfer.pipe->device, &oxfer->abort_task, 1987 USB_TASKQ_HC); 1988 } 1989 1990 void 1991 ohci_timeout_task(void *addr) 1992 { 1993 usbd_xfer_handle xfer = addr; 1994 int s; 1995 1996 DPRINTF(("ohci_timeout_task: xfer=%p\n", xfer)); 1997 1998 s = splusb(); 1999 ohci_abort_xfer(xfer, USBD_TIMEOUT); 2000 splx(s); 2001 } 2002 2003 #ifdef OHCI_DEBUG 2004 void 2005 ohci_dump_tds(ohci_softc_t *sc, ohci_soft_td_t *std) 2006 { 2007 for (; std; std = std->nexttd) 2008 ohci_dump_td(sc, std); 2009 } 2010 2011 void 2012 ohci_dump_td(ohci_softc_t *sc, ohci_soft_td_t *std) 2013 { 2014 char sbuf[128]; 2015 2016 bitmask_snprintf((u_int32_t)O32TOH(std->td.td_flags), 2017 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 2018 sbuf, sizeof(sbuf)); 2019 2020 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 2021 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2022 printf("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx " 2023 "nexttd=0x%08lx be=0x%08lx\n", 2024 std, (u_long)std->physaddr, sbuf, 2025 OHCI_TD_GET_DI(O32TOH(std->td.td_flags)), 2026 OHCI_TD_GET_EC(O32TOH(std->td.td_flags)), 2027 OHCI_TD_GET_CC(O32TOH(std->td.td_flags)), 2028 (u_long)O32TOH(std->td.td_cbp), 2029 (u_long)O32TOH(std->td.td_nexttd), 2030 (u_long)O32TOH(std->td.td_be)); 2031 } 2032 2033 void 2034 ohci_dump_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 2035 { 2036 int i; 2037 2038 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 2039 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2040 printf("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n" 2041 "bp0=0x%08lx next=0x%08lx be=0x%08lx\n", 2042 sitd, (u_long)sitd->physaddr, 2043 OHCI_ITD_GET_SF(O32TOH(sitd->itd.itd_flags)), 2044 OHCI_ITD_GET_DI(O32TOH(sitd->itd.itd_flags)), 2045 OHCI_ITD_GET_FC(O32TOH(sitd->itd.itd_flags)), 2046 OHCI_ITD_GET_CC(O32TOH(sitd->itd.itd_flags)), 2047 (u_long)O32TOH(sitd->itd.itd_bp0), 2048 (u_long)O32TOH(sitd->itd.itd_nextitd), 2049 (u_long)O32TOH(sitd->itd.itd_be)); 2050 for (i = 0; i < OHCI_ITD_NOFFSET; i++) 2051 printf("offs[%d]=0x%04x ", i, 2052 (u_int)O16TOH(sitd->itd.itd_offset[i])); 2053 printf("\n"); 2054 } 2055 2056 void 2057 ohci_dump_itds(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 2058 { 2059 for (; sitd; sitd = sitd->nextitd) 2060 ohci_dump_itd(sc, sitd); 2061 } 2062 2063 void 2064 ohci_dump_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 2065 { 2066 char sbuf[128], sbuf2[128]; 2067 2068 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 2069 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2070 bitmask_snprintf((u_int32_t)O32TOH(sed->ed.ed_flags), 2071 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO", 2072 sbuf, sizeof(sbuf)); 2073 bitmask_snprintf((u_int32_t)O32TOH(sed->ed.ed_headp), 2074 "\20\1HALT\2CARRY", sbuf2, sizeof(sbuf2)); 2075 2076 printf("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d flags=%s\ntailp=0x%08lx " 2077 "headflags=%s headp=0x%08lx nexted=0x%08lx\n", 2078 sed, (u_long)sed->physaddr, 2079 OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)), 2080 OHCI_ED_GET_EN(O32TOH(sed->ed.ed_flags)), 2081 OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)), sbuf, 2082 (u_long)O32TOH(sed->ed.ed_tailp), sbuf2, 2083 (u_long)O32TOH(sed->ed.ed_headp), 2084 (u_long)O32TOH(sed->ed.ed_nexted)); 2085 } 2086 #endif 2087 2088 usbd_status 2089 ohci_open(usbd_pipe_handle pipe) 2090 { 2091 usbd_device_handle dev = pipe->device; 2092 ohci_softc_t *sc = dev->bus->hci_private; 2093 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 2094 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2095 u_int8_t addr = dev->address; 2096 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 2097 ohci_soft_ed_t *sed; 2098 ohci_soft_td_t *std; 2099 ohci_soft_itd_t *sitd; 2100 ohci_physaddr_t tdphys; 2101 u_int32_t fmt; 2102 usbd_status err; 2103 int s; 2104 int ival; 2105 2106 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 2107 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 2108 2109 if (sc->sc_dying) 2110 return (USBD_IOERROR); 2111 2112 std = NULL; 2113 sed = NULL; 2114 2115 if (addr == sc->sc_addr) { 2116 switch (ed->bEndpointAddress) { 2117 case USB_CONTROL_ENDPOINT: 2118 pipe->methods = &ohci_root_ctrl_methods; 2119 break; 2120 case UE_DIR_IN | OHCI_INTR_ENDPT: 2121 pipe->methods = &ohci_root_intr_methods; 2122 break; 2123 default: 2124 return (USBD_INVAL); 2125 } 2126 } else { 2127 sed = ohci_alloc_sed(sc); 2128 if (sed == NULL) 2129 goto bad0; 2130 opipe->sed = sed; 2131 if (xfertype == UE_ISOCHRONOUS) { 2132 sitd = ohci_alloc_sitd(sc); 2133 if (sitd == NULL) 2134 goto bad1; 2135 opipe->tail.itd = sitd; 2136 tdphys = sitd->physaddr; 2137 fmt = OHCI_ED_FORMAT_ISO; 2138 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 2139 fmt |= OHCI_ED_DIR_IN; 2140 else 2141 fmt |= OHCI_ED_DIR_OUT; 2142 } else { 2143 std = ohci_alloc_std(sc); 2144 if (std == NULL) 2145 goto bad1; 2146 opipe->tail.td = std; 2147 tdphys = std->physaddr; 2148 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD; 2149 } 2150 sed->ed.ed_flags = HTOO32( 2151 OHCI_ED_SET_FA(addr) | 2152 OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) | 2153 (dev->speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) | 2154 fmt | 2155 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 2156 sed->ed.ed_headp = sed->ed.ed_tailp = HTOO32(tdphys); 2157 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 2158 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2159 2160 switch (xfertype) { 2161 case UE_CONTROL: 2162 pipe->methods = &ohci_device_ctrl_methods; 2163 err = usb_allocmem(&sc->sc_bus, 2164 sizeof(usb_device_request_t), 2165 0, &opipe->u.ctl.reqdma); 2166 if (err) 2167 goto bad; 2168 s = splusb(); 2169 ohci_add_ed(sc, sed, sc->sc_ctrl_head); 2170 splx(s); 2171 break; 2172 case UE_INTERRUPT: 2173 pipe->methods = &ohci_device_intr_methods; 2174 ival = pipe->interval; 2175 if (ival == USBD_DEFAULT_INTERVAL) 2176 ival = ed->bInterval; 2177 return (ohci_device_setintr(sc, opipe, ival)); 2178 case UE_ISOCHRONOUS: 2179 pipe->methods = &ohci_device_isoc_methods; 2180 return (ohci_setup_isoc(pipe)); 2181 case UE_BULK: 2182 pipe->methods = &ohci_device_bulk_methods; 2183 s = splusb(); 2184 ohci_add_ed(sc, sed, sc->sc_bulk_head); 2185 splx(s); 2186 break; 2187 } 2188 } 2189 return (USBD_NORMAL_COMPLETION); 2190 2191 bad: 2192 if (std != NULL) 2193 ohci_free_std(sc, std); 2194 bad1: 2195 if (sed != NULL) 2196 ohci_free_sed(sc, sed); 2197 bad0: 2198 return (USBD_NOMEM); 2199 2200 } 2201 2202 /* 2203 * Close a reqular pipe. 2204 * Assumes that there are no pending transactions. 2205 */ 2206 void 2207 ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head) 2208 { 2209 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2210 ohci_softc_t *sc = pipe->device->bus->hci_private; 2211 ohci_soft_ed_t *sed = opipe->sed; 2212 int s; 2213 2214 s = splusb(); 2215 #ifdef DIAGNOSTIC 2216 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 2217 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2218 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) { 2219 ohci_soft_td_t *std; 2220 std = ohci_hash_find_td(sc, O32TOH(sed->ed.ed_headp)); 2221 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 2222 "tl=0x%x pipe=%p, std=%p\n", sed, 2223 (int)O32TOH(sed->ed.ed_headp), 2224 (int)O32TOH(sed->ed.ed_tailp), 2225 pipe, std); 2226 #ifdef USB_DEBUG 2227 usbd_dump_pipe(&opipe->pipe); 2228 #endif 2229 #ifdef OHCI_DEBUG 2230 ohci_dump_ed(sc, sed); 2231 if (std) 2232 ohci_dump_td(sc, std); 2233 #endif 2234 usb_delay_ms(&sc->sc_bus, 2); 2235 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2236 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) 2237 printf("ohci_close_pipe: pipe still not empty\n"); 2238 } 2239 #endif 2240 ohci_rem_ed(sed, head); 2241 /* Make sure the host controller is not touching this ED */ 2242 usb_delay_ms(&sc->sc_bus, 1); 2243 splx(s); 2244 ohci_free_sed(sc, opipe->sed); 2245 } 2246 2247 /* 2248 * Abort a device request. 2249 * If this routine is called at splusb() it guarantees that the request 2250 * will be removed from the hardware scheduling and that the callback 2251 * for it will be called with USBD_CANCELLED status. 2252 * It's impossible to guarantee that the requested transfer will not 2253 * have happened since the hardware runs concurrently. 2254 * If the transaction has already happened we rely on the ordinary 2255 * interrupt processing to process it. 2256 */ 2257 void 2258 ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2259 { 2260 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2261 ohci_softc_t *sc = opipe->pipe.device->bus->hci_private; 2262 ohci_soft_ed_t *sed = opipe->sed; 2263 ohci_soft_td_t *p, *n; 2264 ohci_physaddr_t headp; 2265 int s, hit; 2266 int wake; 2267 2268 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p sed=%p\n", xfer, opipe,sed)); 2269 2270 if (sc->sc_dying) { 2271 /* If we're dying, just do the software part. */ 2272 s = splusb(); 2273 xfer->status = status; /* make software ignore it */ 2274 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 2275 usb_transfer_complete(xfer); 2276 splx(s); 2277 return; 2278 } 2279 2280 if (xfer->device->bus->intr_context || !curproc) 2281 panic("ohci_abort_xfer: not in process context"); 2282 2283 /* 2284 * If an abort is already in progress then just wait for it to 2285 * complete and return. 2286 */ 2287 if (xfer->hcflags & UXFER_ABORTING) { 2288 DPRINTFN(2, ("ohci_abort_xfer: already aborting\n")); 2289 #ifdef DIAGNOSTIC 2290 if (status == USBD_TIMEOUT) 2291 printf("0hci_abort_xfer: TIMEOUT while aborting\n"); 2292 #endif 2293 /* Override the status which might be USBD_TIMEOUT. */ 2294 xfer->status = status; 2295 DPRINTFN(2, ("ohci_abort_xfer: waiting for abort to finish\n")); 2296 xfer->hcflags |= UXFER_ABORTWAIT; 2297 while (xfer->hcflags & UXFER_ABORTING) 2298 tsleep(&xfer->hcflags, PZERO, "ohciaw", 0); 2299 return; 2300 } 2301 xfer->hcflags |= UXFER_ABORTING; 2302 2303 /* 2304 * Step 1: Make interrupt routine and hardware ignore xfer. 2305 */ 2306 s = splusb(); 2307 xfer->status = status; /* make software ignore it */ 2308 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 2309 splx(s); 2310 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed)); 2311 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2312 sizeof(sed->ed.ed_flags), 2313 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2314 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */ 2315 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2316 sizeof(sed->ed.ed_flags), 2317 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2318 2319 /* 2320 * Step 2: Wait until we know hardware has finished any possible 2321 * use of the xfer. Also make sure the soft interrupt routine 2322 * has run. 2323 */ 2324 usb_delay_ms(opipe->pipe.device->bus, 20); /* Hardware finishes in 1ms */ 2325 s = splusb(); 2326 #ifdef USB_USE_SOFTINTR 2327 sc->sc_softwake = 1; 2328 #endif /* USB_USE_SOFTINTR */ 2329 usb_schedsoftintr(&sc->sc_bus); 2330 #ifdef USB_USE_SOFTINTR 2331 tsleep(&sc->sc_softwake, PZERO, "ohciab", 0); 2332 #endif /* USB_USE_SOFTINTR */ 2333 splx(s); 2334 2335 /* 2336 * Step 3: Remove any vestiges of the xfer from the hardware. 2337 * The complication here is that the hardware may have executed 2338 * beyond the xfer we're trying to abort. So as we're scanning 2339 * the TDs of this xfer we check if the hardware points to 2340 * any of them. 2341 */ 2342 s = splusb(); /* XXX why? */ 2343 p = xfer->hcpriv; 2344 #ifdef DIAGNOSTIC 2345 if (p == NULL) { 2346 xfer->hcflags &= ~UXFER_ABORTING; /* XXX */ 2347 splx(s); 2348 printf("ohci_abort_xfer: hcpriv is NULL\n"); 2349 return; 2350 } 2351 #endif 2352 #ifdef OHCI_DEBUG 2353 if (ohcidebug > 1) { 2354 DPRINTF(("ohci_abort_xfer: sed=\n")); 2355 ohci_dump_ed(sc, sed); 2356 ohci_dump_tds(sc, p); 2357 } 2358 #endif 2359 headp = O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK; 2360 hit = 0; 2361 for (; p->xfer == xfer; p = n) { 2362 hit |= headp == p->physaddr; 2363 n = p->nexttd; 2364 ohci_free_std(sc, p); 2365 } 2366 /* Zap headp register if hardware pointed inside the xfer. */ 2367 if (hit) { 2368 DPRINTFN(1,("ohci_abort_xfer: set hd=0x%08x, tl=0x%08x\n", 2369 (int)p->physaddr, (int)O32TOH(sed->ed.ed_tailp))); 2370 sed->ed.ed_headp = HTOO32(p->physaddr); /* unlink TDs */ 2371 usb_syncmem(&sed->dma, 2372 sed->offs + offsetof(ohci_ed_t, ed_headp), 2373 sizeof(sed->ed.ed_headp), 2374 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2375 } else { 2376 DPRINTFN(1,("ohci_abort_xfer: no hit\n")); 2377 } 2378 2379 /* 2380 * Step 4: Turn on hardware again. 2381 */ 2382 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2383 sizeof(sed->ed.ed_flags), 2384 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2385 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */ 2386 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2387 sizeof(sed->ed.ed_flags), 2388 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2389 2390 /* 2391 * Step 5: Execute callback. 2392 */ 2393 wake = xfer->hcflags & UXFER_ABORTWAIT; 2394 xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT); 2395 usb_transfer_complete(xfer); 2396 if (wake) 2397 wakeup(&xfer->hcflags); 2398 2399 splx(s); 2400 } 2401 2402 /* 2403 * Data structures and routines to emulate the root hub. 2404 */ 2405 Static usb_device_descriptor_t ohci_devd = { 2406 USB_DEVICE_DESCRIPTOR_SIZE, 2407 UDESC_DEVICE, /* type */ 2408 {0x00, 0x01}, /* USB version */ 2409 UDCLASS_HUB, /* class */ 2410 UDSUBCLASS_HUB, /* subclass */ 2411 UDPROTO_FSHUB, 2412 64, /* max packet */ 2413 {0},{0},{0x00,0x01}, /* device id */ 2414 1,2,0, /* string indicies */ 2415 1 /* # of configurations */ 2416 }; 2417 2418 Static const usb_config_descriptor_t ohci_confd = { 2419 USB_CONFIG_DESCRIPTOR_SIZE, 2420 UDESC_CONFIG, 2421 {USB_CONFIG_DESCRIPTOR_SIZE + 2422 USB_INTERFACE_DESCRIPTOR_SIZE + 2423 USB_ENDPOINT_DESCRIPTOR_SIZE}, 2424 1, 2425 1, 2426 0, 2427 UC_ATTR_MBO | UC_SELF_POWERED, 2428 0 /* max power */ 2429 }; 2430 2431 Static const usb_interface_descriptor_t ohci_ifcd = { 2432 USB_INTERFACE_DESCRIPTOR_SIZE, 2433 UDESC_INTERFACE, 2434 0, 2435 0, 2436 1, 2437 UICLASS_HUB, 2438 UISUBCLASS_HUB, 2439 UIPROTO_FSHUB, 2440 0 2441 }; 2442 2443 Static const usb_endpoint_descriptor_t ohci_endpd = { 2444 .bLength = USB_ENDPOINT_DESCRIPTOR_SIZE, 2445 .bDescriptorType = UDESC_ENDPOINT, 2446 .bEndpointAddress = UE_DIR_IN | OHCI_INTR_ENDPT, 2447 .bmAttributes = UE_INTERRUPT, 2448 .wMaxPacketSize = {8, 0}, /* max packet */ 2449 .bInterval = 255, 2450 }; 2451 2452 Static const usb_hub_descriptor_t ohci_hubd = { 2453 .bDescLength = USB_HUB_DESCRIPTOR_SIZE, 2454 .bDescriptorType = UDESC_HUB, 2455 }; 2456 2457 /* 2458 * Simulate a hardware hub by handling all the necessary requests. 2459 */ 2460 Static usbd_status 2461 ohci_root_ctrl_transfer(usbd_xfer_handle xfer) 2462 { 2463 usbd_status err; 2464 2465 /* Insert last in queue. */ 2466 err = usb_insert_transfer(xfer); 2467 if (err) 2468 return (err); 2469 2470 /* Pipe isn't running, start first */ 2471 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2472 } 2473 2474 Static usbd_status 2475 ohci_root_ctrl_start(usbd_xfer_handle xfer) 2476 { 2477 ohci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2478 usb_device_request_t *req; 2479 void *buf = NULL; 2480 int port, i; 2481 int s, len, value, index, l, totlen = 0; 2482 usb_port_status_t ps; 2483 usb_hub_descriptor_t hubd; 2484 usbd_status err; 2485 u_int32_t v; 2486 2487 if (sc->sc_dying) 2488 return (USBD_IOERROR); 2489 2490 #ifdef DIAGNOSTIC 2491 if (!(xfer->rqflags & URQ_REQUEST)) 2492 /* XXX panic */ 2493 return (USBD_INVAL); 2494 #endif 2495 req = &xfer->request; 2496 2497 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 2498 req->bmRequestType, req->bRequest)); 2499 2500 len = UGETW(req->wLength); 2501 value = UGETW(req->wValue); 2502 index = UGETW(req->wIndex); 2503 2504 if (len != 0) 2505 buf = KERNADDR(&xfer->dmabuf, 0); 2506 2507 #define C(x,y) ((x) | ((y) << 8)) 2508 switch(C(req->bRequest, req->bmRequestType)) { 2509 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 2510 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 2511 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 2512 /* 2513 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 2514 * for the integrated root hub. 2515 */ 2516 break; 2517 case C(UR_GET_CONFIG, UT_READ_DEVICE): 2518 if (len > 0) { 2519 *(u_int8_t *)buf = sc->sc_conf; 2520 totlen = 1; 2521 } 2522 break; 2523 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2524 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 2525 if (len == 0) 2526 break; 2527 switch(value >> 8) { 2528 case UDESC_DEVICE: 2529 if ((value & 0xff) != 0) { 2530 err = USBD_IOERROR; 2531 goto ret; 2532 } 2533 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 2534 USETW(ohci_devd.idVendor, sc->sc_id_vendor); 2535 memcpy(buf, &ohci_devd, l); 2536 break; 2537 case UDESC_CONFIG: 2538 if ((value & 0xff) != 0) { 2539 err = USBD_IOERROR; 2540 goto ret; 2541 } 2542 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 2543 memcpy(buf, &ohci_confd, l); 2544 buf = (char *)buf + l; 2545 len -= l; 2546 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 2547 totlen += l; 2548 memcpy(buf, &ohci_ifcd, l); 2549 buf = (char *)buf + l; 2550 len -= l; 2551 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 2552 totlen += l; 2553 memcpy(buf, &ohci_endpd, l); 2554 break; 2555 case UDESC_STRING: 2556 #define sd ((usb_string_descriptor_t *)buf) 2557 switch (value & 0xff) { 2558 case 0: /* Language table */ 2559 totlen = usb_makelangtbl(sd, len); 2560 break; 2561 case 1: /* Vendor */ 2562 totlen = usb_makestrdesc(sd, len, 2563 sc->sc_vendor); 2564 break; 2565 case 2: /* Product */ 2566 totlen = usb_makestrdesc(sd, len, 2567 "OHCI root hub"); 2568 break; 2569 } 2570 #undef sd 2571 break; 2572 default: 2573 err = USBD_IOERROR; 2574 goto ret; 2575 } 2576 break; 2577 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 2578 if (len > 0) { 2579 *(u_int8_t *)buf = 0; 2580 totlen = 1; 2581 } 2582 break; 2583 case C(UR_GET_STATUS, UT_READ_DEVICE): 2584 if (len > 1) { 2585 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 2586 totlen = 2; 2587 } 2588 break; 2589 case C(UR_GET_STATUS, UT_READ_INTERFACE): 2590 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 2591 if (len > 1) { 2592 USETW(((usb_status_t *)buf)->wStatus, 0); 2593 totlen = 2; 2594 } 2595 break; 2596 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 2597 if (value >= USB_MAX_DEVICES) { 2598 err = USBD_IOERROR; 2599 goto ret; 2600 } 2601 sc->sc_addr = value; 2602 break; 2603 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 2604 if (value != 0 && value != 1) { 2605 err = USBD_IOERROR; 2606 goto ret; 2607 } 2608 sc->sc_conf = value; 2609 break; 2610 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 2611 break; 2612 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 2613 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 2614 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 2615 err = USBD_IOERROR; 2616 goto ret; 2617 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 2618 break; 2619 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 2620 break; 2621 /* Hub requests */ 2622 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2623 break; 2624 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2625 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 2626 "port=%d feature=%d\n", 2627 index, value)); 2628 if (index < 1 || index > sc->sc_noport) { 2629 err = USBD_IOERROR; 2630 goto ret; 2631 } 2632 port = OHCI_RH_PORT_STATUS(index); 2633 switch(value) { 2634 case UHF_PORT_ENABLE: 2635 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2636 break; 2637 case UHF_PORT_SUSPEND: 2638 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2639 break; 2640 case UHF_PORT_POWER: 2641 /* Yes, writing to the LOW_SPEED bit clears power. */ 2642 OWRITE4(sc, port, UPS_LOW_SPEED); 2643 break; 2644 case UHF_C_PORT_CONNECTION: 2645 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2646 break; 2647 case UHF_C_PORT_ENABLE: 2648 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2649 break; 2650 case UHF_C_PORT_SUSPEND: 2651 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2652 break; 2653 case UHF_C_PORT_OVER_CURRENT: 2654 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2655 break; 2656 case UHF_C_PORT_RESET: 2657 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2658 break; 2659 default: 2660 err = USBD_IOERROR; 2661 goto ret; 2662 } 2663 switch(value) { 2664 case UHF_C_PORT_CONNECTION: 2665 case UHF_C_PORT_ENABLE: 2666 case UHF_C_PORT_SUSPEND: 2667 case UHF_C_PORT_OVER_CURRENT: 2668 case UHF_C_PORT_RESET: 2669 /* Enable RHSC interrupt if condition is cleared. */ 2670 if ((OREAD4(sc, port) >> 16) == 0) 2671 ohci_rhsc_enable(sc); 2672 break; 2673 default: 2674 break; 2675 } 2676 break; 2677 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2678 if (len == 0) 2679 break; 2680 if ((value & 0xff) != 0) { 2681 err = USBD_IOERROR; 2682 goto ret; 2683 } 2684 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2685 hubd = ohci_hubd; 2686 hubd.bNbrPorts = sc->sc_noport; 2687 USETW(hubd.wHubCharacteristics, 2688 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2689 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2690 /* XXX overcurrent */ 2691 ); 2692 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2693 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2694 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2695 hubd.DeviceRemovable[i++] = (u_int8_t)v; 2696 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2697 l = min(len, hubd.bDescLength); 2698 totlen = l; 2699 memcpy(buf, &hubd, l); 2700 break; 2701 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2702 if (len != 4) { 2703 err = USBD_IOERROR; 2704 goto ret; 2705 } 2706 memset(buf, 0, len); /* ? XXX */ 2707 totlen = len; 2708 break; 2709 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2710 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 2711 index)); 2712 if (index < 1 || index > sc->sc_noport) { 2713 err = USBD_IOERROR; 2714 goto ret; 2715 } 2716 if (len != 4) { 2717 err = USBD_IOERROR; 2718 goto ret; 2719 } 2720 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2721 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 2722 v)); 2723 USETW(ps.wPortStatus, v); 2724 USETW(ps.wPortChange, v >> 16); 2725 l = min(len, sizeof ps); 2726 memcpy(buf, &ps, l); 2727 totlen = l; 2728 break; 2729 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2730 err = USBD_IOERROR; 2731 goto ret; 2732 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2733 break; 2734 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2735 if (index < 1 || index > sc->sc_noport) { 2736 err = USBD_IOERROR; 2737 goto ret; 2738 } 2739 port = OHCI_RH_PORT_STATUS(index); 2740 switch(value) { 2741 case UHF_PORT_ENABLE: 2742 OWRITE4(sc, port, UPS_PORT_ENABLED); 2743 break; 2744 case UHF_PORT_SUSPEND: 2745 OWRITE4(sc, port, UPS_SUSPEND); 2746 break; 2747 case UHF_PORT_RESET: 2748 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 2749 index)); 2750 OWRITE4(sc, port, UPS_RESET); 2751 for (i = 0; i < 5; i++) { 2752 usb_delay_ms(&sc->sc_bus, 2753 USB_PORT_ROOT_RESET_DELAY); 2754 if (sc->sc_dying) { 2755 err = USBD_IOERROR; 2756 goto ret; 2757 } 2758 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2759 break; 2760 } 2761 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 2762 index, OREAD4(sc, port))); 2763 break; 2764 case UHF_PORT_POWER: 2765 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 2766 "%d\n", index)); 2767 OWRITE4(sc, port, UPS_PORT_POWER); 2768 break; 2769 default: 2770 err = USBD_IOERROR; 2771 goto ret; 2772 } 2773 break; 2774 default: 2775 err = USBD_IOERROR; 2776 goto ret; 2777 } 2778 xfer->actlen = totlen; 2779 err = USBD_NORMAL_COMPLETION; 2780 ret: 2781 xfer->status = err; 2782 s = splusb(); 2783 usb_transfer_complete(xfer); 2784 splx(s); 2785 return (USBD_IN_PROGRESS); 2786 } 2787 2788 /* Abort a root control request. */ 2789 Static void 2790 ohci_root_ctrl_abort(usbd_xfer_handle xfer) 2791 { 2792 /* Nothing to do, all transfers are synchronous. */ 2793 } 2794 2795 /* Close the root pipe. */ 2796 Static void 2797 ohci_root_ctrl_close(usbd_pipe_handle pipe) 2798 { 2799 DPRINTF(("ohci_root_ctrl_close\n")); 2800 /* Nothing to do. */ 2801 } 2802 2803 Static usbd_status 2804 ohci_root_intr_transfer(usbd_xfer_handle xfer) 2805 { 2806 usbd_status err; 2807 2808 /* Insert last in queue. */ 2809 err = usb_insert_transfer(xfer); 2810 if (err) 2811 return (err); 2812 2813 /* Pipe isn't running, start first */ 2814 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2815 } 2816 2817 Static usbd_status 2818 ohci_root_intr_start(usbd_xfer_handle xfer) 2819 { 2820 usbd_pipe_handle pipe = xfer->pipe; 2821 ohci_softc_t *sc = pipe->device->bus->hci_private; 2822 2823 if (sc->sc_dying) 2824 return (USBD_IOERROR); 2825 2826 sc->sc_intrxfer = xfer; 2827 2828 return (USBD_IN_PROGRESS); 2829 } 2830 2831 /* Abort a root interrupt request. */ 2832 Static void 2833 ohci_root_intr_abort(usbd_xfer_handle xfer) 2834 { 2835 int s; 2836 2837 if (xfer->pipe->intrxfer == xfer) { 2838 DPRINTF(("ohci_root_intr_abort: remove\n")); 2839 xfer->pipe->intrxfer = NULL; 2840 } 2841 xfer->status = USBD_CANCELLED; 2842 s = splusb(); 2843 usb_transfer_complete(xfer); 2844 splx(s); 2845 } 2846 2847 /* Close the root pipe. */ 2848 Static void 2849 ohci_root_intr_close(usbd_pipe_handle pipe) 2850 { 2851 ohci_softc_t *sc = pipe->device->bus->hci_private; 2852 2853 DPRINTF(("ohci_root_intr_close\n")); 2854 2855 sc->sc_intrxfer = NULL; 2856 } 2857 2858 /************************/ 2859 2860 Static usbd_status 2861 ohci_device_ctrl_transfer(usbd_xfer_handle xfer) 2862 { 2863 usbd_status err; 2864 2865 /* Insert last in queue. */ 2866 err = usb_insert_transfer(xfer); 2867 if (err) 2868 return (err); 2869 2870 /* Pipe isn't running, start first */ 2871 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2872 } 2873 2874 Static usbd_status 2875 ohci_device_ctrl_start(usbd_xfer_handle xfer) 2876 { 2877 ohci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2878 usbd_status err; 2879 2880 if (sc->sc_dying) 2881 return (USBD_IOERROR); 2882 2883 #ifdef DIAGNOSTIC 2884 if (!(xfer->rqflags & URQ_REQUEST)) { 2885 /* XXX panic */ 2886 printf("ohci_device_ctrl_transfer: not a request\n"); 2887 return (USBD_INVAL); 2888 } 2889 #endif 2890 2891 err = ohci_device_request(xfer); 2892 if (err) 2893 return (err); 2894 2895 if (sc->sc_bus.use_polling) 2896 ohci_waitintr(sc, xfer); 2897 return (USBD_IN_PROGRESS); 2898 } 2899 2900 /* Abort a device control request. */ 2901 Static void 2902 ohci_device_ctrl_abort(usbd_xfer_handle xfer) 2903 { 2904 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer)); 2905 ohci_abort_xfer(xfer, USBD_CANCELLED); 2906 } 2907 2908 /* Close a device control pipe. */ 2909 Static void 2910 ohci_device_ctrl_close(usbd_pipe_handle pipe) 2911 { 2912 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2913 ohci_softc_t *sc = pipe->device->bus->hci_private; 2914 2915 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe)); 2916 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2917 ohci_free_std(sc, opipe->tail.td); 2918 } 2919 2920 /************************/ 2921 2922 Static void 2923 ohci_device_clear_toggle(usbd_pipe_handle pipe) 2924 { 2925 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2926 ohci_softc_t *sc = pipe->device->bus->hci_private; 2927 2928 opipe->sed->ed.ed_headp &= HTOO32(~OHCI_TOGGLECARRY); 2929 } 2930 2931 Static void 2932 ohci_noop(usbd_pipe_handle pipe) 2933 { 2934 } 2935 2936 Static usbd_status 2937 ohci_device_bulk_transfer(usbd_xfer_handle xfer) 2938 { 2939 usbd_status err; 2940 2941 /* Insert last in queue. */ 2942 err = usb_insert_transfer(xfer); 2943 if (err) 2944 return (err); 2945 2946 /* Pipe isn't running, start first */ 2947 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2948 } 2949 2950 Static usbd_status 2951 ohci_device_bulk_start(usbd_xfer_handle xfer) 2952 { 2953 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2954 usbd_device_handle dev = opipe->pipe.device; 2955 ohci_softc_t *sc = dev->bus->hci_private; 2956 int addr = dev->address; 2957 ohci_soft_td_t *data, *tail, *tdp; 2958 ohci_soft_ed_t *sed; 2959 int s, len, isread, endpt; 2960 usbd_status err; 2961 2962 if (sc->sc_dying) 2963 return (USBD_IOERROR); 2964 2965 #ifdef DIAGNOSTIC 2966 if (xfer->rqflags & URQ_REQUEST) { 2967 /* XXX panic */ 2968 printf("ohci_device_bulk_start: a request\n"); 2969 return (USBD_INVAL); 2970 } 2971 #endif 2972 2973 len = xfer->length; 2974 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 2975 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2976 sed = opipe->sed; 2977 2978 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d " 2979 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags, 2980 endpt)); 2981 2982 opipe->u.bulk.isread = isread; 2983 opipe->u.bulk.length = len; 2984 2985 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 2986 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2987 /* Update device address */ 2988 sed->ed.ed_flags = HTOO32( 2989 (O32TOH(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) | 2990 OHCI_ED_SET_FA(addr)); 2991 2992 /* Allocate a chain of new TDs (including a new tail). */ 2993 data = opipe->tail.td; 2994 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 2995 data, &tail); 2996 /* We want interrupt at the end of the transfer. */ 2997 tail->td.td_flags &= HTOO32(~OHCI_TD_INTR_MASK); 2998 tail->td.td_flags |= HTOO32(OHCI_TD_SET_DI(1)); 2999 tail->flags |= OHCI_CALL_DONE; 3000 tail = tail->nexttd; /* point at sentinel */ 3001 usb_syncmem(&tail->dma, tail->offs + offsetof(ohci_td_t, td_flags), 3002 sizeof(tail->td.td_flags), 3003 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3004 if (err) 3005 return (err); 3006 3007 tail->xfer = NULL; 3008 xfer->hcpriv = data; 3009 3010 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x " 3011 "td_cbp=0x%08x td_be=0x%08x\n", 3012 (int)O32TOH(sed->ed.ed_flags), 3013 (int)O32TOH(data->td.td_flags), 3014 (int)O32TOH(data->td.td_cbp), 3015 (int)O32TOH(data->td.td_be))); 3016 3017 #ifdef OHCI_DEBUG 3018 if (ohcidebug > 5) { 3019 ohci_dump_ed(sc, sed); 3020 ohci_dump_tds(sc, data); 3021 } 3022 #endif 3023 3024 /* Insert ED in schedule */ 3025 s = splusb(); 3026 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 3027 tdp->xfer = xfer; 3028 } 3029 sed->ed.ed_tailp = HTOO32(tail->physaddr); 3030 opipe->tail.td = tail; 3031 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3032 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3033 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3034 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 3035 if (xfer->timeout && !sc->sc_bus.use_polling) { 3036 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 3037 ohci_timeout, xfer); 3038 } 3039 3040 #if 0 3041 /* This goes wrong if we are too slow. */ 3042 if (ohcidebug > 10) { 3043 delay(10000); 3044 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 3045 OREAD4(sc, OHCI_COMMAND_STATUS))); 3046 ohci_dump_ed(sc, sed); 3047 ohci_dump_tds(sc, data); 3048 } 3049 #endif 3050 3051 splx(s); 3052 3053 return (USBD_IN_PROGRESS); 3054 } 3055 3056 Static void 3057 ohci_device_bulk_abort(usbd_xfer_handle xfer) 3058 { 3059 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer)); 3060 ohci_abort_xfer(xfer, USBD_CANCELLED); 3061 } 3062 3063 /* 3064 * Close a device bulk pipe. 3065 */ 3066 Static void 3067 ohci_device_bulk_close(usbd_pipe_handle pipe) 3068 { 3069 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3070 ohci_softc_t *sc = pipe->device->bus->hci_private; 3071 3072 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe)); 3073 ohci_close_pipe(pipe, sc->sc_bulk_head); 3074 ohci_free_std(sc, opipe->tail.td); 3075 } 3076 3077 /************************/ 3078 3079 Static usbd_status 3080 ohci_device_intr_transfer(usbd_xfer_handle xfer) 3081 { 3082 usbd_status err; 3083 3084 /* Insert last in queue. */ 3085 err = usb_insert_transfer(xfer); 3086 if (err) 3087 return (err); 3088 3089 /* Pipe isn't running, start first */ 3090 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 3091 } 3092 3093 Static usbd_status 3094 ohci_device_intr_start(usbd_xfer_handle xfer) 3095 { 3096 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3097 usbd_device_handle dev = opipe->pipe.device; 3098 ohci_softc_t *sc = dev->bus->hci_private; 3099 ohci_soft_ed_t *sed = opipe->sed; 3100 ohci_soft_td_t *data, *tail; 3101 int s, len, isread, endpt; 3102 3103 if (sc->sc_dying) 3104 return (USBD_IOERROR); 3105 3106 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d " 3107 "flags=%d priv=%p\n", 3108 xfer, xfer->length, xfer->flags, xfer->priv)); 3109 3110 #ifdef DIAGNOSTIC 3111 if (xfer->rqflags & URQ_REQUEST) 3112 panic("ohci_device_intr_transfer: a request"); 3113 #endif 3114 3115 len = xfer->length; 3116 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 3117 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3118 3119 data = opipe->tail.td; 3120 tail = ohci_alloc_std(sc); 3121 if (tail == NULL) 3122 return (USBD_NOMEM); 3123 tail->xfer = NULL; 3124 3125 data->td.td_flags = HTOO32( 3126 isread ? OHCI_TD_IN : OHCI_TD_OUT | 3127 OHCI_TD_NOCC | 3128 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 3129 if (xfer->flags & USBD_SHORT_XFER_OK) 3130 data->td.td_flags |= HTOO32(OHCI_TD_R); 3131 data->td.td_cbp = HTOO32(DMAADDR(&xfer->dmabuf, 0)); 3132 data->nexttd = tail; 3133 data->td.td_nexttd = HTOO32(tail->physaddr); 3134 data->td.td_be = HTOO32(O32TOH(data->td.td_cbp) + len - 1); 3135 data->len = len; 3136 data->xfer = xfer; 3137 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 3138 usb_syncmem(&data->dma, data->offs, sizeof(data->td), 3139 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3140 xfer->hcpriv = data; 3141 3142 #ifdef OHCI_DEBUG 3143 if (ohcidebug > 5) { 3144 DPRINTF(("ohci_device_intr_transfer:\n")); 3145 ohci_dump_ed(sc, sed); 3146 ohci_dump_tds(sc, data); 3147 } 3148 #endif 3149 3150 /* Insert ED in schedule */ 3151 s = splusb(); 3152 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3153 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3154 sed->ed.ed_tailp = HTOO32(tail->physaddr); 3155 opipe->tail.td = tail; 3156 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3157 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3158 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3159 3160 #if 0 3161 /* 3162 * This goes horribly wrong, printing thousands of descriptors, 3163 * because false references are followed due to the fact that the 3164 * TD is gone. 3165 */ 3166 if (ohcidebug > 5) { 3167 usb_delay_ms(&sc->sc_bus, 5); 3168 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 3169 OREAD4(sc, OHCI_COMMAND_STATUS))); 3170 ohci_dump_ed(sc, sed); 3171 ohci_dump_tds(sc, data); 3172 } 3173 #endif 3174 splx(s); 3175 3176 return (USBD_IN_PROGRESS); 3177 } 3178 3179 /* Abort a device control request. */ 3180 Static void 3181 ohci_device_intr_abort(usbd_xfer_handle xfer) 3182 { 3183 if (xfer->pipe->intrxfer == xfer) { 3184 DPRINTF(("ohci_device_intr_abort: remove\n")); 3185 xfer->pipe->intrxfer = NULL; 3186 } 3187 ohci_abort_xfer(xfer, USBD_CANCELLED); 3188 } 3189 3190 /* Close a device interrupt pipe. */ 3191 Static void 3192 ohci_device_intr_close(usbd_pipe_handle pipe) 3193 { 3194 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3195 ohci_softc_t *sc = pipe->device->bus->hci_private; 3196 int nslots = opipe->u.intr.nslots; 3197 int pos = opipe->u.intr.pos; 3198 int j; 3199 ohci_soft_ed_t *p, *sed = opipe->sed; 3200 int s; 3201 3202 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 3203 pipe, nslots, pos)); 3204 s = splusb(); 3205 usb_syncmem(&sed->dma, sed->offs, 3206 sizeof(sed->ed), BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3207 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 3208 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3209 sizeof(sed->ed.ed_flags), 3210 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3211 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 3212 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) 3213 usb_delay_ms(&sc->sc_bus, 2); 3214 3215 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 3216 continue; 3217 #ifdef DIAGNOSTIC 3218 if (p == NULL) 3219 panic("ohci_device_intr_close: ED not found"); 3220 #endif 3221 p->next = sed->next; 3222 p->ed.ed_nexted = sed->ed.ed_nexted; 3223 usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted), 3224 sizeof(p->ed.ed_nexted), 3225 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3226 splx(s); 3227 3228 for (j = 0; j < nslots; j++) 3229 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 3230 3231 ohci_free_std(sc, opipe->tail.td); 3232 ohci_free_sed(sc, opipe->sed); 3233 } 3234 3235 Static usbd_status 3236 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival) 3237 { 3238 int i, j, s, best; 3239 u_int npoll, slow, shigh, nslots; 3240 u_int bestbw, bw; 3241 ohci_soft_ed_t *hsed, *sed = opipe->sed; 3242 3243 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 3244 if (ival == 0) { 3245 printf("ohci_setintr: 0 interval\n"); 3246 return (USBD_INVAL); 3247 } 3248 3249 npoll = OHCI_NO_INTRS; 3250 while (npoll > ival) 3251 npoll /= 2; 3252 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 3253 3254 /* 3255 * We now know which level in the tree the ED must go into. 3256 * Figure out which slot has most bandwidth left over. 3257 * Slots to examine: 3258 * npoll 3259 * 1 0 3260 * 2 1 2 3261 * 4 3 4 5 6 3262 * 8 7 8 9 10 11 12 13 14 3263 * N (N-1) .. (N-1+N-1) 3264 */ 3265 slow = npoll-1; 3266 shigh = slow + npoll; 3267 nslots = OHCI_NO_INTRS / npoll; 3268 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 3269 bw = 0; 3270 for (j = 0; j < nslots; j++) 3271 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 3272 if (bw < bestbw) { 3273 best = i; 3274 bestbw = bw; 3275 } 3276 } 3277 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 3278 best, slow, shigh, bestbw)); 3279 3280 s = splusb(); 3281 hsed = sc->sc_eds[best]; 3282 sed->next = hsed->next; 3283 usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags), 3284 sizeof(hsed->ed.ed_flags), 3285 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3286 sed->ed.ed_nexted = hsed->ed.ed_nexted; 3287 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3288 sizeof(sed->ed.ed_flags), 3289 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3290 hsed->next = sed; 3291 hsed->ed.ed_nexted = HTOO32(sed->physaddr); 3292 usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags), 3293 sizeof(hsed->ed.ed_flags), 3294 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3295 splx(s); 3296 3297 for (j = 0; j < nslots; j++) 3298 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 3299 opipe->u.intr.nslots = nslots; 3300 opipe->u.intr.pos = best; 3301 3302 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 3303 return (USBD_NORMAL_COMPLETION); 3304 } 3305 3306 /***********************/ 3307 3308 usbd_status 3309 ohci_device_isoc_transfer(usbd_xfer_handle xfer) 3310 { 3311 usbd_status err; 3312 3313 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer)); 3314 3315 /* Put it on our queue, */ 3316 err = usb_insert_transfer(xfer); 3317 3318 /* bail out on error, */ 3319 if (err && err != USBD_IN_PROGRESS) 3320 return (err); 3321 3322 /* XXX should check inuse here */ 3323 3324 /* insert into schedule, */ 3325 ohci_device_isoc_enter(xfer); 3326 3327 /* and start if the pipe wasn't running */ 3328 if (!err) 3329 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 3330 3331 return (err); 3332 } 3333 3334 void 3335 ohci_device_isoc_enter(usbd_xfer_handle xfer) 3336 { 3337 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3338 usbd_device_handle dev = opipe->pipe.device; 3339 ohci_softc_t *sc = dev->bus->hci_private; 3340 ohci_soft_ed_t *sed = opipe->sed; 3341 struct iso *iso = &opipe->u.iso; 3342 ohci_soft_itd_t *sitd, *nsitd; 3343 ohci_physaddr_t buf, offs, noffs, bp0; 3344 int i, ncur, nframes; 3345 int s; 3346 3347 DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p " 3348 "nframes=%d\n", 3349 iso->inuse, iso->next, xfer, xfer->nframes)); 3350 3351 if (sc->sc_dying) 3352 return; 3353 3354 if (iso->next == -1) { 3355 /* Not in use yet, schedule it a few frames ahead. */ 3356 iso->next = O32TOH(sc->sc_hcca->hcca_frame_number) + 5; 3357 DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n", 3358 iso->next)); 3359 } 3360 3361 sitd = opipe->tail.itd; 3362 buf = DMAADDR(&xfer->dmabuf, 0); 3363 bp0 = OHCI_PAGE(buf); 3364 offs = OHCI_PAGE_OFFSET(buf); 3365 nframes = xfer->nframes; 3366 xfer->hcpriv = sitd; 3367 for (i = ncur = 0; i < nframes; i++, ncur++) { 3368 noffs = offs + xfer->frlengths[i]; 3369 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ 3370 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */ 3371 3372 /* Allocate next ITD */ 3373 nsitd = ohci_alloc_sitd(sc); 3374 if (nsitd == NULL) { 3375 /* XXX what now? */ 3376 printf("%s: isoc TD alloc failed\n", 3377 device_xname(sc->sc_dev)); 3378 return; 3379 } 3380 3381 /* Fill current ITD */ 3382 sitd->itd.itd_flags = HTOO32( 3383 OHCI_ITD_NOCC | 3384 OHCI_ITD_SET_SF(iso->next) | 3385 OHCI_ITD_SET_DI(6) | /* delay intr a little */ 3386 OHCI_ITD_SET_FC(ncur)); 3387 sitd->itd.itd_bp0 = HTOO32(bp0); 3388 sitd->nextitd = nsitd; 3389 sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr); 3390 sitd->itd.itd_be = HTOO32(bp0 + offs - 1); 3391 sitd->xfer = xfer; 3392 sitd->flags = 0; 3393 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 3394 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3395 3396 sitd = nsitd; 3397 iso->next = iso->next + ncur; 3398 bp0 = OHCI_PAGE(buf + offs); 3399 ncur = 0; 3400 } 3401 sitd->itd.itd_offset[ncur] = HTOO16(OHCI_ITD_MK_OFFS(offs)); 3402 offs = noffs; 3403 } 3404 nsitd = ohci_alloc_sitd(sc); 3405 if (nsitd == NULL) { 3406 /* XXX what now? */ 3407 printf("%s: isoc TD alloc failed\n", 3408 device_xname(sc->sc_dev)); 3409 return; 3410 } 3411 /* Fixup last used ITD */ 3412 sitd->itd.itd_flags = HTOO32( 3413 OHCI_ITD_NOCC | 3414 OHCI_ITD_SET_SF(iso->next) | 3415 OHCI_ITD_SET_DI(0) | 3416 OHCI_ITD_SET_FC(ncur)); 3417 sitd->itd.itd_bp0 = HTOO32(bp0); 3418 sitd->nextitd = nsitd; 3419 sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr); 3420 sitd->itd.itd_be = HTOO32(bp0 + offs - 1); 3421 sitd->xfer = xfer; 3422 sitd->flags = OHCI_CALL_DONE; 3423 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 3424 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3425 3426 iso->next = iso->next + ncur; 3427 iso->inuse += nframes; 3428 3429 xfer->actlen = offs; /* XXX pretend we did it all */ 3430 3431 xfer->status = USBD_IN_PROGRESS; 3432 3433 #ifdef OHCI_DEBUG 3434 if (ohcidebug > 5) { 3435 DPRINTF(("ohci_device_isoc_enter: frame=%d\n", 3436 O32TOH(sc->sc_hcca->hcca_frame_number))); 3437 ohci_dump_itds(sc, xfer->hcpriv); 3438 ohci_dump_ed(sc, sed); 3439 } 3440 #endif 3441 3442 s = splusb(); 3443 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3444 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3445 sed->ed.ed_tailp = HTOO32(nsitd->physaddr); 3446 opipe->tail.itd = nsitd; 3447 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3448 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3449 sizeof(sed->ed.ed_flags), 3450 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3451 splx(s); 3452 3453 #ifdef OHCI_DEBUG 3454 if (ohcidebug > 5) { 3455 delay(150000); 3456 DPRINTF(("ohci_device_isoc_enter: after frame=%d\n", 3457 O32TOH(sc->sc_hcca->hcca_frame_number))); 3458 ohci_dump_itds(sc, xfer->hcpriv); 3459 ohci_dump_ed(sc, sed); 3460 } 3461 #endif 3462 } 3463 3464 usbd_status 3465 ohci_device_isoc_start(usbd_xfer_handle xfer) 3466 { 3467 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3468 ohci_softc_t *sc = opipe->pipe.device->bus->hci_private; 3469 3470 DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer)); 3471 3472 if (sc->sc_dying) 3473 return (USBD_IOERROR); 3474 3475 #ifdef DIAGNOSTIC 3476 if (xfer->status != USBD_IN_PROGRESS) 3477 printf("ohci_device_isoc_start: not in progress %p\n", xfer); 3478 #endif 3479 3480 /* XXX anything to do? */ 3481 3482 return (USBD_IN_PROGRESS); 3483 } 3484 3485 void 3486 ohci_device_isoc_abort(usbd_xfer_handle xfer) 3487 { 3488 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3489 ohci_softc_t *sc = opipe->pipe.device->bus->hci_private; 3490 ohci_soft_ed_t *sed; 3491 ohci_soft_itd_t *sitd; 3492 int s; 3493 3494 s = splusb(); 3495 3496 DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer)); 3497 3498 /* Transfer is already done. */ 3499 if (xfer->status != USBD_NOT_STARTED && 3500 xfer->status != USBD_IN_PROGRESS) { 3501 splx(s); 3502 printf("ohci_device_isoc_abort: early return\n"); 3503 return; 3504 } 3505 3506 /* Give xfer the requested abort code. */ 3507 xfer->status = USBD_CANCELLED; 3508 3509 sed = opipe->sed; 3510 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3511 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3512 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */ 3513 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3514 sizeof(sed->ed.ed_flags), 3515 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3516 3517 sitd = xfer->hcpriv; 3518 #ifdef DIAGNOSTIC 3519 if (sitd == NULL) { 3520 splx(s); 3521 printf("ohci_device_isoc_abort: hcpriv==0\n"); 3522 return; 3523 } 3524 #endif 3525 for (; sitd->xfer == xfer; sitd = sitd->nextitd) { 3526 #ifdef DIAGNOSTIC 3527 DPRINTFN(1,("abort sets done sitd=%p\n", sitd)); 3528 sitd->isdone = 1; 3529 #endif 3530 } 3531 3532 splx(s); 3533 3534 usb_delay_ms(&sc->sc_bus, OHCI_ITD_NOFFSET); 3535 3536 s = splusb(); 3537 3538 /* Run callback. */ 3539 usb_transfer_complete(xfer); 3540 3541 sed->ed.ed_headp = HTOO32(sitd->physaddr); /* unlink TDs */ 3542 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */ 3543 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3544 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3545 3546 splx(s); 3547 } 3548 3549 void 3550 ohci_device_isoc_done(usbd_xfer_handle xfer) 3551 { 3552 DPRINTFN(1,("ohci_device_isoc_done: xfer=%p\n", xfer)); 3553 } 3554 3555 usbd_status 3556 ohci_setup_isoc(usbd_pipe_handle pipe) 3557 { 3558 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3559 ohci_softc_t *sc = pipe->device->bus->hci_private; 3560 struct iso *iso = &opipe->u.iso; 3561 int s; 3562 3563 iso->next = -1; 3564 iso->inuse = 0; 3565 3566 s = splusb(); 3567 ohci_add_ed(sc, opipe->sed, sc->sc_isoc_head); 3568 splx(s); 3569 3570 return (USBD_NORMAL_COMPLETION); 3571 } 3572 3573 void 3574 ohci_device_isoc_close(usbd_pipe_handle pipe) 3575 { 3576 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3577 ohci_softc_t *sc = pipe->device->bus->hci_private; 3578 3579 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe)); 3580 ohci_close_pipe(pipe, sc->sc_isoc_head); 3581 #ifdef DIAGNOSTIC 3582 opipe->tail.itd->isdone = 1; 3583 #endif 3584 ohci_free_sitd(sc, opipe->tail.itd); 3585 } 3586
Indexes created Fri Sep 26 08:10:20 GMT 2025