ohci.c revision 1.197
1 /* $NetBSD: ohci.c,v 1.197 2008/12/16 22:35:36 christos Exp $ */ 2 /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */ 3 4 /* 5 * Copyright (c) 1998, 2004, 2005 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Lennart Augustsson (lennart (at) augustsson.net) at 10 * Carlstedt Research & Technology. 11 * This code is derived from software contributed to The NetBSD Foundation 12 * by Charles M. Hannum. 13 * 14 * Redistribution and use in source and binary forms, with or without 15 * modification, are permitted provided that the following conditions 16 * are met: 17 * 1. Redistributions of source code must retain the above copyright 18 * notice, this list of conditions and the following disclaimer. 19 * 2. Redistributions in binary form must reproduce the above copyright 20 * notice, this list of conditions and the following disclaimer in the 21 * documentation and/or other materials provided with the distribution. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 24 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 25 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 26 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 27 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 31 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 32 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 33 * POSSIBILITY OF SUCH DAMAGE. 34 */ 35 36 /* 37 * USB Open Host Controller driver. 38 * 39 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html 40 * USB spec: http://www.usb.org/developers/docs/usbspec.zip 41 */ 42 43 #include <sys/cdefs.h> 44 __KERNEL_RCSID(0, "$NetBSD: ohci.c,v 1.197 2008/12/16 22:35:36 christos Exp $"); 45 46 #include <sys/param.h> 47 #include <sys/systm.h> 48 #include <sys/malloc.h> 49 #if defined(__NetBSD__) || defined(__OpenBSD__) 50 #include <sys/kernel.h> 51 #include <sys/device.h> 52 #include <sys/select.h> 53 #include <uvm/uvm_extern.h> 54 #elif defined(__FreeBSD__) 55 #include <sys/module.h> 56 #include <sys/bus.h> 57 #include <machine/bus_pio.h> 58 #include <machine/bus_memio.h> 59 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 60 #include <sys/cpu.h> 61 #endif 62 #endif 63 #include <sys/proc.h> 64 #include <sys/queue.h> 65 66 #include <sys/bus.h> 67 #include <machine/endian.h> 68 69 #include <dev/usb/usb.h> 70 #include <dev/usb/usbdi.h> 71 #include <dev/usb/usbdivar.h> 72 #include <dev/usb/usb_mem.h> 73 #include <dev/usb/usb_quirks.h> 74 75 #include <dev/usb/ohcireg.h> 76 #include <dev/usb/ohcivar.h> 77 #include <dev/usb/usbroothub_subr.h> 78 79 #if defined(__FreeBSD__) 80 #include <machine/clock.h> 81 82 #define delay(d) DELAY(d) 83 #endif 84 85 #if defined(__OpenBSD__) 86 struct cfdriver ohci_cd = { 87 NULL, "ohci", DV_DULL 88 }; 89 #endif 90 91 #ifdef OHCI_DEBUG 92 #define DPRINTF(x) if (ohcidebug) logprintf x 93 #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x 94 int ohcidebug = 0; 95 #ifndef __NetBSD__ 96 #define snprintb((q), (f), "%b", q,f,b,l) snprintf((b), (l)) 97 #endif 98 #else 99 #define DPRINTF(x) 100 #define DPRINTFN(n,x) 101 #endif 102 103 #if BYTE_ORDER == BIG_ENDIAN 104 #define SWAP_ENDIAN OHCI_LITTLE_ENDIAN 105 #else 106 #define SWAP_ENDIAN OHCI_BIG_ENDIAN 107 #endif 108 109 #define O16TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap16(val) : val) 110 #define O32TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap32(val) : val) 111 #define HTOO16(val) O16TOH(val) 112 #define HTOO32(val) O32TOH(val) 113 114 struct ohci_pipe; 115 116 Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *); 117 Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *); 118 119 Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *); 120 Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *); 121 122 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *); 123 Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *); 124 125 #if 0 126 Static void ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *, 127 ohci_soft_td_t *); 128 #endif 129 Static usbd_status ohci_alloc_std_chain(struct ohci_pipe *, 130 ohci_softc_t *, int, int, usbd_xfer_handle, 131 ohci_soft_td_t *, ohci_soft_td_t **); 132 133 Static usbd_status ohci_open(usbd_pipe_handle); 134 Static void ohci_poll(struct usbd_bus *); 135 Static void ohci_softintr(void *); 136 Static void ohci_waitintr(ohci_softc_t *, usbd_xfer_handle); 137 Static void ohci_rhsc(ohci_softc_t *, usbd_xfer_handle); 138 139 Static usbd_status ohci_device_request(usbd_xfer_handle xfer); 140 Static void ohci_add_ed(ohci_softc_t *, ohci_soft_ed_t *, 141 ohci_soft_ed_t *); 142 143 Static void ohci_rem_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 144 Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *); 145 Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *); 146 Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t); 147 Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *); 148 Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *); 149 Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t); 150 151 Static usbd_status ohci_setup_isoc(usbd_pipe_handle pipe); 152 Static void ohci_device_isoc_enter(usbd_xfer_handle); 153 154 Static usbd_status ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 155 Static void ohci_freem(struct usbd_bus *, usb_dma_t *); 156 157 Static usbd_xfer_handle ohci_allocx(struct usbd_bus *); 158 Static void ohci_freex(struct usbd_bus *, usbd_xfer_handle); 159 160 Static usbd_status ohci_root_ctrl_transfer(usbd_xfer_handle); 161 Static usbd_status ohci_root_ctrl_start(usbd_xfer_handle); 162 Static void ohci_root_ctrl_abort(usbd_xfer_handle); 163 Static void ohci_root_ctrl_close(usbd_pipe_handle); 164 Static void ohci_root_ctrl_done(usbd_xfer_handle); 165 166 Static usbd_status ohci_root_intr_transfer(usbd_xfer_handle); 167 Static usbd_status ohci_root_intr_start(usbd_xfer_handle); 168 Static void ohci_root_intr_abort(usbd_xfer_handle); 169 Static void ohci_root_intr_close(usbd_pipe_handle); 170 Static void ohci_root_intr_done(usbd_xfer_handle); 171 172 Static usbd_status ohci_device_ctrl_transfer(usbd_xfer_handle); 173 Static usbd_status ohci_device_ctrl_start(usbd_xfer_handle); 174 Static void ohci_device_ctrl_abort(usbd_xfer_handle); 175 Static void ohci_device_ctrl_close(usbd_pipe_handle); 176 Static void ohci_device_ctrl_done(usbd_xfer_handle); 177 178 Static usbd_status ohci_device_bulk_transfer(usbd_xfer_handle); 179 Static usbd_status ohci_device_bulk_start(usbd_xfer_handle); 180 Static void ohci_device_bulk_abort(usbd_xfer_handle); 181 Static void ohci_device_bulk_close(usbd_pipe_handle); 182 Static void ohci_device_bulk_done(usbd_xfer_handle); 183 184 Static usbd_status ohci_device_intr_transfer(usbd_xfer_handle); 185 Static usbd_status ohci_device_intr_start(usbd_xfer_handle); 186 Static void ohci_device_intr_abort(usbd_xfer_handle); 187 Static void ohci_device_intr_close(usbd_pipe_handle); 188 Static void ohci_device_intr_done(usbd_xfer_handle); 189 190 Static usbd_status ohci_device_isoc_transfer(usbd_xfer_handle); 191 Static usbd_status ohci_device_isoc_start(usbd_xfer_handle); 192 Static void ohci_device_isoc_abort(usbd_xfer_handle); 193 Static void ohci_device_isoc_close(usbd_pipe_handle); 194 Static void ohci_device_isoc_done(usbd_xfer_handle); 195 196 Static usbd_status ohci_device_setintr(ohci_softc_t *sc, 197 struct ohci_pipe *pipe, int ival); 198 199 Static void ohci_timeout(void *); 200 Static void ohci_timeout_task(void *); 201 Static void ohci_rhsc_enable(void *); 202 203 Static void ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *); 204 Static void ohci_abort_xfer(usbd_xfer_handle, usbd_status); 205 206 Static void ohci_device_clear_toggle(usbd_pipe_handle pipe); 207 Static void ohci_noop(usbd_pipe_handle pipe); 208 209 #ifdef OHCI_DEBUG 210 Static void ohci_dumpregs(ohci_softc_t *); 211 Static void ohci_dump_tds(ohci_softc_t *, ohci_soft_td_t *); 212 Static void ohci_dump_td(ohci_softc_t *, ohci_soft_td_t *); 213 Static void ohci_dump_ed(ohci_softc_t *, ohci_soft_ed_t *); 214 Static void ohci_dump_itd(ohci_softc_t *, ohci_soft_itd_t *); 215 Static void ohci_dump_itds(ohci_softc_t *, ohci_soft_itd_t *); 216 #endif 217 218 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 219 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 220 #define OWRITE1(sc, r, x) \ 221 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 222 #define OWRITE2(sc, r, x) \ 223 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 224 #define OWRITE4(sc, r, x) \ 225 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 226 static __inline uint8_t 227 OREAD1(ohci_softc_t *sc, bus_size_t r) 228 { 229 230 OBARR(sc); 231 return bus_space_read_1(sc->iot, sc->ioh, r); 232 } 233 234 static __inline uint16_t 235 OREAD2(ohci_softc_t *sc, bus_size_t r) 236 { 237 238 OBARR(sc); 239 return bus_space_read_2(sc->iot, sc->ioh, r); 240 } 241 242 static __inline uint32_t 243 OREAD4(ohci_softc_t *sc, bus_size_t r) 244 { 245 246 OBARR(sc); 247 return bus_space_read_4(sc->iot, sc->ioh, r); 248 } 249 250 /* Reverse the bits in a value 0 .. 31 */ 251 Static u_int8_t revbits[OHCI_NO_INTRS] = 252 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 253 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 254 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 255 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 256 257 struct ohci_pipe { 258 struct usbd_pipe pipe; 259 ohci_soft_ed_t *sed; 260 union { 261 ohci_soft_td_t *td; 262 ohci_soft_itd_t *itd; 263 } tail; 264 /* Info needed for different pipe kinds. */ 265 union { 266 /* Control pipe */ 267 struct { 268 usb_dma_t reqdma; 269 u_int length; 270 ohci_soft_td_t *setup, *data, *stat; 271 } ctl; 272 /* Interrupt pipe */ 273 struct { 274 int nslots; 275 int pos; 276 } intr; 277 /* Bulk pipe */ 278 struct { 279 u_int length; 280 int isread; 281 } bulk; 282 /* Iso pipe */ 283 struct iso { 284 int next, inuse; 285 } iso; 286 } u; 287 }; 288 289 #define OHCI_INTR_ENDPT 1 290 291 Static const struct usbd_bus_methods ohci_bus_methods = { 292 ohci_open, 293 ohci_softintr, 294 ohci_poll, 295 ohci_allocm, 296 ohci_freem, 297 ohci_allocx, 298 ohci_freex, 299 }; 300 301 Static const struct usbd_pipe_methods ohci_root_ctrl_methods = { 302 ohci_root_ctrl_transfer, 303 ohci_root_ctrl_start, 304 ohci_root_ctrl_abort, 305 ohci_root_ctrl_close, 306 ohci_noop, 307 ohci_root_ctrl_done, 308 }; 309 310 Static const struct usbd_pipe_methods ohci_root_intr_methods = { 311 ohci_root_intr_transfer, 312 ohci_root_intr_start, 313 ohci_root_intr_abort, 314 ohci_root_intr_close, 315 ohci_noop, 316 ohci_root_intr_done, 317 }; 318 319 Static const struct usbd_pipe_methods ohci_device_ctrl_methods = { 320 ohci_device_ctrl_transfer, 321 ohci_device_ctrl_start, 322 ohci_device_ctrl_abort, 323 ohci_device_ctrl_close, 324 ohci_noop, 325 ohci_device_ctrl_done, 326 }; 327 328 Static const struct usbd_pipe_methods ohci_device_intr_methods = { 329 ohci_device_intr_transfer, 330 ohci_device_intr_start, 331 ohci_device_intr_abort, 332 ohci_device_intr_close, 333 ohci_device_clear_toggle, 334 ohci_device_intr_done, 335 }; 336 337 Static const struct usbd_pipe_methods ohci_device_bulk_methods = { 338 ohci_device_bulk_transfer, 339 ohci_device_bulk_start, 340 ohci_device_bulk_abort, 341 ohci_device_bulk_close, 342 ohci_device_clear_toggle, 343 ohci_device_bulk_done, 344 }; 345 346 Static const struct usbd_pipe_methods ohci_device_isoc_methods = { 347 ohci_device_isoc_transfer, 348 ohci_device_isoc_start, 349 ohci_device_isoc_abort, 350 ohci_device_isoc_close, 351 ohci_noop, 352 ohci_device_isoc_done, 353 }; 354 355 #if defined(__NetBSD__) || defined(__OpenBSD__) 356 int 357 ohci_activate(device_t self, enum devact act) 358 { 359 struct ohci_softc *sc = device_private(self); 360 int rv = 0; 361 362 switch (act) { 363 case DVACT_ACTIVATE: 364 return (EOPNOTSUPP); 365 366 case DVACT_DEACTIVATE: 367 sc->sc_dying = 1; 368 if (sc->sc_child != NULL) 369 rv = config_deactivate(sc->sc_child); 370 break; 371 } 372 return (rv); 373 } 374 375 void 376 ohci_childdet(device_t self, device_t child) 377 { 378 struct ohci_softc *sc = device_private(self); 379 380 KASSERT(sc->sc_child == child); 381 sc->sc_child = NULL; 382 } 383 384 int 385 ohci_detach(struct ohci_softc *sc, int flags) 386 { 387 int rv = 0; 388 usbd_xfer_handle xfer; 389 390 if (sc->sc_child != NULL) 391 rv = config_detach(sc->sc_child, flags); 392 393 if (rv != 0) 394 return (rv); 395 396 usb_uncallout(sc->sc_tmo_rhsc, ohci_rhsc_enable, sc); 397 398 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 399 400 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 401 while((xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers)) != NULL) { 402 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 403 free(xfer, M_USB); 404 } 405 406 return (rv); 407 } 408 #endif 409 410 ohci_soft_ed_t * 411 ohci_alloc_sed(ohci_softc_t *sc) 412 { 413 ohci_soft_ed_t *sed; 414 usbd_status err; 415 int i, offs; 416 usb_dma_t dma; 417 418 if (sc->sc_freeeds == NULL) { 419 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 420 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 421 OHCI_ED_ALIGN, &dma); 422 if (err) 423 return (0); 424 for(i = 0; i < OHCI_SED_CHUNK; i++) { 425 offs = i * OHCI_SED_SIZE; 426 sed = KERNADDR(&dma, offs); 427 sed->physaddr = DMAADDR(&dma, offs); 428 sed->dma = dma; 429 sed->offs = offs; 430 sed->next = sc->sc_freeeds; 431 sc->sc_freeeds = sed; 432 } 433 } 434 sed = sc->sc_freeeds; 435 sc->sc_freeeds = sed->next; 436 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 437 sed->next = 0; 438 return (sed); 439 } 440 441 void 442 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 443 { 444 sed->next = sc->sc_freeeds; 445 sc->sc_freeeds = sed; 446 } 447 448 ohci_soft_td_t * 449 ohci_alloc_std(ohci_softc_t *sc) 450 { 451 ohci_soft_td_t *std; 452 usbd_status err; 453 int i, offs; 454 usb_dma_t dma; 455 int s; 456 457 if (sc->sc_freetds == NULL) { 458 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 459 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 460 OHCI_TD_ALIGN, &dma); 461 if (err) 462 return (NULL); 463 s = splusb(); 464 for(i = 0; i < OHCI_STD_CHUNK; i++) { 465 offs = i * OHCI_STD_SIZE; 466 std = KERNADDR(&dma, offs); 467 std->physaddr = DMAADDR(&dma, offs); 468 std->dma = dma; 469 std->offs = offs; 470 std->nexttd = sc->sc_freetds; 471 sc->sc_freetds = std; 472 } 473 splx(s); 474 } 475 476 s = splusb(); 477 std = sc->sc_freetds; 478 sc->sc_freetds = std->nexttd; 479 memset(&std->td, 0, sizeof(ohci_td_t)); 480 std->nexttd = NULL; 481 std->xfer = NULL; 482 ohci_hash_add_td(sc, std); 483 splx(s); 484 485 return (std); 486 } 487 488 void 489 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std) 490 { 491 int s; 492 493 s = splusb(); 494 ohci_hash_rem_td(sc, std); 495 std->nexttd = sc->sc_freetds; 496 sc->sc_freetds = std; 497 splx(s); 498 } 499 500 usbd_status 501 ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc, 502 int alen, int rd, usbd_xfer_handle xfer, 503 ohci_soft_td_t *sp, ohci_soft_td_t **ep) 504 { 505 ohci_soft_td_t *next, *cur; 506 ohci_physaddr_t dataphys, dataphysend; 507 u_int32_t tdflags; 508 int len, curlen; 509 usb_dma_t *dma = &xfer->dmabuf; 510 u_int16_t flags = xfer->flags; 511 512 DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen)); 513 514 len = alen; 515 cur = sp; 516 dataphys = DMAADDR(dma, 0); 517 dataphysend = OHCI_PAGE(dataphys + len - 1); 518 usb_syncmem(dma, 0, len, 519 rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 520 tdflags = HTOO32( 521 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 522 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) | 523 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR); 524 525 for (;;) { 526 next = ohci_alloc_std(sc); 527 if (next == NULL) 528 goto nomem; 529 530 /* The OHCI hardware can handle at most one page crossing. */ 531 if (OHCI_PAGE(dataphys) == dataphysend || 532 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) { 533 /* we can handle it in this TD */ 534 curlen = len; 535 } else { 536 /* must use multiple TDs, fill as much as possible. */ 537 curlen = 2 * OHCI_PAGE_SIZE - 538 (dataphys & (OHCI_PAGE_SIZE-1)); 539 /* the length must be a multiple of the max size */ 540 curlen -= curlen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize); 541 #ifdef DIAGNOSTIC 542 if (curlen == 0) 543 panic("ohci_alloc_std: curlen == 0"); 544 #endif 545 } 546 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x " 547 "dataphysend=0x%08x len=%d curlen=%d\n", 548 dataphys, dataphysend, 549 len, curlen)); 550 len -= curlen; 551 552 cur->td.td_flags = tdflags; 553 cur->td.td_cbp = HTOO32(dataphys); 554 cur->nexttd = next; 555 cur->td.td_nexttd = HTOO32(next->physaddr); 556 cur->td.td_be = HTOO32(dataphys + curlen - 1); 557 cur->len = curlen; 558 cur->flags = OHCI_ADD_LEN; 559 cur->xfer = xfer; 560 usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td), 561 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 562 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n", 563 dataphys, dataphys + curlen - 1)); 564 if (len == 0) 565 break; 566 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n")); 567 dataphys += curlen; 568 cur = next; 569 } 570 if (!rd && (flags & USBD_FORCE_SHORT_XFER) && 571 alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) { 572 /* Force a 0 length transfer at the end. */ 573 574 cur = next; 575 next = ohci_alloc_std(sc); 576 if (next == NULL) 577 goto nomem; 578 579 cur->td.td_flags = tdflags; 580 cur->td.td_cbp = 0; /* indicate 0 length packet */ 581 cur->nexttd = next; 582 cur->td.td_nexttd = HTOO32(next->physaddr); 583 cur->td.td_be = ~0; 584 cur->len = 0; 585 cur->flags = 0; 586 cur->xfer = xfer; 587 usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td), 588 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 589 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n")); 590 } 591 *ep = cur; 592 593 return (USBD_NORMAL_COMPLETION); 594 595 nomem: 596 /* XXX free chain */ 597 return (USBD_NOMEM); 598 } 599 600 #if 0 601 Static void 602 ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std, 603 ohci_soft_td_t *stdend) 604 { 605 ohci_soft_td_t *p; 606 607 for (; std != stdend; std = p) { 608 p = std->nexttd; 609 ohci_free_std(sc, std); 610 } 611 } 612 #endif 613 614 ohci_soft_itd_t * 615 ohci_alloc_sitd(ohci_softc_t *sc) 616 { 617 ohci_soft_itd_t *sitd; 618 usbd_status err; 619 int i, s, offs; 620 usb_dma_t dma; 621 622 if (sc->sc_freeitds == NULL) { 623 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n")); 624 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK, 625 OHCI_ITD_ALIGN, &dma); 626 if (err) 627 return (NULL); 628 s = splusb(); 629 for(i = 0; i < OHCI_SITD_CHUNK; i++) { 630 offs = i * OHCI_SITD_SIZE; 631 sitd = KERNADDR(&dma, offs); 632 sitd->physaddr = DMAADDR(&dma, offs); 633 sitd->dma = dma; 634 sitd->offs = offs; 635 sitd->nextitd = sc->sc_freeitds; 636 sc->sc_freeitds = sitd; 637 } 638 splx(s); 639 } 640 641 s = splusb(); 642 sitd = sc->sc_freeitds; 643 sc->sc_freeitds = sitd->nextitd; 644 memset(&sitd->itd, 0, sizeof(ohci_itd_t)); 645 sitd->nextitd = NULL; 646 sitd->xfer = NULL; 647 ohci_hash_add_itd(sc, sitd); 648 splx(s); 649 650 #ifdef DIAGNOSTIC 651 sitd->isdone = 0; 652 #endif 653 654 return (sitd); 655 } 656 657 void 658 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 659 { 660 int s; 661 662 DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd)); 663 664 #ifdef DIAGNOSTIC 665 if (!sitd->isdone) { 666 panic("ohci_free_sitd: sitd=%p not done", sitd); 667 return; 668 } 669 /* Warn double free */ 670 sitd->isdone = 0; 671 #endif 672 673 s = splusb(); 674 ohci_hash_rem_itd(sc, sitd); 675 sitd->nextitd = sc->sc_freeitds; 676 sc->sc_freeitds = sitd; 677 splx(s); 678 } 679 680 usbd_status 681 ohci_init(ohci_softc_t *sc) 682 { 683 ohci_soft_ed_t *sed, *psed; 684 usbd_status err; 685 int i; 686 u_int32_t s, ctl, rwc, ival, hcr, fm, per, rev, desca, descb; 687 688 DPRINTF(("ohci_init: start\n")); 689 #if defined(__OpenBSD__) 690 printf(","); 691 #else 692 printf("%s:", device_xname(sc->sc_dev)); 693 #endif 694 rev = OREAD4(sc, OHCI_REVISION); 695 printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev), 696 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 697 698 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 699 printf("%s: unsupported OHCI revision\n", 700 device_xname(sc->sc_dev)); 701 sc->sc_bus.usbrev = USBREV_UNKNOWN; 702 return (USBD_INVAL); 703 } 704 sc->sc_bus.usbrev = USBREV_1_0; 705 706 for (i = 0; i < OHCI_HASH_SIZE; i++) 707 LIST_INIT(&sc->sc_hash_tds[i]); 708 for (i = 0; i < OHCI_HASH_SIZE; i++) 709 LIST_INIT(&sc->sc_hash_itds[i]); 710 711 SIMPLEQ_INIT(&sc->sc_free_xfers); 712 713 #ifdef __NetBSD__ 714 usb_setup_reserve(sc->sc_dev, &sc->sc_dma_reserve, sc->sc_bus.dmatag, 715 USB_MEM_RESERVE); 716 #endif 717 718 /* XXX determine alignment by R/W */ 719 /* Allocate the HCCA area. */ 720 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 721 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 722 if (err) 723 return (err); 724 sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0); 725 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 726 727 sc->sc_eintrs = OHCI_NORMAL_INTRS; 728 729 /* Allocate dummy ED that starts the control list. */ 730 sc->sc_ctrl_head = ohci_alloc_sed(sc); 731 if (sc->sc_ctrl_head == NULL) { 732 err = USBD_NOMEM; 733 goto bad1; 734 } 735 sc->sc_ctrl_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 736 737 /* Allocate dummy ED that starts the bulk list. */ 738 sc->sc_bulk_head = ohci_alloc_sed(sc); 739 if (sc->sc_bulk_head == NULL) { 740 err = USBD_NOMEM; 741 goto bad2; 742 } 743 sc->sc_bulk_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 744 usb_syncmem(&sc->sc_bulk_head->dma, sc->sc_bulk_head->offs, 745 sizeof(sc->sc_bulk_head->ed), 746 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 747 748 /* Allocate dummy ED that starts the isochronous list. */ 749 sc->sc_isoc_head = ohci_alloc_sed(sc); 750 if (sc->sc_isoc_head == NULL) { 751 err = USBD_NOMEM; 752 goto bad3; 753 } 754 sc->sc_isoc_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 755 usb_syncmem(&sc->sc_isoc_head->dma, sc->sc_isoc_head->offs, 756 sizeof(sc->sc_isoc_head->ed), 757 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 758 759 /* Allocate all the dummy EDs that make up the interrupt tree. */ 760 for (i = 0; i < OHCI_NO_EDS; i++) { 761 sed = ohci_alloc_sed(sc); 762 if (sed == NULL) { 763 while (--i >= 0) 764 ohci_free_sed(sc, sc->sc_eds[i]); 765 err = USBD_NOMEM; 766 goto bad4; 767 } 768 /* All ED fields are set to 0. */ 769 sc->sc_eds[i] = sed; 770 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 771 if (i != 0) 772 psed = sc->sc_eds[(i-1) / 2]; 773 else 774 psed= sc->sc_isoc_head; 775 sed->next = psed; 776 sed->ed.ed_nexted = HTOO32(psed->physaddr); 777 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 778 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 779 } 780 /* 781 * Fill HCCA interrupt table. The bit reversal is to get 782 * the tree set up properly to spread the interrupts. 783 */ 784 for (i = 0; i < OHCI_NO_INTRS; i++) 785 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 786 HTOO32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 787 usb_syncmem(&sc->sc_hccadma, 0, OHCI_HCCA_SIZE, 788 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 789 790 #ifdef OHCI_DEBUG 791 if (ohcidebug > 15) { 792 for (i = 0; i < OHCI_NO_EDS; i++) { 793 printf("ed#%d ", i); 794 ohci_dump_ed(sc, sc->sc_eds[i]); 795 } 796 printf("iso "); 797 ohci_dump_ed(sc, sc->sc_isoc_head); 798 } 799 #endif 800 801 /* Preserve values programmed by SMM/BIOS but lost over reset. */ 802 ctl = OREAD4(sc, OHCI_CONTROL); 803 rwc = ctl & OHCI_RWC; 804 fm = OREAD4(sc, OHCI_FM_INTERVAL); 805 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 806 descb = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 807 808 /* Determine in what context we are running. */ 809 if (ctl & OHCI_IR) { 810 /* SMM active, request change */ 811 DPRINTF(("ohci_init: SMM active, request owner change\n")); 812 if ((sc->sc_intre & (OHCI_OC | OHCI_MIE)) == 813 (OHCI_OC | OHCI_MIE)) 814 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_MIE); 815 s = OREAD4(sc, OHCI_COMMAND_STATUS); 816 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 817 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 818 usb_delay_ms(&sc->sc_bus, 1); 819 ctl = OREAD4(sc, OHCI_CONTROL); 820 } 821 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_MIE); 822 if ((ctl & OHCI_IR) == 0) { 823 printf("%s: SMM does not respond, resetting\n", 824 device_xname(sc->sc_dev)); 825 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 826 goto reset; 827 } 828 #if 0 829 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */ 830 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 831 /* BIOS started controller. */ 832 DPRINTF(("ohci_init: BIOS active\n")); 833 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 834 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL | rwc); 835 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 836 } 837 #endif 838 } else { 839 DPRINTF(("ohci_init: cold started\n")); 840 reset: 841 /* Controller was cold started. */ 842 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 843 } 844 845 /* 846 * This reset should not be necessary according to the OHCI spec, but 847 * without it some controllers do not start. 848 */ 849 DPRINTF(("%s: resetting\n", device_xname(sc->sc_dev))); 850 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 851 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 852 853 /* We now own the host controller and the bus has been reset. */ 854 855 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 856 /* Nominal time for a reset is 10 us. */ 857 for (i = 0; i < 10; i++) { 858 delay(10); 859 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 860 if (!hcr) 861 break; 862 } 863 if (hcr) { 864 printf("%s: reset timeout\n", device_xname(sc->sc_dev)); 865 err = USBD_IOERROR; 866 goto bad5; 867 } 868 #ifdef OHCI_DEBUG 869 if (ohcidebug > 15) 870 ohci_dumpregs(sc); 871 #endif 872 873 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 874 875 /* Set up HC registers. */ 876 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 877 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 878 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 879 /* disable all interrupts and then switch on all desired interrupts */ 880 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 881 /* switch on desired functional features */ 882 ctl = OREAD4(sc, OHCI_CONTROL); 883 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 884 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 885 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL | rwc; 886 /* And finally start it! */ 887 OWRITE4(sc, OHCI_CONTROL, ctl); 888 889 /* 890 * The controller is now OPERATIONAL. Set a some final 891 * registers that should be set earlier, but that the 892 * controller ignores when in the SUSPEND state. 893 */ 894 ival = OHCI_GET_IVAL(fm); 895 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 896 fm |= OHCI_FSMPS(ival) | ival; 897 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 898 per = OHCI_PERIODIC(ival); /* 90% periodic */ 899 OWRITE4(sc, OHCI_PERIODIC_START, per); 900 901 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */ 902 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP); 903 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 904 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY); 905 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca); 906 907 /* 908 * The AMD756 requires a delay before re-reading the register, 909 * otherwise it will occasionally report 0 ports. 910 */ 911 sc->sc_noport = 0; 912 for (i = 0; i < 10 && sc->sc_noport == 0; i++) { 913 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY); 914 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 915 } 916 917 #ifdef OHCI_DEBUG 918 if (ohcidebug > 5) 919 ohci_dumpregs(sc); 920 #endif 921 922 /* Set up the bus struct. */ 923 sc->sc_bus.methods = &ohci_bus_methods; 924 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 925 926 #if defined(__NetBSD__) || defined(__OpenBSD__) 927 sc->sc_control = sc->sc_intre = 0; 928 #endif 929 930 usb_callout_init(sc->sc_tmo_rhsc); 931 932 /* Finally, turn on interrupts. */ 933 DPRINTFN(1,("ohci_init: enabling\n")); 934 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 935 936 return (USBD_NORMAL_COMPLETION); 937 938 bad5: 939 for (i = 0; i < OHCI_NO_EDS; i++) 940 ohci_free_sed(sc, sc->sc_eds[i]); 941 bad4: 942 ohci_free_sed(sc, sc->sc_isoc_head); 943 bad3: 944 ohci_free_sed(sc, sc->sc_bulk_head); 945 bad2: 946 ohci_free_sed(sc, sc->sc_ctrl_head); 947 bad1: 948 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 949 return (err); 950 } 951 952 usbd_status 953 ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 954 { 955 #if defined(__NetBSD__) || defined(__OpenBSD__) 956 struct ohci_softc *sc = bus->hci_private; 957 #endif 958 usbd_status status; 959 960 status = usb_allocmem(&sc->sc_bus, size, 0, dma); 961 #ifdef __NetBSD__ 962 if (status == USBD_NOMEM) 963 status = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size); 964 #endif 965 return status; 966 } 967 968 void 969 ohci_freem(struct usbd_bus *bus, usb_dma_t *dma) 970 { 971 #if defined(__NetBSD__) || defined(__OpenBSD__) 972 struct ohci_softc *sc = bus->hci_private; 973 #endif 974 #ifdef __NetBSD__ 975 if (dma->block->flags & USB_DMA_RESERVE) { 976 usb_reserve_freem(&sc->sc_dma_reserve, dma); 977 return; 978 } 979 #endif 980 usb_freemem(&sc->sc_bus, dma); 981 } 982 983 usbd_xfer_handle 984 ohci_allocx(struct usbd_bus *bus) 985 { 986 struct ohci_softc *sc = bus->hci_private; 987 usbd_xfer_handle xfer; 988 989 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 990 if (xfer != NULL) { 991 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 992 #ifdef DIAGNOSTIC 993 if (xfer->busy_free != XFER_FREE) { 994 printf("ohci_allocx: xfer=%p not free, 0x%08x\n", xfer, 995 xfer->busy_free); 996 } 997 #endif 998 } else { 999 xfer = malloc(sizeof(struct ohci_xfer), M_USB, M_NOWAIT); 1000 } 1001 if (xfer != NULL) { 1002 memset(xfer, 0, sizeof (struct ohci_xfer)); 1003 #ifdef DIAGNOSTIC 1004 xfer->busy_free = XFER_BUSY; 1005 #endif 1006 } 1007 return (xfer); 1008 } 1009 1010 void 1011 ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 1012 { 1013 struct ohci_softc *sc = bus->hci_private; 1014 1015 #ifdef DIAGNOSTIC 1016 if (xfer->busy_free != XFER_BUSY) { 1017 printf("ohci_freex: xfer=%p not busy, 0x%08x\n", xfer, 1018 xfer->busy_free); 1019 } 1020 xfer->busy_free = XFER_FREE; 1021 #endif 1022 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 1023 } 1024 1025 /* 1026 * Shut down the controller when the system is going down. 1027 */ 1028 bool 1029 ohci_shutdown(device_t self, int flags) 1030 { 1031 ohci_softc_t *sc = device_private(self); 1032 1033 DPRINTF(("ohci_shutdown: stopping the HC\n")); 1034 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1035 return true; 1036 } 1037 1038 bool 1039 ohci_resume(device_t dv PMF_FN_ARGS) 1040 { 1041 ohci_softc_t *sc = device_private(dv); 1042 uint32_t ctl; 1043 int s; 1044 1045 s = splhardusb(); 1046 sc->sc_bus.use_polling++; 1047 /* Some broken BIOSes do not recover these values */ 1048 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 1049 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, 1050 sc->sc_ctrl_head->physaddr); 1051 OWRITE4(sc, OHCI_BULK_HEAD_ED, 1052 sc->sc_bulk_head->physaddr); 1053 if (sc->sc_intre) 1054 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_intre & 1055 (OHCI_ALL_INTRS | OHCI_MIE)); 1056 if (sc->sc_control) 1057 ctl = sc->sc_control; 1058 else 1059 ctl = OREAD4(sc, OHCI_CONTROL); 1060 ctl |= OHCI_HCFS_RESUME; 1061 OWRITE4(sc, OHCI_CONTROL, ctl); 1062 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 1063 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL; 1064 OWRITE4(sc, OHCI_CONTROL, ctl); 1065 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 1066 sc->sc_control = sc->sc_intre = 0; 1067 sc->sc_bus.use_polling--; 1068 splx(s); 1069 1070 return true; 1071 } 1072 1073 bool 1074 ohci_suspend(device_t dv PMF_FN_ARGS) 1075 { 1076 ohci_softc_t *sc = device_private(dv); 1077 uint32_t ctl; 1078 int s; 1079 1080 s = splhardusb(); 1081 sc->sc_bus.use_polling++; 1082 ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK; 1083 if (sc->sc_control == 0) { 1084 /* 1085 * Preserve register values, in case that BIOS 1086 * does not recover them. 1087 */ 1088 sc->sc_control = ctl; 1089 sc->sc_intre = OREAD4(sc, 1090 OHCI_INTERRUPT_ENABLE); 1091 } 1092 ctl |= OHCI_HCFS_SUSPEND; 1093 OWRITE4(sc, OHCI_CONTROL, ctl); 1094 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1095 sc->sc_bus.use_polling--; 1096 splx(s); 1097 1098 return true; 1099 } 1100 1101 #ifdef OHCI_DEBUG 1102 void 1103 ohci_dumpregs(ohci_softc_t *sc) 1104 { 1105 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 1106 OREAD4(sc, OHCI_REVISION), 1107 OREAD4(sc, OHCI_CONTROL), 1108 OREAD4(sc, OHCI_COMMAND_STATUS))); 1109 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 1110 OREAD4(sc, OHCI_INTERRUPT_STATUS), 1111 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 1112 OREAD4(sc, OHCI_INTERRUPT_DISABLE))); 1113 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 1114 OREAD4(sc, OHCI_HCCA), 1115 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 1116 OREAD4(sc, OHCI_CONTROL_HEAD_ED))); 1117 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 1118 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 1119 OREAD4(sc, OHCI_BULK_HEAD_ED), 1120 OREAD4(sc, OHCI_BULK_CURRENT_ED))); 1121 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 1122 OREAD4(sc, OHCI_DONE_HEAD), 1123 OREAD4(sc, OHCI_FM_INTERVAL), 1124 OREAD4(sc, OHCI_FM_REMAINING))); 1125 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 1126 OREAD4(sc, OHCI_FM_NUMBER), 1127 OREAD4(sc, OHCI_PERIODIC_START), 1128 OREAD4(sc, OHCI_LS_THRESHOLD))); 1129 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n", 1130 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 1131 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 1132 OREAD4(sc, OHCI_RH_STATUS))); 1133 DPRINTF((" port1=0x%08x port2=0x%08x\n", 1134 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 1135 OREAD4(sc, OHCI_RH_PORT_STATUS(2)))); 1136 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n", 1137 O32TOH(sc->sc_hcca->hcca_frame_number), 1138 O32TOH(sc->sc_hcca->hcca_done_head))); 1139 } 1140 #endif 1141 1142 Static int ohci_intr1(ohci_softc_t *); 1143 1144 int 1145 ohci_intr(void *p) 1146 { 1147 ohci_softc_t *sc = p; 1148 1149 if (sc == NULL || sc->sc_dying || !device_has_power(sc->sc_dev)) 1150 return (0); 1151 1152 /* If we get an interrupt while polling, then just ignore it. */ 1153 if (sc->sc_bus.use_polling) { 1154 #ifdef DIAGNOSTIC 1155 DPRINTFN(16, ("ohci_intr: ignored interrupt while polling\n")); 1156 #endif 1157 /* for level triggered intrs, should do something to ack */ 1158 OWRITE4(sc, OHCI_INTERRUPT_STATUS, 1159 OREAD4(sc, OHCI_INTERRUPT_STATUS)); 1160 1161 return (0); 1162 } 1163 1164 return (ohci_intr1(sc)); 1165 } 1166 1167 Static int 1168 ohci_intr1(ohci_softc_t *sc) 1169 { 1170 u_int32_t intrs, eintrs; 1171 1172 DPRINTFN(14,("ohci_intr1: enter\n")); 1173 1174 /* In case the interrupt occurs before initialization has completed. */ 1175 if (sc == NULL || sc->sc_hcca == NULL) { 1176 #ifdef DIAGNOSTIC 1177 printf("ohci_intr: sc->sc_hcca == NULL\n"); 1178 #endif 1179 return (0); 1180 } 1181 1182 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1183 if (!intrs) 1184 return (0); 1185 1186 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs & ~(OHCI_MIE|OHCI_WDH)); /* Acknowledge */ 1187 eintrs = intrs & sc->sc_eintrs; 1188 if (!eintrs) 1189 return (0); 1190 1191 sc->sc_bus.intr_context++; 1192 sc->sc_bus.no_intrs++; 1193 DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 1194 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 1195 (u_int)eintrs)); 1196 1197 if (eintrs & OHCI_SO) { 1198 sc->sc_overrun_cnt++; 1199 if (usbd_ratecheck(&sc->sc_overrun_ntc)) { 1200 printf("%s: %u scheduling overruns\n", 1201 device_xname(sc->sc_dev), sc->sc_overrun_cnt); 1202 sc->sc_overrun_cnt = 0; 1203 } 1204 /* XXX do what */ 1205 eintrs &= ~OHCI_SO; 1206 } 1207 if (eintrs & OHCI_WDH) { 1208 /* 1209 * We block the interrupt below, and reenable it later from 1210 * ohci_softintr(). 1211 */ 1212 usb_schedsoftintr(&sc->sc_bus); 1213 } 1214 if (eintrs & OHCI_RD) { 1215 printf("%s: resume detect\n", device_xname(sc->sc_dev)); 1216 /* XXX process resume detect */ 1217 } 1218 if (eintrs & OHCI_UE) { 1219 printf("%s: unrecoverable error, controller halted\n", 1220 device_xname(sc->sc_dev)); 1221 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1222 /* XXX what else */ 1223 } 1224 if (eintrs & OHCI_RHSC) { 1225 /* 1226 * We block the interrupt below, and reenable it later from 1227 * a timeout. 1228 */ 1229 ohci_rhsc(sc, sc->sc_intrxfer); 1230 /* Do not allow RHSC interrupts > 1 per second */ 1231 usb_callout(sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc); 1232 } 1233 1234 sc->sc_bus.intr_context--; 1235 1236 if (eintrs != 0) { 1237 /* Block unprocessed interrupts. */ 1238 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs); 1239 sc->sc_eintrs &= ~eintrs; 1240 DPRINTFN(1, ("%s: blocking intrs 0x%x\n", 1241 device_xname(sc->sc_dev), eintrs)); 1242 } 1243 1244 return (1); 1245 } 1246 1247 void 1248 ohci_rhsc_enable(void *v_sc) 1249 { 1250 ohci_softc_t *sc = v_sc; 1251 int s; 1252 1253 s = splhardusb(); 1254 sc->sc_eintrs |= OHCI_RHSC; 1255 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1256 splx(s); 1257 } 1258 1259 #ifdef OHCI_DEBUG 1260 const char *ohci_cc_strs[] = { 1261 "NO_ERROR", 1262 "CRC", 1263 "BIT_STUFFING", 1264 "DATA_TOGGLE_MISMATCH", 1265 "STALL", 1266 "DEVICE_NOT_RESPONDING", 1267 "PID_CHECK_FAILURE", 1268 "UNEXPECTED_PID", 1269 "DATA_OVERRUN", 1270 "DATA_UNDERRUN", 1271 "BUFFER_OVERRUN", 1272 "BUFFER_UNDERRUN", 1273 "reserved", 1274 "reserved", 1275 "NOT_ACCESSED", 1276 "NOT_ACCESSED", 1277 }; 1278 #endif 1279 1280 void 1281 ohci_softintr(void *v) 1282 { 1283 struct usbd_bus *bus = v; 1284 ohci_softc_t *sc = bus->hci_private; 1285 ohci_soft_itd_t *sitd, *sidone, *sitdnext; 1286 ohci_soft_td_t *std, *sdone, *stdnext; 1287 usbd_xfer_handle xfer; 1288 struct ohci_pipe *opipe; 1289 int len, cc, s; 1290 int i, j, actlen, iframes, uedir; 1291 ohci_physaddr_t done; 1292 1293 DPRINTFN(10,("ohci_softintr: enter\n")); 1294 1295 sc->sc_bus.intr_context++; 1296 1297 s = splhardusb(); 1298 usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head), 1299 sizeof(sc->sc_hcca->hcca_done_head), 1300 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1301 done = O32TOH(sc->sc_hcca->hcca_done_head) & ~OHCI_DONE_INTRS; 1302 sc->sc_hcca->hcca_done_head = 0; 1303 usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head), 1304 sizeof(sc->sc_hcca->hcca_done_head), 1305 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1306 OWRITE4(sc, OHCI_INTERRUPT_STATUS, OHCI_WDH); 1307 sc->sc_eintrs |= OHCI_WDH; 1308 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_WDH); 1309 splx(s); 1310 1311 /* Reverse the done list. */ 1312 for (sdone = NULL, sidone = NULL; done != 0; ) { 1313 std = ohci_hash_find_td(sc, done); 1314 if (std != NULL) { 1315 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 1316 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1317 std->dnext = sdone; 1318 done = O32TOH(std->td.td_nexttd); 1319 sdone = std; 1320 DPRINTFN(10,("add TD %p\n", std)); 1321 continue; 1322 } 1323 sitd = ohci_hash_find_itd(sc, done); 1324 if (sitd != NULL) { 1325 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 1326 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1327 sitd->dnext = sidone; 1328 done = O32TOH(sitd->itd.itd_nextitd); 1329 sidone = sitd; 1330 DPRINTFN(5,("add ITD %p\n", sitd)); 1331 continue; 1332 } 1333 panic("ohci_softintr: addr 0x%08lx not found", (u_long)done); 1334 } 1335 1336 DPRINTFN(10,("ohci_softintr: sdone=%p sidone=%p\n", sdone, sidone)); 1337 1338 #ifdef OHCI_DEBUG 1339 if (ohcidebug > 10) { 1340 DPRINTF(("ohci_process_done: TD done:\n")); 1341 ohci_dump_tds(sc, sdone); 1342 } 1343 #endif 1344 1345 for (std = sdone; std; std = stdnext) { 1346 xfer = std->xfer; 1347 stdnext = std->dnext; 1348 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n", 1349 std, xfer, xfer ? xfer->hcpriv : 0)); 1350 if (xfer == NULL) { 1351 /* 1352 * xfer == NULL: There seems to be no xfer associated 1353 * with this TD. It is tailp that happened to end up on 1354 * the done queue. 1355 * Shouldn't happen, but some chips are broken(?). 1356 */ 1357 continue; 1358 } 1359 if (xfer->status == USBD_CANCELLED || 1360 xfer->status == USBD_TIMEOUT) { 1361 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1362 xfer)); 1363 /* Handled by abort routine. */ 1364 continue; 1365 } 1366 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 1367 1368 len = std->len; 1369 if (std->td.td_cbp != 0) 1370 len -= O32TOH(std->td.td_be) - 1371 O32TOH(std->td.td_cbp) + 1; 1372 DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", len, 1373 std->flags)); 1374 if (std->flags & OHCI_ADD_LEN) 1375 xfer->actlen += len; 1376 1377 cc = OHCI_TD_GET_CC(O32TOH(std->td.td_flags)); 1378 if (cc == OHCI_CC_NO_ERROR) { 1379 if (std->flags & OHCI_CALL_DONE) { 1380 xfer->status = USBD_NORMAL_COMPLETION; 1381 s = splusb(); 1382 usb_transfer_complete(xfer); 1383 splx(s); 1384 } 1385 ohci_free_std(sc, std); 1386 } else { 1387 /* 1388 * Endpoint is halted. First unlink all the TDs 1389 * belonging to the failed transfer, and then restart 1390 * the endpoint. 1391 */ 1392 ohci_soft_td_t *p, *n; 1393 opipe = (struct ohci_pipe *)xfer->pipe; 1394 1395 DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n", 1396 OHCI_TD_GET_CC(O32TOH(std->td.td_flags)), 1397 ohci_cc_strs[OHCI_TD_GET_CC(O32TOH(std->td.td_flags))])); 1398 1399 /* remove TDs */ 1400 for (p = std; p->xfer == xfer; p = n) { 1401 n = p->nexttd; 1402 ohci_free_std(sc, p); 1403 } 1404 1405 /* clear halt */ 1406 opipe->sed->ed.ed_headp = HTOO32(p->physaddr); 1407 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1408 1409 if (cc == OHCI_CC_STALL) 1410 xfer->status = USBD_STALLED; 1411 else 1412 xfer->status = USBD_IOERROR; 1413 s = splusb(); 1414 usb_transfer_complete(xfer); 1415 splx(s); 1416 } 1417 } 1418 1419 #ifdef OHCI_DEBUG 1420 if (ohcidebug > 10) { 1421 DPRINTF(("ohci_softintr: ITD done:\n")); 1422 ohci_dump_itds(sc, sidone); 1423 } 1424 #endif 1425 1426 for (sitd = sidone; sitd != NULL; sitd = sitdnext) { 1427 xfer = sitd->xfer; 1428 sitdnext = sitd->dnext; 1429 DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n", 1430 sitd, xfer, xfer ? xfer->hcpriv : 0)); 1431 if (xfer == NULL) 1432 continue; 1433 if (xfer->status == USBD_CANCELLED || 1434 xfer->status == USBD_TIMEOUT) { 1435 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1436 xfer)); 1437 /* Handled by abort routine. */ 1438 continue; 1439 } 1440 #ifdef DIAGNOSTIC 1441 if (sitd->isdone) 1442 printf("ohci_softintr: sitd=%p is done\n", sitd); 1443 sitd->isdone = 1; 1444 #endif 1445 if (sitd->flags & OHCI_CALL_DONE) { 1446 ohci_soft_itd_t *next; 1447 1448 opipe = (struct ohci_pipe *)xfer->pipe; 1449 opipe->u.iso.inuse -= xfer->nframes; 1450 uedir = UE_GET_DIR(xfer->pipe->endpoint->edesc-> 1451 bEndpointAddress); 1452 xfer->status = USBD_NORMAL_COMPLETION; 1453 actlen = 0; 1454 for (i = 0, sitd = xfer->hcpriv;; 1455 sitd = next) { 1456 next = sitd->nextitd; 1457 if (OHCI_ITD_GET_CC(O32TOH(sitd-> 1458 itd.itd_flags)) != OHCI_CC_NO_ERROR) 1459 xfer->status = USBD_IOERROR; 1460 /* For input, update frlengths with actual */ 1461 /* XXX anything necessary for output? */ 1462 if (uedir == UE_DIR_IN && 1463 xfer->status == USBD_NORMAL_COMPLETION) { 1464 iframes = OHCI_ITD_GET_FC(O32TOH( 1465 sitd->itd.itd_flags)); 1466 for (j = 0; j < iframes; i++, j++) { 1467 len = O16TOH(sitd-> 1468 itd.itd_offset[j]); 1469 if ((OHCI_ITD_PSW_GET_CC(len) & 1470 OHCI_CC_NOT_ACCESSED_MASK) 1471 == OHCI_CC_NOT_ACCESSED) 1472 len = 0; 1473 else 1474 len = OHCI_ITD_PSW_LENGTH(len); 1475 xfer->frlengths[i] = len; 1476 actlen += len; 1477 } 1478 } 1479 if (sitd->flags & OHCI_CALL_DONE) 1480 break; 1481 ohci_free_sitd(sc, sitd); 1482 } 1483 ohci_free_sitd(sc, sitd); 1484 if (uedir == UE_DIR_IN && 1485 xfer->status == USBD_NORMAL_COMPLETION) 1486 xfer->actlen = actlen; 1487 xfer->hcpriv = NULL; 1488 1489 s = splusb(); 1490 usb_transfer_complete(xfer); 1491 splx(s); 1492 } 1493 } 1494 1495 #ifdef USB_USE_SOFTINTR 1496 if (sc->sc_softwake) { 1497 sc->sc_softwake = 0; 1498 wakeup(&sc->sc_softwake); 1499 } 1500 #endif /* USB_USE_SOFTINTR */ 1501 1502 sc->sc_bus.intr_context--; 1503 DPRINTFN(10,("ohci_softintr: done:\n")); 1504 } 1505 1506 void 1507 ohci_device_ctrl_done(usbd_xfer_handle xfer) 1508 { 1509 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1510 int len = UGETW(xfer->request.wLength); 1511 int isread = (xfer->request.bmRequestType & UT_READ); 1512 1513 DPRINTFN(10,("ohci_device_ctrl_done: xfer=%p\n", xfer)); 1514 1515 #ifdef DIAGNOSTIC 1516 if (!(xfer->rqflags & URQ_REQUEST)) { 1517 panic("ohci_device_ctrl_done: not a request"); 1518 } 1519 #endif 1520 if (len) 1521 usb_syncmem(&xfer->dmabuf, 0, len, 1522 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1523 usb_syncmem(&opipe->u.ctl.reqdma, 0, 1524 sizeof(usb_device_request_t), BUS_DMASYNC_POSTWRITE); 1525 } 1526 1527 void 1528 ohci_device_intr_done(usbd_xfer_handle xfer) 1529 { 1530 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1531 ohci_softc_t *sc = opipe->pipe.device->bus->hci_private; 1532 ohci_soft_ed_t *sed = opipe->sed; 1533 ohci_soft_td_t *data, *tail; 1534 int isread = 1535 (UE_GET_DIR(xfer->pipe->endpoint->edesc->bEndpointAddress) == UE_DIR_IN); 1536 1537 1538 DPRINTFN(10,("ohci_device_intr_done: xfer=%p, actlen=%d\n", 1539 xfer, xfer->actlen)); 1540 1541 usb_syncmem(&xfer->dmabuf, 0, xfer->length, 1542 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1543 if (xfer->pipe->repeat) { 1544 data = opipe->tail.td; 1545 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 1546 if (tail == NULL) { 1547 xfer->status = USBD_NOMEM; 1548 return; 1549 } 1550 tail->xfer = NULL; 1551 1552 data->td.td_flags = HTOO32( 1553 OHCI_TD_IN | OHCI_TD_NOCC | 1554 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 1555 if (xfer->flags & USBD_SHORT_XFER_OK) 1556 data->td.td_flags |= HTOO32(OHCI_TD_R); 1557 data->td.td_cbp = HTOO32(DMAADDR(&xfer->dmabuf, 0)); 1558 data->nexttd = tail; 1559 data->td.td_nexttd = HTOO32(tail->physaddr); 1560 data->td.td_be = HTOO32(O32TOH(data->td.td_cbp) + 1561 xfer->length - 1); 1562 data->len = xfer->length; 1563 data->xfer = xfer; 1564 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1565 usb_syncmem(&data->dma, data->offs, sizeof(data->td), 1566 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1567 xfer->hcpriv = data; 1568 xfer->actlen = 0; 1569 1570 sed->ed.ed_tailp = HTOO32(tail->physaddr); 1571 usb_syncmem(&sed->dma, 1572 sed->offs + offsetof(ohci_ed_t, ed_tailp), 1573 sizeof(sed->ed.ed_tailp), 1574 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1575 opipe->tail.td = tail; 1576 } 1577 } 1578 1579 void 1580 ohci_device_bulk_done(usbd_xfer_handle xfer) 1581 { 1582 int isread = 1583 (UE_GET_DIR(xfer->pipe->endpoint->edesc->bEndpointAddress) == UE_DIR_IN); 1584 1585 DPRINTFN(10,("ohci_device_bulk_done: xfer=%p, actlen=%d\n", 1586 xfer, xfer->actlen)); 1587 usb_syncmem(&xfer->dmabuf, 0, xfer->length, 1588 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1589 } 1590 1591 void 1592 ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer) 1593 { 1594 usbd_pipe_handle pipe; 1595 u_char *p; 1596 int i, m; 1597 int hstatus; 1598 1599 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1600 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n", 1601 sc, xfer, hstatus)); 1602 1603 if (xfer == NULL) { 1604 /* Just ignore the change. */ 1605 return; 1606 } 1607 1608 pipe = xfer->pipe; 1609 1610 p = KERNADDR(&xfer->dmabuf, 0); 1611 m = min(sc->sc_noport, xfer->length * 8 - 1); 1612 memset(p, 0, xfer->length); 1613 for (i = 1; i <= m; i++) { 1614 /* Pick out CHANGE bits from the status reg. */ 1615 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1616 p[i/8] |= 1 << (i%8); 1617 } 1618 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 1619 xfer->actlen = xfer->length; 1620 xfer->status = USBD_NORMAL_COMPLETION; 1621 1622 usb_transfer_complete(xfer); 1623 } 1624 1625 void 1626 ohci_root_intr_done(usbd_xfer_handle xfer) 1627 { 1628 } 1629 1630 void 1631 ohci_root_ctrl_done(usbd_xfer_handle xfer) 1632 { 1633 } 1634 1635 /* 1636 * Wait here until controller claims to have an interrupt. 1637 * Then call ohci_intr and return. Use timeout to avoid waiting 1638 * too long. 1639 */ 1640 void 1641 ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer) 1642 { 1643 int timo; 1644 u_int32_t intrs; 1645 1646 xfer->status = USBD_IN_PROGRESS; 1647 for (timo = xfer->timeout; timo >= 0; timo--) { 1648 usb_delay_ms(&sc->sc_bus, 1); 1649 if (sc->sc_dying) 1650 break; 1651 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 1652 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs)); 1653 #ifdef OHCI_DEBUG 1654 if (ohcidebug > 15) 1655 ohci_dumpregs(sc); 1656 #endif 1657 if (intrs) { 1658 ohci_intr1(sc); 1659 if (xfer->status != USBD_IN_PROGRESS) 1660 return; 1661 } 1662 } 1663 1664 /* Timeout */ 1665 DPRINTF(("ohci_waitintr: timeout\n")); 1666 xfer->status = USBD_TIMEOUT; 1667 usb_transfer_complete(xfer); 1668 /* XXX should free TD */ 1669 } 1670 1671 void 1672 ohci_poll(struct usbd_bus *bus) 1673 { 1674 ohci_softc_t *sc = bus->hci_private; 1675 #ifdef OHCI_DEBUG 1676 static int last; 1677 int new; 1678 new = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1679 if (new != last) { 1680 DPRINTFN(10,("ohci_poll: intrs=0x%04x\n", new)); 1681 last = new; 1682 } 1683 #endif 1684 1685 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) 1686 ohci_intr1(sc); 1687 } 1688 1689 usbd_status 1690 ohci_device_request(usbd_xfer_handle xfer) 1691 { 1692 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1693 usb_device_request_t *req = &xfer->request; 1694 usbd_device_handle dev = opipe->pipe.device; 1695 ohci_softc_t *sc = dev->bus->hci_private; 1696 int addr = dev->address; 1697 ohci_soft_td_t *setup, *stat, *next, *tail; 1698 ohci_soft_ed_t *sed; 1699 int isread; 1700 int len; 1701 usbd_status err; 1702 int s; 1703 1704 isread = req->bmRequestType & UT_READ; 1705 len = UGETW(req->wLength); 1706 1707 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 1708 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 1709 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1710 UGETW(req->wIndex), len, addr, 1711 opipe->pipe.endpoint->edesc->bEndpointAddress)); 1712 1713 setup = opipe->tail.td; 1714 stat = ohci_alloc_std(sc); 1715 if (stat == NULL) { 1716 err = USBD_NOMEM; 1717 goto bad1; 1718 } 1719 tail = ohci_alloc_std(sc); 1720 if (tail == NULL) { 1721 err = USBD_NOMEM; 1722 goto bad2; 1723 } 1724 tail->xfer = NULL; 1725 1726 sed = opipe->sed; 1727 opipe->u.ctl.length = len; 1728 1729 /* Update device address and length since they may have changed 1730 during the setup of the control pipe in usbd_new_device(). */ 1731 /* XXX This only needs to be done once, but it's too early in open. */ 1732 /* XXXX Should not touch ED here! */ 1733 1734 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 1735 sizeof(sed->ed.ed_flags), 1736 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1737 sed->ed.ed_flags = HTOO32( 1738 (O32TOH(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) | 1739 OHCI_ED_SET_FA(addr) | 1740 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize))); 1741 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 1742 sizeof(sed->ed.ed_flags), 1743 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1744 1745 next = stat; 1746 1747 /* Set up data transaction */ 1748 if (len != 0) { 1749 ohci_soft_td_t *std = stat; 1750 1751 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 1752 std, &stat); 1753 stat = stat->nexttd; /* point at free TD */ 1754 if (err) 1755 goto bad3; 1756 /* Start toggle at 1 and then use the carried toggle. */ 1757 std->td.td_flags &= HTOO32(~OHCI_TD_TOGGLE_MASK); 1758 std->td.td_flags |= HTOO32(OHCI_TD_TOGGLE_1); 1759 usb_syncmem(&std->dma, 1760 std->offs + offsetof(ohci_td_t, td_flags), 1761 sizeof(std->td.td_flags), 1762 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1763 } 1764 1765 memcpy(KERNADDR(&opipe->u.ctl.reqdma, 0), req, sizeof *req); 1766 usb_syncmem(&opipe->u.ctl.reqdma, 0, sizeof *req, BUS_DMASYNC_PREWRITE); 1767 1768 setup->td.td_flags = HTOO32(OHCI_TD_SETUP | OHCI_TD_NOCC | 1769 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1770 setup->td.td_cbp = HTOO32(DMAADDR(&opipe->u.ctl.reqdma, 0)); 1771 setup->nexttd = next; 1772 setup->td.td_nexttd = HTOO32(next->physaddr); 1773 setup->td.td_be = HTOO32(O32TOH(setup->td.td_cbp) + sizeof *req - 1); 1774 setup->len = 0; 1775 setup->xfer = xfer; 1776 setup->flags = 0; 1777 xfer->hcpriv = setup; 1778 usb_syncmem(&setup->dma, setup->offs, sizeof(setup->td), 1779 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1780 1781 stat->td.td_flags = HTOO32( 1782 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | 1783 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1784 stat->td.td_cbp = 0; 1785 stat->nexttd = tail; 1786 stat->td.td_nexttd = HTOO32(tail->physaddr); 1787 stat->td.td_be = 0; 1788 stat->flags = OHCI_CALL_DONE; 1789 stat->len = 0; 1790 stat->xfer = xfer; 1791 usb_syncmem(&stat->dma, stat->offs, sizeof(stat->td), 1792 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1793 1794 #ifdef OHCI_DEBUG 1795 if (ohcidebug > 5) { 1796 DPRINTF(("ohci_device_request:\n")); 1797 ohci_dump_ed(sc, sed); 1798 ohci_dump_tds(sc, setup); 1799 } 1800 #endif 1801 1802 /* Insert ED in schedule */ 1803 s = splusb(); 1804 sed->ed.ed_tailp = HTOO32(tail->physaddr); 1805 usb_syncmem(&sed->dma, 1806 sed->offs + offsetof(ohci_ed_t, ed_tailp), 1807 sizeof(sed->ed.ed_tailp), 1808 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1809 opipe->tail.td = tail; 1810 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1811 if (xfer->timeout && !sc->sc_bus.use_polling) { 1812 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 1813 ohci_timeout, xfer); 1814 } 1815 splx(s); 1816 1817 #ifdef OHCI_DEBUG 1818 if (ohcidebug > 20) { 1819 delay(10000); 1820 DPRINTF(("ohci_device_request: status=%x\n", 1821 OREAD4(sc, OHCI_COMMAND_STATUS))); 1822 ohci_dumpregs(sc); 1823 printf("ctrl head:\n"); 1824 ohci_dump_ed(sc, sc->sc_ctrl_head); 1825 printf("sed:\n"); 1826 ohci_dump_ed(sc, sed); 1827 ohci_dump_tds(sc, setup); 1828 } 1829 #endif 1830 1831 return (USBD_NORMAL_COMPLETION); 1832 1833 bad3: 1834 ohci_free_std(sc, tail); 1835 bad2: 1836 ohci_free_std(sc, stat); 1837 bad1: 1838 return (err); 1839 } 1840 1841 /* 1842 * Add an ED to the schedule. Called at splusb(). 1843 */ 1844 void 1845 ohci_add_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1846 { 1847 DPRINTFN(8,("ohci_add_ed: sed=%p head=%p\n", sed, head)); 1848 1849 SPLUSBCHECK; 1850 usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted), 1851 sizeof(head->ed.ed_nexted), 1852 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1853 sed->next = head->next; 1854 sed->ed.ed_nexted = head->ed.ed_nexted; 1855 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted), 1856 sizeof(sed->ed.ed_nexted), 1857 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1858 head->next = sed; 1859 head->ed.ed_nexted = HTOO32(sed->physaddr); 1860 usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted), 1861 sizeof(head->ed.ed_nexted), 1862 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1863 } 1864 1865 /* 1866 * Remove an ED from the schedule. Called at splusb(). 1867 */ 1868 void 1869 ohci_rem_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1870 { 1871 ohci_soft_ed_t *p; 1872 1873 SPLUSBCHECK; 1874 1875 /* XXX */ 1876 for (p = head; p != NULL && p->next != sed; p = p->next) 1877 ; 1878 if (p == NULL) 1879 panic("ohci_rem_ed: ED not found"); 1880 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted), 1881 sizeof(sed->ed.ed_nexted), 1882 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1883 p->next = sed->next; 1884 p->ed.ed_nexted = sed->ed.ed_nexted; 1885 usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted), 1886 sizeof(p->ed.ed_nexted), 1887 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1888 } 1889 1890 /* 1891 * When a transfer is completed the TD is added to the done queue by 1892 * the host controller. This queue is the processed by software. 1893 * Unfortunately the queue contains the physical address of the TD 1894 * and we have no simple way to translate this back to a kernel address. 1895 * To make the translation possible (and fast) we use a hash table of 1896 * TDs currently in the schedule. The physical address is used as the 1897 * hash value. 1898 */ 1899 1900 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1901 /* Called at splusb() */ 1902 void 1903 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1904 { 1905 int h = HASH(std->physaddr); 1906 1907 SPLUSBCHECK; 1908 1909 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1910 } 1911 1912 /* Called at splusb() */ 1913 void 1914 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1915 { 1916 SPLUSBCHECK; 1917 1918 LIST_REMOVE(std, hnext); 1919 } 1920 1921 ohci_soft_td_t * 1922 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a) 1923 { 1924 int h = HASH(a); 1925 ohci_soft_td_t *std; 1926 1927 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1928 std != NULL; 1929 std = LIST_NEXT(std, hnext)) 1930 if (std->physaddr == a) 1931 return (std); 1932 return (NULL); 1933 } 1934 1935 /* Called at splusb() */ 1936 void 1937 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1938 { 1939 int h = HASH(sitd->physaddr); 1940 1941 SPLUSBCHECK; 1942 1943 DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n", 1944 sitd, (u_long)sitd->physaddr)); 1945 1946 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext); 1947 } 1948 1949 /* Called at splusb() */ 1950 void 1951 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1952 { 1953 SPLUSBCHECK; 1954 1955 DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n", 1956 sitd, (u_long)sitd->physaddr)); 1957 1958 LIST_REMOVE(sitd, hnext); 1959 } 1960 1961 ohci_soft_itd_t * 1962 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a) 1963 { 1964 int h = HASH(a); 1965 ohci_soft_itd_t *sitd; 1966 1967 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]); 1968 sitd != NULL; 1969 sitd = LIST_NEXT(sitd, hnext)) 1970 if (sitd->physaddr == a) 1971 return (sitd); 1972 return (NULL); 1973 } 1974 1975 void 1976 ohci_timeout(void *addr) 1977 { 1978 struct ohci_xfer *oxfer = addr; 1979 struct ohci_pipe *opipe = (struct ohci_pipe *)oxfer->xfer.pipe; 1980 ohci_softc_t *sc = opipe->pipe.device->bus->hci_private; 1981 1982 DPRINTF(("ohci_timeout: oxfer=%p\n", oxfer)); 1983 1984 if (sc->sc_dying) { 1985 ohci_abort_xfer(&oxfer->xfer, USBD_TIMEOUT); 1986 return; 1987 } 1988 1989 /* Execute the abort in a process context. */ 1990 usb_init_task(&oxfer->abort_task, ohci_timeout_task, addr); 1991 usb_add_task(oxfer->xfer.pipe->device, &oxfer->abort_task, 1992 USB_TASKQ_HC); 1993 } 1994 1995 void 1996 ohci_timeout_task(void *addr) 1997 { 1998 usbd_xfer_handle xfer = addr; 1999 int s; 2000 2001 DPRINTF(("ohci_timeout_task: xfer=%p\n", xfer)); 2002 2003 s = splusb(); 2004 ohci_abort_xfer(xfer, USBD_TIMEOUT); 2005 splx(s); 2006 } 2007 2008 #ifdef OHCI_DEBUG 2009 void 2010 ohci_dump_tds(ohci_softc_t *sc, ohci_soft_td_t *std) 2011 { 2012 for (; std; std = std->nexttd) 2013 ohci_dump_td(sc, std); 2014 } 2015 2016 void 2017 ohci_dump_td(ohci_softc_t *sc, ohci_soft_td_t *std) 2018 { 2019 char sbuf[128]; 2020 2021 snprintb(sbuf, sizeof(sbuf), 2022 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 2023 (u_int32_t)O32TOH(std->td.td_flags)); 2024 2025 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 2026 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2027 printf("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx " 2028 "nexttd=0x%08lx be=0x%08lx\n", 2029 std, (u_long)std->physaddr, sbuf, 2030 OHCI_TD_GET_DI(O32TOH(std->td.td_flags)), 2031 OHCI_TD_GET_EC(O32TOH(std->td.td_flags)), 2032 OHCI_TD_GET_CC(O32TOH(std->td.td_flags)), 2033 (u_long)O32TOH(std->td.td_cbp), 2034 (u_long)O32TOH(std->td.td_nexttd), 2035 (u_long)O32TOH(std->td.td_be)); 2036 } 2037 2038 void 2039 ohci_dump_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 2040 { 2041 int i; 2042 2043 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 2044 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2045 printf("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n" 2046 "bp0=0x%08lx next=0x%08lx be=0x%08lx\n", 2047 sitd, (u_long)sitd->physaddr, 2048 OHCI_ITD_GET_SF(O32TOH(sitd->itd.itd_flags)), 2049 OHCI_ITD_GET_DI(O32TOH(sitd->itd.itd_flags)), 2050 OHCI_ITD_GET_FC(O32TOH(sitd->itd.itd_flags)), 2051 OHCI_ITD_GET_CC(O32TOH(sitd->itd.itd_flags)), 2052 (u_long)O32TOH(sitd->itd.itd_bp0), 2053 (u_long)O32TOH(sitd->itd.itd_nextitd), 2054 (u_long)O32TOH(sitd->itd.itd_be)); 2055 for (i = 0; i < OHCI_ITD_NOFFSET; i++) 2056 printf("offs[%d]=0x%04x ", i, 2057 (u_int)O16TOH(sitd->itd.itd_offset[i])); 2058 printf("\n"); 2059 } 2060 2061 void 2062 ohci_dump_itds(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 2063 { 2064 for (; sitd; sitd = sitd->nextitd) 2065 ohci_dump_itd(sc, sitd); 2066 } 2067 2068 void 2069 ohci_dump_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 2070 { 2071 char sbuf[128], sbuf2[128]; 2072 2073 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 2074 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2075 snprintb(sbuf, sizeof(sbuf), 2076 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO", 2077 (u_int32_t)O32TOH(sed->ed.ed_flags)); 2078 snprintb(sbuf2, sizeof(sbuf2), "\20\1HALT\2CARRY", 2079 (u_int32_t)O32TOH(sed->ed.ed_headp)); 2080 2081 printf("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d flags=%s\ntailp=0x%08lx " 2082 "headflags=%s headp=0x%08lx nexted=0x%08lx\n", 2083 sed, (u_long)sed->physaddr, 2084 OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)), 2085 OHCI_ED_GET_EN(O32TOH(sed->ed.ed_flags)), 2086 OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)), sbuf, 2087 (u_long)O32TOH(sed->ed.ed_tailp), sbuf2, 2088 (u_long)O32TOH(sed->ed.ed_headp), 2089 (u_long)O32TOH(sed->ed.ed_nexted)); 2090 } 2091 #endif 2092 2093 usbd_status 2094 ohci_open(usbd_pipe_handle pipe) 2095 { 2096 usbd_device_handle dev = pipe->device; 2097 ohci_softc_t *sc = dev->bus->hci_private; 2098 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 2099 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2100 u_int8_t addr = dev->address; 2101 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 2102 ohci_soft_ed_t *sed; 2103 ohci_soft_td_t *std; 2104 ohci_soft_itd_t *sitd; 2105 ohci_physaddr_t tdphys; 2106 u_int32_t fmt; 2107 usbd_status err; 2108 int s; 2109 int ival; 2110 2111 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 2112 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 2113 2114 if (sc->sc_dying) 2115 return (USBD_IOERROR); 2116 2117 std = NULL; 2118 sed = NULL; 2119 2120 if (addr == sc->sc_addr) { 2121 switch (ed->bEndpointAddress) { 2122 case USB_CONTROL_ENDPOINT: 2123 pipe->methods = &ohci_root_ctrl_methods; 2124 break; 2125 case UE_DIR_IN | OHCI_INTR_ENDPT: 2126 pipe->methods = &ohci_root_intr_methods; 2127 break; 2128 default: 2129 return (USBD_INVAL); 2130 } 2131 } else { 2132 sed = ohci_alloc_sed(sc); 2133 if (sed == NULL) 2134 goto bad0; 2135 opipe->sed = sed; 2136 if (xfertype == UE_ISOCHRONOUS) { 2137 sitd = ohci_alloc_sitd(sc); 2138 if (sitd == NULL) 2139 goto bad1; 2140 opipe->tail.itd = sitd; 2141 tdphys = sitd->physaddr; 2142 fmt = OHCI_ED_FORMAT_ISO; 2143 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 2144 fmt |= OHCI_ED_DIR_IN; 2145 else 2146 fmt |= OHCI_ED_DIR_OUT; 2147 } else { 2148 std = ohci_alloc_std(sc); 2149 if (std == NULL) 2150 goto bad1; 2151 opipe->tail.td = std; 2152 tdphys = std->physaddr; 2153 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD; 2154 } 2155 sed->ed.ed_flags = HTOO32( 2156 OHCI_ED_SET_FA(addr) | 2157 OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) | 2158 (dev->speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) | 2159 fmt | 2160 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 2161 sed->ed.ed_headp = sed->ed.ed_tailp = HTOO32(tdphys); 2162 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 2163 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2164 2165 switch (xfertype) { 2166 case UE_CONTROL: 2167 pipe->methods = &ohci_device_ctrl_methods; 2168 err = usb_allocmem(&sc->sc_bus, 2169 sizeof(usb_device_request_t), 2170 0, &opipe->u.ctl.reqdma); 2171 if (err) 2172 goto bad; 2173 s = splusb(); 2174 ohci_add_ed(sc, sed, sc->sc_ctrl_head); 2175 splx(s); 2176 break; 2177 case UE_INTERRUPT: 2178 pipe->methods = &ohci_device_intr_methods; 2179 ival = pipe->interval; 2180 if (ival == USBD_DEFAULT_INTERVAL) 2181 ival = ed->bInterval; 2182 return (ohci_device_setintr(sc, opipe, ival)); 2183 case UE_ISOCHRONOUS: 2184 pipe->methods = &ohci_device_isoc_methods; 2185 return (ohci_setup_isoc(pipe)); 2186 case UE_BULK: 2187 pipe->methods = &ohci_device_bulk_methods; 2188 s = splusb(); 2189 ohci_add_ed(sc, sed, sc->sc_bulk_head); 2190 splx(s); 2191 break; 2192 } 2193 } 2194 return (USBD_NORMAL_COMPLETION); 2195 2196 bad: 2197 if (std != NULL) 2198 ohci_free_std(sc, std); 2199 bad1: 2200 if (sed != NULL) 2201 ohci_free_sed(sc, sed); 2202 bad0: 2203 return (USBD_NOMEM); 2204 2205 } 2206 2207 /* 2208 * Close a reqular pipe. 2209 * Assumes that there are no pending transactions. 2210 */ 2211 void 2212 ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head) 2213 { 2214 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2215 ohci_softc_t *sc = pipe->device->bus->hci_private; 2216 ohci_soft_ed_t *sed = opipe->sed; 2217 int s; 2218 2219 s = splusb(); 2220 #ifdef DIAGNOSTIC 2221 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 2222 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2223 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) { 2224 ohci_soft_td_t *std; 2225 std = ohci_hash_find_td(sc, O32TOH(sed->ed.ed_headp)); 2226 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 2227 "tl=0x%x pipe=%p, std=%p\n", sed, 2228 (int)O32TOH(sed->ed.ed_headp), 2229 (int)O32TOH(sed->ed.ed_tailp), 2230 pipe, std); 2231 #ifdef USB_DEBUG 2232 usbd_dump_pipe(&opipe->pipe); 2233 #endif 2234 #ifdef OHCI_DEBUG 2235 ohci_dump_ed(sc, sed); 2236 if (std) 2237 ohci_dump_td(sc, std); 2238 #endif 2239 usb_delay_ms(&sc->sc_bus, 2); 2240 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2241 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) 2242 printf("ohci_close_pipe: pipe still not empty\n"); 2243 } 2244 #endif 2245 ohci_rem_ed(sed, head); 2246 /* Make sure the host controller is not touching this ED */ 2247 usb_delay_ms(&sc->sc_bus, 1); 2248 splx(s); 2249 ohci_free_sed(sc, opipe->sed); 2250 } 2251 2252 /* 2253 * Abort a device request. 2254 * If this routine is called at splusb() it guarantees that the request 2255 * will be removed from the hardware scheduling and that the callback 2256 * for it will be called with USBD_CANCELLED status. 2257 * It's impossible to guarantee that the requested transfer will not 2258 * have happened since the hardware runs concurrently. 2259 * If the transaction has already happened we rely on the ordinary 2260 * interrupt processing to process it. 2261 */ 2262 void 2263 ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2264 { 2265 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2266 ohci_softc_t *sc = opipe->pipe.device->bus->hci_private; 2267 ohci_soft_ed_t *sed = opipe->sed; 2268 ohci_soft_td_t *p, *n; 2269 ohci_physaddr_t headp; 2270 int s, hit; 2271 int wake; 2272 2273 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p sed=%p\n", xfer, opipe,sed)); 2274 2275 if (sc->sc_dying) { 2276 /* If we're dying, just do the software part. */ 2277 s = splusb(); 2278 xfer->status = status; /* make software ignore it */ 2279 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 2280 usb_transfer_complete(xfer); 2281 splx(s); 2282 return; 2283 } 2284 2285 if (xfer->device->bus->intr_context || !curproc) 2286 panic("ohci_abort_xfer: not in process context"); 2287 2288 /* 2289 * If an abort is already in progress then just wait for it to 2290 * complete and return. 2291 */ 2292 if (xfer->hcflags & UXFER_ABORTING) { 2293 DPRINTFN(2, ("ohci_abort_xfer: already aborting\n")); 2294 #ifdef DIAGNOSTIC 2295 if (status == USBD_TIMEOUT) 2296 printf("0hci_abort_xfer: TIMEOUT while aborting\n"); 2297 #endif 2298 /* Override the status which might be USBD_TIMEOUT. */ 2299 xfer->status = status; 2300 DPRINTFN(2, ("ohci_abort_xfer: waiting for abort to finish\n")); 2301 xfer->hcflags |= UXFER_ABORTWAIT; 2302 while (xfer->hcflags & UXFER_ABORTING) 2303 tsleep(&xfer->hcflags, PZERO, "ohciaw", 0); 2304 return; 2305 } 2306 xfer->hcflags |= UXFER_ABORTING; 2307 2308 /* 2309 * Step 1: Make interrupt routine and hardware ignore xfer. 2310 */ 2311 s = splusb(); 2312 xfer->status = status; /* make software ignore it */ 2313 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 2314 splx(s); 2315 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed)); 2316 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2317 sizeof(sed->ed.ed_flags), 2318 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2319 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */ 2320 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2321 sizeof(sed->ed.ed_flags), 2322 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2323 2324 /* 2325 * Step 2: Wait until we know hardware has finished any possible 2326 * use of the xfer. Also make sure the soft interrupt routine 2327 * has run. 2328 */ 2329 usb_delay_ms(opipe->pipe.device->bus, 20); /* Hardware finishes in 1ms */ 2330 s = splusb(); 2331 #ifdef USB_USE_SOFTINTR 2332 sc->sc_softwake = 1; 2333 #endif /* USB_USE_SOFTINTR */ 2334 usb_schedsoftintr(&sc->sc_bus); 2335 #ifdef USB_USE_SOFTINTR 2336 tsleep(&sc->sc_softwake, PZERO, "ohciab", 0); 2337 #endif /* USB_USE_SOFTINTR */ 2338 splx(s); 2339 2340 /* 2341 * Step 3: Remove any vestiges of the xfer from the hardware. 2342 * The complication here is that the hardware may have executed 2343 * beyond the xfer we're trying to abort. So as we're scanning 2344 * the TDs of this xfer we check if the hardware points to 2345 * any of them. 2346 */ 2347 s = splusb(); /* XXX why? */ 2348 p = xfer->hcpriv; 2349 #ifdef DIAGNOSTIC 2350 if (p == NULL) { 2351 xfer->hcflags &= ~UXFER_ABORTING; /* XXX */ 2352 splx(s); 2353 printf("ohci_abort_xfer: hcpriv is NULL\n"); 2354 return; 2355 } 2356 #endif 2357 #ifdef OHCI_DEBUG 2358 if (ohcidebug > 1) { 2359 DPRINTF(("ohci_abort_xfer: sed=\n")); 2360 ohci_dump_ed(sc, sed); 2361 ohci_dump_tds(sc, p); 2362 } 2363 #endif 2364 headp = O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK; 2365 hit = 0; 2366 for (; p->xfer == xfer; p = n) { 2367 hit |= headp == p->physaddr; 2368 n = p->nexttd; 2369 ohci_free_std(sc, p); 2370 } 2371 /* Zap headp register if hardware pointed inside the xfer. */ 2372 if (hit) { 2373 DPRINTFN(1,("ohci_abort_xfer: set hd=0x%08x, tl=0x%08x\n", 2374 (int)p->physaddr, (int)O32TOH(sed->ed.ed_tailp))); 2375 sed->ed.ed_headp = HTOO32(p->physaddr); /* unlink TDs */ 2376 usb_syncmem(&sed->dma, 2377 sed->offs + offsetof(ohci_ed_t, ed_headp), 2378 sizeof(sed->ed.ed_headp), 2379 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2380 } else { 2381 DPRINTFN(1,("ohci_abort_xfer: no hit\n")); 2382 } 2383 2384 /* 2385 * Step 4: Turn on hardware again. 2386 */ 2387 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2388 sizeof(sed->ed.ed_flags), 2389 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2390 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */ 2391 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2392 sizeof(sed->ed.ed_flags), 2393 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2394 2395 /* 2396 * Step 5: Execute callback. 2397 */ 2398 wake = xfer->hcflags & UXFER_ABORTWAIT; 2399 xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT); 2400 usb_transfer_complete(xfer); 2401 if (wake) 2402 wakeup(&xfer->hcflags); 2403 2404 splx(s); 2405 } 2406 2407 /* 2408 * Data structures and routines to emulate the root hub. 2409 */ 2410 Static usb_device_descriptor_t ohci_devd = { 2411 USB_DEVICE_DESCRIPTOR_SIZE, 2412 UDESC_DEVICE, /* type */ 2413 {0x00, 0x01}, /* USB version */ 2414 UDCLASS_HUB, /* class */ 2415 UDSUBCLASS_HUB, /* subclass */ 2416 UDPROTO_FSHUB, 2417 64, /* max packet */ 2418 {0},{0},{0x00,0x01}, /* device id */ 2419 1,2,0, /* string indicies */ 2420 1 /* # of configurations */ 2421 }; 2422 2423 Static const usb_config_descriptor_t ohci_confd = { 2424 USB_CONFIG_DESCRIPTOR_SIZE, 2425 UDESC_CONFIG, 2426 {USB_CONFIG_DESCRIPTOR_SIZE + 2427 USB_INTERFACE_DESCRIPTOR_SIZE + 2428 USB_ENDPOINT_DESCRIPTOR_SIZE}, 2429 1, 2430 1, 2431 0, 2432 UC_ATTR_MBO | UC_SELF_POWERED, 2433 0 /* max power */ 2434 }; 2435 2436 Static const usb_interface_descriptor_t ohci_ifcd = { 2437 USB_INTERFACE_DESCRIPTOR_SIZE, 2438 UDESC_INTERFACE, 2439 0, 2440 0, 2441 1, 2442 UICLASS_HUB, 2443 UISUBCLASS_HUB, 2444 UIPROTO_FSHUB, 2445 0 2446 }; 2447 2448 Static const usb_endpoint_descriptor_t ohci_endpd = { 2449 .bLength = USB_ENDPOINT_DESCRIPTOR_SIZE, 2450 .bDescriptorType = UDESC_ENDPOINT, 2451 .bEndpointAddress = UE_DIR_IN | OHCI_INTR_ENDPT, 2452 .bmAttributes = UE_INTERRUPT, 2453 .wMaxPacketSize = {8, 0}, /* max packet */ 2454 .bInterval = 255, 2455 }; 2456 2457 Static const usb_hub_descriptor_t ohci_hubd = { 2458 .bDescLength = USB_HUB_DESCRIPTOR_SIZE, 2459 .bDescriptorType = UDESC_HUB, 2460 }; 2461 2462 /* 2463 * Simulate a hardware hub by handling all the necessary requests. 2464 */ 2465 Static usbd_status 2466 ohci_root_ctrl_transfer(usbd_xfer_handle xfer) 2467 { 2468 usbd_status err; 2469 2470 /* Insert last in queue. */ 2471 err = usb_insert_transfer(xfer); 2472 if (err) 2473 return (err); 2474 2475 /* Pipe isn't running, start first */ 2476 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2477 } 2478 2479 Static usbd_status 2480 ohci_root_ctrl_start(usbd_xfer_handle xfer) 2481 { 2482 ohci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2483 usb_device_request_t *req; 2484 void *buf = NULL; 2485 int port, i; 2486 int s, len, value, index, l, totlen = 0; 2487 usb_port_status_t ps; 2488 usb_hub_descriptor_t hubd; 2489 usbd_status err; 2490 u_int32_t v; 2491 2492 if (sc->sc_dying) 2493 return (USBD_IOERROR); 2494 2495 #ifdef DIAGNOSTIC 2496 if (!(xfer->rqflags & URQ_REQUEST)) 2497 /* XXX panic */ 2498 return (USBD_INVAL); 2499 #endif 2500 req = &xfer->request; 2501 2502 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 2503 req->bmRequestType, req->bRequest)); 2504 2505 len = UGETW(req->wLength); 2506 value = UGETW(req->wValue); 2507 index = UGETW(req->wIndex); 2508 2509 if (len != 0) 2510 buf = KERNADDR(&xfer->dmabuf, 0); 2511 2512 #define C(x,y) ((x) | ((y) << 8)) 2513 switch(C(req->bRequest, req->bmRequestType)) { 2514 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 2515 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 2516 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 2517 /* 2518 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 2519 * for the integrated root hub. 2520 */ 2521 break; 2522 case C(UR_GET_CONFIG, UT_READ_DEVICE): 2523 if (len > 0) { 2524 *(u_int8_t *)buf = sc->sc_conf; 2525 totlen = 1; 2526 } 2527 break; 2528 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2529 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 2530 if (len == 0) 2531 break; 2532 switch(value >> 8) { 2533 case UDESC_DEVICE: 2534 if ((value & 0xff) != 0) { 2535 err = USBD_IOERROR; 2536 goto ret; 2537 } 2538 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 2539 USETW(ohci_devd.idVendor, sc->sc_id_vendor); 2540 memcpy(buf, &ohci_devd, l); 2541 break; 2542 case UDESC_CONFIG: 2543 if ((value & 0xff) != 0) { 2544 err = USBD_IOERROR; 2545 goto ret; 2546 } 2547 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 2548 memcpy(buf, &ohci_confd, l); 2549 buf = (char *)buf + l; 2550 len -= l; 2551 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 2552 totlen += l; 2553 memcpy(buf, &ohci_ifcd, l); 2554 buf = (char *)buf + l; 2555 len -= l; 2556 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 2557 totlen += l; 2558 memcpy(buf, &ohci_endpd, l); 2559 break; 2560 case UDESC_STRING: 2561 #define sd ((usb_string_descriptor_t *)buf) 2562 switch (value & 0xff) { 2563 case 0: /* Language table */ 2564 totlen = usb_makelangtbl(sd, len); 2565 break; 2566 case 1: /* Vendor */ 2567 totlen = usb_makestrdesc(sd, len, 2568 sc->sc_vendor); 2569 break; 2570 case 2: /* Product */ 2571 totlen = usb_makestrdesc(sd, len, 2572 "OHCI root hub"); 2573 break; 2574 } 2575 #undef sd 2576 break; 2577 default: 2578 err = USBD_IOERROR; 2579 goto ret; 2580 } 2581 break; 2582 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 2583 if (len > 0) { 2584 *(u_int8_t *)buf = 0; 2585 totlen = 1; 2586 } 2587 break; 2588 case C(UR_GET_STATUS, UT_READ_DEVICE): 2589 if (len > 1) { 2590 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 2591 totlen = 2; 2592 } 2593 break; 2594 case C(UR_GET_STATUS, UT_READ_INTERFACE): 2595 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 2596 if (len > 1) { 2597 USETW(((usb_status_t *)buf)->wStatus, 0); 2598 totlen = 2; 2599 } 2600 break; 2601 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 2602 if (value >= USB_MAX_DEVICES) { 2603 err = USBD_IOERROR; 2604 goto ret; 2605 } 2606 sc->sc_addr = value; 2607 break; 2608 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 2609 if (value != 0 && value != 1) { 2610 err = USBD_IOERROR; 2611 goto ret; 2612 } 2613 sc->sc_conf = value; 2614 break; 2615 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 2616 break; 2617 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 2618 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 2619 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 2620 err = USBD_IOERROR; 2621 goto ret; 2622 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 2623 break; 2624 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 2625 break; 2626 /* Hub requests */ 2627 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2628 break; 2629 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2630 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 2631 "port=%d feature=%d\n", 2632 index, value)); 2633 if (index < 1 || index > sc->sc_noport) { 2634 err = USBD_IOERROR; 2635 goto ret; 2636 } 2637 port = OHCI_RH_PORT_STATUS(index); 2638 switch(value) { 2639 case UHF_PORT_ENABLE: 2640 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2641 break; 2642 case UHF_PORT_SUSPEND: 2643 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2644 break; 2645 case UHF_PORT_POWER: 2646 /* Yes, writing to the LOW_SPEED bit clears power. */ 2647 OWRITE4(sc, port, UPS_LOW_SPEED); 2648 break; 2649 case UHF_C_PORT_CONNECTION: 2650 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2651 break; 2652 case UHF_C_PORT_ENABLE: 2653 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2654 break; 2655 case UHF_C_PORT_SUSPEND: 2656 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2657 break; 2658 case UHF_C_PORT_OVER_CURRENT: 2659 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2660 break; 2661 case UHF_C_PORT_RESET: 2662 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2663 break; 2664 default: 2665 err = USBD_IOERROR; 2666 goto ret; 2667 } 2668 switch(value) { 2669 case UHF_C_PORT_CONNECTION: 2670 case UHF_C_PORT_ENABLE: 2671 case UHF_C_PORT_SUSPEND: 2672 case UHF_C_PORT_OVER_CURRENT: 2673 case UHF_C_PORT_RESET: 2674 /* Enable RHSC interrupt if condition is cleared. */ 2675 if ((OREAD4(sc, port) >> 16) == 0) 2676 ohci_rhsc_enable(sc); 2677 break; 2678 default: 2679 break; 2680 } 2681 break; 2682 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2683 if (len == 0) 2684 break; 2685 if ((value & 0xff) != 0) { 2686 err = USBD_IOERROR; 2687 goto ret; 2688 } 2689 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2690 hubd = ohci_hubd; 2691 hubd.bNbrPorts = sc->sc_noport; 2692 USETW(hubd.wHubCharacteristics, 2693 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2694 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2695 /* XXX overcurrent */ 2696 ); 2697 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2698 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2699 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2700 hubd.DeviceRemovable[i++] = (u_int8_t)v; 2701 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2702 l = min(len, hubd.bDescLength); 2703 totlen = l; 2704 memcpy(buf, &hubd, l); 2705 break; 2706 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2707 if (len != 4) { 2708 err = USBD_IOERROR; 2709 goto ret; 2710 } 2711 memset(buf, 0, len); /* ? XXX */ 2712 totlen = len; 2713 break; 2714 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2715 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 2716 index)); 2717 if (index < 1 || index > sc->sc_noport) { 2718 err = USBD_IOERROR; 2719 goto ret; 2720 } 2721 if (len != 4) { 2722 err = USBD_IOERROR; 2723 goto ret; 2724 } 2725 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2726 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 2727 v)); 2728 USETW(ps.wPortStatus, v); 2729 USETW(ps.wPortChange, v >> 16); 2730 l = min(len, sizeof ps); 2731 memcpy(buf, &ps, l); 2732 totlen = l; 2733 break; 2734 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2735 err = USBD_IOERROR; 2736 goto ret; 2737 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2738 break; 2739 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2740 if (index < 1 || index > sc->sc_noport) { 2741 err = USBD_IOERROR; 2742 goto ret; 2743 } 2744 port = OHCI_RH_PORT_STATUS(index); 2745 switch(value) { 2746 case UHF_PORT_ENABLE: 2747 OWRITE4(sc, port, UPS_PORT_ENABLED); 2748 break; 2749 case UHF_PORT_SUSPEND: 2750 OWRITE4(sc, port, UPS_SUSPEND); 2751 break; 2752 case UHF_PORT_RESET: 2753 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 2754 index)); 2755 OWRITE4(sc, port, UPS_RESET); 2756 for (i = 0; i < 5; i++) { 2757 usb_delay_ms(&sc->sc_bus, 2758 USB_PORT_ROOT_RESET_DELAY); 2759 if (sc->sc_dying) { 2760 err = USBD_IOERROR; 2761 goto ret; 2762 } 2763 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2764 break; 2765 } 2766 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 2767 index, OREAD4(sc, port))); 2768 break; 2769 case UHF_PORT_POWER: 2770 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 2771 "%d\n", index)); 2772 OWRITE4(sc, port, UPS_PORT_POWER); 2773 break; 2774 default: 2775 err = USBD_IOERROR; 2776 goto ret; 2777 } 2778 break; 2779 default: 2780 err = USBD_IOERROR; 2781 goto ret; 2782 } 2783 xfer->actlen = totlen; 2784 err = USBD_NORMAL_COMPLETION; 2785 ret: 2786 xfer->status = err; 2787 s = splusb(); 2788 usb_transfer_complete(xfer); 2789 splx(s); 2790 return (USBD_IN_PROGRESS); 2791 } 2792 2793 /* Abort a root control request. */ 2794 Static void 2795 ohci_root_ctrl_abort(usbd_xfer_handle xfer) 2796 { 2797 /* Nothing to do, all transfers are synchronous. */ 2798 } 2799 2800 /* Close the root pipe. */ 2801 Static void 2802 ohci_root_ctrl_close(usbd_pipe_handle pipe) 2803 { 2804 DPRINTF(("ohci_root_ctrl_close\n")); 2805 /* Nothing to do. */ 2806 } 2807 2808 Static usbd_status 2809 ohci_root_intr_transfer(usbd_xfer_handle xfer) 2810 { 2811 usbd_status err; 2812 2813 /* Insert last in queue. */ 2814 err = usb_insert_transfer(xfer); 2815 if (err) 2816 return (err); 2817 2818 /* Pipe isn't running, start first */ 2819 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2820 } 2821 2822 Static usbd_status 2823 ohci_root_intr_start(usbd_xfer_handle xfer) 2824 { 2825 usbd_pipe_handle pipe = xfer->pipe; 2826 ohci_softc_t *sc = pipe->device->bus->hci_private; 2827 2828 if (sc->sc_dying) 2829 return (USBD_IOERROR); 2830 2831 sc->sc_intrxfer = xfer; 2832 2833 return (USBD_IN_PROGRESS); 2834 } 2835 2836 /* Abort a root interrupt request. */ 2837 Static void 2838 ohci_root_intr_abort(usbd_xfer_handle xfer) 2839 { 2840 int s; 2841 2842 if (xfer->pipe->intrxfer == xfer) { 2843 DPRINTF(("ohci_root_intr_abort: remove\n")); 2844 xfer->pipe->intrxfer = NULL; 2845 } 2846 xfer->status = USBD_CANCELLED; 2847 s = splusb(); 2848 usb_transfer_complete(xfer); 2849 splx(s); 2850 } 2851 2852 /* Close the root pipe. */ 2853 Static void 2854 ohci_root_intr_close(usbd_pipe_handle pipe) 2855 { 2856 ohci_softc_t *sc = pipe->device->bus->hci_private; 2857 2858 DPRINTF(("ohci_root_intr_close\n")); 2859 2860 sc->sc_intrxfer = NULL; 2861 } 2862 2863 /************************/ 2864 2865 Static usbd_status 2866 ohci_device_ctrl_transfer(usbd_xfer_handle xfer) 2867 { 2868 usbd_status err; 2869 2870 /* Insert last in queue. */ 2871 err = usb_insert_transfer(xfer); 2872 if (err) 2873 return (err); 2874 2875 /* Pipe isn't running, start first */ 2876 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2877 } 2878 2879 Static usbd_status 2880 ohci_device_ctrl_start(usbd_xfer_handle xfer) 2881 { 2882 ohci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2883 usbd_status err; 2884 2885 if (sc->sc_dying) 2886 return (USBD_IOERROR); 2887 2888 #ifdef DIAGNOSTIC 2889 if (!(xfer->rqflags & URQ_REQUEST)) { 2890 /* XXX panic */ 2891 printf("ohci_device_ctrl_transfer: not a request\n"); 2892 return (USBD_INVAL); 2893 } 2894 #endif 2895 2896 err = ohci_device_request(xfer); 2897 if (err) 2898 return (err); 2899 2900 if (sc->sc_bus.use_polling) 2901 ohci_waitintr(sc, xfer); 2902 return (USBD_IN_PROGRESS); 2903 } 2904 2905 /* Abort a device control request. */ 2906 Static void 2907 ohci_device_ctrl_abort(usbd_xfer_handle xfer) 2908 { 2909 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer)); 2910 ohci_abort_xfer(xfer, USBD_CANCELLED); 2911 } 2912 2913 /* Close a device control pipe. */ 2914 Static void 2915 ohci_device_ctrl_close(usbd_pipe_handle pipe) 2916 { 2917 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2918 ohci_softc_t *sc = pipe->device->bus->hci_private; 2919 2920 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe)); 2921 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2922 ohci_free_std(sc, opipe->tail.td); 2923 } 2924 2925 /************************/ 2926 2927 Static void 2928 ohci_device_clear_toggle(usbd_pipe_handle pipe) 2929 { 2930 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2931 ohci_softc_t *sc = pipe->device->bus->hci_private; 2932 2933 opipe->sed->ed.ed_headp &= HTOO32(~OHCI_TOGGLECARRY); 2934 } 2935 2936 Static void 2937 ohci_noop(usbd_pipe_handle pipe) 2938 { 2939 } 2940 2941 Static usbd_status 2942 ohci_device_bulk_transfer(usbd_xfer_handle xfer) 2943 { 2944 usbd_status err; 2945 2946 /* Insert last in queue. */ 2947 err = usb_insert_transfer(xfer); 2948 if (err) 2949 return (err); 2950 2951 /* Pipe isn't running, start first */ 2952 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2953 } 2954 2955 Static usbd_status 2956 ohci_device_bulk_start(usbd_xfer_handle xfer) 2957 { 2958 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2959 usbd_device_handle dev = opipe->pipe.device; 2960 ohci_softc_t *sc = dev->bus->hci_private; 2961 int addr = dev->address; 2962 ohci_soft_td_t *data, *tail, *tdp; 2963 ohci_soft_ed_t *sed; 2964 int s, len, isread, endpt; 2965 usbd_status err; 2966 2967 if (sc->sc_dying) 2968 return (USBD_IOERROR); 2969 2970 #ifdef DIAGNOSTIC 2971 if (xfer->rqflags & URQ_REQUEST) { 2972 /* XXX panic */ 2973 printf("ohci_device_bulk_start: a request\n"); 2974 return (USBD_INVAL); 2975 } 2976 #endif 2977 2978 len = xfer->length; 2979 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 2980 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2981 sed = opipe->sed; 2982 2983 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d " 2984 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags, 2985 endpt)); 2986 2987 opipe->u.bulk.isread = isread; 2988 opipe->u.bulk.length = len; 2989 2990 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 2991 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2992 /* Update device address */ 2993 sed->ed.ed_flags = HTOO32( 2994 (O32TOH(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) | 2995 OHCI_ED_SET_FA(addr)); 2996 2997 /* Allocate a chain of new TDs (including a new tail). */ 2998 data = opipe->tail.td; 2999 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 3000 data, &tail); 3001 /* We want interrupt at the end of the transfer. */ 3002 tail->td.td_flags &= HTOO32(~OHCI_TD_INTR_MASK); 3003 tail->td.td_flags |= HTOO32(OHCI_TD_SET_DI(1)); 3004 tail->flags |= OHCI_CALL_DONE; 3005 tail = tail->nexttd; /* point at sentinel */ 3006 usb_syncmem(&tail->dma, tail->offs + offsetof(ohci_td_t, td_flags), 3007 sizeof(tail->td.td_flags), 3008 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3009 if (err) 3010 return (err); 3011 3012 tail->xfer = NULL; 3013 xfer->hcpriv = data; 3014 3015 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x " 3016 "td_cbp=0x%08x td_be=0x%08x\n", 3017 (int)O32TOH(sed->ed.ed_flags), 3018 (int)O32TOH(data->td.td_flags), 3019 (int)O32TOH(data->td.td_cbp), 3020 (int)O32TOH(data->td.td_be))); 3021 3022 #ifdef OHCI_DEBUG 3023 if (ohcidebug > 5) { 3024 ohci_dump_ed(sc, sed); 3025 ohci_dump_tds(sc, data); 3026 } 3027 #endif 3028 3029 /* Insert ED in schedule */ 3030 s = splusb(); 3031 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 3032 tdp->xfer = xfer; 3033 } 3034 sed->ed.ed_tailp = HTOO32(tail->physaddr); 3035 opipe->tail.td = tail; 3036 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3037 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3038 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3039 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 3040 if (xfer->timeout && !sc->sc_bus.use_polling) { 3041 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 3042 ohci_timeout, xfer); 3043 } 3044 3045 #if 0 3046 /* This goes wrong if we are too slow. */ 3047 if (ohcidebug > 10) { 3048 delay(10000); 3049 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 3050 OREAD4(sc, OHCI_COMMAND_STATUS))); 3051 ohci_dump_ed(sc, sed); 3052 ohci_dump_tds(sc, data); 3053 } 3054 #endif 3055 3056 splx(s); 3057 3058 return (USBD_IN_PROGRESS); 3059 } 3060 3061 Static void 3062 ohci_device_bulk_abort(usbd_xfer_handle xfer) 3063 { 3064 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer)); 3065 ohci_abort_xfer(xfer, USBD_CANCELLED); 3066 } 3067 3068 /* 3069 * Close a device bulk pipe. 3070 */ 3071 Static void 3072 ohci_device_bulk_close(usbd_pipe_handle pipe) 3073 { 3074 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3075 ohci_softc_t *sc = pipe->device->bus->hci_private; 3076 3077 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe)); 3078 ohci_close_pipe(pipe, sc->sc_bulk_head); 3079 ohci_free_std(sc, opipe->tail.td); 3080 } 3081 3082 /************************/ 3083 3084 Static usbd_status 3085 ohci_device_intr_transfer(usbd_xfer_handle xfer) 3086 { 3087 usbd_status err; 3088 3089 /* Insert last in queue. */ 3090 err = usb_insert_transfer(xfer); 3091 if (err) 3092 return (err); 3093 3094 /* Pipe isn't running, start first */ 3095 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 3096 } 3097 3098 Static usbd_status 3099 ohci_device_intr_start(usbd_xfer_handle xfer) 3100 { 3101 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3102 usbd_device_handle dev = opipe->pipe.device; 3103 ohci_softc_t *sc = dev->bus->hci_private; 3104 ohci_soft_ed_t *sed = opipe->sed; 3105 ohci_soft_td_t *data, *tail; 3106 int s, len, isread, endpt; 3107 3108 if (sc->sc_dying) 3109 return (USBD_IOERROR); 3110 3111 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d " 3112 "flags=%d priv=%p\n", 3113 xfer, xfer->length, xfer->flags, xfer->priv)); 3114 3115 #ifdef DIAGNOSTIC 3116 if (xfer->rqflags & URQ_REQUEST) 3117 panic("ohci_device_intr_transfer: a request"); 3118 #endif 3119 3120 len = xfer->length; 3121 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 3122 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3123 3124 data = opipe->tail.td; 3125 tail = ohci_alloc_std(sc); 3126 if (tail == NULL) 3127 return (USBD_NOMEM); 3128 tail->xfer = NULL; 3129 3130 data->td.td_flags = HTOO32( 3131 isread ? OHCI_TD_IN : OHCI_TD_OUT | 3132 OHCI_TD_NOCC | 3133 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 3134 if (xfer->flags & USBD_SHORT_XFER_OK) 3135 data->td.td_flags |= HTOO32(OHCI_TD_R); 3136 data->td.td_cbp = HTOO32(DMAADDR(&xfer->dmabuf, 0)); 3137 data->nexttd = tail; 3138 data->td.td_nexttd = HTOO32(tail->physaddr); 3139 data->td.td_be = HTOO32(O32TOH(data->td.td_cbp) + len - 1); 3140 data->len = len; 3141 data->xfer = xfer; 3142 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 3143 usb_syncmem(&data->dma, data->offs, sizeof(data->td), 3144 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3145 xfer->hcpriv = data; 3146 3147 #ifdef OHCI_DEBUG 3148 if (ohcidebug > 5) { 3149 DPRINTF(("ohci_device_intr_transfer:\n")); 3150 ohci_dump_ed(sc, sed); 3151 ohci_dump_tds(sc, data); 3152 } 3153 #endif 3154 3155 /* Insert ED in schedule */ 3156 s = splusb(); 3157 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3158 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3159 sed->ed.ed_tailp = HTOO32(tail->physaddr); 3160 opipe->tail.td = tail; 3161 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3162 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3163 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3164 3165 #if 0 3166 /* 3167 * This goes horribly wrong, printing thousands of descriptors, 3168 * because false references are followed due to the fact that the 3169 * TD is gone. 3170 */ 3171 if (ohcidebug > 5) { 3172 usb_delay_ms(&sc->sc_bus, 5); 3173 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 3174 OREAD4(sc, OHCI_COMMAND_STATUS))); 3175 ohci_dump_ed(sc, sed); 3176 ohci_dump_tds(sc, data); 3177 } 3178 #endif 3179 splx(s); 3180 3181 return (USBD_IN_PROGRESS); 3182 } 3183 3184 /* Abort a device control request. */ 3185 Static void 3186 ohci_device_intr_abort(usbd_xfer_handle xfer) 3187 { 3188 if (xfer->pipe->intrxfer == xfer) { 3189 DPRINTF(("ohci_device_intr_abort: remove\n")); 3190 xfer->pipe->intrxfer = NULL; 3191 } 3192 ohci_abort_xfer(xfer, USBD_CANCELLED); 3193 } 3194 3195 /* Close a device interrupt pipe. */ 3196 Static void 3197 ohci_device_intr_close(usbd_pipe_handle pipe) 3198 { 3199 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3200 ohci_softc_t *sc = pipe->device->bus->hci_private; 3201 int nslots = opipe->u.intr.nslots; 3202 int pos = opipe->u.intr.pos; 3203 int j; 3204 ohci_soft_ed_t *p, *sed = opipe->sed; 3205 int s; 3206 3207 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 3208 pipe, nslots, pos)); 3209 s = splusb(); 3210 usb_syncmem(&sed->dma, sed->offs, 3211 sizeof(sed->ed), BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3212 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 3213 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3214 sizeof(sed->ed.ed_flags), 3215 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3216 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 3217 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) 3218 usb_delay_ms(&sc->sc_bus, 2); 3219 3220 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 3221 continue; 3222 #ifdef DIAGNOSTIC 3223 if (p == NULL) 3224 panic("ohci_device_intr_close: ED not found"); 3225 #endif 3226 p->next = sed->next; 3227 p->ed.ed_nexted = sed->ed.ed_nexted; 3228 usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted), 3229 sizeof(p->ed.ed_nexted), 3230 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3231 splx(s); 3232 3233 for (j = 0; j < nslots; j++) 3234 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 3235 3236 ohci_free_std(sc, opipe->tail.td); 3237 ohci_free_sed(sc, opipe->sed); 3238 } 3239 3240 Static usbd_status 3241 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival) 3242 { 3243 int i, j, s, best; 3244 u_int npoll, slow, shigh, nslots; 3245 u_int bestbw, bw; 3246 ohci_soft_ed_t *hsed, *sed = opipe->sed; 3247 3248 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 3249 if (ival == 0) { 3250 printf("ohci_setintr: 0 interval\n"); 3251 return (USBD_INVAL); 3252 } 3253 3254 npoll = OHCI_NO_INTRS; 3255 while (npoll > ival) 3256 npoll /= 2; 3257 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 3258 3259 /* 3260 * We now know which level in the tree the ED must go into. 3261 * Figure out which slot has most bandwidth left over. 3262 * Slots to examine: 3263 * npoll 3264 * 1 0 3265 * 2 1 2 3266 * 4 3 4 5 6 3267 * 8 7 8 9 10 11 12 13 14 3268 * N (N-1) .. (N-1+N-1) 3269 */ 3270 slow = npoll-1; 3271 shigh = slow + npoll; 3272 nslots = OHCI_NO_INTRS / npoll; 3273 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 3274 bw = 0; 3275 for (j = 0; j < nslots; j++) 3276 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 3277 if (bw < bestbw) { 3278 best = i; 3279 bestbw = bw; 3280 } 3281 } 3282 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 3283 best, slow, shigh, bestbw)); 3284 3285 s = splusb(); 3286 hsed = sc->sc_eds[best]; 3287 sed->next = hsed->next; 3288 usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags), 3289 sizeof(hsed->ed.ed_flags), 3290 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3291 sed->ed.ed_nexted = hsed->ed.ed_nexted; 3292 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3293 sizeof(sed->ed.ed_flags), 3294 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3295 hsed->next = sed; 3296 hsed->ed.ed_nexted = HTOO32(sed->physaddr); 3297 usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags), 3298 sizeof(hsed->ed.ed_flags), 3299 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3300 splx(s); 3301 3302 for (j = 0; j < nslots; j++) 3303 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 3304 opipe->u.intr.nslots = nslots; 3305 opipe->u.intr.pos = best; 3306 3307 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 3308 return (USBD_NORMAL_COMPLETION); 3309 } 3310 3311 /***********************/ 3312 3313 usbd_status 3314 ohci_device_isoc_transfer(usbd_xfer_handle xfer) 3315 { 3316 usbd_status err; 3317 3318 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer)); 3319 3320 /* Put it on our queue, */ 3321 err = usb_insert_transfer(xfer); 3322 3323 /* bail out on error, */ 3324 if (err && err != USBD_IN_PROGRESS) 3325 return (err); 3326 3327 /* XXX should check inuse here */ 3328 3329 /* insert into schedule, */ 3330 ohci_device_isoc_enter(xfer); 3331 3332 /* and start if the pipe wasn't running */ 3333 if (!err) 3334 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 3335 3336 return (err); 3337 } 3338 3339 void 3340 ohci_device_isoc_enter(usbd_xfer_handle xfer) 3341 { 3342 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3343 usbd_device_handle dev = opipe->pipe.device; 3344 ohci_softc_t *sc = dev->bus->hci_private; 3345 ohci_soft_ed_t *sed = opipe->sed; 3346 struct iso *iso = &opipe->u.iso; 3347 ohci_soft_itd_t *sitd, *nsitd; 3348 ohci_physaddr_t buf, offs, noffs, bp0; 3349 int i, ncur, nframes; 3350 int s; 3351 3352 DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p " 3353 "nframes=%d\n", 3354 iso->inuse, iso->next, xfer, xfer->nframes)); 3355 3356 if (sc->sc_dying) 3357 return; 3358 3359 if (iso->next == -1) { 3360 /* Not in use yet, schedule it a few frames ahead. */ 3361 iso->next = O32TOH(sc->sc_hcca->hcca_frame_number) + 5; 3362 DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n", 3363 iso->next)); 3364 } 3365 3366 sitd = opipe->tail.itd; 3367 buf = DMAADDR(&xfer->dmabuf, 0); 3368 bp0 = OHCI_PAGE(buf); 3369 offs = OHCI_PAGE_OFFSET(buf); 3370 nframes = xfer->nframes; 3371 xfer->hcpriv = sitd; 3372 for (i = ncur = 0; i < nframes; i++, ncur++) { 3373 noffs = offs + xfer->frlengths[i]; 3374 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ 3375 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */ 3376 3377 /* Allocate next ITD */ 3378 nsitd = ohci_alloc_sitd(sc); 3379 if (nsitd == NULL) { 3380 /* XXX what now? */ 3381 printf("%s: isoc TD alloc failed\n", 3382 device_xname(sc->sc_dev)); 3383 return; 3384 } 3385 3386 /* Fill current ITD */ 3387 sitd->itd.itd_flags = HTOO32( 3388 OHCI_ITD_NOCC | 3389 OHCI_ITD_SET_SF(iso->next) | 3390 OHCI_ITD_SET_DI(6) | /* delay intr a little */ 3391 OHCI_ITD_SET_FC(ncur)); 3392 sitd->itd.itd_bp0 = HTOO32(bp0); 3393 sitd->nextitd = nsitd; 3394 sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr); 3395 sitd->itd.itd_be = HTOO32(bp0 + offs - 1); 3396 sitd->xfer = xfer; 3397 sitd->flags = 0; 3398 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 3399 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3400 3401 sitd = nsitd; 3402 iso->next = iso->next + ncur; 3403 bp0 = OHCI_PAGE(buf + offs); 3404 ncur = 0; 3405 } 3406 sitd->itd.itd_offset[ncur] = HTOO16(OHCI_ITD_MK_OFFS(offs)); 3407 offs = noffs; 3408 } 3409 nsitd = ohci_alloc_sitd(sc); 3410 if (nsitd == NULL) { 3411 /* XXX what now? */ 3412 printf("%s: isoc TD alloc failed\n", 3413 device_xname(sc->sc_dev)); 3414 return; 3415 } 3416 /* Fixup last used ITD */ 3417 sitd->itd.itd_flags = HTOO32( 3418 OHCI_ITD_NOCC | 3419 OHCI_ITD_SET_SF(iso->next) | 3420 OHCI_ITD_SET_DI(0) | 3421 OHCI_ITD_SET_FC(ncur)); 3422 sitd->itd.itd_bp0 = HTOO32(bp0); 3423 sitd->nextitd = nsitd; 3424 sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr); 3425 sitd->itd.itd_be = HTOO32(bp0 + offs - 1); 3426 sitd->xfer = xfer; 3427 sitd->flags = OHCI_CALL_DONE; 3428 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 3429 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3430 3431 iso->next = iso->next + ncur; 3432 iso->inuse += nframes; 3433 3434 xfer->actlen = offs; /* XXX pretend we did it all */ 3435 3436 xfer->status = USBD_IN_PROGRESS; 3437 3438 #ifdef OHCI_DEBUG 3439 if (ohcidebug > 5) { 3440 DPRINTF(("ohci_device_isoc_enter: frame=%d\n", 3441 O32TOH(sc->sc_hcca->hcca_frame_number))); 3442 ohci_dump_itds(sc, xfer->hcpriv); 3443 ohci_dump_ed(sc, sed); 3444 } 3445 #endif 3446 3447 s = splusb(); 3448 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3449 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3450 sed->ed.ed_tailp = HTOO32(nsitd->physaddr); 3451 opipe->tail.itd = nsitd; 3452 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3453 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3454 sizeof(sed->ed.ed_flags), 3455 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3456 splx(s); 3457 3458 #ifdef OHCI_DEBUG 3459 if (ohcidebug > 5) { 3460 delay(150000); 3461 DPRINTF(("ohci_device_isoc_enter: after frame=%d\n", 3462 O32TOH(sc->sc_hcca->hcca_frame_number))); 3463 ohci_dump_itds(sc, xfer->hcpriv); 3464 ohci_dump_ed(sc, sed); 3465 } 3466 #endif 3467 } 3468 3469 usbd_status 3470 ohci_device_isoc_start(usbd_xfer_handle xfer) 3471 { 3472 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3473 ohci_softc_t *sc = opipe->pipe.device->bus->hci_private; 3474 3475 DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer)); 3476 3477 if (sc->sc_dying) 3478 return (USBD_IOERROR); 3479 3480 #ifdef DIAGNOSTIC 3481 if (xfer->status != USBD_IN_PROGRESS) 3482 printf("ohci_device_isoc_start: not in progress %p\n", xfer); 3483 #endif 3484 3485 /* XXX anything to do? */ 3486 3487 return (USBD_IN_PROGRESS); 3488 } 3489 3490 void 3491 ohci_device_isoc_abort(usbd_xfer_handle xfer) 3492 { 3493 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3494 ohci_softc_t *sc = opipe->pipe.device->bus->hci_private; 3495 ohci_soft_ed_t *sed; 3496 ohci_soft_itd_t *sitd; 3497 int s; 3498 3499 s = splusb(); 3500 3501 DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer)); 3502 3503 /* Transfer is already done. */ 3504 if (xfer->status != USBD_NOT_STARTED && 3505 xfer->status != USBD_IN_PROGRESS) { 3506 splx(s); 3507 printf("ohci_device_isoc_abort: early return\n"); 3508 return; 3509 } 3510 3511 /* Give xfer the requested abort code. */ 3512 xfer->status = USBD_CANCELLED; 3513 3514 sed = opipe->sed; 3515 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3516 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3517 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */ 3518 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3519 sizeof(sed->ed.ed_flags), 3520 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3521 3522 sitd = xfer->hcpriv; 3523 #ifdef DIAGNOSTIC 3524 if (sitd == NULL) { 3525 splx(s); 3526 printf("ohci_device_isoc_abort: hcpriv==0\n"); 3527 return; 3528 } 3529 #endif 3530 for (; sitd->xfer == xfer; sitd = sitd->nextitd) { 3531 #ifdef DIAGNOSTIC 3532 DPRINTFN(1,("abort sets done sitd=%p\n", sitd)); 3533 sitd->isdone = 1; 3534 #endif 3535 } 3536 3537 splx(s); 3538 3539 usb_delay_ms(&sc->sc_bus, OHCI_ITD_NOFFSET); 3540 3541 s = splusb(); 3542 3543 /* Run callback. */ 3544 usb_transfer_complete(xfer); 3545 3546 sed->ed.ed_headp = HTOO32(sitd->physaddr); /* unlink TDs */ 3547 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */ 3548 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3549 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3550 3551 splx(s); 3552 } 3553 3554 void 3555 ohci_device_isoc_done(usbd_xfer_handle xfer) 3556 { 3557 DPRINTFN(1,("ohci_device_isoc_done: xfer=%p\n", xfer)); 3558 } 3559 3560 usbd_status 3561 ohci_setup_isoc(usbd_pipe_handle pipe) 3562 { 3563 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3564 ohci_softc_t *sc = pipe->device->bus->hci_private; 3565 struct iso *iso = &opipe->u.iso; 3566 int s; 3567 3568 iso->next = -1; 3569 iso->inuse = 0; 3570 3571 s = splusb(); 3572 ohci_add_ed(sc, opipe->sed, sc->sc_isoc_head); 3573 splx(s); 3574 3575 return (USBD_NORMAL_COMPLETION); 3576 } 3577 3578 void 3579 ohci_device_isoc_close(usbd_pipe_handle pipe) 3580 { 3581 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3582 ohci_softc_t *sc = pipe->device->bus->hci_private; 3583 3584 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe)); 3585 ohci_close_pipe(pipe, sc->sc_isoc_head); 3586 #ifdef DIAGNOSTIC 3587 opipe->tail.itd->isdone = 1; 3588 #endif 3589 ohci_free_sitd(sc, opipe->tail.itd); 3590 } 3591
Indexes created Wed Sep 24 15:09:51 GMT 2025