ohci.c revision 1.198
1 /* $NetBSD: ohci.c,v 1.198 2009/04/18 06:27:17 cegger Exp $ */ 2 /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */ 3 4 /* 5 * Copyright (c) 1998, 2004, 2005 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Lennart Augustsson (lennart (at) augustsson.net) at 10 * Carlstedt Research & Technology. 11 * This code is derived from software contributed to The NetBSD Foundation 12 * by Charles M. Hannum. 13 * 14 * Redistribution and use in source and binary forms, with or without 15 * modification, are permitted provided that the following conditions 16 * are met: 17 * 1. Redistributions of source code must retain the above copyright 18 * notice, this list of conditions and the following disclaimer. 19 * 2. Redistributions in binary form must reproduce the above copyright 20 * notice, this list of conditions and the following disclaimer in the 21 * documentation and/or other materials provided with the distribution. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 24 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 25 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 26 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 27 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 31 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 32 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 33 * POSSIBILITY OF SUCH DAMAGE. 34 */ 35 36 /* 37 * USB Open Host Controller driver. 38 * 39 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html 40 * USB spec: http://www.usb.org/developers/docs/usbspec.zip 41 */ 42 43 #include <sys/cdefs.h> 44 __KERNEL_RCSID(0, "$NetBSD: ohci.c,v 1.198 2009/04/18 06:27:17 cegger Exp $"); 45 46 #include <sys/param.h> 47 #include <sys/systm.h> 48 #include <sys/malloc.h> 49 #if defined(__NetBSD__) || defined(__OpenBSD__) 50 #include <sys/kernel.h> 51 #include <sys/device.h> 52 #include <sys/select.h> 53 #include <uvm/uvm_extern.h> 54 #elif defined(__FreeBSD__) 55 #include <sys/module.h> 56 #include <sys/bus.h> 57 #include <machine/bus_pio.h> 58 #include <machine/bus_memio.h> 59 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 60 #include <sys/cpu.h> 61 #endif 62 #endif 63 #include <sys/proc.h> 64 #include <sys/queue.h> 65 66 #include <sys/bus.h> 67 #include <machine/endian.h> 68 69 #include <dev/usb/usb.h> 70 #include <dev/usb/usbdi.h> 71 #include <dev/usb/usbdivar.h> 72 #include <dev/usb/usb_mem.h> 73 #include <dev/usb/usb_quirks.h> 74 75 #include <dev/usb/ohcireg.h> 76 #include <dev/usb/ohcivar.h> 77 #include <dev/usb/usbroothub_subr.h> 78 79 #if defined(__FreeBSD__) 80 #include <machine/clock.h> 81 82 #define delay(d) DELAY(d) 83 #endif 84 85 #if defined(__OpenBSD__) 86 struct cfdriver ohci_cd = { 87 NULL, "ohci", DV_DULL 88 }; 89 #endif 90 91 #ifdef OHCI_DEBUG 92 #define DPRINTF(x) if (ohcidebug) logprintf x 93 #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x 94 int ohcidebug = 0; 95 #ifndef __NetBSD__ 96 #define snprintb((q), (f), "%b", q,f,b,l) snprintf((b), (l)) 97 #endif 98 #else 99 #define DPRINTF(x) 100 #define DPRINTFN(n,x) 101 #endif 102 103 #if BYTE_ORDER == BIG_ENDIAN 104 #define SWAP_ENDIAN OHCI_LITTLE_ENDIAN 105 #else 106 #define SWAP_ENDIAN OHCI_BIG_ENDIAN 107 #endif 108 109 #define O16TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap16(val) : val) 110 #define O32TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap32(val) : val) 111 #define HTOO16(val) O16TOH(val) 112 #define HTOO32(val) O32TOH(val) 113 114 struct ohci_pipe; 115 116 Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *); 117 Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *); 118 119 Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *); 120 Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *); 121 122 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *); 123 Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *); 124 125 #if 0 126 Static void ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *, 127 ohci_soft_td_t *); 128 #endif 129 Static usbd_status ohci_alloc_std_chain(struct ohci_pipe *, 130 ohci_softc_t *, int, int, usbd_xfer_handle, 131 ohci_soft_td_t *, ohci_soft_td_t **); 132 133 Static usbd_status ohci_open(usbd_pipe_handle); 134 Static void ohci_poll(struct usbd_bus *); 135 Static void ohci_softintr(void *); 136 Static void ohci_waitintr(ohci_softc_t *, usbd_xfer_handle); 137 Static void ohci_rhsc(ohci_softc_t *, usbd_xfer_handle); 138 139 Static usbd_status ohci_device_request(usbd_xfer_handle xfer); 140 Static void ohci_add_ed(ohci_softc_t *, ohci_soft_ed_t *, 141 ohci_soft_ed_t *); 142 143 Static void ohci_rem_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 144 Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *); 145 Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *); 146 Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t); 147 Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *); 148 Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *); 149 Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t); 150 151 Static usbd_status ohci_setup_isoc(usbd_pipe_handle pipe); 152 Static void ohci_device_isoc_enter(usbd_xfer_handle); 153 154 Static usbd_status ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 155 Static void ohci_freem(struct usbd_bus *, usb_dma_t *); 156 157 Static usbd_xfer_handle ohci_allocx(struct usbd_bus *); 158 Static void ohci_freex(struct usbd_bus *, usbd_xfer_handle); 159 160 Static usbd_status ohci_root_ctrl_transfer(usbd_xfer_handle); 161 Static usbd_status ohci_root_ctrl_start(usbd_xfer_handle); 162 Static void ohci_root_ctrl_abort(usbd_xfer_handle); 163 Static void ohci_root_ctrl_close(usbd_pipe_handle); 164 Static void ohci_root_ctrl_done(usbd_xfer_handle); 165 166 Static usbd_status ohci_root_intr_transfer(usbd_xfer_handle); 167 Static usbd_status ohci_root_intr_start(usbd_xfer_handle); 168 Static void ohci_root_intr_abort(usbd_xfer_handle); 169 Static void ohci_root_intr_close(usbd_pipe_handle); 170 Static void ohci_root_intr_done(usbd_xfer_handle); 171 172 Static usbd_status ohci_device_ctrl_transfer(usbd_xfer_handle); 173 Static usbd_status ohci_device_ctrl_start(usbd_xfer_handle); 174 Static void ohci_device_ctrl_abort(usbd_xfer_handle); 175 Static void ohci_device_ctrl_close(usbd_pipe_handle); 176 Static void ohci_device_ctrl_done(usbd_xfer_handle); 177 178 Static usbd_status ohci_device_bulk_transfer(usbd_xfer_handle); 179 Static usbd_status ohci_device_bulk_start(usbd_xfer_handle); 180 Static void ohci_device_bulk_abort(usbd_xfer_handle); 181 Static void ohci_device_bulk_close(usbd_pipe_handle); 182 Static void ohci_device_bulk_done(usbd_xfer_handle); 183 184 Static usbd_status ohci_device_intr_transfer(usbd_xfer_handle); 185 Static usbd_status ohci_device_intr_start(usbd_xfer_handle); 186 Static void ohci_device_intr_abort(usbd_xfer_handle); 187 Static void ohci_device_intr_close(usbd_pipe_handle); 188 Static void ohci_device_intr_done(usbd_xfer_handle); 189 190 Static usbd_status ohci_device_isoc_transfer(usbd_xfer_handle); 191 Static usbd_status ohci_device_isoc_start(usbd_xfer_handle); 192 Static void ohci_device_isoc_abort(usbd_xfer_handle); 193 Static void ohci_device_isoc_close(usbd_pipe_handle); 194 Static void ohci_device_isoc_done(usbd_xfer_handle); 195 196 Static usbd_status ohci_device_setintr(ohci_softc_t *sc, 197 struct ohci_pipe *pipe, int ival); 198 199 Static void ohci_timeout(void *); 200 Static void ohci_timeout_task(void *); 201 Static void ohci_rhsc_enable(void *); 202 203 Static void ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *); 204 Static void ohci_abort_xfer(usbd_xfer_handle, usbd_status); 205 206 Static void ohci_device_clear_toggle(usbd_pipe_handle pipe); 207 Static void ohci_noop(usbd_pipe_handle pipe); 208 209 #ifdef OHCI_DEBUG 210 Static void ohci_dumpregs(ohci_softc_t *); 211 Static void ohci_dump_tds(ohci_softc_t *, ohci_soft_td_t *); 212 Static void ohci_dump_td(ohci_softc_t *, ohci_soft_td_t *); 213 Static void ohci_dump_ed(ohci_softc_t *, ohci_soft_ed_t *); 214 Static void ohci_dump_itd(ohci_softc_t *, ohci_soft_itd_t *); 215 Static void ohci_dump_itds(ohci_softc_t *, ohci_soft_itd_t *); 216 #endif 217 218 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 219 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 220 #define OWRITE1(sc, r, x) \ 221 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 222 #define OWRITE2(sc, r, x) \ 223 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 224 #define OWRITE4(sc, r, x) \ 225 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 226 static __inline uint8_t 227 OREAD1(ohci_softc_t *sc, bus_size_t r) 228 { 229 230 OBARR(sc); 231 return bus_space_read_1(sc->iot, sc->ioh, r); 232 } 233 234 static __inline uint16_t 235 OREAD2(ohci_softc_t *sc, bus_size_t r) 236 { 237 238 OBARR(sc); 239 return bus_space_read_2(sc->iot, sc->ioh, r); 240 } 241 242 static __inline uint32_t 243 OREAD4(ohci_softc_t *sc, bus_size_t r) 244 { 245 246 OBARR(sc); 247 return bus_space_read_4(sc->iot, sc->ioh, r); 248 } 249 250 /* Reverse the bits in a value 0 .. 31 */ 251 Static u_int8_t revbits[OHCI_NO_INTRS] = 252 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 253 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 254 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 255 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 256 257 struct ohci_pipe { 258 struct usbd_pipe pipe; 259 ohci_soft_ed_t *sed; 260 union { 261 ohci_soft_td_t *td; 262 ohci_soft_itd_t *itd; 263 } tail; 264 /* Info needed for different pipe kinds. */ 265 union { 266 /* Control pipe */ 267 struct { 268 usb_dma_t reqdma; 269 u_int length; 270 ohci_soft_td_t *setup, *data, *stat; 271 } ctl; 272 /* Interrupt pipe */ 273 struct { 274 int nslots; 275 int pos; 276 } intr; 277 /* Bulk pipe */ 278 struct { 279 u_int length; 280 int isread; 281 } bulk; 282 /* Iso pipe */ 283 struct iso { 284 int next, inuse; 285 } iso; 286 } u; 287 }; 288 289 #define OHCI_INTR_ENDPT 1 290 291 Static const struct usbd_bus_methods ohci_bus_methods = { 292 ohci_open, 293 ohci_softintr, 294 ohci_poll, 295 ohci_allocm, 296 ohci_freem, 297 ohci_allocx, 298 ohci_freex, 299 }; 300 301 Static const struct usbd_pipe_methods ohci_root_ctrl_methods = { 302 ohci_root_ctrl_transfer, 303 ohci_root_ctrl_start, 304 ohci_root_ctrl_abort, 305 ohci_root_ctrl_close, 306 ohci_noop, 307 ohci_root_ctrl_done, 308 }; 309 310 Static const struct usbd_pipe_methods ohci_root_intr_methods = { 311 ohci_root_intr_transfer, 312 ohci_root_intr_start, 313 ohci_root_intr_abort, 314 ohci_root_intr_close, 315 ohci_noop, 316 ohci_root_intr_done, 317 }; 318 319 Static const struct usbd_pipe_methods ohci_device_ctrl_methods = { 320 ohci_device_ctrl_transfer, 321 ohci_device_ctrl_start, 322 ohci_device_ctrl_abort, 323 ohci_device_ctrl_close, 324 ohci_noop, 325 ohci_device_ctrl_done, 326 }; 327 328 Static const struct usbd_pipe_methods ohci_device_intr_methods = { 329 ohci_device_intr_transfer, 330 ohci_device_intr_start, 331 ohci_device_intr_abort, 332 ohci_device_intr_close, 333 ohci_device_clear_toggle, 334 ohci_device_intr_done, 335 }; 336 337 Static const struct usbd_pipe_methods ohci_device_bulk_methods = { 338 ohci_device_bulk_transfer, 339 ohci_device_bulk_start, 340 ohci_device_bulk_abort, 341 ohci_device_bulk_close, 342 ohci_device_clear_toggle, 343 ohci_device_bulk_done, 344 }; 345 346 Static const struct usbd_pipe_methods ohci_device_isoc_methods = { 347 ohci_device_isoc_transfer, 348 ohci_device_isoc_start, 349 ohci_device_isoc_abort, 350 ohci_device_isoc_close, 351 ohci_noop, 352 ohci_device_isoc_done, 353 }; 354 355 #if defined(__NetBSD__) || defined(__OpenBSD__) 356 int 357 ohci_activate(device_t self, enum devact act) 358 { 359 struct ohci_softc *sc = device_private(self); 360 int rv = 0; 361 362 switch (act) { 363 case DVACT_ACTIVATE: 364 return (EOPNOTSUPP); 365 366 case DVACT_DEACTIVATE: 367 sc->sc_dying = 1; 368 if (sc->sc_child != NULL) 369 rv = config_deactivate(sc->sc_child); 370 break; 371 } 372 return (rv); 373 } 374 375 void 376 ohci_childdet(device_t self, device_t child) 377 { 378 struct ohci_softc *sc = device_private(self); 379 380 KASSERT(sc->sc_child == child); 381 sc->sc_child = NULL; 382 } 383 384 int 385 ohci_detach(struct ohci_softc *sc, int flags) 386 { 387 int rv = 0; 388 usbd_xfer_handle xfer; 389 390 if (sc->sc_child != NULL) 391 rv = config_detach(sc->sc_child, flags); 392 393 if (rv != 0) 394 return (rv); 395 396 usb_uncallout(sc->sc_tmo_rhsc, ohci_rhsc_enable, sc); 397 398 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 399 usb_callout_destroy(sc->sc_tmo_rhsc); 400 401 if (sc->sc_hcca != NULL) 402 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 403 while((xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers)) != NULL) { 404 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 405 free(xfer, M_USB); 406 } 407 408 return (rv); 409 } 410 #endif 411 412 ohci_soft_ed_t * 413 ohci_alloc_sed(ohci_softc_t *sc) 414 { 415 ohci_soft_ed_t *sed; 416 usbd_status err; 417 int i, offs; 418 usb_dma_t dma; 419 420 if (sc->sc_freeeds == NULL) { 421 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 422 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 423 OHCI_ED_ALIGN, &dma); 424 if (err) 425 return (0); 426 for(i = 0; i < OHCI_SED_CHUNK; i++) { 427 offs = i * OHCI_SED_SIZE; 428 sed = KERNADDR(&dma, offs); 429 sed->physaddr = DMAADDR(&dma, offs); 430 sed->dma = dma; 431 sed->offs = offs; 432 sed->next = sc->sc_freeeds; 433 sc->sc_freeeds = sed; 434 } 435 } 436 sed = sc->sc_freeeds; 437 sc->sc_freeeds = sed->next; 438 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 439 sed->next = 0; 440 return (sed); 441 } 442 443 void 444 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 445 { 446 sed->next = sc->sc_freeeds; 447 sc->sc_freeeds = sed; 448 } 449 450 ohci_soft_td_t * 451 ohci_alloc_std(ohci_softc_t *sc) 452 { 453 ohci_soft_td_t *std; 454 usbd_status err; 455 int i, offs; 456 usb_dma_t dma; 457 int s; 458 459 if (sc->sc_freetds == NULL) { 460 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 461 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 462 OHCI_TD_ALIGN, &dma); 463 if (err) 464 return (NULL); 465 s = splusb(); 466 for(i = 0; i < OHCI_STD_CHUNK; i++) { 467 offs = i * OHCI_STD_SIZE; 468 std = KERNADDR(&dma, offs); 469 std->physaddr = DMAADDR(&dma, offs); 470 std->dma = dma; 471 std->offs = offs; 472 std->nexttd = sc->sc_freetds; 473 sc->sc_freetds = std; 474 } 475 splx(s); 476 } 477 478 s = splusb(); 479 std = sc->sc_freetds; 480 sc->sc_freetds = std->nexttd; 481 memset(&std->td, 0, sizeof(ohci_td_t)); 482 std->nexttd = NULL; 483 std->xfer = NULL; 484 ohci_hash_add_td(sc, std); 485 splx(s); 486 487 return (std); 488 } 489 490 void 491 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std) 492 { 493 int s; 494 495 s = splusb(); 496 ohci_hash_rem_td(sc, std); 497 std->nexttd = sc->sc_freetds; 498 sc->sc_freetds = std; 499 splx(s); 500 } 501 502 usbd_status 503 ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc, 504 int alen, int rd, usbd_xfer_handle xfer, 505 ohci_soft_td_t *sp, ohci_soft_td_t **ep) 506 { 507 ohci_soft_td_t *next, *cur; 508 ohci_physaddr_t dataphys, dataphysend; 509 u_int32_t tdflags; 510 int len, curlen; 511 usb_dma_t *dma = &xfer->dmabuf; 512 u_int16_t flags = xfer->flags; 513 514 DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen)); 515 516 len = alen; 517 cur = sp; 518 dataphys = DMAADDR(dma, 0); 519 dataphysend = OHCI_PAGE(dataphys + len - 1); 520 usb_syncmem(dma, 0, len, 521 rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 522 tdflags = HTOO32( 523 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 524 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) | 525 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR); 526 527 for (;;) { 528 next = ohci_alloc_std(sc); 529 if (next == NULL) 530 goto nomem; 531 532 /* The OHCI hardware can handle at most one page crossing. */ 533 if (OHCI_PAGE(dataphys) == dataphysend || 534 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) { 535 /* we can handle it in this TD */ 536 curlen = len; 537 } else { 538 /* must use multiple TDs, fill as much as possible. */ 539 curlen = 2 * OHCI_PAGE_SIZE - 540 (dataphys & (OHCI_PAGE_SIZE-1)); 541 /* the length must be a multiple of the max size */ 542 curlen -= curlen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize); 543 #ifdef DIAGNOSTIC 544 if (curlen == 0) 545 panic("ohci_alloc_std: curlen == 0"); 546 #endif 547 } 548 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x " 549 "dataphysend=0x%08x len=%d curlen=%d\n", 550 dataphys, dataphysend, 551 len, curlen)); 552 len -= curlen; 553 554 cur->td.td_flags = tdflags; 555 cur->td.td_cbp = HTOO32(dataphys); 556 cur->nexttd = next; 557 cur->td.td_nexttd = HTOO32(next->physaddr); 558 cur->td.td_be = HTOO32(dataphys + curlen - 1); 559 cur->len = curlen; 560 cur->flags = OHCI_ADD_LEN; 561 cur->xfer = xfer; 562 usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td), 563 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 564 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n", 565 dataphys, dataphys + curlen - 1)); 566 if (len == 0) 567 break; 568 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n")); 569 dataphys += curlen; 570 cur = next; 571 } 572 if (!rd && (flags & USBD_FORCE_SHORT_XFER) && 573 alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) { 574 /* Force a 0 length transfer at the end. */ 575 576 cur = next; 577 next = ohci_alloc_std(sc); 578 if (next == NULL) 579 goto nomem; 580 581 cur->td.td_flags = tdflags; 582 cur->td.td_cbp = 0; /* indicate 0 length packet */ 583 cur->nexttd = next; 584 cur->td.td_nexttd = HTOO32(next->physaddr); 585 cur->td.td_be = ~0; 586 cur->len = 0; 587 cur->flags = 0; 588 cur->xfer = xfer; 589 usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td), 590 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 591 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n")); 592 } 593 *ep = cur; 594 595 return (USBD_NORMAL_COMPLETION); 596 597 nomem: 598 /* XXX free chain */ 599 return (USBD_NOMEM); 600 } 601 602 #if 0 603 Static void 604 ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std, 605 ohci_soft_td_t *stdend) 606 { 607 ohci_soft_td_t *p; 608 609 for (; std != stdend; std = p) { 610 p = std->nexttd; 611 ohci_free_std(sc, std); 612 } 613 } 614 #endif 615 616 ohci_soft_itd_t * 617 ohci_alloc_sitd(ohci_softc_t *sc) 618 { 619 ohci_soft_itd_t *sitd; 620 usbd_status err; 621 int i, s, offs; 622 usb_dma_t dma; 623 624 if (sc->sc_freeitds == NULL) { 625 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n")); 626 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK, 627 OHCI_ITD_ALIGN, &dma); 628 if (err) 629 return (NULL); 630 s = splusb(); 631 for(i = 0; i < OHCI_SITD_CHUNK; i++) { 632 offs = i * OHCI_SITD_SIZE; 633 sitd = KERNADDR(&dma, offs); 634 sitd->physaddr = DMAADDR(&dma, offs); 635 sitd->dma = dma; 636 sitd->offs = offs; 637 sitd->nextitd = sc->sc_freeitds; 638 sc->sc_freeitds = sitd; 639 } 640 splx(s); 641 } 642 643 s = splusb(); 644 sitd = sc->sc_freeitds; 645 sc->sc_freeitds = sitd->nextitd; 646 memset(&sitd->itd, 0, sizeof(ohci_itd_t)); 647 sitd->nextitd = NULL; 648 sitd->xfer = NULL; 649 ohci_hash_add_itd(sc, sitd); 650 splx(s); 651 652 #ifdef DIAGNOSTIC 653 sitd->isdone = 0; 654 #endif 655 656 return (sitd); 657 } 658 659 void 660 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 661 { 662 int s; 663 664 DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd)); 665 666 #ifdef DIAGNOSTIC 667 if (!sitd->isdone) { 668 panic("ohci_free_sitd: sitd=%p not done", sitd); 669 return; 670 } 671 /* Warn double free */ 672 sitd->isdone = 0; 673 #endif 674 675 s = splusb(); 676 ohci_hash_rem_itd(sc, sitd); 677 sitd->nextitd = sc->sc_freeitds; 678 sc->sc_freeitds = sitd; 679 splx(s); 680 } 681 682 usbd_status 683 ohci_init(ohci_softc_t *sc) 684 { 685 ohci_soft_ed_t *sed, *psed; 686 usbd_status err; 687 int i; 688 u_int32_t s, ctl, rwc, ival, hcr, fm, per, rev, desca, descb; 689 690 DPRINTF(("ohci_init: start\n")); 691 #if defined(__OpenBSD__) 692 printf(","); 693 #else 694 printf("%s:", device_xname(sc->sc_dev)); 695 #endif 696 sc->sc_hcca = NULL; 697 usb_callout_init(sc->sc_tmo_rhsc); 698 699 for (i = 0; i < OHCI_HASH_SIZE; i++) 700 LIST_INIT(&sc->sc_hash_tds[i]); 701 for (i = 0; i < OHCI_HASH_SIZE; i++) 702 LIST_INIT(&sc->sc_hash_itds[i]); 703 704 SIMPLEQ_INIT(&sc->sc_free_xfers); 705 706 rev = OREAD4(sc, OHCI_REVISION); 707 printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev), 708 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 709 710 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 711 printf("%s: unsupported OHCI revision\n", 712 device_xname(sc->sc_dev)); 713 sc->sc_bus.usbrev = USBREV_UNKNOWN; 714 return (USBD_INVAL); 715 } 716 sc->sc_bus.usbrev = USBREV_1_0; 717 718 #ifdef __NetBSD__ 719 usb_setup_reserve(sc->sc_dev, &sc->sc_dma_reserve, sc->sc_bus.dmatag, 720 USB_MEM_RESERVE); 721 #endif 722 723 /* XXX determine alignment by R/W */ 724 /* Allocate the HCCA area. */ 725 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 726 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 727 if (err) { 728 sc->sc_hcca = NULL; 729 return err; 730 } 731 sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0); 732 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 733 734 sc->sc_eintrs = OHCI_NORMAL_INTRS; 735 736 /* Allocate dummy ED that starts the control list. */ 737 sc->sc_ctrl_head = ohci_alloc_sed(sc); 738 if (sc->sc_ctrl_head == NULL) { 739 err = USBD_NOMEM; 740 goto bad1; 741 } 742 sc->sc_ctrl_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 743 744 /* Allocate dummy ED that starts the bulk list. */ 745 sc->sc_bulk_head = ohci_alloc_sed(sc); 746 if (sc->sc_bulk_head == NULL) { 747 err = USBD_NOMEM; 748 goto bad2; 749 } 750 sc->sc_bulk_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 751 usb_syncmem(&sc->sc_bulk_head->dma, sc->sc_bulk_head->offs, 752 sizeof(sc->sc_bulk_head->ed), 753 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 754 755 /* Allocate dummy ED that starts the isochronous list. */ 756 sc->sc_isoc_head = ohci_alloc_sed(sc); 757 if (sc->sc_isoc_head == NULL) { 758 err = USBD_NOMEM; 759 goto bad3; 760 } 761 sc->sc_isoc_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 762 usb_syncmem(&sc->sc_isoc_head->dma, sc->sc_isoc_head->offs, 763 sizeof(sc->sc_isoc_head->ed), 764 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 765 766 /* Allocate all the dummy EDs that make up the interrupt tree. */ 767 for (i = 0; i < OHCI_NO_EDS; i++) { 768 sed = ohci_alloc_sed(sc); 769 if (sed == NULL) { 770 while (--i >= 0) 771 ohci_free_sed(sc, sc->sc_eds[i]); 772 err = USBD_NOMEM; 773 goto bad4; 774 } 775 /* All ED fields are set to 0. */ 776 sc->sc_eds[i] = sed; 777 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 778 if (i != 0) 779 psed = sc->sc_eds[(i-1) / 2]; 780 else 781 psed= sc->sc_isoc_head; 782 sed->next = psed; 783 sed->ed.ed_nexted = HTOO32(psed->physaddr); 784 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 785 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 786 } 787 /* 788 * Fill HCCA interrupt table. The bit reversal is to get 789 * the tree set up properly to spread the interrupts. 790 */ 791 for (i = 0; i < OHCI_NO_INTRS; i++) 792 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 793 HTOO32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 794 usb_syncmem(&sc->sc_hccadma, 0, OHCI_HCCA_SIZE, 795 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 796 797 #ifdef OHCI_DEBUG 798 if (ohcidebug > 15) { 799 for (i = 0; i < OHCI_NO_EDS; i++) { 800 printf("ed#%d ", i); 801 ohci_dump_ed(sc, sc->sc_eds[i]); 802 } 803 printf("iso "); 804 ohci_dump_ed(sc, sc->sc_isoc_head); 805 } 806 #endif 807 808 /* Preserve values programmed by SMM/BIOS but lost over reset. */ 809 ctl = OREAD4(sc, OHCI_CONTROL); 810 rwc = ctl & OHCI_RWC; 811 fm = OREAD4(sc, OHCI_FM_INTERVAL); 812 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 813 descb = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 814 815 /* Determine in what context we are running. */ 816 if (ctl & OHCI_IR) { 817 /* SMM active, request change */ 818 DPRINTF(("ohci_init: SMM active, request owner change\n")); 819 if ((sc->sc_intre & (OHCI_OC | OHCI_MIE)) == 820 (OHCI_OC | OHCI_MIE)) 821 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_MIE); 822 s = OREAD4(sc, OHCI_COMMAND_STATUS); 823 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 824 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 825 usb_delay_ms(&sc->sc_bus, 1); 826 ctl = OREAD4(sc, OHCI_CONTROL); 827 } 828 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_MIE); 829 if ((ctl & OHCI_IR) == 0) { 830 printf("%s: SMM does not respond, resetting\n", 831 device_xname(sc->sc_dev)); 832 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 833 goto reset; 834 } 835 #if 0 836 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */ 837 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 838 /* BIOS started controller. */ 839 DPRINTF(("ohci_init: BIOS active\n")); 840 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 841 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL | rwc); 842 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 843 } 844 #endif 845 } else { 846 DPRINTF(("ohci_init: cold started\n")); 847 reset: 848 /* Controller was cold started. */ 849 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 850 } 851 852 /* 853 * This reset should not be necessary according to the OHCI spec, but 854 * without it some controllers do not start. 855 */ 856 DPRINTF(("%s: resetting\n", device_xname(sc->sc_dev))); 857 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 858 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 859 860 /* We now own the host controller and the bus has been reset. */ 861 862 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 863 /* Nominal time for a reset is 10 us. */ 864 for (i = 0; i < 10; i++) { 865 delay(10); 866 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 867 if (!hcr) 868 break; 869 } 870 if (hcr) { 871 printf("%s: reset timeout\n", device_xname(sc->sc_dev)); 872 err = USBD_IOERROR; 873 goto bad5; 874 } 875 #ifdef OHCI_DEBUG 876 if (ohcidebug > 15) 877 ohci_dumpregs(sc); 878 #endif 879 880 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 881 882 /* Set up HC registers. */ 883 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 884 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 885 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 886 /* disable all interrupts and then switch on all desired interrupts */ 887 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 888 /* switch on desired functional features */ 889 ctl = OREAD4(sc, OHCI_CONTROL); 890 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 891 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 892 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL | rwc; 893 /* And finally start it! */ 894 OWRITE4(sc, OHCI_CONTROL, ctl); 895 896 /* 897 * The controller is now OPERATIONAL. Set a some final 898 * registers that should be set earlier, but that the 899 * controller ignores when in the SUSPEND state. 900 */ 901 ival = OHCI_GET_IVAL(fm); 902 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 903 fm |= OHCI_FSMPS(ival) | ival; 904 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 905 per = OHCI_PERIODIC(ival); /* 90% periodic */ 906 OWRITE4(sc, OHCI_PERIODIC_START, per); 907 908 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */ 909 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP); 910 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 911 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY); 912 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca); 913 914 /* 915 * The AMD756 requires a delay before re-reading the register, 916 * otherwise it will occasionally report 0 ports. 917 */ 918 sc->sc_noport = 0; 919 for (i = 0; i < 10 && sc->sc_noport == 0; i++) { 920 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY); 921 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 922 } 923 924 #ifdef OHCI_DEBUG 925 if (ohcidebug > 5) 926 ohci_dumpregs(sc); 927 #endif 928 929 /* Set up the bus struct. */ 930 sc->sc_bus.methods = &ohci_bus_methods; 931 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 932 933 #if defined(__NetBSD__) || defined(__OpenBSD__) 934 sc->sc_control = sc->sc_intre = 0; 935 #endif 936 937 /* Finally, turn on interrupts. */ 938 DPRINTFN(1,("ohci_init: enabling\n")); 939 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 940 941 return (USBD_NORMAL_COMPLETION); 942 943 bad5: 944 for (i = 0; i < OHCI_NO_EDS; i++) 945 ohci_free_sed(sc, sc->sc_eds[i]); 946 bad4: 947 ohci_free_sed(sc, sc->sc_isoc_head); 948 bad3: 949 ohci_free_sed(sc, sc->sc_bulk_head); 950 bad2: 951 ohci_free_sed(sc, sc->sc_ctrl_head); 952 bad1: 953 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 954 sc->sc_hcca = NULL; 955 return (err); 956 } 957 958 usbd_status 959 ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 960 { 961 #if defined(__NetBSD__) || defined(__OpenBSD__) 962 struct ohci_softc *sc = bus->hci_private; 963 #endif 964 usbd_status status; 965 966 status = usb_allocmem(&sc->sc_bus, size, 0, dma); 967 #ifdef __NetBSD__ 968 if (status == USBD_NOMEM) 969 status = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size); 970 #endif 971 return status; 972 } 973 974 void 975 ohci_freem(struct usbd_bus *bus, usb_dma_t *dma) 976 { 977 #if defined(__NetBSD__) || defined(__OpenBSD__) 978 struct ohci_softc *sc = bus->hci_private; 979 #endif 980 #ifdef __NetBSD__ 981 if (dma->block->flags & USB_DMA_RESERVE) { 982 usb_reserve_freem(&sc->sc_dma_reserve, dma); 983 return; 984 } 985 #endif 986 usb_freemem(&sc->sc_bus, dma); 987 } 988 989 usbd_xfer_handle 990 ohci_allocx(struct usbd_bus *bus) 991 { 992 struct ohci_softc *sc = bus->hci_private; 993 usbd_xfer_handle xfer; 994 995 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 996 if (xfer != NULL) { 997 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 998 #ifdef DIAGNOSTIC 999 if (xfer->busy_free != XFER_FREE) { 1000 printf("ohci_allocx: xfer=%p not free, 0x%08x\n", xfer, 1001 xfer->busy_free); 1002 } 1003 #endif 1004 } else { 1005 xfer = malloc(sizeof(struct ohci_xfer), M_USB, M_NOWAIT); 1006 } 1007 if (xfer != NULL) { 1008 memset(xfer, 0, sizeof (struct ohci_xfer)); 1009 #ifdef DIAGNOSTIC 1010 xfer->busy_free = XFER_BUSY; 1011 #endif 1012 } 1013 return (xfer); 1014 } 1015 1016 void 1017 ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 1018 { 1019 struct ohci_softc *sc = bus->hci_private; 1020 1021 #ifdef DIAGNOSTIC 1022 if (xfer->busy_free != XFER_BUSY) { 1023 printf("ohci_freex: xfer=%p not busy, 0x%08x\n", xfer, 1024 xfer->busy_free); 1025 } 1026 xfer->busy_free = XFER_FREE; 1027 #endif 1028 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 1029 } 1030 1031 /* 1032 * Shut down the controller when the system is going down. 1033 */ 1034 bool 1035 ohci_shutdown(device_t self, int flags) 1036 { 1037 ohci_softc_t *sc = device_private(self); 1038 1039 DPRINTF(("ohci_shutdown: stopping the HC\n")); 1040 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1041 return true; 1042 } 1043 1044 bool 1045 ohci_resume(device_t dv PMF_FN_ARGS) 1046 { 1047 ohci_softc_t *sc = device_private(dv); 1048 uint32_t ctl; 1049 int s; 1050 1051 s = splhardusb(); 1052 sc->sc_bus.use_polling++; 1053 /* Some broken BIOSes do not recover these values */ 1054 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 1055 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, 1056 sc->sc_ctrl_head->physaddr); 1057 OWRITE4(sc, OHCI_BULK_HEAD_ED, 1058 sc->sc_bulk_head->physaddr); 1059 if (sc->sc_intre) 1060 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_intre & 1061 (OHCI_ALL_INTRS | OHCI_MIE)); 1062 if (sc->sc_control) 1063 ctl = sc->sc_control; 1064 else 1065 ctl = OREAD4(sc, OHCI_CONTROL); 1066 ctl |= OHCI_HCFS_RESUME; 1067 OWRITE4(sc, OHCI_CONTROL, ctl); 1068 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 1069 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL; 1070 OWRITE4(sc, OHCI_CONTROL, ctl); 1071 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 1072 sc->sc_control = sc->sc_intre = 0; 1073 sc->sc_bus.use_polling--; 1074 splx(s); 1075 1076 return true; 1077 } 1078 1079 bool 1080 ohci_suspend(device_t dv PMF_FN_ARGS) 1081 { 1082 ohci_softc_t *sc = device_private(dv); 1083 uint32_t ctl; 1084 int s; 1085 1086 s = splhardusb(); 1087 sc->sc_bus.use_polling++; 1088 ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK; 1089 if (sc->sc_control == 0) { 1090 /* 1091 * Preserve register values, in case that BIOS 1092 * does not recover them. 1093 */ 1094 sc->sc_control = ctl; 1095 sc->sc_intre = OREAD4(sc, 1096 OHCI_INTERRUPT_ENABLE); 1097 } 1098 ctl |= OHCI_HCFS_SUSPEND; 1099 OWRITE4(sc, OHCI_CONTROL, ctl); 1100 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1101 sc->sc_bus.use_polling--; 1102 splx(s); 1103 1104 return true; 1105 } 1106 1107 #ifdef OHCI_DEBUG 1108 void 1109 ohci_dumpregs(ohci_softc_t *sc) 1110 { 1111 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 1112 OREAD4(sc, OHCI_REVISION), 1113 OREAD4(sc, OHCI_CONTROL), 1114 OREAD4(sc, OHCI_COMMAND_STATUS))); 1115 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 1116 OREAD4(sc, OHCI_INTERRUPT_STATUS), 1117 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 1118 OREAD4(sc, OHCI_INTERRUPT_DISABLE))); 1119 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 1120 OREAD4(sc, OHCI_HCCA), 1121 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 1122 OREAD4(sc, OHCI_CONTROL_HEAD_ED))); 1123 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 1124 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 1125 OREAD4(sc, OHCI_BULK_HEAD_ED), 1126 OREAD4(sc, OHCI_BULK_CURRENT_ED))); 1127 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 1128 OREAD4(sc, OHCI_DONE_HEAD), 1129 OREAD4(sc, OHCI_FM_INTERVAL), 1130 OREAD4(sc, OHCI_FM_REMAINING))); 1131 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 1132 OREAD4(sc, OHCI_FM_NUMBER), 1133 OREAD4(sc, OHCI_PERIODIC_START), 1134 OREAD4(sc, OHCI_LS_THRESHOLD))); 1135 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n", 1136 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 1137 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 1138 OREAD4(sc, OHCI_RH_STATUS))); 1139 DPRINTF((" port1=0x%08x port2=0x%08x\n", 1140 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 1141 OREAD4(sc, OHCI_RH_PORT_STATUS(2)))); 1142 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n", 1143 O32TOH(sc->sc_hcca->hcca_frame_number), 1144 O32TOH(sc->sc_hcca->hcca_done_head))); 1145 } 1146 #endif 1147 1148 Static int ohci_intr1(ohci_softc_t *); 1149 1150 int 1151 ohci_intr(void *p) 1152 { 1153 ohci_softc_t *sc = p; 1154 1155 if (sc == NULL || sc->sc_dying || !device_has_power(sc->sc_dev)) 1156 return (0); 1157 1158 /* If we get an interrupt while polling, then just ignore it. */ 1159 if (sc->sc_bus.use_polling) { 1160 #ifdef DIAGNOSTIC 1161 DPRINTFN(16, ("ohci_intr: ignored interrupt while polling\n")); 1162 #endif 1163 /* for level triggered intrs, should do something to ack */ 1164 OWRITE4(sc, OHCI_INTERRUPT_STATUS, 1165 OREAD4(sc, OHCI_INTERRUPT_STATUS)); 1166 1167 return (0); 1168 } 1169 1170 return (ohci_intr1(sc)); 1171 } 1172 1173 Static int 1174 ohci_intr1(ohci_softc_t *sc) 1175 { 1176 u_int32_t intrs, eintrs; 1177 1178 DPRINTFN(14,("ohci_intr1: enter\n")); 1179 1180 /* In case the interrupt occurs before initialization has completed. */ 1181 if (sc == NULL || sc->sc_hcca == NULL) { 1182 #ifdef DIAGNOSTIC 1183 printf("ohci_intr: sc->sc_hcca == NULL\n"); 1184 #endif 1185 return (0); 1186 } 1187 1188 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1189 if (!intrs) 1190 return (0); 1191 1192 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs & ~(OHCI_MIE|OHCI_WDH)); /* Acknowledge */ 1193 eintrs = intrs & sc->sc_eintrs; 1194 if (!eintrs) 1195 return (0); 1196 1197 sc->sc_bus.intr_context++; 1198 sc->sc_bus.no_intrs++; 1199 DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 1200 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 1201 (u_int)eintrs)); 1202 1203 if (eintrs & OHCI_SO) { 1204 sc->sc_overrun_cnt++; 1205 if (usbd_ratecheck(&sc->sc_overrun_ntc)) { 1206 printf("%s: %u scheduling overruns\n", 1207 device_xname(sc->sc_dev), sc->sc_overrun_cnt); 1208 sc->sc_overrun_cnt = 0; 1209 } 1210 /* XXX do what */ 1211 eintrs &= ~OHCI_SO; 1212 } 1213 if (eintrs & OHCI_WDH) { 1214 /* 1215 * We block the interrupt below, and reenable it later from 1216 * ohci_softintr(). 1217 */ 1218 usb_schedsoftintr(&sc->sc_bus); 1219 } 1220 if (eintrs & OHCI_RD) { 1221 printf("%s: resume detect\n", device_xname(sc->sc_dev)); 1222 /* XXX process resume detect */ 1223 } 1224 if (eintrs & OHCI_UE) { 1225 printf("%s: unrecoverable error, controller halted\n", 1226 device_xname(sc->sc_dev)); 1227 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1228 /* XXX what else */ 1229 } 1230 if (eintrs & OHCI_RHSC) { 1231 /* 1232 * We block the interrupt below, and reenable it later from 1233 * a timeout. 1234 */ 1235 ohci_rhsc(sc, sc->sc_intrxfer); 1236 /* Do not allow RHSC interrupts > 1 per second */ 1237 usb_callout(sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc); 1238 } 1239 1240 sc->sc_bus.intr_context--; 1241 1242 if (eintrs != 0) { 1243 /* Block unprocessed interrupts. */ 1244 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs); 1245 sc->sc_eintrs &= ~eintrs; 1246 DPRINTFN(1, ("%s: blocking intrs 0x%x\n", 1247 device_xname(sc->sc_dev), eintrs)); 1248 } 1249 1250 return (1); 1251 } 1252 1253 void 1254 ohci_rhsc_enable(void *v_sc) 1255 { 1256 ohci_softc_t *sc = v_sc; 1257 int s; 1258 1259 s = splhardusb(); 1260 sc->sc_eintrs |= OHCI_RHSC; 1261 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1262 splx(s); 1263 } 1264 1265 #ifdef OHCI_DEBUG 1266 const char *ohci_cc_strs[] = { 1267 "NO_ERROR", 1268 "CRC", 1269 "BIT_STUFFING", 1270 "DATA_TOGGLE_MISMATCH", 1271 "STALL", 1272 "DEVICE_NOT_RESPONDING", 1273 "PID_CHECK_FAILURE", 1274 "UNEXPECTED_PID", 1275 "DATA_OVERRUN", 1276 "DATA_UNDERRUN", 1277 "BUFFER_OVERRUN", 1278 "BUFFER_UNDERRUN", 1279 "reserved", 1280 "reserved", 1281 "NOT_ACCESSED", 1282 "NOT_ACCESSED", 1283 }; 1284 #endif 1285 1286 void 1287 ohci_softintr(void *v) 1288 { 1289 struct usbd_bus *bus = v; 1290 ohci_softc_t *sc = bus->hci_private; 1291 ohci_soft_itd_t *sitd, *sidone, *sitdnext; 1292 ohci_soft_td_t *std, *sdone, *stdnext; 1293 usbd_xfer_handle xfer; 1294 struct ohci_pipe *opipe; 1295 int len, cc, s; 1296 int i, j, actlen, iframes, uedir; 1297 ohci_physaddr_t done; 1298 1299 DPRINTFN(10,("ohci_softintr: enter\n")); 1300 1301 sc->sc_bus.intr_context++; 1302 1303 s = splhardusb(); 1304 usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head), 1305 sizeof(sc->sc_hcca->hcca_done_head), 1306 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1307 done = O32TOH(sc->sc_hcca->hcca_done_head) & ~OHCI_DONE_INTRS; 1308 sc->sc_hcca->hcca_done_head = 0; 1309 usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head), 1310 sizeof(sc->sc_hcca->hcca_done_head), 1311 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1312 OWRITE4(sc, OHCI_INTERRUPT_STATUS, OHCI_WDH); 1313 sc->sc_eintrs |= OHCI_WDH; 1314 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_WDH); 1315 splx(s); 1316 1317 /* Reverse the done list. */ 1318 for (sdone = NULL, sidone = NULL; done != 0; ) { 1319 std = ohci_hash_find_td(sc, done); 1320 if (std != NULL) { 1321 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 1322 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1323 std->dnext = sdone; 1324 done = O32TOH(std->td.td_nexttd); 1325 sdone = std; 1326 DPRINTFN(10,("add TD %p\n", std)); 1327 continue; 1328 } 1329 sitd = ohci_hash_find_itd(sc, done); 1330 if (sitd != NULL) { 1331 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 1332 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1333 sitd->dnext = sidone; 1334 done = O32TOH(sitd->itd.itd_nextitd); 1335 sidone = sitd; 1336 DPRINTFN(5,("add ITD %p\n", sitd)); 1337 continue; 1338 } 1339 panic("ohci_softintr: addr 0x%08lx not found", (u_long)done); 1340 } 1341 1342 DPRINTFN(10,("ohci_softintr: sdone=%p sidone=%p\n", sdone, sidone)); 1343 1344 #ifdef OHCI_DEBUG 1345 if (ohcidebug > 10) { 1346 DPRINTF(("ohci_process_done: TD done:\n")); 1347 ohci_dump_tds(sc, sdone); 1348 } 1349 #endif 1350 1351 for (std = sdone; std; std = stdnext) { 1352 xfer = std->xfer; 1353 stdnext = std->dnext; 1354 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n", 1355 std, xfer, xfer ? xfer->hcpriv : 0)); 1356 if (xfer == NULL) { 1357 /* 1358 * xfer == NULL: There seems to be no xfer associated 1359 * with this TD. It is tailp that happened to end up on 1360 * the done queue. 1361 * Shouldn't happen, but some chips are broken(?). 1362 */ 1363 continue; 1364 } 1365 if (xfer->status == USBD_CANCELLED || 1366 xfer->status == USBD_TIMEOUT) { 1367 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1368 xfer)); 1369 /* Handled by abort routine. */ 1370 continue; 1371 } 1372 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 1373 1374 len = std->len; 1375 if (std->td.td_cbp != 0) 1376 len -= O32TOH(std->td.td_be) - 1377 O32TOH(std->td.td_cbp) + 1; 1378 DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", len, 1379 std->flags)); 1380 if (std->flags & OHCI_ADD_LEN) 1381 xfer->actlen += len; 1382 1383 cc = OHCI_TD_GET_CC(O32TOH(std->td.td_flags)); 1384 if (cc == OHCI_CC_NO_ERROR) { 1385 if (std->flags & OHCI_CALL_DONE) { 1386 xfer->status = USBD_NORMAL_COMPLETION; 1387 s = splusb(); 1388 usb_transfer_complete(xfer); 1389 splx(s); 1390 } 1391 ohci_free_std(sc, std); 1392 } else { 1393 /* 1394 * Endpoint is halted. First unlink all the TDs 1395 * belonging to the failed transfer, and then restart 1396 * the endpoint. 1397 */ 1398 ohci_soft_td_t *p, *n; 1399 opipe = (struct ohci_pipe *)xfer->pipe; 1400 1401 DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n", 1402 OHCI_TD_GET_CC(O32TOH(std->td.td_flags)), 1403 ohci_cc_strs[OHCI_TD_GET_CC(O32TOH(std->td.td_flags))])); 1404 1405 /* remove TDs */ 1406 for (p = std; p->xfer == xfer; p = n) { 1407 n = p->nexttd; 1408 ohci_free_std(sc, p); 1409 } 1410 1411 /* clear halt */ 1412 opipe->sed->ed.ed_headp = HTOO32(p->physaddr); 1413 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1414 1415 if (cc == OHCI_CC_STALL) 1416 xfer->status = USBD_STALLED; 1417 else 1418 xfer->status = USBD_IOERROR; 1419 s = splusb(); 1420 usb_transfer_complete(xfer); 1421 splx(s); 1422 } 1423 } 1424 1425 #ifdef OHCI_DEBUG 1426 if (ohcidebug > 10) { 1427 DPRINTF(("ohci_softintr: ITD done:\n")); 1428 ohci_dump_itds(sc, sidone); 1429 } 1430 #endif 1431 1432 for (sitd = sidone; sitd != NULL; sitd = sitdnext) { 1433 xfer = sitd->xfer; 1434 sitdnext = sitd->dnext; 1435 DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n", 1436 sitd, xfer, xfer ? xfer->hcpriv : 0)); 1437 if (xfer == NULL) 1438 continue; 1439 if (xfer->status == USBD_CANCELLED || 1440 xfer->status == USBD_TIMEOUT) { 1441 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1442 xfer)); 1443 /* Handled by abort routine. */ 1444 continue; 1445 } 1446 #ifdef DIAGNOSTIC 1447 if (sitd->isdone) 1448 printf("ohci_softintr: sitd=%p is done\n", sitd); 1449 sitd->isdone = 1; 1450 #endif 1451 if (sitd->flags & OHCI_CALL_DONE) { 1452 ohci_soft_itd_t *next; 1453 1454 opipe = (struct ohci_pipe *)xfer->pipe; 1455 opipe->u.iso.inuse -= xfer->nframes; 1456 uedir = UE_GET_DIR(xfer->pipe->endpoint->edesc-> 1457 bEndpointAddress); 1458 xfer->status = USBD_NORMAL_COMPLETION; 1459 actlen = 0; 1460 for (i = 0, sitd = xfer->hcpriv;; 1461 sitd = next) { 1462 next = sitd->nextitd; 1463 if (OHCI_ITD_GET_CC(O32TOH(sitd-> 1464 itd.itd_flags)) != OHCI_CC_NO_ERROR) 1465 xfer->status = USBD_IOERROR; 1466 /* For input, update frlengths with actual */ 1467 /* XXX anything necessary for output? */ 1468 if (uedir == UE_DIR_IN && 1469 xfer->status == USBD_NORMAL_COMPLETION) { 1470 iframes = OHCI_ITD_GET_FC(O32TOH( 1471 sitd->itd.itd_flags)); 1472 for (j = 0; j < iframes; i++, j++) { 1473 len = O16TOH(sitd-> 1474 itd.itd_offset[j]); 1475 if ((OHCI_ITD_PSW_GET_CC(len) & 1476 OHCI_CC_NOT_ACCESSED_MASK) 1477 == OHCI_CC_NOT_ACCESSED) 1478 len = 0; 1479 else 1480 len = OHCI_ITD_PSW_LENGTH(len); 1481 xfer->frlengths[i] = len; 1482 actlen += len; 1483 } 1484 } 1485 if (sitd->flags & OHCI_CALL_DONE) 1486 break; 1487 ohci_free_sitd(sc, sitd); 1488 } 1489 ohci_free_sitd(sc, sitd); 1490 if (uedir == UE_DIR_IN && 1491 xfer->status == USBD_NORMAL_COMPLETION) 1492 xfer->actlen = actlen; 1493 xfer->hcpriv = NULL; 1494 1495 s = splusb(); 1496 usb_transfer_complete(xfer); 1497 splx(s); 1498 } 1499 } 1500 1501 #ifdef USB_USE_SOFTINTR 1502 if (sc->sc_softwake) { 1503 sc->sc_softwake = 0; 1504 wakeup(&sc->sc_softwake); 1505 } 1506 #endif /* USB_USE_SOFTINTR */ 1507 1508 sc->sc_bus.intr_context--; 1509 DPRINTFN(10,("ohci_softintr: done:\n")); 1510 } 1511 1512 void 1513 ohci_device_ctrl_done(usbd_xfer_handle xfer) 1514 { 1515 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1516 int len = UGETW(xfer->request.wLength); 1517 int isread = (xfer->request.bmRequestType & UT_READ); 1518 1519 DPRINTFN(10,("ohci_device_ctrl_done: xfer=%p\n", xfer)); 1520 1521 #ifdef DIAGNOSTIC 1522 if (!(xfer->rqflags & URQ_REQUEST)) { 1523 panic("ohci_device_ctrl_done: not a request"); 1524 } 1525 #endif 1526 if (len) 1527 usb_syncmem(&xfer->dmabuf, 0, len, 1528 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1529 usb_syncmem(&opipe->u.ctl.reqdma, 0, 1530 sizeof(usb_device_request_t), BUS_DMASYNC_POSTWRITE); 1531 } 1532 1533 void 1534 ohci_device_intr_done(usbd_xfer_handle xfer) 1535 { 1536 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1537 ohci_softc_t *sc = opipe->pipe.device->bus->hci_private; 1538 ohci_soft_ed_t *sed = opipe->sed; 1539 ohci_soft_td_t *data, *tail; 1540 int isread = 1541 (UE_GET_DIR(xfer->pipe->endpoint->edesc->bEndpointAddress) == UE_DIR_IN); 1542 1543 1544 DPRINTFN(10,("ohci_device_intr_done: xfer=%p, actlen=%d\n", 1545 xfer, xfer->actlen)); 1546 1547 usb_syncmem(&xfer->dmabuf, 0, xfer->length, 1548 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1549 if (xfer->pipe->repeat) { 1550 data = opipe->tail.td; 1551 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 1552 if (tail == NULL) { 1553 xfer->status = USBD_NOMEM; 1554 return; 1555 } 1556 tail->xfer = NULL; 1557 1558 data->td.td_flags = HTOO32( 1559 OHCI_TD_IN | OHCI_TD_NOCC | 1560 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 1561 if (xfer->flags & USBD_SHORT_XFER_OK) 1562 data->td.td_flags |= HTOO32(OHCI_TD_R); 1563 data->td.td_cbp = HTOO32(DMAADDR(&xfer->dmabuf, 0)); 1564 data->nexttd = tail; 1565 data->td.td_nexttd = HTOO32(tail->physaddr); 1566 data->td.td_be = HTOO32(O32TOH(data->td.td_cbp) + 1567 xfer->length - 1); 1568 data->len = xfer->length; 1569 data->xfer = xfer; 1570 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1571 usb_syncmem(&data->dma, data->offs, sizeof(data->td), 1572 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1573 xfer->hcpriv = data; 1574 xfer->actlen = 0; 1575 1576 sed->ed.ed_tailp = HTOO32(tail->physaddr); 1577 usb_syncmem(&sed->dma, 1578 sed->offs + offsetof(ohci_ed_t, ed_tailp), 1579 sizeof(sed->ed.ed_tailp), 1580 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1581 opipe->tail.td = tail; 1582 } 1583 } 1584 1585 void 1586 ohci_device_bulk_done(usbd_xfer_handle xfer) 1587 { 1588 int isread = 1589 (UE_GET_DIR(xfer->pipe->endpoint->edesc->bEndpointAddress) == UE_DIR_IN); 1590 1591 DPRINTFN(10,("ohci_device_bulk_done: xfer=%p, actlen=%d\n", 1592 xfer, xfer->actlen)); 1593 usb_syncmem(&xfer->dmabuf, 0, xfer->length, 1594 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1595 } 1596 1597 void 1598 ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer) 1599 { 1600 usbd_pipe_handle pipe; 1601 u_char *p; 1602 int i, m; 1603 int hstatus; 1604 1605 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1606 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n", 1607 sc, xfer, hstatus)); 1608 1609 if (xfer == NULL) { 1610 /* Just ignore the change. */ 1611 return; 1612 } 1613 1614 pipe = xfer->pipe; 1615 1616 p = KERNADDR(&xfer->dmabuf, 0); 1617 m = min(sc->sc_noport, xfer->length * 8 - 1); 1618 memset(p, 0, xfer->length); 1619 for (i = 1; i <= m; i++) { 1620 /* Pick out CHANGE bits from the status reg. */ 1621 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1622 p[i/8] |= 1 << (i%8); 1623 } 1624 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 1625 xfer->actlen = xfer->length; 1626 xfer->status = USBD_NORMAL_COMPLETION; 1627 1628 usb_transfer_complete(xfer); 1629 } 1630 1631 void 1632 ohci_root_intr_done(usbd_xfer_handle xfer) 1633 { 1634 } 1635 1636 void 1637 ohci_root_ctrl_done(usbd_xfer_handle xfer) 1638 { 1639 } 1640 1641 /* 1642 * Wait here until controller claims to have an interrupt. 1643 * Then call ohci_intr and return. Use timeout to avoid waiting 1644 * too long. 1645 */ 1646 void 1647 ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer) 1648 { 1649 int timo; 1650 u_int32_t intrs; 1651 1652 xfer->status = USBD_IN_PROGRESS; 1653 for (timo = xfer->timeout; timo >= 0; timo--) { 1654 usb_delay_ms(&sc->sc_bus, 1); 1655 if (sc->sc_dying) 1656 break; 1657 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 1658 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs)); 1659 #ifdef OHCI_DEBUG 1660 if (ohcidebug > 15) 1661 ohci_dumpregs(sc); 1662 #endif 1663 if (intrs) { 1664 ohci_intr1(sc); 1665 if (xfer->status != USBD_IN_PROGRESS) 1666 return; 1667 } 1668 } 1669 1670 /* Timeout */ 1671 DPRINTF(("ohci_waitintr: timeout\n")); 1672 xfer->status = USBD_TIMEOUT; 1673 usb_transfer_complete(xfer); 1674 /* XXX should free TD */ 1675 } 1676 1677 void 1678 ohci_poll(struct usbd_bus *bus) 1679 { 1680 ohci_softc_t *sc = bus->hci_private; 1681 #ifdef OHCI_DEBUG 1682 static int last; 1683 int new; 1684 new = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1685 if (new != last) { 1686 DPRINTFN(10,("ohci_poll: intrs=0x%04x\n", new)); 1687 last = new; 1688 } 1689 #endif 1690 1691 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) 1692 ohci_intr1(sc); 1693 } 1694 1695 usbd_status 1696 ohci_device_request(usbd_xfer_handle xfer) 1697 { 1698 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1699 usb_device_request_t *req = &xfer->request; 1700 usbd_device_handle dev = opipe->pipe.device; 1701 ohci_softc_t *sc = dev->bus->hci_private; 1702 int addr = dev->address; 1703 ohci_soft_td_t *setup, *stat, *next, *tail; 1704 ohci_soft_ed_t *sed; 1705 int isread; 1706 int len; 1707 usbd_status err; 1708 int s; 1709 1710 isread = req->bmRequestType & UT_READ; 1711 len = UGETW(req->wLength); 1712 1713 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 1714 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 1715 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1716 UGETW(req->wIndex), len, addr, 1717 opipe->pipe.endpoint->edesc->bEndpointAddress)); 1718 1719 setup = opipe->tail.td; 1720 stat = ohci_alloc_std(sc); 1721 if (stat == NULL) { 1722 err = USBD_NOMEM; 1723 goto bad1; 1724 } 1725 tail = ohci_alloc_std(sc); 1726 if (tail == NULL) { 1727 err = USBD_NOMEM; 1728 goto bad2; 1729 } 1730 tail->xfer = NULL; 1731 1732 sed = opipe->sed; 1733 opipe->u.ctl.length = len; 1734 1735 /* Update device address and length since they may have changed 1736 during the setup of the control pipe in usbd_new_device(). */ 1737 /* XXX This only needs to be done once, but it's too early in open. */ 1738 /* XXXX Should not touch ED here! */ 1739 1740 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 1741 sizeof(sed->ed.ed_flags), 1742 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1743 sed->ed.ed_flags = HTOO32( 1744 (O32TOH(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) | 1745 OHCI_ED_SET_FA(addr) | 1746 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize))); 1747 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 1748 sizeof(sed->ed.ed_flags), 1749 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1750 1751 next = stat; 1752 1753 /* Set up data transaction */ 1754 if (len != 0) { 1755 ohci_soft_td_t *std = stat; 1756 1757 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 1758 std, &stat); 1759 stat = stat->nexttd; /* point at free TD */ 1760 if (err) 1761 goto bad3; 1762 /* Start toggle at 1 and then use the carried toggle. */ 1763 std->td.td_flags &= HTOO32(~OHCI_TD_TOGGLE_MASK); 1764 std->td.td_flags |= HTOO32(OHCI_TD_TOGGLE_1); 1765 usb_syncmem(&std->dma, 1766 std->offs + offsetof(ohci_td_t, td_flags), 1767 sizeof(std->td.td_flags), 1768 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1769 } 1770 1771 memcpy(KERNADDR(&opipe->u.ctl.reqdma, 0), req, sizeof *req); 1772 usb_syncmem(&opipe->u.ctl.reqdma, 0, sizeof *req, BUS_DMASYNC_PREWRITE); 1773 1774 setup->td.td_flags = HTOO32(OHCI_TD_SETUP | OHCI_TD_NOCC | 1775 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1776 setup->td.td_cbp = HTOO32(DMAADDR(&opipe->u.ctl.reqdma, 0)); 1777 setup->nexttd = next; 1778 setup->td.td_nexttd = HTOO32(next->physaddr); 1779 setup->td.td_be = HTOO32(O32TOH(setup->td.td_cbp) + sizeof *req - 1); 1780 setup->len = 0; 1781 setup->xfer = xfer; 1782 setup->flags = 0; 1783 xfer->hcpriv = setup; 1784 usb_syncmem(&setup->dma, setup->offs, sizeof(setup->td), 1785 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1786 1787 stat->td.td_flags = HTOO32( 1788 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | 1789 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1790 stat->td.td_cbp = 0; 1791 stat->nexttd = tail; 1792 stat->td.td_nexttd = HTOO32(tail->physaddr); 1793 stat->td.td_be = 0; 1794 stat->flags = OHCI_CALL_DONE; 1795 stat->len = 0; 1796 stat->xfer = xfer; 1797 usb_syncmem(&stat->dma, stat->offs, sizeof(stat->td), 1798 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1799 1800 #ifdef OHCI_DEBUG 1801 if (ohcidebug > 5) { 1802 DPRINTF(("ohci_device_request:\n")); 1803 ohci_dump_ed(sc, sed); 1804 ohci_dump_tds(sc, setup); 1805 } 1806 #endif 1807 1808 /* Insert ED in schedule */ 1809 s = splusb(); 1810 sed->ed.ed_tailp = HTOO32(tail->physaddr); 1811 usb_syncmem(&sed->dma, 1812 sed->offs + offsetof(ohci_ed_t, ed_tailp), 1813 sizeof(sed->ed.ed_tailp), 1814 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1815 opipe->tail.td = tail; 1816 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1817 if (xfer->timeout && !sc->sc_bus.use_polling) { 1818 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 1819 ohci_timeout, xfer); 1820 } 1821 splx(s); 1822 1823 #ifdef OHCI_DEBUG 1824 if (ohcidebug > 20) { 1825 delay(10000); 1826 DPRINTF(("ohci_device_request: status=%x\n", 1827 OREAD4(sc, OHCI_COMMAND_STATUS))); 1828 ohci_dumpregs(sc); 1829 printf("ctrl head:\n"); 1830 ohci_dump_ed(sc, sc->sc_ctrl_head); 1831 printf("sed:\n"); 1832 ohci_dump_ed(sc, sed); 1833 ohci_dump_tds(sc, setup); 1834 } 1835 #endif 1836 1837 return (USBD_NORMAL_COMPLETION); 1838 1839 bad3: 1840 ohci_free_std(sc, tail); 1841 bad2: 1842 ohci_free_std(sc, stat); 1843 bad1: 1844 return (err); 1845 } 1846 1847 /* 1848 * Add an ED to the schedule. Called at splusb(). 1849 */ 1850 void 1851 ohci_add_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1852 { 1853 DPRINTFN(8,("ohci_add_ed: sed=%p head=%p\n", sed, head)); 1854 1855 SPLUSBCHECK; 1856 usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted), 1857 sizeof(head->ed.ed_nexted), 1858 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1859 sed->next = head->next; 1860 sed->ed.ed_nexted = head->ed.ed_nexted; 1861 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted), 1862 sizeof(sed->ed.ed_nexted), 1863 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1864 head->next = sed; 1865 head->ed.ed_nexted = HTOO32(sed->physaddr); 1866 usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted), 1867 sizeof(head->ed.ed_nexted), 1868 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1869 } 1870 1871 /* 1872 * Remove an ED from the schedule. Called at splusb(). 1873 */ 1874 void 1875 ohci_rem_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1876 { 1877 ohci_soft_ed_t *p; 1878 1879 SPLUSBCHECK; 1880 1881 /* XXX */ 1882 for (p = head; p != NULL && p->next != sed; p = p->next) 1883 ; 1884 if (p == NULL) 1885 panic("ohci_rem_ed: ED not found"); 1886 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted), 1887 sizeof(sed->ed.ed_nexted), 1888 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1889 p->next = sed->next; 1890 p->ed.ed_nexted = sed->ed.ed_nexted; 1891 usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted), 1892 sizeof(p->ed.ed_nexted), 1893 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1894 } 1895 1896 /* 1897 * When a transfer is completed the TD is added to the done queue by 1898 * the host controller. This queue is the processed by software. 1899 * Unfortunately the queue contains the physical address of the TD 1900 * and we have no simple way to translate this back to a kernel address. 1901 * To make the translation possible (and fast) we use a hash table of 1902 * TDs currently in the schedule. The physical address is used as the 1903 * hash value. 1904 */ 1905 1906 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1907 /* Called at splusb() */ 1908 void 1909 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1910 { 1911 int h = HASH(std->physaddr); 1912 1913 SPLUSBCHECK; 1914 1915 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1916 } 1917 1918 /* Called at splusb() */ 1919 void 1920 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1921 { 1922 SPLUSBCHECK; 1923 1924 LIST_REMOVE(std, hnext); 1925 } 1926 1927 ohci_soft_td_t * 1928 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a) 1929 { 1930 int h = HASH(a); 1931 ohci_soft_td_t *std; 1932 1933 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1934 std != NULL; 1935 std = LIST_NEXT(std, hnext)) 1936 if (std->physaddr == a) 1937 return (std); 1938 return (NULL); 1939 } 1940 1941 /* Called at splusb() */ 1942 void 1943 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1944 { 1945 int h = HASH(sitd->physaddr); 1946 1947 SPLUSBCHECK; 1948 1949 DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n", 1950 sitd, (u_long)sitd->physaddr)); 1951 1952 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext); 1953 } 1954 1955 /* Called at splusb() */ 1956 void 1957 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1958 { 1959 SPLUSBCHECK; 1960 1961 DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n", 1962 sitd, (u_long)sitd->physaddr)); 1963 1964 LIST_REMOVE(sitd, hnext); 1965 } 1966 1967 ohci_soft_itd_t * 1968 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a) 1969 { 1970 int h = HASH(a); 1971 ohci_soft_itd_t *sitd; 1972 1973 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]); 1974 sitd != NULL; 1975 sitd = LIST_NEXT(sitd, hnext)) 1976 if (sitd->physaddr == a) 1977 return (sitd); 1978 return (NULL); 1979 } 1980 1981 void 1982 ohci_timeout(void *addr) 1983 { 1984 struct ohci_xfer *oxfer = addr; 1985 struct ohci_pipe *opipe = (struct ohci_pipe *)oxfer->xfer.pipe; 1986 ohci_softc_t *sc = opipe->pipe.device->bus->hci_private; 1987 1988 DPRINTF(("ohci_timeout: oxfer=%p\n", oxfer)); 1989 1990 if (sc->sc_dying) { 1991 ohci_abort_xfer(&oxfer->xfer, USBD_TIMEOUT); 1992 return; 1993 } 1994 1995 /* Execute the abort in a process context. */ 1996 usb_init_task(&oxfer->abort_task, ohci_timeout_task, addr); 1997 usb_add_task(oxfer->xfer.pipe->device, &oxfer->abort_task, 1998 USB_TASKQ_HC); 1999 } 2000 2001 void 2002 ohci_timeout_task(void *addr) 2003 { 2004 usbd_xfer_handle xfer = addr; 2005 int s; 2006 2007 DPRINTF(("ohci_timeout_task: xfer=%p\n", xfer)); 2008 2009 s = splusb(); 2010 ohci_abort_xfer(xfer, USBD_TIMEOUT); 2011 splx(s); 2012 } 2013 2014 #ifdef OHCI_DEBUG 2015 void 2016 ohci_dump_tds(ohci_softc_t *sc, ohci_soft_td_t *std) 2017 { 2018 for (; std; std = std->nexttd) 2019 ohci_dump_td(sc, std); 2020 } 2021 2022 void 2023 ohci_dump_td(ohci_softc_t *sc, ohci_soft_td_t *std) 2024 { 2025 char sbuf[128]; 2026 2027 snprintb(sbuf, sizeof(sbuf), 2028 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 2029 (u_int32_t)O32TOH(std->td.td_flags)); 2030 2031 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 2032 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2033 printf("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx " 2034 "nexttd=0x%08lx be=0x%08lx\n", 2035 std, (u_long)std->physaddr, sbuf, 2036 OHCI_TD_GET_DI(O32TOH(std->td.td_flags)), 2037 OHCI_TD_GET_EC(O32TOH(std->td.td_flags)), 2038 OHCI_TD_GET_CC(O32TOH(std->td.td_flags)), 2039 (u_long)O32TOH(std->td.td_cbp), 2040 (u_long)O32TOH(std->td.td_nexttd), 2041 (u_long)O32TOH(std->td.td_be)); 2042 } 2043 2044 void 2045 ohci_dump_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 2046 { 2047 int i; 2048 2049 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 2050 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2051 printf("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n" 2052 "bp0=0x%08lx next=0x%08lx be=0x%08lx\n", 2053 sitd, (u_long)sitd->physaddr, 2054 OHCI_ITD_GET_SF(O32TOH(sitd->itd.itd_flags)), 2055 OHCI_ITD_GET_DI(O32TOH(sitd->itd.itd_flags)), 2056 OHCI_ITD_GET_FC(O32TOH(sitd->itd.itd_flags)), 2057 OHCI_ITD_GET_CC(O32TOH(sitd->itd.itd_flags)), 2058 (u_long)O32TOH(sitd->itd.itd_bp0), 2059 (u_long)O32TOH(sitd->itd.itd_nextitd), 2060 (u_long)O32TOH(sitd->itd.itd_be)); 2061 for (i = 0; i < OHCI_ITD_NOFFSET; i++) 2062 printf("offs[%d]=0x%04x ", i, 2063 (u_int)O16TOH(sitd->itd.itd_offset[i])); 2064 printf("\n"); 2065 } 2066 2067 void 2068 ohci_dump_itds(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 2069 { 2070 for (; sitd; sitd = sitd->nextitd) 2071 ohci_dump_itd(sc, sitd); 2072 } 2073 2074 void 2075 ohci_dump_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 2076 { 2077 char sbuf[128], sbuf2[128]; 2078 2079 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 2080 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2081 snprintb(sbuf, sizeof(sbuf), 2082 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO", 2083 (u_int32_t)O32TOH(sed->ed.ed_flags)); 2084 snprintb(sbuf2, sizeof(sbuf2), "\20\1HALT\2CARRY", 2085 (u_int32_t)O32TOH(sed->ed.ed_headp)); 2086 2087 printf("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d flags=%s\ntailp=0x%08lx " 2088 "headflags=%s headp=0x%08lx nexted=0x%08lx\n", 2089 sed, (u_long)sed->physaddr, 2090 OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)), 2091 OHCI_ED_GET_EN(O32TOH(sed->ed.ed_flags)), 2092 OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)), sbuf, 2093 (u_long)O32TOH(sed->ed.ed_tailp), sbuf2, 2094 (u_long)O32TOH(sed->ed.ed_headp), 2095 (u_long)O32TOH(sed->ed.ed_nexted)); 2096 } 2097 #endif 2098 2099 usbd_status 2100 ohci_open(usbd_pipe_handle pipe) 2101 { 2102 usbd_device_handle dev = pipe->device; 2103 ohci_softc_t *sc = dev->bus->hci_private; 2104 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 2105 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2106 u_int8_t addr = dev->address; 2107 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 2108 ohci_soft_ed_t *sed; 2109 ohci_soft_td_t *std; 2110 ohci_soft_itd_t *sitd; 2111 ohci_physaddr_t tdphys; 2112 u_int32_t fmt; 2113 usbd_status err; 2114 int s; 2115 int ival; 2116 2117 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 2118 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 2119 2120 if (sc->sc_dying) 2121 return (USBD_IOERROR); 2122 2123 std = NULL; 2124 sed = NULL; 2125 2126 if (addr == sc->sc_addr) { 2127 switch (ed->bEndpointAddress) { 2128 case USB_CONTROL_ENDPOINT: 2129 pipe->methods = &ohci_root_ctrl_methods; 2130 break; 2131 case UE_DIR_IN | OHCI_INTR_ENDPT: 2132 pipe->methods = &ohci_root_intr_methods; 2133 break; 2134 default: 2135 return (USBD_INVAL); 2136 } 2137 } else { 2138 sed = ohci_alloc_sed(sc); 2139 if (sed == NULL) 2140 goto bad0; 2141 opipe->sed = sed; 2142 if (xfertype == UE_ISOCHRONOUS) { 2143 sitd = ohci_alloc_sitd(sc); 2144 if (sitd == NULL) 2145 goto bad1; 2146 opipe->tail.itd = sitd; 2147 tdphys = sitd->physaddr; 2148 fmt = OHCI_ED_FORMAT_ISO; 2149 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 2150 fmt |= OHCI_ED_DIR_IN; 2151 else 2152 fmt |= OHCI_ED_DIR_OUT; 2153 } else { 2154 std = ohci_alloc_std(sc); 2155 if (std == NULL) 2156 goto bad1; 2157 opipe->tail.td = std; 2158 tdphys = std->physaddr; 2159 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD; 2160 } 2161 sed->ed.ed_flags = HTOO32( 2162 OHCI_ED_SET_FA(addr) | 2163 OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) | 2164 (dev->speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) | 2165 fmt | 2166 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 2167 sed->ed.ed_headp = sed->ed.ed_tailp = HTOO32(tdphys); 2168 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 2169 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2170 2171 switch (xfertype) { 2172 case UE_CONTROL: 2173 pipe->methods = &ohci_device_ctrl_methods; 2174 err = usb_allocmem(&sc->sc_bus, 2175 sizeof(usb_device_request_t), 2176 0, &opipe->u.ctl.reqdma); 2177 if (err) 2178 goto bad; 2179 s = splusb(); 2180 ohci_add_ed(sc, sed, sc->sc_ctrl_head); 2181 splx(s); 2182 break; 2183 case UE_INTERRUPT: 2184 pipe->methods = &ohci_device_intr_methods; 2185 ival = pipe->interval; 2186 if (ival == USBD_DEFAULT_INTERVAL) 2187 ival = ed->bInterval; 2188 return (ohci_device_setintr(sc, opipe, ival)); 2189 case UE_ISOCHRONOUS: 2190 pipe->methods = &ohci_device_isoc_methods; 2191 return (ohci_setup_isoc(pipe)); 2192 case UE_BULK: 2193 pipe->methods = &ohci_device_bulk_methods; 2194 s = splusb(); 2195 ohci_add_ed(sc, sed, sc->sc_bulk_head); 2196 splx(s); 2197 break; 2198 } 2199 } 2200 return (USBD_NORMAL_COMPLETION); 2201 2202 bad: 2203 if (std != NULL) 2204 ohci_free_std(sc, std); 2205 bad1: 2206 if (sed != NULL) 2207 ohci_free_sed(sc, sed); 2208 bad0: 2209 return (USBD_NOMEM); 2210 2211 } 2212 2213 /* 2214 * Close a reqular pipe. 2215 * Assumes that there are no pending transactions. 2216 */ 2217 void 2218 ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head) 2219 { 2220 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2221 ohci_softc_t *sc = pipe->device->bus->hci_private; 2222 ohci_soft_ed_t *sed = opipe->sed; 2223 int s; 2224 2225 s = splusb(); 2226 #ifdef DIAGNOSTIC 2227 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 2228 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2229 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) { 2230 ohci_soft_td_t *std; 2231 std = ohci_hash_find_td(sc, O32TOH(sed->ed.ed_headp)); 2232 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 2233 "tl=0x%x pipe=%p, std=%p\n", sed, 2234 (int)O32TOH(sed->ed.ed_headp), 2235 (int)O32TOH(sed->ed.ed_tailp), 2236 pipe, std); 2237 #ifdef USB_DEBUG 2238 usbd_dump_pipe(&opipe->pipe); 2239 #endif 2240 #ifdef OHCI_DEBUG 2241 ohci_dump_ed(sc, sed); 2242 if (std) 2243 ohci_dump_td(sc, std); 2244 #endif 2245 usb_delay_ms(&sc->sc_bus, 2); 2246 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2247 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) 2248 printf("ohci_close_pipe: pipe still not empty\n"); 2249 } 2250 #endif 2251 ohci_rem_ed(sed, head); 2252 /* Make sure the host controller is not touching this ED */ 2253 usb_delay_ms(&sc->sc_bus, 1); 2254 splx(s); 2255 ohci_free_sed(sc, opipe->sed); 2256 } 2257 2258 /* 2259 * Abort a device request. 2260 * If this routine is called at splusb() it guarantees that the request 2261 * will be removed from the hardware scheduling and that the callback 2262 * for it will be called with USBD_CANCELLED status. 2263 * It's impossible to guarantee that the requested transfer will not 2264 * have happened since the hardware runs concurrently. 2265 * If the transaction has already happened we rely on the ordinary 2266 * interrupt processing to process it. 2267 */ 2268 void 2269 ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2270 { 2271 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2272 ohci_softc_t *sc = opipe->pipe.device->bus->hci_private; 2273 ohci_soft_ed_t *sed = opipe->sed; 2274 ohci_soft_td_t *p, *n; 2275 ohci_physaddr_t headp; 2276 int s, hit; 2277 int wake; 2278 2279 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p sed=%p\n", xfer, opipe,sed)); 2280 2281 if (sc->sc_dying) { 2282 /* If we're dying, just do the software part. */ 2283 s = splusb(); 2284 xfer->status = status; /* make software ignore it */ 2285 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 2286 usb_transfer_complete(xfer); 2287 splx(s); 2288 return; 2289 } 2290 2291 if (xfer->device->bus->intr_context || !curproc) 2292 panic("ohci_abort_xfer: not in process context"); 2293 2294 /* 2295 * If an abort is already in progress then just wait for it to 2296 * complete and return. 2297 */ 2298 if (xfer->hcflags & UXFER_ABORTING) { 2299 DPRINTFN(2, ("ohci_abort_xfer: already aborting\n")); 2300 #ifdef DIAGNOSTIC 2301 if (status == USBD_TIMEOUT) 2302 printf("0hci_abort_xfer: TIMEOUT while aborting\n"); 2303 #endif 2304 /* Override the status which might be USBD_TIMEOUT. */ 2305 xfer->status = status; 2306 DPRINTFN(2, ("ohci_abort_xfer: waiting for abort to finish\n")); 2307 xfer->hcflags |= UXFER_ABORTWAIT; 2308 while (xfer->hcflags & UXFER_ABORTING) 2309 tsleep(&xfer->hcflags, PZERO, "ohciaw", 0); 2310 return; 2311 } 2312 xfer->hcflags |= UXFER_ABORTING; 2313 2314 /* 2315 * Step 1: Make interrupt routine and hardware ignore xfer. 2316 */ 2317 s = splusb(); 2318 xfer->status = status; /* make software ignore it */ 2319 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 2320 splx(s); 2321 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed)); 2322 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2323 sizeof(sed->ed.ed_flags), 2324 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2325 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */ 2326 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2327 sizeof(sed->ed.ed_flags), 2328 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2329 2330 /* 2331 * Step 2: Wait until we know hardware has finished any possible 2332 * use of the xfer. Also make sure the soft interrupt routine 2333 * has run. 2334 */ 2335 usb_delay_ms(opipe->pipe.device->bus, 20); /* Hardware finishes in 1ms */ 2336 s = splusb(); 2337 #ifdef USB_USE_SOFTINTR 2338 sc->sc_softwake = 1; 2339 #endif /* USB_USE_SOFTINTR */ 2340 usb_schedsoftintr(&sc->sc_bus); 2341 #ifdef USB_USE_SOFTINTR 2342 tsleep(&sc->sc_softwake, PZERO, "ohciab", 0); 2343 #endif /* USB_USE_SOFTINTR */ 2344 splx(s); 2345 2346 /* 2347 * Step 3: Remove any vestiges of the xfer from the hardware. 2348 * The complication here is that the hardware may have executed 2349 * beyond the xfer we're trying to abort. So as we're scanning 2350 * the TDs of this xfer we check if the hardware points to 2351 * any of them. 2352 */ 2353 s = splusb(); /* XXX why? */ 2354 p = xfer->hcpriv; 2355 #ifdef DIAGNOSTIC 2356 if (p == NULL) { 2357 xfer->hcflags &= ~UXFER_ABORTING; /* XXX */ 2358 splx(s); 2359 printf("ohci_abort_xfer: hcpriv is NULL\n"); 2360 return; 2361 } 2362 #endif 2363 #ifdef OHCI_DEBUG 2364 if (ohcidebug > 1) { 2365 DPRINTF(("ohci_abort_xfer: sed=\n")); 2366 ohci_dump_ed(sc, sed); 2367 ohci_dump_tds(sc, p); 2368 } 2369 #endif 2370 headp = O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK; 2371 hit = 0; 2372 for (; p->xfer == xfer; p = n) { 2373 hit |= headp == p->physaddr; 2374 n = p->nexttd; 2375 ohci_free_std(sc, p); 2376 } 2377 /* Zap headp register if hardware pointed inside the xfer. */ 2378 if (hit) { 2379 DPRINTFN(1,("ohci_abort_xfer: set hd=0x%08x, tl=0x%08x\n", 2380 (int)p->physaddr, (int)O32TOH(sed->ed.ed_tailp))); 2381 sed->ed.ed_headp = HTOO32(p->physaddr); /* unlink TDs */ 2382 usb_syncmem(&sed->dma, 2383 sed->offs + offsetof(ohci_ed_t, ed_headp), 2384 sizeof(sed->ed.ed_headp), 2385 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2386 } else { 2387 DPRINTFN(1,("ohci_abort_xfer: no hit\n")); 2388 } 2389 2390 /* 2391 * Step 4: Turn on hardware again. 2392 */ 2393 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2394 sizeof(sed->ed.ed_flags), 2395 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2396 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */ 2397 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2398 sizeof(sed->ed.ed_flags), 2399 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2400 2401 /* 2402 * Step 5: Execute callback. 2403 */ 2404 wake = xfer->hcflags & UXFER_ABORTWAIT; 2405 xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT); 2406 usb_transfer_complete(xfer); 2407 if (wake) 2408 wakeup(&xfer->hcflags); 2409 2410 splx(s); 2411 } 2412 2413 /* 2414 * Data structures and routines to emulate the root hub. 2415 */ 2416 Static usb_device_descriptor_t ohci_devd = { 2417 USB_DEVICE_DESCRIPTOR_SIZE, 2418 UDESC_DEVICE, /* type */ 2419 {0x00, 0x01}, /* USB version */ 2420 UDCLASS_HUB, /* class */ 2421 UDSUBCLASS_HUB, /* subclass */ 2422 UDPROTO_FSHUB, 2423 64, /* max packet */ 2424 {0},{0},{0x00,0x01}, /* device id */ 2425 1,2,0, /* string indicies */ 2426 1 /* # of configurations */ 2427 }; 2428 2429 Static const usb_config_descriptor_t ohci_confd = { 2430 USB_CONFIG_DESCRIPTOR_SIZE, 2431 UDESC_CONFIG, 2432 {USB_CONFIG_DESCRIPTOR_SIZE + 2433 USB_INTERFACE_DESCRIPTOR_SIZE + 2434 USB_ENDPOINT_DESCRIPTOR_SIZE}, 2435 1, 2436 1, 2437 0, 2438 UC_ATTR_MBO | UC_SELF_POWERED, 2439 0 /* max power */ 2440 }; 2441 2442 Static const usb_interface_descriptor_t ohci_ifcd = { 2443 USB_INTERFACE_DESCRIPTOR_SIZE, 2444 UDESC_INTERFACE, 2445 0, 2446 0, 2447 1, 2448 UICLASS_HUB, 2449 UISUBCLASS_HUB, 2450 UIPROTO_FSHUB, 2451 0 2452 }; 2453 2454 Static const usb_endpoint_descriptor_t ohci_endpd = { 2455 .bLength = USB_ENDPOINT_DESCRIPTOR_SIZE, 2456 .bDescriptorType = UDESC_ENDPOINT, 2457 .bEndpointAddress = UE_DIR_IN | OHCI_INTR_ENDPT, 2458 .bmAttributes = UE_INTERRUPT, 2459 .wMaxPacketSize = {8, 0}, /* max packet */ 2460 .bInterval = 255, 2461 }; 2462 2463 Static const usb_hub_descriptor_t ohci_hubd = { 2464 .bDescLength = USB_HUB_DESCRIPTOR_SIZE, 2465 .bDescriptorType = UDESC_HUB, 2466 }; 2467 2468 /* 2469 * Simulate a hardware hub by handling all the necessary requests. 2470 */ 2471 Static usbd_status 2472 ohci_root_ctrl_transfer(usbd_xfer_handle xfer) 2473 { 2474 usbd_status err; 2475 2476 /* Insert last in queue. */ 2477 err = usb_insert_transfer(xfer); 2478 if (err) 2479 return (err); 2480 2481 /* Pipe isn't running, start first */ 2482 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2483 } 2484 2485 Static usbd_status 2486 ohci_root_ctrl_start(usbd_xfer_handle xfer) 2487 { 2488 ohci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2489 usb_device_request_t *req; 2490 void *buf = NULL; 2491 int port, i; 2492 int s, len, value, index, l, totlen = 0; 2493 usb_port_status_t ps; 2494 usb_hub_descriptor_t hubd; 2495 usbd_status err; 2496 u_int32_t v; 2497 2498 if (sc->sc_dying) 2499 return (USBD_IOERROR); 2500 2501 #ifdef DIAGNOSTIC 2502 if (!(xfer->rqflags & URQ_REQUEST)) 2503 /* XXX panic */ 2504 return (USBD_INVAL); 2505 #endif 2506 req = &xfer->request; 2507 2508 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 2509 req->bmRequestType, req->bRequest)); 2510 2511 len = UGETW(req->wLength); 2512 value = UGETW(req->wValue); 2513 index = UGETW(req->wIndex); 2514 2515 if (len != 0) 2516 buf = KERNADDR(&xfer->dmabuf, 0); 2517 2518 #define C(x,y) ((x) | ((y) << 8)) 2519 switch(C(req->bRequest, req->bmRequestType)) { 2520 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 2521 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 2522 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 2523 /* 2524 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 2525 * for the integrated root hub. 2526 */ 2527 break; 2528 case C(UR_GET_CONFIG, UT_READ_DEVICE): 2529 if (len > 0) { 2530 *(u_int8_t *)buf = sc->sc_conf; 2531 totlen = 1; 2532 } 2533 break; 2534 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2535 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 2536 if (len == 0) 2537 break; 2538 switch(value >> 8) { 2539 case UDESC_DEVICE: 2540 if ((value & 0xff) != 0) { 2541 err = USBD_IOERROR; 2542 goto ret; 2543 } 2544 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 2545 USETW(ohci_devd.idVendor, sc->sc_id_vendor); 2546 memcpy(buf, &ohci_devd, l); 2547 break; 2548 case UDESC_CONFIG: 2549 if ((value & 0xff) != 0) { 2550 err = USBD_IOERROR; 2551 goto ret; 2552 } 2553 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 2554 memcpy(buf, &ohci_confd, l); 2555 buf = (char *)buf + l; 2556 len -= l; 2557 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 2558 totlen += l; 2559 memcpy(buf, &ohci_ifcd, l); 2560 buf = (char *)buf + l; 2561 len -= l; 2562 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 2563 totlen += l; 2564 memcpy(buf, &ohci_endpd, l); 2565 break; 2566 case UDESC_STRING: 2567 #define sd ((usb_string_descriptor_t *)buf) 2568 switch (value & 0xff) { 2569 case 0: /* Language table */ 2570 totlen = usb_makelangtbl(sd, len); 2571 break; 2572 case 1: /* Vendor */ 2573 totlen = usb_makestrdesc(sd, len, 2574 sc->sc_vendor); 2575 break; 2576 case 2: /* Product */ 2577 totlen = usb_makestrdesc(sd, len, 2578 "OHCI root hub"); 2579 break; 2580 } 2581 #undef sd 2582 break; 2583 default: 2584 err = USBD_IOERROR; 2585 goto ret; 2586 } 2587 break; 2588 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 2589 if (len > 0) { 2590 *(u_int8_t *)buf = 0; 2591 totlen = 1; 2592 } 2593 break; 2594 case C(UR_GET_STATUS, UT_READ_DEVICE): 2595 if (len > 1) { 2596 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 2597 totlen = 2; 2598 } 2599 break; 2600 case C(UR_GET_STATUS, UT_READ_INTERFACE): 2601 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 2602 if (len > 1) { 2603 USETW(((usb_status_t *)buf)->wStatus, 0); 2604 totlen = 2; 2605 } 2606 break; 2607 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 2608 if (value >= USB_MAX_DEVICES) { 2609 err = USBD_IOERROR; 2610 goto ret; 2611 } 2612 sc->sc_addr = value; 2613 break; 2614 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 2615 if (value != 0 && value != 1) { 2616 err = USBD_IOERROR; 2617 goto ret; 2618 } 2619 sc->sc_conf = value; 2620 break; 2621 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 2622 break; 2623 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 2624 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 2625 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 2626 err = USBD_IOERROR; 2627 goto ret; 2628 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 2629 break; 2630 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 2631 break; 2632 /* Hub requests */ 2633 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2634 break; 2635 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2636 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 2637 "port=%d feature=%d\n", 2638 index, value)); 2639 if (index < 1 || index > sc->sc_noport) { 2640 err = USBD_IOERROR; 2641 goto ret; 2642 } 2643 port = OHCI_RH_PORT_STATUS(index); 2644 switch(value) { 2645 case UHF_PORT_ENABLE: 2646 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2647 break; 2648 case UHF_PORT_SUSPEND: 2649 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2650 break; 2651 case UHF_PORT_POWER: 2652 /* Yes, writing to the LOW_SPEED bit clears power. */ 2653 OWRITE4(sc, port, UPS_LOW_SPEED); 2654 break; 2655 case UHF_C_PORT_CONNECTION: 2656 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2657 break; 2658 case UHF_C_PORT_ENABLE: 2659 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2660 break; 2661 case UHF_C_PORT_SUSPEND: 2662 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2663 break; 2664 case UHF_C_PORT_OVER_CURRENT: 2665 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2666 break; 2667 case UHF_C_PORT_RESET: 2668 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2669 break; 2670 default: 2671 err = USBD_IOERROR; 2672 goto ret; 2673 } 2674 switch(value) { 2675 case UHF_C_PORT_CONNECTION: 2676 case UHF_C_PORT_ENABLE: 2677 case UHF_C_PORT_SUSPEND: 2678 case UHF_C_PORT_OVER_CURRENT: 2679 case UHF_C_PORT_RESET: 2680 /* Enable RHSC interrupt if condition is cleared. */ 2681 if ((OREAD4(sc, port) >> 16) == 0) 2682 ohci_rhsc_enable(sc); 2683 break; 2684 default: 2685 break; 2686 } 2687 break; 2688 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2689 if (len == 0) 2690 break; 2691 if ((value & 0xff) != 0) { 2692 err = USBD_IOERROR; 2693 goto ret; 2694 } 2695 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2696 hubd = ohci_hubd; 2697 hubd.bNbrPorts = sc->sc_noport; 2698 USETW(hubd.wHubCharacteristics, 2699 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2700 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2701 /* XXX overcurrent */ 2702 ); 2703 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2704 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2705 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2706 hubd.DeviceRemovable[i++] = (u_int8_t)v; 2707 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2708 l = min(len, hubd.bDescLength); 2709 totlen = l; 2710 memcpy(buf, &hubd, l); 2711 break; 2712 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2713 if (len != 4) { 2714 err = USBD_IOERROR; 2715 goto ret; 2716 } 2717 memset(buf, 0, len); /* ? XXX */ 2718 totlen = len; 2719 break; 2720 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2721 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 2722 index)); 2723 if (index < 1 || index > sc->sc_noport) { 2724 err = USBD_IOERROR; 2725 goto ret; 2726 } 2727 if (len != 4) { 2728 err = USBD_IOERROR; 2729 goto ret; 2730 } 2731 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2732 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 2733 v)); 2734 USETW(ps.wPortStatus, v); 2735 USETW(ps.wPortChange, v >> 16); 2736 l = min(len, sizeof ps); 2737 memcpy(buf, &ps, l); 2738 totlen = l; 2739 break; 2740 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2741 err = USBD_IOERROR; 2742 goto ret; 2743 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2744 break; 2745 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2746 if (index < 1 || index > sc->sc_noport) { 2747 err = USBD_IOERROR; 2748 goto ret; 2749 } 2750 port = OHCI_RH_PORT_STATUS(index); 2751 switch(value) { 2752 case UHF_PORT_ENABLE: 2753 OWRITE4(sc, port, UPS_PORT_ENABLED); 2754 break; 2755 case UHF_PORT_SUSPEND: 2756 OWRITE4(sc, port, UPS_SUSPEND); 2757 break; 2758 case UHF_PORT_RESET: 2759 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 2760 index)); 2761 OWRITE4(sc, port, UPS_RESET); 2762 for (i = 0; i < 5; i++) { 2763 usb_delay_ms(&sc->sc_bus, 2764 USB_PORT_ROOT_RESET_DELAY); 2765 if (sc->sc_dying) { 2766 err = USBD_IOERROR; 2767 goto ret; 2768 } 2769 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2770 break; 2771 } 2772 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 2773 index, OREAD4(sc, port))); 2774 break; 2775 case UHF_PORT_POWER: 2776 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 2777 "%d\n", index)); 2778 OWRITE4(sc, port, UPS_PORT_POWER); 2779 break; 2780 default: 2781 err = USBD_IOERROR; 2782 goto ret; 2783 } 2784 break; 2785 default: 2786 err = USBD_IOERROR; 2787 goto ret; 2788 } 2789 xfer->actlen = totlen; 2790 err = USBD_NORMAL_COMPLETION; 2791 ret: 2792 xfer->status = err; 2793 s = splusb(); 2794 usb_transfer_complete(xfer); 2795 splx(s); 2796 return (USBD_IN_PROGRESS); 2797 } 2798 2799 /* Abort a root control request. */ 2800 Static void 2801 ohci_root_ctrl_abort(usbd_xfer_handle xfer) 2802 { 2803 /* Nothing to do, all transfers are synchronous. */ 2804 } 2805 2806 /* Close the root pipe. */ 2807 Static void 2808 ohci_root_ctrl_close(usbd_pipe_handle pipe) 2809 { 2810 DPRINTF(("ohci_root_ctrl_close\n")); 2811 /* Nothing to do. */ 2812 } 2813 2814 Static usbd_status 2815 ohci_root_intr_transfer(usbd_xfer_handle xfer) 2816 { 2817 usbd_status err; 2818 2819 /* Insert last in queue. */ 2820 err = usb_insert_transfer(xfer); 2821 if (err) 2822 return (err); 2823 2824 /* Pipe isn't running, start first */ 2825 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2826 } 2827 2828 Static usbd_status 2829 ohci_root_intr_start(usbd_xfer_handle xfer) 2830 { 2831 usbd_pipe_handle pipe = xfer->pipe; 2832 ohci_softc_t *sc = pipe->device->bus->hci_private; 2833 2834 if (sc->sc_dying) 2835 return (USBD_IOERROR); 2836 2837 sc->sc_intrxfer = xfer; 2838 2839 return (USBD_IN_PROGRESS); 2840 } 2841 2842 /* Abort a root interrupt request. */ 2843 Static void 2844 ohci_root_intr_abort(usbd_xfer_handle xfer) 2845 { 2846 int s; 2847 2848 if (xfer->pipe->intrxfer == xfer) { 2849 DPRINTF(("ohci_root_intr_abort: remove\n")); 2850 xfer->pipe->intrxfer = NULL; 2851 } 2852 xfer->status = USBD_CANCELLED; 2853 s = splusb(); 2854 usb_transfer_complete(xfer); 2855 splx(s); 2856 } 2857 2858 /* Close the root pipe. */ 2859 Static void 2860 ohci_root_intr_close(usbd_pipe_handle pipe) 2861 { 2862 ohci_softc_t *sc = pipe->device->bus->hci_private; 2863 2864 DPRINTF(("ohci_root_intr_close\n")); 2865 2866 sc->sc_intrxfer = NULL; 2867 } 2868 2869 /************************/ 2870 2871 Static usbd_status 2872 ohci_device_ctrl_transfer(usbd_xfer_handle xfer) 2873 { 2874 usbd_status err; 2875 2876 /* Insert last in queue. */ 2877 err = usb_insert_transfer(xfer); 2878 if (err) 2879 return (err); 2880 2881 /* Pipe isn't running, start first */ 2882 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2883 } 2884 2885 Static usbd_status 2886 ohci_device_ctrl_start(usbd_xfer_handle xfer) 2887 { 2888 ohci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2889 usbd_status err; 2890 2891 if (sc->sc_dying) 2892 return (USBD_IOERROR); 2893 2894 #ifdef DIAGNOSTIC 2895 if (!(xfer->rqflags & URQ_REQUEST)) { 2896 /* XXX panic */ 2897 printf("ohci_device_ctrl_transfer: not a request\n"); 2898 return (USBD_INVAL); 2899 } 2900 #endif 2901 2902 err = ohci_device_request(xfer); 2903 if (err) 2904 return (err); 2905 2906 if (sc->sc_bus.use_polling) 2907 ohci_waitintr(sc, xfer); 2908 return (USBD_IN_PROGRESS); 2909 } 2910 2911 /* Abort a device control request. */ 2912 Static void 2913 ohci_device_ctrl_abort(usbd_xfer_handle xfer) 2914 { 2915 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer)); 2916 ohci_abort_xfer(xfer, USBD_CANCELLED); 2917 } 2918 2919 /* Close a device control pipe. */ 2920 Static void 2921 ohci_device_ctrl_close(usbd_pipe_handle pipe) 2922 { 2923 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2924 ohci_softc_t *sc = pipe->device->bus->hci_private; 2925 2926 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe)); 2927 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2928 ohci_free_std(sc, opipe->tail.td); 2929 } 2930 2931 /************************/ 2932 2933 Static void 2934 ohci_device_clear_toggle(usbd_pipe_handle pipe) 2935 { 2936 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2937 ohci_softc_t *sc = pipe->device->bus->hci_private; 2938 2939 opipe->sed->ed.ed_headp &= HTOO32(~OHCI_TOGGLECARRY); 2940 } 2941 2942 Static void 2943 ohci_noop(usbd_pipe_handle pipe) 2944 { 2945 } 2946 2947 Static usbd_status 2948 ohci_device_bulk_transfer(usbd_xfer_handle xfer) 2949 { 2950 usbd_status err; 2951 2952 /* Insert last in queue. */ 2953 err = usb_insert_transfer(xfer); 2954 if (err) 2955 return (err); 2956 2957 /* Pipe isn't running, start first */ 2958 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2959 } 2960 2961 Static usbd_status 2962 ohci_device_bulk_start(usbd_xfer_handle xfer) 2963 { 2964 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2965 usbd_device_handle dev = opipe->pipe.device; 2966 ohci_softc_t *sc = dev->bus->hci_private; 2967 int addr = dev->address; 2968 ohci_soft_td_t *data, *tail, *tdp; 2969 ohci_soft_ed_t *sed; 2970 int s, len, isread, endpt; 2971 usbd_status err; 2972 2973 if (sc->sc_dying) 2974 return (USBD_IOERROR); 2975 2976 #ifdef DIAGNOSTIC 2977 if (xfer->rqflags & URQ_REQUEST) { 2978 /* XXX panic */ 2979 printf("ohci_device_bulk_start: a request\n"); 2980 return (USBD_INVAL); 2981 } 2982 #endif 2983 2984 len = xfer->length; 2985 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 2986 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2987 sed = opipe->sed; 2988 2989 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d " 2990 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags, 2991 endpt)); 2992 2993 opipe->u.bulk.isread = isread; 2994 opipe->u.bulk.length = len; 2995 2996 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 2997 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2998 /* Update device address */ 2999 sed->ed.ed_flags = HTOO32( 3000 (O32TOH(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) | 3001 OHCI_ED_SET_FA(addr)); 3002 3003 /* Allocate a chain of new TDs (including a new tail). */ 3004 data = opipe->tail.td; 3005 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 3006 data, &tail); 3007 /* We want interrupt at the end of the transfer. */ 3008 tail->td.td_flags &= HTOO32(~OHCI_TD_INTR_MASK); 3009 tail->td.td_flags |= HTOO32(OHCI_TD_SET_DI(1)); 3010 tail->flags |= OHCI_CALL_DONE; 3011 tail = tail->nexttd; /* point at sentinel */ 3012 usb_syncmem(&tail->dma, tail->offs + offsetof(ohci_td_t, td_flags), 3013 sizeof(tail->td.td_flags), 3014 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3015 if (err) 3016 return (err); 3017 3018 tail->xfer = NULL; 3019 xfer->hcpriv = data; 3020 3021 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x " 3022 "td_cbp=0x%08x td_be=0x%08x\n", 3023 (int)O32TOH(sed->ed.ed_flags), 3024 (int)O32TOH(data->td.td_flags), 3025 (int)O32TOH(data->td.td_cbp), 3026 (int)O32TOH(data->td.td_be))); 3027 3028 #ifdef OHCI_DEBUG 3029 if (ohcidebug > 5) { 3030 ohci_dump_ed(sc, sed); 3031 ohci_dump_tds(sc, data); 3032 } 3033 #endif 3034 3035 /* Insert ED in schedule */ 3036 s = splusb(); 3037 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 3038 tdp->xfer = xfer; 3039 } 3040 sed->ed.ed_tailp = HTOO32(tail->physaddr); 3041 opipe->tail.td = tail; 3042 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3043 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3044 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3045 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 3046 if (xfer->timeout && !sc->sc_bus.use_polling) { 3047 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 3048 ohci_timeout, xfer); 3049 } 3050 3051 #if 0 3052 /* This goes wrong if we are too slow. */ 3053 if (ohcidebug > 10) { 3054 delay(10000); 3055 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 3056 OREAD4(sc, OHCI_COMMAND_STATUS))); 3057 ohci_dump_ed(sc, sed); 3058 ohci_dump_tds(sc, data); 3059 } 3060 #endif 3061 3062 splx(s); 3063 3064 return (USBD_IN_PROGRESS); 3065 } 3066 3067 Static void 3068 ohci_device_bulk_abort(usbd_xfer_handle xfer) 3069 { 3070 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer)); 3071 ohci_abort_xfer(xfer, USBD_CANCELLED); 3072 } 3073 3074 /* 3075 * Close a device bulk pipe. 3076 */ 3077 Static void 3078 ohci_device_bulk_close(usbd_pipe_handle pipe) 3079 { 3080 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3081 ohci_softc_t *sc = pipe->device->bus->hci_private; 3082 3083 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe)); 3084 ohci_close_pipe(pipe, sc->sc_bulk_head); 3085 ohci_free_std(sc, opipe->tail.td); 3086 } 3087 3088 /************************/ 3089 3090 Static usbd_status 3091 ohci_device_intr_transfer(usbd_xfer_handle xfer) 3092 { 3093 usbd_status err; 3094 3095 /* Insert last in queue. */ 3096 err = usb_insert_transfer(xfer); 3097 if (err) 3098 return (err); 3099 3100 /* Pipe isn't running, start first */ 3101 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 3102 } 3103 3104 Static usbd_status 3105 ohci_device_intr_start(usbd_xfer_handle xfer) 3106 { 3107 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3108 usbd_device_handle dev = opipe->pipe.device; 3109 ohci_softc_t *sc = dev->bus->hci_private; 3110 ohci_soft_ed_t *sed = opipe->sed; 3111 ohci_soft_td_t *data, *tail; 3112 int s, len, isread, endpt; 3113 3114 if (sc->sc_dying) 3115 return (USBD_IOERROR); 3116 3117 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d " 3118 "flags=%d priv=%p\n", 3119 xfer, xfer->length, xfer->flags, xfer->priv)); 3120 3121 #ifdef DIAGNOSTIC 3122 if (xfer->rqflags & URQ_REQUEST) 3123 panic("ohci_device_intr_transfer: a request"); 3124 #endif 3125 3126 len = xfer->length; 3127 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 3128 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3129 3130 data = opipe->tail.td; 3131 tail = ohci_alloc_std(sc); 3132 if (tail == NULL) 3133 return (USBD_NOMEM); 3134 tail->xfer = NULL; 3135 3136 data->td.td_flags = HTOO32( 3137 isread ? OHCI_TD_IN : OHCI_TD_OUT | 3138 OHCI_TD_NOCC | 3139 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 3140 if (xfer->flags & USBD_SHORT_XFER_OK) 3141 data->td.td_flags |= HTOO32(OHCI_TD_R); 3142 data->td.td_cbp = HTOO32(DMAADDR(&xfer->dmabuf, 0)); 3143 data->nexttd = tail; 3144 data->td.td_nexttd = HTOO32(tail->physaddr); 3145 data->td.td_be = HTOO32(O32TOH(data->td.td_cbp) + len - 1); 3146 data->len = len; 3147 data->xfer = xfer; 3148 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 3149 usb_syncmem(&data->dma, data->offs, sizeof(data->td), 3150 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3151 xfer->hcpriv = data; 3152 3153 #ifdef OHCI_DEBUG 3154 if (ohcidebug > 5) { 3155 DPRINTF(("ohci_device_intr_transfer:\n")); 3156 ohci_dump_ed(sc, sed); 3157 ohci_dump_tds(sc, data); 3158 } 3159 #endif 3160 3161 /* Insert ED in schedule */ 3162 s = splusb(); 3163 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3164 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3165 sed->ed.ed_tailp = HTOO32(tail->physaddr); 3166 opipe->tail.td = tail; 3167 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3168 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3169 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3170 3171 #if 0 3172 /* 3173 * This goes horribly wrong, printing thousands of descriptors, 3174 * because false references are followed due to the fact that the 3175 * TD is gone. 3176 */ 3177 if (ohcidebug > 5) { 3178 usb_delay_ms(&sc->sc_bus, 5); 3179 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 3180 OREAD4(sc, OHCI_COMMAND_STATUS))); 3181 ohci_dump_ed(sc, sed); 3182 ohci_dump_tds(sc, data); 3183 } 3184 #endif 3185 splx(s); 3186 3187 return (USBD_IN_PROGRESS); 3188 } 3189 3190 /* Abort a device control request. */ 3191 Static void 3192 ohci_device_intr_abort(usbd_xfer_handle xfer) 3193 { 3194 if (xfer->pipe->intrxfer == xfer) { 3195 DPRINTF(("ohci_device_intr_abort: remove\n")); 3196 xfer->pipe->intrxfer = NULL; 3197 } 3198 ohci_abort_xfer(xfer, USBD_CANCELLED); 3199 } 3200 3201 /* Close a device interrupt pipe. */ 3202 Static void 3203 ohci_device_intr_close(usbd_pipe_handle pipe) 3204 { 3205 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3206 ohci_softc_t *sc = pipe->device->bus->hci_private; 3207 int nslots = opipe->u.intr.nslots; 3208 int pos = opipe->u.intr.pos; 3209 int j; 3210 ohci_soft_ed_t *p, *sed = opipe->sed; 3211 int s; 3212 3213 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 3214 pipe, nslots, pos)); 3215 s = splusb(); 3216 usb_syncmem(&sed->dma, sed->offs, 3217 sizeof(sed->ed), BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3218 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 3219 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3220 sizeof(sed->ed.ed_flags), 3221 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3222 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 3223 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) 3224 usb_delay_ms(&sc->sc_bus, 2); 3225 3226 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 3227 continue; 3228 #ifdef DIAGNOSTIC 3229 if (p == NULL) 3230 panic("ohci_device_intr_close: ED not found"); 3231 #endif 3232 p->next = sed->next; 3233 p->ed.ed_nexted = sed->ed.ed_nexted; 3234 usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted), 3235 sizeof(p->ed.ed_nexted), 3236 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3237 splx(s); 3238 3239 for (j = 0; j < nslots; j++) 3240 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 3241 3242 ohci_free_std(sc, opipe->tail.td); 3243 ohci_free_sed(sc, opipe->sed); 3244 } 3245 3246 Static usbd_status 3247 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival) 3248 { 3249 int i, j, s, best; 3250 u_int npoll, slow, shigh, nslots; 3251 u_int bestbw, bw; 3252 ohci_soft_ed_t *hsed, *sed = opipe->sed; 3253 3254 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 3255 if (ival == 0) { 3256 printf("ohci_setintr: 0 interval\n"); 3257 return (USBD_INVAL); 3258 } 3259 3260 npoll = OHCI_NO_INTRS; 3261 while (npoll > ival) 3262 npoll /= 2; 3263 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 3264 3265 /* 3266 * We now know which level in the tree the ED must go into. 3267 * Figure out which slot has most bandwidth left over. 3268 * Slots to examine: 3269 * npoll 3270 * 1 0 3271 * 2 1 2 3272 * 4 3 4 5 6 3273 * 8 7 8 9 10 11 12 13 14 3274 * N (N-1) .. (N-1+N-1) 3275 */ 3276 slow = npoll-1; 3277 shigh = slow + npoll; 3278 nslots = OHCI_NO_INTRS / npoll; 3279 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 3280 bw = 0; 3281 for (j = 0; j < nslots; j++) 3282 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 3283 if (bw < bestbw) { 3284 best = i; 3285 bestbw = bw; 3286 } 3287 } 3288 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 3289 best, slow, shigh, bestbw)); 3290 3291 s = splusb(); 3292 hsed = sc->sc_eds[best]; 3293 sed->next = hsed->next; 3294 usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags), 3295 sizeof(hsed->ed.ed_flags), 3296 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3297 sed->ed.ed_nexted = hsed->ed.ed_nexted; 3298 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3299 sizeof(sed->ed.ed_flags), 3300 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3301 hsed->next = sed; 3302 hsed->ed.ed_nexted = HTOO32(sed->physaddr); 3303 usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags), 3304 sizeof(hsed->ed.ed_flags), 3305 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3306 splx(s); 3307 3308 for (j = 0; j < nslots; j++) 3309 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 3310 opipe->u.intr.nslots = nslots; 3311 opipe->u.intr.pos = best; 3312 3313 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 3314 return (USBD_NORMAL_COMPLETION); 3315 } 3316 3317 /***********************/ 3318 3319 usbd_status 3320 ohci_device_isoc_transfer(usbd_xfer_handle xfer) 3321 { 3322 usbd_status err; 3323 3324 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer)); 3325 3326 /* Put it on our queue, */ 3327 err = usb_insert_transfer(xfer); 3328 3329 /* bail out on error, */ 3330 if (err && err != USBD_IN_PROGRESS) 3331 return (err); 3332 3333 /* XXX should check inuse here */ 3334 3335 /* insert into schedule, */ 3336 ohci_device_isoc_enter(xfer); 3337 3338 /* and start if the pipe wasn't running */ 3339 if (!err) 3340 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 3341 3342 return (err); 3343 } 3344 3345 void 3346 ohci_device_isoc_enter(usbd_xfer_handle xfer) 3347 { 3348 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3349 usbd_device_handle dev = opipe->pipe.device; 3350 ohci_softc_t *sc = dev->bus->hci_private; 3351 ohci_soft_ed_t *sed = opipe->sed; 3352 struct iso *iso = &opipe->u.iso; 3353 ohci_soft_itd_t *sitd, *nsitd; 3354 ohci_physaddr_t buf, offs, noffs, bp0; 3355 int i, ncur, nframes; 3356 int s; 3357 3358 DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p " 3359 "nframes=%d\n", 3360 iso->inuse, iso->next, xfer, xfer->nframes)); 3361 3362 if (sc->sc_dying) 3363 return; 3364 3365 if (iso->next == -1) { 3366 /* Not in use yet, schedule it a few frames ahead. */ 3367 iso->next = O32TOH(sc->sc_hcca->hcca_frame_number) + 5; 3368 DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n", 3369 iso->next)); 3370 } 3371 3372 sitd = opipe->tail.itd; 3373 buf = DMAADDR(&xfer->dmabuf, 0); 3374 bp0 = OHCI_PAGE(buf); 3375 offs = OHCI_PAGE_OFFSET(buf); 3376 nframes = xfer->nframes; 3377 xfer->hcpriv = sitd; 3378 for (i = ncur = 0; i < nframes; i++, ncur++) { 3379 noffs = offs + xfer->frlengths[i]; 3380 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ 3381 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */ 3382 3383 /* Allocate next ITD */ 3384 nsitd = ohci_alloc_sitd(sc); 3385 if (nsitd == NULL) { 3386 /* XXX what now? */ 3387 printf("%s: isoc TD alloc failed\n", 3388 device_xname(sc->sc_dev)); 3389 return; 3390 } 3391 3392 /* Fill current ITD */ 3393 sitd->itd.itd_flags = HTOO32( 3394 OHCI_ITD_NOCC | 3395 OHCI_ITD_SET_SF(iso->next) | 3396 OHCI_ITD_SET_DI(6) | /* delay intr a little */ 3397 OHCI_ITD_SET_FC(ncur)); 3398 sitd->itd.itd_bp0 = HTOO32(bp0); 3399 sitd->nextitd = nsitd; 3400 sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr); 3401 sitd->itd.itd_be = HTOO32(bp0 + offs - 1); 3402 sitd->xfer = xfer; 3403 sitd->flags = 0; 3404 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 3405 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3406 3407 sitd = nsitd; 3408 iso->next = iso->next + ncur; 3409 bp0 = OHCI_PAGE(buf + offs); 3410 ncur = 0; 3411 } 3412 sitd->itd.itd_offset[ncur] = HTOO16(OHCI_ITD_MK_OFFS(offs)); 3413 offs = noffs; 3414 } 3415 nsitd = ohci_alloc_sitd(sc); 3416 if (nsitd == NULL) { 3417 /* XXX what now? */ 3418 printf("%s: isoc TD alloc failed\n", 3419 device_xname(sc->sc_dev)); 3420 return; 3421 } 3422 /* Fixup last used ITD */ 3423 sitd->itd.itd_flags = HTOO32( 3424 OHCI_ITD_NOCC | 3425 OHCI_ITD_SET_SF(iso->next) | 3426 OHCI_ITD_SET_DI(0) | 3427 OHCI_ITD_SET_FC(ncur)); 3428 sitd->itd.itd_bp0 = HTOO32(bp0); 3429 sitd->nextitd = nsitd; 3430 sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr); 3431 sitd->itd.itd_be = HTOO32(bp0 + offs - 1); 3432 sitd->xfer = xfer; 3433 sitd->flags = OHCI_CALL_DONE; 3434 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 3435 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3436 3437 iso->next = iso->next + ncur; 3438 iso->inuse += nframes; 3439 3440 xfer->actlen = offs; /* XXX pretend we did it all */ 3441 3442 xfer->status = USBD_IN_PROGRESS; 3443 3444 #ifdef OHCI_DEBUG 3445 if (ohcidebug > 5) { 3446 DPRINTF(("ohci_device_isoc_enter: frame=%d\n", 3447 O32TOH(sc->sc_hcca->hcca_frame_number))); 3448 ohci_dump_itds(sc, xfer->hcpriv); 3449 ohci_dump_ed(sc, sed); 3450 } 3451 #endif 3452 3453 s = splusb(); 3454 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3455 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3456 sed->ed.ed_tailp = HTOO32(nsitd->physaddr); 3457 opipe->tail.itd = nsitd; 3458 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3459 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3460 sizeof(sed->ed.ed_flags), 3461 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3462 splx(s); 3463 3464 #ifdef OHCI_DEBUG 3465 if (ohcidebug > 5) { 3466 delay(150000); 3467 DPRINTF(("ohci_device_isoc_enter: after frame=%d\n", 3468 O32TOH(sc->sc_hcca->hcca_frame_number))); 3469 ohci_dump_itds(sc, xfer->hcpriv); 3470 ohci_dump_ed(sc, sed); 3471 } 3472 #endif 3473 } 3474 3475 usbd_status 3476 ohci_device_isoc_start(usbd_xfer_handle xfer) 3477 { 3478 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3479 ohci_softc_t *sc = opipe->pipe.device->bus->hci_private; 3480 3481 DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer)); 3482 3483 if (sc->sc_dying) 3484 return (USBD_IOERROR); 3485 3486 #ifdef DIAGNOSTIC 3487 if (xfer->status != USBD_IN_PROGRESS) 3488 printf("ohci_device_isoc_start: not in progress %p\n", xfer); 3489 #endif 3490 3491 /* XXX anything to do? */ 3492 3493 return (USBD_IN_PROGRESS); 3494 } 3495 3496 void 3497 ohci_device_isoc_abort(usbd_xfer_handle xfer) 3498 { 3499 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3500 ohci_softc_t *sc = opipe->pipe.device->bus->hci_private; 3501 ohci_soft_ed_t *sed; 3502 ohci_soft_itd_t *sitd; 3503 int s; 3504 3505 s = splusb(); 3506 3507 DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer)); 3508 3509 /* Transfer is already done. */ 3510 if (xfer->status != USBD_NOT_STARTED && 3511 xfer->status != USBD_IN_PROGRESS) { 3512 splx(s); 3513 printf("ohci_device_isoc_abort: early return\n"); 3514 return; 3515 } 3516 3517 /* Give xfer the requested abort code. */ 3518 xfer->status = USBD_CANCELLED; 3519 3520 sed = opipe->sed; 3521 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3522 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3523 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */ 3524 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3525 sizeof(sed->ed.ed_flags), 3526 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3527 3528 sitd = xfer->hcpriv; 3529 #ifdef DIAGNOSTIC 3530 if (sitd == NULL) { 3531 splx(s); 3532 printf("ohci_device_isoc_abort: hcpriv==0\n"); 3533 return; 3534 } 3535 #endif 3536 for (; sitd->xfer == xfer; sitd = sitd->nextitd) { 3537 #ifdef DIAGNOSTIC 3538 DPRINTFN(1,("abort sets done sitd=%p\n", sitd)); 3539 sitd->isdone = 1; 3540 #endif 3541 } 3542 3543 splx(s); 3544 3545 usb_delay_ms(&sc->sc_bus, OHCI_ITD_NOFFSET); 3546 3547 s = splusb(); 3548 3549 /* Run callback. */ 3550 usb_transfer_complete(xfer); 3551 3552 sed->ed.ed_headp = HTOO32(sitd->physaddr); /* unlink TDs */ 3553 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */ 3554 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3555 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3556 3557 splx(s); 3558 } 3559 3560 void 3561 ohci_device_isoc_done(usbd_xfer_handle xfer) 3562 { 3563 DPRINTFN(1,("ohci_device_isoc_done: xfer=%p\n", xfer)); 3564 } 3565 3566 usbd_status 3567 ohci_setup_isoc(usbd_pipe_handle pipe) 3568 { 3569 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3570 ohci_softc_t *sc = pipe->device->bus->hci_private; 3571 struct iso *iso = &opipe->u.iso; 3572 int s; 3573 3574 iso->next = -1; 3575 iso->inuse = 0; 3576 3577 s = splusb(); 3578 ohci_add_ed(sc, opipe->sed, sc->sc_isoc_head); 3579 splx(s); 3580 3581 return (USBD_NORMAL_COMPLETION); 3582 } 3583 3584 void 3585 ohci_device_isoc_close(usbd_pipe_handle pipe) 3586 { 3587 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3588 ohci_softc_t *sc = pipe->device->bus->hci_private; 3589 3590 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe)); 3591 ohci_close_pipe(pipe, sc->sc_isoc_head); 3592 #ifdef DIAGNOSTIC 3593 opipe->tail.itd->isdone = 1; 3594 #endif 3595 ohci_free_sitd(sc, opipe->tail.itd); 3596 } 3597
Indexes created Thu Sep 25 16:09:42 GMT 2025