ohci.c revision 1.201
1 /* $NetBSD: ohci.c,v 1.201 2009/11/01 06:36:44 uebayasi Exp $ */ 2 /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */ 3 4 /* 5 * Copyright (c) 1998, 2004, 2005 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Lennart Augustsson (lennart (at) augustsson.net) at 10 * Carlstedt Research & Technology. 11 * This code is derived from software contributed to The NetBSD Foundation 12 * by Charles M. Hannum. 13 * 14 * Redistribution and use in source and binary forms, with or without 15 * modification, are permitted provided that the following conditions 16 * are met: 17 * 1. Redistributions of source code must retain the above copyright 18 * notice, this list of conditions and the following disclaimer. 19 * 2. Redistributions in binary form must reproduce the above copyright 20 * notice, this list of conditions and the following disclaimer in the 21 * documentation and/or other materials provided with the distribution. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 24 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 25 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 26 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 27 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 31 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 32 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 33 * POSSIBILITY OF SUCH DAMAGE. 34 */ 35 36 /* 37 * USB Open Host Controller driver. 38 * 39 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html 40 * USB spec: http://www.usb.org/developers/docs/ 41 */ 42 43 #include <sys/cdefs.h> 44 __KERNEL_RCSID(0, "$NetBSD: ohci.c,v 1.201 2009/11/01 06:36:44 uebayasi Exp $"); 45 46 #include <sys/param.h> 47 #include <sys/systm.h> 48 #include <sys/malloc.h> 49 #if defined(__NetBSD__) || defined(__OpenBSD__) 50 #include <sys/kernel.h> 51 #include <sys/device.h> 52 #include <sys/select.h> 53 #include <uvm/uvm_extern.h> 54 #elif defined(__FreeBSD__) 55 #include <sys/module.h> 56 #include <sys/bus.h> 57 #include <machine/bus_pio.h> 58 #include <machine/bus_memio.h> 59 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 60 #include <sys/cpu.h> 61 #endif 62 #endif 63 #include <sys/proc.h> 64 #include <sys/queue.h> 65 66 #include <sys/bus.h> 67 #include <machine/endian.h> 68 69 #include <dev/usb/usb.h> 70 #include <dev/usb/usbdi.h> 71 #include <dev/usb/usbdivar.h> 72 #include <dev/usb/usb_mem.h> 73 #include <dev/usb/usb_quirks.h> 74 75 #include <dev/usb/ohcireg.h> 76 #include <dev/usb/ohcivar.h> 77 #include <dev/usb/usbroothub_subr.h> 78 79 #if defined(__FreeBSD__) 80 #include <machine/clock.h> 81 82 #define delay(d) DELAY(d) 83 #endif 84 85 #if defined(__OpenBSD__) 86 struct cfdriver ohci_cd = { 87 NULL, "ohci", DV_DULL 88 }; 89 #endif 90 91 #ifdef OHCI_DEBUG 92 #define DPRINTF(x) if (ohcidebug) logprintf x 93 #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x 94 int ohcidebug = 0; 95 #ifndef __NetBSD__ 96 #define snprintb((q), (f), "%b", q,f,b,l) snprintf((b), (l)) 97 #endif 98 #else 99 #define DPRINTF(x) 100 #define DPRINTFN(n,x) 101 #endif 102 103 #if BYTE_ORDER == BIG_ENDIAN 104 #define SWAP_ENDIAN OHCI_LITTLE_ENDIAN 105 #else 106 #define SWAP_ENDIAN OHCI_BIG_ENDIAN 107 #endif 108 109 #define O16TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap16(val) : val) 110 #define O32TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap32(val) : val) 111 #define HTOO16(val) O16TOH(val) 112 #define HTOO32(val) O32TOH(val) 113 114 struct ohci_pipe; 115 116 Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *); 117 Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *); 118 119 Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *); 120 Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *); 121 122 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *); 123 Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *); 124 125 #if 0 126 Static void ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *, 127 ohci_soft_td_t *); 128 #endif 129 Static usbd_status ohci_alloc_std_chain(struct ohci_pipe *, 130 ohci_softc_t *, int, int, usbd_xfer_handle, 131 ohci_soft_td_t *, ohci_soft_td_t **); 132 133 Static usbd_status ohci_open(usbd_pipe_handle); 134 Static void ohci_poll(struct usbd_bus *); 135 Static void ohci_softintr(void *); 136 Static void ohci_waitintr(ohci_softc_t *, usbd_xfer_handle); 137 Static void ohci_rhsc(ohci_softc_t *, usbd_xfer_handle); 138 139 Static usbd_status ohci_device_request(usbd_xfer_handle xfer); 140 Static void ohci_add_ed(ohci_softc_t *, ohci_soft_ed_t *, 141 ohci_soft_ed_t *); 142 143 Static void ohci_rem_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 144 Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *); 145 Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *); 146 Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t); 147 Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *); 148 Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *); 149 Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t); 150 151 Static usbd_status ohci_setup_isoc(usbd_pipe_handle pipe); 152 Static void ohci_device_isoc_enter(usbd_xfer_handle); 153 154 Static usbd_status ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 155 Static void ohci_freem(struct usbd_bus *, usb_dma_t *); 156 157 Static usbd_xfer_handle ohci_allocx(struct usbd_bus *); 158 Static void ohci_freex(struct usbd_bus *, usbd_xfer_handle); 159 160 Static usbd_status ohci_root_ctrl_transfer(usbd_xfer_handle); 161 Static usbd_status ohci_root_ctrl_start(usbd_xfer_handle); 162 Static void ohci_root_ctrl_abort(usbd_xfer_handle); 163 Static void ohci_root_ctrl_close(usbd_pipe_handle); 164 Static void ohci_root_ctrl_done(usbd_xfer_handle); 165 166 Static usbd_status ohci_root_intr_transfer(usbd_xfer_handle); 167 Static usbd_status ohci_root_intr_start(usbd_xfer_handle); 168 Static void ohci_root_intr_abort(usbd_xfer_handle); 169 Static void ohci_root_intr_close(usbd_pipe_handle); 170 Static void ohci_root_intr_done(usbd_xfer_handle); 171 172 Static usbd_status ohci_device_ctrl_transfer(usbd_xfer_handle); 173 Static usbd_status ohci_device_ctrl_start(usbd_xfer_handle); 174 Static void ohci_device_ctrl_abort(usbd_xfer_handle); 175 Static void ohci_device_ctrl_close(usbd_pipe_handle); 176 Static void ohci_device_ctrl_done(usbd_xfer_handle); 177 178 Static usbd_status ohci_device_bulk_transfer(usbd_xfer_handle); 179 Static usbd_status ohci_device_bulk_start(usbd_xfer_handle); 180 Static void ohci_device_bulk_abort(usbd_xfer_handle); 181 Static void ohci_device_bulk_close(usbd_pipe_handle); 182 Static void ohci_device_bulk_done(usbd_xfer_handle); 183 184 Static usbd_status ohci_device_intr_transfer(usbd_xfer_handle); 185 Static usbd_status ohci_device_intr_start(usbd_xfer_handle); 186 Static void ohci_device_intr_abort(usbd_xfer_handle); 187 Static void ohci_device_intr_close(usbd_pipe_handle); 188 Static void ohci_device_intr_done(usbd_xfer_handle); 189 190 Static usbd_status ohci_device_isoc_transfer(usbd_xfer_handle); 191 Static usbd_status ohci_device_isoc_start(usbd_xfer_handle); 192 Static void ohci_device_isoc_abort(usbd_xfer_handle); 193 Static void ohci_device_isoc_close(usbd_pipe_handle); 194 Static void ohci_device_isoc_done(usbd_xfer_handle); 195 196 Static usbd_status ohci_device_setintr(ohci_softc_t *sc, 197 struct ohci_pipe *pipe, int ival); 198 199 Static void ohci_timeout(void *); 200 Static void ohci_timeout_task(void *); 201 Static void ohci_rhsc_enable(void *); 202 203 Static void ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *); 204 Static void ohci_abort_xfer(usbd_xfer_handle, usbd_status); 205 206 Static void ohci_device_clear_toggle(usbd_pipe_handle pipe); 207 Static void ohci_noop(usbd_pipe_handle pipe); 208 209 #ifdef OHCI_DEBUG 210 Static void ohci_dumpregs(ohci_softc_t *); 211 Static void ohci_dump_tds(ohci_softc_t *, ohci_soft_td_t *); 212 Static void ohci_dump_td(ohci_softc_t *, ohci_soft_td_t *); 213 Static void ohci_dump_ed(ohci_softc_t *, ohci_soft_ed_t *); 214 Static void ohci_dump_itd(ohci_softc_t *, ohci_soft_itd_t *); 215 Static void ohci_dump_itds(ohci_softc_t *, ohci_soft_itd_t *); 216 #endif 217 218 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 219 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 220 #define OWRITE1(sc, r, x) \ 221 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 222 #define OWRITE2(sc, r, x) \ 223 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 224 #define OWRITE4(sc, r, x) \ 225 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 226 static __inline uint8_t 227 OREAD1(ohci_softc_t *sc, bus_size_t r) 228 { 229 230 OBARR(sc); 231 return bus_space_read_1(sc->iot, sc->ioh, r); 232 } 233 234 static __inline uint16_t 235 OREAD2(ohci_softc_t *sc, bus_size_t r) 236 { 237 238 OBARR(sc); 239 return bus_space_read_2(sc->iot, sc->ioh, r); 240 } 241 242 static __inline uint32_t 243 OREAD4(ohci_softc_t *sc, bus_size_t r) 244 { 245 246 OBARR(sc); 247 return bus_space_read_4(sc->iot, sc->ioh, r); 248 } 249 250 /* Reverse the bits in a value 0 .. 31 */ 251 Static u_int8_t revbits[OHCI_NO_INTRS] = 252 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 253 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 254 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 255 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 256 257 struct ohci_pipe { 258 struct usbd_pipe pipe; 259 ohci_soft_ed_t *sed; 260 union { 261 ohci_soft_td_t *td; 262 ohci_soft_itd_t *itd; 263 } tail; 264 /* Info needed for different pipe kinds. */ 265 union { 266 /* Control pipe */ 267 struct { 268 usb_dma_t reqdma; 269 u_int length; 270 ohci_soft_td_t *setup, *data, *stat; 271 } ctl; 272 /* Interrupt pipe */ 273 struct { 274 int nslots; 275 int pos; 276 } intr; 277 /* Bulk pipe */ 278 struct { 279 u_int length; 280 int isread; 281 } bulk; 282 /* Iso pipe */ 283 struct iso { 284 int next, inuse; 285 } iso; 286 } u; 287 }; 288 289 #define OHCI_INTR_ENDPT 1 290 291 Static const struct usbd_bus_methods ohci_bus_methods = { 292 ohci_open, 293 ohci_softintr, 294 ohci_poll, 295 ohci_allocm, 296 ohci_freem, 297 ohci_allocx, 298 ohci_freex, 299 }; 300 301 Static const struct usbd_pipe_methods ohci_root_ctrl_methods = { 302 ohci_root_ctrl_transfer, 303 ohci_root_ctrl_start, 304 ohci_root_ctrl_abort, 305 ohci_root_ctrl_close, 306 ohci_noop, 307 ohci_root_ctrl_done, 308 }; 309 310 Static const struct usbd_pipe_methods ohci_root_intr_methods = { 311 ohci_root_intr_transfer, 312 ohci_root_intr_start, 313 ohci_root_intr_abort, 314 ohci_root_intr_close, 315 ohci_noop, 316 ohci_root_intr_done, 317 }; 318 319 Static const struct usbd_pipe_methods ohci_device_ctrl_methods = { 320 ohci_device_ctrl_transfer, 321 ohci_device_ctrl_start, 322 ohci_device_ctrl_abort, 323 ohci_device_ctrl_close, 324 ohci_noop, 325 ohci_device_ctrl_done, 326 }; 327 328 Static const struct usbd_pipe_methods ohci_device_intr_methods = { 329 ohci_device_intr_transfer, 330 ohci_device_intr_start, 331 ohci_device_intr_abort, 332 ohci_device_intr_close, 333 ohci_device_clear_toggle, 334 ohci_device_intr_done, 335 }; 336 337 Static const struct usbd_pipe_methods ohci_device_bulk_methods = { 338 ohci_device_bulk_transfer, 339 ohci_device_bulk_start, 340 ohci_device_bulk_abort, 341 ohci_device_bulk_close, 342 ohci_device_clear_toggle, 343 ohci_device_bulk_done, 344 }; 345 346 Static const struct usbd_pipe_methods ohci_device_isoc_methods = { 347 ohci_device_isoc_transfer, 348 ohci_device_isoc_start, 349 ohci_device_isoc_abort, 350 ohci_device_isoc_close, 351 ohci_noop, 352 ohci_device_isoc_done, 353 }; 354 355 #if defined(__NetBSD__) || defined(__OpenBSD__) 356 int 357 ohci_activate(device_t self, enum devact act) 358 { 359 struct ohci_softc *sc = device_private(self); 360 int rv = 0; 361 362 switch (act) { 363 case DVACT_ACTIVATE: 364 return (EOPNOTSUPP); 365 366 case DVACT_DEACTIVATE: 367 sc->sc_dying = 1; 368 if (sc->sc_child != NULL) 369 rv = config_deactivate(sc->sc_child); 370 break; 371 } 372 return (rv); 373 } 374 375 void 376 ohci_childdet(device_t self, device_t child) 377 { 378 struct ohci_softc *sc = device_private(self); 379 380 KASSERT(sc->sc_child == child); 381 sc->sc_child = NULL; 382 } 383 384 int 385 ohci_detach(struct ohci_softc *sc, int flags) 386 { 387 int rv = 0; 388 usbd_xfer_handle xfer; 389 390 if (sc->sc_child != NULL) 391 rv = config_detach(sc->sc_child, flags); 392 393 if (rv != 0) 394 return (rv); 395 396 usb_uncallout(sc->sc_tmo_rhsc, ohci_rhsc_enable, sc); 397 398 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 399 usb_callout_destroy(sc->sc_tmo_rhsc); 400 401 if (sc->sc_hcca != NULL) 402 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 403 while((xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers)) != NULL) { 404 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 405 free(xfer, M_USB); 406 } 407 408 return (rv); 409 } 410 #endif 411 412 ohci_soft_ed_t * 413 ohci_alloc_sed(ohci_softc_t *sc) 414 { 415 ohci_soft_ed_t *sed; 416 usbd_status err; 417 int i, offs; 418 usb_dma_t dma; 419 420 if (sc->sc_freeeds == NULL) { 421 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 422 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 423 OHCI_ED_ALIGN, &dma); 424 if (err) 425 return (0); 426 for(i = 0; i < OHCI_SED_CHUNK; i++) { 427 offs = i * OHCI_SED_SIZE; 428 sed = KERNADDR(&dma, offs); 429 sed->physaddr = DMAADDR(&dma, offs); 430 sed->dma = dma; 431 sed->offs = offs; 432 sed->next = sc->sc_freeeds; 433 sc->sc_freeeds = sed; 434 } 435 } 436 sed = sc->sc_freeeds; 437 sc->sc_freeeds = sed->next; 438 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 439 sed->next = 0; 440 return (sed); 441 } 442 443 void 444 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 445 { 446 sed->next = sc->sc_freeeds; 447 sc->sc_freeeds = sed; 448 } 449 450 ohci_soft_td_t * 451 ohci_alloc_std(ohci_softc_t *sc) 452 { 453 ohci_soft_td_t *std; 454 usbd_status err; 455 int i, offs; 456 usb_dma_t dma; 457 int s; 458 459 if (sc->sc_freetds == NULL) { 460 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 461 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 462 OHCI_TD_ALIGN, &dma); 463 if (err) 464 return (NULL); 465 s = splusb(); 466 for(i = 0; i < OHCI_STD_CHUNK; i++) { 467 offs = i * OHCI_STD_SIZE; 468 std = KERNADDR(&dma, offs); 469 std->physaddr = DMAADDR(&dma, offs); 470 std->dma = dma; 471 std->offs = offs; 472 std->nexttd = sc->sc_freetds; 473 sc->sc_freetds = std; 474 } 475 splx(s); 476 } 477 478 s = splusb(); 479 std = sc->sc_freetds; 480 sc->sc_freetds = std->nexttd; 481 memset(&std->td, 0, sizeof(ohci_td_t)); 482 std->nexttd = NULL; 483 std->xfer = NULL; 484 ohci_hash_add_td(sc, std); 485 splx(s); 486 487 return (std); 488 } 489 490 void 491 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std) 492 { 493 int s; 494 495 s = splusb(); 496 ohci_hash_rem_td(sc, std); 497 std->nexttd = sc->sc_freetds; 498 sc->sc_freetds = std; 499 splx(s); 500 } 501 502 usbd_status 503 ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc, 504 int alen, int rd, usbd_xfer_handle xfer, 505 ohci_soft_td_t *sp, ohci_soft_td_t **ep) 506 { 507 ohci_soft_td_t *next, *cur; 508 ohci_physaddr_t dataphys, dataphysend; 509 u_int32_t tdflags; 510 int len, curlen; 511 usb_dma_t *dma = &xfer->dmabuf; 512 u_int16_t flags = xfer->flags; 513 514 DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen)); 515 516 len = alen; 517 cur = sp; 518 dataphys = DMAADDR(dma, 0); 519 dataphysend = OHCI_PAGE(dataphys + len - 1); 520 usb_syncmem(dma, 0, len, 521 rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 522 tdflags = HTOO32( 523 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 524 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) | 525 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR); 526 527 for (;;) { 528 next = ohci_alloc_std(sc); 529 if (next == NULL) 530 goto nomem; 531 532 /* The OHCI hardware can handle at most one page crossing. */ 533 if (OHCI_PAGE(dataphys) == dataphysend || 534 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) { 535 /* we can handle it in this TD */ 536 curlen = len; 537 } else { 538 /* must use multiple TDs, fill as much as possible. */ 539 curlen = 2 * OHCI_PAGE_SIZE - 540 (dataphys & (OHCI_PAGE_SIZE-1)); 541 /* the length must be a multiple of the max size */ 542 curlen -= curlen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize); 543 #ifdef DIAGNOSTIC 544 if (curlen == 0) 545 panic("ohci_alloc_std: curlen == 0"); 546 #endif 547 } 548 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x " 549 "dataphysend=0x%08x len=%d curlen=%d\n", 550 dataphys, dataphysend, 551 len, curlen)); 552 len -= curlen; 553 554 cur->td.td_flags = tdflags; 555 cur->td.td_cbp = HTOO32(dataphys); 556 cur->nexttd = next; 557 cur->td.td_nexttd = HTOO32(next->physaddr); 558 cur->td.td_be = HTOO32(dataphys + curlen - 1); 559 cur->len = curlen; 560 cur->flags = OHCI_ADD_LEN; 561 cur->xfer = xfer; 562 usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td), 563 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 564 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n", 565 dataphys, dataphys + curlen - 1)); 566 if (len == 0) 567 break; 568 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n")); 569 dataphys += curlen; 570 cur = next; 571 } 572 if (!rd && (flags & USBD_FORCE_SHORT_XFER) && 573 alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) { 574 /* Force a 0 length transfer at the end. */ 575 576 cur = next; 577 next = ohci_alloc_std(sc); 578 if (next == NULL) 579 goto nomem; 580 581 cur->td.td_flags = tdflags; 582 cur->td.td_cbp = 0; /* indicate 0 length packet */ 583 cur->nexttd = next; 584 cur->td.td_nexttd = HTOO32(next->physaddr); 585 cur->td.td_be = ~0; 586 cur->len = 0; 587 cur->flags = 0; 588 cur->xfer = xfer; 589 usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td), 590 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 591 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n")); 592 } 593 *ep = cur; 594 595 return (USBD_NORMAL_COMPLETION); 596 597 nomem: 598 /* XXX free chain */ 599 return (USBD_NOMEM); 600 } 601 602 #if 0 603 Static void 604 ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std, 605 ohci_soft_td_t *stdend) 606 { 607 ohci_soft_td_t *p; 608 609 for (; std != stdend; std = p) { 610 p = std->nexttd; 611 ohci_free_std(sc, std); 612 } 613 } 614 #endif 615 616 ohci_soft_itd_t * 617 ohci_alloc_sitd(ohci_softc_t *sc) 618 { 619 ohci_soft_itd_t *sitd; 620 usbd_status err; 621 int i, s, offs; 622 usb_dma_t dma; 623 624 if (sc->sc_freeitds == NULL) { 625 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n")); 626 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK, 627 OHCI_ITD_ALIGN, &dma); 628 if (err) 629 return (NULL); 630 s = splusb(); 631 for(i = 0; i < OHCI_SITD_CHUNK; i++) { 632 offs = i * OHCI_SITD_SIZE; 633 sitd = KERNADDR(&dma, offs); 634 sitd->physaddr = DMAADDR(&dma, offs); 635 sitd->dma = dma; 636 sitd->offs = offs; 637 sitd->nextitd = sc->sc_freeitds; 638 sc->sc_freeitds = sitd; 639 } 640 splx(s); 641 } 642 643 s = splusb(); 644 sitd = sc->sc_freeitds; 645 sc->sc_freeitds = sitd->nextitd; 646 memset(&sitd->itd, 0, sizeof(ohci_itd_t)); 647 sitd->nextitd = NULL; 648 sitd->xfer = NULL; 649 ohci_hash_add_itd(sc, sitd); 650 splx(s); 651 652 #ifdef DIAGNOSTIC 653 sitd->isdone = 0; 654 #endif 655 656 return (sitd); 657 } 658 659 void 660 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 661 { 662 int s; 663 664 DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd)); 665 666 #ifdef DIAGNOSTIC 667 if (!sitd->isdone) { 668 panic("ohci_free_sitd: sitd=%p not done", sitd); 669 return; 670 } 671 /* Warn double free */ 672 sitd->isdone = 0; 673 #endif 674 675 s = splusb(); 676 ohci_hash_rem_itd(sc, sitd); 677 sitd->nextitd = sc->sc_freeitds; 678 sc->sc_freeitds = sitd; 679 splx(s); 680 } 681 682 usbd_status 683 ohci_init(ohci_softc_t *sc) 684 { 685 ohci_soft_ed_t *sed, *psed; 686 usbd_status err; 687 int i; 688 u_int32_t s, ctl, rwc, ival, hcr, fm, per, rev, desca, descb; 689 690 DPRINTF(("ohci_init: start\n")); 691 aprint_normal_dev(sc->sc_dev, ""); 692 693 sc->sc_hcca = NULL; 694 usb_callout_init(sc->sc_tmo_rhsc); 695 696 for (i = 0; i < OHCI_HASH_SIZE; i++) 697 LIST_INIT(&sc->sc_hash_tds[i]); 698 for (i = 0; i < OHCI_HASH_SIZE; i++) 699 LIST_INIT(&sc->sc_hash_itds[i]); 700 701 SIMPLEQ_INIT(&sc->sc_free_xfers); 702 703 rev = OREAD4(sc, OHCI_REVISION); 704 aprint_normal("OHCI version %d.%d%s\n", 705 OHCI_REV_HI(rev), OHCI_REV_LO(rev), 706 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 707 708 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 709 aprint_error_dev(sc->sc_dev, "unsupported OHCI revision\n"); 710 sc->sc_bus.usbrev = USBREV_UNKNOWN; 711 return (USBD_INVAL); 712 } 713 sc->sc_bus.usbrev = USBREV_1_0; 714 715 #ifdef __NetBSD__ 716 usb_setup_reserve(sc->sc_dev, &sc->sc_dma_reserve, sc->sc_bus.dmatag, 717 USB_MEM_RESERVE); 718 #endif 719 720 /* XXX determine alignment by R/W */ 721 /* Allocate the HCCA area. */ 722 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 723 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 724 if (err) { 725 sc->sc_hcca = NULL; 726 return err; 727 } 728 sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0); 729 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 730 731 sc->sc_eintrs = OHCI_NORMAL_INTRS; 732 733 /* Allocate dummy ED that starts the control list. */ 734 sc->sc_ctrl_head = ohci_alloc_sed(sc); 735 if (sc->sc_ctrl_head == NULL) { 736 err = USBD_NOMEM; 737 goto bad1; 738 } 739 sc->sc_ctrl_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 740 741 /* Allocate dummy ED that starts the bulk list. */ 742 sc->sc_bulk_head = ohci_alloc_sed(sc); 743 if (sc->sc_bulk_head == NULL) { 744 err = USBD_NOMEM; 745 goto bad2; 746 } 747 sc->sc_bulk_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 748 usb_syncmem(&sc->sc_bulk_head->dma, sc->sc_bulk_head->offs, 749 sizeof(sc->sc_bulk_head->ed), 750 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 751 752 /* Allocate dummy ED that starts the isochronous list. */ 753 sc->sc_isoc_head = ohci_alloc_sed(sc); 754 if (sc->sc_isoc_head == NULL) { 755 err = USBD_NOMEM; 756 goto bad3; 757 } 758 sc->sc_isoc_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 759 usb_syncmem(&sc->sc_isoc_head->dma, sc->sc_isoc_head->offs, 760 sizeof(sc->sc_isoc_head->ed), 761 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 762 763 /* Allocate all the dummy EDs that make up the interrupt tree. */ 764 for (i = 0; i < OHCI_NO_EDS; i++) { 765 sed = ohci_alloc_sed(sc); 766 if (sed == NULL) { 767 while (--i >= 0) 768 ohci_free_sed(sc, sc->sc_eds[i]); 769 err = USBD_NOMEM; 770 goto bad4; 771 } 772 /* All ED fields are set to 0. */ 773 sc->sc_eds[i] = sed; 774 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 775 if (i != 0) 776 psed = sc->sc_eds[(i-1) / 2]; 777 else 778 psed= sc->sc_isoc_head; 779 sed->next = psed; 780 sed->ed.ed_nexted = HTOO32(psed->physaddr); 781 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 782 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 783 } 784 /* 785 * Fill HCCA interrupt table. The bit reversal is to get 786 * the tree set up properly to spread the interrupts. 787 */ 788 for (i = 0; i < OHCI_NO_INTRS; i++) 789 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 790 HTOO32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 791 usb_syncmem(&sc->sc_hccadma, 0, OHCI_HCCA_SIZE, 792 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 793 794 #ifdef OHCI_DEBUG 795 if (ohcidebug > 15) { 796 for (i = 0; i < OHCI_NO_EDS; i++) { 797 printf("ed#%d ", i); 798 ohci_dump_ed(sc, sc->sc_eds[i]); 799 } 800 printf("iso "); 801 ohci_dump_ed(sc, sc->sc_isoc_head); 802 } 803 #endif 804 805 /* Preserve values programmed by SMM/BIOS but lost over reset. */ 806 ctl = OREAD4(sc, OHCI_CONTROL); 807 rwc = ctl & OHCI_RWC; 808 fm = OREAD4(sc, OHCI_FM_INTERVAL); 809 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 810 descb = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 811 812 /* Determine in what context we are running. */ 813 if (ctl & OHCI_IR) { 814 /* SMM active, request change */ 815 DPRINTF(("ohci_init: SMM active, request owner change\n")); 816 if ((sc->sc_intre & (OHCI_OC | OHCI_MIE)) == 817 (OHCI_OC | OHCI_MIE)) 818 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_MIE); 819 s = OREAD4(sc, OHCI_COMMAND_STATUS); 820 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 821 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 822 usb_delay_ms(&sc->sc_bus, 1); 823 ctl = OREAD4(sc, OHCI_CONTROL); 824 } 825 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_MIE); 826 if ((ctl & OHCI_IR) == 0) { 827 aprint_error_dev(sc->sc_dev, 828 "SMM does not respond, resetting\n"); 829 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 830 goto reset; 831 } 832 #if 0 833 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */ 834 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 835 /* BIOS started controller. */ 836 DPRINTF(("ohci_init: BIOS active\n")); 837 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 838 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL | rwc); 839 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 840 } 841 #endif 842 } else { 843 DPRINTF(("ohci_init: cold started\n")); 844 reset: 845 /* Controller was cold started. */ 846 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 847 } 848 849 /* 850 * This reset should not be necessary according to the OHCI spec, but 851 * without it some controllers do not start. 852 */ 853 DPRINTF(("%s: resetting\n", device_xname(sc->sc_dev))); 854 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 855 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 856 857 /* We now own the host controller and the bus has been reset. */ 858 859 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 860 /* Nominal time for a reset is 10 us. */ 861 for (i = 0; i < 10; i++) { 862 delay(10); 863 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 864 if (!hcr) 865 break; 866 } 867 if (hcr) { 868 aprint_error_dev(sc->sc_dev, "reset timeout\n"); 869 err = USBD_IOERROR; 870 goto bad5; 871 } 872 #ifdef OHCI_DEBUG 873 if (ohcidebug > 15) 874 ohci_dumpregs(sc); 875 #endif 876 877 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 878 879 /* Set up HC registers. */ 880 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 881 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 882 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 883 /* disable all interrupts and then switch on all desired interrupts */ 884 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 885 /* switch on desired functional features */ 886 ctl = OREAD4(sc, OHCI_CONTROL); 887 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 888 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 889 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL | rwc; 890 /* And finally start it! */ 891 OWRITE4(sc, OHCI_CONTROL, ctl); 892 893 /* 894 * The controller is now OPERATIONAL. Set a some final 895 * registers that should be set earlier, but that the 896 * controller ignores when in the SUSPEND state. 897 */ 898 ival = OHCI_GET_IVAL(fm); 899 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 900 fm |= OHCI_FSMPS(ival) | ival; 901 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 902 per = OHCI_PERIODIC(ival); /* 90% periodic */ 903 OWRITE4(sc, OHCI_PERIODIC_START, per); 904 905 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */ 906 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP); 907 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 908 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY); 909 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca); 910 911 /* 912 * The AMD756 requires a delay before re-reading the register, 913 * otherwise it will occasionally report 0 ports. 914 */ 915 sc->sc_noport = 0; 916 for (i = 0; i < 10 && sc->sc_noport == 0; i++) { 917 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY); 918 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 919 } 920 921 #ifdef OHCI_DEBUG 922 if (ohcidebug > 5) 923 ohci_dumpregs(sc); 924 #endif 925 926 /* Set up the bus struct. */ 927 sc->sc_bus.methods = &ohci_bus_methods; 928 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 929 930 #if defined(__NetBSD__) || defined(__OpenBSD__) 931 sc->sc_control = sc->sc_intre = 0; 932 #endif 933 934 /* Finally, turn on interrupts. */ 935 DPRINTFN(1,("ohci_init: enabling\n")); 936 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 937 938 return (USBD_NORMAL_COMPLETION); 939 940 bad5: 941 for (i = 0; i < OHCI_NO_EDS; i++) 942 ohci_free_sed(sc, sc->sc_eds[i]); 943 bad4: 944 ohci_free_sed(sc, sc->sc_isoc_head); 945 bad3: 946 ohci_free_sed(sc, sc->sc_bulk_head); 947 bad2: 948 ohci_free_sed(sc, sc->sc_ctrl_head); 949 bad1: 950 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 951 sc->sc_hcca = NULL; 952 return (err); 953 } 954 955 usbd_status 956 ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 957 { 958 #if defined(__NetBSD__) || defined(__OpenBSD__) 959 struct ohci_softc *sc = bus->hci_private; 960 #endif 961 usbd_status status; 962 963 status = usb_allocmem(&sc->sc_bus, size, 0, dma); 964 #ifdef __NetBSD__ 965 if (status == USBD_NOMEM) 966 status = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size); 967 #endif 968 return status; 969 } 970 971 void 972 ohci_freem(struct usbd_bus *bus, usb_dma_t *dma) 973 { 974 #if defined(__NetBSD__) || defined(__OpenBSD__) 975 struct ohci_softc *sc = bus->hci_private; 976 #endif 977 #ifdef __NetBSD__ 978 if (dma->block->flags & USB_DMA_RESERVE) { 979 usb_reserve_freem(&sc->sc_dma_reserve, dma); 980 return; 981 } 982 #endif 983 usb_freemem(&sc->sc_bus, dma); 984 } 985 986 usbd_xfer_handle 987 ohci_allocx(struct usbd_bus *bus) 988 { 989 struct ohci_softc *sc = bus->hci_private; 990 usbd_xfer_handle xfer; 991 992 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 993 if (xfer != NULL) { 994 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 995 #ifdef DIAGNOSTIC 996 if (xfer->busy_free != XFER_FREE) { 997 printf("ohci_allocx: xfer=%p not free, 0x%08x\n", xfer, 998 xfer->busy_free); 999 } 1000 #endif 1001 } else { 1002 xfer = malloc(sizeof(struct ohci_xfer), M_USB, M_NOWAIT); 1003 } 1004 if (xfer != NULL) { 1005 memset(xfer, 0, sizeof (struct ohci_xfer)); 1006 #ifdef DIAGNOSTIC 1007 xfer->busy_free = XFER_BUSY; 1008 #endif 1009 } 1010 return (xfer); 1011 } 1012 1013 void 1014 ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 1015 { 1016 struct ohci_softc *sc = bus->hci_private; 1017 1018 #ifdef DIAGNOSTIC 1019 if (xfer->busy_free != XFER_BUSY) { 1020 printf("ohci_freex: xfer=%p not busy, 0x%08x\n", xfer, 1021 xfer->busy_free); 1022 } 1023 xfer->busy_free = XFER_FREE; 1024 #endif 1025 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 1026 } 1027 1028 /* 1029 * Shut down the controller when the system is going down. 1030 */ 1031 bool 1032 ohci_shutdown(device_t self, int flags) 1033 { 1034 ohci_softc_t *sc = device_private(self); 1035 1036 DPRINTF(("ohci_shutdown: stopping the HC\n")); 1037 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1038 return true; 1039 } 1040 1041 bool 1042 ohci_resume(device_t dv PMF_FN_ARGS) 1043 { 1044 ohci_softc_t *sc = device_private(dv); 1045 uint32_t ctl; 1046 int s; 1047 1048 s = splhardusb(); 1049 sc->sc_bus.use_polling++; 1050 /* Some broken BIOSes do not recover these values */ 1051 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 1052 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, 1053 sc->sc_ctrl_head->physaddr); 1054 OWRITE4(sc, OHCI_BULK_HEAD_ED, 1055 sc->sc_bulk_head->physaddr); 1056 if (sc->sc_intre) 1057 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_intre & 1058 (OHCI_ALL_INTRS | OHCI_MIE)); 1059 if (sc->sc_control) 1060 ctl = sc->sc_control; 1061 else 1062 ctl = OREAD4(sc, OHCI_CONTROL); 1063 ctl |= OHCI_HCFS_RESUME; 1064 OWRITE4(sc, OHCI_CONTROL, ctl); 1065 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 1066 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL; 1067 OWRITE4(sc, OHCI_CONTROL, ctl); 1068 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 1069 sc->sc_control = sc->sc_intre = 0; 1070 sc->sc_bus.use_polling--; 1071 splx(s); 1072 1073 return true; 1074 } 1075 1076 bool 1077 ohci_suspend(device_t dv PMF_FN_ARGS) 1078 { 1079 ohci_softc_t *sc = device_private(dv); 1080 uint32_t ctl; 1081 int s; 1082 1083 s = splhardusb(); 1084 sc->sc_bus.use_polling++; 1085 ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK; 1086 if (sc->sc_control == 0) { 1087 /* 1088 * Preserve register values, in case that BIOS 1089 * does not recover them. 1090 */ 1091 sc->sc_control = ctl; 1092 sc->sc_intre = OREAD4(sc, 1093 OHCI_INTERRUPT_ENABLE); 1094 } 1095 ctl |= OHCI_HCFS_SUSPEND; 1096 OWRITE4(sc, OHCI_CONTROL, ctl); 1097 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1098 sc->sc_bus.use_polling--; 1099 splx(s); 1100 1101 return true; 1102 } 1103 1104 #ifdef OHCI_DEBUG 1105 void 1106 ohci_dumpregs(ohci_softc_t *sc) 1107 { 1108 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 1109 OREAD4(sc, OHCI_REVISION), 1110 OREAD4(sc, OHCI_CONTROL), 1111 OREAD4(sc, OHCI_COMMAND_STATUS))); 1112 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 1113 OREAD4(sc, OHCI_INTERRUPT_STATUS), 1114 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 1115 OREAD4(sc, OHCI_INTERRUPT_DISABLE))); 1116 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 1117 OREAD4(sc, OHCI_HCCA), 1118 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 1119 OREAD4(sc, OHCI_CONTROL_HEAD_ED))); 1120 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 1121 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 1122 OREAD4(sc, OHCI_BULK_HEAD_ED), 1123 OREAD4(sc, OHCI_BULK_CURRENT_ED))); 1124 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 1125 OREAD4(sc, OHCI_DONE_HEAD), 1126 OREAD4(sc, OHCI_FM_INTERVAL), 1127 OREAD4(sc, OHCI_FM_REMAINING))); 1128 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 1129 OREAD4(sc, OHCI_FM_NUMBER), 1130 OREAD4(sc, OHCI_PERIODIC_START), 1131 OREAD4(sc, OHCI_LS_THRESHOLD))); 1132 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n", 1133 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 1134 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 1135 OREAD4(sc, OHCI_RH_STATUS))); 1136 DPRINTF((" port1=0x%08x port2=0x%08x\n", 1137 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 1138 OREAD4(sc, OHCI_RH_PORT_STATUS(2)))); 1139 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n", 1140 O32TOH(sc->sc_hcca->hcca_frame_number), 1141 O32TOH(sc->sc_hcca->hcca_done_head))); 1142 } 1143 #endif 1144 1145 Static int ohci_intr1(ohci_softc_t *); 1146 1147 int 1148 ohci_intr(void *p) 1149 { 1150 ohci_softc_t *sc = p; 1151 1152 if (sc == NULL || sc->sc_dying || !device_has_power(sc->sc_dev)) 1153 return (0); 1154 1155 /* If we get an interrupt while polling, then just ignore it. */ 1156 if (sc->sc_bus.use_polling) { 1157 #ifdef DIAGNOSTIC 1158 DPRINTFN(16, ("ohci_intr: ignored interrupt while polling\n")); 1159 #endif 1160 /* for level triggered intrs, should do something to ack */ 1161 OWRITE4(sc, OHCI_INTERRUPT_STATUS, 1162 OREAD4(sc, OHCI_INTERRUPT_STATUS)); 1163 1164 return (0); 1165 } 1166 1167 return (ohci_intr1(sc)); 1168 } 1169 1170 Static int 1171 ohci_intr1(ohci_softc_t *sc) 1172 { 1173 u_int32_t intrs, eintrs; 1174 1175 DPRINTFN(14,("ohci_intr1: enter\n")); 1176 1177 /* In case the interrupt occurs before initialization has completed. */ 1178 if (sc == NULL || sc->sc_hcca == NULL) { 1179 #ifdef DIAGNOSTIC 1180 printf("ohci_intr: sc->sc_hcca == NULL\n"); 1181 #endif 1182 return (0); 1183 } 1184 1185 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1186 if (!intrs) 1187 return (0); 1188 1189 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs & ~(OHCI_MIE|OHCI_WDH)); /* Acknowledge */ 1190 eintrs = intrs & sc->sc_eintrs; 1191 if (!eintrs) 1192 return (0); 1193 1194 sc->sc_bus.intr_context++; 1195 sc->sc_bus.no_intrs++; 1196 DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 1197 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 1198 (u_int)eintrs)); 1199 1200 if (eintrs & OHCI_SO) { 1201 sc->sc_overrun_cnt++; 1202 if (usbd_ratecheck(&sc->sc_overrun_ntc)) { 1203 printf("%s: %u scheduling overruns\n", 1204 device_xname(sc->sc_dev), sc->sc_overrun_cnt); 1205 sc->sc_overrun_cnt = 0; 1206 } 1207 /* XXX do what */ 1208 eintrs &= ~OHCI_SO; 1209 } 1210 if (eintrs & OHCI_WDH) { 1211 /* 1212 * We block the interrupt below, and reenable it later from 1213 * ohci_softintr(). 1214 */ 1215 usb_schedsoftintr(&sc->sc_bus); 1216 } 1217 if (eintrs & OHCI_RD) { 1218 printf("%s: resume detect\n", device_xname(sc->sc_dev)); 1219 /* XXX process resume detect */ 1220 } 1221 if (eintrs & OHCI_UE) { 1222 printf("%s: unrecoverable error, controller halted\n", 1223 device_xname(sc->sc_dev)); 1224 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1225 /* XXX what else */ 1226 } 1227 if (eintrs & OHCI_RHSC) { 1228 /* 1229 * We block the interrupt below, and reenable it later from 1230 * a timeout. 1231 */ 1232 ohci_rhsc(sc, sc->sc_intrxfer); 1233 /* Do not allow RHSC interrupts > 1 per second */ 1234 usb_callout(sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc); 1235 } 1236 1237 sc->sc_bus.intr_context--; 1238 1239 if (eintrs != 0) { 1240 /* Block unprocessed interrupts. */ 1241 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs); 1242 sc->sc_eintrs &= ~eintrs; 1243 DPRINTFN(1, ("%s: blocking intrs 0x%x\n", 1244 device_xname(sc->sc_dev), eintrs)); 1245 } 1246 1247 return (1); 1248 } 1249 1250 void 1251 ohci_rhsc_enable(void *v_sc) 1252 { 1253 ohci_softc_t *sc = v_sc; 1254 int s; 1255 1256 s = splhardusb(); 1257 sc->sc_eintrs |= OHCI_RHSC; 1258 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1259 splx(s); 1260 } 1261 1262 #ifdef OHCI_DEBUG 1263 const char *ohci_cc_strs[] = { 1264 "NO_ERROR", 1265 "CRC", 1266 "BIT_STUFFING", 1267 "DATA_TOGGLE_MISMATCH", 1268 "STALL", 1269 "DEVICE_NOT_RESPONDING", 1270 "PID_CHECK_FAILURE", 1271 "UNEXPECTED_PID", 1272 "DATA_OVERRUN", 1273 "DATA_UNDERRUN", 1274 "BUFFER_OVERRUN", 1275 "BUFFER_UNDERRUN", 1276 "reserved", 1277 "reserved", 1278 "NOT_ACCESSED", 1279 "NOT_ACCESSED", 1280 }; 1281 #endif 1282 1283 void 1284 ohci_softintr(void *v) 1285 { 1286 struct usbd_bus *bus = v; 1287 ohci_softc_t *sc = bus->hci_private; 1288 ohci_soft_itd_t *sitd, *sidone, *sitdnext; 1289 ohci_soft_td_t *std, *sdone, *stdnext; 1290 usbd_xfer_handle xfer; 1291 struct ohci_pipe *opipe; 1292 int len, cc, s; 1293 int i, j, actlen, iframes, uedir; 1294 ohci_physaddr_t done; 1295 1296 DPRINTFN(10,("ohci_softintr: enter\n")); 1297 1298 sc->sc_bus.intr_context++; 1299 1300 s = splhardusb(); 1301 usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head), 1302 sizeof(sc->sc_hcca->hcca_done_head), 1303 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1304 done = O32TOH(sc->sc_hcca->hcca_done_head) & ~OHCI_DONE_INTRS; 1305 sc->sc_hcca->hcca_done_head = 0; 1306 usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head), 1307 sizeof(sc->sc_hcca->hcca_done_head), 1308 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1309 OWRITE4(sc, OHCI_INTERRUPT_STATUS, OHCI_WDH); 1310 sc->sc_eintrs |= OHCI_WDH; 1311 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_WDH); 1312 splx(s); 1313 1314 /* Reverse the done list. */ 1315 for (sdone = NULL, sidone = NULL; done != 0; ) { 1316 std = ohci_hash_find_td(sc, done); 1317 if (std != NULL) { 1318 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 1319 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1320 std->dnext = sdone; 1321 done = O32TOH(std->td.td_nexttd); 1322 sdone = std; 1323 DPRINTFN(10,("add TD %p\n", std)); 1324 continue; 1325 } 1326 sitd = ohci_hash_find_itd(sc, done); 1327 if (sitd != NULL) { 1328 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 1329 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1330 sitd->dnext = sidone; 1331 done = O32TOH(sitd->itd.itd_nextitd); 1332 sidone = sitd; 1333 DPRINTFN(5,("add ITD %p\n", sitd)); 1334 continue; 1335 } 1336 panic("ohci_softintr: addr 0x%08lx not found", (u_long)done); 1337 } 1338 1339 DPRINTFN(10,("ohci_softintr: sdone=%p sidone=%p\n", sdone, sidone)); 1340 1341 #ifdef OHCI_DEBUG 1342 if (ohcidebug > 10) { 1343 DPRINTF(("ohci_process_done: TD done:\n")); 1344 ohci_dump_tds(sc, sdone); 1345 } 1346 #endif 1347 1348 for (std = sdone; std; std = stdnext) { 1349 xfer = std->xfer; 1350 stdnext = std->dnext; 1351 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n", 1352 std, xfer, xfer ? xfer->hcpriv : 0)); 1353 if (xfer == NULL) { 1354 /* 1355 * xfer == NULL: There seems to be no xfer associated 1356 * with this TD. It is tailp that happened to end up on 1357 * the done queue. 1358 * Shouldn't happen, but some chips are broken(?). 1359 */ 1360 continue; 1361 } 1362 if (xfer->status == USBD_CANCELLED || 1363 xfer->status == USBD_TIMEOUT) { 1364 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1365 xfer)); 1366 /* Handled by abort routine. */ 1367 continue; 1368 } 1369 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 1370 1371 len = std->len; 1372 if (std->td.td_cbp != 0) 1373 len -= O32TOH(std->td.td_be) - 1374 O32TOH(std->td.td_cbp) + 1; 1375 DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", len, 1376 std->flags)); 1377 if (std->flags & OHCI_ADD_LEN) 1378 xfer->actlen += len; 1379 1380 cc = OHCI_TD_GET_CC(O32TOH(std->td.td_flags)); 1381 if (cc == OHCI_CC_NO_ERROR) { 1382 if (std->flags & OHCI_CALL_DONE) { 1383 xfer->status = USBD_NORMAL_COMPLETION; 1384 s = splusb(); 1385 usb_transfer_complete(xfer); 1386 splx(s); 1387 } 1388 ohci_free_std(sc, std); 1389 } else { 1390 /* 1391 * Endpoint is halted. First unlink all the TDs 1392 * belonging to the failed transfer, and then restart 1393 * the endpoint. 1394 */ 1395 ohci_soft_td_t *p, *n; 1396 opipe = (struct ohci_pipe *)xfer->pipe; 1397 1398 DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n", 1399 OHCI_TD_GET_CC(O32TOH(std->td.td_flags)), 1400 ohci_cc_strs[OHCI_TD_GET_CC(O32TOH(std->td.td_flags))])); 1401 1402 /* remove TDs */ 1403 for (p = std; p->xfer == xfer; p = n) { 1404 n = p->nexttd; 1405 ohci_free_std(sc, p); 1406 } 1407 1408 /* clear halt */ 1409 opipe->sed->ed.ed_headp = HTOO32(p->physaddr); 1410 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1411 1412 if (cc == OHCI_CC_STALL) 1413 xfer->status = USBD_STALLED; 1414 else 1415 xfer->status = USBD_IOERROR; 1416 s = splusb(); 1417 usb_transfer_complete(xfer); 1418 splx(s); 1419 } 1420 } 1421 1422 #ifdef OHCI_DEBUG 1423 if (ohcidebug > 10) { 1424 DPRINTF(("ohci_softintr: ITD done:\n")); 1425 ohci_dump_itds(sc, sidone); 1426 } 1427 #endif 1428 1429 for (sitd = sidone; sitd != NULL; sitd = sitdnext) { 1430 xfer = sitd->xfer; 1431 sitdnext = sitd->dnext; 1432 DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n", 1433 sitd, xfer, xfer ? xfer->hcpriv : 0)); 1434 if (xfer == NULL) 1435 continue; 1436 if (xfer->status == USBD_CANCELLED || 1437 xfer->status == USBD_TIMEOUT) { 1438 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1439 xfer)); 1440 /* Handled by abort routine. */ 1441 continue; 1442 } 1443 #ifdef DIAGNOSTIC 1444 if (sitd->isdone) 1445 printf("ohci_softintr: sitd=%p is done\n", sitd); 1446 sitd->isdone = 1; 1447 #endif 1448 if (sitd->flags & OHCI_CALL_DONE) { 1449 ohci_soft_itd_t *next; 1450 1451 opipe = (struct ohci_pipe *)xfer->pipe; 1452 opipe->u.iso.inuse -= xfer->nframes; 1453 uedir = UE_GET_DIR(xfer->pipe->endpoint->edesc-> 1454 bEndpointAddress); 1455 xfer->status = USBD_NORMAL_COMPLETION; 1456 actlen = 0; 1457 for (i = 0, sitd = xfer->hcpriv;; 1458 sitd = next) { 1459 next = sitd->nextitd; 1460 if (OHCI_ITD_GET_CC(O32TOH(sitd-> 1461 itd.itd_flags)) != OHCI_CC_NO_ERROR) 1462 xfer->status = USBD_IOERROR; 1463 /* For input, update frlengths with actual */ 1464 /* XXX anything necessary for output? */ 1465 if (uedir == UE_DIR_IN && 1466 xfer->status == USBD_NORMAL_COMPLETION) { 1467 iframes = OHCI_ITD_GET_FC(O32TOH( 1468 sitd->itd.itd_flags)); 1469 for (j = 0; j < iframes; i++, j++) { 1470 len = O16TOH(sitd-> 1471 itd.itd_offset[j]); 1472 if ((OHCI_ITD_PSW_GET_CC(len) & 1473 OHCI_CC_NOT_ACCESSED_MASK) 1474 == OHCI_CC_NOT_ACCESSED) 1475 len = 0; 1476 else 1477 len = OHCI_ITD_PSW_LENGTH(len); 1478 xfer->frlengths[i] = len; 1479 actlen += len; 1480 } 1481 } 1482 if (sitd->flags & OHCI_CALL_DONE) 1483 break; 1484 ohci_free_sitd(sc, sitd); 1485 } 1486 ohci_free_sitd(sc, sitd); 1487 if (uedir == UE_DIR_IN && 1488 xfer->status == USBD_NORMAL_COMPLETION) 1489 xfer->actlen = actlen; 1490 xfer->hcpriv = NULL; 1491 1492 s = splusb(); 1493 usb_transfer_complete(xfer); 1494 splx(s); 1495 } 1496 } 1497 1498 #ifdef USB_USE_SOFTINTR 1499 if (sc->sc_softwake) { 1500 sc->sc_softwake = 0; 1501 wakeup(&sc->sc_softwake); 1502 } 1503 #endif /* USB_USE_SOFTINTR */ 1504 1505 sc->sc_bus.intr_context--; 1506 DPRINTFN(10,("ohci_softintr: done:\n")); 1507 } 1508 1509 void 1510 ohci_device_ctrl_done(usbd_xfer_handle xfer) 1511 { 1512 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1513 int len = UGETW(xfer->request.wLength); 1514 int isread = (xfer->request.bmRequestType & UT_READ); 1515 1516 DPRINTFN(10,("ohci_device_ctrl_done: xfer=%p\n", xfer)); 1517 1518 #ifdef DIAGNOSTIC 1519 if (!(xfer->rqflags & URQ_REQUEST)) { 1520 panic("ohci_device_ctrl_done: not a request"); 1521 } 1522 #endif 1523 if (len) 1524 usb_syncmem(&xfer->dmabuf, 0, len, 1525 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1526 usb_syncmem(&opipe->u.ctl.reqdma, 0, 1527 sizeof(usb_device_request_t), BUS_DMASYNC_POSTWRITE); 1528 } 1529 1530 void 1531 ohci_device_intr_done(usbd_xfer_handle xfer) 1532 { 1533 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1534 ohci_softc_t *sc = opipe->pipe.device->bus->hci_private; 1535 ohci_soft_ed_t *sed = opipe->sed; 1536 ohci_soft_td_t *data, *tail; 1537 int isread = 1538 (UE_GET_DIR(xfer->pipe->endpoint->edesc->bEndpointAddress) == UE_DIR_IN); 1539 1540 1541 DPRINTFN(10,("ohci_device_intr_done: xfer=%p, actlen=%d\n", 1542 xfer, xfer->actlen)); 1543 1544 usb_syncmem(&xfer->dmabuf, 0, xfer->length, 1545 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1546 if (xfer->pipe->repeat) { 1547 data = opipe->tail.td; 1548 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 1549 if (tail == NULL) { 1550 xfer->status = USBD_NOMEM; 1551 return; 1552 } 1553 tail->xfer = NULL; 1554 1555 data->td.td_flags = HTOO32( 1556 OHCI_TD_IN | OHCI_TD_NOCC | 1557 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 1558 if (xfer->flags & USBD_SHORT_XFER_OK) 1559 data->td.td_flags |= HTOO32(OHCI_TD_R); 1560 data->td.td_cbp = HTOO32(DMAADDR(&xfer->dmabuf, 0)); 1561 data->nexttd = tail; 1562 data->td.td_nexttd = HTOO32(tail->physaddr); 1563 data->td.td_be = HTOO32(O32TOH(data->td.td_cbp) + 1564 xfer->length - 1); 1565 data->len = xfer->length; 1566 data->xfer = xfer; 1567 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1568 usb_syncmem(&data->dma, data->offs, sizeof(data->td), 1569 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1570 xfer->hcpriv = data; 1571 xfer->actlen = 0; 1572 1573 sed->ed.ed_tailp = HTOO32(tail->physaddr); 1574 usb_syncmem(&sed->dma, 1575 sed->offs + offsetof(ohci_ed_t, ed_tailp), 1576 sizeof(sed->ed.ed_tailp), 1577 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1578 opipe->tail.td = tail; 1579 } 1580 } 1581 1582 void 1583 ohci_device_bulk_done(usbd_xfer_handle xfer) 1584 { 1585 int isread = 1586 (UE_GET_DIR(xfer->pipe->endpoint->edesc->bEndpointAddress) == UE_DIR_IN); 1587 1588 DPRINTFN(10,("ohci_device_bulk_done: xfer=%p, actlen=%d\n", 1589 xfer, xfer->actlen)); 1590 usb_syncmem(&xfer->dmabuf, 0, xfer->length, 1591 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1592 } 1593 1594 void 1595 ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer) 1596 { 1597 usbd_pipe_handle pipe; 1598 u_char *p; 1599 int i, m; 1600 int hstatus; 1601 1602 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1603 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n", 1604 sc, xfer, hstatus)); 1605 1606 if (xfer == NULL) { 1607 /* Just ignore the change. */ 1608 return; 1609 } 1610 1611 pipe = xfer->pipe; 1612 1613 p = KERNADDR(&xfer->dmabuf, 0); 1614 m = min(sc->sc_noport, xfer->length * 8 - 1); 1615 memset(p, 0, xfer->length); 1616 for (i = 1; i <= m; i++) { 1617 /* Pick out CHANGE bits from the status reg. */ 1618 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1619 p[i/8] |= 1 << (i%8); 1620 } 1621 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 1622 xfer->actlen = xfer->length; 1623 xfer->status = USBD_NORMAL_COMPLETION; 1624 1625 usb_transfer_complete(xfer); 1626 } 1627 1628 void 1629 ohci_root_intr_done(usbd_xfer_handle xfer) 1630 { 1631 } 1632 1633 void 1634 ohci_root_ctrl_done(usbd_xfer_handle xfer) 1635 { 1636 } 1637 1638 /* 1639 * Wait here until controller claims to have an interrupt. 1640 * Then call ohci_intr and return. Use timeout to avoid waiting 1641 * too long. 1642 */ 1643 void 1644 ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer) 1645 { 1646 int timo; 1647 u_int32_t intrs; 1648 1649 xfer->status = USBD_IN_PROGRESS; 1650 for (timo = xfer->timeout; timo >= 0; timo--) { 1651 usb_delay_ms(&sc->sc_bus, 1); 1652 if (sc->sc_dying) 1653 break; 1654 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 1655 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs)); 1656 #ifdef OHCI_DEBUG 1657 if (ohcidebug > 15) 1658 ohci_dumpregs(sc); 1659 #endif 1660 if (intrs) { 1661 ohci_intr1(sc); 1662 if (xfer->status != USBD_IN_PROGRESS) 1663 return; 1664 } 1665 } 1666 1667 /* Timeout */ 1668 DPRINTF(("ohci_waitintr: timeout\n")); 1669 xfer->status = USBD_TIMEOUT; 1670 usb_transfer_complete(xfer); 1671 /* XXX should free TD */ 1672 } 1673 1674 void 1675 ohci_poll(struct usbd_bus *bus) 1676 { 1677 ohci_softc_t *sc = bus->hci_private; 1678 #ifdef OHCI_DEBUG 1679 static int last; 1680 int new; 1681 new = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1682 if (new != last) { 1683 DPRINTFN(10,("ohci_poll: intrs=0x%04x\n", new)); 1684 last = new; 1685 } 1686 #endif 1687 1688 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) 1689 ohci_intr1(sc); 1690 } 1691 1692 usbd_status 1693 ohci_device_request(usbd_xfer_handle xfer) 1694 { 1695 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1696 usb_device_request_t *req = &xfer->request; 1697 usbd_device_handle dev = opipe->pipe.device; 1698 ohci_softc_t *sc = dev->bus->hci_private; 1699 int addr = dev->address; 1700 ohci_soft_td_t *setup, *stat, *next, *tail; 1701 ohci_soft_ed_t *sed; 1702 int isread; 1703 int len; 1704 usbd_status err; 1705 int s; 1706 1707 isread = req->bmRequestType & UT_READ; 1708 len = UGETW(req->wLength); 1709 1710 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 1711 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 1712 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1713 UGETW(req->wIndex), len, addr, 1714 opipe->pipe.endpoint->edesc->bEndpointAddress)); 1715 1716 setup = opipe->tail.td; 1717 stat = ohci_alloc_std(sc); 1718 if (stat == NULL) { 1719 err = USBD_NOMEM; 1720 goto bad1; 1721 } 1722 tail = ohci_alloc_std(sc); 1723 if (tail == NULL) { 1724 err = USBD_NOMEM; 1725 goto bad2; 1726 } 1727 tail->xfer = NULL; 1728 1729 sed = opipe->sed; 1730 opipe->u.ctl.length = len; 1731 1732 /* Update device address and length since they may have changed 1733 during the setup of the control pipe in usbd_new_device(). */ 1734 /* XXX This only needs to be done once, but it's too early in open. */ 1735 /* XXXX Should not touch ED here! */ 1736 1737 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 1738 sizeof(sed->ed.ed_flags), 1739 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1740 sed->ed.ed_flags = HTOO32( 1741 (O32TOH(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) | 1742 OHCI_ED_SET_FA(addr) | 1743 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize))); 1744 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 1745 sizeof(sed->ed.ed_flags), 1746 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1747 1748 next = stat; 1749 1750 /* Set up data transaction */ 1751 if (len != 0) { 1752 ohci_soft_td_t *std = stat; 1753 1754 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 1755 std, &stat); 1756 stat = stat->nexttd; /* point at free TD */ 1757 if (err) 1758 goto bad3; 1759 /* Start toggle at 1 and then use the carried toggle. */ 1760 std->td.td_flags &= HTOO32(~OHCI_TD_TOGGLE_MASK); 1761 std->td.td_flags |= HTOO32(OHCI_TD_TOGGLE_1); 1762 usb_syncmem(&std->dma, 1763 std->offs + offsetof(ohci_td_t, td_flags), 1764 sizeof(std->td.td_flags), 1765 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1766 } 1767 1768 memcpy(KERNADDR(&opipe->u.ctl.reqdma, 0), req, sizeof *req); 1769 usb_syncmem(&opipe->u.ctl.reqdma, 0, sizeof *req, BUS_DMASYNC_PREWRITE); 1770 1771 setup->td.td_flags = HTOO32(OHCI_TD_SETUP | OHCI_TD_NOCC | 1772 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1773 setup->td.td_cbp = HTOO32(DMAADDR(&opipe->u.ctl.reqdma, 0)); 1774 setup->nexttd = next; 1775 setup->td.td_nexttd = HTOO32(next->physaddr); 1776 setup->td.td_be = HTOO32(O32TOH(setup->td.td_cbp) + sizeof *req - 1); 1777 setup->len = 0; 1778 setup->xfer = xfer; 1779 setup->flags = 0; 1780 xfer->hcpriv = setup; 1781 usb_syncmem(&setup->dma, setup->offs, sizeof(setup->td), 1782 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1783 1784 stat->td.td_flags = HTOO32( 1785 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | 1786 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1787 stat->td.td_cbp = 0; 1788 stat->nexttd = tail; 1789 stat->td.td_nexttd = HTOO32(tail->physaddr); 1790 stat->td.td_be = 0; 1791 stat->flags = OHCI_CALL_DONE; 1792 stat->len = 0; 1793 stat->xfer = xfer; 1794 usb_syncmem(&stat->dma, stat->offs, sizeof(stat->td), 1795 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1796 1797 #ifdef OHCI_DEBUG 1798 if (ohcidebug > 5) { 1799 DPRINTF(("ohci_device_request:\n")); 1800 ohci_dump_ed(sc, sed); 1801 ohci_dump_tds(sc, setup); 1802 } 1803 #endif 1804 1805 /* Insert ED in schedule */ 1806 s = splusb(); 1807 sed->ed.ed_tailp = HTOO32(tail->physaddr); 1808 usb_syncmem(&sed->dma, 1809 sed->offs + offsetof(ohci_ed_t, ed_tailp), 1810 sizeof(sed->ed.ed_tailp), 1811 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1812 opipe->tail.td = tail; 1813 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1814 if (xfer->timeout && !sc->sc_bus.use_polling) { 1815 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 1816 ohci_timeout, xfer); 1817 } 1818 splx(s); 1819 1820 #ifdef OHCI_DEBUG 1821 if (ohcidebug > 20) { 1822 delay(10000); 1823 DPRINTF(("ohci_device_request: status=%x\n", 1824 OREAD4(sc, OHCI_COMMAND_STATUS))); 1825 ohci_dumpregs(sc); 1826 printf("ctrl head:\n"); 1827 ohci_dump_ed(sc, sc->sc_ctrl_head); 1828 printf("sed:\n"); 1829 ohci_dump_ed(sc, sed); 1830 ohci_dump_tds(sc, setup); 1831 } 1832 #endif 1833 1834 return (USBD_NORMAL_COMPLETION); 1835 1836 bad3: 1837 ohci_free_std(sc, tail); 1838 bad2: 1839 ohci_free_std(sc, stat); 1840 bad1: 1841 return (err); 1842 } 1843 1844 /* 1845 * Add an ED to the schedule. Called at splusb(). 1846 */ 1847 void 1848 ohci_add_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1849 { 1850 DPRINTFN(8,("ohci_add_ed: sed=%p head=%p\n", sed, head)); 1851 1852 SPLUSBCHECK; 1853 usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted), 1854 sizeof(head->ed.ed_nexted), 1855 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1856 sed->next = head->next; 1857 sed->ed.ed_nexted = head->ed.ed_nexted; 1858 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted), 1859 sizeof(sed->ed.ed_nexted), 1860 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1861 head->next = sed; 1862 head->ed.ed_nexted = HTOO32(sed->physaddr); 1863 usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted), 1864 sizeof(head->ed.ed_nexted), 1865 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1866 } 1867 1868 /* 1869 * Remove an ED from the schedule. Called at splusb(). 1870 */ 1871 void 1872 ohci_rem_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1873 { 1874 ohci_soft_ed_t *p; 1875 1876 SPLUSBCHECK; 1877 1878 /* XXX */ 1879 for (p = head; p != NULL && p->next != sed; p = p->next) 1880 ; 1881 if (p == NULL) 1882 panic("ohci_rem_ed: ED not found"); 1883 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted), 1884 sizeof(sed->ed.ed_nexted), 1885 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1886 p->next = sed->next; 1887 p->ed.ed_nexted = sed->ed.ed_nexted; 1888 usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted), 1889 sizeof(p->ed.ed_nexted), 1890 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1891 } 1892 1893 /* 1894 * When a transfer is completed the TD is added to the done queue by 1895 * the host controller. This queue is the processed by software. 1896 * Unfortunately the queue contains the physical address of the TD 1897 * and we have no simple way to translate this back to a kernel address. 1898 * To make the translation possible (and fast) we use a hash table of 1899 * TDs currently in the schedule. The physical address is used as the 1900 * hash value. 1901 */ 1902 1903 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1904 /* Called at splusb() */ 1905 void 1906 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1907 { 1908 int h = HASH(std->physaddr); 1909 1910 SPLUSBCHECK; 1911 1912 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1913 } 1914 1915 /* Called at splusb() */ 1916 void 1917 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1918 { 1919 SPLUSBCHECK; 1920 1921 LIST_REMOVE(std, hnext); 1922 } 1923 1924 ohci_soft_td_t * 1925 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a) 1926 { 1927 int h = HASH(a); 1928 ohci_soft_td_t *std; 1929 1930 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1931 std != NULL; 1932 std = LIST_NEXT(std, hnext)) 1933 if (std->physaddr == a) 1934 return (std); 1935 return (NULL); 1936 } 1937 1938 /* Called at splusb() */ 1939 void 1940 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1941 { 1942 int h = HASH(sitd->physaddr); 1943 1944 SPLUSBCHECK; 1945 1946 DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n", 1947 sitd, (u_long)sitd->physaddr)); 1948 1949 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext); 1950 } 1951 1952 /* Called at splusb() */ 1953 void 1954 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1955 { 1956 SPLUSBCHECK; 1957 1958 DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n", 1959 sitd, (u_long)sitd->physaddr)); 1960 1961 LIST_REMOVE(sitd, hnext); 1962 } 1963 1964 ohci_soft_itd_t * 1965 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a) 1966 { 1967 int h = HASH(a); 1968 ohci_soft_itd_t *sitd; 1969 1970 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]); 1971 sitd != NULL; 1972 sitd = LIST_NEXT(sitd, hnext)) 1973 if (sitd->physaddr == a) 1974 return (sitd); 1975 return (NULL); 1976 } 1977 1978 void 1979 ohci_timeout(void *addr) 1980 { 1981 struct ohci_xfer *oxfer = addr; 1982 struct ohci_pipe *opipe = (struct ohci_pipe *)oxfer->xfer.pipe; 1983 ohci_softc_t *sc = opipe->pipe.device->bus->hci_private; 1984 1985 DPRINTF(("ohci_timeout: oxfer=%p\n", oxfer)); 1986 1987 if (sc->sc_dying) { 1988 ohci_abort_xfer(&oxfer->xfer, USBD_TIMEOUT); 1989 return; 1990 } 1991 1992 /* Execute the abort in a process context. */ 1993 usb_init_task(&oxfer->abort_task, ohci_timeout_task, addr); 1994 usb_add_task(oxfer->xfer.pipe->device, &oxfer->abort_task, 1995 USB_TASKQ_HC); 1996 } 1997 1998 void 1999 ohci_timeout_task(void *addr) 2000 { 2001 usbd_xfer_handle xfer = addr; 2002 int s; 2003 2004 DPRINTF(("ohci_timeout_task: xfer=%p\n", xfer)); 2005 2006 s = splusb(); 2007 ohci_abort_xfer(xfer, USBD_TIMEOUT); 2008 splx(s); 2009 } 2010 2011 #ifdef OHCI_DEBUG 2012 void 2013 ohci_dump_tds(ohci_softc_t *sc, ohci_soft_td_t *std) 2014 { 2015 for (; std; std = std->nexttd) 2016 ohci_dump_td(sc, std); 2017 } 2018 2019 void 2020 ohci_dump_td(ohci_softc_t *sc, ohci_soft_td_t *std) 2021 { 2022 char sbuf[128]; 2023 2024 snprintb(sbuf, sizeof(sbuf), 2025 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 2026 (u_int32_t)O32TOH(std->td.td_flags)); 2027 2028 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 2029 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2030 printf("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx " 2031 "nexttd=0x%08lx be=0x%08lx\n", 2032 std, (u_long)std->physaddr, sbuf, 2033 OHCI_TD_GET_DI(O32TOH(std->td.td_flags)), 2034 OHCI_TD_GET_EC(O32TOH(std->td.td_flags)), 2035 OHCI_TD_GET_CC(O32TOH(std->td.td_flags)), 2036 (u_long)O32TOH(std->td.td_cbp), 2037 (u_long)O32TOH(std->td.td_nexttd), 2038 (u_long)O32TOH(std->td.td_be)); 2039 } 2040 2041 void 2042 ohci_dump_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 2043 { 2044 int i; 2045 2046 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 2047 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2048 printf("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n" 2049 "bp0=0x%08lx next=0x%08lx be=0x%08lx\n", 2050 sitd, (u_long)sitd->physaddr, 2051 OHCI_ITD_GET_SF(O32TOH(sitd->itd.itd_flags)), 2052 OHCI_ITD_GET_DI(O32TOH(sitd->itd.itd_flags)), 2053 OHCI_ITD_GET_FC(O32TOH(sitd->itd.itd_flags)), 2054 OHCI_ITD_GET_CC(O32TOH(sitd->itd.itd_flags)), 2055 (u_long)O32TOH(sitd->itd.itd_bp0), 2056 (u_long)O32TOH(sitd->itd.itd_nextitd), 2057 (u_long)O32TOH(sitd->itd.itd_be)); 2058 for (i = 0; i < OHCI_ITD_NOFFSET; i++) 2059 printf("offs[%d]=0x%04x ", i, 2060 (u_int)O16TOH(sitd->itd.itd_offset[i])); 2061 printf("\n"); 2062 } 2063 2064 void 2065 ohci_dump_itds(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 2066 { 2067 for (; sitd; sitd = sitd->nextitd) 2068 ohci_dump_itd(sc, sitd); 2069 } 2070 2071 void 2072 ohci_dump_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 2073 { 2074 char sbuf[128], sbuf2[128]; 2075 2076 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 2077 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2078 snprintb(sbuf, sizeof(sbuf), 2079 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO", 2080 (u_int32_t)O32TOH(sed->ed.ed_flags)); 2081 snprintb(sbuf2, sizeof(sbuf2), "\20\1HALT\2CARRY", 2082 (u_int32_t)O32TOH(sed->ed.ed_headp)); 2083 2084 printf("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d flags=%s\ntailp=0x%08lx " 2085 "headflags=%s headp=0x%08lx nexted=0x%08lx\n", 2086 sed, (u_long)sed->physaddr, 2087 OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)), 2088 OHCI_ED_GET_EN(O32TOH(sed->ed.ed_flags)), 2089 OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)), sbuf, 2090 (u_long)O32TOH(sed->ed.ed_tailp), sbuf2, 2091 (u_long)O32TOH(sed->ed.ed_headp), 2092 (u_long)O32TOH(sed->ed.ed_nexted)); 2093 } 2094 #endif 2095 2096 usbd_status 2097 ohci_open(usbd_pipe_handle pipe) 2098 { 2099 usbd_device_handle dev = pipe->device; 2100 ohci_softc_t *sc = dev->bus->hci_private; 2101 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 2102 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2103 u_int8_t addr = dev->address; 2104 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 2105 ohci_soft_ed_t *sed; 2106 ohci_soft_td_t *std; 2107 ohci_soft_itd_t *sitd; 2108 ohci_physaddr_t tdphys; 2109 u_int32_t fmt; 2110 usbd_status err; 2111 int s; 2112 int ival; 2113 2114 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 2115 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 2116 2117 if (sc->sc_dying) 2118 return (USBD_IOERROR); 2119 2120 std = NULL; 2121 sed = NULL; 2122 2123 if (addr == sc->sc_addr) { 2124 switch (ed->bEndpointAddress) { 2125 case USB_CONTROL_ENDPOINT: 2126 pipe->methods = &ohci_root_ctrl_methods; 2127 break; 2128 case UE_DIR_IN | OHCI_INTR_ENDPT: 2129 pipe->methods = &ohci_root_intr_methods; 2130 break; 2131 default: 2132 return (USBD_INVAL); 2133 } 2134 } else { 2135 sed = ohci_alloc_sed(sc); 2136 if (sed == NULL) 2137 goto bad0; 2138 opipe->sed = sed; 2139 if (xfertype == UE_ISOCHRONOUS) { 2140 sitd = ohci_alloc_sitd(sc); 2141 if (sitd == NULL) 2142 goto bad1; 2143 opipe->tail.itd = sitd; 2144 tdphys = sitd->physaddr; 2145 fmt = OHCI_ED_FORMAT_ISO; 2146 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 2147 fmt |= OHCI_ED_DIR_IN; 2148 else 2149 fmt |= OHCI_ED_DIR_OUT; 2150 } else { 2151 std = ohci_alloc_std(sc); 2152 if (std == NULL) 2153 goto bad1; 2154 opipe->tail.td = std; 2155 tdphys = std->physaddr; 2156 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD; 2157 } 2158 sed->ed.ed_flags = HTOO32( 2159 OHCI_ED_SET_FA(addr) | 2160 OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) | 2161 (dev->speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) | 2162 fmt | 2163 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 2164 sed->ed.ed_headp = sed->ed.ed_tailp = HTOO32(tdphys); 2165 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 2166 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2167 2168 switch (xfertype) { 2169 case UE_CONTROL: 2170 pipe->methods = &ohci_device_ctrl_methods; 2171 err = usb_allocmem(&sc->sc_bus, 2172 sizeof(usb_device_request_t), 2173 0, &opipe->u.ctl.reqdma); 2174 if (err) 2175 goto bad; 2176 s = splusb(); 2177 ohci_add_ed(sc, sed, sc->sc_ctrl_head); 2178 splx(s); 2179 break; 2180 case UE_INTERRUPT: 2181 pipe->methods = &ohci_device_intr_methods; 2182 ival = pipe->interval; 2183 if (ival == USBD_DEFAULT_INTERVAL) 2184 ival = ed->bInterval; 2185 return (ohci_device_setintr(sc, opipe, ival)); 2186 case UE_ISOCHRONOUS: 2187 pipe->methods = &ohci_device_isoc_methods; 2188 return (ohci_setup_isoc(pipe)); 2189 case UE_BULK: 2190 pipe->methods = &ohci_device_bulk_methods; 2191 s = splusb(); 2192 ohci_add_ed(sc, sed, sc->sc_bulk_head); 2193 splx(s); 2194 break; 2195 } 2196 } 2197 return (USBD_NORMAL_COMPLETION); 2198 2199 bad: 2200 if (std != NULL) 2201 ohci_free_std(sc, std); 2202 bad1: 2203 if (sed != NULL) 2204 ohci_free_sed(sc, sed); 2205 bad0: 2206 return (USBD_NOMEM); 2207 2208 } 2209 2210 /* 2211 * Close a reqular pipe. 2212 * Assumes that there are no pending transactions. 2213 */ 2214 void 2215 ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head) 2216 { 2217 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2218 ohci_softc_t *sc = pipe->device->bus->hci_private; 2219 ohci_soft_ed_t *sed = opipe->sed; 2220 int s; 2221 2222 s = splusb(); 2223 #ifdef DIAGNOSTIC 2224 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 2225 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2226 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) { 2227 ohci_soft_td_t *std; 2228 std = ohci_hash_find_td(sc, O32TOH(sed->ed.ed_headp)); 2229 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 2230 "tl=0x%x pipe=%p, std=%p\n", sed, 2231 (int)O32TOH(sed->ed.ed_headp), 2232 (int)O32TOH(sed->ed.ed_tailp), 2233 pipe, std); 2234 #ifdef USB_DEBUG 2235 usbd_dump_pipe(&opipe->pipe); 2236 #endif 2237 #ifdef OHCI_DEBUG 2238 ohci_dump_ed(sc, sed); 2239 if (std) 2240 ohci_dump_td(sc, std); 2241 #endif 2242 usb_delay_ms(&sc->sc_bus, 2); 2243 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2244 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) 2245 printf("ohci_close_pipe: pipe still not empty\n"); 2246 } 2247 #endif 2248 ohci_rem_ed(sed, head); 2249 /* Make sure the host controller is not touching this ED */ 2250 usb_delay_ms(&sc->sc_bus, 1); 2251 splx(s); 2252 ohci_free_sed(sc, opipe->sed); 2253 } 2254 2255 /* 2256 * Abort a device request. 2257 * If this routine is called at splusb() it guarantees that the request 2258 * will be removed from the hardware scheduling and that the callback 2259 * for it will be called with USBD_CANCELLED status. 2260 * It's impossible to guarantee that the requested transfer will not 2261 * have happened since the hardware runs concurrently. 2262 * If the transaction has already happened we rely on the ordinary 2263 * interrupt processing to process it. 2264 */ 2265 void 2266 ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2267 { 2268 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2269 ohci_softc_t *sc = opipe->pipe.device->bus->hci_private; 2270 ohci_soft_ed_t *sed = opipe->sed; 2271 ohci_soft_td_t *p, *n; 2272 ohci_physaddr_t headp; 2273 int s, hit; 2274 int wake; 2275 2276 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p sed=%p\n", xfer, opipe,sed)); 2277 2278 if (sc->sc_dying) { 2279 /* If we're dying, just do the software part. */ 2280 s = splusb(); 2281 xfer->status = status; /* make software ignore it */ 2282 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 2283 usb_transfer_complete(xfer); 2284 splx(s); 2285 return; 2286 } 2287 2288 if (xfer->device->bus->intr_context || !curproc) 2289 panic("ohci_abort_xfer: not in process context"); 2290 2291 /* 2292 * If an abort is already in progress then just wait for it to 2293 * complete and return. 2294 */ 2295 if (xfer->hcflags & UXFER_ABORTING) { 2296 DPRINTFN(2, ("ohci_abort_xfer: already aborting\n")); 2297 #ifdef DIAGNOSTIC 2298 if (status == USBD_TIMEOUT) 2299 printf("0hci_abort_xfer: TIMEOUT while aborting\n"); 2300 #endif 2301 /* Override the status which might be USBD_TIMEOUT. */ 2302 xfer->status = status; 2303 DPRINTFN(2, ("ohci_abort_xfer: waiting for abort to finish\n")); 2304 xfer->hcflags |= UXFER_ABORTWAIT; 2305 while (xfer->hcflags & UXFER_ABORTING) 2306 tsleep(&xfer->hcflags, PZERO, "ohciaw", 0); 2307 return; 2308 } 2309 xfer->hcflags |= UXFER_ABORTING; 2310 2311 /* 2312 * Step 1: Make interrupt routine and hardware ignore xfer. 2313 */ 2314 s = splusb(); 2315 xfer->status = status; /* make software ignore it */ 2316 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 2317 splx(s); 2318 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed)); 2319 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2320 sizeof(sed->ed.ed_flags), 2321 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2322 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */ 2323 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2324 sizeof(sed->ed.ed_flags), 2325 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2326 2327 /* 2328 * Step 2: Wait until we know hardware has finished any possible 2329 * use of the xfer. Also make sure the soft interrupt routine 2330 * has run. 2331 */ 2332 usb_delay_ms(opipe->pipe.device->bus, 20); /* Hardware finishes in 1ms */ 2333 s = splusb(); 2334 #ifdef USB_USE_SOFTINTR 2335 sc->sc_softwake = 1; 2336 #endif /* USB_USE_SOFTINTR */ 2337 usb_schedsoftintr(&sc->sc_bus); 2338 #ifdef USB_USE_SOFTINTR 2339 tsleep(&sc->sc_softwake, PZERO, "ohciab", 0); 2340 #endif /* USB_USE_SOFTINTR */ 2341 splx(s); 2342 2343 /* 2344 * Step 3: Remove any vestiges of the xfer from the hardware. 2345 * The complication here is that the hardware may have executed 2346 * beyond the xfer we're trying to abort. So as we're scanning 2347 * the TDs of this xfer we check if the hardware points to 2348 * any of them. 2349 */ 2350 s = splusb(); /* XXX why? */ 2351 p = xfer->hcpriv; 2352 #ifdef DIAGNOSTIC 2353 if (p == NULL) { 2354 xfer->hcflags &= ~UXFER_ABORTING; /* XXX */ 2355 splx(s); 2356 printf("ohci_abort_xfer: hcpriv is NULL\n"); 2357 return; 2358 } 2359 #endif 2360 #ifdef OHCI_DEBUG 2361 if (ohcidebug > 1) { 2362 DPRINTF(("ohci_abort_xfer: sed=\n")); 2363 ohci_dump_ed(sc, sed); 2364 ohci_dump_tds(sc, p); 2365 } 2366 #endif 2367 headp = O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK; 2368 hit = 0; 2369 for (; p->xfer == xfer; p = n) { 2370 hit |= headp == p->physaddr; 2371 n = p->nexttd; 2372 ohci_free_std(sc, p); 2373 } 2374 /* Zap headp register if hardware pointed inside the xfer. */ 2375 if (hit) { 2376 DPRINTFN(1,("ohci_abort_xfer: set hd=0x%08x, tl=0x%08x\n", 2377 (int)p->physaddr, (int)O32TOH(sed->ed.ed_tailp))); 2378 sed->ed.ed_headp = HTOO32(p->physaddr); /* unlink TDs */ 2379 usb_syncmem(&sed->dma, 2380 sed->offs + offsetof(ohci_ed_t, ed_headp), 2381 sizeof(sed->ed.ed_headp), 2382 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2383 } else { 2384 DPRINTFN(1,("ohci_abort_xfer: no hit\n")); 2385 } 2386 2387 /* 2388 * Step 4: Turn on hardware again. 2389 */ 2390 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2391 sizeof(sed->ed.ed_flags), 2392 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2393 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */ 2394 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2395 sizeof(sed->ed.ed_flags), 2396 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2397 2398 /* 2399 * Step 5: Execute callback. 2400 */ 2401 wake = xfer->hcflags & UXFER_ABORTWAIT; 2402 xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT); 2403 usb_transfer_complete(xfer); 2404 if (wake) 2405 wakeup(&xfer->hcflags); 2406 2407 splx(s); 2408 } 2409 2410 /* 2411 * Data structures and routines to emulate the root hub. 2412 */ 2413 Static usb_device_descriptor_t ohci_devd = { 2414 USB_DEVICE_DESCRIPTOR_SIZE, 2415 UDESC_DEVICE, /* type */ 2416 {0x00, 0x01}, /* USB version */ 2417 UDCLASS_HUB, /* class */ 2418 UDSUBCLASS_HUB, /* subclass */ 2419 UDPROTO_FSHUB, 2420 64, /* max packet */ 2421 {0},{0},{0x00,0x01}, /* device id */ 2422 1,2,0, /* string indicies */ 2423 1 /* # of configurations */ 2424 }; 2425 2426 Static const usb_config_descriptor_t ohci_confd = { 2427 USB_CONFIG_DESCRIPTOR_SIZE, 2428 UDESC_CONFIG, 2429 {USB_CONFIG_DESCRIPTOR_SIZE + 2430 USB_INTERFACE_DESCRIPTOR_SIZE + 2431 USB_ENDPOINT_DESCRIPTOR_SIZE}, 2432 1, 2433 1, 2434 0, 2435 UC_ATTR_MBO | UC_SELF_POWERED, 2436 0 /* max power */ 2437 }; 2438 2439 Static const usb_interface_descriptor_t ohci_ifcd = { 2440 USB_INTERFACE_DESCRIPTOR_SIZE, 2441 UDESC_INTERFACE, 2442 0, 2443 0, 2444 1, 2445 UICLASS_HUB, 2446 UISUBCLASS_HUB, 2447 UIPROTO_FSHUB, 2448 0 2449 }; 2450 2451 Static const usb_endpoint_descriptor_t ohci_endpd = { 2452 .bLength = USB_ENDPOINT_DESCRIPTOR_SIZE, 2453 .bDescriptorType = UDESC_ENDPOINT, 2454 .bEndpointAddress = UE_DIR_IN | OHCI_INTR_ENDPT, 2455 .bmAttributes = UE_INTERRUPT, 2456 .wMaxPacketSize = {8, 0}, /* max packet */ 2457 .bInterval = 255, 2458 }; 2459 2460 Static const usb_hub_descriptor_t ohci_hubd = { 2461 .bDescLength = USB_HUB_DESCRIPTOR_SIZE, 2462 .bDescriptorType = UDESC_HUB, 2463 }; 2464 2465 /* 2466 * Simulate a hardware hub by handling all the necessary requests. 2467 */ 2468 Static usbd_status 2469 ohci_root_ctrl_transfer(usbd_xfer_handle xfer) 2470 { 2471 usbd_status err; 2472 2473 /* Insert last in queue. */ 2474 err = usb_insert_transfer(xfer); 2475 if (err) 2476 return (err); 2477 2478 /* Pipe isn't running, start first */ 2479 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2480 } 2481 2482 Static usbd_status 2483 ohci_root_ctrl_start(usbd_xfer_handle xfer) 2484 { 2485 ohci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2486 usb_device_request_t *req; 2487 void *buf = NULL; 2488 int port, i; 2489 int s, len, value, index, l, totlen = 0; 2490 usb_port_status_t ps; 2491 usb_hub_descriptor_t hubd; 2492 usbd_status err; 2493 u_int32_t v; 2494 2495 if (sc->sc_dying) 2496 return (USBD_IOERROR); 2497 2498 #ifdef DIAGNOSTIC 2499 if (!(xfer->rqflags & URQ_REQUEST)) 2500 /* XXX panic */ 2501 return (USBD_INVAL); 2502 #endif 2503 req = &xfer->request; 2504 2505 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 2506 req->bmRequestType, req->bRequest)); 2507 2508 len = UGETW(req->wLength); 2509 value = UGETW(req->wValue); 2510 index = UGETW(req->wIndex); 2511 2512 if (len != 0) 2513 buf = KERNADDR(&xfer->dmabuf, 0); 2514 2515 #define C(x,y) ((x) | ((y) << 8)) 2516 switch(C(req->bRequest, req->bmRequestType)) { 2517 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 2518 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 2519 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 2520 /* 2521 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 2522 * for the integrated root hub. 2523 */ 2524 break; 2525 case C(UR_GET_CONFIG, UT_READ_DEVICE): 2526 if (len > 0) { 2527 *(u_int8_t *)buf = sc->sc_conf; 2528 totlen = 1; 2529 } 2530 break; 2531 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2532 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 2533 if (len == 0) 2534 break; 2535 switch(value >> 8) { 2536 case UDESC_DEVICE: 2537 if ((value & 0xff) != 0) { 2538 err = USBD_IOERROR; 2539 goto ret; 2540 } 2541 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 2542 USETW(ohci_devd.idVendor, sc->sc_id_vendor); 2543 memcpy(buf, &ohci_devd, l); 2544 break; 2545 case UDESC_CONFIG: 2546 if ((value & 0xff) != 0) { 2547 err = USBD_IOERROR; 2548 goto ret; 2549 } 2550 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 2551 memcpy(buf, &ohci_confd, l); 2552 buf = (char *)buf + l; 2553 len -= l; 2554 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 2555 totlen += l; 2556 memcpy(buf, &ohci_ifcd, l); 2557 buf = (char *)buf + l; 2558 len -= l; 2559 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 2560 totlen += l; 2561 memcpy(buf, &ohci_endpd, l); 2562 break; 2563 case UDESC_STRING: 2564 #define sd ((usb_string_descriptor_t *)buf) 2565 switch (value & 0xff) { 2566 case 0: /* Language table */ 2567 totlen = usb_makelangtbl(sd, len); 2568 break; 2569 case 1: /* Vendor */ 2570 totlen = usb_makestrdesc(sd, len, 2571 sc->sc_vendor); 2572 break; 2573 case 2: /* Product */ 2574 totlen = usb_makestrdesc(sd, len, 2575 "OHCI root hub"); 2576 break; 2577 } 2578 #undef sd 2579 break; 2580 default: 2581 err = USBD_IOERROR; 2582 goto ret; 2583 } 2584 break; 2585 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 2586 if (len > 0) { 2587 *(u_int8_t *)buf = 0; 2588 totlen = 1; 2589 } 2590 break; 2591 case C(UR_GET_STATUS, UT_READ_DEVICE): 2592 if (len > 1) { 2593 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 2594 totlen = 2; 2595 } 2596 break; 2597 case C(UR_GET_STATUS, UT_READ_INTERFACE): 2598 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 2599 if (len > 1) { 2600 USETW(((usb_status_t *)buf)->wStatus, 0); 2601 totlen = 2; 2602 } 2603 break; 2604 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 2605 if (value >= USB_MAX_DEVICES) { 2606 err = USBD_IOERROR; 2607 goto ret; 2608 } 2609 sc->sc_addr = value; 2610 break; 2611 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 2612 if (value != 0 && value != 1) { 2613 err = USBD_IOERROR; 2614 goto ret; 2615 } 2616 sc->sc_conf = value; 2617 break; 2618 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 2619 break; 2620 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 2621 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 2622 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 2623 err = USBD_IOERROR; 2624 goto ret; 2625 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 2626 break; 2627 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 2628 break; 2629 /* Hub requests */ 2630 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2631 break; 2632 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2633 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 2634 "port=%d feature=%d\n", 2635 index, value)); 2636 if (index < 1 || index > sc->sc_noport) { 2637 err = USBD_IOERROR; 2638 goto ret; 2639 } 2640 port = OHCI_RH_PORT_STATUS(index); 2641 switch(value) { 2642 case UHF_PORT_ENABLE: 2643 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2644 break; 2645 case UHF_PORT_SUSPEND: 2646 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2647 break; 2648 case UHF_PORT_POWER: 2649 /* Yes, writing to the LOW_SPEED bit clears power. */ 2650 OWRITE4(sc, port, UPS_LOW_SPEED); 2651 break; 2652 case UHF_C_PORT_CONNECTION: 2653 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2654 break; 2655 case UHF_C_PORT_ENABLE: 2656 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2657 break; 2658 case UHF_C_PORT_SUSPEND: 2659 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2660 break; 2661 case UHF_C_PORT_OVER_CURRENT: 2662 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2663 break; 2664 case UHF_C_PORT_RESET: 2665 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2666 break; 2667 default: 2668 err = USBD_IOERROR; 2669 goto ret; 2670 } 2671 switch(value) { 2672 case UHF_C_PORT_CONNECTION: 2673 case UHF_C_PORT_ENABLE: 2674 case UHF_C_PORT_SUSPEND: 2675 case UHF_C_PORT_OVER_CURRENT: 2676 case UHF_C_PORT_RESET: 2677 /* Enable RHSC interrupt if condition is cleared. */ 2678 if ((OREAD4(sc, port) >> 16) == 0) 2679 ohci_rhsc_enable(sc); 2680 break; 2681 default: 2682 break; 2683 } 2684 break; 2685 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2686 if (len == 0) 2687 break; 2688 if ((value & 0xff) != 0) { 2689 err = USBD_IOERROR; 2690 goto ret; 2691 } 2692 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2693 hubd = ohci_hubd; 2694 hubd.bNbrPorts = sc->sc_noport; 2695 USETW(hubd.wHubCharacteristics, 2696 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2697 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2698 /* XXX overcurrent */ 2699 ); 2700 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2701 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2702 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2703 hubd.DeviceRemovable[i++] = (u_int8_t)v; 2704 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2705 l = min(len, hubd.bDescLength); 2706 totlen = l; 2707 memcpy(buf, &hubd, l); 2708 break; 2709 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2710 if (len != 4) { 2711 err = USBD_IOERROR; 2712 goto ret; 2713 } 2714 memset(buf, 0, len); /* ? XXX */ 2715 totlen = len; 2716 break; 2717 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2718 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 2719 index)); 2720 if (index < 1 || index > sc->sc_noport) { 2721 err = USBD_IOERROR; 2722 goto ret; 2723 } 2724 if (len != 4) { 2725 err = USBD_IOERROR; 2726 goto ret; 2727 } 2728 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2729 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 2730 v)); 2731 USETW(ps.wPortStatus, v); 2732 USETW(ps.wPortChange, v >> 16); 2733 l = min(len, sizeof ps); 2734 memcpy(buf, &ps, l); 2735 totlen = l; 2736 break; 2737 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2738 err = USBD_IOERROR; 2739 goto ret; 2740 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2741 break; 2742 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2743 if (index < 1 || index > sc->sc_noport) { 2744 err = USBD_IOERROR; 2745 goto ret; 2746 } 2747 port = OHCI_RH_PORT_STATUS(index); 2748 switch(value) { 2749 case UHF_PORT_ENABLE: 2750 OWRITE4(sc, port, UPS_PORT_ENABLED); 2751 break; 2752 case UHF_PORT_SUSPEND: 2753 OWRITE4(sc, port, UPS_SUSPEND); 2754 break; 2755 case UHF_PORT_RESET: 2756 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 2757 index)); 2758 OWRITE4(sc, port, UPS_RESET); 2759 for (i = 0; i < 5; i++) { 2760 usb_delay_ms(&sc->sc_bus, 2761 USB_PORT_ROOT_RESET_DELAY); 2762 if (sc->sc_dying) { 2763 err = USBD_IOERROR; 2764 goto ret; 2765 } 2766 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2767 break; 2768 } 2769 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 2770 index, OREAD4(sc, port))); 2771 break; 2772 case UHF_PORT_POWER: 2773 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 2774 "%d\n", index)); 2775 OWRITE4(sc, port, UPS_PORT_POWER); 2776 break; 2777 default: 2778 err = USBD_IOERROR; 2779 goto ret; 2780 } 2781 break; 2782 default: 2783 err = USBD_IOERROR; 2784 goto ret; 2785 } 2786 xfer->actlen = totlen; 2787 err = USBD_NORMAL_COMPLETION; 2788 ret: 2789 xfer->status = err; 2790 s = splusb(); 2791 usb_transfer_complete(xfer); 2792 splx(s); 2793 return (USBD_IN_PROGRESS); 2794 } 2795 2796 /* Abort a root control request. */ 2797 Static void 2798 ohci_root_ctrl_abort(usbd_xfer_handle xfer) 2799 { 2800 /* Nothing to do, all transfers are synchronous. */ 2801 } 2802 2803 /* Close the root pipe. */ 2804 Static void 2805 ohci_root_ctrl_close(usbd_pipe_handle pipe) 2806 { 2807 DPRINTF(("ohci_root_ctrl_close\n")); 2808 /* Nothing to do. */ 2809 } 2810 2811 Static usbd_status 2812 ohci_root_intr_transfer(usbd_xfer_handle xfer) 2813 { 2814 usbd_status err; 2815 2816 /* Insert last in queue. */ 2817 err = usb_insert_transfer(xfer); 2818 if (err) 2819 return (err); 2820 2821 /* Pipe isn't running, start first */ 2822 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2823 } 2824 2825 Static usbd_status 2826 ohci_root_intr_start(usbd_xfer_handle xfer) 2827 { 2828 usbd_pipe_handle pipe = xfer->pipe; 2829 ohci_softc_t *sc = pipe->device->bus->hci_private; 2830 2831 if (sc->sc_dying) 2832 return (USBD_IOERROR); 2833 2834 sc->sc_intrxfer = xfer; 2835 2836 return (USBD_IN_PROGRESS); 2837 } 2838 2839 /* Abort a root interrupt request. */ 2840 Static void 2841 ohci_root_intr_abort(usbd_xfer_handle xfer) 2842 { 2843 int s; 2844 2845 if (xfer->pipe->intrxfer == xfer) { 2846 DPRINTF(("ohci_root_intr_abort: remove\n")); 2847 xfer->pipe->intrxfer = NULL; 2848 } 2849 xfer->status = USBD_CANCELLED; 2850 s = splusb(); 2851 usb_transfer_complete(xfer); 2852 splx(s); 2853 } 2854 2855 /* Close the root pipe. */ 2856 Static void 2857 ohci_root_intr_close(usbd_pipe_handle pipe) 2858 { 2859 ohci_softc_t *sc = pipe->device->bus->hci_private; 2860 2861 DPRINTF(("ohci_root_intr_close\n")); 2862 2863 sc->sc_intrxfer = NULL; 2864 } 2865 2866 /************************/ 2867 2868 Static usbd_status 2869 ohci_device_ctrl_transfer(usbd_xfer_handle xfer) 2870 { 2871 usbd_status err; 2872 2873 /* Insert last in queue. */ 2874 err = usb_insert_transfer(xfer); 2875 if (err) 2876 return (err); 2877 2878 /* Pipe isn't running, start first */ 2879 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2880 } 2881 2882 Static usbd_status 2883 ohci_device_ctrl_start(usbd_xfer_handle xfer) 2884 { 2885 ohci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2886 usbd_status err; 2887 2888 if (sc->sc_dying) 2889 return (USBD_IOERROR); 2890 2891 #ifdef DIAGNOSTIC 2892 if (!(xfer->rqflags & URQ_REQUEST)) { 2893 /* XXX panic */ 2894 printf("ohci_device_ctrl_transfer: not a request\n"); 2895 return (USBD_INVAL); 2896 } 2897 #endif 2898 2899 err = ohci_device_request(xfer); 2900 if (err) 2901 return (err); 2902 2903 if (sc->sc_bus.use_polling) 2904 ohci_waitintr(sc, xfer); 2905 return (USBD_IN_PROGRESS); 2906 } 2907 2908 /* Abort a device control request. */ 2909 Static void 2910 ohci_device_ctrl_abort(usbd_xfer_handle xfer) 2911 { 2912 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer)); 2913 ohci_abort_xfer(xfer, USBD_CANCELLED); 2914 } 2915 2916 /* Close a device control pipe. */ 2917 Static void 2918 ohci_device_ctrl_close(usbd_pipe_handle pipe) 2919 { 2920 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2921 ohci_softc_t *sc = pipe->device->bus->hci_private; 2922 2923 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe)); 2924 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2925 ohci_free_std(sc, opipe->tail.td); 2926 } 2927 2928 /************************/ 2929 2930 Static void 2931 ohci_device_clear_toggle(usbd_pipe_handle pipe) 2932 { 2933 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2934 ohci_softc_t *sc = pipe->device->bus->hci_private; 2935 2936 opipe->sed->ed.ed_headp &= HTOO32(~OHCI_TOGGLECARRY); 2937 } 2938 2939 Static void 2940 ohci_noop(usbd_pipe_handle pipe) 2941 { 2942 } 2943 2944 Static usbd_status 2945 ohci_device_bulk_transfer(usbd_xfer_handle xfer) 2946 { 2947 usbd_status err; 2948 2949 /* Insert last in queue. */ 2950 err = usb_insert_transfer(xfer); 2951 if (err) 2952 return (err); 2953 2954 /* Pipe isn't running, start first */ 2955 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2956 } 2957 2958 Static usbd_status 2959 ohci_device_bulk_start(usbd_xfer_handle xfer) 2960 { 2961 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2962 usbd_device_handle dev = opipe->pipe.device; 2963 ohci_softc_t *sc = dev->bus->hci_private; 2964 int addr = dev->address; 2965 ohci_soft_td_t *data, *tail, *tdp; 2966 ohci_soft_ed_t *sed; 2967 int s, len, isread, endpt; 2968 usbd_status err; 2969 2970 if (sc->sc_dying) 2971 return (USBD_IOERROR); 2972 2973 #ifdef DIAGNOSTIC 2974 if (xfer->rqflags & URQ_REQUEST) { 2975 /* XXX panic */ 2976 printf("ohci_device_bulk_start: a request\n"); 2977 return (USBD_INVAL); 2978 } 2979 #endif 2980 2981 len = xfer->length; 2982 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 2983 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2984 sed = opipe->sed; 2985 2986 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d " 2987 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags, 2988 endpt)); 2989 2990 opipe->u.bulk.isread = isread; 2991 opipe->u.bulk.length = len; 2992 2993 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 2994 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2995 /* Update device address */ 2996 sed->ed.ed_flags = HTOO32( 2997 (O32TOH(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) | 2998 OHCI_ED_SET_FA(addr)); 2999 3000 /* Allocate a chain of new TDs (including a new tail). */ 3001 data = opipe->tail.td; 3002 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 3003 data, &tail); 3004 /* We want interrupt at the end of the transfer. */ 3005 tail->td.td_flags &= HTOO32(~OHCI_TD_INTR_MASK); 3006 tail->td.td_flags |= HTOO32(OHCI_TD_SET_DI(1)); 3007 tail->flags |= OHCI_CALL_DONE; 3008 tail = tail->nexttd; /* point at sentinel */ 3009 usb_syncmem(&tail->dma, tail->offs + offsetof(ohci_td_t, td_flags), 3010 sizeof(tail->td.td_flags), 3011 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3012 if (err) 3013 return (err); 3014 3015 tail->xfer = NULL; 3016 xfer->hcpriv = data; 3017 3018 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x " 3019 "td_cbp=0x%08x td_be=0x%08x\n", 3020 (int)O32TOH(sed->ed.ed_flags), 3021 (int)O32TOH(data->td.td_flags), 3022 (int)O32TOH(data->td.td_cbp), 3023 (int)O32TOH(data->td.td_be))); 3024 3025 #ifdef OHCI_DEBUG 3026 if (ohcidebug > 5) { 3027 ohci_dump_ed(sc, sed); 3028 ohci_dump_tds(sc, data); 3029 } 3030 #endif 3031 3032 /* Insert ED in schedule */ 3033 s = splusb(); 3034 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 3035 tdp->xfer = xfer; 3036 } 3037 sed->ed.ed_tailp = HTOO32(tail->physaddr); 3038 opipe->tail.td = tail; 3039 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3040 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3041 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3042 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 3043 if (xfer->timeout && !sc->sc_bus.use_polling) { 3044 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 3045 ohci_timeout, xfer); 3046 } 3047 3048 #if 0 3049 /* This goes wrong if we are too slow. */ 3050 if (ohcidebug > 10) { 3051 delay(10000); 3052 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 3053 OREAD4(sc, OHCI_COMMAND_STATUS))); 3054 ohci_dump_ed(sc, sed); 3055 ohci_dump_tds(sc, data); 3056 } 3057 #endif 3058 3059 splx(s); 3060 3061 return (USBD_IN_PROGRESS); 3062 } 3063 3064 Static void 3065 ohci_device_bulk_abort(usbd_xfer_handle xfer) 3066 { 3067 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer)); 3068 ohci_abort_xfer(xfer, USBD_CANCELLED); 3069 } 3070 3071 /* 3072 * Close a device bulk pipe. 3073 */ 3074 Static void 3075 ohci_device_bulk_close(usbd_pipe_handle pipe) 3076 { 3077 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3078 ohci_softc_t *sc = pipe->device->bus->hci_private; 3079 3080 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe)); 3081 ohci_close_pipe(pipe, sc->sc_bulk_head); 3082 ohci_free_std(sc, opipe->tail.td); 3083 } 3084 3085 /************************/ 3086 3087 Static usbd_status 3088 ohci_device_intr_transfer(usbd_xfer_handle xfer) 3089 { 3090 usbd_status err; 3091 3092 /* Insert last in queue. */ 3093 err = usb_insert_transfer(xfer); 3094 if (err) 3095 return (err); 3096 3097 /* Pipe isn't running, start first */ 3098 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 3099 } 3100 3101 Static usbd_status 3102 ohci_device_intr_start(usbd_xfer_handle xfer) 3103 { 3104 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3105 usbd_device_handle dev = opipe->pipe.device; 3106 ohci_softc_t *sc = dev->bus->hci_private; 3107 ohci_soft_ed_t *sed = opipe->sed; 3108 ohci_soft_td_t *data, *tail; 3109 int s, len, isread, endpt; 3110 3111 if (sc->sc_dying) 3112 return (USBD_IOERROR); 3113 3114 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d " 3115 "flags=%d priv=%p\n", 3116 xfer, xfer->length, xfer->flags, xfer->priv)); 3117 3118 #ifdef DIAGNOSTIC 3119 if (xfer->rqflags & URQ_REQUEST) 3120 panic("ohci_device_intr_transfer: a request"); 3121 #endif 3122 3123 len = xfer->length; 3124 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 3125 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3126 3127 data = opipe->tail.td; 3128 tail = ohci_alloc_std(sc); 3129 if (tail == NULL) 3130 return (USBD_NOMEM); 3131 tail->xfer = NULL; 3132 3133 data->td.td_flags = HTOO32( 3134 isread ? OHCI_TD_IN : OHCI_TD_OUT | 3135 OHCI_TD_NOCC | 3136 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 3137 if (xfer->flags & USBD_SHORT_XFER_OK) 3138 data->td.td_flags |= HTOO32(OHCI_TD_R); 3139 data->td.td_cbp = HTOO32(DMAADDR(&xfer->dmabuf, 0)); 3140 data->nexttd = tail; 3141 data->td.td_nexttd = HTOO32(tail->physaddr); 3142 data->td.td_be = HTOO32(O32TOH(data->td.td_cbp) + len - 1); 3143 data->len = len; 3144 data->xfer = xfer; 3145 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 3146 usb_syncmem(&data->dma, data->offs, sizeof(data->td), 3147 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3148 xfer->hcpriv = data; 3149 3150 #ifdef OHCI_DEBUG 3151 if (ohcidebug > 5) { 3152 DPRINTF(("ohci_device_intr_transfer:\n")); 3153 ohci_dump_ed(sc, sed); 3154 ohci_dump_tds(sc, data); 3155 } 3156 #endif 3157 3158 /* Insert ED in schedule */ 3159 s = splusb(); 3160 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3161 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3162 sed->ed.ed_tailp = HTOO32(tail->physaddr); 3163 opipe->tail.td = tail; 3164 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3165 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3166 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3167 3168 #if 0 3169 /* 3170 * This goes horribly wrong, printing thousands of descriptors, 3171 * because false references are followed due to the fact that the 3172 * TD is gone. 3173 */ 3174 if (ohcidebug > 5) { 3175 usb_delay_ms(&sc->sc_bus, 5); 3176 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 3177 OREAD4(sc, OHCI_COMMAND_STATUS))); 3178 ohci_dump_ed(sc, sed); 3179 ohci_dump_tds(sc, data); 3180 } 3181 #endif 3182 splx(s); 3183 3184 return (USBD_IN_PROGRESS); 3185 } 3186 3187 /* Abort a device control request. */ 3188 Static void 3189 ohci_device_intr_abort(usbd_xfer_handle xfer) 3190 { 3191 if (xfer->pipe->intrxfer == xfer) { 3192 DPRINTF(("ohci_device_intr_abort: remove\n")); 3193 xfer->pipe->intrxfer = NULL; 3194 } 3195 ohci_abort_xfer(xfer, USBD_CANCELLED); 3196 } 3197 3198 /* Close a device interrupt pipe. */ 3199 Static void 3200 ohci_device_intr_close(usbd_pipe_handle pipe) 3201 { 3202 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3203 ohci_softc_t *sc = pipe->device->bus->hci_private; 3204 int nslots = opipe->u.intr.nslots; 3205 int pos = opipe->u.intr.pos; 3206 int j; 3207 ohci_soft_ed_t *p, *sed = opipe->sed; 3208 int s; 3209 3210 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 3211 pipe, nslots, pos)); 3212 s = splusb(); 3213 usb_syncmem(&sed->dma, sed->offs, 3214 sizeof(sed->ed), BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3215 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 3216 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3217 sizeof(sed->ed.ed_flags), 3218 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3219 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 3220 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) 3221 usb_delay_ms(&sc->sc_bus, 2); 3222 3223 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 3224 continue; 3225 #ifdef DIAGNOSTIC 3226 if (p == NULL) 3227 panic("ohci_device_intr_close: ED not found"); 3228 #endif 3229 p->next = sed->next; 3230 p->ed.ed_nexted = sed->ed.ed_nexted; 3231 usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted), 3232 sizeof(p->ed.ed_nexted), 3233 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3234 splx(s); 3235 3236 for (j = 0; j < nslots; j++) 3237 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 3238 3239 ohci_free_std(sc, opipe->tail.td); 3240 ohci_free_sed(sc, opipe->sed); 3241 } 3242 3243 Static usbd_status 3244 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival) 3245 { 3246 int i, j, s, best; 3247 u_int npoll, slow, shigh, nslots; 3248 u_int bestbw, bw; 3249 ohci_soft_ed_t *hsed, *sed = opipe->sed; 3250 3251 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 3252 if (ival == 0) { 3253 printf("ohci_setintr: 0 interval\n"); 3254 return (USBD_INVAL); 3255 } 3256 3257 npoll = OHCI_NO_INTRS; 3258 while (npoll > ival) 3259 npoll /= 2; 3260 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 3261 3262 /* 3263 * We now know which level in the tree the ED must go into. 3264 * Figure out which slot has most bandwidth left over. 3265 * Slots to examine: 3266 * npoll 3267 * 1 0 3268 * 2 1 2 3269 * 4 3 4 5 6 3270 * 8 7 8 9 10 11 12 13 14 3271 * N (N-1) .. (N-1+N-1) 3272 */ 3273 slow = npoll-1; 3274 shigh = slow + npoll; 3275 nslots = OHCI_NO_INTRS / npoll; 3276 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 3277 bw = 0; 3278 for (j = 0; j < nslots; j++) 3279 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 3280 if (bw < bestbw) { 3281 best = i; 3282 bestbw = bw; 3283 } 3284 } 3285 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 3286 best, slow, shigh, bestbw)); 3287 3288 s = splusb(); 3289 hsed = sc->sc_eds[best]; 3290 sed->next = hsed->next; 3291 usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags), 3292 sizeof(hsed->ed.ed_flags), 3293 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3294 sed->ed.ed_nexted = hsed->ed.ed_nexted; 3295 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3296 sizeof(sed->ed.ed_flags), 3297 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3298 hsed->next = sed; 3299 hsed->ed.ed_nexted = HTOO32(sed->physaddr); 3300 usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags), 3301 sizeof(hsed->ed.ed_flags), 3302 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3303 splx(s); 3304 3305 for (j = 0; j < nslots; j++) 3306 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 3307 opipe->u.intr.nslots = nslots; 3308 opipe->u.intr.pos = best; 3309 3310 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 3311 return (USBD_NORMAL_COMPLETION); 3312 } 3313 3314 /***********************/ 3315 3316 usbd_status 3317 ohci_device_isoc_transfer(usbd_xfer_handle xfer) 3318 { 3319 usbd_status err; 3320 3321 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer)); 3322 3323 /* Put it on our queue, */ 3324 err = usb_insert_transfer(xfer); 3325 3326 /* bail out on error, */ 3327 if (err && err != USBD_IN_PROGRESS) 3328 return (err); 3329 3330 /* XXX should check inuse here */ 3331 3332 /* insert into schedule, */ 3333 ohci_device_isoc_enter(xfer); 3334 3335 /* and start if the pipe wasn't running */ 3336 if (!err) 3337 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 3338 3339 return (err); 3340 } 3341 3342 void 3343 ohci_device_isoc_enter(usbd_xfer_handle xfer) 3344 { 3345 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3346 usbd_device_handle dev = opipe->pipe.device; 3347 ohci_softc_t *sc = dev->bus->hci_private; 3348 ohci_soft_ed_t *sed = opipe->sed; 3349 struct iso *iso = &opipe->u.iso; 3350 ohci_soft_itd_t *sitd, *nsitd; 3351 ohci_physaddr_t buf, offs, noffs, bp0; 3352 int i, ncur, nframes; 3353 int s; 3354 3355 DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p " 3356 "nframes=%d\n", 3357 iso->inuse, iso->next, xfer, xfer->nframes)); 3358 3359 if (sc->sc_dying) 3360 return; 3361 3362 if (iso->next == -1) { 3363 /* Not in use yet, schedule it a few frames ahead. */ 3364 iso->next = O32TOH(sc->sc_hcca->hcca_frame_number) + 5; 3365 DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n", 3366 iso->next)); 3367 } 3368 3369 sitd = opipe->tail.itd; 3370 buf = DMAADDR(&xfer->dmabuf, 0); 3371 bp0 = OHCI_PAGE(buf); 3372 offs = OHCI_PAGE_OFFSET(buf); 3373 nframes = xfer->nframes; 3374 xfer->hcpriv = sitd; 3375 for (i = ncur = 0; i < nframes; i++, ncur++) { 3376 noffs = offs + xfer->frlengths[i]; 3377 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ 3378 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */ 3379 3380 /* Allocate next ITD */ 3381 nsitd = ohci_alloc_sitd(sc); 3382 if (nsitd == NULL) { 3383 /* XXX what now? */ 3384 printf("%s: isoc TD alloc failed\n", 3385 device_xname(sc->sc_dev)); 3386 return; 3387 } 3388 3389 /* Fill current ITD */ 3390 sitd->itd.itd_flags = HTOO32( 3391 OHCI_ITD_NOCC | 3392 OHCI_ITD_SET_SF(iso->next) | 3393 OHCI_ITD_SET_DI(6) | /* delay intr a little */ 3394 OHCI_ITD_SET_FC(ncur)); 3395 sitd->itd.itd_bp0 = HTOO32(bp0); 3396 sitd->nextitd = nsitd; 3397 sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr); 3398 sitd->itd.itd_be = HTOO32(bp0 + offs - 1); 3399 sitd->xfer = xfer; 3400 sitd->flags = 0; 3401 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 3402 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3403 3404 sitd = nsitd; 3405 iso->next = iso->next + ncur; 3406 bp0 = OHCI_PAGE(buf + offs); 3407 ncur = 0; 3408 } 3409 sitd->itd.itd_offset[ncur] = HTOO16(OHCI_ITD_MK_OFFS(offs)); 3410 offs = noffs; 3411 } 3412 nsitd = ohci_alloc_sitd(sc); 3413 if (nsitd == NULL) { 3414 /* XXX what now? */ 3415 printf("%s: isoc TD alloc failed\n", 3416 device_xname(sc->sc_dev)); 3417 return; 3418 } 3419 /* Fixup last used ITD */ 3420 sitd->itd.itd_flags = HTOO32( 3421 OHCI_ITD_NOCC | 3422 OHCI_ITD_SET_SF(iso->next) | 3423 OHCI_ITD_SET_DI(0) | 3424 OHCI_ITD_SET_FC(ncur)); 3425 sitd->itd.itd_bp0 = HTOO32(bp0); 3426 sitd->nextitd = nsitd; 3427 sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr); 3428 sitd->itd.itd_be = HTOO32(bp0 + offs - 1); 3429 sitd->xfer = xfer; 3430 sitd->flags = OHCI_CALL_DONE; 3431 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 3432 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3433 3434 iso->next = iso->next + ncur; 3435 iso->inuse += nframes; 3436 3437 xfer->actlen = offs; /* XXX pretend we did it all */ 3438 3439 xfer->status = USBD_IN_PROGRESS; 3440 3441 #ifdef OHCI_DEBUG 3442 if (ohcidebug > 5) { 3443 DPRINTF(("ohci_device_isoc_enter: frame=%d\n", 3444 O32TOH(sc->sc_hcca->hcca_frame_number))); 3445 ohci_dump_itds(sc, xfer->hcpriv); 3446 ohci_dump_ed(sc, sed); 3447 } 3448 #endif 3449 3450 s = splusb(); 3451 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3452 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3453 sed->ed.ed_tailp = HTOO32(nsitd->physaddr); 3454 opipe->tail.itd = nsitd; 3455 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3456 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3457 sizeof(sed->ed.ed_flags), 3458 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3459 splx(s); 3460 3461 #ifdef OHCI_DEBUG 3462 if (ohcidebug > 5) { 3463 delay(150000); 3464 DPRINTF(("ohci_device_isoc_enter: after frame=%d\n", 3465 O32TOH(sc->sc_hcca->hcca_frame_number))); 3466 ohci_dump_itds(sc, xfer->hcpriv); 3467 ohci_dump_ed(sc, sed); 3468 } 3469 #endif 3470 } 3471 3472 usbd_status 3473 ohci_device_isoc_start(usbd_xfer_handle xfer) 3474 { 3475 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3476 ohci_softc_t *sc = opipe->pipe.device->bus->hci_private; 3477 3478 DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer)); 3479 3480 if (sc->sc_dying) 3481 return (USBD_IOERROR); 3482 3483 #ifdef DIAGNOSTIC 3484 if (xfer->status != USBD_IN_PROGRESS) 3485 printf("ohci_device_isoc_start: not in progress %p\n", xfer); 3486 #endif 3487 3488 /* XXX anything to do? */ 3489 3490 return (USBD_IN_PROGRESS); 3491 } 3492 3493 void 3494 ohci_device_isoc_abort(usbd_xfer_handle xfer) 3495 { 3496 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3497 ohci_softc_t *sc = opipe->pipe.device->bus->hci_private; 3498 ohci_soft_ed_t *sed; 3499 ohci_soft_itd_t *sitd; 3500 int s; 3501 3502 s = splusb(); 3503 3504 DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer)); 3505 3506 /* Transfer is already done. */ 3507 if (xfer->status != USBD_NOT_STARTED && 3508 xfer->status != USBD_IN_PROGRESS) { 3509 splx(s); 3510 printf("ohci_device_isoc_abort: early return\n"); 3511 return; 3512 } 3513 3514 /* Give xfer the requested abort code. */ 3515 xfer->status = USBD_CANCELLED; 3516 3517 sed = opipe->sed; 3518 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3519 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3520 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */ 3521 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3522 sizeof(sed->ed.ed_flags), 3523 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3524 3525 sitd = xfer->hcpriv; 3526 #ifdef DIAGNOSTIC 3527 if (sitd == NULL) { 3528 splx(s); 3529 printf("ohci_device_isoc_abort: hcpriv==0\n"); 3530 return; 3531 } 3532 #endif 3533 for (; sitd->xfer == xfer; sitd = sitd->nextitd) { 3534 #ifdef DIAGNOSTIC 3535 DPRINTFN(1,("abort sets done sitd=%p\n", sitd)); 3536 sitd->isdone = 1; 3537 #endif 3538 } 3539 3540 splx(s); 3541 3542 usb_delay_ms(&sc->sc_bus, OHCI_ITD_NOFFSET); 3543 3544 s = splusb(); 3545 3546 /* Run callback. */ 3547 usb_transfer_complete(xfer); 3548 3549 sed->ed.ed_headp = HTOO32(sitd->physaddr); /* unlink TDs */ 3550 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */ 3551 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3552 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3553 3554 splx(s); 3555 } 3556 3557 void 3558 ohci_device_isoc_done(usbd_xfer_handle xfer) 3559 { 3560 DPRINTFN(1,("ohci_device_isoc_done: xfer=%p\n", xfer)); 3561 } 3562 3563 usbd_status 3564 ohci_setup_isoc(usbd_pipe_handle pipe) 3565 { 3566 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3567 ohci_softc_t *sc = pipe->device->bus->hci_private; 3568 struct iso *iso = &opipe->u.iso; 3569 int s; 3570 3571 iso->next = -1; 3572 iso->inuse = 0; 3573 3574 s = splusb(); 3575 ohci_add_ed(sc, opipe->sed, sc->sc_isoc_head); 3576 splx(s); 3577 3578 return (USBD_NORMAL_COMPLETION); 3579 } 3580 3581 void 3582 ohci_device_isoc_close(usbd_pipe_handle pipe) 3583 { 3584 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3585 ohci_softc_t *sc = pipe->device->bus->hci_private; 3586 3587 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe)); 3588 ohci_close_pipe(pipe, sc->sc_isoc_head); 3589 #ifdef DIAGNOSTIC 3590 opipe->tail.itd->isdone = 1; 3591 #endif 3592 ohci_free_sitd(sc, opipe->tail.itd); 3593 } 3594
Indexes created Wed Sep 24 02:09:48 GMT 2025