ohci.c revision 1.207
1 /* $NetBSD: ohci.c,v 1.207 2010/06/06 18:58:26 pgoyette Exp $ */ 2 /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */ 3 4 /* 5 * Copyright (c) 1998, 2004, 2005 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Lennart Augustsson (lennart (at) augustsson.net) at 10 * Carlstedt Research & Technology. 11 * This code is derived from software contributed to The NetBSD Foundation 12 * by Charles M. Hannum. 13 * 14 * Redistribution and use in source and binary forms, with or without 15 * modification, are permitted provided that the following conditions 16 * are met: 17 * 1. Redistributions of source code must retain the above copyright 18 * notice, this list of conditions and the following disclaimer. 19 * 2. Redistributions in binary form must reproduce the above copyright 20 * notice, this list of conditions and the following disclaimer in the 21 * documentation and/or other materials provided with the distribution. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 24 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 25 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 26 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 27 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 31 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 32 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 33 * POSSIBILITY OF SUCH DAMAGE. 34 */ 35 36 /* 37 * USB Open Host Controller driver. 38 * 39 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html 40 * USB spec: http://www.usb.org/developers/docs/ 41 */ 42 43 #include <sys/cdefs.h> 44 __KERNEL_RCSID(0, "$NetBSD: ohci.c,v 1.207 2010/06/06 18:58:26 pgoyette Exp $"); 45 46 #include <sys/param.h> 47 #include <sys/systm.h> 48 #include <sys/malloc.h> 49 #include <sys/kernel.h> 50 #include <sys/device.h> 51 #include <sys/select.h> 52 #include <uvm/uvm_extern.h> 53 #include <sys/proc.h> 54 #include <sys/queue.h> 55 56 #include <sys/bus.h> 57 #include <machine/endian.h> 58 59 #include <dev/usb/usb.h> 60 #include <dev/usb/usbdi.h> 61 #include <dev/usb/usbdivar.h> 62 #include <dev/usb/usb_mem.h> 63 #include <dev/usb/usb_quirks.h> 64 65 #include <dev/usb/ohcireg.h> 66 #include <dev/usb/ohcivar.h> 67 #include <dev/usb/usbroothub_subr.h> 68 69 70 71 #ifdef OHCI_DEBUG 72 #define DPRINTF(x) if (ohcidebug) logprintf x 73 #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x 74 int ohcidebug = 0; 75 #else 76 #define DPRINTF(x) 77 #define DPRINTFN(n,x) 78 #endif 79 80 #if BYTE_ORDER == BIG_ENDIAN 81 #define SWAP_ENDIAN OHCI_LITTLE_ENDIAN 82 #else 83 #define SWAP_ENDIAN OHCI_BIG_ENDIAN 84 #endif 85 86 #define O16TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap16(val) : val) 87 #define O32TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap32(val) : val) 88 #define HTOO16(val) O16TOH(val) 89 #define HTOO32(val) O32TOH(val) 90 91 struct ohci_pipe; 92 93 Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *); 94 Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *); 95 96 Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *); 97 Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *); 98 99 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *); 100 Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *); 101 102 #if 0 103 Static void ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *, 104 ohci_soft_td_t *); 105 #endif 106 Static usbd_status ohci_alloc_std_chain(struct ohci_pipe *, 107 ohci_softc_t *, int, int, usbd_xfer_handle, 108 ohci_soft_td_t *, ohci_soft_td_t **); 109 110 Static usbd_status ohci_open(usbd_pipe_handle); 111 Static void ohci_poll(struct usbd_bus *); 112 Static void ohci_softintr(void *); 113 Static void ohci_waitintr(ohci_softc_t *, usbd_xfer_handle); 114 Static void ohci_rhsc(ohci_softc_t *, usbd_xfer_handle); 115 116 Static usbd_status ohci_device_request(usbd_xfer_handle xfer); 117 Static void ohci_add_ed(ohci_softc_t *, ohci_soft_ed_t *, 118 ohci_soft_ed_t *); 119 120 Static void ohci_rem_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 121 Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *); 122 Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *); 123 Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t); 124 Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *); 125 Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *); 126 Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t); 127 128 Static usbd_status ohci_setup_isoc(usbd_pipe_handle pipe); 129 Static void ohci_device_isoc_enter(usbd_xfer_handle); 130 131 Static usbd_status ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 132 Static void ohci_freem(struct usbd_bus *, usb_dma_t *); 133 134 Static usbd_xfer_handle ohci_allocx(struct usbd_bus *); 135 Static void ohci_freex(struct usbd_bus *, usbd_xfer_handle); 136 137 Static usbd_status ohci_root_ctrl_transfer(usbd_xfer_handle); 138 Static usbd_status ohci_root_ctrl_start(usbd_xfer_handle); 139 Static void ohci_root_ctrl_abort(usbd_xfer_handle); 140 Static void ohci_root_ctrl_close(usbd_pipe_handle); 141 Static void ohci_root_ctrl_done(usbd_xfer_handle); 142 143 Static usbd_status ohci_root_intr_transfer(usbd_xfer_handle); 144 Static usbd_status ohci_root_intr_start(usbd_xfer_handle); 145 Static void ohci_root_intr_abort(usbd_xfer_handle); 146 Static void ohci_root_intr_close(usbd_pipe_handle); 147 Static void ohci_root_intr_done(usbd_xfer_handle); 148 149 Static usbd_status ohci_device_ctrl_transfer(usbd_xfer_handle); 150 Static usbd_status ohci_device_ctrl_start(usbd_xfer_handle); 151 Static void ohci_device_ctrl_abort(usbd_xfer_handle); 152 Static void ohci_device_ctrl_close(usbd_pipe_handle); 153 Static void ohci_device_ctrl_done(usbd_xfer_handle); 154 155 Static usbd_status ohci_device_bulk_transfer(usbd_xfer_handle); 156 Static usbd_status ohci_device_bulk_start(usbd_xfer_handle); 157 Static void ohci_device_bulk_abort(usbd_xfer_handle); 158 Static void ohci_device_bulk_close(usbd_pipe_handle); 159 Static void ohci_device_bulk_done(usbd_xfer_handle); 160 161 Static usbd_status ohci_device_intr_transfer(usbd_xfer_handle); 162 Static usbd_status ohci_device_intr_start(usbd_xfer_handle); 163 Static void ohci_device_intr_abort(usbd_xfer_handle); 164 Static void ohci_device_intr_close(usbd_pipe_handle); 165 Static void ohci_device_intr_done(usbd_xfer_handle); 166 167 Static usbd_status ohci_device_isoc_transfer(usbd_xfer_handle); 168 Static usbd_status ohci_device_isoc_start(usbd_xfer_handle); 169 Static void ohci_device_isoc_abort(usbd_xfer_handle); 170 Static void ohci_device_isoc_close(usbd_pipe_handle); 171 Static void ohci_device_isoc_done(usbd_xfer_handle); 172 173 Static usbd_status ohci_device_setintr(ohci_softc_t *sc, 174 struct ohci_pipe *pipe, int ival); 175 176 Static void ohci_timeout(void *); 177 Static void ohci_timeout_task(void *); 178 Static void ohci_rhsc_enable(void *); 179 180 Static void ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *); 181 Static void ohci_abort_xfer(usbd_xfer_handle, usbd_status); 182 183 Static void ohci_device_clear_toggle(usbd_pipe_handle pipe); 184 Static void ohci_noop(usbd_pipe_handle pipe); 185 186 #ifdef OHCI_DEBUG 187 Static void ohci_dumpregs(ohci_softc_t *); 188 Static void ohci_dump_tds(ohci_softc_t *, ohci_soft_td_t *); 189 Static void ohci_dump_td(ohci_softc_t *, ohci_soft_td_t *); 190 Static void ohci_dump_ed(ohci_softc_t *, ohci_soft_ed_t *); 191 Static void ohci_dump_itd(ohci_softc_t *, ohci_soft_itd_t *); 192 Static void ohci_dump_itds(ohci_softc_t *, ohci_soft_itd_t *); 193 #endif 194 195 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 196 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 197 #define OWRITE1(sc, r, x) \ 198 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 199 #define OWRITE2(sc, r, x) \ 200 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 201 #define OWRITE4(sc, r, x) \ 202 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 203 static __inline uint8_t 204 OREAD1(ohci_softc_t *sc, bus_size_t r) 205 { 206 207 OBARR(sc); 208 return bus_space_read_1(sc->iot, sc->ioh, r); 209 } 210 211 static __inline uint16_t 212 OREAD2(ohci_softc_t *sc, bus_size_t r) 213 { 214 215 OBARR(sc); 216 return bus_space_read_2(sc->iot, sc->ioh, r); 217 } 218 219 static __inline uint32_t 220 OREAD4(ohci_softc_t *sc, bus_size_t r) 221 { 222 223 OBARR(sc); 224 return bus_space_read_4(sc->iot, sc->ioh, r); 225 } 226 227 /* Reverse the bits in a value 0 .. 31 */ 228 Static u_int8_t revbits[OHCI_NO_INTRS] = 229 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 230 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 231 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 232 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 233 234 struct ohci_pipe { 235 struct usbd_pipe pipe; 236 ohci_soft_ed_t *sed; 237 union { 238 ohci_soft_td_t *td; 239 ohci_soft_itd_t *itd; 240 } tail; 241 /* Info needed for different pipe kinds. */ 242 union { 243 /* Control pipe */ 244 struct { 245 usb_dma_t reqdma; 246 u_int length; 247 ohci_soft_td_t *setup, *data, *stat; 248 } ctl; 249 /* Interrupt pipe */ 250 struct { 251 int nslots; 252 int pos; 253 } intr; 254 /* Bulk pipe */ 255 struct { 256 u_int length; 257 int isread; 258 } bulk; 259 /* Iso pipe */ 260 struct iso { 261 int next, inuse; 262 } iso; 263 } u; 264 }; 265 266 #define OHCI_INTR_ENDPT 1 267 268 Static const struct usbd_bus_methods ohci_bus_methods = { 269 ohci_open, 270 ohci_softintr, 271 ohci_poll, 272 ohci_allocm, 273 ohci_freem, 274 ohci_allocx, 275 ohci_freex, 276 }; 277 278 Static const struct usbd_pipe_methods ohci_root_ctrl_methods = { 279 ohci_root_ctrl_transfer, 280 ohci_root_ctrl_start, 281 ohci_root_ctrl_abort, 282 ohci_root_ctrl_close, 283 ohci_noop, 284 ohci_root_ctrl_done, 285 }; 286 287 Static const struct usbd_pipe_methods ohci_root_intr_methods = { 288 ohci_root_intr_transfer, 289 ohci_root_intr_start, 290 ohci_root_intr_abort, 291 ohci_root_intr_close, 292 ohci_noop, 293 ohci_root_intr_done, 294 }; 295 296 Static const struct usbd_pipe_methods ohci_device_ctrl_methods = { 297 ohci_device_ctrl_transfer, 298 ohci_device_ctrl_start, 299 ohci_device_ctrl_abort, 300 ohci_device_ctrl_close, 301 ohci_noop, 302 ohci_device_ctrl_done, 303 }; 304 305 Static const struct usbd_pipe_methods ohci_device_intr_methods = { 306 ohci_device_intr_transfer, 307 ohci_device_intr_start, 308 ohci_device_intr_abort, 309 ohci_device_intr_close, 310 ohci_device_clear_toggle, 311 ohci_device_intr_done, 312 }; 313 314 Static const struct usbd_pipe_methods ohci_device_bulk_methods = { 315 ohci_device_bulk_transfer, 316 ohci_device_bulk_start, 317 ohci_device_bulk_abort, 318 ohci_device_bulk_close, 319 ohci_device_clear_toggle, 320 ohci_device_bulk_done, 321 }; 322 323 Static const struct usbd_pipe_methods ohci_device_isoc_methods = { 324 ohci_device_isoc_transfer, 325 ohci_device_isoc_start, 326 ohci_device_isoc_abort, 327 ohci_device_isoc_close, 328 ohci_noop, 329 ohci_device_isoc_done, 330 }; 331 332 int 333 ohci_activate(device_t self, enum devact act) 334 { 335 struct ohci_softc *sc = device_private(self); 336 337 switch (act) { 338 case DVACT_DEACTIVATE: 339 sc->sc_dying = 1; 340 return 0; 341 default: 342 return EOPNOTSUPP; 343 } 344 } 345 346 void 347 ohci_childdet(device_t self, device_t child) 348 { 349 struct ohci_softc *sc = device_private(self); 350 351 KASSERT(sc->sc_child == child); 352 sc->sc_child = NULL; 353 } 354 355 int 356 ohci_detach(struct ohci_softc *sc, int flags) 357 { 358 int rv = 0; 359 usbd_xfer_handle xfer; 360 361 if (sc->sc_child != NULL) 362 rv = config_detach(sc->sc_child, flags); 363 364 if (rv != 0) 365 return (rv); 366 367 usb_uncallout(sc->sc_tmo_rhsc, ohci_rhsc_enable, sc); 368 369 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 370 usb_callout_destroy(sc->sc_tmo_rhsc); 371 372 if (sc->sc_hcca != NULL) 373 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 374 while((xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers)) != NULL) { 375 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 376 free(xfer, M_USB); 377 } 378 379 return (rv); 380 } 381 382 ohci_soft_ed_t * 383 ohci_alloc_sed(ohci_softc_t *sc) 384 { 385 ohci_soft_ed_t *sed; 386 usbd_status err; 387 int i, offs; 388 usb_dma_t dma; 389 390 if (sc->sc_freeeds == NULL) { 391 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 392 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 393 OHCI_ED_ALIGN, &dma); 394 if (err) 395 return (0); 396 for(i = 0; i < OHCI_SED_CHUNK; i++) { 397 offs = i * OHCI_SED_SIZE; 398 sed = KERNADDR(&dma, offs); 399 sed->physaddr = DMAADDR(&dma, offs); 400 sed->dma = dma; 401 sed->offs = offs; 402 sed->next = sc->sc_freeeds; 403 sc->sc_freeeds = sed; 404 } 405 } 406 sed = sc->sc_freeeds; 407 sc->sc_freeeds = sed->next; 408 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 409 sed->next = 0; 410 return (sed); 411 } 412 413 void 414 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 415 { 416 sed->next = sc->sc_freeeds; 417 sc->sc_freeeds = sed; 418 } 419 420 ohci_soft_td_t * 421 ohci_alloc_std(ohci_softc_t *sc) 422 { 423 ohci_soft_td_t *std; 424 usbd_status err; 425 int i, offs; 426 usb_dma_t dma; 427 int s; 428 429 if (sc->sc_freetds == NULL) { 430 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 431 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 432 OHCI_TD_ALIGN, &dma); 433 if (err) 434 return (NULL); 435 s = splusb(); 436 for(i = 0; i < OHCI_STD_CHUNK; i++) { 437 offs = i * OHCI_STD_SIZE; 438 std = KERNADDR(&dma, offs); 439 std->physaddr = DMAADDR(&dma, offs); 440 std->dma = dma; 441 std->offs = offs; 442 std->nexttd = sc->sc_freetds; 443 sc->sc_freetds = std; 444 } 445 splx(s); 446 } 447 448 s = splusb(); 449 std = sc->sc_freetds; 450 sc->sc_freetds = std->nexttd; 451 memset(&std->td, 0, sizeof(ohci_td_t)); 452 std->nexttd = NULL; 453 std->xfer = NULL; 454 ohci_hash_add_td(sc, std); 455 splx(s); 456 457 return (std); 458 } 459 460 void 461 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std) 462 { 463 int s; 464 465 s = splusb(); 466 ohci_hash_rem_td(sc, std); 467 std->nexttd = sc->sc_freetds; 468 sc->sc_freetds = std; 469 splx(s); 470 } 471 472 usbd_status 473 ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc, 474 int alen, int rd, usbd_xfer_handle xfer, 475 ohci_soft_td_t *sp, ohci_soft_td_t **ep) 476 { 477 ohci_soft_td_t *next, *cur; 478 ohci_physaddr_t dataphys, dataphysend; 479 u_int32_t tdflags; 480 int len, curlen; 481 usb_dma_t *dma = &xfer->dmabuf; 482 u_int16_t flags = xfer->flags; 483 484 DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen)); 485 486 len = alen; 487 cur = sp; 488 dataphys = DMAADDR(dma, 0); 489 dataphysend = OHCI_PAGE(dataphys + len - 1); 490 usb_syncmem(dma, 0, len, 491 rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 492 tdflags = HTOO32( 493 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 494 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) | 495 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR); 496 497 for (;;) { 498 next = ohci_alloc_std(sc); 499 if (next == NULL) 500 goto nomem; 501 502 /* The OHCI hardware can handle at most one page crossing. */ 503 if (OHCI_PAGE(dataphys) == dataphysend || 504 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) { 505 /* we can handle it in this TD */ 506 curlen = len; 507 } else { 508 /* must use multiple TDs, fill as much as possible. */ 509 curlen = 2 * OHCI_PAGE_SIZE - 510 (dataphys & (OHCI_PAGE_SIZE-1)); 511 /* the length must be a multiple of the max size */ 512 curlen -= curlen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize); 513 #ifdef DIAGNOSTIC 514 if (curlen == 0) 515 panic("ohci_alloc_std: curlen == 0"); 516 #endif 517 } 518 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x " 519 "dataphysend=0x%08x len=%d curlen=%d\n", 520 dataphys, dataphysend, 521 len, curlen)); 522 len -= curlen; 523 524 cur->td.td_flags = tdflags; 525 cur->td.td_cbp = HTOO32(dataphys); 526 cur->nexttd = next; 527 cur->td.td_nexttd = HTOO32(next->physaddr); 528 cur->td.td_be = HTOO32(dataphys + curlen - 1); 529 cur->len = curlen; 530 cur->flags = OHCI_ADD_LEN; 531 cur->xfer = xfer; 532 usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td), 533 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 534 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n", 535 dataphys, dataphys + curlen - 1)); 536 if (len == 0) 537 break; 538 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n")); 539 dataphys += curlen; 540 cur = next; 541 } 542 if (!rd && (flags & USBD_FORCE_SHORT_XFER) && 543 alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) { 544 /* Force a 0 length transfer at the end. */ 545 546 cur = next; 547 next = ohci_alloc_std(sc); 548 if (next == NULL) 549 goto nomem; 550 551 cur->td.td_flags = tdflags; 552 cur->td.td_cbp = 0; /* indicate 0 length packet */ 553 cur->nexttd = next; 554 cur->td.td_nexttd = HTOO32(next->physaddr); 555 cur->td.td_be = ~0; 556 cur->len = 0; 557 cur->flags = 0; 558 cur->xfer = xfer; 559 usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td), 560 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 561 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n")); 562 } 563 *ep = cur; 564 565 return (USBD_NORMAL_COMPLETION); 566 567 nomem: 568 /* XXX free chain */ 569 return (USBD_NOMEM); 570 } 571 572 #if 0 573 Static void 574 ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std, 575 ohci_soft_td_t *stdend) 576 { 577 ohci_soft_td_t *p; 578 579 for (; std != stdend; std = p) { 580 p = std->nexttd; 581 ohci_free_std(sc, std); 582 } 583 } 584 #endif 585 586 ohci_soft_itd_t * 587 ohci_alloc_sitd(ohci_softc_t *sc) 588 { 589 ohci_soft_itd_t *sitd; 590 usbd_status err; 591 int i, s, offs; 592 usb_dma_t dma; 593 594 if (sc->sc_freeitds == NULL) { 595 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n")); 596 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK, 597 OHCI_ITD_ALIGN, &dma); 598 if (err) 599 return (NULL); 600 s = splusb(); 601 for(i = 0; i < OHCI_SITD_CHUNK; i++) { 602 offs = i * OHCI_SITD_SIZE; 603 sitd = KERNADDR(&dma, offs); 604 sitd->physaddr = DMAADDR(&dma, offs); 605 sitd->dma = dma; 606 sitd->offs = offs; 607 sitd->nextitd = sc->sc_freeitds; 608 sc->sc_freeitds = sitd; 609 } 610 splx(s); 611 } 612 613 s = splusb(); 614 sitd = sc->sc_freeitds; 615 sc->sc_freeitds = sitd->nextitd; 616 memset(&sitd->itd, 0, sizeof(ohci_itd_t)); 617 sitd->nextitd = NULL; 618 sitd->xfer = NULL; 619 ohci_hash_add_itd(sc, sitd); 620 splx(s); 621 622 #ifdef DIAGNOSTIC 623 sitd->isdone = 0; 624 #endif 625 626 return (sitd); 627 } 628 629 void 630 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 631 { 632 int s; 633 634 DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd)); 635 636 #ifdef DIAGNOSTIC 637 if (!sitd->isdone) { 638 panic("ohci_free_sitd: sitd=%p not done", sitd); 639 return; 640 } 641 /* Warn double free */ 642 sitd->isdone = 0; 643 #endif 644 645 s = splusb(); 646 ohci_hash_rem_itd(sc, sitd); 647 sitd->nextitd = sc->sc_freeitds; 648 sc->sc_freeitds = sitd; 649 splx(s); 650 } 651 652 usbd_status 653 ohci_init(ohci_softc_t *sc) 654 { 655 ohci_soft_ed_t *sed, *psed; 656 usbd_status err; 657 int i; 658 u_int32_t s, ctl, rwc, ival, hcr, fm, per, rev, desca, descb; 659 660 DPRINTF(("ohci_init: start\n")); 661 aprint_normal_dev(sc->sc_dev, ""); 662 663 sc->sc_hcca = NULL; 664 usb_callout_init(sc->sc_tmo_rhsc); 665 666 for (i = 0; i < OHCI_HASH_SIZE; i++) 667 LIST_INIT(&sc->sc_hash_tds[i]); 668 for (i = 0; i < OHCI_HASH_SIZE; i++) 669 LIST_INIT(&sc->sc_hash_itds[i]); 670 671 SIMPLEQ_INIT(&sc->sc_free_xfers); 672 673 rev = OREAD4(sc, OHCI_REVISION); 674 aprint_normal("OHCI version %d.%d%s\n", 675 OHCI_REV_HI(rev), OHCI_REV_LO(rev), 676 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 677 678 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 679 aprint_error_dev(sc->sc_dev, "unsupported OHCI revision\n"); 680 sc->sc_bus.usbrev = USBREV_UNKNOWN; 681 return (USBD_INVAL); 682 } 683 sc->sc_bus.usbrev = USBREV_1_0; 684 685 usb_setup_reserve(sc->sc_dev, &sc->sc_dma_reserve, sc->sc_bus.dmatag, 686 USB_MEM_RESERVE); 687 688 /* XXX determine alignment by R/W */ 689 /* Allocate the HCCA area. */ 690 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 691 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 692 if (err) { 693 sc->sc_hcca = NULL; 694 return err; 695 } 696 sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0); 697 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 698 699 sc->sc_eintrs = OHCI_NORMAL_INTRS; 700 701 /* Allocate dummy ED that starts the control list. */ 702 sc->sc_ctrl_head = ohci_alloc_sed(sc); 703 if (sc->sc_ctrl_head == NULL) { 704 err = USBD_NOMEM; 705 goto bad1; 706 } 707 sc->sc_ctrl_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 708 709 /* Allocate dummy ED that starts the bulk list. */ 710 sc->sc_bulk_head = ohci_alloc_sed(sc); 711 if (sc->sc_bulk_head == NULL) { 712 err = USBD_NOMEM; 713 goto bad2; 714 } 715 sc->sc_bulk_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 716 usb_syncmem(&sc->sc_bulk_head->dma, sc->sc_bulk_head->offs, 717 sizeof(sc->sc_bulk_head->ed), 718 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 719 720 /* Allocate dummy ED that starts the isochronous list. */ 721 sc->sc_isoc_head = ohci_alloc_sed(sc); 722 if (sc->sc_isoc_head == NULL) { 723 err = USBD_NOMEM; 724 goto bad3; 725 } 726 sc->sc_isoc_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 727 usb_syncmem(&sc->sc_isoc_head->dma, sc->sc_isoc_head->offs, 728 sizeof(sc->sc_isoc_head->ed), 729 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 730 731 /* Allocate all the dummy EDs that make up the interrupt tree. */ 732 for (i = 0; i < OHCI_NO_EDS; i++) { 733 sed = ohci_alloc_sed(sc); 734 if (sed == NULL) { 735 while (--i >= 0) 736 ohci_free_sed(sc, sc->sc_eds[i]); 737 err = USBD_NOMEM; 738 goto bad4; 739 } 740 /* All ED fields are set to 0. */ 741 sc->sc_eds[i] = sed; 742 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 743 if (i != 0) 744 psed = sc->sc_eds[(i-1) / 2]; 745 else 746 psed= sc->sc_isoc_head; 747 sed->next = psed; 748 sed->ed.ed_nexted = HTOO32(psed->physaddr); 749 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 750 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 751 } 752 /* 753 * Fill HCCA interrupt table. The bit reversal is to get 754 * the tree set up properly to spread the interrupts. 755 */ 756 for (i = 0; i < OHCI_NO_INTRS; i++) 757 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 758 HTOO32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 759 usb_syncmem(&sc->sc_hccadma, 0, OHCI_HCCA_SIZE, 760 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 761 762 #ifdef OHCI_DEBUG 763 if (ohcidebug > 15) { 764 for (i = 0; i < OHCI_NO_EDS; i++) { 765 printf("ed#%d ", i); 766 ohci_dump_ed(sc, sc->sc_eds[i]); 767 } 768 printf("iso "); 769 ohci_dump_ed(sc, sc->sc_isoc_head); 770 } 771 #endif 772 773 /* Preserve values programmed by SMM/BIOS but lost over reset. */ 774 ctl = OREAD4(sc, OHCI_CONTROL); 775 rwc = ctl & OHCI_RWC; 776 fm = OREAD4(sc, OHCI_FM_INTERVAL); 777 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 778 descb = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 779 780 /* Determine in what context we are running. */ 781 if (ctl & OHCI_IR) { 782 /* SMM active, request change */ 783 DPRINTF(("ohci_init: SMM active, request owner change\n")); 784 if ((sc->sc_intre & (OHCI_OC | OHCI_MIE)) == 785 (OHCI_OC | OHCI_MIE)) 786 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_MIE); 787 s = OREAD4(sc, OHCI_COMMAND_STATUS); 788 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 789 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 790 usb_delay_ms(&sc->sc_bus, 1); 791 ctl = OREAD4(sc, OHCI_CONTROL); 792 } 793 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_MIE); 794 if ((ctl & OHCI_IR) == 0) { 795 aprint_error_dev(sc->sc_dev, 796 "SMM does not respond, resetting\n"); 797 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 798 goto reset; 799 } 800 #if 0 801 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */ 802 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 803 /* BIOS started controller. */ 804 DPRINTF(("ohci_init: BIOS active\n")); 805 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 806 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL | rwc); 807 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 808 } 809 #endif 810 } else { 811 DPRINTF(("ohci_init: cold started\n")); 812 reset: 813 /* Controller was cold started. */ 814 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 815 } 816 817 /* 818 * This reset should not be necessary according to the OHCI spec, but 819 * without it some controllers do not start. 820 */ 821 DPRINTF(("%s: resetting\n", device_xname(sc->sc_dev))); 822 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 823 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 824 825 /* We now own the host controller and the bus has been reset. */ 826 827 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 828 /* Nominal time for a reset is 10 us. */ 829 for (i = 0; i < 10; i++) { 830 delay(10); 831 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 832 if (!hcr) 833 break; 834 } 835 if (hcr) { 836 aprint_error_dev(sc->sc_dev, "reset timeout\n"); 837 err = USBD_IOERROR; 838 goto bad5; 839 } 840 #ifdef OHCI_DEBUG 841 if (ohcidebug > 15) 842 ohci_dumpregs(sc); 843 #endif 844 845 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 846 847 /* Set up HC registers. */ 848 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 849 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 850 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 851 /* disable all interrupts and then switch on all desired interrupts */ 852 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 853 /* switch on desired functional features */ 854 ctl = OREAD4(sc, OHCI_CONTROL); 855 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 856 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 857 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL | rwc; 858 /* And finally start it! */ 859 OWRITE4(sc, OHCI_CONTROL, ctl); 860 861 /* 862 * The controller is now OPERATIONAL. Set a some final 863 * registers that should be set earlier, but that the 864 * controller ignores when in the SUSPEND state. 865 */ 866 ival = OHCI_GET_IVAL(fm); 867 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 868 fm |= OHCI_FSMPS(ival) | ival; 869 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 870 per = OHCI_PERIODIC(ival); /* 90% periodic */ 871 OWRITE4(sc, OHCI_PERIODIC_START, per); 872 873 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */ 874 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP); 875 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 876 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY); 877 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca); 878 879 /* 880 * The AMD756 requires a delay before re-reading the register, 881 * otherwise it will occasionally report 0 ports. 882 */ 883 sc->sc_noport = 0; 884 for (i = 0; i < 10 && sc->sc_noport == 0; i++) { 885 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY); 886 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 887 } 888 889 #ifdef OHCI_DEBUG 890 if (ohcidebug > 5) 891 ohci_dumpregs(sc); 892 #endif 893 894 /* Set up the bus struct. */ 895 sc->sc_bus.methods = &ohci_bus_methods; 896 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 897 898 sc->sc_control = sc->sc_intre = 0; 899 900 /* Finally, turn on interrupts. */ 901 DPRINTFN(1,("ohci_init: enabling\n")); 902 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 903 904 return (USBD_NORMAL_COMPLETION); 905 906 bad5: 907 for (i = 0; i < OHCI_NO_EDS; i++) 908 ohci_free_sed(sc, sc->sc_eds[i]); 909 bad4: 910 ohci_free_sed(sc, sc->sc_isoc_head); 911 bad3: 912 ohci_free_sed(sc, sc->sc_bulk_head); 913 bad2: 914 ohci_free_sed(sc, sc->sc_ctrl_head); 915 bad1: 916 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 917 sc->sc_hcca = NULL; 918 return (err); 919 } 920 921 usbd_status 922 ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 923 { 924 struct ohci_softc *sc = bus->hci_private; 925 usbd_status status; 926 927 status = usb_allocmem(&sc->sc_bus, size, 0, dma); 928 if (status == USBD_NOMEM) 929 status = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size); 930 return status; 931 } 932 933 void 934 ohci_freem(struct usbd_bus *bus, usb_dma_t *dma) 935 { 936 struct ohci_softc *sc = bus->hci_private; 937 if (dma->block->flags & USB_DMA_RESERVE) { 938 usb_reserve_freem(&sc->sc_dma_reserve, dma); 939 return; 940 } 941 usb_freemem(&sc->sc_bus, dma); 942 } 943 944 usbd_xfer_handle 945 ohci_allocx(struct usbd_bus *bus) 946 { 947 struct ohci_softc *sc = bus->hci_private; 948 usbd_xfer_handle xfer; 949 950 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 951 if (xfer != NULL) { 952 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 953 #ifdef DIAGNOSTIC 954 if (xfer->busy_free != XFER_FREE) { 955 printf("ohci_allocx: xfer=%p not free, 0x%08x\n", xfer, 956 xfer->busy_free); 957 } 958 #endif 959 } else { 960 xfer = malloc(sizeof(struct ohci_xfer), M_USB, M_NOWAIT); 961 } 962 if (xfer != NULL) { 963 memset(xfer, 0, sizeof (struct ohci_xfer)); 964 #ifdef DIAGNOSTIC 965 xfer->busy_free = XFER_BUSY; 966 #endif 967 } 968 return (xfer); 969 } 970 971 void 972 ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 973 { 974 struct ohci_softc *sc = bus->hci_private; 975 976 #ifdef DIAGNOSTIC 977 if (xfer->busy_free != XFER_BUSY) { 978 printf("ohci_freex: xfer=%p not busy, 0x%08x\n", xfer, 979 xfer->busy_free); 980 } 981 xfer->busy_free = XFER_FREE; 982 #endif 983 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 984 } 985 986 /* 987 * Shut down the controller when the system is going down. 988 */ 989 bool 990 ohci_shutdown(device_t self, int flags) 991 { 992 ohci_softc_t *sc = device_private(self); 993 994 DPRINTF(("ohci_shutdown: stopping the HC\n")); 995 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 996 return true; 997 } 998 999 bool 1000 ohci_resume(device_t dv, const pmf_qual_t *qual) 1001 { 1002 ohci_softc_t *sc = device_private(dv); 1003 uint32_t ctl; 1004 int s; 1005 1006 s = splhardusb(); 1007 sc->sc_bus.use_polling++; 1008 /* Some broken BIOSes do not recover these values */ 1009 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 1010 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, 1011 sc->sc_ctrl_head->physaddr); 1012 OWRITE4(sc, OHCI_BULK_HEAD_ED, 1013 sc->sc_bulk_head->physaddr); 1014 if (sc->sc_intre) 1015 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_intre & 1016 (OHCI_ALL_INTRS | OHCI_MIE)); 1017 if (sc->sc_control) 1018 ctl = sc->sc_control; 1019 else 1020 ctl = OREAD4(sc, OHCI_CONTROL); 1021 ctl |= OHCI_HCFS_RESUME; 1022 OWRITE4(sc, OHCI_CONTROL, ctl); 1023 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 1024 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL; 1025 OWRITE4(sc, OHCI_CONTROL, ctl); 1026 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 1027 sc->sc_control = sc->sc_intre = 0; 1028 sc->sc_bus.use_polling--; 1029 splx(s); 1030 1031 return true; 1032 } 1033 1034 bool 1035 ohci_suspend(device_t dv, const pmf_qual_t *qual) 1036 { 1037 ohci_softc_t *sc = device_private(dv); 1038 uint32_t ctl; 1039 int s; 1040 1041 s = splhardusb(); 1042 sc->sc_bus.use_polling++; 1043 ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK; 1044 if (sc->sc_control == 0) { 1045 /* 1046 * Preserve register values, in case that BIOS 1047 * does not recover them. 1048 */ 1049 sc->sc_control = ctl; 1050 sc->sc_intre = OREAD4(sc, 1051 OHCI_INTERRUPT_ENABLE); 1052 } 1053 ctl |= OHCI_HCFS_SUSPEND; 1054 OWRITE4(sc, OHCI_CONTROL, ctl); 1055 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1056 sc->sc_bus.use_polling--; 1057 splx(s); 1058 1059 return true; 1060 } 1061 1062 #ifdef OHCI_DEBUG 1063 void 1064 ohci_dumpregs(ohci_softc_t *sc) 1065 { 1066 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 1067 OREAD4(sc, OHCI_REVISION), 1068 OREAD4(sc, OHCI_CONTROL), 1069 OREAD4(sc, OHCI_COMMAND_STATUS))); 1070 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 1071 OREAD4(sc, OHCI_INTERRUPT_STATUS), 1072 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 1073 OREAD4(sc, OHCI_INTERRUPT_DISABLE))); 1074 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 1075 OREAD4(sc, OHCI_HCCA), 1076 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 1077 OREAD4(sc, OHCI_CONTROL_HEAD_ED))); 1078 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 1079 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 1080 OREAD4(sc, OHCI_BULK_HEAD_ED), 1081 OREAD4(sc, OHCI_BULK_CURRENT_ED))); 1082 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 1083 OREAD4(sc, OHCI_DONE_HEAD), 1084 OREAD4(sc, OHCI_FM_INTERVAL), 1085 OREAD4(sc, OHCI_FM_REMAINING))); 1086 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 1087 OREAD4(sc, OHCI_FM_NUMBER), 1088 OREAD4(sc, OHCI_PERIODIC_START), 1089 OREAD4(sc, OHCI_LS_THRESHOLD))); 1090 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n", 1091 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 1092 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 1093 OREAD4(sc, OHCI_RH_STATUS))); 1094 DPRINTF((" port1=0x%08x port2=0x%08x\n", 1095 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 1096 OREAD4(sc, OHCI_RH_PORT_STATUS(2)))); 1097 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n", 1098 O32TOH(sc->sc_hcca->hcca_frame_number), 1099 O32TOH(sc->sc_hcca->hcca_done_head))); 1100 } 1101 #endif 1102 1103 Static int ohci_intr1(ohci_softc_t *); 1104 1105 int 1106 ohci_intr(void *p) 1107 { 1108 ohci_softc_t *sc = p; 1109 1110 if (sc == NULL || sc->sc_dying || !device_has_power(sc->sc_dev)) 1111 return (0); 1112 1113 /* If we get an interrupt while polling, then just ignore it. */ 1114 if (sc->sc_bus.use_polling) { 1115 #ifdef DIAGNOSTIC 1116 DPRINTFN(16, ("ohci_intr: ignored interrupt while polling\n")); 1117 #endif 1118 /* for level triggered intrs, should do something to ack */ 1119 OWRITE4(sc, OHCI_INTERRUPT_STATUS, 1120 OREAD4(sc, OHCI_INTERRUPT_STATUS)); 1121 1122 return (0); 1123 } 1124 1125 return (ohci_intr1(sc)); 1126 } 1127 1128 Static int 1129 ohci_intr1(ohci_softc_t *sc) 1130 { 1131 u_int32_t intrs, eintrs; 1132 1133 DPRINTFN(14,("ohci_intr1: enter\n")); 1134 1135 /* In case the interrupt occurs before initialization has completed. */ 1136 if (sc == NULL || sc->sc_hcca == NULL) { 1137 #ifdef DIAGNOSTIC 1138 printf("ohci_intr: sc->sc_hcca == NULL\n"); 1139 #endif 1140 return (0); 1141 } 1142 1143 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1144 if (!intrs) 1145 return (0); 1146 1147 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs & ~(OHCI_MIE|OHCI_WDH)); /* Acknowledge */ 1148 eintrs = intrs & sc->sc_eintrs; 1149 if (!eintrs) 1150 return (0); 1151 1152 sc->sc_bus.intr_context++; 1153 sc->sc_bus.no_intrs++; 1154 DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 1155 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 1156 (u_int)eintrs)); 1157 1158 if (eintrs & OHCI_SO) { 1159 sc->sc_overrun_cnt++; 1160 if (usbd_ratecheck(&sc->sc_overrun_ntc)) { 1161 printf("%s: %u scheduling overruns\n", 1162 device_xname(sc->sc_dev), sc->sc_overrun_cnt); 1163 sc->sc_overrun_cnt = 0; 1164 } 1165 /* XXX do what */ 1166 eintrs &= ~OHCI_SO; 1167 } 1168 if (eintrs & OHCI_WDH) { 1169 /* 1170 * We block the interrupt below, and reenable it later from 1171 * ohci_softintr(). 1172 */ 1173 usb_schedsoftintr(&sc->sc_bus); 1174 } 1175 if (eintrs & OHCI_RD) { 1176 printf("%s: resume detect\n", device_xname(sc->sc_dev)); 1177 /* XXX process resume detect */ 1178 } 1179 if (eintrs & OHCI_UE) { 1180 printf("%s: unrecoverable error, controller halted\n", 1181 device_xname(sc->sc_dev)); 1182 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1183 /* XXX what else */ 1184 } 1185 if (eintrs & OHCI_RHSC) { 1186 /* 1187 * We block the interrupt below, and reenable it later from 1188 * a timeout. 1189 */ 1190 ohci_rhsc(sc, sc->sc_intrxfer); 1191 /* Do not allow RHSC interrupts > 1 per second */ 1192 usb_callout(sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc); 1193 } 1194 1195 sc->sc_bus.intr_context--; 1196 1197 if (eintrs != 0) { 1198 /* Block unprocessed interrupts. */ 1199 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs); 1200 sc->sc_eintrs &= ~eintrs; 1201 DPRINTFN(1, ("%s: blocking intrs 0x%x\n", 1202 device_xname(sc->sc_dev), eintrs)); 1203 } 1204 1205 return (1); 1206 } 1207 1208 void 1209 ohci_rhsc_enable(void *v_sc) 1210 { 1211 ohci_softc_t *sc = v_sc; 1212 int s; 1213 1214 s = splhardusb(); 1215 sc->sc_eintrs |= OHCI_RHSC; 1216 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1217 splx(s); 1218 } 1219 1220 #ifdef OHCI_DEBUG 1221 const char *ohci_cc_strs[] = { 1222 "NO_ERROR", 1223 "CRC", 1224 "BIT_STUFFING", 1225 "DATA_TOGGLE_MISMATCH", 1226 "STALL", 1227 "DEVICE_NOT_RESPONDING", 1228 "PID_CHECK_FAILURE", 1229 "UNEXPECTED_PID", 1230 "DATA_OVERRUN", 1231 "DATA_UNDERRUN", 1232 "BUFFER_OVERRUN", 1233 "BUFFER_UNDERRUN", 1234 "reserved", 1235 "reserved", 1236 "NOT_ACCESSED", 1237 "NOT_ACCESSED", 1238 }; 1239 #endif 1240 1241 void 1242 ohci_softintr(void *v) 1243 { 1244 struct usbd_bus *bus = v; 1245 ohci_softc_t *sc = bus->hci_private; 1246 ohci_soft_itd_t *sitd, *sidone, *sitdnext; 1247 ohci_soft_td_t *std, *sdone, *stdnext; 1248 usbd_xfer_handle xfer; 1249 struct ohci_pipe *opipe; 1250 int len, cc, s; 1251 int i, j, actlen, iframes, uedir; 1252 ohci_physaddr_t done; 1253 1254 DPRINTFN(10,("ohci_softintr: enter\n")); 1255 1256 sc->sc_bus.intr_context++; 1257 1258 s = splhardusb(); 1259 usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head), 1260 sizeof(sc->sc_hcca->hcca_done_head), 1261 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1262 done = O32TOH(sc->sc_hcca->hcca_done_head) & ~OHCI_DONE_INTRS; 1263 sc->sc_hcca->hcca_done_head = 0; 1264 usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head), 1265 sizeof(sc->sc_hcca->hcca_done_head), 1266 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1267 OWRITE4(sc, OHCI_INTERRUPT_STATUS, OHCI_WDH); 1268 sc->sc_eintrs |= OHCI_WDH; 1269 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_WDH); 1270 splx(s); 1271 1272 /* Reverse the done list. */ 1273 for (sdone = NULL, sidone = NULL; done != 0; ) { 1274 std = ohci_hash_find_td(sc, done); 1275 if (std != NULL) { 1276 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 1277 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1278 std->dnext = sdone; 1279 done = O32TOH(std->td.td_nexttd); 1280 sdone = std; 1281 DPRINTFN(10,("add TD %p\n", std)); 1282 continue; 1283 } 1284 sitd = ohci_hash_find_itd(sc, done); 1285 if (sitd != NULL) { 1286 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 1287 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1288 sitd->dnext = sidone; 1289 done = O32TOH(sitd->itd.itd_nextitd); 1290 sidone = sitd; 1291 DPRINTFN(5,("add ITD %p\n", sitd)); 1292 continue; 1293 } 1294 printf("ohci_softintr: addr 0x%08lx not found", (u_long)done); 1295 return; 1296 } 1297 1298 DPRINTFN(10,("ohci_softintr: sdone=%p sidone=%p\n", sdone, sidone)); 1299 1300 #ifdef OHCI_DEBUG 1301 if (ohcidebug > 10) { 1302 DPRINTF(("ohci_process_done: TD done:\n")); 1303 ohci_dump_tds(sc, sdone); 1304 } 1305 #endif 1306 1307 for (std = sdone; std; std = stdnext) { 1308 xfer = std->xfer; 1309 stdnext = std->dnext; 1310 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n", 1311 std, xfer, xfer ? xfer->hcpriv : 0)); 1312 if (xfer == NULL) { 1313 /* 1314 * xfer == NULL: There seems to be no xfer associated 1315 * with this TD. It is tailp that happened to end up on 1316 * the done queue. 1317 * Shouldn't happen, but some chips are broken(?). 1318 */ 1319 continue; 1320 } 1321 if (xfer->status == USBD_CANCELLED || 1322 xfer->status == USBD_TIMEOUT) { 1323 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1324 xfer)); 1325 /* Handled by abort routine. */ 1326 continue; 1327 } 1328 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 1329 1330 len = std->len; 1331 if (std->td.td_cbp != 0) 1332 len -= O32TOH(std->td.td_be) - 1333 O32TOH(std->td.td_cbp) + 1; 1334 DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", len, 1335 std->flags)); 1336 if (std->flags & OHCI_ADD_LEN) 1337 xfer->actlen += len; 1338 1339 cc = OHCI_TD_GET_CC(O32TOH(std->td.td_flags)); 1340 if (cc == OHCI_CC_NO_ERROR) { 1341 if (std->flags & OHCI_CALL_DONE) { 1342 xfer->status = USBD_NORMAL_COMPLETION; 1343 s = splusb(); 1344 usb_transfer_complete(xfer); 1345 splx(s); 1346 } 1347 ohci_free_std(sc, std); 1348 } else { 1349 /* 1350 * Endpoint is halted. First unlink all the TDs 1351 * belonging to the failed transfer, and then restart 1352 * the endpoint. 1353 */ 1354 ohci_soft_td_t *p, *n; 1355 opipe = (struct ohci_pipe *)xfer->pipe; 1356 1357 DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n", 1358 OHCI_TD_GET_CC(O32TOH(std->td.td_flags)), 1359 ohci_cc_strs[OHCI_TD_GET_CC(O32TOH(std->td.td_flags))])); 1360 1361 /* remove TDs */ 1362 for (p = std; p->xfer == xfer; p = n) { 1363 n = p->nexttd; 1364 ohci_free_std(sc, p); 1365 } 1366 1367 /* clear halt */ 1368 opipe->sed->ed.ed_headp = HTOO32(p->physaddr); 1369 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1370 1371 if (cc == OHCI_CC_STALL) 1372 xfer->status = USBD_STALLED; 1373 else 1374 xfer->status = USBD_IOERROR; 1375 s = splusb(); 1376 usb_transfer_complete(xfer); 1377 splx(s); 1378 } 1379 } 1380 1381 #ifdef OHCI_DEBUG 1382 if (ohcidebug > 10) { 1383 DPRINTF(("ohci_softintr: ITD done:\n")); 1384 ohci_dump_itds(sc, sidone); 1385 } 1386 #endif 1387 1388 for (sitd = sidone; sitd != NULL; sitd = sitdnext) { 1389 xfer = sitd->xfer; 1390 sitdnext = sitd->dnext; 1391 DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n", 1392 sitd, xfer, xfer ? xfer->hcpriv : 0)); 1393 if (xfer == NULL) 1394 continue; 1395 if (xfer->status == USBD_CANCELLED || 1396 xfer->status == USBD_TIMEOUT) { 1397 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1398 xfer)); 1399 /* Handled by abort routine. */ 1400 continue; 1401 } 1402 #ifdef DIAGNOSTIC 1403 if (sitd->isdone) 1404 printf("ohci_softintr: sitd=%p is done\n", sitd); 1405 sitd->isdone = 1; 1406 #endif 1407 if (sitd->flags & OHCI_CALL_DONE) { 1408 ohci_soft_itd_t *next; 1409 1410 opipe = (struct ohci_pipe *)xfer->pipe; 1411 opipe->u.iso.inuse -= xfer->nframes; 1412 uedir = UE_GET_DIR(xfer->pipe->endpoint->edesc-> 1413 bEndpointAddress); 1414 xfer->status = USBD_NORMAL_COMPLETION; 1415 actlen = 0; 1416 for (i = 0, sitd = xfer->hcpriv;; 1417 sitd = next) { 1418 next = sitd->nextitd; 1419 if (OHCI_ITD_GET_CC(O32TOH(sitd-> 1420 itd.itd_flags)) != OHCI_CC_NO_ERROR) 1421 xfer->status = USBD_IOERROR; 1422 /* For input, update frlengths with actual */ 1423 /* XXX anything necessary for output? */ 1424 if (uedir == UE_DIR_IN && 1425 xfer->status == USBD_NORMAL_COMPLETION) { 1426 iframes = OHCI_ITD_GET_FC(O32TOH( 1427 sitd->itd.itd_flags)); 1428 for (j = 0; j < iframes; i++, j++) { 1429 len = O16TOH(sitd-> 1430 itd.itd_offset[j]); 1431 if ((OHCI_ITD_PSW_GET_CC(len) & 1432 OHCI_CC_NOT_ACCESSED_MASK) 1433 == OHCI_CC_NOT_ACCESSED) 1434 len = 0; 1435 else 1436 len = OHCI_ITD_PSW_LENGTH(len); 1437 xfer->frlengths[i] = len; 1438 actlen += len; 1439 } 1440 } 1441 if (sitd->flags & OHCI_CALL_DONE) 1442 break; 1443 ohci_free_sitd(sc, sitd); 1444 } 1445 ohci_free_sitd(sc, sitd); 1446 if (uedir == UE_DIR_IN && 1447 xfer->status == USBD_NORMAL_COMPLETION) 1448 xfer->actlen = actlen; 1449 xfer->hcpriv = NULL; 1450 1451 s = splusb(); 1452 usb_transfer_complete(xfer); 1453 splx(s); 1454 } 1455 } 1456 1457 #ifdef USB_USE_SOFTINTR 1458 if (sc->sc_softwake) { 1459 sc->sc_softwake = 0; 1460 wakeup(&sc->sc_softwake); 1461 } 1462 #endif /* USB_USE_SOFTINTR */ 1463 1464 sc->sc_bus.intr_context--; 1465 DPRINTFN(10,("ohci_softintr: done:\n")); 1466 } 1467 1468 void 1469 ohci_device_ctrl_done(usbd_xfer_handle xfer) 1470 { 1471 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1472 int len = UGETW(xfer->request.wLength); 1473 int isread = (xfer->request.bmRequestType & UT_READ); 1474 1475 DPRINTFN(10,("ohci_device_ctrl_done: xfer=%p\n", xfer)); 1476 1477 #ifdef DIAGNOSTIC 1478 if (!(xfer->rqflags & URQ_REQUEST)) { 1479 panic("ohci_device_ctrl_done: not a request"); 1480 } 1481 #endif 1482 if (len) 1483 usb_syncmem(&xfer->dmabuf, 0, len, 1484 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1485 usb_syncmem(&opipe->u.ctl.reqdma, 0, 1486 sizeof(usb_device_request_t), BUS_DMASYNC_POSTWRITE); 1487 } 1488 1489 void 1490 ohci_device_intr_done(usbd_xfer_handle xfer) 1491 { 1492 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1493 ohci_softc_t *sc = opipe->pipe.device->bus->hci_private; 1494 ohci_soft_ed_t *sed = opipe->sed; 1495 ohci_soft_td_t *data, *tail; 1496 int isread = 1497 (UE_GET_DIR(xfer->pipe->endpoint->edesc->bEndpointAddress) == UE_DIR_IN); 1498 1499 1500 DPRINTFN(10,("ohci_device_intr_done: xfer=%p, actlen=%d\n", 1501 xfer, xfer->actlen)); 1502 1503 usb_syncmem(&xfer->dmabuf, 0, xfer->length, 1504 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1505 if (xfer->pipe->repeat) { 1506 data = opipe->tail.td; 1507 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 1508 if (tail == NULL) { 1509 xfer->status = USBD_NOMEM; 1510 return; 1511 } 1512 tail->xfer = NULL; 1513 1514 data->td.td_flags = HTOO32( 1515 OHCI_TD_IN | OHCI_TD_NOCC | 1516 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 1517 if (xfer->flags & USBD_SHORT_XFER_OK) 1518 data->td.td_flags |= HTOO32(OHCI_TD_R); 1519 data->td.td_cbp = HTOO32(DMAADDR(&xfer->dmabuf, 0)); 1520 data->nexttd = tail; 1521 data->td.td_nexttd = HTOO32(tail->physaddr); 1522 data->td.td_be = HTOO32(O32TOH(data->td.td_cbp) + 1523 xfer->length - 1); 1524 data->len = xfer->length; 1525 data->xfer = xfer; 1526 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1527 usb_syncmem(&data->dma, data->offs, sizeof(data->td), 1528 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1529 xfer->hcpriv = data; 1530 xfer->actlen = 0; 1531 1532 sed->ed.ed_tailp = HTOO32(tail->physaddr); 1533 usb_syncmem(&sed->dma, 1534 sed->offs + offsetof(ohci_ed_t, ed_tailp), 1535 sizeof(sed->ed.ed_tailp), 1536 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1537 opipe->tail.td = tail; 1538 } 1539 } 1540 1541 void 1542 ohci_device_bulk_done(usbd_xfer_handle xfer) 1543 { 1544 int isread = 1545 (UE_GET_DIR(xfer->pipe->endpoint->edesc->bEndpointAddress) == UE_DIR_IN); 1546 1547 DPRINTFN(10,("ohci_device_bulk_done: xfer=%p, actlen=%d\n", 1548 xfer, xfer->actlen)); 1549 usb_syncmem(&xfer->dmabuf, 0, xfer->length, 1550 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1551 } 1552 1553 void 1554 ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer) 1555 { 1556 usbd_pipe_handle pipe; 1557 u_char *p; 1558 int i, m; 1559 int hstatus; 1560 1561 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1562 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n", 1563 sc, xfer, hstatus)); 1564 1565 if (xfer == NULL) { 1566 /* Just ignore the change. */ 1567 return; 1568 } 1569 1570 pipe = xfer->pipe; 1571 1572 p = KERNADDR(&xfer->dmabuf, 0); 1573 m = min(sc->sc_noport, xfer->length * 8 - 1); 1574 memset(p, 0, xfer->length); 1575 for (i = 1; i <= m; i++) { 1576 /* Pick out CHANGE bits from the status reg. */ 1577 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1578 p[i/8] |= 1 << (i%8); 1579 } 1580 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 1581 xfer->actlen = xfer->length; 1582 xfer->status = USBD_NORMAL_COMPLETION; 1583 1584 usb_transfer_complete(xfer); 1585 } 1586 1587 void 1588 ohci_root_intr_done(usbd_xfer_handle xfer) 1589 { 1590 } 1591 1592 void 1593 ohci_root_ctrl_done(usbd_xfer_handle xfer) 1594 { 1595 } 1596 1597 /* 1598 * Wait here until controller claims to have an interrupt. 1599 * Then call ohci_intr and return. Use timeout to avoid waiting 1600 * too long. 1601 */ 1602 void 1603 ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer) 1604 { 1605 int timo; 1606 u_int32_t intrs; 1607 1608 xfer->status = USBD_IN_PROGRESS; 1609 for (timo = xfer->timeout; timo >= 0; timo--) { 1610 usb_delay_ms(&sc->sc_bus, 1); 1611 if (sc->sc_dying) 1612 break; 1613 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 1614 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs)); 1615 #ifdef OHCI_DEBUG 1616 if (ohcidebug > 15) 1617 ohci_dumpregs(sc); 1618 #endif 1619 if (intrs) { 1620 ohci_intr1(sc); 1621 if (xfer->status != USBD_IN_PROGRESS) 1622 return; 1623 } 1624 } 1625 1626 /* Timeout */ 1627 DPRINTF(("ohci_waitintr: timeout\n")); 1628 xfer->status = USBD_TIMEOUT; 1629 usb_transfer_complete(xfer); 1630 /* XXX should free TD */ 1631 } 1632 1633 void 1634 ohci_poll(struct usbd_bus *bus) 1635 { 1636 ohci_softc_t *sc = bus->hci_private; 1637 #ifdef OHCI_DEBUG 1638 static int last; 1639 int new; 1640 new = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1641 if (new != last) { 1642 DPRINTFN(10,("ohci_poll: intrs=0x%04x\n", new)); 1643 last = new; 1644 } 1645 #endif 1646 1647 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) 1648 ohci_intr1(sc); 1649 } 1650 1651 usbd_status 1652 ohci_device_request(usbd_xfer_handle xfer) 1653 { 1654 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1655 usb_device_request_t *req = &xfer->request; 1656 usbd_device_handle dev = opipe->pipe.device; 1657 ohci_softc_t *sc = dev->bus->hci_private; 1658 int addr = dev->address; 1659 ohci_soft_td_t *setup, *stat, *next, *tail; 1660 ohci_soft_ed_t *sed; 1661 int isread; 1662 int len; 1663 usbd_status err; 1664 int s; 1665 1666 isread = req->bmRequestType & UT_READ; 1667 len = UGETW(req->wLength); 1668 1669 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 1670 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 1671 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1672 UGETW(req->wIndex), len, addr, 1673 opipe->pipe.endpoint->edesc->bEndpointAddress)); 1674 1675 setup = opipe->tail.td; 1676 stat = ohci_alloc_std(sc); 1677 if (stat == NULL) { 1678 err = USBD_NOMEM; 1679 goto bad1; 1680 } 1681 tail = ohci_alloc_std(sc); 1682 if (tail == NULL) { 1683 err = USBD_NOMEM; 1684 goto bad2; 1685 } 1686 tail->xfer = NULL; 1687 1688 sed = opipe->sed; 1689 opipe->u.ctl.length = len; 1690 1691 /* Update device address and length since they may have changed 1692 during the setup of the control pipe in usbd_new_device(). */ 1693 /* XXX This only needs to be done once, but it's too early in open. */ 1694 /* XXXX Should not touch ED here! */ 1695 1696 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 1697 sizeof(sed->ed.ed_flags), 1698 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1699 sed->ed.ed_flags = HTOO32( 1700 (O32TOH(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) | 1701 OHCI_ED_SET_FA(addr) | 1702 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize))); 1703 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 1704 sizeof(sed->ed.ed_flags), 1705 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1706 1707 next = stat; 1708 1709 /* Set up data transaction */ 1710 if (len != 0) { 1711 ohci_soft_td_t *std = stat; 1712 1713 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 1714 std, &stat); 1715 stat = stat->nexttd; /* point at free TD */ 1716 if (err) 1717 goto bad3; 1718 /* Start toggle at 1 and then use the carried toggle. */ 1719 std->td.td_flags &= HTOO32(~OHCI_TD_TOGGLE_MASK); 1720 std->td.td_flags |= HTOO32(OHCI_TD_TOGGLE_1); 1721 usb_syncmem(&std->dma, 1722 std->offs + offsetof(ohci_td_t, td_flags), 1723 sizeof(std->td.td_flags), 1724 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1725 } 1726 1727 memcpy(KERNADDR(&opipe->u.ctl.reqdma, 0), req, sizeof *req); 1728 usb_syncmem(&opipe->u.ctl.reqdma, 0, sizeof *req, BUS_DMASYNC_PREWRITE); 1729 1730 setup->td.td_flags = HTOO32(OHCI_TD_SETUP | OHCI_TD_NOCC | 1731 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1732 setup->td.td_cbp = HTOO32(DMAADDR(&opipe->u.ctl.reqdma, 0)); 1733 setup->nexttd = next; 1734 setup->td.td_nexttd = HTOO32(next->physaddr); 1735 setup->td.td_be = HTOO32(O32TOH(setup->td.td_cbp) + sizeof *req - 1); 1736 setup->len = 0; 1737 setup->xfer = xfer; 1738 setup->flags = 0; 1739 xfer->hcpriv = setup; 1740 usb_syncmem(&setup->dma, setup->offs, sizeof(setup->td), 1741 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1742 1743 stat->td.td_flags = HTOO32( 1744 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | 1745 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1746 stat->td.td_cbp = 0; 1747 stat->nexttd = tail; 1748 stat->td.td_nexttd = HTOO32(tail->physaddr); 1749 stat->td.td_be = 0; 1750 stat->flags = OHCI_CALL_DONE; 1751 stat->len = 0; 1752 stat->xfer = xfer; 1753 usb_syncmem(&stat->dma, stat->offs, sizeof(stat->td), 1754 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1755 1756 #ifdef OHCI_DEBUG 1757 if (ohcidebug > 5) { 1758 DPRINTF(("ohci_device_request:\n")); 1759 ohci_dump_ed(sc, sed); 1760 ohci_dump_tds(sc, setup); 1761 } 1762 #endif 1763 1764 /* Insert ED in schedule */ 1765 s = splusb(); 1766 sed->ed.ed_tailp = HTOO32(tail->physaddr); 1767 usb_syncmem(&sed->dma, 1768 sed->offs + offsetof(ohci_ed_t, ed_tailp), 1769 sizeof(sed->ed.ed_tailp), 1770 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1771 opipe->tail.td = tail; 1772 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1773 if (xfer->timeout && !sc->sc_bus.use_polling) { 1774 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 1775 ohci_timeout, xfer); 1776 } 1777 splx(s); 1778 1779 #ifdef OHCI_DEBUG 1780 if (ohcidebug > 20) { 1781 delay(10000); 1782 DPRINTF(("ohci_device_request: status=%x\n", 1783 OREAD4(sc, OHCI_COMMAND_STATUS))); 1784 ohci_dumpregs(sc); 1785 printf("ctrl head:\n"); 1786 ohci_dump_ed(sc, sc->sc_ctrl_head); 1787 printf("sed:\n"); 1788 ohci_dump_ed(sc, sed); 1789 ohci_dump_tds(sc, setup); 1790 } 1791 #endif 1792 1793 return (USBD_NORMAL_COMPLETION); 1794 1795 bad3: 1796 ohci_free_std(sc, tail); 1797 bad2: 1798 ohci_free_std(sc, stat); 1799 bad1: 1800 return (err); 1801 } 1802 1803 /* 1804 * Add an ED to the schedule. Called at splusb(). 1805 */ 1806 void 1807 ohci_add_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1808 { 1809 DPRINTFN(8,("ohci_add_ed: sed=%p head=%p\n", sed, head)); 1810 1811 SPLUSBCHECK; 1812 usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted), 1813 sizeof(head->ed.ed_nexted), 1814 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1815 sed->next = head->next; 1816 sed->ed.ed_nexted = head->ed.ed_nexted; 1817 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted), 1818 sizeof(sed->ed.ed_nexted), 1819 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1820 head->next = sed; 1821 head->ed.ed_nexted = HTOO32(sed->physaddr); 1822 usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted), 1823 sizeof(head->ed.ed_nexted), 1824 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1825 } 1826 1827 /* 1828 * Remove an ED from the schedule. Called at splusb(). 1829 */ 1830 void 1831 ohci_rem_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1832 { 1833 ohci_soft_ed_t *p; 1834 1835 SPLUSBCHECK; 1836 1837 /* XXX */ 1838 for (p = head; p != NULL && p->next != sed; p = p->next) 1839 ; 1840 if (p == NULL) 1841 panic("ohci_rem_ed: ED not found"); 1842 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted), 1843 sizeof(sed->ed.ed_nexted), 1844 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1845 p->next = sed->next; 1846 p->ed.ed_nexted = sed->ed.ed_nexted; 1847 usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted), 1848 sizeof(p->ed.ed_nexted), 1849 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1850 } 1851 1852 /* 1853 * When a transfer is completed the TD is added to the done queue by 1854 * the host controller. This queue is the processed by software. 1855 * Unfortunately the queue contains the physical address of the TD 1856 * and we have no simple way to translate this back to a kernel address. 1857 * To make the translation possible (and fast) we use a hash table of 1858 * TDs currently in the schedule. The physical address is used as the 1859 * hash value. 1860 */ 1861 1862 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1863 /* Called at splusb() */ 1864 void 1865 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1866 { 1867 int h = HASH(std->physaddr); 1868 1869 SPLUSBCHECK; 1870 1871 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1872 } 1873 1874 /* Called at splusb() */ 1875 void 1876 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1877 { 1878 SPLUSBCHECK; 1879 1880 LIST_REMOVE(std, hnext); 1881 } 1882 1883 ohci_soft_td_t * 1884 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a) 1885 { 1886 int h = HASH(a); 1887 ohci_soft_td_t *std; 1888 1889 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1890 std != NULL; 1891 std = LIST_NEXT(std, hnext)) 1892 if (std->physaddr == a) 1893 return (std); 1894 return (NULL); 1895 } 1896 1897 /* Called at splusb() */ 1898 void 1899 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1900 { 1901 int h = HASH(sitd->physaddr); 1902 1903 SPLUSBCHECK; 1904 1905 DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n", 1906 sitd, (u_long)sitd->physaddr)); 1907 1908 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext); 1909 } 1910 1911 /* Called at splusb() */ 1912 void 1913 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1914 { 1915 SPLUSBCHECK; 1916 1917 DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n", 1918 sitd, (u_long)sitd->physaddr)); 1919 1920 LIST_REMOVE(sitd, hnext); 1921 } 1922 1923 ohci_soft_itd_t * 1924 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a) 1925 { 1926 int h = HASH(a); 1927 ohci_soft_itd_t *sitd; 1928 1929 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]); 1930 sitd != NULL; 1931 sitd = LIST_NEXT(sitd, hnext)) 1932 if (sitd->physaddr == a) 1933 return (sitd); 1934 return (NULL); 1935 } 1936 1937 void 1938 ohci_timeout(void *addr) 1939 { 1940 struct ohci_xfer *oxfer = addr; 1941 struct ohci_pipe *opipe = (struct ohci_pipe *)oxfer->xfer.pipe; 1942 ohci_softc_t *sc = opipe->pipe.device->bus->hci_private; 1943 1944 DPRINTF(("ohci_timeout: oxfer=%p\n", oxfer)); 1945 1946 if (sc->sc_dying) { 1947 ohci_abort_xfer(&oxfer->xfer, USBD_TIMEOUT); 1948 return; 1949 } 1950 1951 /* Execute the abort in a process context. */ 1952 usb_init_task(&oxfer->abort_task, ohci_timeout_task, addr); 1953 usb_add_task(oxfer->xfer.pipe->device, &oxfer->abort_task, 1954 USB_TASKQ_HC); 1955 } 1956 1957 void 1958 ohci_timeout_task(void *addr) 1959 { 1960 usbd_xfer_handle xfer = addr; 1961 int s; 1962 1963 DPRINTF(("ohci_timeout_task: xfer=%p\n", xfer)); 1964 1965 s = splusb(); 1966 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1967 splx(s); 1968 } 1969 1970 #ifdef OHCI_DEBUG 1971 void 1972 ohci_dump_tds(ohci_softc_t *sc, ohci_soft_td_t *std) 1973 { 1974 for (; std; std = std->nexttd) 1975 ohci_dump_td(sc, std); 1976 } 1977 1978 void 1979 ohci_dump_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1980 { 1981 char sbuf[128]; 1982 1983 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 1984 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1985 snprintb(sbuf, sizeof(sbuf), 1986 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 1987 (u_int32_t)O32TOH(std->td.td_flags)); 1988 printf("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx " 1989 "nexttd=0x%08lx be=0x%08lx\n", 1990 std, (u_long)std->physaddr, sbuf, 1991 OHCI_TD_GET_DI(O32TOH(std->td.td_flags)), 1992 OHCI_TD_GET_EC(O32TOH(std->td.td_flags)), 1993 OHCI_TD_GET_CC(O32TOH(std->td.td_flags)), 1994 (u_long)O32TOH(std->td.td_cbp), 1995 (u_long)O32TOH(std->td.td_nexttd), 1996 (u_long)O32TOH(std->td.td_be)); 1997 } 1998 1999 void 2000 ohci_dump_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 2001 { 2002 int i; 2003 2004 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 2005 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2006 printf("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n" 2007 "bp0=0x%08lx next=0x%08lx be=0x%08lx\n", 2008 sitd, (u_long)sitd->physaddr, 2009 OHCI_ITD_GET_SF(O32TOH(sitd->itd.itd_flags)), 2010 OHCI_ITD_GET_DI(O32TOH(sitd->itd.itd_flags)), 2011 OHCI_ITD_GET_FC(O32TOH(sitd->itd.itd_flags)), 2012 OHCI_ITD_GET_CC(O32TOH(sitd->itd.itd_flags)), 2013 (u_long)O32TOH(sitd->itd.itd_bp0), 2014 (u_long)O32TOH(sitd->itd.itd_nextitd), 2015 (u_long)O32TOH(sitd->itd.itd_be)); 2016 for (i = 0; i < OHCI_ITD_NOFFSET; i++) 2017 printf("offs[%d]=0x%04x ", i, 2018 (u_int)O16TOH(sitd->itd.itd_offset[i])); 2019 printf("\n"); 2020 } 2021 2022 void 2023 ohci_dump_itds(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 2024 { 2025 for (; sitd; sitd = sitd->nextitd) 2026 ohci_dump_itd(sc, sitd); 2027 } 2028 2029 void 2030 ohci_dump_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 2031 { 2032 char sbuf[128], sbuf2[128]; 2033 2034 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 2035 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2036 snprintb(sbuf, sizeof(sbuf), 2037 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO", 2038 (u_int32_t)O32TOH(sed->ed.ed_flags)); 2039 snprintb(sbuf2, sizeof(sbuf2), "\20\1HALT\2CARRY", 2040 (u_int32_t)O32TOH(sed->ed.ed_headp)); 2041 2042 printf("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d flags=%s\ntailp=0x%08lx " 2043 "headflags=%s headp=0x%08lx nexted=0x%08lx\n", 2044 sed, (u_long)sed->physaddr, 2045 OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)), 2046 OHCI_ED_GET_EN(O32TOH(sed->ed.ed_flags)), 2047 OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)), sbuf, 2048 (u_long)O32TOH(sed->ed.ed_tailp), sbuf2, 2049 (u_long)O32TOH(sed->ed.ed_headp), 2050 (u_long)O32TOH(sed->ed.ed_nexted)); 2051 } 2052 #endif 2053 2054 usbd_status 2055 ohci_open(usbd_pipe_handle pipe) 2056 { 2057 usbd_device_handle dev = pipe->device; 2058 ohci_softc_t *sc = dev->bus->hci_private; 2059 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 2060 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2061 u_int8_t addr = dev->address; 2062 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 2063 ohci_soft_ed_t *sed; 2064 ohci_soft_td_t *std; 2065 ohci_soft_itd_t *sitd; 2066 ohci_physaddr_t tdphys; 2067 u_int32_t fmt; 2068 usbd_status err; 2069 int s; 2070 int ival; 2071 2072 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 2073 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 2074 2075 if (sc->sc_dying) 2076 return (USBD_IOERROR); 2077 2078 std = NULL; 2079 sed = NULL; 2080 2081 if (addr == sc->sc_addr) { 2082 switch (ed->bEndpointAddress) { 2083 case USB_CONTROL_ENDPOINT: 2084 pipe->methods = &ohci_root_ctrl_methods; 2085 break; 2086 case UE_DIR_IN | OHCI_INTR_ENDPT: 2087 pipe->methods = &ohci_root_intr_methods; 2088 break; 2089 default: 2090 return (USBD_INVAL); 2091 } 2092 } else { 2093 sed = ohci_alloc_sed(sc); 2094 if (sed == NULL) 2095 goto bad0; 2096 opipe->sed = sed; 2097 if (xfertype == UE_ISOCHRONOUS) { 2098 sitd = ohci_alloc_sitd(sc); 2099 if (sitd == NULL) 2100 goto bad1; 2101 opipe->tail.itd = sitd; 2102 tdphys = sitd->physaddr; 2103 fmt = OHCI_ED_FORMAT_ISO; 2104 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 2105 fmt |= OHCI_ED_DIR_IN; 2106 else 2107 fmt |= OHCI_ED_DIR_OUT; 2108 } else { 2109 std = ohci_alloc_std(sc); 2110 if (std == NULL) 2111 goto bad1; 2112 opipe->tail.td = std; 2113 tdphys = std->physaddr; 2114 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD; 2115 } 2116 sed->ed.ed_flags = HTOO32( 2117 OHCI_ED_SET_FA(addr) | 2118 OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) | 2119 (dev->speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) | 2120 fmt | 2121 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 2122 sed->ed.ed_headp = sed->ed.ed_tailp = HTOO32(tdphys); 2123 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 2124 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2125 2126 switch (xfertype) { 2127 case UE_CONTROL: 2128 pipe->methods = &ohci_device_ctrl_methods; 2129 err = usb_allocmem(&sc->sc_bus, 2130 sizeof(usb_device_request_t), 2131 0, &opipe->u.ctl.reqdma); 2132 if (err) 2133 goto bad; 2134 s = splusb(); 2135 ohci_add_ed(sc, sed, sc->sc_ctrl_head); 2136 splx(s); 2137 break; 2138 case UE_INTERRUPT: 2139 pipe->methods = &ohci_device_intr_methods; 2140 ival = pipe->interval; 2141 if (ival == USBD_DEFAULT_INTERVAL) 2142 ival = ed->bInterval; 2143 return (ohci_device_setintr(sc, opipe, ival)); 2144 case UE_ISOCHRONOUS: 2145 pipe->methods = &ohci_device_isoc_methods; 2146 return (ohci_setup_isoc(pipe)); 2147 case UE_BULK: 2148 pipe->methods = &ohci_device_bulk_methods; 2149 s = splusb(); 2150 ohci_add_ed(sc, sed, sc->sc_bulk_head); 2151 splx(s); 2152 break; 2153 } 2154 } 2155 return (USBD_NORMAL_COMPLETION); 2156 2157 bad: 2158 if (std != NULL) 2159 ohci_free_std(sc, std); 2160 bad1: 2161 if (sed != NULL) 2162 ohci_free_sed(sc, sed); 2163 bad0: 2164 return (USBD_NOMEM); 2165 2166 } 2167 2168 /* 2169 * Close a reqular pipe. 2170 * Assumes that there are no pending transactions. 2171 */ 2172 void 2173 ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head) 2174 { 2175 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2176 ohci_softc_t *sc = pipe->device->bus->hci_private; 2177 ohci_soft_ed_t *sed = opipe->sed; 2178 int s; 2179 2180 s = splusb(); 2181 #ifdef DIAGNOSTIC 2182 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 2183 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2184 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) { 2185 ohci_soft_td_t *std; 2186 std = ohci_hash_find_td(sc, O32TOH(sed->ed.ed_headp)); 2187 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 2188 "tl=0x%x pipe=%p, std=%p\n", sed, 2189 (int)O32TOH(sed->ed.ed_headp), 2190 (int)O32TOH(sed->ed.ed_tailp), 2191 pipe, std); 2192 #ifdef USB_DEBUG 2193 usbd_dump_pipe(&opipe->pipe); 2194 #endif 2195 #ifdef OHCI_DEBUG 2196 ohci_dump_ed(sc, sed); 2197 if (std) 2198 ohci_dump_td(sc, std); 2199 #endif 2200 usb_delay_ms(&sc->sc_bus, 2); 2201 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2202 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) 2203 printf("ohci_close_pipe: pipe still not empty\n"); 2204 } 2205 #endif 2206 ohci_rem_ed(sed, head); 2207 /* Make sure the host controller is not touching this ED */ 2208 usb_delay_ms(&sc->sc_bus, 1); 2209 splx(s); 2210 ohci_free_sed(sc, opipe->sed); 2211 } 2212 2213 /* 2214 * Abort a device request. 2215 * If this routine is called at splusb() it guarantees that the request 2216 * will be removed from the hardware scheduling and that the callback 2217 * for it will be called with USBD_CANCELLED status. 2218 * It's impossible to guarantee that the requested transfer will not 2219 * have happened since the hardware runs concurrently. 2220 * If the transaction has already happened we rely on the ordinary 2221 * interrupt processing to process it. 2222 */ 2223 void 2224 ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2225 { 2226 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2227 ohci_softc_t *sc = opipe->pipe.device->bus->hci_private; 2228 ohci_soft_ed_t *sed = opipe->sed; 2229 ohci_soft_td_t *p, *n; 2230 ohci_physaddr_t headp; 2231 int s, hit; 2232 int wake; 2233 2234 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p sed=%p\n", xfer, opipe,sed)); 2235 2236 if (sc->sc_dying) { 2237 /* If we're dying, just do the software part. */ 2238 s = splusb(); 2239 xfer->status = status; /* make software ignore it */ 2240 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 2241 usb_transfer_complete(xfer); 2242 splx(s); 2243 return; 2244 } 2245 2246 if (xfer->device->bus->intr_context || !curproc) 2247 panic("ohci_abort_xfer: not in process context"); 2248 2249 /* 2250 * If an abort is already in progress then just wait for it to 2251 * complete and return. 2252 */ 2253 if (xfer->hcflags & UXFER_ABORTING) { 2254 DPRINTFN(2, ("ohci_abort_xfer: already aborting\n")); 2255 #ifdef DIAGNOSTIC 2256 if (status == USBD_TIMEOUT) 2257 printf("0hci_abort_xfer: TIMEOUT while aborting\n"); 2258 #endif 2259 /* Override the status which might be USBD_TIMEOUT. */ 2260 xfer->status = status; 2261 DPRINTFN(2, ("ohci_abort_xfer: waiting for abort to finish\n")); 2262 xfer->hcflags |= UXFER_ABORTWAIT; 2263 while (xfer->hcflags & UXFER_ABORTING) 2264 tsleep(&xfer->hcflags, PZERO, "ohciaw", 0); 2265 return; 2266 } 2267 xfer->hcflags |= UXFER_ABORTING; 2268 2269 /* 2270 * Step 1: Make interrupt routine and hardware ignore xfer. 2271 */ 2272 s = splusb(); 2273 xfer->status = status; /* make software ignore it */ 2274 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 2275 splx(s); 2276 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed)); 2277 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2278 sizeof(sed->ed.ed_flags), 2279 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2280 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */ 2281 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2282 sizeof(sed->ed.ed_flags), 2283 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2284 2285 /* 2286 * Step 2: Wait until we know hardware has finished any possible 2287 * use of the xfer. Also make sure the soft interrupt routine 2288 * has run. 2289 */ 2290 usb_delay_ms(opipe->pipe.device->bus, 20); /* Hardware finishes in 1ms */ 2291 s = splusb(); 2292 #ifdef USB_USE_SOFTINTR 2293 sc->sc_softwake = 1; 2294 #endif /* USB_USE_SOFTINTR */ 2295 usb_schedsoftintr(&sc->sc_bus); 2296 #ifdef USB_USE_SOFTINTR 2297 tsleep(&sc->sc_softwake, PZERO, "ohciab", 0); 2298 #endif /* USB_USE_SOFTINTR */ 2299 splx(s); 2300 2301 /* 2302 * Step 3: Remove any vestiges of the xfer from the hardware. 2303 * The complication here is that the hardware may have executed 2304 * beyond the xfer we're trying to abort. So as we're scanning 2305 * the TDs of this xfer we check if the hardware points to 2306 * any of them. 2307 */ 2308 s = splusb(); /* XXX why? */ 2309 p = xfer->hcpriv; 2310 #ifdef DIAGNOSTIC 2311 if (p == NULL) { 2312 xfer->hcflags &= ~UXFER_ABORTING; /* XXX */ 2313 splx(s); 2314 printf("ohci_abort_xfer: hcpriv is NULL\n"); 2315 return; 2316 } 2317 #endif 2318 #ifdef OHCI_DEBUG 2319 if (ohcidebug > 1) { 2320 DPRINTF(("ohci_abort_xfer: sed=\n")); 2321 ohci_dump_ed(sc, sed); 2322 ohci_dump_tds(sc, p); 2323 } 2324 #endif 2325 headp = O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK; 2326 hit = 0; 2327 for (; p->xfer == xfer; p = n) { 2328 hit |= headp == p->physaddr; 2329 n = p->nexttd; 2330 ohci_free_std(sc, p); 2331 } 2332 /* Zap headp register if hardware pointed inside the xfer. */ 2333 if (hit) { 2334 DPRINTFN(1,("ohci_abort_xfer: set hd=0x%08x, tl=0x%08x\n", 2335 (int)p->physaddr, (int)O32TOH(sed->ed.ed_tailp))); 2336 sed->ed.ed_headp = HTOO32(p->physaddr); /* unlink TDs */ 2337 usb_syncmem(&sed->dma, 2338 sed->offs + offsetof(ohci_ed_t, ed_headp), 2339 sizeof(sed->ed.ed_headp), 2340 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2341 } else { 2342 DPRINTFN(1,("ohci_abort_xfer: no hit\n")); 2343 } 2344 2345 /* 2346 * Step 4: Turn on hardware again. 2347 */ 2348 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2349 sizeof(sed->ed.ed_flags), 2350 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2351 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */ 2352 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2353 sizeof(sed->ed.ed_flags), 2354 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2355 2356 /* 2357 * Step 5: Execute callback. 2358 */ 2359 wake = xfer->hcflags & UXFER_ABORTWAIT; 2360 xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT); 2361 usb_transfer_complete(xfer); 2362 if (wake) 2363 wakeup(&xfer->hcflags); 2364 2365 splx(s); 2366 } 2367 2368 /* 2369 * Data structures and routines to emulate the root hub. 2370 */ 2371 Static usb_device_descriptor_t ohci_devd = { 2372 USB_DEVICE_DESCRIPTOR_SIZE, 2373 UDESC_DEVICE, /* type */ 2374 {0x00, 0x01}, /* USB version */ 2375 UDCLASS_HUB, /* class */ 2376 UDSUBCLASS_HUB, /* subclass */ 2377 UDPROTO_FSHUB, /* protocol */ 2378 64, /* max packet */ 2379 {0},{0},{0x00,0x01}, /* device id */ 2380 1,2,0, /* string indicies */ 2381 1 /* # of configurations */ 2382 }; 2383 2384 Static const usb_config_descriptor_t ohci_confd = { 2385 USB_CONFIG_DESCRIPTOR_SIZE, 2386 UDESC_CONFIG, 2387 {USB_CONFIG_DESCRIPTOR_SIZE + 2388 USB_INTERFACE_DESCRIPTOR_SIZE + 2389 USB_ENDPOINT_DESCRIPTOR_SIZE}, 2390 1, 2391 1, 2392 0, 2393 UC_ATTR_MBO | UC_SELF_POWERED, 2394 0 /* max power */ 2395 }; 2396 2397 Static const usb_interface_descriptor_t ohci_ifcd = { 2398 USB_INTERFACE_DESCRIPTOR_SIZE, 2399 UDESC_INTERFACE, 2400 0, 2401 0, 2402 1, 2403 UICLASS_HUB, 2404 UISUBCLASS_HUB, 2405 UIPROTO_FSHUB, 2406 0 2407 }; 2408 2409 Static const usb_endpoint_descriptor_t ohci_endpd = { 2410 .bLength = USB_ENDPOINT_DESCRIPTOR_SIZE, 2411 .bDescriptorType = UDESC_ENDPOINT, 2412 .bEndpointAddress = UE_DIR_IN | OHCI_INTR_ENDPT, 2413 .bmAttributes = UE_INTERRUPT, 2414 .wMaxPacketSize = {8, 0}, /* max packet */ 2415 .bInterval = 255, 2416 }; 2417 2418 Static const usb_hub_descriptor_t ohci_hubd = { 2419 .bDescLength = USB_HUB_DESCRIPTOR_SIZE, 2420 .bDescriptorType = UDESC_HUB, 2421 }; 2422 2423 /* 2424 * Simulate a hardware hub by handling all the necessary requests. 2425 */ 2426 Static usbd_status 2427 ohci_root_ctrl_transfer(usbd_xfer_handle xfer) 2428 { 2429 usbd_status err; 2430 2431 /* Insert last in queue. */ 2432 err = usb_insert_transfer(xfer); 2433 if (err) 2434 return (err); 2435 2436 /* Pipe isn't running, start first */ 2437 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2438 } 2439 2440 Static usbd_status 2441 ohci_root_ctrl_start(usbd_xfer_handle xfer) 2442 { 2443 ohci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2444 usb_device_request_t *req; 2445 void *buf = NULL; 2446 int port, i; 2447 int s, len, value, index, l, totlen = 0; 2448 usb_port_status_t ps; 2449 usb_hub_descriptor_t hubd; 2450 usbd_status err; 2451 u_int32_t v; 2452 2453 if (sc->sc_dying) 2454 return (USBD_IOERROR); 2455 2456 #ifdef DIAGNOSTIC 2457 if (!(xfer->rqflags & URQ_REQUEST)) 2458 /* XXX panic */ 2459 return (USBD_INVAL); 2460 #endif 2461 req = &xfer->request; 2462 2463 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 2464 req->bmRequestType, req->bRequest)); 2465 2466 len = UGETW(req->wLength); 2467 value = UGETW(req->wValue); 2468 index = UGETW(req->wIndex); 2469 2470 if (len != 0) 2471 buf = KERNADDR(&xfer->dmabuf, 0); 2472 2473 #define C(x,y) ((x) | ((y) << 8)) 2474 switch(C(req->bRequest, req->bmRequestType)) { 2475 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 2476 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 2477 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 2478 /* 2479 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 2480 * for the integrated root hub. 2481 */ 2482 break; 2483 case C(UR_GET_CONFIG, UT_READ_DEVICE): 2484 if (len > 0) { 2485 *(u_int8_t *)buf = sc->sc_conf; 2486 totlen = 1; 2487 } 2488 break; 2489 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2490 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 2491 if (len == 0) 2492 break; 2493 switch(value >> 8) { 2494 case UDESC_DEVICE: 2495 if ((value & 0xff) != 0) { 2496 err = USBD_IOERROR; 2497 goto ret; 2498 } 2499 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 2500 USETW(ohci_devd.idVendor, sc->sc_id_vendor); 2501 memcpy(buf, &ohci_devd, l); 2502 break; 2503 case UDESC_CONFIG: 2504 if ((value & 0xff) != 0) { 2505 err = USBD_IOERROR; 2506 goto ret; 2507 } 2508 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 2509 memcpy(buf, &ohci_confd, l); 2510 buf = (char *)buf + l; 2511 len -= l; 2512 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 2513 totlen += l; 2514 memcpy(buf, &ohci_ifcd, l); 2515 buf = (char *)buf + l; 2516 len -= l; 2517 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 2518 totlen += l; 2519 memcpy(buf, &ohci_endpd, l); 2520 break; 2521 case UDESC_STRING: 2522 #define sd ((usb_string_descriptor_t *)buf) 2523 switch (value & 0xff) { 2524 case 0: /* Language table */ 2525 totlen = usb_makelangtbl(sd, len); 2526 break; 2527 case 1: /* Vendor */ 2528 totlen = usb_makestrdesc(sd, len, 2529 sc->sc_vendor); 2530 break; 2531 case 2: /* Product */ 2532 totlen = usb_makestrdesc(sd, len, 2533 "OHCI root hub"); 2534 break; 2535 } 2536 #undef sd 2537 break; 2538 default: 2539 err = USBD_IOERROR; 2540 goto ret; 2541 } 2542 break; 2543 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 2544 if (len > 0) { 2545 *(u_int8_t *)buf = 0; 2546 totlen = 1; 2547 } 2548 break; 2549 case C(UR_GET_STATUS, UT_READ_DEVICE): 2550 if (len > 1) { 2551 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 2552 totlen = 2; 2553 } 2554 break; 2555 case C(UR_GET_STATUS, UT_READ_INTERFACE): 2556 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 2557 if (len > 1) { 2558 USETW(((usb_status_t *)buf)->wStatus, 0); 2559 totlen = 2; 2560 } 2561 break; 2562 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 2563 if (value >= USB_MAX_DEVICES) { 2564 err = USBD_IOERROR; 2565 goto ret; 2566 } 2567 sc->sc_addr = value; 2568 break; 2569 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 2570 if (value != 0 && value != 1) { 2571 err = USBD_IOERROR; 2572 goto ret; 2573 } 2574 sc->sc_conf = value; 2575 break; 2576 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 2577 break; 2578 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 2579 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 2580 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 2581 err = USBD_IOERROR; 2582 goto ret; 2583 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 2584 break; 2585 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 2586 break; 2587 /* Hub requests */ 2588 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2589 break; 2590 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2591 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 2592 "port=%d feature=%d\n", 2593 index, value)); 2594 if (index < 1 || index > sc->sc_noport) { 2595 err = USBD_IOERROR; 2596 goto ret; 2597 } 2598 port = OHCI_RH_PORT_STATUS(index); 2599 switch(value) { 2600 case UHF_PORT_ENABLE: 2601 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2602 break; 2603 case UHF_PORT_SUSPEND: 2604 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2605 break; 2606 case UHF_PORT_POWER: 2607 /* Yes, writing to the LOW_SPEED bit clears power. */ 2608 OWRITE4(sc, port, UPS_LOW_SPEED); 2609 break; 2610 case UHF_C_PORT_CONNECTION: 2611 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2612 break; 2613 case UHF_C_PORT_ENABLE: 2614 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2615 break; 2616 case UHF_C_PORT_SUSPEND: 2617 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2618 break; 2619 case UHF_C_PORT_OVER_CURRENT: 2620 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2621 break; 2622 case UHF_C_PORT_RESET: 2623 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2624 break; 2625 default: 2626 err = USBD_IOERROR; 2627 goto ret; 2628 } 2629 switch(value) { 2630 case UHF_C_PORT_CONNECTION: 2631 case UHF_C_PORT_ENABLE: 2632 case UHF_C_PORT_SUSPEND: 2633 case UHF_C_PORT_OVER_CURRENT: 2634 case UHF_C_PORT_RESET: 2635 /* Enable RHSC interrupt if condition is cleared. */ 2636 if ((OREAD4(sc, port) >> 16) == 0) 2637 ohci_rhsc_enable(sc); 2638 break; 2639 default: 2640 break; 2641 } 2642 break; 2643 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2644 if (len == 0) 2645 break; 2646 if ((value & 0xff) != 0) { 2647 err = USBD_IOERROR; 2648 goto ret; 2649 } 2650 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2651 hubd = ohci_hubd; 2652 hubd.bNbrPorts = sc->sc_noport; 2653 USETW(hubd.wHubCharacteristics, 2654 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2655 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2656 /* XXX overcurrent */ 2657 ); 2658 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2659 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2660 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2661 hubd.DeviceRemovable[i++] = (u_int8_t)v; 2662 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2663 l = min(len, hubd.bDescLength); 2664 totlen = l; 2665 memcpy(buf, &hubd, l); 2666 break; 2667 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2668 if (len != 4) { 2669 err = USBD_IOERROR; 2670 goto ret; 2671 } 2672 memset(buf, 0, len); /* ? XXX */ 2673 totlen = len; 2674 break; 2675 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2676 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 2677 index)); 2678 if (index < 1 || index > sc->sc_noport) { 2679 err = USBD_IOERROR; 2680 goto ret; 2681 } 2682 if (len != 4) { 2683 err = USBD_IOERROR; 2684 goto ret; 2685 } 2686 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2687 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 2688 v)); 2689 USETW(ps.wPortStatus, v); 2690 USETW(ps.wPortChange, v >> 16); 2691 l = min(len, sizeof ps); 2692 memcpy(buf, &ps, l); 2693 totlen = l; 2694 break; 2695 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2696 err = USBD_IOERROR; 2697 goto ret; 2698 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2699 break; 2700 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2701 if (index < 1 || index > sc->sc_noport) { 2702 err = USBD_IOERROR; 2703 goto ret; 2704 } 2705 port = OHCI_RH_PORT_STATUS(index); 2706 switch(value) { 2707 case UHF_PORT_ENABLE: 2708 OWRITE4(sc, port, UPS_PORT_ENABLED); 2709 break; 2710 case UHF_PORT_SUSPEND: 2711 OWRITE4(sc, port, UPS_SUSPEND); 2712 break; 2713 case UHF_PORT_RESET: 2714 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 2715 index)); 2716 OWRITE4(sc, port, UPS_RESET); 2717 for (i = 0; i < 5; i++) { 2718 usb_delay_ms(&sc->sc_bus, 2719 USB_PORT_ROOT_RESET_DELAY); 2720 if (sc->sc_dying) { 2721 err = USBD_IOERROR; 2722 goto ret; 2723 } 2724 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2725 break; 2726 } 2727 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 2728 index, OREAD4(sc, port))); 2729 break; 2730 case UHF_PORT_POWER: 2731 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 2732 "%d\n", index)); 2733 OWRITE4(sc, port, UPS_PORT_POWER); 2734 break; 2735 default: 2736 err = USBD_IOERROR; 2737 goto ret; 2738 } 2739 break; 2740 default: 2741 err = USBD_IOERROR; 2742 goto ret; 2743 } 2744 xfer->actlen = totlen; 2745 err = USBD_NORMAL_COMPLETION; 2746 ret: 2747 xfer->status = err; 2748 s = splusb(); 2749 usb_transfer_complete(xfer); 2750 splx(s); 2751 return (USBD_IN_PROGRESS); 2752 } 2753 2754 /* Abort a root control request. */ 2755 Static void 2756 ohci_root_ctrl_abort(usbd_xfer_handle xfer) 2757 { 2758 /* Nothing to do, all transfers are synchronous. */ 2759 } 2760 2761 /* Close the root pipe. */ 2762 Static void 2763 ohci_root_ctrl_close(usbd_pipe_handle pipe) 2764 { 2765 DPRINTF(("ohci_root_ctrl_close\n")); 2766 /* Nothing to do. */ 2767 } 2768 2769 Static usbd_status 2770 ohci_root_intr_transfer(usbd_xfer_handle xfer) 2771 { 2772 usbd_status err; 2773 2774 /* Insert last in queue. */ 2775 err = usb_insert_transfer(xfer); 2776 if (err) 2777 return (err); 2778 2779 /* Pipe isn't running, start first */ 2780 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2781 } 2782 2783 Static usbd_status 2784 ohci_root_intr_start(usbd_xfer_handle xfer) 2785 { 2786 usbd_pipe_handle pipe = xfer->pipe; 2787 ohci_softc_t *sc = pipe->device->bus->hci_private; 2788 2789 if (sc->sc_dying) 2790 return (USBD_IOERROR); 2791 2792 sc->sc_intrxfer = xfer; 2793 2794 return (USBD_IN_PROGRESS); 2795 } 2796 2797 /* Abort a root interrupt request. */ 2798 Static void 2799 ohci_root_intr_abort(usbd_xfer_handle xfer) 2800 { 2801 int s; 2802 2803 if (xfer->pipe->intrxfer == xfer) { 2804 DPRINTF(("ohci_root_intr_abort: remove\n")); 2805 xfer->pipe->intrxfer = NULL; 2806 } 2807 xfer->status = USBD_CANCELLED; 2808 s = splusb(); 2809 usb_transfer_complete(xfer); 2810 splx(s); 2811 } 2812 2813 /* Close the root pipe. */ 2814 Static void 2815 ohci_root_intr_close(usbd_pipe_handle pipe) 2816 { 2817 ohci_softc_t *sc = pipe->device->bus->hci_private; 2818 2819 DPRINTF(("ohci_root_intr_close\n")); 2820 2821 sc->sc_intrxfer = NULL; 2822 } 2823 2824 /************************/ 2825 2826 Static usbd_status 2827 ohci_device_ctrl_transfer(usbd_xfer_handle xfer) 2828 { 2829 usbd_status err; 2830 2831 /* Insert last in queue. */ 2832 err = usb_insert_transfer(xfer); 2833 if (err) 2834 return (err); 2835 2836 /* Pipe isn't running, start first */ 2837 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2838 } 2839 2840 Static usbd_status 2841 ohci_device_ctrl_start(usbd_xfer_handle xfer) 2842 { 2843 ohci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2844 usbd_status err; 2845 2846 if (sc->sc_dying) 2847 return (USBD_IOERROR); 2848 2849 #ifdef DIAGNOSTIC 2850 if (!(xfer->rqflags & URQ_REQUEST)) { 2851 /* XXX panic */ 2852 printf("ohci_device_ctrl_transfer: not a request\n"); 2853 return (USBD_INVAL); 2854 } 2855 #endif 2856 2857 err = ohci_device_request(xfer); 2858 if (err) 2859 return (err); 2860 2861 if (sc->sc_bus.use_polling) 2862 ohci_waitintr(sc, xfer); 2863 return (USBD_IN_PROGRESS); 2864 } 2865 2866 /* Abort a device control request. */ 2867 Static void 2868 ohci_device_ctrl_abort(usbd_xfer_handle xfer) 2869 { 2870 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer)); 2871 ohci_abort_xfer(xfer, USBD_CANCELLED); 2872 } 2873 2874 /* Close a device control pipe. */ 2875 Static void 2876 ohci_device_ctrl_close(usbd_pipe_handle pipe) 2877 { 2878 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2879 ohci_softc_t *sc = pipe->device->bus->hci_private; 2880 2881 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe)); 2882 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2883 ohci_free_std(sc, opipe->tail.td); 2884 } 2885 2886 /************************/ 2887 2888 Static void 2889 ohci_device_clear_toggle(usbd_pipe_handle pipe) 2890 { 2891 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2892 ohci_softc_t *sc = pipe->device->bus->hci_private; 2893 2894 opipe->sed->ed.ed_headp &= HTOO32(~OHCI_TOGGLECARRY); 2895 } 2896 2897 Static void 2898 ohci_noop(usbd_pipe_handle pipe) 2899 { 2900 } 2901 2902 Static usbd_status 2903 ohci_device_bulk_transfer(usbd_xfer_handle xfer) 2904 { 2905 usbd_status err; 2906 2907 /* Insert last in queue. */ 2908 err = usb_insert_transfer(xfer); 2909 if (err) 2910 return (err); 2911 2912 /* Pipe isn't running, start first */ 2913 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2914 } 2915 2916 Static usbd_status 2917 ohci_device_bulk_start(usbd_xfer_handle xfer) 2918 { 2919 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2920 usbd_device_handle dev = opipe->pipe.device; 2921 ohci_softc_t *sc = dev->bus->hci_private; 2922 int addr = dev->address; 2923 ohci_soft_td_t *data, *tail, *tdp; 2924 ohci_soft_ed_t *sed; 2925 int s, len, isread, endpt; 2926 usbd_status err; 2927 2928 if (sc->sc_dying) 2929 return (USBD_IOERROR); 2930 2931 #ifdef DIAGNOSTIC 2932 if (xfer->rqflags & URQ_REQUEST) { 2933 /* XXX panic */ 2934 printf("ohci_device_bulk_start: a request\n"); 2935 return (USBD_INVAL); 2936 } 2937 #endif 2938 2939 len = xfer->length; 2940 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 2941 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2942 sed = opipe->sed; 2943 2944 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d " 2945 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags, 2946 endpt)); 2947 2948 opipe->u.bulk.isread = isread; 2949 opipe->u.bulk.length = len; 2950 2951 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 2952 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2953 /* Update device address */ 2954 sed->ed.ed_flags = HTOO32( 2955 (O32TOH(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) | 2956 OHCI_ED_SET_FA(addr)); 2957 2958 /* Allocate a chain of new TDs (including a new tail). */ 2959 data = opipe->tail.td; 2960 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 2961 data, &tail); 2962 /* We want interrupt at the end of the transfer. */ 2963 tail->td.td_flags &= HTOO32(~OHCI_TD_INTR_MASK); 2964 tail->td.td_flags |= HTOO32(OHCI_TD_SET_DI(1)); 2965 tail->flags |= OHCI_CALL_DONE; 2966 tail = tail->nexttd; /* point at sentinel */ 2967 usb_syncmem(&tail->dma, tail->offs + offsetof(ohci_td_t, td_flags), 2968 sizeof(tail->td.td_flags), 2969 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2970 if (err) 2971 return (err); 2972 2973 tail->xfer = NULL; 2974 xfer->hcpriv = data; 2975 2976 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x " 2977 "td_cbp=0x%08x td_be=0x%08x\n", 2978 (int)O32TOH(sed->ed.ed_flags), 2979 (int)O32TOH(data->td.td_flags), 2980 (int)O32TOH(data->td.td_cbp), 2981 (int)O32TOH(data->td.td_be))); 2982 2983 #ifdef OHCI_DEBUG 2984 if (ohcidebug > 5) { 2985 ohci_dump_ed(sc, sed); 2986 ohci_dump_tds(sc, data); 2987 } 2988 #endif 2989 2990 /* Insert ED in schedule */ 2991 s = splusb(); 2992 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 2993 tdp->xfer = xfer; 2994 } 2995 sed->ed.ed_tailp = HTOO32(tail->physaddr); 2996 opipe->tail.td = tail; 2997 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 2998 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 2999 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3000 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 3001 if (xfer->timeout && !sc->sc_bus.use_polling) { 3002 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 3003 ohci_timeout, xfer); 3004 } 3005 3006 #if 0 3007 /* This goes wrong if we are too slow. */ 3008 if (ohcidebug > 10) { 3009 delay(10000); 3010 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 3011 OREAD4(sc, OHCI_COMMAND_STATUS))); 3012 ohci_dump_ed(sc, sed); 3013 ohci_dump_tds(sc, data); 3014 } 3015 #endif 3016 3017 splx(s); 3018 3019 return (USBD_IN_PROGRESS); 3020 } 3021 3022 Static void 3023 ohci_device_bulk_abort(usbd_xfer_handle xfer) 3024 { 3025 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer)); 3026 ohci_abort_xfer(xfer, USBD_CANCELLED); 3027 } 3028 3029 /* 3030 * Close a device bulk pipe. 3031 */ 3032 Static void 3033 ohci_device_bulk_close(usbd_pipe_handle pipe) 3034 { 3035 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3036 ohci_softc_t *sc = pipe->device->bus->hci_private; 3037 3038 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe)); 3039 ohci_close_pipe(pipe, sc->sc_bulk_head); 3040 ohci_free_std(sc, opipe->tail.td); 3041 } 3042 3043 /************************/ 3044 3045 Static usbd_status 3046 ohci_device_intr_transfer(usbd_xfer_handle xfer) 3047 { 3048 usbd_status err; 3049 3050 /* Insert last in queue. */ 3051 err = usb_insert_transfer(xfer); 3052 if (err) 3053 return (err); 3054 3055 /* Pipe isn't running, start first */ 3056 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 3057 } 3058 3059 Static usbd_status 3060 ohci_device_intr_start(usbd_xfer_handle xfer) 3061 { 3062 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3063 usbd_device_handle dev = opipe->pipe.device; 3064 ohci_softc_t *sc = dev->bus->hci_private; 3065 ohci_soft_ed_t *sed = opipe->sed; 3066 ohci_soft_td_t *data, *tail; 3067 int s, len, isread, endpt; 3068 3069 if (sc->sc_dying) 3070 return (USBD_IOERROR); 3071 3072 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d " 3073 "flags=%d priv=%p\n", 3074 xfer, xfer->length, xfer->flags, xfer->priv)); 3075 3076 #ifdef DIAGNOSTIC 3077 if (xfer->rqflags & URQ_REQUEST) 3078 panic("ohci_device_intr_transfer: a request"); 3079 #endif 3080 3081 len = xfer->length; 3082 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 3083 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3084 3085 data = opipe->tail.td; 3086 tail = ohci_alloc_std(sc); 3087 if (tail == NULL) 3088 return (USBD_NOMEM); 3089 tail->xfer = NULL; 3090 3091 data->td.td_flags = HTOO32( 3092 isread ? OHCI_TD_IN : OHCI_TD_OUT | 3093 OHCI_TD_NOCC | 3094 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 3095 if (xfer->flags & USBD_SHORT_XFER_OK) 3096 data->td.td_flags |= HTOO32(OHCI_TD_R); 3097 data->td.td_cbp = HTOO32(DMAADDR(&xfer->dmabuf, 0)); 3098 data->nexttd = tail; 3099 data->td.td_nexttd = HTOO32(tail->physaddr); 3100 data->td.td_be = HTOO32(O32TOH(data->td.td_cbp) + len - 1); 3101 data->len = len; 3102 data->xfer = xfer; 3103 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 3104 usb_syncmem(&data->dma, data->offs, sizeof(data->td), 3105 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3106 xfer->hcpriv = data; 3107 3108 #ifdef OHCI_DEBUG 3109 if (ohcidebug > 5) { 3110 DPRINTF(("ohci_device_intr_transfer:\n")); 3111 ohci_dump_ed(sc, sed); 3112 ohci_dump_tds(sc, data); 3113 } 3114 #endif 3115 3116 /* Insert ED in schedule */ 3117 s = splusb(); 3118 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3119 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3120 sed->ed.ed_tailp = HTOO32(tail->physaddr); 3121 opipe->tail.td = tail; 3122 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3123 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3124 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3125 3126 #if 0 3127 /* 3128 * This goes horribly wrong, printing thousands of descriptors, 3129 * because false references are followed due to the fact that the 3130 * TD is gone. 3131 */ 3132 if (ohcidebug > 5) { 3133 usb_delay_ms(&sc->sc_bus, 5); 3134 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 3135 OREAD4(sc, OHCI_COMMAND_STATUS))); 3136 ohci_dump_ed(sc, sed); 3137 ohci_dump_tds(sc, data); 3138 } 3139 #endif 3140 splx(s); 3141 3142 return (USBD_IN_PROGRESS); 3143 } 3144 3145 /* Abort a device control request. */ 3146 Static void 3147 ohci_device_intr_abort(usbd_xfer_handle xfer) 3148 { 3149 if (xfer->pipe->intrxfer == xfer) { 3150 DPRINTF(("ohci_device_intr_abort: remove\n")); 3151 xfer->pipe->intrxfer = NULL; 3152 } 3153 ohci_abort_xfer(xfer, USBD_CANCELLED); 3154 } 3155 3156 /* Close a device interrupt pipe. */ 3157 Static void 3158 ohci_device_intr_close(usbd_pipe_handle pipe) 3159 { 3160 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3161 ohci_softc_t *sc = pipe->device->bus->hci_private; 3162 int nslots = opipe->u.intr.nslots; 3163 int pos = opipe->u.intr.pos; 3164 int j; 3165 ohci_soft_ed_t *p, *sed = opipe->sed; 3166 int s; 3167 3168 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 3169 pipe, nslots, pos)); 3170 s = splusb(); 3171 usb_syncmem(&sed->dma, sed->offs, 3172 sizeof(sed->ed), BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3173 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 3174 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3175 sizeof(sed->ed.ed_flags), 3176 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3177 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 3178 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) 3179 usb_delay_ms(&sc->sc_bus, 2); 3180 3181 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 3182 continue; 3183 #ifdef DIAGNOSTIC 3184 if (p == NULL) 3185 panic("ohci_device_intr_close: ED not found"); 3186 #endif 3187 p->next = sed->next; 3188 p->ed.ed_nexted = sed->ed.ed_nexted; 3189 usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted), 3190 sizeof(p->ed.ed_nexted), 3191 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3192 splx(s); 3193 3194 for (j = 0; j < nslots; j++) 3195 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 3196 3197 ohci_free_std(sc, opipe->tail.td); 3198 ohci_free_sed(sc, opipe->sed); 3199 } 3200 3201 Static usbd_status 3202 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival) 3203 { 3204 int i, j, s, best; 3205 u_int npoll, slow, shigh, nslots; 3206 u_int bestbw, bw; 3207 ohci_soft_ed_t *hsed, *sed = opipe->sed; 3208 3209 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 3210 if (ival == 0) { 3211 printf("ohci_setintr: 0 interval\n"); 3212 return (USBD_INVAL); 3213 } 3214 3215 npoll = OHCI_NO_INTRS; 3216 while (npoll > ival) 3217 npoll /= 2; 3218 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 3219 3220 /* 3221 * We now know which level in the tree the ED must go into. 3222 * Figure out which slot has most bandwidth left over. 3223 * Slots to examine: 3224 * npoll 3225 * 1 0 3226 * 2 1 2 3227 * 4 3 4 5 6 3228 * 8 7 8 9 10 11 12 13 14 3229 * N (N-1) .. (N-1+N-1) 3230 */ 3231 slow = npoll-1; 3232 shigh = slow + npoll; 3233 nslots = OHCI_NO_INTRS / npoll; 3234 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 3235 bw = 0; 3236 for (j = 0; j < nslots; j++) 3237 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 3238 if (bw < bestbw) { 3239 best = i; 3240 bestbw = bw; 3241 } 3242 } 3243 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 3244 best, slow, shigh, bestbw)); 3245 3246 s = splusb(); 3247 hsed = sc->sc_eds[best]; 3248 sed->next = hsed->next; 3249 usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags), 3250 sizeof(hsed->ed.ed_flags), 3251 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3252 sed->ed.ed_nexted = hsed->ed.ed_nexted; 3253 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3254 sizeof(sed->ed.ed_flags), 3255 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3256 hsed->next = sed; 3257 hsed->ed.ed_nexted = HTOO32(sed->physaddr); 3258 usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags), 3259 sizeof(hsed->ed.ed_flags), 3260 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3261 splx(s); 3262 3263 for (j = 0; j < nslots; j++) 3264 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 3265 opipe->u.intr.nslots = nslots; 3266 opipe->u.intr.pos = best; 3267 3268 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 3269 return (USBD_NORMAL_COMPLETION); 3270 } 3271 3272 /***********************/ 3273 3274 usbd_status 3275 ohci_device_isoc_transfer(usbd_xfer_handle xfer) 3276 { 3277 usbd_status err; 3278 3279 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer)); 3280 3281 /* Put it on our queue, */ 3282 err = usb_insert_transfer(xfer); 3283 3284 /* bail out on error, */ 3285 if (err && err != USBD_IN_PROGRESS) 3286 return (err); 3287 3288 /* XXX should check inuse here */ 3289 3290 /* insert into schedule, */ 3291 ohci_device_isoc_enter(xfer); 3292 3293 /* and start if the pipe wasn't running */ 3294 if (!err) 3295 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 3296 3297 return (err); 3298 } 3299 3300 void 3301 ohci_device_isoc_enter(usbd_xfer_handle xfer) 3302 { 3303 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3304 usbd_device_handle dev = opipe->pipe.device; 3305 ohci_softc_t *sc = dev->bus->hci_private; 3306 ohci_soft_ed_t *sed = opipe->sed; 3307 struct iso *iso = &opipe->u.iso; 3308 ohci_soft_itd_t *sitd, *nsitd; 3309 ohci_physaddr_t buf, offs, noffs, bp0; 3310 int i, ncur, nframes; 3311 int s; 3312 3313 DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p " 3314 "nframes=%d\n", 3315 iso->inuse, iso->next, xfer, xfer->nframes)); 3316 3317 if (sc->sc_dying) 3318 return; 3319 3320 if (iso->next == -1) { 3321 /* Not in use yet, schedule it a few frames ahead. */ 3322 iso->next = O32TOH(sc->sc_hcca->hcca_frame_number) + 5; 3323 DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n", 3324 iso->next)); 3325 } 3326 3327 sitd = opipe->tail.itd; 3328 buf = DMAADDR(&xfer->dmabuf, 0); 3329 bp0 = OHCI_PAGE(buf); 3330 offs = OHCI_PAGE_OFFSET(buf); 3331 nframes = xfer->nframes; 3332 xfer->hcpriv = sitd; 3333 for (i = ncur = 0; i < nframes; i++, ncur++) { 3334 noffs = offs + xfer->frlengths[i]; 3335 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ 3336 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */ 3337 3338 /* Allocate next ITD */ 3339 nsitd = ohci_alloc_sitd(sc); 3340 if (nsitd == NULL) { 3341 /* XXX what now? */ 3342 printf("%s: isoc TD alloc failed\n", 3343 device_xname(sc->sc_dev)); 3344 return; 3345 } 3346 3347 /* Fill current ITD */ 3348 sitd->itd.itd_flags = HTOO32( 3349 OHCI_ITD_NOCC | 3350 OHCI_ITD_SET_SF(iso->next) | 3351 OHCI_ITD_SET_DI(6) | /* delay intr a little */ 3352 OHCI_ITD_SET_FC(ncur)); 3353 sitd->itd.itd_bp0 = HTOO32(bp0); 3354 sitd->nextitd = nsitd; 3355 sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr); 3356 sitd->itd.itd_be = HTOO32(bp0 + offs - 1); 3357 sitd->xfer = xfer; 3358 sitd->flags = 0; 3359 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 3360 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3361 3362 sitd = nsitd; 3363 iso->next = iso->next + ncur; 3364 bp0 = OHCI_PAGE(buf + offs); 3365 ncur = 0; 3366 } 3367 sitd->itd.itd_offset[ncur] = HTOO16(OHCI_ITD_MK_OFFS(offs)); 3368 offs = noffs; 3369 } 3370 nsitd = ohci_alloc_sitd(sc); 3371 if (nsitd == NULL) { 3372 /* XXX what now? */ 3373 printf("%s: isoc TD alloc failed\n", 3374 device_xname(sc->sc_dev)); 3375 return; 3376 } 3377 /* Fixup last used ITD */ 3378 sitd->itd.itd_flags = HTOO32( 3379 OHCI_ITD_NOCC | 3380 OHCI_ITD_SET_SF(iso->next) | 3381 OHCI_ITD_SET_DI(0) | 3382 OHCI_ITD_SET_FC(ncur)); 3383 sitd->itd.itd_bp0 = HTOO32(bp0); 3384 sitd->nextitd = nsitd; 3385 sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr); 3386 sitd->itd.itd_be = HTOO32(bp0 + offs - 1); 3387 sitd->xfer = xfer; 3388 sitd->flags = OHCI_CALL_DONE; 3389 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 3390 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3391 3392 iso->next = iso->next + ncur; 3393 iso->inuse += nframes; 3394 3395 xfer->actlen = offs; /* XXX pretend we did it all */ 3396 3397 xfer->status = USBD_IN_PROGRESS; 3398 3399 #ifdef OHCI_DEBUG 3400 if (ohcidebug > 5) { 3401 DPRINTF(("ohci_device_isoc_enter: frame=%d\n", 3402 O32TOH(sc->sc_hcca->hcca_frame_number))); 3403 ohci_dump_itds(sc, xfer->hcpriv); 3404 ohci_dump_ed(sc, sed); 3405 } 3406 #endif 3407 3408 s = splusb(); 3409 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3410 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3411 sed->ed.ed_tailp = HTOO32(nsitd->physaddr); 3412 opipe->tail.itd = nsitd; 3413 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3414 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3415 sizeof(sed->ed.ed_flags), 3416 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3417 splx(s); 3418 3419 #ifdef OHCI_DEBUG 3420 if (ohcidebug > 5) { 3421 delay(150000); 3422 DPRINTF(("ohci_device_isoc_enter: after frame=%d\n", 3423 O32TOH(sc->sc_hcca->hcca_frame_number))); 3424 ohci_dump_itds(sc, xfer->hcpriv); 3425 ohci_dump_ed(sc, sed); 3426 } 3427 #endif 3428 } 3429 3430 usbd_status 3431 ohci_device_isoc_start(usbd_xfer_handle xfer) 3432 { 3433 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3434 ohci_softc_t *sc = opipe->pipe.device->bus->hci_private; 3435 3436 DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer)); 3437 3438 if (sc->sc_dying) 3439 return (USBD_IOERROR); 3440 3441 #ifdef DIAGNOSTIC 3442 if (xfer->status != USBD_IN_PROGRESS) 3443 printf("ohci_device_isoc_start: not in progress %p\n", xfer); 3444 #endif 3445 3446 /* XXX anything to do? */ 3447 3448 return (USBD_IN_PROGRESS); 3449 } 3450 3451 void 3452 ohci_device_isoc_abort(usbd_xfer_handle xfer) 3453 { 3454 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3455 ohci_softc_t *sc = opipe->pipe.device->bus->hci_private; 3456 ohci_soft_ed_t *sed; 3457 ohci_soft_itd_t *sitd; 3458 int s; 3459 3460 s = splusb(); 3461 3462 DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer)); 3463 3464 /* Transfer is already done. */ 3465 if (xfer->status != USBD_NOT_STARTED && 3466 xfer->status != USBD_IN_PROGRESS) { 3467 splx(s); 3468 printf("ohci_device_isoc_abort: early return\n"); 3469 return; 3470 } 3471 3472 /* Give xfer the requested abort code. */ 3473 xfer->status = USBD_CANCELLED; 3474 3475 sed = opipe->sed; 3476 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3477 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3478 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */ 3479 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3480 sizeof(sed->ed.ed_flags), 3481 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3482 3483 sitd = xfer->hcpriv; 3484 #ifdef DIAGNOSTIC 3485 if (sitd == NULL) { 3486 splx(s); 3487 printf("ohci_device_isoc_abort: hcpriv==0\n"); 3488 return; 3489 } 3490 #endif 3491 for (; sitd->xfer == xfer; sitd = sitd->nextitd) { 3492 #ifdef DIAGNOSTIC 3493 DPRINTFN(1,("abort sets done sitd=%p\n", sitd)); 3494 sitd->isdone = 1; 3495 #endif 3496 } 3497 3498 splx(s); 3499 3500 usb_delay_ms(&sc->sc_bus, OHCI_ITD_NOFFSET); 3501 3502 s = splusb(); 3503 3504 /* Run callback. */ 3505 usb_transfer_complete(xfer); 3506 3507 sed->ed.ed_headp = HTOO32(sitd->physaddr); /* unlink TDs */ 3508 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */ 3509 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3510 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3511 3512 splx(s); 3513 } 3514 3515 void 3516 ohci_device_isoc_done(usbd_xfer_handle xfer) 3517 { 3518 DPRINTFN(1,("ohci_device_isoc_done: xfer=%p\n", xfer)); 3519 } 3520 3521 usbd_status 3522 ohci_setup_isoc(usbd_pipe_handle pipe) 3523 { 3524 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3525 ohci_softc_t *sc = pipe->device->bus->hci_private; 3526 struct iso *iso = &opipe->u.iso; 3527 int s; 3528 3529 iso->next = -1; 3530 iso->inuse = 0; 3531 3532 s = splusb(); 3533 ohci_add_ed(sc, opipe->sed, sc->sc_isoc_head); 3534 splx(s); 3535 3536 return (USBD_NORMAL_COMPLETION); 3537 } 3538 3539 void 3540 ohci_device_isoc_close(usbd_pipe_handle pipe) 3541 { 3542 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3543 ohci_softc_t *sc = pipe->device->bus->hci_private; 3544 3545 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe)); 3546 ohci_close_pipe(pipe, sc->sc_isoc_head); 3547 #ifdef DIAGNOSTIC 3548 opipe->tail.itd->isdone = 1; 3549 #endif 3550 ohci_free_sitd(sc, opipe->tail.itd); 3551 } 3552
Indexes created Fri Oct 03 02:09:57 GMT 2025