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ohci.c revision 1.21
      1 /*	$NetBSD: ohci.c,v 1.21 1999/01/01 15:15:33 augustss Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1998 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Lennart Augustsson (augustss (at) carlstedt.se) at
      9  * Carlstedt Research & Technology.
     10  *
     11  * Redistribution and use in source and binary forms, with or without
     12  * modification, are permitted provided that the following conditions
     13  * are met:
     14  * 1. Redistributions of source code must retain the above copyright
     15  *    notice, this list of conditions and the following disclaimer.
     16  * 2. Redistributions in binary form must reproduce the above copyright
     17  *    notice, this list of conditions and the following disclaimer in the
     18  *    documentation and/or other materials provided with the distribution.
     19  * 3. All advertising materials mentioning features or use of this software
     20  *    must display the following acknowledgement:
     21  *        This product includes software developed by the NetBSD
     22  *        Foundation, Inc. and its contributors.
     23  * 4. Neither the name of The NetBSD Foundation nor the names of its
     24  *    contributors may be used to endorse or promote products derived
     25  *    from this software without specific prior written permission.
     26  *
     27  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     28  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     29  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     30  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     31  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     32  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     33  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     34  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     35  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     36  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     37  * POSSIBILITY OF SUCH DAMAGE.
     38  */
     39 
     40 /*
     41  * USB Open Host Controller driver.
     42  *
     43  * OHCI spec: http://www.intel.com/design/usb/ohci11d.pdf
     44  * USB spec: http://www.teleport.com/cgi-bin/mailmerge.cgi/~usb/cgiform.tpl
     45  */
     46 
     47 #include <sys/param.h>
     48 #include <sys/systm.h>
     49 #include <sys/kernel.h>
     50 #include <sys/malloc.h>
     51 #if defined(__NetBSD__)
     52 #include <sys/device.h>
     53 #elif defined(__FreeBSD__)
     54 #include <sys/module.h>
     55 #include <sys/bus.h>
     56 #endif
     57 #include <sys/proc.h>
     58 #include <sys/queue.h>
     59 #include <sys/select.h>
     60 
     61 #include <machine/bus.h>
     62 #include <machine/endian.h>
     63 
     64 #include <dev/usb/usb.h>
     65 #include <dev/usb/usbdi.h>
     66 #include <dev/usb/usbdivar.h>
     67 #include <dev/usb/usb_quirks.h>
     68 #include <dev/usb/usb_mem.h>
     69 
     70 #include <dev/usb/ohcireg.h>
     71 #include <dev/usb/ohcivar.h>
     72 
     73 #if defined(__FreeBSD__)
     74 #include <machine/clock.h>
     75 #include "dev/usb/queue.addendum.h"
     76 
     77 #define delay(d)                DELAY(d)
     78 
     79 #endif
     80 
     81 /*
     82  * The OHCI controller is little endian, so on big endian machines
     83  * the data strored in memory needs to be swapped.
     84  */
     85 #if BYTE_ORDER == BIG_ENDIAN
     86 #define LE(x) (bswap32(x))
     87 #else
     88 #define LE(x) (x)
     89 #endif
     90 
     91 struct ohci_pipe;
     92 
     93 ohci_soft_ed_t *ohci_alloc_sed __P((ohci_softc_t *));
     94 void		ohci_free_sed __P((ohci_softc_t *, ohci_soft_ed_t *));
     95 
     96 ohci_soft_td_t *ohci_alloc_std __P((ohci_softc_t *));
     97 void		ohci_free_std __P((ohci_softc_t *, ohci_soft_td_t *));
     98 
     99 usbd_status	ohci_open __P((usbd_pipe_handle));
    100 void		ohci_poll __P((struct usbd_bus *));
    101 void		ohci_waitintr __P((ohci_softc_t *, usbd_request_handle));
    102 void		ohci_rhsc __P((ohci_softc_t *, usbd_request_handle));
    103 void		ohci_process_done __P((ohci_softc_t *, ohci_physaddr_t));
    104 void		ohci_ii_done __P((ohci_softc_t *, usbd_request_handle));
    105 void		ohci_ctrl_done __P((ohci_softc_t *, usbd_request_handle));
    106 void		ohci_intr_done __P((ohci_softc_t *, usbd_request_handle));
    107 void		ohci_bulk_done __P((ohci_softc_t *, usbd_request_handle));
    108 
    109 usbd_status	ohci_device_request __P((usbd_request_handle reqh));
    110 void		ohci_add_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *));
    111 void		ohci_rem_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *));
    112 void		ohci_hash_add_td __P((ohci_softc_t *, ohci_soft_td_t *));
    113 void		ohci_hash_rem_td __P((ohci_softc_t *, ohci_soft_td_t *));
    114 ohci_soft_td_t *ohci_hash_find_td __P((ohci_softc_t *, ohci_physaddr_t));
    115 
    116 usbd_status	ohci_root_ctrl_transfer __P((usbd_request_handle));
    117 usbd_status	ohci_root_ctrl_start __P((usbd_request_handle));
    118 void		ohci_root_ctrl_abort __P((usbd_request_handle));
    119 void		ohci_root_ctrl_close __P((usbd_pipe_handle));
    120 
    121 usbd_status	ohci_root_intr_transfer __P((usbd_request_handle));
    122 usbd_status	ohci_root_intr_start __P((usbd_request_handle));
    123 void		ohci_root_intr_abort __P((usbd_request_handle));
    124 void		ohci_root_intr_close __P((usbd_pipe_handle));
    125 
    126 usbd_status	ohci_device_ctrl_transfer __P((usbd_request_handle));
    127 usbd_status	ohci_device_ctrl_start __P((usbd_request_handle));
    128 void		ohci_device_ctrl_abort __P((usbd_request_handle));
    129 void		ohci_device_ctrl_close __P((usbd_pipe_handle));
    130 
    131 usbd_status	ohci_device_bulk_transfer __P((usbd_request_handle));
    132 usbd_status	ohci_device_bulk_start __P((usbd_request_handle));
    133 void		ohci_device_bulk_abort __P((usbd_request_handle));
    134 void		ohci_device_bulk_close __P((usbd_pipe_handle));
    135 
    136 usbd_status	ohci_device_intr_transfer __P((usbd_request_handle));
    137 usbd_status	ohci_device_intr_start __P((usbd_request_handle));
    138 void		ohci_device_intr_abort __P((usbd_request_handle));
    139 void		ohci_device_intr_close __P((usbd_pipe_handle));
    140 usbd_status	ohci_device_setintr __P((ohci_softc_t *sc,
    141 					 struct ohci_pipe *pipe, int ival));
    142 
    143 int		ohci_str __P((usb_string_descriptor_t *, int, char *));
    144 
    145 void		ohci_timeout __P((void *));
    146 void		ohci_rhsc_able __P((ohci_softc_t *, int));
    147 
    148 #ifdef USB_DEBUG
    149 ohci_softc_t   *thesc;
    150 void		ohci_dumpregs __P((ohci_softc_t *));
    151 void		ohci_dump_tds __P((ohci_soft_td_t *));
    152 void		ohci_dump_td __P((ohci_soft_td_t *));
    153 void		ohci_dump_ed __P((ohci_soft_ed_t *));
    154 #endif
    155 
    156 #if defined(__NetBSD__)
    157 #define OWRITE4(sc, r, x) bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x))
    158 #define OREAD4(sc, r) bus_space_read_4((sc)->iot, (sc)->ioh, (r))
    159 #define OREAD2(sc, r) bus_space_read_2((sc)->iot, (sc)->ioh, (r))
    160 #elif defined(__FreeBSD__)
    161 #define OWRITE4(sc, r, x) outl((sc)->sc_iobase + (r), (x))
    162 #define OREAD4(sc, r) inl((sc)->sc_iobase + (r))
    163 #define OREAD2(sc, r) inw((sc)->sc_iobase + (r))
    164 #endif
    165 
    166 /* Reverse the bits in a value 0 .. 31 */
    167 static u_int8_t revbits[OHCI_NO_INTRS] =
    168   { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c,
    169     0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e,
    170     0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d,
    171     0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f };
    172 
    173 struct ohci_pipe {
    174 	struct usbd_pipe pipe;
    175 	ohci_soft_ed_t *sed;
    176 	ohci_soft_td_t *tail;
    177 	/* Info needed for different pipe kinds. */
    178 	union {
    179 		/* Control pipe */
    180 		struct {
    181 			usb_dma_t datadma;
    182 			usb_dma_t reqdma;
    183 			u_int length;
    184 			ohci_soft_td_t *setup, *xfer, *stat;
    185 		} ctl;
    186 		/* Interrupt pipe */
    187 		struct {
    188 			usb_dma_t datadma;
    189 			int nslots;
    190 			int pos;
    191 		} intr;
    192 		/* Bulk pipe */
    193 		struct {
    194 			usb_dma_t datadma;
    195 			u_int length;
    196 		} bulk;
    197 	} u;
    198 };
    199 
    200 #define OHCI_INTR_ENDPT 1
    201 
    202 struct usbd_methods ohci_root_ctrl_methods = {
    203 	ohci_root_ctrl_transfer,
    204 	ohci_root_ctrl_start,
    205 	ohci_root_ctrl_abort,
    206 	ohci_root_ctrl_close,
    207 	0,
    208 };
    209 
    210 struct usbd_methods ohci_root_intr_methods = {
    211 	ohci_root_intr_transfer,
    212 	ohci_root_intr_start,
    213 	ohci_root_intr_abort,
    214 	ohci_root_intr_close,
    215 	0,
    216 };
    217 
    218 struct usbd_methods ohci_device_ctrl_methods = {
    219 	ohci_device_ctrl_transfer,
    220 	ohci_device_ctrl_start,
    221 	ohci_device_ctrl_abort,
    222 	ohci_device_ctrl_close,
    223 	0,
    224 };
    225 
    226 struct usbd_methods ohci_device_intr_methods = {
    227 	ohci_device_intr_transfer,
    228 	ohci_device_intr_start,
    229 	ohci_device_intr_abort,
    230 	ohci_device_intr_close,
    231 };
    232 
    233 struct usbd_methods ohci_device_bulk_methods = {
    234 	ohci_device_bulk_transfer,
    235 	ohci_device_bulk_start,
    236 	ohci_device_bulk_abort,
    237 	ohci_device_bulk_close,
    238 	0,
    239 };
    240 
    241 ohci_soft_ed_t *
    242 ohci_alloc_sed(sc)
    243 	ohci_softc_t *sc;
    244 {
    245 	ohci_soft_ed_t *sed;
    246 	usbd_status r;
    247 	int i, offs;
    248 	usb_dma_t dma;
    249 
    250 	if (!sc->sc_freeeds) {
    251 		DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n"));
    252 		sed = malloc(sizeof(ohci_soft_ed_t) * OHCI_ED_CHUNK,
    253 			     M_USBDEV, M_NOWAIT);
    254 		if (!sed)
    255 			return 0;
    256 		r = usb_allocmem(sc->sc_dmatag, OHCI_ED_SIZE * OHCI_ED_CHUNK,
    257 				 OHCI_ED_ALIGN, &dma);
    258 		if (r != USBD_NORMAL_COMPLETION) {
    259 			free(sed, M_USBDEV);
    260 			return 0;
    261 		}
    262 		for(i = 0; i < OHCI_ED_CHUNK; i++, sed++) {
    263 			offs = i * OHCI_ED_SIZE;
    264 			sed->physaddr = DMAADDR(&dma) + offs;
    265 			sed->ed = (ohci_ed_t *)
    266 					((char *)KERNADDR(&dma) + offs);
    267 			sed->next = sc->sc_freeeds;
    268 			sc->sc_freeeds = sed;
    269 		}
    270 	}
    271 	sed = sc->sc_freeeds;
    272 	sc->sc_freeeds = sed->next;
    273 	memset(sed->ed, 0, OHCI_ED_SIZE);
    274 	sed->next = 0;
    275 	return sed;
    276 }
    277 
    278 void
    279 ohci_free_sed(sc, sed)
    280 	ohci_softc_t *sc;
    281 	ohci_soft_ed_t *sed;
    282 {
    283 	sed->next = sc->sc_freeeds;
    284 	sc->sc_freeeds = sed;
    285 }
    286 
    287 ohci_soft_td_t *
    288 ohci_alloc_std(sc)
    289 	ohci_softc_t *sc;
    290 {
    291 	ohci_soft_td_t *std;
    292 	usbd_status r;
    293 	int i, offs;
    294 	usb_dma_t dma;
    295 
    296 	if (!sc->sc_freetds) {
    297 		DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n"));
    298 		std = malloc(sizeof(ohci_soft_td_t) * OHCI_TD_CHUNK,
    299 			     M_USBDEV, M_NOWAIT);
    300 		if (!std)
    301 			return 0;
    302 		r = usb_allocmem(sc->sc_dmatag, OHCI_TD_SIZE * OHCI_TD_CHUNK,
    303 				 OHCI_TD_ALIGN, &dma);
    304 		if (r != USBD_NORMAL_COMPLETION) {
    305 			free(std, M_USBDEV);
    306 			return 0;
    307 		}
    308 		for(i = 0; i < OHCI_TD_CHUNK; i++, std++) {
    309 			offs = i * OHCI_TD_SIZE;
    310 			std->physaddr = DMAADDR(&dma) + offs;
    311 			std->td = (ohci_td_t *)
    312 					((char *)KERNADDR(&dma) + offs);
    313 			std->nexttd = sc->sc_freetds;
    314 			sc->sc_freetds = std;
    315 		}
    316 	}
    317 	std = sc->sc_freetds;
    318 	sc->sc_freetds = std->nexttd;
    319 	memset(std->td, 0, OHCI_TD_SIZE);
    320 	std->nexttd = 0;
    321 	return (std);
    322 }
    323 
    324 void
    325 ohci_free_std(sc, std)
    326 	ohci_softc_t *sc;
    327 	ohci_soft_td_t *std;
    328 {
    329 	std->nexttd = sc->sc_freetds;
    330 	sc->sc_freetds = std;
    331 }
    332 
    333 usbd_status
    334 ohci_init(sc)
    335 	ohci_softc_t *sc;
    336 {
    337 	ohci_soft_ed_t *sed, *psed;
    338 	usbd_status r;
    339 	int rev;
    340 	int i;
    341 	u_int32_t s, ctl, ival, hcr, fm, per;
    342 
    343 	DPRINTF(("ohci_init: start\n"));
    344 	rev = OREAD4(sc, OHCI_REVISION);
    345 	printf("%s: OHCI version %d.%d%s\n", USBDEVNAME(sc->sc_bus.bdev),
    346 	       OHCI_REV_HI(rev), OHCI_REV_LO(rev),
    347 	       OHCI_REV_LEGACY(rev) ? ", legacy support" : "");
    348 	if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) {
    349 		printf("%s: unsupported OHCI revision\n",
    350 		       USBDEVNAME(sc->sc_bus.bdev));
    351 		return (USBD_INVAL);
    352 	}
    353 
    354 	for (i = 0; i < OHCI_HASH_SIZE; i++)
    355 		LIST_INIT(&sc->sc_hash_tds[i]);
    356 
    357 	/* Allocate the HCCA area. */
    358 	r = usb_allocmem(sc->sc_dmatag, OHCI_HCCA_SIZE,
    359 			 OHCI_HCCA_ALIGN, &sc->sc_hccadma);
    360 	if (r != USBD_NORMAL_COMPLETION)
    361 		return (r);
    362 	sc->sc_hcca = (struct ohci_hcca *)KERNADDR(&sc->sc_hccadma);
    363 	memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE);
    364 
    365 	sc->sc_eintrs = OHCI_NORMAL_INTRS;
    366 
    367 	sc->sc_ctrl_head = ohci_alloc_sed(sc);
    368 	if (!sc->sc_ctrl_head) {
    369 		r = USBD_NOMEM;
    370 		goto bad1;
    371 	}
    372 	sc->sc_ctrl_head->ed->ed_flags |= LE(OHCI_ED_SKIP);
    373 	sc->sc_bulk_head = ohci_alloc_sed(sc);
    374 	if (!sc->sc_bulk_head) {
    375 		r = USBD_NOMEM;
    376 		goto bad2;
    377 	}
    378 	sc->sc_bulk_head->ed->ed_flags |= LE(OHCI_ED_SKIP);
    379 
    380 	/* Allocate all the dummy EDs that make up the interrupt tree. */
    381 	for (i = 0; i < OHCI_NO_EDS; i++) {
    382 		sed = ohci_alloc_sed(sc);
    383 		if (!sed) {
    384 			while (--i >= 0)
    385 				ohci_free_sed(sc, sc->sc_eds[i]);
    386 			r = USBD_NOMEM;
    387 			goto bad3;
    388 		}
    389 		/* All ED fields are set to 0. */
    390 		sc->sc_eds[i] = sed;
    391 		sed->ed->ed_flags |= LE(OHCI_ED_SKIP);
    392 		if (i != 0) {
    393 			psed = sc->sc_eds[(i-1) / 2];
    394 			sed->next = psed;
    395 			sed->ed->ed_nexted = LE(psed->physaddr);
    396 		}
    397 	}
    398 	/*
    399 	 * Fill HCCA interrupt table.  The bit reversal is to get
    400 	 * the tree set up properly to spread the interrupts.
    401 	 */
    402 	for (i = 0; i < OHCI_NO_INTRS; i++)
    403 		sc->sc_hcca->hcca_interrupt_table[revbits[i]] =
    404 			LE(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr);
    405 
    406 	/* Determine in what context we are running. */
    407 	ctl = OREAD4(sc, OHCI_CONTROL);
    408 	if (ctl & OHCI_IR) {
    409 		/* SMM active, request change */
    410 		DPRINTF(("ohci_init: SMM active, request owner change\n"));
    411 		s = OREAD4(sc, OHCI_COMMAND_STATUS);
    412 		OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR);
    413 		for (i = 0; i < 100 && (ctl & OHCI_IR); i++) {
    414 			delay(1000);
    415 			ctl = OREAD4(sc, OHCI_CONTROL);
    416 		}
    417 		if ((ctl & OHCI_IR) == 0) {
    418 			printf("%s: SMM does not respond, resetting\n",
    419 			       USBDEVNAME(sc->sc_bus.bdev));
    420 			OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
    421 			goto reset;
    422 		}
    423 	} else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) {
    424 		/* BIOS started controller. */
    425 		DPRINTF(("ohci_init: BIOS active\n"));
    426 		if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) {
    427 			OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL);
    428 			delay(USB_RESUME_DELAY * 1000);
    429 		}
    430 	} else {
    431 		DPRINTF(("ohci_init: cold started\n"));
    432 	reset:
    433 		/* Controller was cold started. */
    434 		delay(USB_BUS_RESET_DELAY * 1000);
    435 	}
    436 
    437 	/*
    438 	 * This reset should be necessary according to the OHCI spec, but
    439 	 * without it some controller don't start.
    440 	 */
    441 	DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev)));
    442 	OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
    443 	delay(USB_BUS_RESET_DELAY * 1000);
    444 
    445 	/* We now own the host controller and the bus has been reset. */
    446 	ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL));
    447 
    448 	OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */
    449 	/* Nominal time for a reset is 10 us. */
    450 	for (i = 0; i < 10; i++) {
    451 		delay(10);
    452 		hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR;
    453 		if (!hcr)
    454 			break;
    455 	}
    456 	if (hcr) {
    457 		printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev));
    458 		r = USBD_IOERROR;
    459 		goto bad3;
    460 	}
    461 #ifdef USB_DEBUG
    462 	thesc = sc;
    463 	if (ohcidebug > 15)
    464 		ohci_dumpregs(sc);
    465 #endif
    466 
    467 	/* The controller is now in suspend state, we have 2ms to finish. */
    468 
    469 	/* Set up HC registers. */
    470 	OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma));
    471 	OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
    472 	OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
    473 	OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
    474 	OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE);
    475 	ctl = OREAD4(sc, OHCI_CONTROL);
    476 	ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR);
    477 	ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE |
    478 		OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL;
    479 	/* And finally start it! */
    480 	OWRITE4(sc, OHCI_CONTROL, ctl);
    481 
    482 	/*
    483 	 * The controller is now OPERATIONAL.  Set a some final
    484 	 * registers that should be set earlier, but that the
    485 	 * controller ignores when in the SUSPEND state.
    486 	 */
    487 	fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT;
    488 	fm |= OHCI_FSMPS(ival) | ival;
    489 	OWRITE4(sc, OHCI_FM_INTERVAL, fm);
    490 	per = OHCI_PERIODIC(ival); /* 90% periodic */
    491 	OWRITE4(sc, OHCI_PERIODIC_START, per);
    492 
    493 	OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC);	/* Enable port power */
    494 
    495 	sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A));
    496 
    497 #ifdef USB_DEBUG
    498 	if (ohcidebug > 5)
    499 		ohci_dumpregs(sc);
    500 #endif
    501 
    502 	/* Set up the bus struct. */
    503 	sc->sc_bus.open_pipe = ohci_open;
    504 	sc->sc_bus.pipe_size = sizeof(struct ohci_pipe);
    505 	sc->sc_bus.do_poll = ohci_poll;
    506 
    507 	return (USBD_NORMAL_COMPLETION);
    508 
    509  bad3:
    510 	ohci_free_sed(sc, sc->sc_ctrl_head);
    511  bad2:
    512 	ohci_free_sed(sc, sc->sc_bulk_head);
    513  bad1:
    514 	usb_freemem(sc->sc_dmatag, &sc->sc_hccadma);
    515 	return (r);
    516 }
    517 
    518 #ifdef USB_DEBUG
    519 void ohcidump(void);
    520 void ohcidump(void) { ohci_dumpregs(thesc); }
    521 
    522 void
    523 ohci_dumpregs(sc)
    524 	ohci_softc_t *sc;
    525 {
    526 	printf("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n",
    527 	       OREAD4(sc, OHCI_REVISION),
    528 	       OREAD4(sc, OHCI_CONTROL),
    529 	       OREAD4(sc, OHCI_COMMAND_STATUS));
    530 	printf("               intrstat=0x%08x intre=0x%08x intrd=0x%08x\n",
    531 	       OREAD4(sc, OHCI_INTERRUPT_STATUS),
    532 	       OREAD4(sc, OHCI_INTERRUPT_ENABLE),
    533 	       OREAD4(sc, OHCI_INTERRUPT_DISABLE));
    534 	printf("               hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n",
    535 	       OREAD4(sc, OHCI_HCCA),
    536 	       OREAD4(sc, OHCI_PERIOD_CURRENT_ED),
    537 	       OREAD4(sc, OHCI_CONTROL_HEAD_ED));
    538 	printf("               ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n",
    539 	       OREAD4(sc, OHCI_CONTROL_CURRENT_ED),
    540 	       OREAD4(sc, OHCI_BULK_HEAD_ED),
    541 	       OREAD4(sc, OHCI_BULK_CURRENT_ED));
    542 	printf("               done=0x%08x fmival=0x%08x fmrem=0x%08x\n",
    543 	       OREAD4(sc, OHCI_DONE_HEAD),
    544 	       OREAD4(sc, OHCI_FM_INTERVAL),
    545 	       OREAD4(sc, OHCI_FM_REMAINING));
    546 	printf("               fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n",
    547 	       OREAD4(sc, OHCI_FM_NUMBER),
    548 	       OREAD4(sc, OHCI_PERIODIC_START),
    549 	       OREAD4(sc, OHCI_LS_THRESHOLD));
    550 	printf("               desca=0x%08x descb=0x%08x stat=0x%08x\n",
    551 	       OREAD4(sc, OHCI_RH_DESCRIPTOR_A),
    552 	       OREAD4(sc, OHCI_RH_DESCRIPTOR_B),
    553 	       OREAD4(sc, OHCI_RH_STATUS));
    554 	printf("               port1=0x%08x port2=0x%08x\n",
    555 	       OREAD4(sc, OHCI_RH_PORT_STATUS(1)),
    556 	       OREAD4(sc, OHCI_RH_PORT_STATUS(2)));
    557 	printf("         HCCA: frame_number=0x%04x done_head=0x%08x\n",
    558 	       LE(sc->sc_hcca->hcca_frame_number),
    559 	       LE(sc->sc_hcca->hcca_done_head));
    560 }
    561 #endif
    562 
    563 int
    564 ohci_intr(p)
    565 	void *p;
    566 {
    567 	ohci_softc_t *sc = p;
    568 	u_int32_t intrs, eintrs;
    569 	ohci_physaddr_t done;
    570 
    571 	/* In case the interrupt occurs before initialization has completed. */
    572 	if (sc->sc_hcca == NULL) {
    573 #ifdef DIAGNOSTIC
    574 		printf("ohci_intr: sc->sc_hcca == NULL\n");
    575 #endif
    576 		return (0);
    577 	}
    578 
    579 	done = LE(sc->sc_hcca->hcca_done_head);
    580 	if (done != 0) {
    581 		intrs = OHCI_WDH;
    582 		if (done & OHCI_DONE_INTRS)
    583 			intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS);
    584 	} else
    585 		intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS);
    586 	if (!intrs)
    587 		return (0);
    588 	intrs &= ~OHCI_MIE;
    589 	OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */
    590 	eintrs = intrs & sc->sc_eintrs;
    591 	if (!eintrs)
    592 		return (0);
    593 
    594 	sc->sc_intrs++;
    595 	DPRINTFN(7, ("ohci_intr: sc=%p intrs=%x(%x) eintr=%x\n",
    596 		     sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS),
    597 		     (u_int)eintrs));
    598 
    599 	if (eintrs & OHCI_SO) {
    600 		printf("%s: scheduling overrun\n",USBDEVNAME(sc->sc_bus.bdev));
    601 		/* XXX do what */
    602 		intrs &= ~OHCI_SO;
    603 	}
    604 	if (eintrs & OHCI_WDH) {
    605 		ohci_process_done(sc, done &~ OHCI_DONE_INTRS);
    606 		sc->sc_hcca->hcca_done_head = 0;
    607 		intrs &= ~OHCI_WDH;
    608 	}
    609 	if (eintrs & OHCI_RD) {
    610 		/* XXX process resume detect */
    611 	}
    612 	if (eintrs & OHCI_UE) {
    613 		printf("%s: unrecoverable error, controller halted\n",
    614 		       USBDEVNAME(sc->sc_bus.bdev));
    615 		OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
    616 		/* XXX what else */
    617 	}
    618 	if (eintrs & OHCI_RHSC) {
    619 		ohci_rhsc(sc, sc->sc_intrreqh);
    620 		intrs &= ~OHCI_RHSC;
    621 
    622 		/*
    623 		 * Disable RHSC interrupt for now, because it will be
    624 		 * on until the port has been reset.
    625 		 */
    626 		ohci_rhsc_able(sc, 0);
    627 	}
    628 
    629 	/* Block unprocessed interrupts. XXX */
    630 	OWRITE4(sc, OHCI_INTERRUPT_DISABLE, intrs);
    631 	sc->sc_eintrs &= ~intrs;
    632 
    633 	return (1);
    634 }
    635 
    636 void
    637 ohci_rhsc_able(sc, on)
    638 	ohci_softc_t *sc;
    639 	int on;
    640 {
    641 	DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on));
    642 	if (on) {
    643 		sc->sc_eintrs |= OHCI_RHSC;
    644 		OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC);
    645 	} else {
    646 		sc->sc_eintrs &= ~OHCI_RHSC;
    647 		OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC);
    648 	}
    649 }
    650 
    651 #ifdef USB_DEBUG
    652 char *ohci_cc_strs[] = {
    653 	"NO_ERROR",
    654 	"CRC",
    655 	"BIT_STUFFING",
    656 	"DATA_TOGGLE_MISMATCH",
    657 	"STALL",
    658 	"DEVICE_NOT_RESPONDING",
    659 	"PID_CHECK_FAILURE",
    660 	"UNEXPECTED_PID",
    661 	"DATA_OVERRUN",
    662 	"DATA_UNDERRUN",
    663 	"BUFFER_OVERRUN",
    664 	"BUFFER_UNDERRUN",
    665 	"NOT_ACCESSED",
    666 };
    667 #endif
    668 
    669 void
    670 ohci_process_done(sc, done)
    671 	ohci_softc_t *sc;
    672 	ohci_physaddr_t done;
    673 {
    674 	ohci_soft_td_t *std, *sdone;
    675 	usbd_request_handle reqh;
    676 	int len, cc;
    677 
    678 	DPRINTFN(10,("ohci_process_done: done=0x%08lx\n", (u_long)done));
    679 
    680 	/* Reverse the done list. */
    681 	for (sdone = 0; done; done = LE(std->td->td_nexttd)) {
    682 		std = ohci_hash_find_td(sc, done);
    683 		std->dnext = sdone;
    684 		sdone = std;
    685 	}
    686 
    687 #ifdef USB_DEBUG
    688 	if (ohcidebug > 10) {
    689 		printf("ohci_process_done: TD done:\n");
    690 		ohci_dump_tds(sdone);
    691 	}
    692 #endif
    693 
    694 	for (std = sdone; std; std = std->dnext) {
    695 		reqh = std->reqh;
    696 		DPRINTFN(10, ("ohci_process_done: std=%p reqh=%p\n",std,reqh));
    697 		cc = OHCI_TD_GET_CC(LE(std->td->td_flags));
    698 		if (cc == OHCI_CC_NO_ERROR) {
    699 			if (std->td->td_cbp == 0)
    700 				len = std->len;
    701 			else
    702 				len = LE(std->td->td_be) -
    703 				      LE(std->td->td_cbp) + 1;
    704 			/*
    705 			 * Only do a callback on the last stage of a transfer.
    706 			 * Others have hcpriv = 0.
    707 			 */
    708 			if ((reqh->pipe->endpoint->edesc->bmAttributes &
    709 			     UE_XFERTYPE) == UE_CONTROL) {
    710 				/* For a control transfer the length is in
    711 				 * the xfer stage */
    712 				if (reqh->hcpriv == std) {
    713 					reqh->status = USBD_NORMAL_COMPLETION;
    714 					ohci_ii_done(sc, reqh);
    715 				} else
    716 					reqh->actlen = len;
    717 			} else {
    718 				if (reqh->hcpriv == std) {
    719 					reqh->actlen = len;
    720 					reqh->status = USBD_NORMAL_COMPLETION;
    721 					ohci_ii_done(sc, reqh);
    722 				}
    723 			}
    724 		} else {
    725 			ohci_soft_td_t *p, *n;
    726 			struct ohci_pipe *opipe =
    727 				(struct ohci_pipe *)reqh->pipe;
    728 			DPRINTFN(-1,("ohci_process_done: error cc=%d (%s)\n",
    729 			 OHCI_TD_GET_CC(LE(std->td->td_flags)),
    730 			 ohci_cc_strs[OHCI_TD_GET_CC(LE(std->td->td_flags))]));
    731 			/*
    732 			 * Endpoint is halted.  First unlink all the TDs
    733 			 * belonging to the failed transfer, and then restart
    734 			 * the endpoint.
    735 			 */
    736 			for (p = std->nexttd; p->reqh == reqh; p = n) {
    737 				n = p->nexttd;
    738 				ohci_hash_rem_td(sc, p);
    739 				ohci_free_std(sc, p);
    740 			}
    741 			/* clear halt */
    742 			opipe->sed->ed->ed_headp = LE(p->physaddr);
    743 			OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
    744 
    745 			if (cc == OHCI_CC_STALL)
    746 				reqh->status = USBD_STALLED;
    747 			else
    748 				reqh->status = USBD_IOERROR;
    749 			ohci_ii_done(sc, reqh);
    750 		}
    751 		ohci_hash_rem_td(sc, std);
    752 		ohci_free_std(sc, std);
    753 	}
    754 }
    755 
    756 void
    757 ohci_ii_done(sc, reqh)
    758 	ohci_softc_t *sc;
    759 	usbd_request_handle reqh;
    760 {
    761 	switch (reqh->pipe->endpoint->edesc->bmAttributes & UE_XFERTYPE) {
    762 	case UE_CONTROL:
    763 		ohci_ctrl_done(sc, reqh);
    764 		usb_start_next(reqh->pipe);
    765 		break;
    766 	case UE_INTERRUPT:
    767 		ohci_intr_done(sc, reqh);
    768 		break;
    769 	case UE_BULK:
    770 		ohci_bulk_done(sc, reqh);
    771 		usb_start_next(reqh->pipe);
    772 		break;
    773 	case UE_ISOCHRONOUS:
    774 		printf("ohci_process_done: ISO done?\n");
    775 		usb_start_next(reqh->pipe);
    776 		break;
    777 	}
    778 
    779 	/* And finally execute callback. */
    780 	reqh->xfercb(reqh);
    781 }
    782 
    783 void
    784 ohci_ctrl_done(sc, reqh)
    785 	ohci_softc_t *sc;
    786 	usbd_request_handle reqh;
    787 {
    788 	struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
    789 	u_int len = opipe->u.ctl.length;
    790 	usb_dma_t *dma;
    791 
    792 	DPRINTFN(10,("ohci_ctrl_done: reqh=%p\n", reqh));
    793 
    794 	if (!reqh->isreq) {
    795 		panic("ohci_ctrl_done: not a request\n");
    796 		return;
    797 	}
    798 
    799 	if (len != 0) {
    800 		dma = &opipe->u.ctl.datadma;
    801 		if (reqh->request.bmRequestType & UT_READ)
    802 			memcpy(reqh->buffer, KERNADDR(dma), len);
    803 		usb_freemem(sc->sc_dmatag, dma);
    804 	}
    805 	usb_untimeout(ohci_timeout, reqh, reqh->timo_handle);
    806 }
    807 
    808 void
    809 ohci_intr_done(sc, reqh)
    810 	ohci_softc_t *sc;
    811 	usbd_request_handle reqh;
    812 {
    813 	struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
    814 	usb_dma_t *dma;
    815 	ohci_soft_ed_t *sed = opipe->sed;
    816 	ohci_soft_td_t *xfer, *tail;
    817 
    818 
    819 	DPRINTFN(10,("ohci_intr_done: reqh=%p, actlen=%d\n",
    820 		     reqh, reqh->actlen));
    821 
    822 	dma = &opipe->u.intr.datadma;
    823 	memcpy(reqh->buffer, KERNADDR(dma), reqh->actlen);
    824 
    825 	if (reqh->pipe->intrreqh == reqh) {
    826 		xfer = opipe->tail;
    827 		tail = ohci_alloc_std(sc); /* XXX should reuse TD */
    828 		if (!tail) {
    829 			reqh->status = USBD_NOMEM;
    830 			return;
    831 		}
    832 		tail->reqh = 0;
    833 
    834 		xfer->td->td_flags = LE(
    835 			OHCI_TD_IN | OHCI_TD_NOCC |
    836 			OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
    837 		if (reqh->flags & USBD_SHORT_XFER_OK)
    838 			xfer->td->td_flags |= LE(OHCI_TD_R);
    839 		xfer->td->td_cbp = LE(DMAADDR(dma));
    840 		xfer->nexttd = tail;
    841 		xfer->td->td_nexttd = LE(tail->physaddr);
    842 		xfer->td->td_be = LE(LE(xfer->td->td_cbp) + reqh->length - 1);
    843 		xfer->len = reqh->length;
    844 		xfer->reqh = reqh;
    845 
    846 		ohci_hash_add_td(sc, xfer);
    847 		sed->ed->ed_tailp = LE(tail->physaddr);
    848 		opipe->tail = tail;
    849 	} else {
    850 		usb_freemem(sc->sc_dmatag, dma);
    851 		usb_start_next(reqh->pipe);
    852 	}
    853 }
    854 
    855 void
    856 ohci_bulk_done(sc, reqh)
    857 	ohci_softc_t *sc;
    858 	usbd_request_handle reqh;
    859 {
    860 	struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
    861 	usb_dma_t *dma;
    862 
    863 
    864 	DPRINTFN(10,("ohci_bulk_done: reqh=%p, actlen=%d\n",
    865 		     reqh, reqh->actlen));
    866 
    867 	dma = &opipe->u.bulk.datadma;
    868 	if (reqh->request.bmRequestType & UT_READ)
    869 		memcpy(reqh->buffer, KERNADDR(dma), reqh->actlen);
    870 	usb_freemem(sc->sc_dmatag, dma);
    871 	usb_untimeout(ohci_timeout, reqh, reqh->timo_handle);
    872 }
    873 
    874 void
    875 ohci_rhsc(sc, reqh)
    876 	ohci_softc_t *sc;
    877 	usbd_request_handle reqh;
    878 {
    879 	usbd_pipe_handle pipe;
    880 	struct ohci_pipe *opipe;
    881 	u_char *p;
    882 	int i, m;
    883 	int hstatus;
    884 
    885 	hstatus = OREAD4(sc, OHCI_RH_STATUS);
    886 	DPRINTF(("ohci_rhsc: sc=%p reqh=%p hstatus=0x%08x\n",
    887 		 sc, reqh, hstatus));
    888 
    889 	if (reqh == 0) {
    890 		/* Just ignore the change. */
    891 		return;
    892 	}
    893 
    894 	pipe = reqh->pipe;
    895 	opipe = (struct ohci_pipe *)pipe;
    896 
    897 	p = KERNADDR(&opipe->u.intr.datadma);
    898 	m = min(sc->sc_noport, reqh->length * 8 - 1);
    899 	memset(p, 0, reqh->length);
    900 	for (i = 1; i <= m; i++) {
    901 		if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16)
    902 			p[i/8] |= 1 << (i%8);
    903 	}
    904 	DPRINTF(("ohci_rhsc: change=0x%02x\n", *p));
    905 	reqh->actlen = reqh->length;
    906 	reqh->status = USBD_NORMAL_COMPLETION;
    907 	reqh->xfercb(reqh);
    908 
    909 	if (reqh->pipe->intrreqh != reqh) {
    910 		sc->sc_intrreqh = 0;
    911 		usb_freemem(sc->sc_dmatag, &opipe->u.intr.datadma);
    912 		usb_start_next(reqh->pipe);
    913 	}
    914 }
    915 
    916 /*
    917  * Wait here until controller claims to have an interrupt.
    918  * Then call ohci_intr and return.  Use timeout to avoid waiting
    919  * too long.
    920  */
    921 void
    922 ohci_waitintr(sc, reqh)
    923 	ohci_softc_t *sc;
    924 	usbd_request_handle reqh;
    925 {
    926 	int timo = reqh->timeout;
    927 	int usecs;
    928 	u_int32_t intrs;
    929 
    930 	reqh->status = USBD_IN_PROGRESS;
    931 	for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) {
    932 		usb_delay_ms(&sc->sc_bus, 1);
    933 		intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs;
    934 		DPRINTFN(10,("ohci_waitintr: 0x%04x\n", intrs));
    935 #ifdef USB_DEBUG
    936 		if (ohcidebug > 15)
    937 			ohci_dumpregs(sc);
    938 #endif
    939 		if (intrs) {
    940 			ohci_intr(sc);
    941 			if (reqh->status != USBD_IN_PROGRESS)
    942 				return;
    943 		}
    944 	}
    945 
    946 	/* Timeout */
    947 	DPRINTF(("ohci_waitintr: timeout\n"));
    948 	reqh->status = USBD_TIMEOUT;
    949 	ohci_ii_done(sc, reqh);
    950 	/* XXX should free TD */
    951 }
    952 
    953 void
    954 ohci_poll(bus)
    955 	struct usbd_bus *bus;
    956 {
    957 	ohci_softc_t *sc = (ohci_softc_t *)bus;
    958 
    959 	if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs)
    960 		ohci_intr(sc);
    961 }
    962 
    963 usbd_status
    964 ohci_device_request(reqh)
    965 	usbd_request_handle reqh;
    966 {
    967 	struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
    968 	usb_device_request_t *req = &reqh->request;
    969 	usbd_device_handle dev = opipe->pipe.device;
    970 	ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
    971 	int addr = dev->address;
    972 	ohci_soft_td_t *setup, *xfer = 0, *stat, *next, *tail;
    973 	ohci_soft_ed_t *sed;
    974 	usb_dma_t *dmap;
    975 	int isread;
    976 	int len;
    977 	usbd_status r;
    978 	int s;
    979 
    980 	isread = req->bmRequestType & UT_READ;
    981 	len = UGETW(req->wLength);
    982 
    983 	DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, "
    984 		    "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
    985 		    req->bmRequestType, req->bRequest, UGETW(req->wValue),
    986 		    UGETW(req->wIndex), len, addr,
    987 		    opipe->pipe.endpoint->edesc->bEndpointAddress));
    988 
    989 	setup = opipe->tail;
    990 	stat = ohci_alloc_std(sc);
    991 	if (!stat) {
    992 		r = USBD_NOMEM;
    993 		goto bad1;
    994 	}
    995 	tail = ohci_alloc_std(sc);
    996 	if (!tail) {
    997 		r = USBD_NOMEM;
    998 		goto bad2;
    999 	}
   1000 	tail->reqh = 0;
   1001 
   1002 	sed = opipe->sed;
   1003 	dmap = &opipe->u.ctl.datadma;
   1004 	opipe->u.ctl.length = len;
   1005 
   1006 	/* Update device address and length since they may have changed. */
   1007 	/* XXX This only needs to be done once, but it's too early in open. */
   1008 	sed->ed->ed_flags = LE(
   1009 	 (LE(sed->ed->ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) |
   1010 	 OHCI_ED_SET_FA(addr) |
   1011 	 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize)));
   1012 
   1013 	/* Set up data transaction */
   1014 	if (len != 0) {
   1015 		xfer = ohci_alloc_std(sc);
   1016 		if (!xfer) {
   1017 			r = USBD_NOMEM;
   1018 			goto bad3;
   1019 		}
   1020 		r = usb_allocmem(sc->sc_dmatag, len, 0, dmap);
   1021 		if (r != USBD_NORMAL_COMPLETION)
   1022 			goto bad4;
   1023 		xfer->td->td_flags = LE(
   1024 			(isread ? OHCI_TD_IN : OHCI_TD_OUT) | OHCI_TD_NOCC |
   1025 			OHCI_TD_TOGGLE_1 | OHCI_TD_NOINTR |
   1026 			(reqh->flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0));
   1027 		xfer->td->td_cbp = LE(DMAADDR(dmap));
   1028 		xfer->nexttd = stat;
   1029 		xfer->td->td_nexttd = LE(stat->physaddr);
   1030 		xfer->td->td_be = LE(LE(xfer->td->td_cbp) + len - 1);
   1031 		xfer->len = len;
   1032 		xfer->reqh = reqh;
   1033 
   1034 		next = xfer;
   1035 	} else
   1036 		next = stat;
   1037 
   1038 	memcpy(KERNADDR(&opipe->u.ctl.reqdma), req, sizeof *req);
   1039 	if (!isread && len != 0)
   1040 		memcpy(KERNADDR(dmap), reqh->buffer, len);
   1041 
   1042 	setup->td->td_flags = LE(OHCI_TD_SETUP | OHCI_TD_NOCC |
   1043 				 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR);
   1044 	setup->td->td_cbp = LE(DMAADDR(&opipe->u.ctl.reqdma));
   1045 	setup->nexttd = next;
   1046 	setup->td->td_nexttd = LE(next->physaddr);
   1047 	setup->td->td_be = LE(LE(setup->td->td_cbp) + sizeof *req - 1);
   1048 	setup->len = 0;		/* XXX The number of byte we count */
   1049 	setup->reqh = reqh;
   1050 
   1051 	stat->td->td_flags = LE(
   1052 		(isread ? OHCI_TD_OUT : OHCI_TD_IN) | OHCI_TD_NOCC |
   1053 		OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1));
   1054 	stat->td->td_cbp = 0;
   1055 	stat->nexttd = tail;
   1056 	stat->td->td_nexttd = LE(tail->physaddr);
   1057 	stat->td->td_be = 0;
   1058 	stat->len = 0;
   1059 	stat->reqh = reqh;
   1060 
   1061 	reqh->hcpriv = stat;
   1062 
   1063 #if USB_DEBUG
   1064 	if (ohcidebug > 5) {
   1065 		printf("ohci_device_request:\n");
   1066 		ohci_dump_ed(sed);
   1067 		ohci_dump_tds(setup);
   1068 	}
   1069 #endif
   1070 
   1071 	/* Insert ED in schedule */
   1072 	s = splusb();
   1073 	ohci_hash_add_td(sc, setup);
   1074 	if (len != 0)
   1075 		ohci_hash_add_td(sc, xfer);
   1076 	ohci_hash_add_td(sc, stat);
   1077 	sed->ed->ed_tailp = LE(tail->physaddr);
   1078 	opipe->tail = tail;
   1079 	OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
   1080 	if (reqh->timeout && !sc->sc_bus.use_polling) {
   1081                 usb_timeout(ohci_timeout, reqh,
   1082 			    MS_TO_TICKS(reqh->timeout), reqh->timo_handle);
   1083 	}
   1084 	splx(s);
   1085 
   1086 #if USB_DEBUG
   1087 	if (ohcidebug > 5) {
   1088 		delay(5000);
   1089 		printf("ohci_device_request: status=%x\n",
   1090 		       OREAD4(sc, OHCI_COMMAND_STATUS));
   1091 		ohci_dump_ed(sed);
   1092 		ohci_dump_tds(setup);
   1093 	}
   1094 #endif
   1095 
   1096 	return (USBD_NORMAL_COMPLETION);
   1097 
   1098  bad4:
   1099 	ohci_free_std(sc, xfer);
   1100  bad3:
   1101 	ohci_free_std(sc, tail);
   1102  bad2:
   1103 	ohci_free_std(sc, stat);
   1104  bad1:
   1105 	return (r);
   1106 }
   1107 
   1108 /*
   1109  * Add an ED to the schedule.  Called at splusb().
   1110  */
   1111 void
   1112 ohci_add_ed(sed, head)
   1113 	ohci_soft_ed_t *sed;
   1114 	ohci_soft_ed_t *head;
   1115 {
   1116 	sed->next = head->next;
   1117 	sed->ed->ed_nexted = head->ed->ed_nexted;
   1118 	head->next = sed;
   1119 	head->ed->ed_nexted = LE(sed->physaddr);
   1120 }
   1121 
   1122 /*
   1123  * Remove an ED from the schedule.  Called at splusb().
   1124  */
   1125 void
   1126 ohci_rem_ed(sed, head)
   1127 	ohci_soft_ed_t *sed;
   1128 	ohci_soft_ed_t *head;
   1129 {
   1130 	ohci_soft_ed_t *p;
   1131 
   1132 	/* XXX */
   1133 	for (p = head; p && p->next != sed; p = p->next)
   1134 		;
   1135 	if (!p)
   1136 		panic("ohci_rem_ed: ED not found\n");
   1137 	p->next = sed->next;
   1138 	p->ed->ed_nexted = sed->ed->ed_nexted;
   1139 }
   1140 
   1141 /*
   1142  * When a transfer is completed the TD is added to the done queue by
   1143  * the host controller.  This queue is the processed by software.
   1144  * Unfortunately the queue contains the physical address of the TD
   1145  * and we have no simple way to translate this back to a kernel address.
   1146  * To make the translation possible (and fast) we use a hash table of
   1147  * TDs currently in the schedule.  The physical address is used as the
   1148  * hash value.
   1149  */
   1150 
   1151 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE)
   1152 /* Called at splusb() */
   1153 void
   1154 ohci_hash_add_td(sc, std)
   1155 	ohci_softc_t *sc;
   1156 	ohci_soft_td_t *std;
   1157 {
   1158 	int h = HASH(std->physaddr);
   1159 
   1160 	LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext);
   1161 }
   1162 
   1163 /* Called at splusb() */
   1164 void
   1165 ohci_hash_rem_td(sc, std)
   1166 	ohci_softc_t *sc;
   1167 	ohci_soft_td_t *std;
   1168 {
   1169 	LIST_REMOVE(std, hnext);
   1170 }
   1171 
   1172 ohci_soft_td_t *
   1173 ohci_hash_find_td(sc, a)
   1174 	ohci_softc_t *sc;
   1175 	ohci_physaddr_t a;
   1176 {
   1177 	int h = HASH(a);
   1178 	ohci_soft_td_t *std;
   1179 
   1180 	for (std = LIST_FIRST(&sc->sc_hash_tds[h]);
   1181 	     std != 0;
   1182 	     std = LIST_NEXT(std, hnext))
   1183 		if (std->physaddr == a)
   1184 			return (std);
   1185 	panic("ohci_hash_find_td: addr 0x%08lx not found\n", (u_long)a);
   1186 }
   1187 
   1188 void
   1189 ohci_timeout(addr)
   1190 	void *addr;
   1191 {
   1192 #if 0
   1193 	usbd_request_handle *reqh = addr;
   1194 	int s;
   1195 
   1196 	DPRINTF(("ohci_timeout: reqh=%p\n", reqh));
   1197 	s = splusb();
   1198 	/* XXX need to inactivate TD before calling interrupt routine */
   1199 	ohci_XXX_done(reqh);
   1200 	splx(s);
   1201 #endif
   1202 }
   1203 
   1204 #ifdef USB_DEBUG
   1205 void
   1206 ohci_dump_tds(std)
   1207 	ohci_soft_td_t *std;
   1208 {
   1209 	for (; std; std = std->nexttd)
   1210 		ohci_dump_td(std);
   1211 }
   1212 
   1213 void
   1214 ohci_dump_td(std)
   1215 	ohci_soft_td_t *std;
   1216 {
   1217 	printf("TD(%p) at %08lx: %b delay=%d ec=%d cc=%d\ncbp=0x%08lx "
   1218 	       "nexttd=0x%08lx be=0x%08lx\n",
   1219 	       std, (u_long)std->physaddr,
   1220 	       (u_long)LE(std->td->td_flags),
   1221 	       "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE",
   1222 	       OHCI_TD_GET_DI(LE(std->td->td_flags)),
   1223 	       OHCI_TD_GET_EC(LE(std->td->td_flags)),
   1224 	       OHCI_TD_GET_CC(LE(std->td->td_flags)),
   1225 	       (u_long)LE(std->td->td_cbp),
   1226 	       (u_long)LE(std->td->td_nexttd), (u_long)LE(std->td->td_be));
   1227 }
   1228 
   1229 void
   1230 ohci_dump_ed(sed)
   1231 	ohci_soft_ed_t *sed;
   1232 {
   1233 	printf("ED(%p) at %08lx: addr=%d endpt=%d maxp=%d %b\ntailp=0x%08lx "
   1234 	       "headp=%b nexted=0x%08lx\n",
   1235 	       sed, (u_long)sed->physaddr,
   1236 	       OHCI_ED_GET_FA(LE(sed->ed->ed_flags)),
   1237 	       OHCI_ED_GET_EN(LE(sed->ed->ed_flags)),
   1238 	       OHCI_ED_GET_MAXP(LE(sed->ed->ed_flags)),
   1239 	       (u_long)LE(sed->ed->ed_flags),
   1240 	       "\20\14OUT\15IN\16LOWSPEED\17SKIP\18ISO",
   1241 	       (u_long)LE(sed->ed->ed_tailp),
   1242 	       (u_long)LE(sed->ed->ed_headp), "\20\1HALT\2CARRY",
   1243 	       (u_long)LE(sed->ed->ed_nexted));
   1244 }
   1245 #endif
   1246 
   1247 usbd_status
   1248 ohci_open(pipe)
   1249 	usbd_pipe_handle pipe;
   1250 {
   1251 	usbd_device_handle dev = pipe->device;
   1252 	ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
   1253 	usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
   1254 	struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
   1255 	u_int8_t addr = dev->address;
   1256 	ohci_soft_ed_t *sed;
   1257 	ohci_soft_td_t *std;
   1258 	usbd_status r;
   1259 	int s;
   1260 
   1261 	DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
   1262 		     pipe, addr, ed->bEndpointAddress, sc->sc_addr));
   1263 	if (addr == sc->sc_addr) {
   1264 		switch (ed->bEndpointAddress) {
   1265 		case USB_CONTROL_ENDPOINT:
   1266 			pipe->methods = &ohci_root_ctrl_methods;
   1267 			break;
   1268 		case UE_IN | OHCI_INTR_ENDPT:
   1269 			pipe->methods = &ohci_root_intr_methods;
   1270 			break;
   1271 		default:
   1272 			return (USBD_INVAL);
   1273 		}
   1274 	} else {
   1275 		sed = ohci_alloc_sed(sc);
   1276 		if (sed == 0)
   1277 			goto bad0;
   1278 	        std = ohci_alloc_std(sc);
   1279 		if (std == 0)
   1280 			goto bad1;
   1281 		opipe->sed = sed;
   1282 		opipe->tail = std;
   1283 		sed->ed->ed_flags = LE(
   1284 			OHCI_ED_SET_FA(addr) |
   1285 			OHCI_ED_SET_EN(ed->bEndpointAddress) |
   1286 			OHCI_ED_DIR_TD |
   1287 			(dev->lowspeed ? OHCI_ED_SPEED : 0) |
   1288 			((ed->bmAttributes & UE_XFERTYPE) == UE_ISOCHRONOUS ?
   1289 			 OHCI_ED_FORMAT_ISO : OHCI_ED_FORMAT_GEN) |
   1290 			OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize)));
   1291 		sed->ed->ed_headp = sed->ed->ed_tailp = LE(std->physaddr);
   1292 
   1293 		switch (ed->bmAttributes & UE_XFERTYPE) {
   1294 		case UE_CONTROL:
   1295 			pipe->methods = &ohci_device_ctrl_methods;
   1296 			r = usb_allocmem(sc->sc_dmatag,
   1297 					 sizeof(usb_device_request_t),
   1298 					 0, &opipe->u.ctl.reqdma);
   1299 			if (r != USBD_NORMAL_COMPLETION)
   1300 				goto bad;
   1301 			s = splusb();
   1302 			ohci_add_ed(sed, sc->sc_ctrl_head);
   1303 			splx(s);
   1304 			break;
   1305 		case UE_INTERRUPT:
   1306 			pipe->methods = &ohci_device_intr_methods;
   1307 			return (ohci_device_setintr(sc, opipe, ed->bInterval));
   1308 		case UE_ISOCHRONOUS:
   1309 			printf("ohci_open: open iso unimplemented\n");
   1310 			return (USBD_XXX);
   1311 		case UE_BULK:
   1312 			pipe->methods = &ohci_device_bulk_methods;
   1313 			s = splusb();
   1314 			ohci_add_ed(sed, sc->sc_bulk_head);
   1315 			splx(s);
   1316 			break;
   1317 		}
   1318 	}
   1319 	return (USBD_NORMAL_COMPLETION);
   1320 
   1321  bad:
   1322 	ohci_free_std(sc, std);
   1323  bad1:
   1324 	ohci_free_sed(sc, sed);
   1325  bad0:
   1326 	return (USBD_NOMEM);
   1327 
   1328 }
   1329 
   1330 /*
   1331  * Data structures and routines to emulate the root hub.
   1332  */
   1333 usb_device_descriptor_t ohci_devd = {
   1334 	USB_DEVICE_DESCRIPTOR_SIZE,
   1335 	UDESC_DEVICE,		/* type */
   1336 	{0x00, 0x01},		/* USB version */
   1337 	UCLASS_HUB,		/* class */
   1338 	USUBCLASS_HUB,		/* subclass */
   1339 	0,			/* protocol */
   1340 	64,			/* max packet */
   1341 	{0},{0},{0x00,0x01},	/* device id */
   1342 	1,2,0,			/* string indicies */
   1343 	1			/* # of configurations */
   1344 };
   1345 
   1346 usb_config_descriptor_t ohci_confd = {
   1347 	USB_CONFIG_DESCRIPTOR_SIZE,
   1348 	UDESC_CONFIG,
   1349 	{USB_CONFIG_DESCRIPTOR_SIZE +
   1350 	 USB_INTERFACE_DESCRIPTOR_SIZE +
   1351 	 USB_ENDPOINT_DESCRIPTOR_SIZE},
   1352 	1,
   1353 	1,
   1354 	0,
   1355 	UC_SELF_POWERED,
   1356 	0			/* max power */
   1357 };
   1358 
   1359 usb_interface_descriptor_t ohci_ifcd = {
   1360 	USB_INTERFACE_DESCRIPTOR_SIZE,
   1361 	UDESC_INTERFACE,
   1362 	0,
   1363 	0,
   1364 	1,
   1365 	UCLASS_HUB,
   1366 	USUBCLASS_HUB,
   1367 	0,
   1368 	0
   1369 };
   1370 
   1371 usb_endpoint_descriptor_t ohci_endpd = {
   1372 	USB_ENDPOINT_DESCRIPTOR_SIZE,
   1373 	UDESC_ENDPOINT,
   1374 	UE_IN | OHCI_INTR_ENDPT,
   1375 	UE_INTERRUPT,
   1376 	{8, 0},			/* max packet */
   1377 	255
   1378 };
   1379 
   1380 usb_hub_descriptor_t ohci_hubd = {
   1381 	USB_HUB_DESCRIPTOR_SIZE,
   1382 	UDESC_HUB,
   1383 	0,
   1384 	{0,0},
   1385 	0,
   1386 	0,
   1387 	{0},
   1388 };
   1389 
   1390 int
   1391 ohci_str(p, l, s)
   1392 	usb_string_descriptor_t *p;
   1393 	int l;
   1394 	char *s;
   1395 {
   1396 	int i;
   1397 
   1398 	if (l == 0)
   1399 		return (0);
   1400 	p->bLength = 2 * strlen(s) + 2;
   1401 	if (l == 1)
   1402 		return (1);
   1403 	p->bDescriptorType = UDESC_STRING;
   1404 	l -= 2;
   1405 	for (i = 0; s[i] && l > 1; i++, l -= 2)
   1406 		USETW2(p->bString[i], 0, s[i]);
   1407 	return (2*i+2);
   1408 }
   1409 
   1410 /*
   1411  * Simulate a hardware hub by handling all the necessary requests.
   1412  */
   1413 usbd_status
   1414 ohci_root_ctrl_transfer(reqh)
   1415 	usbd_request_handle reqh;
   1416 {
   1417 	int s;
   1418 	usbd_status r;
   1419 
   1420 	s = splusb();
   1421 	r = usb_insert_transfer(reqh);
   1422 	splx(s);
   1423 	if (r != USBD_NORMAL_COMPLETION)
   1424 		return (r);
   1425 	else
   1426 		return (ohci_root_ctrl_start(reqh));
   1427 }
   1428 
   1429 usbd_status
   1430 ohci_root_ctrl_start(reqh)
   1431 	usbd_request_handle reqh;
   1432 {
   1433 	ohci_softc_t *sc = (ohci_softc_t *)reqh->pipe->device->bus;
   1434 	usb_device_request_t *req;
   1435 	void *buf;
   1436 	int port, i;
   1437 	int len, value, index, l, totlen = 0;
   1438 	usb_port_status_t ps;
   1439 	usb_hub_descriptor_t hubd;
   1440 	usbd_status r;
   1441 	u_int32_t v;
   1442 
   1443 	if (!reqh->isreq)
   1444 		/* XXX panic */
   1445 		return (USBD_INVAL);
   1446 	req = &reqh->request;
   1447 	buf = reqh->buffer;
   1448 
   1449 	DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n",
   1450 		    req->bmRequestType, req->bRequest));
   1451 
   1452 	len = UGETW(req->wLength);
   1453 	value = UGETW(req->wValue);
   1454 	index = UGETW(req->wIndex);
   1455 #define C(x,y) ((x) | ((y) << 8))
   1456 	switch(C(req->bRequest, req->bmRequestType)) {
   1457 	case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
   1458 	case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
   1459 	case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
   1460 		/*
   1461 		 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
   1462 		 * for the integrated root hub.
   1463 		 */
   1464 		break;
   1465 	case C(UR_GET_CONFIG, UT_READ_DEVICE):
   1466 		if (len > 0) {
   1467 			*(u_int8_t *)buf = sc->sc_conf;
   1468 			totlen = 1;
   1469 		}
   1470 		break;
   1471 	case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
   1472 		DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value));
   1473 		switch(value >> 8) {
   1474 		case UDESC_DEVICE:
   1475 			if ((value & 0xff) != 0) {
   1476 				r = USBD_IOERROR;
   1477 				goto ret;
   1478 			}
   1479 			totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
   1480 			memcpy(buf, &ohci_devd, l);
   1481 			break;
   1482 		case UDESC_CONFIG:
   1483 			if ((value & 0xff) != 0) {
   1484 				r = USBD_IOERROR;
   1485 				goto ret;
   1486 			}
   1487 			totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
   1488 			memcpy(buf, &ohci_confd, l);
   1489 			buf = (char *)buf + l;
   1490 			len -= l;
   1491 			l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
   1492 			totlen += l;
   1493 			memcpy(buf, &ohci_ifcd, l);
   1494 			buf = (char *)buf + l;
   1495 			len -= l;
   1496 			l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
   1497 			totlen += l;
   1498 			memcpy(buf, &ohci_endpd, l);
   1499 			break;
   1500 		case UDESC_STRING:
   1501 			if (len == 0)
   1502 				break;
   1503 			*(u_int8_t *)buf = 0;
   1504 			totlen = 1;
   1505 			switch (value & 0xff) {
   1506 			case 1: /* Vendor */
   1507 				totlen = ohci_str(buf, len, sc->sc_vendor);
   1508 				break;
   1509 			case 2: /* Product */
   1510 				totlen = ohci_str(buf, len, "OHCI root hub");
   1511 				break;
   1512 			}
   1513 			break;
   1514 		default:
   1515 			r = USBD_IOERROR;
   1516 			goto ret;
   1517 		}
   1518 		break;
   1519 	case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
   1520 		if (len > 0) {
   1521 			*(u_int8_t *)buf = 0;
   1522 			totlen = 1;
   1523 		}
   1524 		break;
   1525 	case C(UR_GET_STATUS, UT_READ_DEVICE):
   1526 		if (len > 1) {
   1527 			USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
   1528 			totlen = 2;
   1529 		}
   1530 		break;
   1531 	case C(UR_GET_STATUS, UT_READ_INTERFACE):
   1532 	case C(UR_GET_STATUS, UT_READ_ENDPOINT):
   1533 		if (len > 1) {
   1534 			USETW(((usb_status_t *)buf)->wStatus, 0);
   1535 			totlen = 2;
   1536 		}
   1537 		break;
   1538 	case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
   1539 		if (value >= USB_MAX_DEVICES) {
   1540 			r = USBD_IOERROR;
   1541 			goto ret;
   1542 		}
   1543 		sc->sc_addr = value;
   1544 		break;
   1545 	case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
   1546 		if (value != 0 && value != 1) {
   1547 			r = USBD_IOERROR;
   1548 			goto ret;
   1549 		}
   1550 		sc->sc_conf = value;
   1551 		break;
   1552 	case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
   1553 		break;
   1554 	case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
   1555 	case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
   1556 	case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
   1557 		r = USBD_IOERROR;
   1558 		goto ret;
   1559 	case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
   1560 		break;
   1561 	case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
   1562 		break;
   1563 	/* Hub requests */
   1564 	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
   1565 		break;
   1566 	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
   1567 		DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
   1568 			     "port=%d feature=%d\n",
   1569 			     index, value));
   1570 		if (index < 1 || index > sc->sc_noport) {
   1571 			r = USBD_IOERROR;
   1572 			goto ret;
   1573 		}
   1574 		port = OHCI_RH_PORT_STATUS(index);
   1575 		switch(value) {
   1576 		case UHF_PORT_ENABLE:
   1577 			OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS);
   1578 			break;
   1579 		case UHF_PORT_SUSPEND:
   1580 			OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR);
   1581 			break;
   1582 		case UHF_PORT_POWER:
   1583 			OWRITE4(sc, port, UPS_LOW_SPEED);
   1584 			break;
   1585 		case UHF_C_PORT_CONNECTION:
   1586 			OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16);
   1587 			break;
   1588 		case UHF_C_PORT_ENABLE:
   1589 			OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16);
   1590 			break;
   1591 		case UHF_C_PORT_SUSPEND:
   1592 			OWRITE4(sc, port, UPS_C_SUSPEND << 16);
   1593 			break;
   1594 		case UHF_C_PORT_OVER_CURRENT:
   1595 			OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16);
   1596 			break;
   1597 		case UHF_C_PORT_RESET:
   1598 			OWRITE4(sc, port, UPS_C_PORT_RESET << 16);
   1599 			break;
   1600 		default:
   1601 			r = USBD_IOERROR;
   1602 			goto ret;
   1603 		}
   1604 		switch(value) {
   1605 		case UHF_C_PORT_CONNECTION:
   1606 		case UHF_C_PORT_ENABLE:
   1607 		case UHF_C_PORT_SUSPEND:
   1608 		case UHF_C_PORT_OVER_CURRENT:
   1609 		case UHF_C_PORT_RESET:
   1610 			/* Enable RHSC interrupt if condition is cleared. */
   1611 			if ((OREAD4(sc, port) >> 16) == 0)
   1612 				ohci_rhsc_able(sc, 1);
   1613 			break;
   1614 		default:
   1615 			break;
   1616 		}
   1617 		break;
   1618 	case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
   1619 		if (value != 0) {
   1620 			r = USBD_IOERROR;
   1621 			goto ret;
   1622 		}
   1623 		v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
   1624 		hubd = ohci_hubd;
   1625 		hubd.bNbrPorts = sc->sc_noport;
   1626 		USETW(hubd.wHubCharacteristics,
   1627 		      (v & OHCI_NPS ? UHD_PWR_NO_SWITCH :
   1628 		       v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL)
   1629 		      /* XXX overcurrent */
   1630 		      );
   1631 		hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v);
   1632 		v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
   1633 		for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
   1634 			hubd.DeviceRemovable[i++] = (u_int8_t)v;
   1635 		hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
   1636 		l = min(len, hubd.bDescLength);
   1637 		totlen = l;
   1638 		memcpy(buf, &hubd, l);
   1639 		break;
   1640 	case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
   1641 		if (len != 4) {
   1642 			r = USBD_IOERROR;
   1643 			goto ret;
   1644 		}
   1645 		memset(buf, 0, len); /* ? XXX */
   1646 		totlen = len;
   1647 		break;
   1648 	case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
   1649 		DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n",
   1650 			    index));
   1651 		if (index < 1 || index > sc->sc_noport) {
   1652 			r = USBD_IOERROR;
   1653 			goto ret;
   1654 		}
   1655 		if (len != 4) {
   1656 			r = USBD_IOERROR;
   1657 			goto ret;
   1658 		}
   1659 		v = OREAD4(sc, OHCI_RH_PORT_STATUS(index));
   1660 		DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n",
   1661 			    v));
   1662 		USETW(ps.wPortStatus, v);
   1663 		USETW(ps.wPortChange, v >> 16);
   1664 		l = min(len, sizeof ps);
   1665 		memcpy(buf, &ps, l);
   1666 		totlen = l;
   1667 		break;
   1668 	case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
   1669 		r = USBD_IOERROR;
   1670 		goto ret;
   1671 	case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
   1672 		break;
   1673 	case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
   1674 		if (index < 1 || index > sc->sc_noport) {
   1675 			r = USBD_IOERROR;
   1676 			goto ret;
   1677 		}
   1678 		port = OHCI_RH_PORT_STATUS(index);
   1679 		switch(value) {
   1680 		case UHF_PORT_ENABLE:
   1681 			OWRITE4(sc, port, UPS_PORT_ENABLED);
   1682 			break;
   1683 		case UHF_PORT_SUSPEND:
   1684 			OWRITE4(sc, port, UPS_SUSPEND);
   1685 			break;
   1686 		case UHF_PORT_RESET:
   1687 			DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n",
   1688 				    index));
   1689 			OWRITE4(sc, port, UPS_RESET);
   1690 			for (i = 0; i < 10; i++) {
   1691 				usb_delay_ms(&sc->sc_bus, 10);
   1692 				if ((OREAD4(sc, port) & UPS_RESET) == 0)
   1693 					break;
   1694 			}
   1695 			DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n",
   1696 				    index, OREAD4(sc, port)));
   1697 			break;
   1698 		case UHF_PORT_POWER:
   1699 			DPRINTFN(2,("ohci_root_ctrl_transfer: set port power "
   1700 				    "%d\n", index));
   1701 			OWRITE4(sc, port, UPS_PORT_POWER);
   1702 			break;
   1703 		default:
   1704 			r = USBD_IOERROR;
   1705 			goto ret;
   1706 		}
   1707 		break;
   1708 	default:
   1709 		r = USBD_IOERROR;
   1710 		goto ret;
   1711 	}
   1712 	reqh->actlen = totlen;
   1713 	r = USBD_NORMAL_COMPLETION;
   1714  ret:
   1715 	reqh->status = r;
   1716 	reqh->xfercb(reqh);
   1717 	usb_start_next(reqh->pipe);
   1718 	return (USBD_IN_PROGRESS);
   1719 }
   1720 
   1721 /* Abort a root control request. */
   1722 void
   1723 ohci_root_ctrl_abort(reqh)
   1724 	usbd_request_handle reqh;
   1725 {
   1726 	/* Nothing to do, all transfers are synchronous. */
   1727 }
   1728 
   1729 /* Close the root pipe. */
   1730 void
   1731 ohci_root_ctrl_close(pipe)
   1732 	usbd_pipe_handle pipe;
   1733 {
   1734 	DPRINTF(("ohci_root_ctrl_close\n"));
   1735 }
   1736 
   1737 usbd_status
   1738 ohci_root_intr_transfer(reqh)
   1739 	usbd_request_handle reqh;
   1740 {
   1741 	int s;
   1742 	usbd_status r;
   1743 
   1744 	s = splusb();
   1745 	r = usb_insert_transfer(reqh);
   1746 	splx(s);
   1747 	if (r != USBD_NORMAL_COMPLETION)
   1748 		return (r);
   1749 	else
   1750 		return (ohci_root_intr_start(reqh));
   1751 }
   1752 
   1753 usbd_status
   1754 ohci_root_intr_start(reqh)
   1755 	usbd_request_handle reqh;
   1756 {
   1757 	usbd_pipe_handle pipe = reqh->pipe;
   1758 	ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
   1759 	struct ohci_pipe *upipe = (struct ohci_pipe *)pipe;
   1760 	usb_dma_t *dmap;
   1761 	usbd_status r;
   1762 	int len;
   1763 
   1764 	len = reqh->length;
   1765 	dmap = &upipe->u.intr.datadma;
   1766 	if (len == 0)
   1767 		return (USBD_INVAL); /* XXX should it be? */
   1768 
   1769 	r = usb_allocmem(sc->sc_dmatag, len, 0, dmap);
   1770 	if (r != USBD_NORMAL_COMPLETION)
   1771 		return (r);
   1772 	sc->sc_intrreqh = reqh;
   1773 
   1774 	return (USBD_IN_PROGRESS);
   1775 }
   1776 
   1777 /* Abort a root interrupt request. */
   1778 void
   1779 ohci_root_intr_abort(reqh)
   1780 	usbd_request_handle reqh;
   1781 {
   1782 	/* No need to abort. */
   1783 }
   1784 
   1785 /* Close the root pipe. */
   1786 void
   1787 ohci_root_intr_close(pipe)
   1788 	usbd_pipe_handle pipe;
   1789 {
   1790 	ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
   1791 	sc->sc_intrreqh = 0;
   1792 
   1793 	DPRINTF(("ohci_root_intr_close\n"));
   1794 }
   1795 
   1796 /************************/
   1797 
   1798 usbd_status
   1799 ohci_device_ctrl_transfer(reqh)
   1800 	usbd_request_handle reqh;
   1801 {
   1802 	int s;
   1803 	usbd_status r;
   1804 
   1805 	s = splusb();
   1806 	r = usb_insert_transfer(reqh);
   1807 	splx(s);
   1808 	if (r != USBD_NORMAL_COMPLETION)
   1809 		return (r);
   1810 	else
   1811 		return (ohci_device_ctrl_start(reqh));
   1812 }
   1813 
   1814 usbd_status
   1815 ohci_device_ctrl_start(reqh)
   1816 	usbd_request_handle reqh;
   1817 {
   1818 	ohci_softc_t *sc = (ohci_softc_t *)reqh->pipe->device->bus;
   1819 	usbd_status r;
   1820 
   1821 	if (!reqh->isreq) {
   1822 		/* XXX panic */
   1823 		printf("ohci_device_ctrl_transfer: not a request\n");
   1824 		return (USBD_INVAL);
   1825 	}
   1826 
   1827 	r = ohci_device_request(reqh);
   1828 	if (r != USBD_NORMAL_COMPLETION)
   1829 		return (r);
   1830 
   1831 	if (sc->sc_bus.use_polling)
   1832 		ohci_waitintr(sc, reqh);
   1833 	return (USBD_IN_PROGRESS);
   1834 }
   1835 
   1836 /* Abort a device control request. */
   1837 void
   1838 ohci_device_ctrl_abort(reqh)
   1839 	usbd_request_handle reqh;
   1840 {
   1841 	/* XXX inactivate */
   1842 	usb_delay_ms(reqh->pipe->device->bus, 1); /* make sure it is donw */
   1843 	/* XXX call done */
   1844 }
   1845 
   1846 /* Close a device control pipe. */
   1847 void
   1848 ohci_device_ctrl_close(pipe)
   1849 	usbd_pipe_handle pipe;
   1850 {
   1851 	struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
   1852 	ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
   1853 	ohci_soft_ed_t *sed = opipe->sed;
   1854 	int s;
   1855 
   1856 	s = splusb();
   1857 	sed->ed->ed_flags |= LE(OHCI_ED_SKIP);
   1858 	if ((LE(sed->ed->ed_tailp) & OHCI_TAILMASK) != LE(sed->ed->ed_headp))
   1859 		usb_delay_ms(&sc->sc_bus, 2);
   1860 	ohci_rem_ed(sed, sc->sc_ctrl_head);
   1861 	splx(s);
   1862 	ohci_free_std(sc, opipe->tail);
   1863 	ohci_free_sed(sc, opipe->sed);
   1864 	/* XXX free other resources */
   1865 }
   1866 
   1867 /************************/
   1868 
   1869 usbd_status
   1870 ohci_device_bulk_transfer(reqh)
   1871 	usbd_request_handle reqh;
   1872 {
   1873 	int s;
   1874 	usbd_status r;
   1875 
   1876 	s = splusb();
   1877 	r = usb_insert_transfer(reqh);
   1878 	splx(s);
   1879 	if (r != USBD_NORMAL_COMPLETION)
   1880 		return (r);
   1881 	else
   1882 		return (ohci_device_bulk_start(reqh));
   1883 }
   1884 
   1885 usbd_status
   1886 ohci_device_bulk_start(reqh)
   1887 	usbd_request_handle reqh;
   1888 {
   1889 	struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
   1890 	usbd_device_handle dev = opipe->pipe.device;
   1891 	ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
   1892 	int addr = dev->address;
   1893 	ohci_soft_td_t *xfer, *tail;
   1894 	ohci_soft_ed_t *sed;
   1895 	usb_dma_t *dmap;
   1896 	usbd_status r;
   1897 	int s, len, isread;
   1898 
   1899 	if (reqh->isreq) {
   1900 		/* XXX panic */
   1901 		printf("ohci_device_bulk_transfer: a request\n");
   1902 		return (USBD_INVAL);
   1903 	}
   1904 
   1905 	len = reqh->length;
   1906 	dmap = &opipe->u.bulk.datadma;
   1907 	isread = reqh->pipe->endpoint->edesc->bEndpointAddress & UE_IN;
   1908 	sed = opipe->sed;
   1909 
   1910 	opipe->u.bulk.length = len;
   1911 
   1912 	r = usb_allocmem(sc->sc_dmatag, len, 0, dmap);
   1913 	if (r != USBD_NORMAL_COMPLETION)
   1914 		goto ret1;
   1915 
   1916 	tail = ohci_alloc_std(sc);
   1917 	if (!tail) {
   1918 		r = USBD_NOMEM;
   1919 		goto ret2;
   1920 	}
   1921 	tail->reqh = 0;
   1922 
   1923 	/* Update device address */
   1924 	sed->ed->ed_flags = LE(
   1925 		(LE(sed->ed->ed_flags) & ~OHCI_ED_ADDRMASK) |
   1926 		OHCI_ED_SET_FA(addr));
   1927 
   1928 	/* Set up data transaction */
   1929 	xfer = opipe->tail;
   1930 	xfer->td->td_flags = LE(
   1931 		(isread ? OHCI_TD_IN : OHCI_TD_OUT) | OHCI_TD_NOCC |
   1932 		OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY |
   1933 		(reqh->flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0));
   1934 	xfer->td->td_cbp = LE(DMAADDR(dmap));
   1935 	xfer->nexttd = tail;
   1936 	xfer->td->td_nexttd = LE(tail->physaddr);
   1937 	xfer->td->td_be = LE(LE(xfer->td->td_cbp) + len - 1);
   1938 	xfer->len = len;
   1939 	xfer->reqh = reqh;
   1940 
   1941 	reqh->hcpriv = xfer;
   1942 
   1943 	if (!isread)
   1944 		memcpy(KERNADDR(dmap), reqh->buffer, len);
   1945 
   1946 	/* Insert ED in schedule */
   1947 	s = splusb();
   1948 	ohci_hash_add_td(sc, xfer);
   1949 	sed->ed->ed_tailp = LE(tail->physaddr);
   1950 	opipe->tail = tail;
   1951 	OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
   1952 	if (reqh->timeout && !sc->sc_bus.use_polling) {
   1953                 usb_timeout(ohci_timeout, reqh,
   1954 			    MS_TO_TICKS(reqh->timeout), reqh->timo_handle);
   1955 	}
   1956 	splx(s);
   1957 
   1958 	return (USBD_IN_PROGRESS);
   1959 
   1960  ret2:
   1961 	usb_freemem(sc->sc_dmatag, dmap);
   1962  ret1:
   1963 	return (r);
   1964 }
   1965 
   1966 /* Abort a device bulk request. */
   1967 void
   1968 ohci_device_bulk_abort(reqh)
   1969 	usbd_request_handle reqh;
   1970 {
   1971 #if 0
   1972 	sed->ed->ed_flags |= LE(OHCI_ED_SKIP);
   1973 	if ((LE(sed->ed->ed_tailp) & OHCI_TAILMASK) != LE(sed->ed->ed_headp))
   1974 		usb_delay_ms(reqh->pipe->device->bus, 2);
   1975 #endif
   1976 	/* XXX inactivate */
   1977 	usb_delay_ms(reqh->pipe->device->bus, 1); /* make sure it is done */
   1978 	/* XXX call done */
   1979 }
   1980 
   1981 /* Close a device bulk pipe. */
   1982 void
   1983 ohci_device_bulk_close(pipe)
   1984 	usbd_pipe_handle pipe;
   1985 {
   1986 	struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
   1987 	usbd_device_handle dev = opipe->pipe.device;
   1988 	ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
   1989 	int s;
   1990 
   1991 	s = splusb();
   1992 	ohci_rem_ed(opipe->sed, sc->sc_bulk_head);
   1993 	splx(s);
   1994 	ohci_free_std(sc, opipe->tail);
   1995 	ohci_free_sed(sc, opipe->sed);
   1996 	/* XXX free other resources */
   1997 }
   1998 
   1999 /************************/
   2000 
   2001 usbd_status
   2002 ohci_device_intr_transfer(reqh)
   2003 	usbd_request_handle reqh;
   2004 {
   2005 	int s;
   2006 	usbd_status r;
   2007 
   2008 	s = splusb();
   2009 	r = usb_insert_transfer(reqh);
   2010 	splx(s);
   2011 	if (r != USBD_NORMAL_COMPLETION)
   2012 		return (r);
   2013 	else
   2014 		return (ohci_device_intr_start(reqh));
   2015 }
   2016 
   2017 usbd_status
   2018 ohci_device_intr_start(reqh)
   2019 	usbd_request_handle reqh;
   2020 {
   2021 	struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
   2022 	usbd_device_handle dev = opipe->pipe.device;
   2023 	ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
   2024 	ohci_soft_ed_t *sed = opipe->sed;
   2025 	ohci_soft_td_t *xfer, *tail;
   2026 	usb_dma_t *dmap;
   2027 	usbd_status r;
   2028 	int len;
   2029 	int s;
   2030 
   2031 	DPRINTFN(3, ("ohci_device_intr_transfer: reqh=%p buf=%p len=%d "
   2032 		     "flags=%d priv=%p\n",
   2033 		 reqh, reqh->buffer, reqh->length, reqh->flags, reqh->priv));
   2034 
   2035 	if (reqh->isreq)
   2036 		panic("ohci_device_intr_transfer: a request\n");
   2037 
   2038 	len = reqh->length;
   2039 	dmap = &opipe->u.intr.datadma;
   2040 	if (len == 0)
   2041 		return (USBD_INVAL); /* XXX should it be? */
   2042 
   2043 	xfer = opipe->tail;
   2044 	tail = ohci_alloc_std(sc);
   2045 	if (!tail) {
   2046 		r = USBD_NOMEM;
   2047 		goto ret1;
   2048 	}
   2049 	tail->reqh = 0;
   2050 
   2051 	r = usb_allocmem(sc->sc_dmatag, len, 0, dmap);
   2052 	if (r != USBD_NORMAL_COMPLETION)
   2053 		goto ret2;
   2054 
   2055 	xfer->td->td_flags = LE(
   2056 		OHCI_TD_IN | OHCI_TD_NOCC |
   2057 		OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
   2058 	if (reqh->flags & USBD_SHORT_XFER_OK)
   2059 		xfer->td->td_flags |= LE(OHCI_TD_R);
   2060 	xfer->td->td_cbp = LE(DMAADDR(dmap));
   2061 	xfer->nexttd = tail;
   2062 	xfer->td->td_nexttd = LE(tail->physaddr);
   2063 	xfer->td->td_be = LE(LE(xfer->td->td_cbp) + len - 1);
   2064 	xfer->len = len;
   2065 	xfer->reqh = reqh;
   2066 
   2067 	reqh->hcpriv = xfer;
   2068 
   2069 #if USB_DEBUG
   2070 	if (ohcidebug > 5) {
   2071 		printf("ohci_device_intr_transfer:\n");
   2072 		ohci_dump_ed(sed);
   2073 		ohci_dump_tds(xfer);
   2074 	}
   2075 #endif
   2076 
   2077 	/* Insert ED in schedule */
   2078 	s = splusb();
   2079 	ohci_hash_add_td(sc, xfer);
   2080 	sed->ed->ed_tailp = LE(tail->physaddr);
   2081 	opipe->tail = tail;
   2082 #if 0
   2083 	if (reqh->timeout && !sc->sc_bus.use_polling) {
   2084                 usb_timeout(ohci_timeout, reqh,
   2085 			    MS_TO_TICKS(reqh->timeout), reqh->timo_handle);
   2086 	}
   2087 #endif
   2088 	sed->ed->ed_flags &= LE(~OHCI_ED_SKIP);
   2089 	splx(s);
   2090 
   2091 #ifdef USB_DEBUG
   2092 	if (ohcidebug > 5) {
   2093 		delay(5000);
   2094 		printf("ohci_device_intr_transfer: status=%x\n",
   2095 		       OREAD4(sc, OHCI_COMMAND_STATUS));
   2096 		ohci_dump_ed(sed);
   2097 		ohci_dump_tds(xfer);
   2098 	}
   2099 #endif
   2100 
   2101 	return (USBD_IN_PROGRESS);
   2102 
   2103  ret2:
   2104 	ohci_free_std(sc, xfer);
   2105  ret1:
   2106 	return (r);
   2107 }
   2108 
   2109 /* Abort a device control request. */
   2110 void
   2111 ohci_device_intr_abort(reqh)
   2112 	usbd_request_handle reqh;
   2113 {
   2114 	/* XXX inactivate */
   2115 	usb_delay_ms(reqh->pipe->device->bus, 1); /* make sure it is done */
   2116 	if (reqh->pipe->intrreqh == reqh) {
   2117 		DPRINTF(("ohci_device_intr_abort: remove\n"));
   2118 		reqh->pipe->intrreqh = 0;
   2119 		ohci_intr_done((ohci_softc_t *)reqh->pipe->device->bus, reqh);
   2120 	}
   2121 }
   2122 
   2123 /* Close a device interrupt pipe. */
   2124 void
   2125 ohci_device_intr_close(pipe)
   2126 	usbd_pipe_handle pipe;
   2127 {
   2128 	struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
   2129 	ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
   2130 	int nslots = opipe->u.intr.nslots;
   2131 	int pos = opipe->u.intr.pos;
   2132 	int j;
   2133 	ohci_soft_ed_t *p, *sed = opipe->sed;
   2134 	int s;
   2135 
   2136 	DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n",
   2137 		    pipe, nslots, pos));
   2138 	s = splusb();
   2139 	sed->ed->ed_flags |= LE(OHCI_ED_SKIP);
   2140 	if ((sed->ed->ed_tailp & LE(OHCI_TAILMASK)) != sed->ed->ed_headp)
   2141 		usb_delay_ms(&sc->sc_bus, 2);
   2142 
   2143 	for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next)
   2144 		;
   2145 	if (!p)
   2146 		panic("ohci_device_intr_close: ED not found\n");
   2147 	p->next = sed->next;
   2148 	p->ed->ed_nexted = sed->ed->ed_nexted;
   2149 	splx(s);
   2150 
   2151 	for (j = 0; j < nslots; j++)
   2152 		--sc->sc_bws[pos * nslots + j];
   2153 
   2154 	ohci_free_std(sc, opipe->tail);
   2155 	ohci_free_sed(sc, opipe->sed);
   2156 	/* XXX free other resources */
   2157 }
   2158 
   2159 usbd_status
   2160 ohci_device_setintr(sc, opipe, ival)
   2161 	ohci_softc_t *sc;
   2162 	struct ohci_pipe *opipe;
   2163 	int ival;
   2164 {
   2165 	int i, j, s, best;
   2166 	u_int npoll, slow, shigh, nslots;
   2167 	u_int bestbw, bw;
   2168 	ohci_soft_ed_t *hsed, *sed = opipe->sed;
   2169 
   2170 	DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe));
   2171 	if (ival == 0) {
   2172 		printf("ohci_setintr: 0 interval\n");
   2173 		return (USBD_INVAL);
   2174 	}
   2175 
   2176 	npoll = OHCI_NO_INTRS;
   2177 	while (npoll > ival)
   2178 		npoll /= 2;
   2179 	DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll));
   2180 
   2181 	/*
   2182 	 * We now know which level in the tree the ED must go into.
   2183 	 * Figure out which slot has most bandwidth left over.
   2184 	 * Slots to examine:
   2185 	 * npoll
   2186 	 * 1	0
   2187 	 * 2	1 2
   2188 	 * 4	3 4 5 6
   2189 	 * 8	7 8 9 10 11 12 13 14
   2190 	 * N    (N-1) .. (N-1+N-1)
   2191 	 */
   2192 	slow = npoll-1;
   2193 	shigh = slow + npoll;
   2194 	nslots = OHCI_NO_INTRS / npoll;
   2195 	for (best = i = slow, bestbw = ~0; i < shigh; i++) {
   2196 		bw = 0;
   2197 		for (j = 0; j < nslots; j++)
   2198 			bw += sc->sc_bws[i * nslots + j];
   2199 		if (bw < bestbw) {
   2200 			best = i;
   2201 			bestbw = bw;
   2202 		}
   2203 	}
   2204 	DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n",
   2205 		     best, slow, shigh, bestbw));
   2206 
   2207 	s = splusb();
   2208 	hsed = sc->sc_eds[best];
   2209 	sed->next = hsed->next;
   2210 	sed->ed->ed_nexted = hsed->ed->ed_nexted;
   2211 	hsed->next = sed;
   2212 	hsed->ed->ed_nexted = LE(sed->physaddr);
   2213 	splx(s);
   2214 
   2215 	for (j = 0; j < nslots; j++)
   2216 		++sc->sc_bws[best * nslots + j];
   2217 	opipe->u.intr.nslots = nslots;
   2218 	opipe->u.intr.pos = best;
   2219 
   2220 	DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe));
   2221 	return (USBD_NORMAL_COMPLETION);
   2222 }
   2223 
   2224