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ohci.c revision 1.22
      1 /*	$NetBSD: ohci.c,v 1.22 1999/01/07 01:59:24 augustss Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1998 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Lennart Augustsson (augustss (at) carlstedt.se) at
      9  * Carlstedt Research & Technology.
     10  *
     11  * Redistribution and use in source and binary forms, with or without
     12  * modification, are permitted provided that the following conditions
     13  * are met:
     14  * 1. Redistributions of source code must retain the above copyright
     15  *    notice, this list of conditions and the following disclaimer.
     16  * 2. Redistributions in binary form must reproduce the above copyright
     17  *    notice, this list of conditions and the following disclaimer in the
     18  *    documentation and/or other materials provided with the distribution.
     19  * 3. All advertising materials mentioning features or use of this software
     20  *    must display the following acknowledgement:
     21  *        This product includes software developed by the NetBSD
     22  *        Foundation, Inc. and its contributors.
     23  * 4. Neither the name of The NetBSD Foundation nor the names of its
     24  *    contributors may be used to endorse or promote products derived
     25  *    from this software without specific prior written permission.
     26  *
     27  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     28  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     29  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     30  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     31  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     32  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     33  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     34  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     35  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     36  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     37  * POSSIBILITY OF SUCH DAMAGE.
     38  */
     39 
     40 /*
     41  * USB Open Host Controller driver.
     42  *
     43  * OHCI spec: http://www.intel.com/design/usb/ohci11d.pdf
     44  * USB spec: http://www.teleport.com/cgi-bin/mailmerge.cgi/~usb/cgiform.tpl
     45  */
     46 
     47 #include <sys/param.h>
     48 #include <sys/systm.h>
     49 #include <sys/kernel.h>
     50 #include <sys/malloc.h>
     51 #if defined(__NetBSD__)
     52 #include <sys/device.h>
     53 #elif defined(__FreeBSD__)
     54 #include <sys/module.h>
     55 #include <sys/bus.h>
     56 #endif
     57 #include <sys/proc.h>
     58 #include <sys/queue.h>
     59 #include <sys/select.h>
     60 
     61 #include <machine/bus.h>
     62 #include <machine/endian.h>
     63 
     64 #include <dev/usb/usb.h>
     65 #include <dev/usb/usbdi.h>
     66 #include <dev/usb/usbdivar.h>
     67 #include <dev/usb/usb_quirks.h>
     68 #include <dev/usb/usb_mem.h>
     69 
     70 #include <dev/usb/ohcireg.h>
     71 #include <dev/usb/ohcivar.h>
     72 
     73 #if defined(__FreeBSD__)
     74 #include <machine/clock.h>
     75 #include "dev/usb/queue.addendum.h"
     76 
     77 #define delay(d)                DELAY(d)
     78 
     79 #endif
     80 
     81 /*
     82  * The OHCI controller is little endian, so on big endian machines
     83  * the data strored in memory needs to be swapped.
     84  */
     85 #if BYTE_ORDER == BIG_ENDIAN
     86 #define LE(x) (bswap32(x))
     87 #else
     88 #define LE(x) (x)
     89 #endif
     90 
     91 struct ohci_pipe;
     92 
     93 ohci_soft_ed_t *ohci_alloc_sed __P((ohci_softc_t *));
     94 void		ohci_free_sed __P((ohci_softc_t *, ohci_soft_ed_t *));
     95 
     96 ohci_soft_td_t *ohci_alloc_std __P((ohci_softc_t *));
     97 void		ohci_free_std __P((ohci_softc_t *, ohci_soft_td_t *));
     98 
     99 usbd_status	ohci_open __P((usbd_pipe_handle));
    100 void		ohci_poll __P((struct usbd_bus *));
    101 void		ohci_waitintr __P((ohci_softc_t *, usbd_request_handle));
    102 void		ohci_rhsc __P((ohci_softc_t *, usbd_request_handle));
    103 void		ohci_process_done __P((ohci_softc_t *, ohci_physaddr_t));
    104 void		ohci_idone __P((ohci_softc_t *, usbd_request_handle));
    105 void		ohci_done __P((ohci_softc_t *, usbd_request_handle));
    106 void		ohci_ctrl_done __P((ohci_softc_t *, usbd_request_handle));
    107 void		ohci_intr_done __P((ohci_softc_t *, usbd_request_handle));
    108 void		ohci_bulk_done __P((ohci_softc_t *, usbd_request_handle));
    109 
    110 usbd_status	ohci_device_request __P((usbd_request_handle reqh));
    111 void		ohci_add_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *));
    112 void		ohci_rem_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *));
    113 void		ohci_hash_add_td __P((ohci_softc_t *, ohci_soft_td_t *));
    114 void		ohci_hash_rem_td __P((ohci_softc_t *, ohci_soft_td_t *));
    115 ohci_soft_td_t *ohci_hash_find_td __P((ohci_softc_t *, ohci_physaddr_t));
    116 
    117 usbd_status	ohci_root_ctrl_transfer __P((usbd_request_handle));
    118 usbd_status	ohci_root_ctrl_start __P((usbd_request_handle));
    119 void		ohci_root_ctrl_abort __P((usbd_request_handle));
    120 void		ohci_root_ctrl_close __P((usbd_pipe_handle));
    121 
    122 usbd_status	ohci_root_intr_transfer __P((usbd_request_handle));
    123 usbd_status	ohci_root_intr_start __P((usbd_request_handle));
    124 void		ohci_root_intr_abort __P((usbd_request_handle));
    125 void		ohci_root_intr_close __P((usbd_pipe_handle));
    126 
    127 usbd_status	ohci_device_ctrl_transfer __P((usbd_request_handle));
    128 usbd_status	ohci_device_ctrl_start __P((usbd_request_handle));
    129 void		ohci_device_ctrl_abort __P((usbd_request_handle));
    130 void		ohci_device_ctrl_close __P((usbd_pipe_handle));
    131 
    132 usbd_status	ohci_device_bulk_transfer __P((usbd_request_handle));
    133 usbd_status	ohci_device_bulk_start __P((usbd_request_handle));
    134 void		ohci_device_bulk_abort __P((usbd_request_handle));
    135 void		ohci_device_bulk_close __P((usbd_pipe_handle));
    136 
    137 usbd_status	ohci_device_intr_transfer __P((usbd_request_handle));
    138 usbd_status	ohci_device_intr_start __P((usbd_request_handle));
    139 void		ohci_device_intr_abort __P((usbd_request_handle));
    140 void		ohci_device_intr_close __P((usbd_pipe_handle));
    141 usbd_status	ohci_device_setintr __P((ohci_softc_t *sc,
    142 					 struct ohci_pipe *pipe, int ival));
    143 
    144 int		ohci_str __P((usb_string_descriptor_t *, int, char *));
    145 
    146 void		ohci_timeout __P((void *));
    147 void		ohci_rhsc_able __P((ohci_softc_t *, int));
    148 
    149 void		ohci_close_pipe __P((usbd_pipe_handle pipe,
    150 				     ohci_soft_ed_t *head));
    151 void		ohci_abort_request __P((usbd_request_handle reqh));
    152 
    153 #ifdef USB_DEBUG
    154 ohci_softc_t   *thesc;
    155 void		ohci_dumpregs __P((ohci_softc_t *));
    156 void		ohci_dump_tds __P((ohci_soft_td_t *));
    157 void		ohci_dump_td __P((ohci_soft_td_t *));
    158 void		ohci_dump_ed __P((ohci_soft_ed_t *));
    159 #endif
    160 
    161 #if defined(__NetBSD__)
    162 #define OWRITE4(sc, r, x) bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x))
    163 #define OREAD4(sc, r) bus_space_read_4((sc)->iot, (sc)->ioh, (r))
    164 #define OREAD2(sc, r) bus_space_read_2((sc)->iot, (sc)->ioh, (r))
    165 #elif defined(__FreeBSD__)
    166 #define OWRITE4(sc, r, x) outl((sc)->sc_iobase + (r), (x))
    167 #define OREAD4(sc, r) inl((sc)->sc_iobase + (r))
    168 #define OREAD2(sc, r) inw((sc)->sc_iobase + (r))
    169 #endif
    170 
    171 /* Reverse the bits in a value 0 .. 31 */
    172 static u_int8_t revbits[OHCI_NO_INTRS] =
    173   { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c,
    174     0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e,
    175     0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d,
    176     0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f };
    177 
    178 struct ohci_pipe {
    179 	struct usbd_pipe pipe;
    180 	ohci_soft_ed_t *sed;
    181 	ohci_soft_td_t *tail;
    182 	/* Info needed for different pipe kinds. */
    183 	union {
    184 		/* Control pipe */
    185 		struct {
    186 			usb_dma_t datadma;
    187 			usb_dma_t reqdma;
    188 			u_int length;
    189 			ohci_soft_td_t *setup, *xfer, *stat;
    190 		} ctl;
    191 		/* Interrupt pipe */
    192 		struct {
    193 			usb_dma_t datadma;
    194 			int nslots;
    195 			int pos;
    196 		} intr;
    197 		/* Bulk pipe */
    198 		struct {
    199 			usb_dma_t datadma;
    200 			u_int length;
    201 		} bulk;
    202 	} u;
    203 };
    204 
    205 #define OHCI_INTR_ENDPT 1
    206 
    207 struct usbd_methods ohci_root_ctrl_methods = {
    208 	ohci_root_ctrl_transfer,
    209 	ohci_root_ctrl_start,
    210 	ohci_root_ctrl_abort,
    211 	ohci_root_ctrl_close,
    212 	0,
    213 };
    214 
    215 struct usbd_methods ohci_root_intr_methods = {
    216 	ohci_root_intr_transfer,
    217 	ohci_root_intr_start,
    218 	ohci_root_intr_abort,
    219 	ohci_root_intr_close,
    220 	0,
    221 };
    222 
    223 struct usbd_methods ohci_device_ctrl_methods = {
    224 	ohci_device_ctrl_transfer,
    225 	ohci_device_ctrl_start,
    226 	ohci_device_ctrl_abort,
    227 	ohci_device_ctrl_close,
    228 	0,
    229 };
    230 
    231 struct usbd_methods ohci_device_intr_methods = {
    232 	ohci_device_intr_transfer,
    233 	ohci_device_intr_start,
    234 	ohci_device_intr_abort,
    235 	ohci_device_intr_close,
    236 };
    237 
    238 struct usbd_methods ohci_device_bulk_methods = {
    239 	ohci_device_bulk_transfer,
    240 	ohci_device_bulk_start,
    241 	ohci_device_bulk_abort,
    242 	ohci_device_bulk_close,
    243 	0,
    244 };
    245 
    246 ohci_soft_ed_t *
    247 ohci_alloc_sed(sc)
    248 	ohci_softc_t *sc;
    249 {
    250 	ohci_soft_ed_t *sed;
    251 	usbd_status r;
    252 	int i, offs;
    253 	usb_dma_t dma;
    254 
    255 	if (!sc->sc_freeeds) {
    256 		DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n"));
    257 		sed = malloc(sizeof(ohci_soft_ed_t) * OHCI_ED_CHUNK,
    258 			     M_USBDEV, M_NOWAIT);
    259 		if (!sed)
    260 			return 0;
    261 		r = usb_allocmem(sc->sc_dmatag, OHCI_ED_SIZE * OHCI_ED_CHUNK,
    262 				 OHCI_ED_ALIGN, &dma);
    263 		if (r != USBD_NORMAL_COMPLETION) {
    264 			free(sed, M_USBDEV);
    265 			return 0;
    266 		}
    267 		for(i = 0; i < OHCI_ED_CHUNK; i++, sed++) {
    268 			offs = i * OHCI_ED_SIZE;
    269 			sed->physaddr = DMAADDR(&dma) + offs;
    270 			sed->ed = (ohci_ed_t *)
    271 					((char *)KERNADDR(&dma) + offs);
    272 			sed->next = sc->sc_freeeds;
    273 			sc->sc_freeeds = sed;
    274 		}
    275 	}
    276 	sed = sc->sc_freeeds;
    277 	sc->sc_freeeds = sed->next;
    278 	memset(sed->ed, 0, OHCI_ED_SIZE);
    279 	sed->next = 0;
    280 	return sed;
    281 }
    282 
    283 void
    284 ohci_free_sed(sc, sed)
    285 	ohci_softc_t *sc;
    286 	ohci_soft_ed_t *sed;
    287 {
    288 	sed->next = sc->sc_freeeds;
    289 	sc->sc_freeeds = sed;
    290 }
    291 
    292 ohci_soft_td_t *
    293 ohci_alloc_std(sc)
    294 	ohci_softc_t *sc;
    295 {
    296 	ohci_soft_td_t *std;
    297 	usbd_status r;
    298 	int i, offs;
    299 	usb_dma_t dma;
    300 
    301 	if (!sc->sc_freetds) {
    302 		DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n"));
    303 		std = malloc(sizeof(ohci_soft_td_t) * OHCI_TD_CHUNK,
    304 			     M_USBDEV, M_NOWAIT);
    305 		if (!std)
    306 			return 0;
    307 		r = usb_allocmem(sc->sc_dmatag, OHCI_TD_SIZE * OHCI_TD_CHUNK,
    308 				 OHCI_TD_ALIGN, &dma);
    309 		if (r != USBD_NORMAL_COMPLETION) {
    310 			free(std, M_USBDEV);
    311 			return 0;
    312 		}
    313 		for(i = 0; i < OHCI_TD_CHUNK; i++, std++) {
    314 			offs = i * OHCI_TD_SIZE;
    315 			std->physaddr = DMAADDR(&dma) + offs;
    316 			std->td = (ohci_td_t *)
    317 					((char *)KERNADDR(&dma) + offs);
    318 			std->nexttd = sc->sc_freetds;
    319 			sc->sc_freetds = std;
    320 		}
    321 	}
    322 	std = sc->sc_freetds;
    323 	sc->sc_freetds = std->nexttd;
    324 	memset(std->td, 0, OHCI_TD_SIZE);
    325 	std->nexttd = 0;
    326 	return (std);
    327 }
    328 
    329 void
    330 ohci_free_std(sc, std)
    331 	ohci_softc_t *sc;
    332 	ohci_soft_td_t *std;
    333 {
    334 	std->nexttd = sc->sc_freetds;
    335 	sc->sc_freetds = std;
    336 }
    337 
    338 usbd_status
    339 ohci_init(sc)
    340 	ohci_softc_t *sc;
    341 {
    342 	ohci_soft_ed_t *sed, *psed;
    343 	usbd_status r;
    344 	int rev;
    345 	int i;
    346 	u_int32_t s, ctl, ival, hcr, fm, per;
    347 
    348 	DPRINTF(("ohci_init: start\n"));
    349 	rev = OREAD4(sc, OHCI_REVISION);
    350 	printf("%s: OHCI version %d.%d%s\n", USBDEVNAME(sc->sc_bus.bdev),
    351 	       OHCI_REV_HI(rev), OHCI_REV_LO(rev),
    352 	       OHCI_REV_LEGACY(rev) ? ", legacy support" : "");
    353 	if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) {
    354 		printf("%s: unsupported OHCI revision\n",
    355 		       USBDEVNAME(sc->sc_bus.bdev));
    356 		return (USBD_INVAL);
    357 	}
    358 
    359 	for (i = 0; i < OHCI_HASH_SIZE; i++)
    360 		LIST_INIT(&sc->sc_hash_tds[i]);
    361 
    362 	/* Allocate the HCCA area. */
    363 	r = usb_allocmem(sc->sc_dmatag, OHCI_HCCA_SIZE,
    364 			 OHCI_HCCA_ALIGN, &sc->sc_hccadma);
    365 	if (r != USBD_NORMAL_COMPLETION)
    366 		return (r);
    367 	sc->sc_hcca = (struct ohci_hcca *)KERNADDR(&sc->sc_hccadma);
    368 	memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE);
    369 
    370 	sc->sc_eintrs = OHCI_NORMAL_INTRS;
    371 
    372 	sc->sc_ctrl_head = ohci_alloc_sed(sc);
    373 	if (!sc->sc_ctrl_head) {
    374 		r = USBD_NOMEM;
    375 		goto bad1;
    376 	}
    377 	sc->sc_ctrl_head->ed->ed_flags |= LE(OHCI_ED_SKIP);
    378 	sc->sc_bulk_head = ohci_alloc_sed(sc);
    379 	if (!sc->sc_bulk_head) {
    380 		r = USBD_NOMEM;
    381 		goto bad2;
    382 	}
    383 	sc->sc_bulk_head->ed->ed_flags |= LE(OHCI_ED_SKIP);
    384 
    385 	/* Allocate all the dummy EDs that make up the interrupt tree. */
    386 	for (i = 0; i < OHCI_NO_EDS; i++) {
    387 		sed = ohci_alloc_sed(sc);
    388 		if (!sed) {
    389 			while (--i >= 0)
    390 				ohci_free_sed(sc, sc->sc_eds[i]);
    391 			r = USBD_NOMEM;
    392 			goto bad3;
    393 		}
    394 		/* All ED fields are set to 0. */
    395 		sc->sc_eds[i] = sed;
    396 		sed->ed->ed_flags |= LE(OHCI_ED_SKIP);
    397 		if (i != 0) {
    398 			psed = sc->sc_eds[(i-1) / 2];
    399 			sed->next = psed;
    400 			sed->ed->ed_nexted = LE(psed->physaddr);
    401 		}
    402 	}
    403 	/*
    404 	 * Fill HCCA interrupt table.  The bit reversal is to get
    405 	 * the tree set up properly to spread the interrupts.
    406 	 */
    407 	for (i = 0; i < OHCI_NO_INTRS; i++)
    408 		sc->sc_hcca->hcca_interrupt_table[revbits[i]] =
    409 			LE(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr);
    410 
    411 	/* Determine in what context we are running. */
    412 	ctl = OREAD4(sc, OHCI_CONTROL);
    413 	if (ctl & OHCI_IR) {
    414 		/* SMM active, request change */
    415 		DPRINTF(("ohci_init: SMM active, request owner change\n"));
    416 		s = OREAD4(sc, OHCI_COMMAND_STATUS);
    417 		OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR);
    418 		for (i = 0; i < 100 && (ctl & OHCI_IR); i++) {
    419 			delay(1000);
    420 			ctl = OREAD4(sc, OHCI_CONTROL);
    421 		}
    422 		if ((ctl & OHCI_IR) == 0) {
    423 			printf("%s: SMM does not respond, resetting\n",
    424 			       USBDEVNAME(sc->sc_bus.bdev));
    425 			OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
    426 			goto reset;
    427 		}
    428 	} else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) {
    429 		/* BIOS started controller. */
    430 		DPRINTF(("ohci_init: BIOS active\n"));
    431 		if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) {
    432 			OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL);
    433 			delay(USB_RESUME_DELAY * 1000);
    434 		}
    435 	} else {
    436 		DPRINTF(("ohci_init: cold started\n"));
    437 	reset:
    438 		/* Controller was cold started. */
    439 		delay(USB_BUS_RESET_DELAY * 1000);
    440 	}
    441 
    442 	/*
    443 	 * This reset should be necessary according to the OHCI spec, but
    444 	 * without it some controller don't start.
    445 	 */
    446 	DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev)));
    447 	OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
    448 	delay(USB_BUS_RESET_DELAY * 1000);
    449 
    450 	/* We now own the host controller and the bus has been reset. */
    451 	ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL));
    452 
    453 	OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */
    454 	/* Nominal time for a reset is 10 us. */
    455 	for (i = 0; i < 10; i++) {
    456 		delay(10);
    457 		hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR;
    458 		if (!hcr)
    459 			break;
    460 	}
    461 	if (hcr) {
    462 		printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev));
    463 		r = USBD_IOERROR;
    464 		goto bad3;
    465 	}
    466 #ifdef USB_DEBUG
    467 	thesc = sc;
    468 	if (ohcidebug > 15)
    469 		ohci_dumpregs(sc);
    470 #endif
    471 
    472 	/* The controller is now in suspend state, we have 2ms to finish. */
    473 
    474 	/* Set up HC registers. */
    475 	OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma));
    476 	OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
    477 	OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
    478 	OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
    479 	OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE);
    480 	ctl = OREAD4(sc, OHCI_CONTROL);
    481 	ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR);
    482 	ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE |
    483 		OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL;
    484 	/* And finally start it! */
    485 	OWRITE4(sc, OHCI_CONTROL, ctl);
    486 
    487 	/*
    488 	 * The controller is now OPERATIONAL.  Set a some final
    489 	 * registers that should be set earlier, but that the
    490 	 * controller ignores when in the SUSPEND state.
    491 	 */
    492 	fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT;
    493 	fm |= OHCI_FSMPS(ival) | ival;
    494 	OWRITE4(sc, OHCI_FM_INTERVAL, fm);
    495 	per = OHCI_PERIODIC(ival); /* 90% periodic */
    496 	OWRITE4(sc, OHCI_PERIODIC_START, per);
    497 
    498 	OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC);	/* Enable port power */
    499 
    500 	sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A));
    501 
    502 #ifdef USB_DEBUG
    503 	if (ohcidebug > 5)
    504 		ohci_dumpregs(sc);
    505 #endif
    506 
    507 	/* Set up the bus struct. */
    508 	sc->sc_bus.open_pipe = ohci_open;
    509 	sc->sc_bus.pipe_size = sizeof(struct ohci_pipe);
    510 	sc->sc_bus.do_poll = ohci_poll;
    511 
    512 	return (USBD_NORMAL_COMPLETION);
    513 
    514  bad3:
    515 	ohci_free_sed(sc, sc->sc_ctrl_head);
    516  bad2:
    517 	ohci_free_sed(sc, sc->sc_bulk_head);
    518  bad1:
    519 	usb_freemem(sc->sc_dmatag, &sc->sc_hccadma);
    520 	return (r);
    521 }
    522 
    523 #ifdef USB_DEBUG
    524 void ohcidump(void);
    525 void ohcidump(void) { ohci_dumpregs(thesc); }
    526 
    527 void
    528 ohci_dumpregs(sc)
    529 	ohci_softc_t *sc;
    530 {
    531 	printf("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n",
    532 	       OREAD4(sc, OHCI_REVISION),
    533 	       OREAD4(sc, OHCI_CONTROL),
    534 	       OREAD4(sc, OHCI_COMMAND_STATUS));
    535 	printf("               intrstat=0x%08x intre=0x%08x intrd=0x%08x\n",
    536 	       OREAD4(sc, OHCI_INTERRUPT_STATUS),
    537 	       OREAD4(sc, OHCI_INTERRUPT_ENABLE),
    538 	       OREAD4(sc, OHCI_INTERRUPT_DISABLE));
    539 	printf("               hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n",
    540 	       OREAD4(sc, OHCI_HCCA),
    541 	       OREAD4(sc, OHCI_PERIOD_CURRENT_ED),
    542 	       OREAD4(sc, OHCI_CONTROL_HEAD_ED));
    543 	printf("               ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n",
    544 	       OREAD4(sc, OHCI_CONTROL_CURRENT_ED),
    545 	       OREAD4(sc, OHCI_BULK_HEAD_ED),
    546 	       OREAD4(sc, OHCI_BULK_CURRENT_ED));
    547 	printf("               done=0x%08x fmival=0x%08x fmrem=0x%08x\n",
    548 	       OREAD4(sc, OHCI_DONE_HEAD),
    549 	       OREAD4(sc, OHCI_FM_INTERVAL),
    550 	       OREAD4(sc, OHCI_FM_REMAINING));
    551 	printf("               fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n",
    552 	       OREAD4(sc, OHCI_FM_NUMBER),
    553 	       OREAD4(sc, OHCI_PERIODIC_START),
    554 	       OREAD4(sc, OHCI_LS_THRESHOLD));
    555 	printf("               desca=0x%08x descb=0x%08x stat=0x%08x\n",
    556 	       OREAD4(sc, OHCI_RH_DESCRIPTOR_A),
    557 	       OREAD4(sc, OHCI_RH_DESCRIPTOR_B),
    558 	       OREAD4(sc, OHCI_RH_STATUS));
    559 	printf("               port1=0x%08x port2=0x%08x\n",
    560 	       OREAD4(sc, OHCI_RH_PORT_STATUS(1)),
    561 	       OREAD4(sc, OHCI_RH_PORT_STATUS(2)));
    562 	printf("         HCCA: frame_number=0x%04x done_head=0x%08x\n",
    563 	       LE(sc->sc_hcca->hcca_frame_number),
    564 	       LE(sc->sc_hcca->hcca_done_head));
    565 }
    566 #endif
    567 
    568 int
    569 ohci_intr(p)
    570 	void *p;
    571 {
    572 	ohci_softc_t *sc = p;
    573 	u_int32_t intrs, eintrs;
    574 	ohci_physaddr_t done;
    575 
    576 	/* In case the interrupt occurs before initialization has completed. */
    577 	if (sc == NULL || sc->sc_hcca == NULL) {
    578 #ifdef DIAGNOSTIC
    579 		printf("ohci_intr: sc->sc_hcca == NULL\n");
    580 #endif
    581 		return (0);
    582 	}
    583 
    584 	done = LE(sc->sc_hcca->hcca_done_head);
    585 	if (done != 0) {
    586 		intrs = OHCI_WDH;
    587 		if (done & OHCI_DONE_INTRS)
    588 			intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS);
    589 	} else
    590 		intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS);
    591 	if (!intrs)
    592 		return (0);
    593 	intrs &= ~OHCI_MIE;
    594 	OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */
    595 	eintrs = intrs & sc->sc_eintrs;
    596 	if (!eintrs)
    597 		return (0);
    598 
    599 	sc->sc_intrs++;
    600 	DPRINTFN(7, ("ohci_intr: sc=%p intrs=%x(%x) eintr=%x\n",
    601 		     sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS),
    602 		     (u_int)eintrs));
    603 
    604 	if (eintrs & OHCI_SO) {
    605 		printf("%s: scheduling overrun\n",USBDEVNAME(sc->sc_bus.bdev));
    606 		/* XXX do what */
    607 		intrs &= ~OHCI_SO;
    608 	}
    609 	if (eintrs & OHCI_WDH) {
    610 		ohci_process_done(sc, done &~ OHCI_DONE_INTRS);
    611 		sc->sc_hcca->hcca_done_head = 0;
    612 		intrs &= ~OHCI_WDH;
    613 	}
    614 	if (eintrs & OHCI_RD) {
    615 		/* XXX process resume detect */
    616 	}
    617 	if (eintrs & OHCI_UE) {
    618 		printf("%s: unrecoverable error, controller halted\n",
    619 		       USBDEVNAME(sc->sc_bus.bdev));
    620 		OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
    621 		/* XXX what else */
    622 	}
    623 	if (eintrs & OHCI_RHSC) {
    624 		ohci_rhsc(sc, sc->sc_intrreqh);
    625 		intrs &= ~OHCI_RHSC;
    626 
    627 		/*
    628 		 * Disable RHSC interrupt for now, because it will be
    629 		 * on until the port has been reset.
    630 		 */
    631 		ohci_rhsc_able(sc, 0);
    632 	}
    633 
    634 	/* Block unprocessed interrupts. XXX */
    635 	OWRITE4(sc, OHCI_INTERRUPT_DISABLE, intrs);
    636 	sc->sc_eintrs &= ~intrs;
    637 
    638 	return (1);
    639 }
    640 
    641 void
    642 ohci_rhsc_able(sc, on)
    643 	ohci_softc_t *sc;
    644 	int on;
    645 {
    646 	DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on));
    647 	if (on) {
    648 		sc->sc_eintrs |= OHCI_RHSC;
    649 		OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC);
    650 	} else {
    651 		sc->sc_eintrs &= ~OHCI_RHSC;
    652 		OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC);
    653 	}
    654 }
    655 
    656 #ifdef USB_DEBUG
    657 char *ohci_cc_strs[] = {
    658 	"NO_ERROR",
    659 	"CRC",
    660 	"BIT_STUFFING",
    661 	"DATA_TOGGLE_MISMATCH",
    662 	"STALL",
    663 	"DEVICE_NOT_RESPONDING",
    664 	"PID_CHECK_FAILURE",
    665 	"UNEXPECTED_PID",
    666 	"DATA_OVERRUN",
    667 	"DATA_UNDERRUN",
    668 	"BUFFER_OVERRUN",
    669 	"BUFFER_UNDERRUN",
    670 	"NOT_ACCESSED",
    671 };
    672 #endif
    673 
    674 void
    675 ohci_process_done(sc, done)
    676 	ohci_softc_t *sc;
    677 	ohci_physaddr_t done;
    678 {
    679 	ohci_soft_td_t *std, *sdone;
    680 	usbd_request_handle reqh;
    681 	int len, cc;
    682 
    683 	DPRINTFN(10,("ohci_process_done: done=0x%08lx\n", (u_long)done));
    684 
    685 	/* Reverse the done list. */
    686 	for (sdone = 0; done; done = LE(std->td->td_nexttd)) {
    687 		std = ohci_hash_find_td(sc, done);
    688 		std->dnext = sdone;
    689 		sdone = std;
    690 	}
    691 
    692 #ifdef USB_DEBUG
    693 	if (ohcidebug > 10) {
    694 		printf("ohci_process_done: TD done:\n");
    695 		ohci_dump_tds(sdone);
    696 	}
    697 #endif
    698 
    699 	for (std = sdone; std; std = std->dnext) {
    700 		reqh = std->reqh;
    701 		DPRINTFN(10, ("ohci_process_done: std=%p reqh=%p\n",std,reqh));
    702 		cc = OHCI_TD_GET_CC(LE(std->td->td_flags));
    703 		if (reqh->status == USBD_CANCELLED ||
    704 		    reqh->status == USBD_TIMEOUT) {
    705 			DPRINTF(("ohci_process_done: cancel/timeout %p\n",
    706 				 reqh));
    707 			ohci_idone(sc, reqh);
    708 		} else if (cc == OHCI_CC_NO_ERROR) {
    709 			if (std->td->td_cbp == 0)
    710 				len = std->len;
    711 			else
    712 				len = LE(std->td->td_be) -
    713 				      LE(std->td->td_cbp) + 1;
    714 			if (std->flags & OHCI_SET_LEN)
    715 				reqh->actlen = len;
    716 			if (std->flags & OHCI_CALL_DONE) {
    717 				reqh->status = USBD_NORMAL_COMPLETION;
    718 				ohci_idone(sc, reqh);
    719 			}
    720 		} else {
    721 			ohci_soft_td_t *p, *n;
    722 			struct ohci_pipe *opipe =
    723 				(struct ohci_pipe *)reqh->pipe;
    724 			DPRINTFN(-1,("ohci_process_done: error cc=%d (%s)\n",
    725 			 OHCI_TD_GET_CC(LE(std->td->td_flags)),
    726 			 ohci_cc_strs[OHCI_TD_GET_CC(LE(std->td->td_flags))]));
    727 			/*
    728 			 * Endpoint is halted.  First unlink all the TDs
    729 			 * belonging to the failed transfer, and then restart
    730 			 * the endpoint.
    731 			 */
    732 			for (p = std->nexttd; p->reqh == reqh; p = n) {
    733 				n = p->nexttd;
    734 				ohci_hash_rem_td(sc, p);
    735 				ohci_free_std(sc, p);
    736 			}
    737 			/* clear halt */
    738 			opipe->sed->ed->ed_headp = LE(p->physaddr);
    739 			OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
    740 
    741 			if (cc == OHCI_CC_STALL)
    742 				reqh->status = USBD_STALLED;
    743 			else
    744 				reqh->status = USBD_IOERROR;
    745 			ohci_idone(sc, reqh);
    746 		}
    747 		ohci_hash_rem_td(sc, std);
    748 		ohci_free_std(sc, std);
    749 	}
    750 }
    751 
    752 void
    753 ohci_idone(sc, reqh)
    754 	ohci_softc_t *sc;
    755 	usbd_request_handle reqh;
    756 {
    757 	ohci_done(sc, reqh);
    758 	if (reqh->pipe->intrreqh != reqh)
    759 		usb_start_next(reqh->pipe);
    760 }
    761 
    762 void
    763 ohci_done(sc, reqh)
    764 	ohci_softc_t *sc;
    765 	usbd_request_handle reqh;
    766 {
    767 #ifdef DIAGNOSTIC
    768 	if (!reqh->hcpriv)
    769 		printf("ohci_done: reqh=%p, no hcpriv\n", reqh);
    770 #endif
    771 	reqh->hcpriv = 0;
    772 
    773 	switch (reqh->pipe->endpoint->edesc->bmAttributes & UE_XFERTYPE) {
    774 	case UE_CONTROL:
    775 		ohci_ctrl_done(sc, reqh);
    776 		break;
    777 	case UE_INTERRUPT:
    778 		ohci_intr_done(sc, reqh);
    779 		break;
    780 	case UE_BULK:
    781 		ohci_bulk_done(sc, reqh);
    782 		break;
    783 	case UE_ISOCHRONOUS:
    784 		printf("ohci_process_done: ISO done?\n");
    785 		break;
    786 	}
    787 
    788 	/* And finally execute callback. */
    789 	reqh->xfercb(reqh);
    790 }
    791 
    792 void
    793 ohci_ctrl_done(sc, reqh)
    794 	ohci_softc_t *sc;
    795 	usbd_request_handle reqh;
    796 {
    797 	struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
    798 	u_int len = opipe->u.ctl.length;
    799 	usb_dma_t *dma;
    800 
    801 	DPRINTFN(10,("ohci_ctrl_done: reqh=%p\n", reqh));
    802 
    803 	if (!reqh->isreq) {
    804 		panic("ohci_ctrl_done: not a request\n");
    805 		return;
    806 	}
    807 
    808 	if (len != 0) {
    809 		dma = &opipe->u.ctl.datadma;
    810 		if (reqh->request.bmRequestType & UT_READ)
    811 			memcpy(reqh->buffer, KERNADDR(dma), len);
    812 		usb_freemem(sc->sc_dmatag, dma);
    813 	}
    814 	usb_untimeout(ohci_timeout, reqh, reqh->timo_handle);
    815 }
    816 
    817 void
    818 ohci_intr_done(sc, reqh)
    819 	ohci_softc_t *sc;
    820 	usbd_request_handle reqh;
    821 {
    822 	struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
    823 	usb_dma_t *dma;
    824 	ohci_soft_ed_t *sed = opipe->sed;
    825 	ohci_soft_td_t *xfer, *tail;
    826 
    827 
    828 	DPRINTFN(10,("ohci_intr_done: reqh=%p, actlen=%d\n",
    829 		     reqh, reqh->actlen));
    830 
    831 	dma = &opipe->u.intr.datadma;
    832 	memcpy(reqh->buffer, KERNADDR(dma), reqh->actlen);
    833 
    834 	if (reqh->pipe->intrreqh == reqh) {
    835 		xfer = opipe->tail;
    836 		tail = ohci_alloc_std(sc); /* XXX should reuse TD */
    837 		if (!tail) {
    838 			reqh->status = USBD_NOMEM;
    839 			return;
    840 		}
    841 		tail->reqh = 0;
    842 
    843 		xfer->td->td_flags = LE(
    844 			OHCI_TD_IN | OHCI_TD_NOCC |
    845 			OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
    846 		if (reqh->flags & USBD_SHORT_XFER_OK)
    847 			xfer->td->td_flags |= LE(OHCI_TD_R);
    848 		xfer->td->td_cbp = LE(DMAADDR(dma));
    849 		xfer->nexttd = tail;
    850 		xfer->td->td_nexttd = LE(tail->physaddr);
    851 		xfer->td->td_be = LE(LE(xfer->td->td_cbp) + reqh->length - 1);
    852 		xfer->len = reqh->length;
    853 		xfer->reqh = reqh;
    854 		xfer->flags = OHCI_CALL_DONE | OHCI_SET_LEN;
    855 		reqh->hcpriv = xfer;
    856 
    857 		ohci_hash_add_td(sc, xfer);
    858 		sed->ed->ed_tailp = LE(tail->physaddr);
    859 		opipe->tail = tail;
    860 	} else {
    861 		usb_freemem(sc->sc_dmatag, dma);
    862 	}
    863 }
    864 
    865 void
    866 ohci_bulk_done(sc, reqh)
    867 	ohci_softc_t *sc;
    868 	usbd_request_handle reqh;
    869 {
    870 	struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
    871 	usb_dma_t *dma;
    872 
    873 
    874 	DPRINTFN(10,("ohci_bulk_done: reqh=%p, actlen=%d\n",
    875 		     reqh, reqh->actlen));
    876 
    877 	dma = &opipe->u.bulk.datadma;
    878 	if (reqh->request.bmRequestType & UT_READ)
    879 		memcpy(reqh->buffer, KERNADDR(dma), reqh->actlen);
    880 	usb_freemem(sc->sc_dmatag, dma);
    881 	usb_untimeout(ohci_timeout, reqh, reqh->timo_handle);
    882 }
    883 
    884 void
    885 ohci_rhsc(sc, reqh)
    886 	ohci_softc_t *sc;
    887 	usbd_request_handle reqh;
    888 {
    889 	usbd_pipe_handle pipe;
    890 	struct ohci_pipe *opipe;
    891 	u_char *p;
    892 	int i, m;
    893 	int hstatus;
    894 
    895 	hstatus = OREAD4(sc, OHCI_RH_STATUS);
    896 	DPRINTF(("ohci_rhsc: sc=%p reqh=%p hstatus=0x%08x\n",
    897 		 sc, reqh, hstatus));
    898 
    899 	if (reqh == 0) {
    900 		/* Just ignore the change. */
    901 		return;
    902 	}
    903 
    904 	pipe = reqh->pipe;
    905 	opipe = (struct ohci_pipe *)pipe;
    906 
    907 	p = KERNADDR(&opipe->u.intr.datadma);
    908 	m = min(sc->sc_noport, reqh->length * 8 - 1);
    909 	memset(p, 0, reqh->length);
    910 	for (i = 1; i <= m; i++) {
    911 		if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16)
    912 			p[i/8] |= 1 << (i%8);
    913 	}
    914 	DPRINTF(("ohci_rhsc: change=0x%02x\n", *p));
    915 	reqh->actlen = reqh->length;
    916 	reqh->status = USBD_NORMAL_COMPLETION;
    917 	reqh->xfercb(reqh);
    918 
    919 	if (reqh->pipe->intrreqh != reqh) {
    920 		sc->sc_intrreqh = 0;
    921 		usb_freemem(sc->sc_dmatag, &opipe->u.intr.datadma);
    922 		usb_start_next(reqh->pipe);
    923 	}
    924 }
    925 
    926 /*
    927  * Wait here until controller claims to have an interrupt.
    928  * Then call ohci_intr and return.  Use timeout to avoid waiting
    929  * too long.
    930  */
    931 void
    932 ohci_waitintr(sc, reqh)
    933 	ohci_softc_t *sc;
    934 	usbd_request_handle reqh;
    935 {
    936 	int timo = reqh->timeout;
    937 	int usecs;
    938 	u_int32_t intrs;
    939 
    940 	reqh->status = USBD_IN_PROGRESS;
    941 	for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) {
    942 		usb_delay_ms(&sc->sc_bus, 1);
    943 		intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs;
    944 		DPRINTFN(10,("ohci_waitintr: 0x%04x\n", intrs));
    945 #ifdef USB_DEBUG
    946 		if (ohcidebug > 15)
    947 			ohci_dumpregs(sc);
    948 #endif
    949 		if (intrs) {
    950 			ohci_intr(sc);
    951 			if (reqh->status != USBD_IN_PROGRESS)
    952 				return;
    953 		}
    954 	}
    955 
    956 	/* Timeout */
    957 	DPRINTF(("ohci_waitintr: timeout\n"));
    958 	reqh->status = USBD_TIMEOUT;
    959 	ohci_idone(sc, reqh);
    960 	/* XXX should free TD */
    961 }
    962 
    963 void
    964 ohci_poll(bus)
    965 	struct usbd_bus *bus;
    966 {
    967 	ohci_softc_t *sc = (ohci_softc_t *)bus;
    968 
    969 	if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs)
    970 		ohci_intr(sc);
    971 }
    972 
    973 usbd_status
    974 ohci_device_request(reqh)
    975 	usbd_request_handle reqh;
    976 {
    977 	struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
    978 	usb_device_request_t *req = &reqh->request;
    979 	usbd_device_handle dev = opipe->pipe.device;
    980 	ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
    981 	int addr = dev->address;
    982 	ohci_soft_td_t *setup, *xfer = 0, *stat, *next, *tail;
    983 	ohci_soft_ed_t *sed;
    984 	usb_dma_t *dmap;
    985 	int isread;
    986 	int len;
    987 	usbd_status r;
    988 	int s;
    989 
    990 	isread = req->bmRequestType & UT_READ;
    991 	len = UGETW(req->wLength);
    992 
    993 	DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, "
    994 		    "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
    995 		    req->bmRequestType, req->bRequest, UGETW(req->wValue),
    996 		    UGETW(req->wIndex), len, addr,
    997 		    opipe->pipe.endpoint->edesc->bEndpointAddress));
    998 
    999 	setup = opipe->tail;
   1000 	stat = ohci_alloc_std(sc);
   1001 	if (!stat) {
   1002 		r = USBD_NOMEM;
   1003 		goto bad1;
   1004 	}
   1005 	tail = ohci_alloc_std(sc);
   1006 	if (!tail) {
   1007 		r = USBD_NOMEM;
   1008 		goto bad2;
   1009 	}
   1010 	tail->reqh = 0;
   1011 
   1012 	sed = opipe->sed;
   1013 	dmap = &opipe->u.ctl.datadma;
   1014 	opipe->u.ctl.length = len;
   1015 
   1016 	/* Update device address and length since they may have changed. */
   1017 	/* XXX This only needs to be done once, but it's too early in open. */
   1018 	sed->ed->ed_flags = LE(
   1019 	 (LE(sed->ed->ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) |
   1020 	 OHCI_ED_SET_FA(addr) |
   1021 	 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize)));
   1022 
   1023 	/* Set up data transaction */
   1024 	if (len != 0) {
   1025 		xfer = ohci_alloc_std(sc);
   1026 		if (!xfer) {
   1027 			r = USBD_NOMEM;
   1028 			goto bad3;
   1029 		}
   1030 		r = usb_allocmem(sc->sc_dmatag, len, 0, dmap);
   1031 		if (r != USBD_NORMAL_COMPLETION)
   1032 			goto bad4;
   1033 		xfer->td->td_flags = LE(
   1034 			(isread ? OHCI_TD_IN : OHCI_TD_OUT) | OHCI_TD_NOCC |
   1035 			OHCI_TD_TOGGLE_1 | OHCI_TD_NOINTR |
   1036 			(reqh->flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0));
   1037 		xfer->td->td_cbp = LE(DMAADDR(dmap));
   1038 		xfer->nexttd = stat;
   1039 		xfer->td->td_nexttd = LE(stat->physaddr);
   1040 		xfer->td->td_be = LE(LE(xfer->td->td_cbp) + len - 1);
   1041 		xfer->len = len;
   1042 		xfer->reqh = reqh;
   1043 		xfer->flags = OHCI_SET_LEN;
   1044 
   1045 		next = xfer;
   1046 		stat->flags = OHCI_CALL_DONE;
   1047 	} else {
   1048 		next = stat;
   1049 		stat->flags = OHCI_CALL_DONE | OHCI_SET_LEN;
   1050 	}
   1051 
   1052 	memcpy(KERNADDR(&opipe->u.ctl.reqdma), req, sizeof *req);
   1053 	if (!isread && len != 0)
   1054 		memcpy(KERNADDR(dmap), reqh->buffer, len);
   1055 
   1056 	setup->td->td_flags = LE(OHCI_TD_SETUP | OHCI_TD_NOCC |
   1057 				 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR);
   1058 	setup->td->td_cbp = LE(DMAADDR(&opipe->u.ctl.reqdma));
   1059 	setup->nexttd = next;
   1060 	setup->td->td_nexttd = LE(next->physaddr);
   1061 	setup->td->td_be = LE(LE(setup->td->td_cbp) + sizeof *req - 1);
   1062 	setup->len = 0;		/* XXX The number of byte we count */
   1063 	setup->reqh = reqh;
   1064 	setup->flags = 0;
   1065 	reqh->hcpriv = setup;
   1066 
   1067 	stat->td->td_flags = LE(
   1068 		(isread ? OHCI_TD_OUT : OHCI_TD_IN) | OHCI_TD_NOCC |
   1069 		OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1));
   1070 	stat->td->td_cbp = 0;
   1071 	stat->nexttd = tail;
   1072 	stat->td->td_nexttd = LE(tail->physaddr);
   1073 	stat->td->td_be = 0;
   1074 	stat->len = 0;
   1075 	stat->reqh = reqh;
   1076 
   1077 #if USB_DEBUG
   1078 	if (ohcidebug > 5) {
   1079 		printf("ohci_device_request:\n");
   1080 		ohci_dump_ed(sed);
   1081 		ohci_dump_tds(setup);
   1082 	}
   1083 #endif
   1084 
   1085 	/* Insert ED in schedule */
   1086 	s = splusb();
   1087 	ohci_hash_add_td(sc, setup);
   1088 	if (len != 0)
   1089 		ohci_hash_add_td(sc, xfer);
   1090 	ohci_hash_add_td(sc, stat);
   1091 	sed->ed->ed_tailp = LE(tail->physaddr);
   1092 	opipe->tail = tail;
   1093 	OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
   1094 	if (reqh->timeout && !sc->sc_bus.use_polling) {
   1095                 usb_timeout(ohci_timeout, reqh,
   1096 			    MS_TO_TICKS(reqh->timeout), reqh->timo_handle);
   1097 	}
   1098 	splx(s);
   1099 
   1100 #if USB_DEBUG
   1101 	if (ohcidebug > 5) {
   1102 		delay(5000);
   1103 		printf("ohci_device_request: status=%x\n",
   1104 		       OREAD4(sc, OHCI_COMMAND_STATUS));
   1105 		ohci_dump_ed(sed);
   1106 		ohci_dump_tds(setup);
   1107 	}
   1108 #endif
   1109 
   1110 	return (USBD_NORMAL_COMPLETION);
   1111 
   1112  bad4:
   1113 	ohci_free_std(sc, xfer);
   1114  bad3:
   1115 	ohci_free_std(sc, tail);
   1116  bad2:
   1117 	ohci_free_std(sc, stat);
   1118  bad1:
   1119 	return (r);
   1120 }
   1121 
   1122 /*
   1123  * Add an ED to the schedule.  Called at splusb().
   1124  */
   1125 void
   1126 ohci_add_ed(sed, head)
   1127 	ohci_soft_ed_t *sed;
   1128 	ohci_soft_ed_t *head;
   1129 {
   1130 	sed->next = head->next;
   1131 	sed->ed->ed_nexted = head->ed->ed_nexted;
   1132 	head->next = sed;
   1133 	head->ed->ed_nexted = LE(sed->physaddr);
   1134 }
   1135 
   1136 /*
   1137  * Remove an ED from the schedule.  Called at splusb().
   1138  */
   1139 void
   1140 ohci_rem_ed(sed, head)
   1141 	ohci_soft_ed_t *sed;
   1142 	ohci_soft_ed_t *head;
   1143 {
   1144 	ohci_soft_ed_t *p;
   1145 
   1146 	/* XXX */
   1147 	for (p = head; p && p->next != sed; p = p->next)
   1148 		;
   1149 	if (!p)
   1150 		panic("ohci_rem_ed: ED not found\n");
   1151 	p->next = sed->next;
   1152 	p->ed->ed_nexted = sed->ed->ed_nexted;
   1153 }
   1154 
   1155 /*
   1156  * When a transfer is completed the TD is added to the done queue by
   1157  * the host controller.  This queue is the processed by software.
   1158  * Unfortunately the queue contains the physical address of the TD
   1159  * and we have no simple way to translate this back to a kernel address.
   1160  * To make the translation possible (and fast) we use a hash table of
   1161  * TDs currently in the schedule.  The physical address is used as the
   1162  * hash value.
   1163  */
   1164 
   1165 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE)
   1166 /* Called at splusb() */
   1167 void
   1168 ohci_hash_add_td(sc, std)
   1169 	ohci_softc_t *sc;
   1170 	ohci_soft_td_t *std;
   1171 {
   1172 	int h = HASH(std->physaddr);
   1173 
   1174 	LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext);
   1175 }
   1176 
   1177 /* Called at splusb() */
   1178 void
   1179 ohci_hash_rem_td(sc, std)
   1180 	ohci_softc_t *sc;
   1181 	ohci_soft_td_t *std;
   1182 {
   1183 	LIST_REMOVE(std, hnext);
   1184 }
   1185 
   1186 ohci_soft_td_t *
   1187 ohci_hash_find_td(sc, a)
   1188 	ohci_softc_t *sc;
   1189 	ohci_physaddr_t a;
   1190 {
   1191 	int h = HASH(a);
   1192 	ohci_soft_td_t *std;
   1193 
   1194 	for (std = LIST_FIRST(&sc->sc_hash_tds[h]);
   1195 	     std != 0;
   1196 	     std = LIST_NEXT(std, hnext))
   1197 		if (std->physaddr == a)
   1198 			return (std);
   1199 	panic("ohci_hash_find_td: addr 0x%08lx not found\n", (u_long)a);
   1200 }
   1201 
   1202 void
   1203 ohci_timeout(addr)
   1204 	void *addr;
   1205 {
   1206 #if 0
   1207 	usbd_request_handle *reqh = addr;
   1208 	int s;
   1209 
   1210 	DPRINTF(("ohci_timeout: reqh=%p\n", reqh));
   1211 	s = splusb();
   1212 	/* XXX need to inactivate TD before calling interrupt routine */
   1213 	ohci_XXX_done(reqh);
   1214 	splx(s);
   1215 #endif
   1216 }
   1217 
   1218 #ifdef USB_DEBUG
   1219 void
   1220 ohci_dump_tds(std)
   1221 	ohci_soft_td_t *std;
   1222 {
   1223 	for (; std; std = std->nexttd)
   1224 		ohci_dump_td(std);
   1225 }
   1226 
   1227 void
   1228 ohci_dump_td(std)
   1229 	ohci_soft_td_t *std;
   1230 {
   1231 	printf("TD(%p) at %08lx: %b delay=%d ec=%d cc=%d\ncbp=0x%08lx "
   1232 	       "nexttd=0x%08lx be=0x%08lx\n",
   1233 	       std, (u_long)std->physaddr,
   1234 	       (u_long)LE(std->td->td_flags),
   1235 	       "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE",
   1236 	       OHCI_TD_GET_DI(LE(std->td->td_flags)),
   1237 	       OHCI_TD_GET_EC(LE(std->td->td_flags)),
   1238 	       OHCI_TD_GET_CC(LE(std->td->td_flags)),
   1239 	       (u_long)LE(std->td->td_cbp),
   1240 	       (u_long)LE(std->td->td_nexttd), (u_long)LE(std->td->td_be));
   1241 }
   1242 
   1243 void
   1244 ohci_dump_ed(sed)
   1245 	ohci_soft_ed_t *sed;
   1246 {
   1247 	printf("ED(%p) at %08lx: addr=%d endpt=%d maxp=%d %b\ntailp=0x%08lx "
   1248 	       "headp=%b nexted=0x%08lx\n",
   1249 	       sed, (u_long)sed->physaddr,
   1250 	       OHCI_ED_GET_FA(LE(sed->ed->ed_flags)),
   1251 	       OHCI_ED_GET_EN(LE(sed->ed->ed_flags)),
   1252 	       OHCI_ED_GET_MAXP(LE(sed->ed->ed_flags)),
   1253 	       (u_long)LE(sed->ed->ed_flags),
   1254 	       "\20\14OUT\15IN\16LOWSPEED\17SKIP\18ISO",
   1255 	       (u_long)LE(sed->ed->ed_tailp),
   1256 	       (u_long)LE(sed->ed->ed_headp), "\20\1HALT\2CARRY",
   1257 	       (u_long)LE(sed->ed->ed_nexted));
   1258 }
   1259 #endif
   1260 
   1261 usbd_status
   1262 ohci_open(pipe)
   1263 	usbd_pipe_handle pipe;
   1264 {
   1265 	usbd_device_handle dev = pipe->device;
   1266 	ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
   1267 	usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
   1268 	struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
   1269 	u_int8_t addr = dev->address;
   1270 	ohci_soft_ed_t *sed;
   1271 	ohci_soft_td_t *std;
   1272 	usbd_status r;
   1273 	int s;
   1274 
   1275 	DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
   1276 		     pipe, addr, ed->bEndpointAddress, sc->sc_addr));
   1277 	if (addr == sc->sc_addr) {
   1278 		switch (ed->bEndpointAddress) {
   1279 		case USB_CONTROL_ENDPOINT:
   1280 			pipe->methods = &ohci_root_ctrl_methods;
   1281 			break;
   1282 		case UE_IN | OHCI_INTR_ENDPT:
   1283 			pipe->methods = &ohci_root_intr_methods;
   1284 			break;
   1285 		default:
   1286 			return (USBD_INVAL);
   1287 		}
   1288 	} else {
   1289 		sed = ohci_alloc_sed(sc);
   1290 		if (sed == 0)
   1291 			goto bad0;
   1292 	        std = ohci_alloc_std(sc);
   1293 		if (std == 0)
   1294 			goto bad1;
   1295 		opipe->sed = sed;
   1296 		opipe->tail = std;
   1297 		sed->ed->ed_flags = LE(
   1298 			OHCI_ED_SET_FA(addr) |
   1299 			OHCI_ED_SET_EN(ed->bEndpointAddress) |
   1300 			OHCI_ED_DIR_TD |
   1301 			(dev->lowspeed ? OHCI_ED_SPEED : 0) |
   1302 			((ed->bmAttributes & UE_XFERTYPE) == UE_ISOCHRONOUS ?
   1303 			 OHCI_ED_FORMAT_ISO : OHCI_ED_FORMAT_GEN) |
   1304 			OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize)));
   1305 		sed->ed->ed_headp = sed->ed->ed_tailp = LE(std->physaddr);
   1306 
   1307 		switch (ed->bmAttributes & UE_XFERTYPE) {
   1308 		case UE_CONTROL:
   1309 			pipe->methods = &ohci_device_ctrl_methods;
   1310 			r = usb_allocmem(sc->sc_dmatag,
   1311 					 sizeof(usb_device_request_t),
   1312 					 0, &opipe->u.ctl.reqdma);
   1313 			if (r != USBD_NORMAL_COMPLETION)
   1314 				goto bad;
   1315 			s = splusb();
   1316 			ohci_add_ed(sed, sc->sc_ctrl_head);
   1317 			splx(s);
   1318 			break;
   1319 		case UE_INTERRUPT:
   1320 			pipe->methods = &ohci_device_intr_methods;
   1321 			return (ohci_device_setintr(sc, opipe, ed->bInterval));
   1322 		case UE_ISOCHRONOUS:
   1323 			printf("ohci_open: open iso unimplemented\n");
   1324 			return (USBD_XXX);
   1325 		case UE_BULK:
   1326 			pipe->methods = &ohci_device_bulk_methods;
   1327 			s = splusb();
   1328 			ohci_add_ed(sed, sc->sc_bulk_head);
   1329 			splx(s);
   1330 			break;
   1331 		}
   1332 	}
   1333 	return (USBD_NORMAL_COMPLETION);
   1334 
   1335  bad:
   1336 	ohci_free_std(sc, std);
   1337  bad1:
   1338 	ohci_free_sed(sc, sed);
   1339  bad0:
   1340 	return (USBD_NOMEM);
   1341 
   1342 }
   1343 
   1344 /*
   1345  * Close a reqular pipe.
   1346  * Assumes that there are no pending transactions.
   1347  */
   1348 void
   1349 ohci_close_pipe(pipe, head)
   1350 	usbd_pipe_handle pipe;
   1351 	ohci_soft_ed_t *head;
   1352 {
   1353 	struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
   1354 	ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
   1355 	ohci_soft_ed_t *sed = opipe->sed;
   1356 	int s;
   1357 
   1358 	s = splusb();
   1359 #ifdef DIAGNOSTIC
   1360 	sed->ed->ed_flags |= LE(OHCI_ED_SKIP);
   1361 	if ((sed->ed->ed_tailp & LE(OHCI_TAILMASK)) !=
   1362 	    (sed->ed->ed_headp & LE(OHCI_TAILMASK))) {
   1363 		ohci_physaddr_t td = sed->ed->ed_headp;
   1364 		ohci_soft_td_t *std;
   1365 		for (std = LIST_FIRST(&sc->sc_hash_tds[HASH(td)]);
   1366 		     std != 0;
   1367 		     std = LIST_NEXT(std, hnext))
   1368 		    if (std->physaddr == td)
   1369 			break;
   1370 		printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x "
   1371 		       "tl=0x%x pipe=%p, std=%p\n", sed,
   1372 		       (int)LE(sed->ed->ed_headp), (int)LE(sed->ed->ed_tailp),
   1373 		       pipe, std);
   1374 		usb_delay_ms(&sc->sc_bus, 2);
   1375 		if ((sed->ed->ed_tailp & LE(OHCI_TAILMASK)) !=
   1376 		    (sed->ed->ed_headp & LE(OHCI_TAILMASK)))
   1377 			printf("ohci_close_pipe: pipe still not empty\n");
   1378 	}
   1379 #endif
   1380 	ohci_rem_ed(sed, head);
   1381 	splx(s);
   1382 	ohci_free_std(sc, opipe->tail);
   1383 	ohci_free_sed(sc, opipe->sed);
   1384 }
   1385 
   1386 /*
   1387  * Abort a device bulk request.
   1388  * If this routine is called at splusb() it guarantees that the request
   1389  * will be removed from the hardware scheduling and that the callback
   1390  * for it will be called with USBD_CANCELLED status.
   1391  * It's impossible to guarantee that the requested transfer will not
   1392  * have happened since the hardware runs concurrently.
   1393  * If the transaction has already happened we rely on the ordinary
   1394  * interrupt processing to process it.
   1395  */
   1396 void
   1397 ohci_abort_request(reqh)
   1398 	usbd_request_handle reqh;
   1399 {
   1400 	struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
   1401 	usbd_device_handle dev = opipe->pipe.device;
   1402 	ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
   1403 	ohci_soft_ed_t *sed;
   1404 	ohci_soft_td_t *p, *n;
   1405 	int s;
   1406 
   1407 	DPRINTF(("ohci_abort_request: reqh=%p pipe=%p\n", reqh, opipe));
   1408 	s = splusb();
   1409 
   1410 	reqh->status = USBD_CANCELLED; /* mark as cancelled */
   1411 
   1412 	if (!reqh->hcpriv) {
   1413 		/* Not scheduled */
   1414 		reqh->xfercb(reqh);
   1415 		return;
   1416 	}
   1417 
   1418 	sed = opipe->sed;
   1419 	DPRINTFN(1,("ohci_abort_request: stop ed=%p\n", sed));
   1420 	sed->ed->ed_flags |= LE(OHCI_ED_SKIP); /* force hardware skip */
   1421 	delay(10);		/* give HC hardware a little time */
   1422 
   1423 	/* if already processed by hardware let interrupt routine handle it */
   1424 	if ((sed->ed->ed_tailp & LE(OHCI_TAILMASK)) ==
   1425 	    (sed->ed->ed_headp & LE(OHCI_TAILMASK))) {
   1426 		DPRINTF(("ohci_abort_request: request processed\n"));
   1427 		usb_delay_ms(dev->bus, 2);
   1428 	} else {
   1429 		p = reqh->hcpriv;
   1430 #ifdef DIAGNOSTIC
   1431 		if (!p) {
   1432 			printf("ohci_abort_request: hcpriv==0\n");
   1433 			return;
   1434 		}
   1435 #endif
   1436 		ohci_done(sc, reqh);
   1437 		for (; p->reqh == reqh; p = n) {
   1438 		    n = p->nexttd;
   1439 		    ohci_hash_rem_td(sc, p);
   1440 		    ohci_free_std(sc, p);
   1441 		}
   1442 		DPRINTFN(2,("ohci_abort_request: set hd=%x, tl=%x\n",
   1443 			    (int)LE(p->physaddr), (int)LE(sed->ed->ed_tailp)));
   1444 		sed->ed->ed_headp = p->physaddr; /* unlink TDs */
   1445 	}
   1446 
   1447 	sed->ed->ed_flags &= LE(~OHCI_ED_SKIP); /* remove hardware skip */
   1448 	splx(s);
   1449 }
   1450 
   1451 /*
   1452  * Data structures and routines to emulate the root hub.
   1453  */
   1454 usb_device_descriptor_t ohci_devd = {
   1455 	USB_DEVICE_DESCRIPTOR_SIZE,
   1456 	UDESC_DEVICE,		/* type */
   1457 	{0x00, 0x01},		/* USB version */
   1458 	UCLASS_HUB,		/* class */
   1459 	USUBCLASS_HUB,		/* subclass */
   1460 	0,			/* protocol */
   1461 	64,			/* max packet */
   1462 	{0},{0},{0x00,0x01},	/* device id */
   1463 	1,2,0,			/* string indicies */
   1464 	1			/* # of configurations */
   1465 };
   1466 
   1467 usb_config_descriptor_t ohci_confd = {
   1468 	USB_CONFIG_DESCRIPTOR_SIZE,
   1469 	UDESC_CONFIG,
   1470 	{USB_CONFIG_DESCRIPTOR_SIZE +
   1471 	 USB_INTERFACE_DESCRIPTOR_SIZE +
   1472 	 USB_ENDPOINT_DESCRIPTOR_SIZE},
   1473 	1,
   1474 	1,
   1475 	0,
   1476 	UC_SELF_POWERED,
   1477 	0			/* max power */
   1478 };
   1479 
   1480 usb_interface_descriptor_t ohci_ifcd = {
   1481 	USB_INTERFACE_DESCRIPTOR_SIZE,
   1482 	UDESC_INTERFACE,
   1483 	0,
   1484 	0,
   1485 	1,
   1486 	UCLASS_HUB,
   1487 	USUBCLASS_HUB,
   1488 	0,
   1489 	0
   1490 };
   1491 
   1492 usb_endpoint_descriptor_t ohci_endpd = {
   1493 	USB_ENDPOINT_DESCRIPTOR_SIZE,
   1494 	UDESC_ENDPOINT,
   1495 	UE_IN | OHCI_INTR_ENDPT,
   1496 	UE_INTERRUPT,
   1497 	{8, 0},			/* max packet */
   1498 	255
   1499 };
   1500 
   1501 usb_hub_descriptor_t ohci_hubd = {
   1502 	USB_HUB_DESCRIPTOR_SIZE,
   1503 	UDESC_HUB,
   1504 	0,
   1505 	{0,0},
   1506 	0,
   1507 	0,
   1508 	{0},
   1509 };
   1510 
   1511 int
   1512 ohci_str(p, l, s)
   1513 	usb_string_descriptor_t *p;
   1514 	int l;
   1515 	char *s;
   1516 {
   1517 	int i;
   1518 
   1519 	if (l == 0)
   1520 		return (0);
   1521 	p->bLength = 2 * strlen(s) + 2;
   1522 	if (l == 1)
   1523 		return (1);
   1524 	p->bDescriptorType = UDESC_STRING;
   1525 	l -= 2;
   1526 	for (i = 0; s[i] && l > 1; i++, l -= 2)
   1527 		USETW2(p->bString[i], 0, s[i]);
   1528 	return (2*i+2);
   1529 }
   1530 
   1531 /*
   1532  * Simulate a hardware hub by handling all the necessary requests.
   1533  */
   1534 usbd_status
   1535 ohci_root_ctrl_transfer(reqh)
   1536 	usbd_request_handle reqh;
   1537 {
   1538 	int s;
   1539 	usbd_status r;
   1540 
   1541 	s = splusb();
   1542 	r = usb_insert_transfer(reqh);
   1543 	splx(s);
   1544 	if (r != USBD_NORMAL_COMPLETION)
   1545 		return (r);
   1546 	else
   1547 		return (ohci_root_ctrl_start(reqh));
   1548 }
   1549 
   1550 usbd_status
   1551 ohci_root_ctrl_start(reqh)
   1552 	usbd_request_handle reqh;
   1553 {
   1554 	ohci_softc_t *sc = (ohci_softc_t *)reqh->pipe->device->bus;
   1555 	usb_device_request_t *req;
   1556 	void *buf;
   1557 	int port, i;
   1558 	int len, value, index, l, totlen = 0;
   1559 	usb_port_status_t ps;
   1560 	usb_hub_descriptor_t hubd;
   1561 	usbd_status r;
   1562 	u_int32_t v;
   1563 
   1564 	if (!reqh->isreq)
   1565 		/* XXX panic */
   1566 		return (USBD_INVAL);
   1567 	req = &reqh->request;
   1568 	buf = reqh->buffer;
   1569 
   1570 	DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n",
   1571 		    req->bmRequestType, req->bRequest));
   1572 
   1573 	len = UGETW(req->wLength);
   1574 	value = UGETW(req->wValue);
   1575 	index = UGETW(req->wIndex);
   1576 #define C(x,y) ((x) | ((y) << 8))
   1577 	switch(C(req->bRequest, req->bmRequestType)) {
   1578 	case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
   1579 	case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
   1580 	case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
   1581 		/*
   1582 		 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
   1583 		 * for the integrated root hub.
   1584 		 */
   1585 		break;
   1586 	case C(UR_GET_CONFIG, UT_READ_DEVICE):
   1587 		if (len > 0) {
   1588 			*(u_int8_t *)buf = sc->sc_conf;
   1589 			totlen = 1;
   1590 		}
   1591 		break;
   1592 	case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
   1593 		DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value));
   1594 		switch(value >> 8) {
   1595 		case UDESC_DEVICE:
   1596 			if ((value & 0xff) != 0) {
   1597 				r = USBD_IOERROR;
   1598 				goto ret;
   1599 			}
   1600 			totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
   1601 			memcpy(buf, &ohci_devd, l);
   1602 			break;
   1603 		case UDESC_CONFIG:
   1604 			if ((value & 0xff) != 0) {
   1605 				r = USBD_IOERROR;
   1606 				goto ret;
   1607 			}
   1608 			totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
   1609 			memcpy(buf, &ohci_confd, l);
   1610 			buf = (char *)buf + l;
   1611 			len -= l;
   1612 			l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
   1613 			totlen += l;
   1614 			memcpy(buf, &ohci_ifcd, l);
   1615 			buf = (char *)buf + l;
   1616 			len -= l;
   1617 			l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
   1618 			totlen += l;
   1619 			memcpy(buf, &ohci_endpd, l);
   1620 			break;
   1621 		case UDESC_STRING:
   1622 			if (len == 0)
   1623 				break;
   1624 			*(u_int8_t *)buf = 0;
   1625 			totlen = 1;
   1626 			switch (value & 0xff) {
   1627 			case 1: /* Vendor */
   1628 				totlen = ohci_str(buf, len, sc->sc_vendor);
   1629 				break;
   1630 			case 2: /* Product */
   1631 				totlen = ohci_str(buf, len, "OHCI root hub");
   1632 				break;
   1633 			}
   1634 			break;
   1635 		default:
   1636 			r = USBD_IOERROR;
   1637 			goto ret;
   1638 		}
   1639 		break;
   1640 	case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
   1641 		if (len > 0) {
   1642 			*(u_int8_t *)buf = 0;
   1643 			totlen = 1;
   1644 		}
   1645 		break;
   1646 	case C(UR_GET_STATUS, UT_READ_DEVICE):
   1647 		if (len > 1) {
   1648 			USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
   1649 			totlen = 2;
   1650 		}
   1651 		break;
   1652 	case C(UR_GET_STATUS, UT_READ_INTERFACE):
   1653 	case C(UR_GET_STATUS, UT_READ_ENDPOINT):
   1654 		if (len > 1) {
   1655 			USETW(((usb_status_t *)buf)->wStatus, 0);
   1656 			totlen = 2;
   1657 		}
   1658 		break;
   1659 	case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
   1660 		if (value >= USB_MAX_DEVICES) {
   1661 			r = USBD_IOERROR;
   1662 			goto ret;
   1663 		}
   1664 		sc->sc_addr = value;
   1665 		break;
   1666 	case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
   1667 		if (value != 0 && value != 1) {
   1668 			r = USBD_IOERROR;
   1669 			goto ret;
   1670 		}
   1671 		sc->sc_conf = value;
   1672 		break;
   1673 	case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
   1674 		break;
   1675 	case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
   1676 	case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
   1677 	case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
   1678 		r = USBD_IOERROR;
   1679 		goto ret;
   1680 	case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
   1681 		break;
   1682 	case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
   1683 		break;
   1684 	/* Hub requests */
   1685 	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
   1686 		break;
   1687 	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
   1688 		DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
   1689 			     "port=%d feature=%d\n",
   1690 			     index, value));
   1691 		if (index < 1 || index > sc->sc_noport) {
   1692 			r = USBD_IOERROR;
   1693 			goto ret;
   1694 		}
   1695 		port = OHCI_RH_PORT_STATUS(index);
   1696 		switch(value) {
   1697 		case UHF_PORT_ENABLE:
   1698 			OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS);
   1699 			break;
   1700 		case UHF_PORT_SUSPEND:
   1701 			OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR);
   1702 			break;
   1703 		case UHF_PORT_POWER:
   1704 			OWRITE4(sc, port, UPS_LOW_SPEED);
   1705 			break;
   1706 		case UHF_C_PORT_CONNECTION:
   1707 			OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16);
   1708 			break;
   1709 		case UHF_C_PORT_ENABLE:
   1710 			OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16);
   1711 			break;
   1712 		case UHF_C_PORT_SUSPEND:
   1713 			OWRITE4(sc, port, UPS_C_SUSPEND << 16);
   1714 			break;
   1715 		case UHF_C_PORT_OVER_CURRENT:
   1716 			OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16);
   1717 			break;
   1718 		case UHF_C_PORT_RESET:
   1719 			OWRITE4(sc, port, UPS_C_PORT_RESET << 16);
   1720 			break;
   1721 		default:
   1722 			r = USBD_IOERROR;
   1723 			goto ret;
   1724 		}
   1725 		switch(value) {
   1726 		case UHF_C_PORT_CONNECTION:
   1727 		case UHF_C_PORT_ENABLE:
   1728 		case UHF_C_PORT_SUSPEND:
   1729 		case UHF_C_PORT_OVER_CURRENT:
   1730 		case UHF_C_PORT_RESET:
   1731 			/* Enable RHSC interrupt if condition is cleared. */
   1732 			if ((OREAD4(sc, port) >> 16) == 0)
   1733 				ohci_rhsc_able(sc, 1);
   1734 			break;
   1735 		default:
   1736 			break;
   1737 		}
   1738 		break;
   1739 	case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
   1740 		if (value != 0) {
   1741 			r = USBD_IOERROR;
   1742 			goto ret;
   1743 		}
   1744 		v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
   1745 		hubd = ohci_hubd;
   1746 		hubd.bNbrPorts = sc->sc_noport;
   1747 		USETW(hubd.wHubCharacteristics,
   1748 		      (v & OHCI_NPS ? UHD_PWR_NO_SWITCH :
   1749 		       v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL)
   1750 		      /* XXX overcurrent */
   1751 		      );
   1752 		hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v);
   1753 		v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
   1754 		for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
   1755 			hubd.DeviceRemovable[i++] = (u_int8_t)v;
   1756 		hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
   1757 		l = min(len, hubd.bDescLength);
   1758 		totlen = l;
   1759 		memcpy(buf, &hubd, l);
   1760 		break;
   1761 	case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
   1762 		if (len != 4) {
   1763 			r = USBD_IOERROR;
   1764 			goto ret;
   1765 		}
   1766 		memset(buf, 0, len); /* ? XXX */
   1767 		totlen = len;
   1768 		break;
   1769 	case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
   1770 		DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n",
   1771 			    index));
   1772 		if (index < 1 || index > sc->sc_noport) {
   1773 			r = USBD_IOERROR;
   1774 			goto ret;
   1775 		}
   1776 		if (len != 4) {
   1777 			r = USBD_IOERROR;
   1778 			goto ret;
   1779 		}
   1780 		v = OREAD4(sc, OHCI_RH_PORT_STATUS(index));
   1781 		DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n",
   1782 			    v));
   1783 		USETW(ps.wPortStatus, v);
   1784 		USETW(ps.wPortChange, v >> 16);
   1785 		l = min(len, sizeof ps);
   1786 		memcpy(buf, &ps, l);
   1787 		totlen = l;
   1788 		break;
   1789 	case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
   1790 		r = USBD_IOERROR;
   1791 		goto ret;
   1792 	case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
   1793 		break;
   1794 	case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
   1795 		if (index < 1 || index > sc->sc_noport) {
   1796 			r = USBD_IOERROR;
   1797 			goto ret;
   1798 		}
   1799 		port = OHCI_RH_PORT_STATUS(index);
   1800 		switch(value) {
   1801 		case UHF_PORT_ENABLE:
   1802 			OWRITE4(sc, port, UPS_PORT_ENABLED);
   1803 			break;
   1804 		case UHF_PORT_SUSPEND:
   1805 			OWRITE4(sc, port, UPS_SUSPEND);
   1806 			break;
   1807 		case UHF_PORT_RESET:
   1808 			DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n",
   1809 				    index));
   1810 			OWRITE4(sc, port, UPS_RESET);
   1811 			for (i = 0; i < 10; i++) {
   1812 				usb_delay_ms(&sc->sc_bus, 10);
   1813 				if ((OREAD4(sc, port) & UPS_RESET) == 0)
   1814 					break;
   1815 			}
   1816 			DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n",
   1817 				    index, OREAD4(sc, port)));
   1818 			break;
   1819 		case UHF_PORT_POWER:
   1820 			DPRINTFN(2,("ohci_root_ctrl_transfer: set port power "
   1821 				    "%d\n", index));
   1822 			OWRITE4(sc, port, UPS_PORT_POWER);
   1823 			break;
   1824 		default:
   1825 			r = USBD_IOERROR;
   1826 			goto ret;
   1827 		}
   1828 		break;
   1829 	default:
   1830 		r = USBD_IOERROR;
   1831 		goto ret;
   1832 	}
   1833 	reqh->actlen = totlen;
   1834 	r = USBD_NORMAL_COMPLETION;
   1835  ret:
   1836 	reqh->status = r;
   1837 	reqh->xfercb(reqh);
   1838 	usb_start_next(reqh->pipe);
   1839 	return (USBD_IN_PROGRESS);
   1840 }
   1841 
   1842 /* Abort a root control request. */
   1843 void
   1844 ohci_root_ctrl_abort(reqh)
   1845 	usbd_request_handle reqh;
   1846 {
   1847 	/* Nothing to do, all transfers are synchronous. */
   1848 }
   1849 
   1850 /* Close the root pipe. */
   1851 void
   1852 ohci_root_ctrl_close(pipe)
   1853 	usbd_pipe_handle pipe;
   1854 {
   1855 	DPRINTF(("ohci_root_ctrl_close\n"));
   1856 	/* Nothing to do. */
   1857 }
   1858 
   1859 usbd_status
   1860 ohci_root_intr_transfer(reqh)
   1861 	usbd_request_handle reqh;
   1862 {
   1863 	int s;
   1864 	usbd_status r;
   1865 
   1866 	s = splusb();
   1867 	r = usb_insert_transfer(reqh);
   1868 	splx(s);
   1869 	if (r != USBD_NORMAL_COMPLETION)
   1870 		return (r);
   1871 	else
   1872 		return (ohci_root_intr_start(reqh));
   1873 }
   1874 
   1875 usbd_status
   1876 ohci_root_intr_start(reqh)
   1877 	usbd_request_handle reqh;
   1878 {
   1879 	usbd_pipe_handle pipe = reqh->pipe;
   1880 	ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
   1881 	struct ohci_pipe *upipe = (struct ohci_pipe *)pipe;
   1882 	usb_dma_t *dmap;
   1883 	usbd_status r;
   1884 	int len;
   1885 
   1886 	len = reqh->length;
   1887 	dmap = &upipe->u.intr.datadma;
   1888 	if (len == 0)
   1889 		return (USBD_INVAL); /* XXX should it be? */
   1890 
   1891 	r = usb_allocmem(sc->sc_dmatag, len, 0, dmap);
   1892 	if (r != USBD_NORMAL_COMPLETION)
   1893 		return (r);
   1894 	sc->sc_intrreqh = reqh;
   1895 
   1896 	return (USBD_IN_PROGRESS);
   1897 }
   1898 
   1899 /* Abort a root interrupt request. */
   1900 void
   1901 ohci_root_intr_abort(reqh)
   1902 	usbd_request_handle reqh;
   1903 {
   1904 	/* No need to abort. */
   1905 }
   1906 
   1907 /* Close the root pipe. */
   1908 void
   1909 ohci_root_intr_close(pipe)
   1910 	usbd_pipe_handle pipe;
   1911 {
   1912 	ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
   1913 
   1914 	DPRINTF(("ohci_root_intr_close\n"));
   1915 
   1916 	sc->sc_intrreqh = 0;
   1917 }
   1918 
   1919 /************************/
   1920 
   1921 usbd_status
   1922 ohci_device_ctrl_transfer(reqh)
   1923 	usbd_request_handle reqh;
   1924 {
   1925 	int s;
   1926 	usbd_status r;
   1927 
   1928 	s = splusb();
   1929 	r = usb_insert_transfer(reqh);
   1930 	splx(s);
   1931 	if (r != USBD_NORMAL_COMPLETION)
   1932 		return (r);
   1933 	else
   1934 		return (ohci_device_ctrl_start(reqh));
   1935 }
   1936 
   1937 usbd_status
   1938 ohci_device_ctrl_start(reqh)
   1939 	usbd_request_handle reqh;
   1940 {
   1941 	ohci_softc_t *sc = (ohci_softc_t *)reqh->pipe->device->bus;
   1942 	usbd_status r;
   1943 
   1944 	if (!reqh->isreq) {
   1945 		/* XXX panic */
   1946 		printf("ohci_device_ctrl_transfer: not a request\n");
   1947 		return (USBD_INVAL);
   1948 	}
   1949 
   1950 	r = ohci_device_request(reqh);
   1951 	if (r != USBD_NORMAL_COMPLETION)
   1952 		return (r);
   1953 
   1954 	if (sc->sc_bus.use_polling)
   1955 		ohci_waitintr(sc, reqh);
   1956 	return (USBD_IN_PROGRESS);
   1957 }
   1958 
   1959 /* Abort a device control request. */
   1960 void
   1961 ohci_device_ctrl_abort(reqh)
   1962 	usbd_request_handle reqh;
   1963 {
   1964 	DPRINTF(("ohci_device_ctrl_abort: reqh=%p\n", reqh));
   1965 	ohci_abort_request(reqh);
   1966 }
   1967 
   1968 /* Close a device control pipe. */
   1969 void
   1970 ohci_device_ctrl_close(pipe)
   1971 	usbd_pipe_handle pipe;
   1972 {
   1973 	ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
   1974 
   1975 	DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe));
   1976 	ohci_close_pipe(pipe, sc->sc_ctrl_head);
   1977 }
   1978 
   1979 /************************/
   1980 
   1981 usbd_status
   1982 ohci_device_bulk_transfer(reqh)
   1983 	usbd_request_handle reqh;
   1984 {
   1985 	int s;
   1986 	usbd_status r;
   1987 
   1988 	s = splusb();
   1989 	r = usb_insert_transfer(reqh);
   1990 	splx(s);
   1991 	if (r != USBD_NORMAL_COMPLETION)
   1992 		return (r);
   1993 	else
   1994 		return (ohci_device_bulk_start(reqh));
   1995 }
   1996 
   1997 usbd_status
   1998 ohci_device_bulk_start(reqh)
   1999 	usbd_request_handle reqh;
   2000 {
   2001 	struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
   2002 	usbd_device_handle dev = opipe->pipe.device;
   2003 	ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
   2004 	int addr = dev->address;
   2005 	ohci_soft_td_t *xfer, *tail;
   2006 	ohci_soft_ed_t *sed;
   2007 	usb_dma_t *dmap;
   2008 	usbd_status r;
   2009 	int s, len, isread;
   2010 
   2011 #ifdef DIAGNOSTIC
   2012 	if (reqh->isreq) {
   2013 		/* XXX panic */
   2014 		printf("ohci_device_bulk_start: a request\n");
   2015 		return (USBD_INVAL);
   2016 	}
   2017 #endif
   2018 
   2019 	len = reqh->length;
   2020 	dmap = &opipe->u.bulk.datadma;
   2021 	isread = reqh->pipe->endpoint->edesc->bEndpointAddress & UE_IN;
   2022 	sed = opipe->sed;
   2023 
   2024 	DPRINTFN(4,("ohci_device_bulk_start: reqh=%p len=%d isread=%d "
   2025 		    "endpt=%d\n", reqh, len, isread,
   2026 		    reqh->pipe->endpoint->edesc->bEndpointAddress));
   2027 
   2028 	opipe->u.bulk.length = len;
   2029 
   2030 	r = usb_allocmem(sc->sc_dmatag, len, 0, dmap);
   2031 	if (r != USBD_NORMAL_COMPLETION)
   2032 		goto ret1;
   2033 
   2034 	tail = ohci_alloc_std(sc);
   2035 	if (!tail) {
   2036 		r = USBD_NOMEM;
   2037 		goto ret2;
   2038 	}
   2039 	tail->reqh = 0;
   2040 
   2041 	/* Update device address */
   2042 	sed->ed->ed_flags = LE(
   2043 		(LE(sed->ed->ed_flags) & ~OHCI_ED_ADDRMASK) |
   2044 		OHCI_ED_SET_FA(addr));
   2045 
   2046 	/* Set up data transaction */
   2047 	xfer = opipe->tail;
   2048 	xfer->td->td_flags = LE(
   2049 		(isread ? OHCI_TD_IN : OHCI_TD_OUT) | OHCI_TD_NOCC |
   2050 		OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY |
   2051 		(reqh->flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0));
   2052 	xfer->td->td_cbp = LE(DMAADDR(dmap));
   2053 	xfer->nexttd = tail;
   2054 	xfer->td->td_nexttd = LE(tail->physaddr);
   2055 	xfer->td->td_be = LE(LE(xfer->td->td_cbp) + len - 1);
   2056 	xfer->len = len;
   2057 	xfer->reqh = reqh;
   2058 	xfer->flags = OHCI_CALL_DONE | OHCI_SET_LEN;
   2059 	reqh->hcpriv = xfer;
   2060 
   2061 	if (!isread)
   2062 		memcpy(KERNADDR(dmap), reqh->buffer, len);
   2063 
   2064 	DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x "
   2065 		    "td_cbp=0x%08x td_be=0x%08x\n",
   2066 		    (int)LE(sed->ed->ed_flags), (int)LE(xfer->td->td_flags),
   2067 		    (int)LE(xfer->td->td_cbp), (int)LE(xfer->td->td_be)));
   2068 
   2069 	/* Insert ED in schedule */
   2070 	s = splusb();
   2071 	ohci_hash_add_td(sc, xfer);
   2072 	sed->ed->ed_tailp = LE(tail->physaddr);
   2073 	opipe->tail = tail;
   2074 	OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
   2075 	if (reqh->timeout && !sc->sc_bus.use_polling) {
   2076                 usb_timeout(ohci_timeout, reqh,
   2077 			    MS_TO_TICKS(reqh->timeout), reqh->timo_handle);
   2078 	}
   2079 	splx(s);
   2080 
   2081 	return (USBD_IN_PROGRESS);
   2082 
   2083  ret2:
   2084 	usb_freemem(sc->sc_dmatag, dmap);
   2085  ret1:
   2086 	return (r);
   2087 }
   2088 
   2089 void
   2090 ohci_device_bulk_abort(reqh)
   2091 	usbd_request_handle reqh;
   2092 {
   2093 	DPRINTF(("ohci_device_bulk_abort: reqh=%p\n", reqh));
   2094 	ohci_abort_request(reqh);
   2095 }
   2096 
   2097 /*
   2098  * Close a device bulk pipe.
   2099  */
   2100 void
   2101 ohci_device_bulk_close(pipe)
   2102 	usbd_pipe_handle pipe;
   2103 {
   2104 	ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
   2105 
   2106 	DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe));
   2107 	ohci_close_pipe(pipe, sc->sc_bulk_head);
   2108 }
   2109 
   2110 /************************/
   2111 
   2112 usbd_status
   2113 ohci_device_intr_transfer(reqh)
   2114 	usbd_request_handle reqh;
   2115 {
   2116 	int s;
   2117 	usbd_status r;
   2118 
   2119 	s = splusb();
   2120 	r = usb_insert_transfer(reqh);
   2121 	splx(s);
   2122 	if (r != USBD_NORMAL_COMPLETION)
   2123 		return (r);
   2124 	else
   2125 		return (ohci_device_intr_start(reqh));
   2126 }
   2127 
   2128 usbd_status
   2129 ohci_device_intr_start(reqh)
   2130 	usbd_request_handle reqh;
   2131 {
   2132 	struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
   2133 	usbd_device_handle dev = opipe->pipe.device;
   2134 	ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
   2135 	ohci_soft_ed_t *sed = opipe->sed;
   2136 	ohci_soft_td_t *xfer, *tail;
   2137 	usb_dma_t *dmap;
   2138 	usbd_status r;
   2139 	int len;
   2140 	int s;
   2141 
   2142 	DPRINTFN(3, ("ohci_device_intr_transfer: reqh=%p buf=%p len=%d "
   2143 		     "flags=%d priv=%p\n",
   2144 		 reqh, reqh->buffer, reqh->length, reqh->flags, reqh->priv));
   2145 
   2146 	if (reqh->isreq)
   2147 		panic("ohci_device_intr_transfer: a request\n");
   2148 
   2149 	len = reqh->length;
   2150 	dmap = &opipe->u.intr.datadma;
   2151 	if (len == 0)
   2152 		return (USBD_INVAL); /* XXX should it be? */
   2153 
   2154 	xfer = opipe->tail;
   2155 	tail = ohci_alloc_std(sc);
   2156 	if (!tail) {
   2157 		r = USBD_NOMEM;
   2158 		goto ret1;
   2159 	}
   2160 	tail->reqh = 0;
   2161 
   2162 	r = usb_allocmem(sc->sc_dmatag, len, 0, dmap);
   2163 	if (r != USBD_NORMAL_COMPLETION)
   2164 		goto ret2;
   2165 
   2166 	xfer->td->td_flags = LE(
   2167 		OHCI_TD_IN | OHCI_TD_NOCC |
   2168 		OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
   2169 	if (reqh->flags & USBD_SHORT_XFER_OK)
   2170 		xfer->td->td_flags |= LE(OHCI_TD_R);
   2171 	xfer->td->td_cbp = LE(DMAADDR(dmap));
   2172 	xfer->nexttd = tail;
   2173 	xfer->td->td_nexttd = LE(tail->physaddr);
   2174 	xfer->td->td_be = LE(LE(xfer->td->td_cbp) + len - 1);
   2175 	xfer->len = len;
   2176 	xfer->reqh = reqh;
   2177 	xfer->flags = OHCI_CALL_DONE | OHCI_SET_LEN;
   2178 	reqh->hcpriv = xfer;
   2179 
   2180 #if USB_DEBUG
   2181 	if (ohcidebug > 5) {
   2182 		printf("ohci_device_intr_transfer:\n");
   2183 		ohci_dump_ed(sed);
   2184 		ohci_dump_tds(xfer);
   2185 	}
   2186 #endif
   2187 
   2188 	/* Insert ED in schedule */
   2189 	s = splusb();
   2190 	ohci_hash_add_td(sc, xfer);
   2191 	sed->ed->ed_tailp = LE(tail->physaddr);
   2192 	opipe->tail = tail;
   2193 #if 0
   2194 	if (reqh->timeout && !sc->sc_bus.use_polling) {
   2195                 usb_timeout(ohci_timeout, reqh,
   2196 			    MS_TO_TICKS(reqh->timeout), reqh->timo_handle);
   2197 	}
   2198 #endif
   2199 	sed->ed->ed_flags &= LE(~OHCI_ED_SKIP);
   2200 	splx(s);
   2201 
   2202 #ifdef USB_DEBUG
   2203 	if (ohcidebug > 5) {
   2204 		delay(5000);
   2205 		printf("ohci_device_intr_transfer: status=%x\n",
   2206 		       OREAD4(sc, OHCI_COMMAND_STATUS));
   2207 		ohci_dump_ed(sed);
   2208 		ohci_dump_tds(xfer);
   2209 	}
   2210 #endif
   2211 
   2212 	return (USBD_IN_PROGRESS);
   2213 
   2214  ret2:
   2215 	ohci_free_std(sc, xfer);
   2216  ret1:
   2217 	return (r);
   2218 }
   2219 
   2220 /* Abort a device control request. */
   2221 void
   2222 ohci_device_intr_abort(reqh)
   2223 	usbd_request_handle reqh;
   2224 {
   2225 	if (reqh->pipe->intrreqh == reqh) {
   2226 		DPRINTF(("ohci_device_intr_abort: remove\n"));
   2227 		reqh->pipe->intrreqh = 0;
   2228 	}
   2229 	ohci_abort_request(reqh);
   2230 }
   2231 
   2232 /* Close a device interrupt pipe. */
   2233 void
   2234 ohci_device_intr_close(pipe)
   2235 	usbd_pipe_handle pipe;
   2236 {
   2237 	struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
   2238 	ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
   2239 	int nslots = opipe->u.intr.nslots;
   2240 	int pos = opipe->u.intr.pos;
   2241 	int j;
   2242 	ohci_soft_ed_t *p, *sed = opipe->sed;
   2243 	int s;
   2244 
   2245 	DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n",
   2246 		    pipe, nslots, pos));
   2247 	s = splusb();
   2248 	sed->ed->ed_flags |= LE(OHCI_ED_SKIP);
   2249 	if ((sed->ed->ed_tailp & LE(OHCI_TAILMASK)) !=
   2250 	    (sed->ed->ed_headp & LE(OHCI_TAILMASK)))
   2251 		usb_delay_ms(&sc->sc_bus, 2);
   2252 
   2253 	for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next)
   2254 		;
   2255 	if (!p)
   2256 		panic("ohci_device_intr_close: ED not found\n");
   2257 	p->next = sed->next;
   2258 	p->ed->ed_nexted = sed->ed->ed_nexted;
   2259 	splx(s);
   2260 
   2261 	for (j = 0; j < nslots; j++)
   2262 		--sc->sc_bws[pos * nslots + j];
   2263 
   2264 	ohci_free_std(sc, opipe->tail);
   2265 	ohci_free_sed(sc, opipe->sed);
   2266 }
   2267 
   2268 usbd_status
   2269 ohci_device_setintr(sc, opipe, ival)
   2270 	ohci_softc_t *sc;
   2271 	struct ohci_pipe *opipe;
   2272 	int ival;
   2273 {
   2274 	int i, j, s, best;
   2275 	u_int npoll, slow, shigh, nslots;
   2276 	u_int bestbw, bw;
   2277 	ohci_soft_ed_t *hsed, *sed = opipe->sed;
   2278 
   2279 	DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe));
   2280 	if (ival == 0) {
   2281 		printf("ohci_setintr: 0 interval\n");
   2282 		return (USBD_INVAL);
   2283 	}
   2284 
   2285 	npoll = OHCI_NO_INTRS;
   2286 	while (npoll > ival)
   2287 		npoll /= 2;
   2288 	DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll));
   2289 
   2290 	/*
   2291 	 * We now know which level in the tree the ED must go into.
   2292 	 * Figure out which slot has most bandwidth left over.
   2293 	 * Slots to examine:
   2294 	 * npoll
   2295 	 * 1	0
   2296 	 * 2	1 2
   2297 	 * 4	3 4 5 6
   2298 	 * 8	7 8 9 10 11 12 13 14
   2299 	 * N    (N-1) .. (N-1+N-1)
   2300 	 */
   2301 	slow = npoll-1;
   2302 	shigh = slow + npoll;
   2303 	nslots = OHCI_NO_INTRS / npoll;
   2304 	for (best = i = slow, bestbw = ~0; i < shigh; i++) {
   2305 		bw = 0;
   2306 		for (j = 0; j < nslots; j++)
   2307 			bw += sc->sc_bws[i * nslots + j];
   2308 		if (bw < bestbw) {
   2309 			best = i;
   2310 			bestbw = bw;
   2311 		}
   2312 	}
   2313 	DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n",
   2314 		     best, slow, shigh, bestbw));
   2315 
   2316 	s = splusb();
   2317 	hsed = sc->sc_eds[best];
   2318 	sed->next = hsed->next;
   2319 	sed->ed->ed_nexted = hsed->ed->ed_nexted;
   2320 	hsed->next = sed;
   2321 	hsed->ed->ed_nexted = LE(sed->physaddr);
   2322 	splx(s);
   2323 
   2324 	for (j = 0; j < nslots; j++)
   2325 		++sc->sc_bws[best * nslots + j];
   2326 	opipe->u.intr.nslots = nslots;
   2327 	opipe->u.intr.pos = best;
   2328 
   2329 	DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe));
   2330 	return (USBD_NORMAL_COMPLETION);
   2331 }
   2332 
   2333