ohci.c revision 1.246
1 /* $NetBSD: ohci.c,v 1.246 2013/12/15 10:25:23 skrll Exp $ */ 2 3 /* 4 * Copyright (c) 1998, 2004, 2005, 2012 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net) at 9 * Carlstedt Research & Technology, Jared D. McNeill (jmcneill (at) invisible.ca) 10 * and Matthew R. Green (mrg (at) eterna.com.au). 11 * This code is derived from software contributed to The NetBSD Foundation 12 * by Charles M. Hannum. 13 * 14 * Redistribution and use in source and binary forms, with or without 15 * modification, are permitted provided that the following conditions 16 * are met: 17 * 1. Redistributions of source code must retain the above copyright 18 * notice, this list of conditions and the following disclaimer. 19 * 2. Redistributions in binary form must reproduce the above copyright 20 * notice, this list of conditions and the following disclaimer in the 21 * documentation and/or other materials provided with the distribution. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 24 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 25 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 26 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 27 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 31 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 32 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 33 * POSSIBILITY OF SUCH DAMAGE. 34 */ 35 36 /* 37 * USB Open Host Controller driver. 38 * 39 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html 40 * USB spec: http://www.usb.org/developers/docs/ 41 */ 42 43 #include <sys/cdefs.h> 44 __KERNEL_RCSID(0, "$NetBSD: ohci.c,v 1.246 2013/12/15 10:25:23 skrll Exp $"); 45 46 #include <sys/param.h> 47 #include <sys/systm.h> 48 #include <sys/kmem.h> 49 #include <sys/kernel.h> 50 #include <sys/device.h> 51 #include <sys/select.h> 52 #include <sys/proc.h> 53 #include <sys/queue.h> 54 #include <sys/cpu.h> 55 56 #include <machine/endian.h> 57 58 #include <dev/usb/usb.h> 59 #include <dev/usb/usbdi.h> 60 #include <dev/usb/usbdivar.h> 61 #include <dev/usb/usb_mem.h> 62 #include <dev/usb/usb_quirks.h> 63 64 #include <dev/usb/ohcireg.h> 65 #include <dev/usb/ohcivar.h> 66 #include <dev/usb/usbroothub_subr.h> 67 68 69 70 #ifdef OHCI_DEBUG 71 #define DPRINTF(x) if (ohcidebug) printf x 72 #define DPRINTFN(n,x) if (ohcidebug>(n)) printf x 73 int ohcidebug = 0; 74 #else 75 #define DPRINTF(x) 76 #define DPRINTFN(n,x) 77 #endif 78 79 #if BYTE_ORDER == BIG_ENDIAN 80 #define SWAP_ENDIAN OHCI_LITTLE_ENDIAN 81 #else 82 #define SWAP_ENDIAN OHCI_BIG_ENDIAN 83 #endif 84 85 #define O16TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap16(val) : val) 86 #define O32TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap32(val) : val) 87 #define HTOO16(val) O16TOH(val) 88 #define HTOO32(val) O32TOH(val) 89 90 struct ohci_pipe; 91 92 Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *); 93 Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *); 94 95 Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *); 96 Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *); 97 98 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *); 99 Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *); 100 101 Static void ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *, 102 ohci_soft_td_t *); 103 Static usbd_status ohci_alloc_std_chain(struct ohci_pipe *, 104 ohci_softc_t *, int, int, usbd_xfer_handle, 105 ohci_soft_td_t *, ohci_soft_td_t **); 106 107 Static usbd_status ohci_open(usbd_pipe_handle); 108 Static void ohci_poll(struct usbd_bus *); 109 Static void ohci_softintr(void *); 110 Static void ohci_waitintr(ohci_softc_t *, usbd_xfer_handle); 111 Static void ohci_rhsc(ohci_softc_t *, usbd_xfer_handle); 112 Static void ohci_rhsc_softint(void *arg); 113 114 Static usbd_status ohci_device_request(usbd_xfer_handle xfer); 115 Static void ohci_add_ed(ohci_softc_t *, ohci_soft_ed_t *, 116 ohci_soft_ed_t *); 117 118 Static void ohci_rem_ed(ohci_softc_t *, ohci_soft_ed_t *, 119 ohci_soft_ed_t *); 120 Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *); 121 Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *); 122 Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t); 123 Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *); 124 Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *); 125 Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t); 126 127 Static usbd_status ohci_setup_isoc(usbd_pipe_handle pipe); 128 Static void ohci_device_isoc_enter(usbd_xfer_handle); 129 130 Static usbd_status ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 131 Static void ohci_freem(struct usbd_bus *, usb_dma_t *); 132 133 Static usbd_xfer_handle ohci_allocx(struct usbd_bus *); 134 Static void ohci_freex(struct usbd_bus *, usbd_xfer_handle); 135 Static void ohci_get_lock(struct usbd_bus *, kmutex_t **); 136 137 Static usbd_status ohci_root_ctrl_transfer(usbd_xfer_handle); 138 Static usbd_status ohci_root_ctrl_start(usbd_xfer_handle); 139 Static void ohci_root_ctrl_abort(usbd_xfer_handle); 140 Static void ohci_root_ctrl_close(usbd_pipe_handle); 141 Static void ohci_root_ctrl_done(usbd_xfer_handle); 142 143 Static usbd_status ohci_root_intr_transfer(usbd_xfer_handle); 144 Static usbd_status ohci_root_intr_start(usbd_xfer_handle); 145 Static void ohci_root_intr_abort(usbd_xfer_handle); 146 Static void ohci_root_intr_close(usbd_pipe_handle); 147 Static void ohci_root_intr_done(usbd_xfer_handle); 148 149 Static usbd_status ohci_device_ctrl_transfer(usbd_xfer_handle); 150 Static usbd_status ohci_device_ctrl_start(usbd_xfer_handle); 151 Static void ohci_device_ctrl_abort(usbd_xfer_handle); 152 Static void ohci_device_ctrl_close(usbd_pipe_handle); 153 Static void ohci_device_ctrl_done(usbd_xfer_handle); 154 155 Static usbd_status ohci_device_bulk_transfer(usbd_xfer_handle); 156 Static usbd_status ohci_device_bulk_start(usbd_xfer_handle); 157 Static void ohci_device_bulk_abort(usbd_xfer_handle); 158 Static void ohci_device_bulk_close(usbd_pipe_handle); 159 Static void ohci_device_bulk_done(usbd_xfer_handle); 160 161 Static usbd_status ohci_device_intr_transfer(usbd_xfer_handle); 162 Static usbd_status ohci_device_intr_start(usbd_xfer_handle); 163 Static void ohci_device_intr_abort(usbd_xfer_handle); 164 Static void ohci_device_intr_close(usbd_pipe_handle); 165 Static void ohci_device_intr_done(usbd_xfer_handle); 166 167 Static usbd_status ohci_device_isoc_transfer(usbd_xfer_handle); 168 Static usbd_status ohci_device_isoc_start(usbd_xfer_handle); 169 Static void ohci_device_isoc_abort(usbd_xfer_handle); 170 Static void ohci_device_isoc_close(usbd_pipe_handle); 171 Static void ohci_device_isoc_done(usbd_xfer_handle); 172 173 Static usbd_status ohci_device_setintr(ohci_softc_t *sc, 174 struct ohci_pipe *pipe, int ival); 175 176 Static void ohci_timeout(void *); 177 Static void ohci_timeout_task(void *); 178 Static void ohci_rhsc_enable(void *); 179 180 Static void ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *); 181 Static void ohci_abort_xfer(usbd_xfer_handle, usbd_status); 182 183 Static void ohci_device_clear_toggle(usbd_pipe_handle pipe); 184 Static void ohci_noop(usbd_pipe_handle pipe); 185 186 #ifdef OHCI_DEBUG 187 Static void ohci_dumpregs(ohci_softc_t *); 188 Static void ohci_dump_tds(ohci_softc_t *, ohci_soft_td_t *); 189 Static void ohci_dump_td(ohci_softc_t *, ohci_soft_td_t *); 190 Static void ohci_dump_ed(ohci_softc_t *, ohci_soft_ed_t *); 191 Static void ohci_dump_itd(ohci_softc_t *, ohci_soft_itd_t *); 192 Static void ohci_dump_itds(ohci_softc_t *, ohci_soft_itd_t *); 193 #endif 194 195 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 196 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 197 #define OWRITE1(sc, r, x) \ 198 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 199 #define OWRITE2(sc, r, x) \ 200 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 201 #define OWRITE4(sc, r, x) \ 202 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 203 204 static __inline uint32_t 205 OREAD4(ohci_softc_t *sc, bus_size_t r) 206 { 207 208 OBARR(sc); 209 return bus_space_read_4(sc->iot, sc->ioh, r); 210 } 211 212 /* Reverse the bits in a value 0 .. 31 */ 213 Static u_int8_t revbits[OHCI_NO_INTRS] = 214 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 215 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 216 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 217 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 218 219 struct ohci_pipe { 220 struct usbd_pipe pipe; 221 ohci_soft_ed_t *sed; 222 union { 223 ohci_soft_td_t *td; 224 ohci_soft_itd_t *itd; 225 } tail; 226 /* Info needed for different pipe kinds. */ 227 union { 228 /* Control pipe */ 229 struct { 230 usb_dma_t reqdma; 231 u_int length; 232 ohci_soft_td_t *setup, *data, *stat; 233 } ctl; 234 /* Interrupt pipe */ 235 struct { 236 int nslots; 237 int pos; 238 } intr; 239 /* Bulk pipe */ 240 struct { 241 u_int length; 242 int isread; 243 } bulk; 244 /* Iso pipe */ 245 struct iso { 246 int next, inuse; 247 } iso; 248 } u; 249 }; 250 251 #define OHCI_INTR_ENDPT 1 252 253 Static const struct usbd_bus_methods ohci_bus_methods = { 254 .open_pipe = ohci_open, 255 .soft_intr = ohci_softintr, 256 .do_poll = ohci_poll, 257 .allocm = ohci_allocm, 258 .freem = ohci_freem, 259 .allocx = ohci_allocx, 260 .freex = ohci_freex, 261 .get_lock = ohci_get_lock, 262 .new_device = NULL, 263 }; 264 265 Static const struct usbd_pipe_methods ohci_root_ctrl_methods = { 266 .transfer = ohci_root_ctrl_transfer, 267 .start = ohci_root_ctrl_start, 268 .abort = ohci_root_ctrl_abort, 269 .close = ohci_root_ctrl_close, 270 .cleartoggle = ohci_noop, 271 .done = ohci_root_ctrl_done, 272 }; 273 274 Static const struct usbd_pipe_methods ohci_root_intr_methods = { 275 .transfer = ohci_root_intr_transfer, 276 .start = ohci_root_intr_start, 277 .abort = ohci_root_intr_abort, 278 .close = ohci_root_intr_close, 279 .cleartoggle = ohci_noop, 280 .done = ohci_root_intr_done, 281 }; 282 283 Static const struct usbd_pipe_methods ohci_device_ctrl_methods = { 284 .transfer = ohci_device_ctrl_transfer, 285 .start = ohci_device_ctrl_start, 286 .abort = ohci_device_ctrl_abort, 287 .close = ohci_device_ctrl_close, 288 .cleartoggle = ohci_noop, 289 .done = ohci_device_ctrl_done, 290 }; 291 292 Static const struct usbd_pipe_methods ohci_device_intr_methods = { 293 .transfer = ohci_device_intr_transfer, 294 .start = ohci_device_intr_start, 295 .abort = ohci_device_intr_abort, 296 .close = ohci_device_intr_close, 297 .cleartoggle = ohci_device_clear_toggle, 298 .done = ohci_device_intr_done, 299 }; 300 301 Static const struct usbd_pipe_methods ohci_device_bulk_methods = { 302 .transfer = ohci_device_bulk_transfer, 303 .start = ohci_device_bulk_start, 304 .abort = ohci_device_bulk_abort, 305 .close = ohci_device_bulk_close, 306 .cleartoggle = ohci_device_clear_toggle, 307 .done = ohci_device_bulk_done, 308 }; 309 310 Static const struct usbd_pipe_methods ohci_device_isoc_methods = { 311 .transfer = ohci_device_isoc_transfer, 312 .start = ohci_device_isoc_start, 313 .abort = ohci_device_isoc_abort, 314 .close = ohci_device_isoc_close, 315 .cleartoggle = ohci_noop, 316 .done = ohci_device_isoc_done, 317 }; 318 319 int 320 ohci_activate(device_t self, enum devact act) 321 { 322 struct ohci_softc *sc = device_private(self); 323 324 switch (act) { 325 case DVACT_DEACTIVATE: 326 sc->sc_dying = 1; 327 return 0; 328 default: 329 return EOPNOTSUPP; 330 } 331 } 332 333 void 334 ohci_childdet(device_t self, device_t child) 335 { 336 struct ohci_softc *sc = device_private(self); 337 338 KASSERT(sc->sc_child == child); 339 sc->sc_child = NULL; 340 } 341 342 int 343 ohci_detach(struct ohci_softc *sc, int flags) 344 { 345 int rv = 0; 346 347 if (sc->sc_child != NULL) 348 rv = config_detach(sc->sc_child, flags); 349 350 if (rv != 0) 351 return (rv); 352 353 callout_stop(&sc->sc_tmo_rhsc); 354 355 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 356 callout_destroy(&sc->sc_tmo_rhsc); 357 358 softint_disestablish(sc->sc_rhsc_si); 359 360 cv_destroy(&sc->sc_softwake_cv); 361 362 mutex_destroy(&sc->sc_lock); 363 mutex_destroy(&sc->sc_intr_lock); 364 365 if (sc->sc_hcca != NULL) 366 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 367 pool_cache_destroy(sc->sc_xferpool); 368 369 return (rv); 370 } 371 372 ohci_soft_ed_t * 373 ohci_alloc_sed(ohci_softc_t *sc) 374 { 375 ohci_soft_ed_t *sed; 376 usbd_status err; 377 int i, offs; 378 usb_dma_t dma; 379 380 if (sc->sc_freeeds == NULL) { 381 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 382 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 383 OHCI_ED_ALIGN, &dma); 384 if (err) 385 return (0); 386 for (i = 0; i < OHCI_SED_CHUNK; i++) { 387 offs = i * OHCI_SED_SIZE; 388 sed = KERNADDR(&dma, offs); 389 sed->physaddr = DMAADDR(&dma, offs); 390 sed->dma = dma; 391 sed->offs = offs; 392 sed->next = sc->sc_freeeds; 393 sc->sc_freeeds = sed; 394 } 395 } 396 sed = sc->sc_freeeds; 397 sc->sc_freeeds = sed->next; 398 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 399 sed->next = 0; 400 return (sed); 401 } 402 403 void 404 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 405 { 406 sed->next = sc->sc_freeeds; 407 sc->sc_freeeds = sed; 408 } 409 410 ohci_soft_td_t * 411 ohci_alloc_std(ohci_softc_t *sc) 412 { 413 ohci_soft_td_t *std; 414 usbd_status err; 415 int i, offs; 416 usb_dma_t dma; 417 418 KASSERT(sc->sc_bus.use_polling || mutex_owned(&sc->sc_lock)); 419 420 if (sc->sc_freetds == NULL) { 421 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 422 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 423 OHCI_TD_ALIGN, &dma); 424 if (err) 425 return (NULL); 426 for(i = 0; i < OHCI_STD_CHUNK; i++) { 427 offs = i * OHCI_STD_SIZE; 428 std = KERNADDR(&dma, offs); 429 std->physaddr = DMAADDR(&dma, offs); 430 std->dma = dma; 431 std->offs = offs; 432 std->nexttd = sc->sc_freetds; 433 sc->sc_freetds = std; 434 } 435 } 436 437 std = sc->sc_freetds; 438 sc->sc_freetds = std->nexttd; 439 memset(&std->td, 0, sizeof(ohci_td_t)); 440 std->nexttd = NULL; 441 std->xfer = NULL; 442 ohci_hash_add_td(sc, std); 443 444 return (std); 445 } 446 447 void 448 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std) 449 { 450 KASSERT(sc->sc_bus.use_polling || mutex_owned(&sc->sc_lock)); 451 452 ohci_hash_rem_td(sc, std); 453 std->nexttd = sc->sc_freetds; 454 sc->sc_freetds = std; 455 } 456 457 usbd_status 458 ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc, 459 int alen, int rd, usbd_xfer_handle xfer, 460 ohci_soft_td_t *sp, ohci_soft_td_t **ep) 461 { 462 ohci_soft_td_t *next, *cur; 463 ohci_physaddr_t dataphys, dataphysend; 464 u_int32_t tdflags; 465 int len, curlen; 466 usb_dma_t *dma = &xfer->dmabuf; 467 u_int16_t flags = xfer->flags; 468 469 DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen)); 470 471 KASSERT(mutex_owned(&sc->sc_lock)); 472 473 len = alen; 474 cur = sp; 475 dataphys = DMAADDR(dma, 0); 476 dataphysend = OHCI_PAGE(dataphys + len - 1); 477 usb_syncmem(dma, 0, len, 478 rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 479 tdflags = HTOO32( 480 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 481 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) | 482 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR); 483 484 for (;;) { 485 next = ohci_alloc_std(sc); 486 if (next == NULL) 487 goto nomem; 488 489 /* The OHCI hardware can handle at most one page crossing. */ 490 if (OHCI_PAGE(dataphys) == dataphysend || 491 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) { 492 /* we can handle it in this TD */ 493 curlen = len; 494 } else { 495 /* must use multiple TDs, fill as much as possible. */ 496 curlen = 2 * OHCI_PAGE_SIZE - 497 (dataphys & (OHCI_PAGE_SIZE-1)); 498 /* the length must be a multiple of the max size */ 499 curlen -= curlen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize); 500 #ifdef DIAGNOSTIC 501 if (curlen == 0) 502 panic("ohci_alloc_std: curlen == 0"); 503 #endif 504 } 505 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x " 506 "dataphysend=0x%08x len=%d curlen=%d\n", 507 dataphys, dataphysend, 508 len, curlen)); 509 len -= curlen; 510 511 cur->td.td_flags = tdflags; 512 cur->td.td_cbp = HTOO32(dataphys); 513 cur->nexttd = next; 514 cur->td.td_nexttd = HTOO32(next->physaddr); 515 cur->td.td_be = HTOO32(dataphys + curlen - 1); 516 cur->len = curlen; 517 cur->flags = OHCI_ADD_LEN; 518 cur->xfer = xfer; 519 usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td), 520 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 521 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n", 522 dataphys, dataphys + curlen - 1)); 523 if (len == 0) 524 break; 525 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n")); 526 dataphys += curlen; 527 cur = next; 528 } 529 if (!rd && (flags & USBD_FORCE_SHORT_XFER) && 530 alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) { 531 /* Force a 0 length transfer at the end. */ 532 533 cur = next; 534 next = ohci_alloc_std(sc); 535 if (next == NULL) 536 goto nomem; 537 538 cur->td.td_flags = tdflags; 539 cur->td.td_cbp = 0; /* indicate 0 length packet */ 540 cur->nexttd = next; 541 cur->td.td_nexttd = HTOO32(next->physaddr); 542 cur->td.td_be = ~0; 543 cur->len = 0; 544 cur->flags = 0; 545 cur->xfer = xfer; 546 usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td), 547 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 548 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n")); 549 } 550 *ep = cur; 551 552 return (USBD_NORMAL_COMPLETION); 553 554 nomem: 555 556 /* Don't free sp - let the caller do that */ 557 ohci_free_std_chain(sc, sp->nexttd, NULL); 558 559 return (USBD_NOMEM); 560 } 561 562 Static void 563 ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std, 564 ohci_soft_td_t *stdend) 565 { 566 ohci_soft_td_t *p; 567 568 for (; std != stdend; std = p) { 569 p = std->nexttd; 570 ohci_free_std(sc, std); 571 } 572 } 573 574 ohci_soft_itd_t * 575 ohci_alloc_sitd(ohci_softc_t *sc) 576 { 577 ohci_soft_itd_t *sitd; 578 usbd_status err; 579 int i, offs; 580 usb_dma_t dma; 581 582 if (sc->sc_freeitds == NULL) { 583 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n")); 584 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK, 585 OHCI_ITD_ALIGN, &dma); 586 if (err) 587 return (NULL); 588 for(i = 0; i < OHCI_SITD_CHUNK; i++) { 589 offs = i * OHCI_SITD_SIZE; 590 sitd = KERNADDR(&dma, offs); 591 sitd->physaddr = DMAADDR(&dma, offs); 592 sitd->dma = dma; 593 sitd->offs = offs; 594 sitd->nextitd = sc->sc_freeitds; 595 sc->sc_freeitds = sitd; 596 } 597 } 598 599 sitd = sc->sc_freeitds; 600 sc->sc_freeitds = sitd->nextitd; 601 memset(&sitd->itd, 0, sizeof(ohci_itd_t)); 602 sitd->nextitd = NULL; 603 sitd->xfer = NULL; 604 ohci_hash_add_itd(sc, sitd); 605 606 #ifdef DIAGNOSTIC 607 sitd->isdone = 0; 608 #endif 609 610 return (sitd); 611 } 612 613 void 614 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 615 { 616 617 DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd)); 618 619 #ifdef DIAGNOSTIC 620 if (!sitd->isdone) { 621 panic("ohci_free_sitd: sitd=%p not done", sitd); 622 return; 623 } 624 /* Warn double free */ 625 sitd->isdone = 0; 626 #endif 627 628 ohci_hash_rem_itd(sc, sitd); 629 sitd->nextitd = sc->sc_freeitds; 630 sc->sc_freeitds = sitd; 631 } 632 633 usbd_status 634 ohci_init(ohci_softc_t *sc) 635 { 636 ohci_soft_ed_t *sed, *psed; 637 usbd_status err; 638 int i; 639 u_int32_t s, ctl, rwc, ival, hcr, fm, per, rev, desca /*, descb */; 640 641 DPRINTF(("ohci_init: start\n")); 642 aprint_normal_dev(sc->sc_dev, ""); 643 644 sc->sc_hcca = NULL; 645 callout_init(&sc->sc_tmo_rhsc, CALLOUT_MPSAFE); 646 647 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_SOFTUSB); 648 mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_SCHED); 649 cv_init(&sc->sc_softwake_cv, "ohciab"); 650 651 sc->sc_rhsc_si = softint_establish(SOFTINT_NET | SOFTINT_MPSAFE, 652 ohci_rhsc_softint, sc); 653 654 for (i = 0; i < OHCI_HASH_SIZE; i++) 655 LIST_INIT(&sc->sc_hash_tds[i]); 656 for (i = 0; i < OHCI_HASH_SIZE; i++) 657 LIST_INIT(&sc->sc_hash_itds[i]); 658 659 sc->sc_xferpool = pool_cache_init(sizeof(struct ohci_xfer), 0, 0, 0, 660 "ohcixfer", NULL, IPL_USB, NULL, NULL, NULL); 661 662 rev = OREAD4(sc, OHCI_REVISION); 663 aprint_normal("OHCI version %d.%d%s\n", 664 OHCI_REV_HI(rev), OHCI_REV_LO(rev), 665 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 666 667 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 668 aprint_error_dev(sc->sc_dev, "unsupported OHCI revision\n"); 669 sc->sc_bus.usbrev = USBREV_UNKNOWN; 670 return (USBD_INVAL); 671 } 672 sc->sc_bus.usbrev = USBREV_1_0; 673 674 usb_setup_reserve(sc->sc_dev, &sc->sc_dma_reserve, sc->sc_bus.dmatag, 675 USB_MEM_RESERVE); 676 677 /* XXX determine alignment by R/W */ 678 /* Allocate the HCCA area. */ 679 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 680 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 681 if (err) { 682 sc->sc_hcca = NULL; 683 return err; 684 } 685 sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0); 686 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 687 688 sc->sc_eintrs = OHCI_NORMAL_INTRS; 689 690 /* Allocate dummy ED that starts the control list. */ 691 sc->sc_ctrl_head = ohci_alloc_sed(sc); 692 if (sc->sc_ctrl_head == NULL) { 693 err = USBD_NOMEM; 694 goto bad1; 695 } 696 sc->sc_ctrl_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 697 698 /* Allocate dummy ED that starts the bulk list. */ 699 sc->sc_bulk_head = ohci_alloc_sed(sc); 700 if (sc->sc_bulk_head == NULL) { 701 err = USBD_NOMEM; 702 goto bad2; 703 } 704 sc->sc_bulk_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 705 usb_syncmem(&sc->sc_bulk_head->dma, sc->sc_bulk_head->offs, 706 sizeof(sc->sc_bulk_head->ed), 707 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 708 709 /* Allocate dummy ED that starts the isochronous list. */ 710 sc->sc_isoc_head = ohci_alloc_sed(sc); 711 if (sc->sc_isoc_head == NULL) { 712 err = USBD_NOMEM; 713 goto bad3; 714 } 715 sc->sc_isoc_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 716 usb_syncmem(&sc->sc_isoc_head->dma, sc->sc_isoc_head->offs, 717 sizeof(sc->sc_isoc_head->ed), 718 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 719 720 /* Allocate all the dummy EDs that make up the interrupt tree. */ 721 for (i = 0; i < OHCI_NO_EDS; i++) { 722 sed = ohci_alloc_sed(sc); 723 if (sed == NULL) { 724 while (--i >= 0) 725 ohci_free_sed(sc, sc->sc_eds[i]); 726 err = USBD_NOMEM; 727 goto bad4; 728 } 729 /* All ED fields are set to 0. */ 730 sc->sc_eds[i] = sed; 731 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 732 if (i != 0) 733 psed = sc->sc_eds[(i-1) / 2]; 734 else 735 psed= sc->sc_isoc_head; 736 sed->next = psed; 737 sed->ed.ed_nexted = HTOO32(psed->physaddr); 738 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 739 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 740 } 741 /* 742 * Fill HCCA interrupt table. The bit reversal is to get 743 * the tree set up properly to spread the interrupts. 744 */ 745 for (i = 0; i < OHCI_NO_INTRS; i++) 746 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 747 HTOO32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 748 usb_syncmem(&sc->sc_hccadma, 0, OHCI_HCCA_SIZE, 749 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 750 751 #ifdef OHCI_DEBUG 752 if (ohcidebug > 15) { 753 for (i = 0; i < OHCI_NO_EDS; i++) { 754 printf("ed#%d ", i); 755 ohci_dump_ed(sc, sc->sc_eds[i]); 756 } 757 printf("iso "); 758 ohci_dump_ed(sc, sc->sc_isoc_head); 759 } 760 #endif 761 762 /* Preserve values programmed by SMM/BIOS but lost over reset. */ 763 ctl = OREAD4(sc, OHCI_CONTROL); 764 rwc = ctl & OHCI_RWC; 765 fm = OREAD4(sc, OHCI_FM_INTERVAL); 766 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 767 /* descb = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); */ 768 769 /* Determine in what context we are running. */ 770 if (ctl & OHCI_IR) { 771 /* SMM active, request change */ 772 DPRINTF(("ohci_init: SMM active, request owner change\n")); 773 if ((sc->sc_intre & (OHCI_OC | OHCI_MIE)) == 774 (OHCI_OC | OHCI_MIE)) 775 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_MIE); 776 s = OREAD4(sc, OHCI_COMMAND_STATUS); 777 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 778 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 779 usb_delay_ms(&sc->sc_bus, 1); 780 ctl = OREAD4(sc, OHCI_CONTROL); 781 } 782 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_MIE); 783 if ((ctl & OHCI_IR) == 0) { 784 aprint_error_dev(sc->sc_dev, 785 "SMM does not respond, resetting\n"); 786 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 787 goto reset; 788 } 789 #if 0 790 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */ 791 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 792 /* BIOS started controller. */ 793 DPRINTF(("ohci_init: BIOS active\n")); 794 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 795 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL | rwc); 796 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 797 } 798 #endif 799 } else { 800 DPRINTF(("ohci_init: cold started\n")); 801 reset: 802 /* Controller was cold started. */ 803 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 804 } 805 806 /* 807 * This reset should not be necessary according to the OHCI spec, but 808 * without it some controllers do not start. 809 */ 810 DPRINTF(("%s: resetting\n", device_xname(sc->sc_dev))); 811 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 812 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 813 814 /* We now own the host controller and the bus has been reset. */ 815 816 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 817 /* Nominal time for a reset is 10 us. */ 818 for (i = 0; i < 10; i++) { 819 delay(10); 820 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 821 if (!hcr) 822 break; 823 } 824 if (hcr) { 825 aprint_error_dev(sc->sc_dev, "reset timeout\n"); 826 err = USBD_IOERROR; 827 goto bad5; 828 } 829 #ifdef OHCI_DEBUG 830 if (ohcidebug > 15) 831 ohci_dumpregs(sc); 832 #endif 833 834 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 835 836 /* Set up HC registers. */ 837 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 838 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 839 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 840 /* disable all interrupts and then switch on all desired interrupts */ 841 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 842 /* switch on desired functional features */ 843 ctl = OREAD4(sc, OHCI_CONTROL); 844 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 845 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 846 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL | rwc; 847 /* And finally start it! */ 848 OWRITE4(sc, OHCI_CONTROL, ctl); 849 850 /* 851 * The controller is now OPERATIONAL. Set a some final 852 * registers that should be set earlier, but that the 853 * controller ignores when in the SUSPEND state. 854 */ 855 ival = OHCI_GET_IVAL(fm); 856 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 857 fm |= OHCI_FSMPS(ival) | ival; 858 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 859 per = OHCI_PERIODIC(ival); /* 90% periodic */ 860 OWRITE4(sc, OHCI_PERIODIC_START, per); 861 862 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */ 863 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP); 864 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 865 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY); 866 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca); 867 868 /* 869 * The AMD756 requires a delay before re-reading the register, 870 * otherwise it will occasionally report 0 ports. 871 */ 872 sc->sc_noport = 0; 873 for (i = 0; i < 10 && sc->sc_noport == 0; i++) { 874 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY); 875 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 876 } 877 878 #ifdef OHCI_DEBUG 879 if (ohcidebug > 5) 880 ohci_dumpregs(sc); 881 #endif 882 883 /* Set up the bus struct. */ 884 sc->sc_bus.methods = &ohci_bus_methods; 885 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 886 887 sc->sc_control = sc->sc_intre = 0; 888 889 /* Finally, turn on interrupts. */ 890 DPRINTFN(1,("ohci_init: enabling %#x\n", sc->sc_eintrs | OHCI_MIE)); 891 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 892 893 return (USBD_NORMAL_COMPLETION); 894 895 bad5: 896 for (i = 0; i < OHCI_NO_EDS; i++) 897 ohci_free_sed(sc, sc->sc_eds[i]); 898 bad4: 899 ohci_free_sed(sc, sc->sc_isoc_head); 900 bad3: 901 ohci_free_sed(sc, sc->sc_bulk_head); 902 bad2: 903 ohci_free_sed(sc, sc->sc_ctrl_head); 904 bad1: 905 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 906 sc->sc_hcca = NULL; 907 return (err); 908 } 909 910 usbd_status 911 ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 912 { 913 struct ohci_softc *sc = bus->hci_private; 914 usbd_status status; 915 916 status = usb_allocmem(&sc->sc_bus, size, 0, dma); 917 if (status == USBD_NOMEM) 918 status = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size); 919 return status; 920 } 921 922 void 923 ohci_freem(struct usbd_bus *bus, usb_dma_t *dma) 924 { 925 struct ohci_softc *sc = bus->hci_private; 926 if (dma->block->flags & USB_DMA_RESERVE) { 927 usb_reserve_freem(&sc->sc_dma_reserve, dma); 928 return; 929 } 930 usb_freemem(&sc->sc_bus, dma); 931 } 932 933 usbd_xfer_handle 934 ohci_allocx(struct usbd_bus *bus) 935 { 936 struct ohci_softc *sc = bus->hci_private; 937 usbd_xfer_handle xfer; 938 939 xfer = pool_cache_get(sc->sc_xferpool, PR_NOWAIT); 940 if (xfer != NULL) { 941 memset(xfer, 0, sizeof(struct ohci_xfer)); 942 #ifdef DIAGNOSTIC 943 xfer->busy_free = XFER_BUSY; 944 #endif 945 } 946 return (xfer); 947 } 948 949 void 950 ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 951 { 952 struct ohci_softc *sc = bus->hci_private; 953 954 #ifdef DIAGNOSTIC 955 if (xfer->busy_free != XFER_BUSY) { 956 printf("ohci_freex: xfer=%p not busy, 0x%08x\n", xfer, 957 xfer->busy_free); 958 } 959 xfer->busy_free = XFER_FREE; 960 #endif 961 pool_cache_put(sc->sc_xferpool, xfer); 962 } 963 964 Static void 965 ohci_get_lock(struct usbd_bus *bus, kmutex_t **lock) 966 { 967 struct ohci_softc *sc = bus->hci_private; 968 969 *lock = &sc->sc_lock; 970 } 971 972 /* 973 * Shut down the controller when the system is going down. 974 */ 975 bool 976 ohci_shutdown(device_t self, int flags) 977 { 978 ohci_softc_t *sc = device_private(self); 979 980 DPRINTF(("ohci_shutdown: stopping the HC\n")); 981 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 982 return true; 983 } 984 985 bool 986 ohci_resume(device_t dv, const pmf_qual_t *qual) 987 { 988 ohci_softc_t *sc = device_private(dv); 989 uint32_t ctl; 990 991 mutex_spin_enter(&sc->sc_intr_lock); 992 sc->sc_bus.use_polling++; 993 mutex_spin_exit(&sc->sc_intr_lock); 994 995 /* Some broken BIOSes do not recover these values */ 996 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 997 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, 998 sc->sc_ctrl_head->physaddr); 999 OWRITE4(sc, OHCI_BULK_HEAD_ED, 1000 sc->sc_bulk_head->physaddr); 1001 if (sc->sc_intre) 1002 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_intre & 1003 (OHCI_ALL_INTRS | OHCI_MIE)); 1004 if (sc->sc_control) 1005 ctl = sc->sc_control; 1006 else 1007 ctl = OREAD4(sc, OHCI_CONTROL); 1008 ctl |= OHCI_HCFS_RESUME; 1009 OWRITE4(sc, OHCI_CONTROL, ctl); 1010 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 1011 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL; 1012 OWRITE4(sc, OHCI_CONTROL, ctl); 1013 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 1014 sc->sc_control = sc->sc_intre = 0; 1015 1016 mutex_spin_enter(&sc->sc_intr_lock); 1017 sc->sc_bus.use_polling--; 1018 mutex_spin_exit(&sc->sc_intr_lock); 1019 1020 return true; 1021 } 1022 1023 bool 1024 ohci_suspend(device_t dv, const pmf_qual_t *qual) 1025 { 1026 ohci_softc_t *sc = device_private(dv); 1027 uint32_t ctl; 1028 1029 mutex_spin_enter(&sc->sc_intr_lock); 1030 sc->sc_bus.use_polling++; 1031 mutex_spin_exit(&sc->sc_intr_lock); 1032 1033 ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK; 1034 if (sc->sc_control == 0) { 1035 /* 1036 * Preserve register values, in case that BIOS 1037 * does not recover them. 1038 */ 1039 sc->sc_control = ctl; 1040 sc->sc_intre = OREAD4(sc, 1041 OHCI_INTERRUPT_ENABLE); 1042 } 1043 ctl |= OHCI_HCFS_SUSPEND; 1044 OWRITE4(sc, OHCI_CONTROL, ctl); 1045 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1046 1047 mutex_spin_enter(&sc->sc_intr_lock); 1048 sc->sc_bus.use_polling--; 1049 mutex_spin_exit(&sc->sc_intr_lock); 1050 1051 return true; 1052 } 1053 1054 #ifdef OHCI_DEBUG 1055 void 1056 ohci_dumpregs(ohci_softc_t *sc) 1057 { 1058 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 1059 OREAD4(sc, OHCI_REVISION), 1060 OREAD4(sc, OHCI_CONTROL), 1061 OREAD4(sc, OHCI_COMMAND_STATUS))); 1062 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 1063 OREAD4(sc, OHCI_INTERRUPT_STATUS), 1064 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 1065 OREAD4(sc, OHCI_INTERRUPT_DISABLE))); 1066 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 1067 OREAD4(sc, OHCI_HCCA), 1068 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 1069 OREAD4(sc, OHCI_CONTROL_HEAD_ED))); 1070 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 1071 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 1072 OREAD4(sc, OHCI_BULK_HEAD_ED), 1073 OREAD4(sc, OHCI_BULK_CURRENT_ED))); 1074 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 1075 OREAD4(sc, OHCI_DONE_HEAD), 1076 OREAD4(sc, OHCI_FM_INTERVAL), 1077 OREAD4(sc, OHCI_FM_REMAINING))); 1078 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 1079 OREAD4(sc, OHCI_FM_NUMBER), 1080 OREAD4(sc, OHCI_PERIODIC_START), 1081 OREAD4(sc, OHCI_LS_THRESHOLD))); 1082 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n", 1083 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 1084 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 1085 OREAD4(sc, OHCI_RH_STATUS))); 1086 DPRINTF((" port1=0x%08x port2=0x%08x\n", 1087 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 1088 OREAD4(sc, OHCI_RH_PORT_STATUS(2)))); 1089 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n", 1090 O32TOH(sc->sc_hcca->hcca_frame_number), 1091 O32TOH(sc->sc_hcca->hcca_done_head))); 1092 } 1093 #endif 1094 1095 Static int ohci_intr1(ohci_softc_t *); 1096 1097 int 1098 ohci_intr(void *p) 1099 { 1100 ohci_softc_t *sc = p; 1101 int ret = 0; 1102 1103 if (sc == NULL) 1104 return (0); 1105 1106 mutex_spin_enter(&sc->sc_intr_lock); 1107 1108 if (sc->sc_dying || !device_has_power(sc->sc_dev)) 1109 goto done; 1110 1111 /* If we get an interrupt while polling, then just ignore it. */ 1112 if (sc->sc_bus.use_polling) { 1113 #ifdef DIAGNOSTIC 1114 DPRINTFN(16, ("ohci_intr: ignored interrupt while polling\n")); 1115 #endif 1116 /* for level triggered intrs, should do something to ack */ 1117 OWRITE4(sc, OHCI_INTERRUPT_STATUS, 1118 OREAD4(sc, OHCI_INTERRUPT_STATUS)); 1119 1120 goto done; 1121 } 1122 1123 ret = ohci_intr1(sc); 1124 1125 done: 1126 mutex_spin_exit(&sc->sc_intr_lock); 1127 return ret; 1128 } 1129 1130 Static int 1131 ohci_intr1(ohci_softc_t *sc) 1132 { 1133 u_int32_t intrs, eintrs; 1134 1135 DPRINTFN(14,("ohci_intr1: enter\n")); 1136 1137 /* In case the interrupt occurs before initialization has completed. */ 1138 if (sc == NULL || sc->sc_hcca == NULL) { 1139 #ifdef DIAGNOSTIC 1140 printf("ohci_intr: sc->sc_hcca == NULL\n"); 1141 #endif 1142 return (0); 1143 } 1144 1145 KASSERT(mutex_owned(&sc->sc_intr_lock)); 1146 1147 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1148 if (!intrs) 1149 return (0); 1150 1151 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs & ~(OHCI_MIE|OHCI_WDH)); /* Acknowledge */ 1152 eintrs = intrs & sc->sc_eintrs; 1153 DPRINTFN(7, ("ohci_intr: sc=%p intrs=%#x(%#x) eintrs=%#x(%#x)\n", 1154 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 1155 (u_int)eintrs, sc->sc_eintrs)); 1156 1157 if (!eintrs) { 1158 return (0); 1159 } 1160 1161 sc->sc_bus.no_intrs++; 1162 if (eintrs & OHCI_SO) { 1163 sc->sc_overrun_cnt++; 1164 if (usbd_ratecheck(&sc->sc_overrun_ntc)) { 1165 printf("%s: %u scheduling overruns\n", 1166 device_xname(sc->sc_dev), sc->sc_overrun_cnt); 1167 sc->sc_overrun_cnt = 0; 1168 } 1169 /* XXX do what */ 1170 eintrs &= ~OHCI_SO; 1171 } 1172 if (eintrs & OHCI_WDH) { 1173 /* 1174 * We block the interrupt below, and reenable it later from 1175 * ohci_softintr(). 1176 */ 1177 usb_schedsoftintr(&sc->sc_bus); 1178 } 1179 if (eintrs & OHCI_RD) { 1180 printf("%s: resume detect\n", device_xname(sc->sc_dev)); 1181 /* XXX process resume detect */ 1182 } 1183 if (eintrs & OHCI_UE) { 1184 printf("%s: unrecoverable error, controller halted\n", 1185 device_xname(sc->sc_dev)); 1186 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1187 /* XXX what else */ 1188 } 1189 if (eintrs & OHCI_RHSC) { 1190 /* 1191 * We block the interrupt below, and reenable it later from 1192 * a timeout. 1193 */ 1194 softint_schedule(sc->sc_rhsc_si); 1195 } 1196 1197 if (eintrs != 0) { 1198 /* Block unprocessed interrupts. */ 1199 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs); 1200 sc->sc_eintrs &= ~eintrs; 1201 DPRINTFN(1, ("%s: blocking intrs 0x%x\n", 1202 device_xname(sc->sc_dev), eintrs)); 1203 } 1204 1205 return (1); 1206 } 1207 1208 void 1209 ohci_rhsc_enable(void *v_sc) 1210 { 1211 ohci_softc_t *sc = v_sc; 1212 1213 DPRINTFN(1, ("%s: %s\n", __func__, device_xname(sc->sc_dev))); 1214 mutex_spin_enter(&sc->sc_intr_lock); 1215 sc->sc_eintrs |= OHCI_RHSC; 1216 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1217 mutex_spin_exit(&sc->sc_intr_lock); 1218 } 1219 1220 #ifdef OHCI_DEBUG 1221 const char *ohci_cc_strs[] = { 1222 "NO_ERROR", 1223 "CRC", 1224 "BIT_STUFFING", 1225 "DATA_TOGGLE_MISMATCH", 1226 "STALL", 1227 "DEVICE_NOT_RESPONDING", 1228 "PID_CHECK_FAILURE", 1229 "UNEXPECTED_PID", 1230 "DATA_OVERRUN", 1231 "DATA_UNDERRUN", 1232 "BUFFER_OVERRUN", 1233 "BUFFER_UNDERRUN", 1234 "reserved", 1235 "reserved", 1236 "NOT_ACCESSED", 1237 "NOT_ACCESSED", 1238 }; 1239 #endif 1240 1241 void 1242 ohci_softintr(void *v) 1243 { 1244 struct usbd_bus *bus = v; 1245 ohci_softc_t *sc = bus->hci_private; 1246 ohci_soft_itd_t *sitd, *sidone, *sitdnext; 1247 ohci_soft_td_t *std, *sdone, *stdnext; 1248 usbd_xfer_handle xfer; 1249 struct ohci_pipe *opipe; 1250 int len, cc; 1251 int i, j, actlen, iframes, uedir; 1252 ohci_physaddr_t done; 1253 1254 KASSERT(sc->sc_bus.use_polling || mutex_owned(&sc->sc_lock)); 1255 1256 DPRINTFN(10,("ohci_softintr: enter\n")); 1257 1258 usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head), 1259 sizeof(sc->sc_hcca->hcca_done_head), 1260 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1261 done = O32TOH(sc->sc_hcca->hcca_done_head) & ~OHCI_DONE_INTRS; 1262 sc->sc_hcca->hcca_done_head = 0; 1263 usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head), 1264 sizeof(sc->sc_hcca->hcca_done_head), 1265 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1266 OWRITE4(sc, OHCI_INTERRUPT_STATUS, OHCI_WDH); 1267 sc->sc_eintrs |= OHCI_WDH; 1268 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_WDH); 1269 1270 /* Reverse the done list. */ 1271 for (sdone = NULL, sidone = NULL; done != 0; ) { 1272 std = ohci_hash_find_td(sc, done); 1273 if (std != NULL) { 1274 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 1275 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1276 std->dnext = sdone; 1277 done = O32TOH(std->td.td_nexttd); 1278 sdone = std; 1279 DPRINTFN(10,("add TD %p\n", std)); 1280 continue; 1281 } 1282 sitd = ohci_hash_find_itd(sc, done); 1283 if (sitd != NULL) { 1284 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 1285 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1286 sitd->dnext = sidone; 1287 done = O32TOH(sitd->itd.itd_nextitd); 1288 sidone = sitd; 1289 DPRINTFN(5,("add ITD %p\n", sitd)); 1290 continue; 1291 } 1292 device_printf(sc->sc_dev, "WARNING: addr 0x%08lx not found\n", 1293 (u_long)done); 1294 break; 1295 } 1296 1297 DPRINTFN(10,("ohci_softintr: sdone=%p sidone=%p\n", sdone, sidone)); 1298 1299 #ifdef OHCI_DEBUG 1300 if (ohcidebug > 10) { 1301 DPRINTF(("ohci_process_done: TD done:\n")); 1302 for (std = sdone; std; std = std->dnext) 1303 ohci_dump_td(sc, std); 1304 } 1305 #endif 1306 1307 for (std = sdone; std; std = stdnext) { 1308 xfer = std->xfer; 1309 stdnext = std->dnext; 1310 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n", 1311 std, xfer, xfer ? xfer->hcpriv : 0)); 1312 if (xfer == NULL) { 1313 /* 1314 * xfer == NULL: There seems to be no xfer associated 1315 * with this TD. It is tailp that happened to end up on 1316 * the done queue. 1317 * Shouldn't happen, but some chips are broken(?). 1318 */ 1319 continue; 1320 } 1321 if (xfer->status == USBD_CANCELLED || 1322 xfer->status == USBD_TIMEOUT) { 1323 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1324 xfer)); 1325 /* Handled by abort routine. */ 1326 continue; 1327 } 1328 callout_stop(&xfer->timeout_handle); 1329 1330 len = std->len; 1331 if (std->td.td_cbp != 0) 1332 len -= O32TOH(std->td.td_be) - 1333 O32TOH(std->td.td_cbp) + 1; 1334 DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", len, 1335 std->flags)); 1336 if (std->flags & OHCI_ADD_LEN) 1337 xfer->actlen += len; 1338 1339 cc = OHCI_TD_GET_CC(O32TOH(std->td.td_flags)); 1340 if (cc == OHCI_CC_NO_ERROR) { 1341 if (std->flags & OHCI_CALL_DONE) { 1342 xfer->status = USBD_NORMAL_COMPLETION; 1343 usb_transfer_complete(xfer); 1344 } 1345 ohci_free_std(sc, std); 1346 } else { 1347 /* 1348 * Endpoint is halted. First unlink all the TDs 1349 * belonging to the failed transfer, and then restart 1350 * the endpoint. 1351 */ 1352 ohci_soft_td_t *p, *n; 1353 opipe = (struct ohci_pipe *)xfer->pipe; 1354 1355 DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n", 1356 OHCI_TD_GET_CC(O32TOH(std->td.td_flags)), 1357 ohci_cc_strs[OHCI_TD_GET_CC(O32TOH(std->td.td_flags))])); 1358 1359 /* remove TDs */ 1360 for (p = std; p->xfer == xfer; p = n) { 1361 n = p->nexttd; 1362 ohci_free_std(sc, p); 1363 } 1364 1365 /* clear halt */ 1366 opipe->sed->ed.ed_headp = HTOO32(p->physaddr); 1367 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1368 1369 if (cc == OHCI_CC_STALL) 1370 xfer->status = USBD_STALLED; 1371 else 1372 xfer->status = USBD_IOERROR; 1373 usb_transfer_complete(xfer); 1374 } 1375 } 1376 1377 #ifdef OHCI_DEBUG 1378 if (ohcidebug > 10) { 1379 DPRINTF(("ohci_softintr: ITD done:\n")); 1380 for (sitd = sidone; sitd; sitd = sitd->dnext) 1381 ohci_dump_itd(sc, sitd); 1382 } 1383 #endif 1384 1385 for (sitd = sidone; sitd != NULL; sitd = sitdnext) { 1386 xfer = sitd->xfer; 1387 sitdnext = sitd->dnext; 1388 DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n", 1389 sitd, xfer, xfer ? xfer->hcpriv : 0)); 1390 if (xfer == NULL) 1391 continue; 1392 if (xfer->status == USBD_CANCELLED || 1393 xfer->status == USBD_TIMEOUT) { 1394 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1395 xfer)); 1396 /* Handled by abort routine. */ 1397 continue; 1398 } 1399 #ifdef DIAGNOSTIC 1400 if (sitd->isdone) 1401 printf("ohci_softintr: sitd=%p is done\n", sitd); 1402 sitd->isdone = 1; 1403 #endif 1404 if (sitd->flags & OHCI_CALL_DONE) { 1405 ohci_soft_itd_t *next; 1406 1407 opipe = (struct ohci_pipe *)xfer->pipe; 1408 opipe->u.iso.inuse -= xfer->nframes; 1409 uedir = UE_GET_DIR(xfer->pipe->endpoint->edesc-> 1410 bEndpointAddress); 1411 xfer->status = USBD_NORMAL_COMPLETION; 1412 actlen = 0; 1413 for (i = 0, sitd = xfer->hcpriv;; 1414 sitd = next) { 1415 next = sitd->nextitd; 1416 if (OHCI_ITD_GET_CC(O32TOH(sitd-> 1417 itd.itd_flags)) != OHCI_CC_NO_ERROR) 1418 xfer->status = USBD_IOERROR; 1419 /* For input, update frlengths with actual */ 1420 /* XXX anything necessary for output? */ 1421 if (uedir == UE_DIR_IN && 1422 xfer->status == USBD_NORMAL_COMPLETION) { 1423 iframes = OHCI_ITD_GET_FC(O32TOH( 1424 sitd->itd.itd_flags)); 1425 for (j = 0; j < iframes; i++, j++) { 1426 len = O16TOH(sitd-> 1427 itd.itd_offset[j]); 1428 if ((OHCI_ITD_PSW_GET_CC(len) & 1429 OHCI_CC_NOT_ACCESSED_MASK) 1430 == OHCI_CC_NOT_ACCESSED) 1431 len = 0; 1432 else 1433 len = OHCI_ITD_PSW_LENGTH(len); 1434 xfer->frlengths[i] = len; 1435 actlen += len; 1436 } 1437 } 1438 if (sitd->flags & OHCI_CALL_DONE) 1439 break; 1440 ohci_free_sitd(sc, sitd); 1441 } 1442 ohci_free_sitd(sc, sitd); 1443 if (uedir == UE_DIR_IN && 1444 xfer->status == USBD_NORMAL_COMPLETION) 1445 xfer->actlen = actlen; 1446 xfer->hcpriv = NULL; 1447 1448 usb_transfer_complete(xfer); 1449 } 1450 } 1451 1452 if (sc->sc_softwake) { 1453 sc->sc_softwake = 0; 1454 cv_broadcast(&sc->sc_softwake_cv); 1455 } 1456 1457 DPRINTFN(10,("ohci_softintr: done:\n")); 1458 } 1459 1460 void 1461 ohci_device_ctrl_done(usbd_xfer_handle xfer) 1462 { 1463 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1464 #ifdef DIAGNOSTIC 1465 ohci_softc_t *sc = xfer->pipe->device->bus->hci_private; 1466 #endif 1467 int len = UGETW(xfer->request.wLength); 1468 int isread = (xfer->request.bmRequestType & UT_READ); 1469 1470 DPRINTFN(10,("ohci_device_ctrl_done: xfer=%p\n", xfer)); 1471 1472 KASSERT(sc->sc_bus.use_polling || mutex_owned(&sc->sc_lock)); 1473 1474 #ifdef DIAGNOSTIC 1475 if (!(xfer->rqflags & URQ_REQUEST)) { 1476 panic("ohci_device_ctrl_done: not a request"); 1477 } 1478 #endif 1479 if (len) 1480 usb_syncmem(&xfer->dmabuf, 0, len, 1481 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1482 usb_syncmem(&opipe->u.ctl.reqdma, 0, 1483 sizeof(usb_device_request_t), BUS_DMASYNC_POSTWRITE); 1484 } 1485 1486 void 1487 ohci_device_intr_done(usbd_xfer_handle xfer) 1488 { 1489 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1490 ohci_softc_t *sc = opipe->pipe.device->bus->hci_private; 1491 ohci_soft_ed_t *sed = opipe->sed; 1492 ohci_soft_td_t *data, *tail; 1493 int isread = 1494 (UE_GET_DIR(xfer->pipe->endpoint->edesc->bEndpointAddress) == UE_DIR_IN); 1495 1496 DPRINTFN(10,("ohci_device_intr_done: xfer=%p, actlen=%d\n", 1497 xfer, xfer->actlen)); 1498 1499 KASSERT(sc->sc_bus.use_polling || mutex_owned(&sc->sc_lock)); 1500 1501 usb_syncmem(&xfer->dmabuf, 0, xfer->length, 1502 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1503 if (xfer->pipe->repeat) { 1504 data = opipe->tail.td; 1505 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 1506 if (tail == NULL) { 1507 xfer->status = USBD_NOMEM; 1508 return; 1509 } 1510 tail->xfer = NULL; 1511 1512 data->td.td_flags = HTOO32( 1513 OHCI_TD_IN | OHCI_TD_NOCC | 1514 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 1515 if (xfer->flags & USBD_SHORT_XFER_OK) 1516 data->td.td_flags |= HTOO32(OHCI_TD_R); 1517 data->td.td_cbp = HTOO32(DMAADDR(&xfer->dmabuf, 0)); 1518 data->nexttd = tail; 1519 data->td.td_nexttd = HTOO32(tail->physaddr); 1520 data->td.td_be = HTOO32(O32TOH(data->td.td_cbp) + 1521 xfer->length - 1); 1522 data->len = xfer->length; 1523 data->xfer = xfer; 1524 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1525 usb_syncmem(&data->dma, data->offs, sizeof(data->td), 1526 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1527 xfer->hcpriv = data; 1528 xfer->actlen = 0; 1529 1530 sed->ed.ed_tailp = HTOO32(tail->physaddr); 1531 usb_syncmem(&sed->dma, 1532 sed->offs + offsetof(ohci_ed_t, ed_tailp), 1533 sizeof(sed->ed.ed_tailp), 1534 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1535 opipe->tail.td = tail; 1536 } 1537 } 1538 1539 void 1540 ohci_device_bulk_done(usbd_xfer_handle xfer) 1541 { 1542 #ifdef DIAGNOSTIC 1543 ohci_softc_t *sc = xfer->pipe->device->bus->hci_private; 1544 #endif 1545 int isread = 1546 (UE_GET_DIR(xfer->pipe->endpoint->edesc->bEndpointAddress) == UE_DIR_IN); 1547 1548 KASSERT(mutex_owned(&sc->sc_lock)); 1549 1550 DPRINTFN(10,("ohci_device_bulk_done: xfer=%p, actlen=%d\n", 1551 xfer, xfer->actlen)); 1552 usb_syncmem(&xfer->dmabuf, 0, xfer->length, 1553 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1554 } 1555 1556 Static void 1557 ohci_rhsc_softint(void *arg) 1558 { 1559 ohci_softc_t *sc = arg; 1560 1561 mutex_enter(&sc->sc_lock); 1562 1563 ohci_rhsc(sc, sc->sc_intrxfer); 1564 1565 /* Do not allow RHSC interrupts > 1 per second */ 1566 callout_reset(&sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc); 1567 1568 mutex_exit(&sc->sc_lock); 1569 } 1570 1571 void 1572 ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer) 1573 { 1574 u_char *p; 1575 int i, m; 1576 int hstatus __unused; 1577 1578 KASSERT(mutex_owned(&sc->sc_lock)); 1579 1580 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1581 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n", 1582 sc, xfer, hstatus)); 1583 1584 if (xfer == NULL) { 1585 /* Just ignore the change. */ 1586 return; 1587 } 1588 1589 p = KERNADDR(&xfer->dmabuf, 0); 1590 m = min(sc->sc_noport, xfer->length * 8 - 1); 1591 memset(p, 0, xfer->length); 1592 for (i = 1; i <= m; i++) { 1593 /* Pick out CHANGE bits from the status reg. */ 1594 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1595 p[i/8] |= 1 << (i%8); 1596 } 1597 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 1598 xfer->actlen = xfer->length; 1599 xfer->status = USBD_NORMAL_COMPLETION; 1600 1601 usb_transfer_complete(xfer); 1602 } 1603 1604 void 1605 ohci_root_intr_done(usbd_xfer_handle xfer) 1606 { 1607 } 1608 1609 void 1610 ohci_root_ctrl_done(usbd_xfer_handle xfer) 1611 { 1612 } 1613 1614 /* 1615 * Wait here until controller claims to have an interrupt. 1616 * Then call ohci_intr and return. Use timeout to avoid waiting 1617 * too long. 1618 */ 1619 void 1620 ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer) 1621 { 1622 int timo; 1623 u_int32_t intrs; 1624 1625 mutex_enter(&sc->sc_lock); 1626 1627 xfer->status = USBD_IN_PROGRESS; 1628 for (timo = xfer->timeout; timo >= 0; timo--) { 1629 usb_delay_ms(&sc->sc_bus, 1); 1630 if (sc->sc_dying) 1631 break; 1632 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 1633 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs)); 1634 #ifdef OHCI_DEBUG 1635 if (ohcidebug > 15) 1636 ohci_dumpregs(sc); 1637 #endif 1638 if (intrs) { 1639 mutex_spin_enter(&sc->sc_intr_lock); 1640 ohci_intr1(sc); 1641 mutex_spin_exit(&sc->sc_intr_lock); 1642 if (xfer->status != USBD_IN_PROGRESS) 1643 goto done; 1644 } 1645 } 1646 1647 /* Timeout */ 1648 DPRINTF(("ohci_waitintr: timeout\n")); 1649 xfer->status = USBD_TIMEOUT; 1650 usb_transfer_complete(xfer); 1651 1652 /* XXX should free TD */ 1653 1654 done: 1655 mutex_exit(&sc->sc_lock); 1656 } 1657 1658 void 1659 ohci_poll(struct usbd_bus *bus) 1660 { 1661 ohci_softc_t *sc = bus->hci_private; 1662 #ifdef OHCI_DEBUG 1663 static int last; 1664 int new; 1665 new = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1666 if (new != last) { 1667 DPRINTFN(10,("ohci_poll: intrs=0x%04x\n", new)); 1668 last = new; 1669 } 1670 #endif 1671 sc->sc_eintrs |= OHCI_WDH; 1672 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) { 1673 mutex_spin_enter(&sc->sc_intr_lock); 1674 ohci_intr1(sc); 1675 mutex_spin_exit(&sc->sc_intr_lock); 1676 } 1677 } 1678 1679 usbd_status 1680 ohci_device_request(usbd_xfer_handle xfer) 1681 { 1682 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1683 usb_device_request_t *req = &xfer->request; 1684 usbd_device_handle dev = opipe->pipe.device; 1685 ohci_softc_t *sc = dev->bus->hci_private; 1686 ohci_soft_td_t *setup, *stat, *next, *tail; 1687 ohci_soft_ed_t *sed; 1688 int isread; 1689 int len; 1690 usbd_status err; 1691 1692 KASSERT(mutex_owned(&sc->sc_lock)); 1693 1694 isread = req->bmRequestType & UT_READ; 1695 len = UGETW(req->wLength); 1696 1697 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 1698 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 1699 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1700 UGETW(req->wIndex), len, dev->address, 1701 opipe->pipe.endpoint->edesc->bEndpointAddress)); 1702 1703 setup = opipe->tail.td; 1704 stat = ohci_alloc_std(sc); 1705 if (stat == NULL) { 1706 err = USBD_NOMEM; 1707 goto bad1; 1708 } 1709 tail = ohci_alloc_std(sc); 1710 if (tail == NULL) { 1711 err = USBD_NOMEM; 1712 goto bad2; 1713 } 1714 tail->xfer = NULL; 1715 1716 sed = opipe->sed; 1717 opipe->u.ctl.length = len; 1718 1719 /* XXX is this ever written to by hardware ??? */ 1720 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 1721 sizeof(sed->ed.ed_flags), 1722 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1723 1724 KASSERT(OHCI_ED_GET_FA(HTOO32(sed->ed.ed_flags)) == dev->address); 1725 KASSERT(OHCI_ED_SET_MAXP(HTOO32(sed->ed.ed_flags)) == 1726 UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize)); 1727 1728 next = stat; 1729 1730 /* Set up data transaction */ 1731 if (len != 0) { 1732 ohci_soft_td_t *std = stat; 1733 1734 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 1735 std, &stat); 1736 if (err) { 1737 /* stat is unchanged if error */ 1738 goto bad3; 1739 } 1740 stat = stat->nexttd; /* point at free TD */ 1741 1742 /* Start toggle at 1 and then use the carried toggle. */ 1743 std->td.td_flags &= HTOO32(~OHCI_TD_TOGGLE_MASK); 1744 std->td.td_flags |= HTOO32(OHCI_TD_TOGGLE_1); 1745 usb_syncmem(&std->dma, 1746 std->offs + offsetof(ohci_td_t, td_flags), 1747 sizeof(std->td.td_flags), 1748 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1749 } 1750 1751 memcpy(KERNADDR(&opipe->u.ctl.reqdma, 0), req, sizeof *req); 1752 usb_syncmem(&opipe->u.ctl.reqdma, 0, sizeof *req, BUS_DMASYNC_PREWRITE); 1753 1754 setup->td.td_flags = HTOO32(OHCI_TD_SETUP | OHCI_TD_NOCC | 1755 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1756 setup->td.td_cbp = HTOO32(DMAADDR(&opipe->u.ctl.reqdma, 0)); 1757 setup->nexttd = next; 1758 setup->td.td_nexttd = HTOO32(next->physaddr); 1759 setup->td.td_be = HTOO32(O32TOH(setup->td.td_cbp) + sizeof *req - 1); 1760 setup->len = 0; 1761 setup->xfer = xfer; 1762 setup->flags = 0; 1763 xfer->hcpriv = setup; 1764 usb_syncmem(&setup->dma, setup->offs, sizeof(setup->td), 1765 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1766 1767 stat->td.td_flags = HTOO32( 1768 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | 1769 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1770 stat->td.td_cbp = 0; 1771 stat->nexttd = tail; 1772 stat->td.td_nexttd = HTOO32(tail->physaddr); 1773 stat->td.td_be = 0; 1774 stat->flags = OHCI_CALL_DONE; 1775 stat->len = 0; 1776 stat->xfer = xfer; 1777 usb_syncmem(&stat->dma, stat->offs, sizeof(stat->td), 1778 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1779 1780 #ifdef OHCI_DEBUG 1781 if (ohcidebug > 5) { 1782 DPRINTF(("ohci_device_request:\n")); 1783 ohci_dump_ed(sc, sed); 1784 ohci_dump_tds(sc, setup); 1785 } 1786 #endif 1787 1788 /* Insert ED in schedule */ 1789 sed->ed.ed_tailp = HTOO32(tail->physaddr); 1790 usb_syncmem(&sed->dma, 1791 sed->offs + offsetof(ohci_ed_t, ed_tailp), 1792 sizeof(sed->ed.ed_tailp), 1793 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1794 opipe->tail.td = tail; 1795 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1796 if (xfer->timeout && !sc->sc_bus.use_polling) { 1797 callout_reset(&xfer->timeout_handle, mstohz(xfer->timeout), 1798 ohci_timeout, xfer); 1799 } 1800 1801 #ifdef OHCI_DEBUG 1802 if (ohcidebug > 20) { 1803 delay(10000); 1804 DPRINTF(("ohci_device_request: status=%x\n", 1805 OREAD4(sc, OHCI_COMMAND_STATUS))); 1806 ohci_dumpregs(sc); 1807 printf("ctrl head:\n"); 1808 ohci_dump_ed(sc, sc->sc_ctrl_head); 1809 printf("sed:\n"); 1810 ohci_dump_ed(sc, sed); 1811 ohci_dump_tds(sc, setup); 1812 } 1813 #endif 1814 1815 return (USBD_NORMAL_COMPLETION); 1816 1817 bad3: 1818 ohci_free_std(sc, tail); 1819 bad2: 1820 ohci_free_std(sc, stat); 1821 bad1: 1822 return (err); 1823 } 1824 1825 /* 1826 * Add an ED to the schedule. Called with USB lock held. 1827 */ 1828 Static void 1829 ohci_add_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1830 { 1831 DPRINTFN(8,("ohci_add_ed: sed=%p head=%p\n", sed, head)); 1832 1833 KASSERT(mutex_owned(&sc->sc_lock)); 1834 1835 usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted), 1836 sizeof(head->ed.ed_nexted), 1837 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1838 sed->next = head->next; 1839 sed->ed.ed_nexted = head->ed.ed_nexted; 1840 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted), 1841 sizeof(sed->ed.ed_nexted), 1842 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1843 head->next = sed; 1844 head->ed.ed_nexted = HTOO32(sed->physaddr); 1845 usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted), 1846 sizeof(head->ed.ed_nexted), 1847 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1848 } 1849 1850 /* 1851 * Remove an ED from the schedule. Called with USB lock held. 1852 */ 1853 Static void 1854 ohci_rem_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1855 { 1856 ohci_soft_ed_t *p; 1857 1858 KASSERT(mutex_owned(&sc->sc_lock)); 1859 1860 /* XXX */ 1861 for (p = head; p != NULL && p->next != sed; p = p->next) 1862 ; 1863 if (p == NULL) 1864 panic("ohci_rem_ed: ED not found"); 1865 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted), 1866 sizeof(sed->ed.ed_nexted), 1867 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1868 p->next = sed->next; 1869 p->ed.ed_nexted = sed->ed.ed_nexted; 1870 usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted), 1871 sizeof(p->ed.ed_nexted), 1872 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1873 } 1874 1875 /* 1876 * When a transfer is completed the TD is added to the done queue by 1877 * the host controller. This queue is the processed by software. 1878 * Unfortunately the queue contains the physical address of the TD 1879 * and we have no simple way to translate this back to a kernel address. 1880 * To make the translation possible (and fast) we use a hash table of 1881 * TDs currently in the schedule. The physical address is used as the 1882 * hash value. 1883 */ 1884 1885 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1886 /* Called with USB lock held. */ 1887 void 1888 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1889 { 1890 int h = HASH(std->physaddr); 1891 1892 KASSERT(sc->sc_bus.use_polling || mutex_owned(&sc->sc_lock)); 1893 1894 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1895 } 1896 1897 /* Called with USB lock held. */ 1898 void 1899 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1900 { 1901 1902 KASSERT(sc->sc_bus.use_polling || mutex_owned(&sc->sc_lock)); 1903 1904 LIST_REMOVE(std, hnext); 1905 } 1906 1907 ohci_soft_td_t * 1908 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a) 1909 { 1910 int h = HASH(a); 1911 ohci_soft_td_t *std; 1912 1913 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1914 std != NULL; 1915 std = LIST_NEXT(std, hnext)) 1916 if (std->physaddr == a) 1917 return (std); 1918 return (NULL); 1919 } 1920 1921 /* Called with USB lock held. */ 1922 void 1923 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1924 { 1925 int h = HASH(sitd->physaddr); 1926 1927 KASSERT(mutex_owned(&sc->sc_lock)); 1928 1929 DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n", 1930 sitd, (u_long)sitd->physaddr)); 1931 1932 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext); 1933 } 1934 1935 /* Called with USB lock held. */ 1936 void 1937 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1938 { 1939 1940 KASSERT(mutex_owned(&sc->sc_lock)); 1941 1942 DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n", 1943 sitd, (u_long)sitd->physaddr)); 1944 1945 LIST_REMOVE(sitd, hnext); 1946 } 1947 1948 ohci_soft_itd_t * 1949 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a) 1950 { 1951 int h = HASH(a); 1952 ohci_soft_itd_t *sitd; 1953 1954 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]); 1955 sitd != NULL; 1956 sitd = LIST_NEXT(sitd, hnext)) 1957 if (sitd->physaddr == a) 1958 return (sitd); 1959 return (NULL); 1960 } 1961 1962 void 1963 ohci_timeout(void *addr) 1964 { 1965 struct ohci_xfer *oxfer = addr; 1966 struct ohci_pipe *opipe = (struct ohci_pipe *)oxfer->xfer.pipe; 1967 ohci_softc_t *sc = opipe->pipe.device->bus->hci_private; 1968 1969 DPRINTF(("ohci_timeout: oxfer=%p\n", oxfer)); 1970 1971 if (sc->sc_dying) { 1972 mutex_enter(&sc->sc_lock); 1973 ohci_abort_xfer(&oxfer->xfer, USBD_TIMEOUT); 1974 mutex_exit(&sc->sc_lock); 1975 return; 1976 } 1977 1978 /* Execute the abort in a process context. */ 1979 usb_init_task(&oxfer->abort_task, ohci_timeout_task, addr, 1980 USB_TASKQ_MPSAFE); 1981 usb_add_task(oxfer->xfer.pipe->device, &oxfer->abort_task, 1982 USB_TASKQ_HC); 1983 } 1984 1985 void 1986 ohci_timeout_task(void *addr) 1987 { 1988 usbd_xfer_handle xfer = addr; 1989 ohci_softc_t *sc = xfer->pipe->device->bus->hci_private; 1990 1991 DPRINTF(("ohci_timeout_task: xfer=%p\n", xfer)); 1992 1993 mutex_enter(&sc->sc_lock); 1994 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1995 mutex_exit(&sc->sc_lock); 1996 } 1997 1998 #ifdef OHCI_DEBUG 1999 void 2000 ohci_dump_tds(ohci_softc_t *sc, ohci_soft_td_t *std) 2001 { 2002 for (; std; std = std->nexttd) 2003 ohci_dump_td(sc, std); 2004 } 2005 2006 void 2007 ohci_dump_td(ohci_softc_t *sc, ohci_soft_td_t *std) 2008 { 2009 char sbuf[128]; 2010 2011 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 2012 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2013 snprintb(sbuf, sizeof(sbuf), 2014 "\177\20" 2015 "b\22R\0" 2016 "f\23\02DP\0" 2017 "=\x0" "setup\0" 2018 "=\x1" "out\0" 2019 "=\x2" "in\0" 2020 "=\x3" "reserved\0" 2021 "f\25\03DI\0" 2022 "=\x07" "none\0" 2023 "f\30\02T\0" 2024 "=\x0" "carry\0" 2025 "=\x1" "carry\0" 2026 "=\x2" "0\0" 2027 "=\x3" "1\0" 2028 "f\32\02EC\0" 2029 "f\34\04CC\0", 2030 (u_int32_t)O32TOH(std->td.td_flags)); 2031 printf("TD(%p) at %08lx:\n\tflags=%s\n\tcbp=0x%08lx nexttd=0x%08lx be=0x%08lx\n", 2032 std, (u_long)std->physaddr, sbuf, 2033 (u_long)O32TOH(std->td.td_cbp), 2034 (u_long)O32TOH(std->td.td_nexttd), 2035 (u_long)O32TOH(std->td.td_be)); 2036 } 2037 2038 void 2039 ohci_dump_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 2040 { 2041 int i; 2042 2043 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 2044 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2045 printf("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n" 2046 "bp0=0x%08lx next=0x%08lx be=0x%08lx\n", 2047 sitd, (u_long)sitd->physaddr, 2048 OHCI_ITD_GET_SF(O32TOH(sitd->itd.itd_flags)), 2049 OHCI_ITD_GET_DI(O32TOH(sitd->itd.itd_flags)), 2050 OHCI_ITD_GET_FC(O32TOH(sitd->itd.itd_flags)), 2051 OHCI_ITD_GET_CC(O32TOH(sitd->itd.itd_flags)), 2052 (u_long)O32TOH(sitd->itd.itd_bp0), 2053 (u_long)O32TOH(sitd->itd.itd_nextitd), 2054 (u_long)O32TOH(sitd->itd.itd_be)); 2055 for (i = 0; i < OHCI_ITD_NOFFSET; i++) 2056 printf("offs[%d]=0x%04x ", i, 2057 (u_int)O16TOH(sitd->itd.itd_offset[i])); 2058 printf("\n"); 2059 } 2060 2061 void 2062 ohci_dump_itds(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 2063 { 2064 for (; sitd; sitd = sitd->nextitd) 2065 ohci_dump_itd(sc, sitd); 2066 } 2067 2068 void 2069 ohci_dump_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 2070 { 2071 char sbuf[128], sbuf2[128]; 2072 2073 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 2074 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2075 snprintb(sbuf, sizeof(sbuf), 2076 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO", 2077 (u_int32_t)O32TOH(sed->ed.ed_flags)); 2078 snprintb(sbuf2, sizeof(sbuf2), "\20\1HALT\2CARRY", 2079 (u_int32_t)O32TOH(sed->ed.ed_headp)); 2080 2081 printf("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d flags=%s\ntailp=0x%08lx " 2082 "headflags=%s headp=0x%08lx nexted=0x%08lx\n", 2083 sed, (u_long)sed->physaddr, 2084 OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)), 2085 OHCI_ED_GET_EN(O32TOH(sed->ed.ed_flags)), 2086 OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)), sbuf, 2087 (u_long)O32TOH(sed->ed.ed_tailp), sbuf2, 2088 (u_long)O32TOH(sed->ed.ed_headp), 2089 (u_long)O32TOH(sed->ed.ed_nexted)); 2090 } 2091 #endif 2092 2093 usbd_status 2094 ohci_open(usbd_pipe_handle pipe) 2095 { 2096 usbd_device_handle dev = pipe->device; 2097 ohci_softc_t *sc = dev->bus->hci_private; 2098 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 2099 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2100 u_int8_t addr = dev->address; 2101 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 2102 ohci_soft_ed_t *sed; 2103 ohci_soft_td_t *std; 2104 ohci_soft_itd_t *sitd; 2105 ohci_physaddr_t tdphys; 2106 u_int32_t fmt; 2107 usbd_status err = USBD_NOMEM; 2108 int ival; 2109 2110 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 2111 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 2112 2113 if (sc->sc_dying) { 2114 return USBD_IOERROR; 2115 } 2116 2117 std = NULL; 2118 sed = NULL; 2119 2120 if (addr == sc->sc_addr) { 2121 switch (ed->bEndpointAddress) { 2122 case USB_CONTROL_ENDPOINT: 2123 pipe->methods = &ohci_root_ctrl_methods; 2124 break; 2125 case UE_DIR_IN | OHCI_INTR_ENDPT: 2126 pipe->methods = &ohci_root_intr_methods; 2127 break; 2128 default: 2129 err = USBD_INVAL; 2130 goto bad; 2131 } 2132 } else { 2133 sed = ohci_alloc_sed(sc); 2134 if (sed == NULL) 2135 goto bad; 2136 opipe->sed = sed; 2137 if (xfertype == UE_ISOCHRONOUS) { 2138 mutex_enter(&sc->sc_lock); 2139 sitd = ohci_alloc_sitd(sc); 2140 mutex_exit(&sc->sc_lock); 2141 if (sitd == NULL) 2142 goto bad; 2143 2144 opipe->tail.itd = sitd; 2145 tdphys = sitd->physaddr; 2146 fmt = OHCI_ED_FORMAT_ISO; 2147 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 2148 fmt |= OHCI_ED_DIR_IN; 2149 else 2150 fmt |= OHCI_ED_DIR_OUT; 2151 } else { 2152 mutex_enter(&sc->sc_lock); 2153 std = ohci_alloc_std(sc); 2154 mutex_exit(&sc->sc_lock); 2155 if (std == NULL) 2156 goto bad; 2157 2158 opipe->tail.td = std; 2159 tdphys = std->physaddr; 2160 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD; 2161 } 2162 sed->ed.ed_flags = HTOO32( 2163 OHCI_ED_SET_FA(addr) | 2164 OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) | 2165 (dev->speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) | 2166 fmt | 2167 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 2168 sed->ed.ed_headp = HTOO32(tdphys | 2169 (pipe->endpoint->datatoggle ? OHCI_TOGGLECARRY : 0)); 2170 sed->ed.ed_tailp = HTOO32(tdphys); 2171 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 2172 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2173 2174 switch (xfertype) { 2175 case UE_CONTROL: 2176 pipe->methods = &ohci_device_ctrl_methods; 2177 err = usb_allocmem(&sc->sc_bus, 2178 sizeof(usb_device_request_t), 2179 0, &opipe->u.ctl.reqdma); 2180 if (err) 2181 goto bad; 2182 mutex_enter(&sc->sc_lock); 2183 ohci_add_ed(sc, sed, sc->sc_ctrl_head); 2184 mutex_exit(&sc->sc_lock); 2185 break; 2186 case UE_INTERRUPT: 2187 pipe->methods = &ohci_device_intr_methods; 2188 ival = pipe->interval; 2189 if (ival == USBD_DEFAULT_INTERVAL) 2190 ival = ed->bInterval; 2191 err = ohci_device_setintr(sc, opipe, ival); 2192 if (err) 2193 goto bad; 2194 break; 2195 case UE_ISOCHRONOUS: 2196 pipe->methods = &ohci_device_isoc_methods; 2197 return (ohci_setup_isoc(pipe)); 2198 case UE_BULK: 2199 pipe->methods = &ohci_device_bulk_methods; 2200 mutex_enter(&sc->sc_lock); 2201 ohci_add_ed(sc, sed, sc->sc_bulk_head); 2202 mutex_exit(&sc->sc_lock); 2203 break; 2204 } 2205 } 2206 2207 return USBD_NORMAL_COMPLETION; 2208 2209 bad: 2210 if (std != NULL) { 2211 mutex_enter(&sc->sc_lock); 2212 ohci_free_std(sc, std); 2213 mutex_exit(&sc->sc_lock); 2214 } 2215 if (sed != NULL) 2216 ohci_free_sed(sc, sed); 2217 return err; 2218 2219 } 2220 2221 /* 2222 * Close a reqular pipe. 2223 * Assumes that there are no pending transactions. 2224 */ 2225 void 2226 ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head) 2227 { 2228 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2229 ohci_softc_t *sc = pipe->device->bus->hci_private; 2230 ohci_soft_ed_t *sed = opipe->sed; 2231 2232 KASSERT(mutex_owned(&sc->sc_lock)); 2233 2234 #ifdef DIAGNOSTIC 2235 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 2236 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2237 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) { 2238 ohci_soft_td_t *std; 2239 std = ohci_hash_find_td(sc, O32TOH(sed->ed.ed_headp)); 2240 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 2241 "tl=0x%x pipe=%p, std=%p\n", sed, 2242 (int)O32TOH(sed->ed.ed_headp), 2243 (int)O32TOH(sed->ed.ed_tailp), 2244 pipe, std); 2245 #ifdef OHCI_DEBUG 2246 usbd_dump_pipe(&opipe->pipe); 2247 ohci_dump_ed(sc, sed); 2248 if (std) 2249 ohci_dump_td(sc, std); 2250 #endif 2251 usb_delay_ms(&sc->sc_bus, 2); 2252 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2253 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) 2254 printf("ohci_close_pipe: pipe still not empty\n"); 2255 } 2256 #endif 2257 ohci_rem_ed(sc, sed, head); 2258 /* Make sure the host controller is not touching this ED */ 2259 usb_delay_ms(&sc->sc_bus, 1); 2260 pipe->endpoint->datatoggle = 2261 (O32TOH(sed->ed.ed_headp) & OHCI_TOGGLECARRY) ? 1 : 0; 2262 ohci_free_sed(sc, opipe->sed); 2263 } 2264 2265 /* 2266 * Abort a device request. 2267 * If this routine is called at splusb() it guarantees that the request 2268 * will be removed from the hardware scheduling and that the callback 2269 * for it will be called with USBD_CANCELLED status. 2270 * It's impossible to guarantee that the requested transfer will not 2271 * have happened since the hardware runs concurrently. 2272 * If the transaction has already happened we rely on the ordinary 2273 * interrupt processing to process it. 2274 * XXX This is most probably wrong. 2275 * XXXMRG this doesn't make sense anymore. 2276 */ 2277 void 2278 ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2279 { 2280 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2281 ohci_softc_t *sc = opipe->pipe.device->bus->hci_private; 2282 ohci_soft_ed_t *sed = opipe->sed; 2283 ohci_soft_td_t *p, *n; 2284 ohci_physaddr_t headp; 2285 int hit; 2286 int wake; 2287 2288 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p sed=%p\n", xfer, opipe,sed)); 2289 2290 KASSERT(mutex_owned(&sc->sc_lock)); 2291 2292 if (sc->sc_dying) { 2293 /* If we're dying, just do the software part. */ 2294 xfer->status = status; /* make software ignore it */ 2295 callout_halt(&xfer->timeout_handle, &sc->sc_lock); 2296 usb_transfer_complete(xfer); 2297 return; 2298 } 2299 2300 if (cpu_intr_p() || cpu_softintr_p()) 2301 panic("ohci_abort_xfer: not in process context"); 2302 2303 /* 2304 * If an abort is already in progress then just wait for it to 2305 * complete and return. 2306 */ 2307 if (xfer->hcflags & UXFER_ABORTING) { 2308 DPRINTFN(2, ("ohci_abort_xfer: already aborting\n")); 2309 #ifdef DIAGNOSTIC 2310 if (status == USBD_TIMEOUT) 2311 printf("%s: TIMEOUT while aborting\n", __func__); 2312 #endif 2313 /* Override the status which might be USBD_TIMEOUT. */ 2314 xfer->status = status; 2315 DPRINTFN(2, ("ohci_abort_xfer: waiting for abort to finish\n")); 2316 xfer->hcflags |= UXFER_ABORTWAIT; 2317 while (xfer->hcflags & UXFER_ABORTING) 2318 cv_wait(&xfer->hccv, &sc->sc_lock); 2319 goto done; 2320 } 2321 xfer->hcflags |= UXFER_ABORTING; 2322 2323 /* 2324 * Step 1: Make interrupt routine and hardware ignore xfer. 2325 */ 2326 xfer->status = status; /* make software ignore it */ 2327 callout_stop(&xfer->timeout_handle); 2328 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed)); 2329 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2330 sizeof(sed->ed.ed_flags), 2331 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2332 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */ 2333 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2334 sizeof(sed->ed.ed_flags), 2335 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2336 2337 /* 2338 * Step 2: Wait until we know hardware has finished any possible 2339 * use of the xfer. Also make sure the soft interrupt routine 2340 * has run. 2341 */ 2342 /* Hardware finishes in 1ms */ 2343 usb_delay_ms_locked(opipe->pipe.device->bus, 20, &sc->sc_lock); 2344 sc->sc_softwake = 1; 2345 usb_schedsoftintr(&sc->sc_bus); 2346 cv_wait(&sc->sc_softwake_cv, &sc->sc_lock); 2347 2348 /* 2349 * Step 3: Remove any vestiges of the xfer from the hardware. 2350 * The complication here is that the hardware may have executed 2351 * beyond the xfer we're trying to abort. So as we're scanning 2352 * the TDs of this xfer we check if the hardware points to 2353 * any of them. 2354 */ 2355 p = xfer->hcpriv; 2356 #ifdef DIAGNOSTIC 2357 if (p == NULL) { 2358 xfer->hcflags &= ~UXFER_ABORTING; /* XXX */ 2359 printf("ohci_abort_xfer: hcpriv is NULL\n"); 2360 goto done; 2361 } 2362 #endif 2363 #ifdef OHCI_DEBUG 2364 if (ohcidebug > 1) { 2365 DPRINTF(("ohci_abort_xfer: sed=\n")); 2366 ohci_dump_ed(sc, sed); 2367 ohci_dump_tds(sc, p); 2368 } 2369 #endif 2370 headp = O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK; 2371 hit = 0; 2372 for (; p->xfer == xfer; p = n) { 2373 hit |= headp == p->physaddr; 2374 n = p->nexttd; 2375 ohci_free_std(sc, p); 2376 } 2377 /* Zap headp register if hardware pointed inside the xfer. */ 2378 if (hit) { 2379 DPRINTFN(1,("ohci_abort_xfer: set hd=0x%08x, tl=0x%08x\n", 2380 (int)p->physaddr, (int)O32TOH(sed->ed.ed_tailp))); 2381 sed->ed.ed_headp = HTOO32(p->physaddr); /* unlink TDs */ 2382 usb_syncmem(&sed->dma, 2383 sed->offs + offsetof(ohci_ed_t, ed_headp), 2384 sizeof(sed->ed.ed_headp), 2385 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2386 } else { 2387 DPRINTFN(1,("ohci_abort_xfer: no hit\n")); 2388 } 2389 2390 /* 2391 * Step 4: Turn on hardware again. 2392 */ 2393 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2394 sizeof(sed->ed.ed_flags), 2395 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2396 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */ 2397 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2398 sizeof(sed->ed.ed_flags), 2399 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2400 2401 /* 2402 * Step 5: Execute callback. 2403 */ 2404 wake = xfer->hcflags & UXFER_ABORTWAIT; 2405 xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT); 2406 usb_transfer_complete(xfer); 2407 if (wake) 2408 cv_broadcast(&xfer->hccv); 2409 2410 done: 2411 KASSERT(mutex_owned(&sc->sc_lock)); 2412 } 2413 2414 /* 2415 * Data structures and routines to emulate the root hub. 2416 */ 2417 Static usb_device_descriptor_t ohci_devd = { 2418 USB_DEVICE_DESCRIPTOR_SIZE, 2419 UDESC_DEVICE, /* type */ 2420 {0x00, 0x01}, /* USB version */ 2421 UDCLASS_HUB, /* class */ 2422 UDSUBCLASS_HUB, /* subclass */ 2423 UDPROTO_FSHUB, /* protocol */ 2424 64, /* max packet */ 2425 {0},{0},{0x00,0x01}, /* device id */ 2426 1,2,0, /* string indicies */ 2427 1 /* # of configurations */ 2428 }; 2429 2430 Static const usb_config_descriptor_t ohci_confd = { 2431 USB_CONFIG_DESCRIPTOR_SIZE, 2432 UDESC_CONFIG, 2433 {USB_CONFIG_DESCRIPTOR_SIZE + 2434 USB_INTERFACE_DESCRIPTOR_SIZE + 2435 USB_ENDPOINT_DESCRIPTOR_SIZE}, 2436 1, 2437 1, 2438 0, 2439 UC_ATTR_MBO | UC_SELF_POWERED, 2440 0 /* max power */ 2441 }; 2442 2443 Static const usb_interface_descriptor_t ohci_ifcd = { 2444 USB_INTERFACE_DESCRIPTOR_SIZE, 2445 UDESC_INTERFACE, 2446 0, 2447 0, 2448 1, 2449 UICLASS_HUB, 2450 UISUBCLASS_HUB, 2451 UIPROTO_FSHUB, 2452 0 2453 }; 2454 2455 Static const usb_endpoint_descriptor_t ohci_endpd = { 2456 .bLength = USB_ENDPOINT_DESCRIPTOR_SIZE, 2457 .bDescriptorType = UDESC_ENDPOINT, 2458 .bEndpointAddress = UE_DIR_IN | OHCI_INTR_ENDPT, 2459 .bmAttributes = UE_INTERRUPT, 2460 .wMaxPacketSize = {8, 0}, /* max packet */ 2461 .bInterval = 255, 2462 }; 2463 2464 Static const usb_hub_descriptor_t ohci_hubd = { 2465 .bDescLength = USB_HUB_DESCRIPTOR_SIZE, 2466 .bDescriptorType = UDESC_HUB, 2467 }; 2468 2469 /* 2470 * Simulate a hardware hub by handling all the necessary requests. 2471 */ 2472 Static usbd_status 2473 ohci_root_ctrl_transfer(usbd_xfer_handle xfer) 2474 { 2475 ohci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2476 usbd_status err; 2477 2478 /* Insert last in queue. */ 2479 mutex_enter(&sc->sc_lock); 2480 err = usb_insert_transfer(xfer); 2481 mutex_exit(&sc->sc_lock); 2482 if (err) 2483 return (err); 2484 2485 /* Pipe isn't running, start first */ 2486 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2487 } 2488 2489 Static usbd_status 2490 ohci_root_ctrl_start(usbd_xfer_handle xfer) 2491 { 2492 ohci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2493 usb_device_request_t *req; 2494 void *buf = NULL; 2495 int port, i; 2496 int len, value, index, l, totlen = 0; 2497 usb_port_status_t ps; 2498 usb_hub_descriptor_t hubd; 2499 usbd_status err; 2500 u_int32_t v; 2501 2502 if (sc->sc_dying) 2503 return (USBD_IOERROR); 2504 2505 #ifdef DIAGNOSTIC 2506 if (!(xfer->rqflags & URQ_REQUEST)) 2507 /* XXX panic */ 2508 return (USBD_INVAL); 2509 #endif 2510 req = &xfer->request; 2511 2512 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 2513 req->bmRequestType, req->bRequest)); 2514 2515 len = UGETW(req->wLength); 2516 value = UGETW(req->wValue); 2517 index = UGETW(req->wIndex); 2518 2519 if (len != 0) 2520 buf = KERNADDR(&xfer->dmabuf, 0); 2521 2522 #define C(x,y) ((x) | ((y) << 8)) 2523 switch(C(req->bRequest, req->bmRequestType)) { 2524 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 2525 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 2526 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 2527 /* 2528 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 2529 * for the integrated root hub. 2530 */ 2531 break; 2532 case C(UR_GET_CONFIG, UT_READ_DEVICE): 2533 if (len > 0) { 2534 *(u_int8_t *)buf = sc->sc_conf; 2535 totlen = 1; 2536 } 2537 break; 2538 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2539 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 2540 if (len == 0) 2541 break; 2542 switch(value >> 8) { 2543 case UDESC_DEVICE: 2544 if ((value & 0xff) != 0) { 2545 err = USBD_IOERROR; 2546 goto ret; 2547 } 2548 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 2549 USETW(ohci_devd.idVendor, sc->sc_id_vendor); 2550 memcpy(buf, &ohci_devd, l); 2551 break; 2552 case UDESC_CONFIG: 2553 if ((value & 0xff) != 0) { 2554 err = USBD_IOERROR; 2555 goto ret; 2556 } 2557 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 2558 memcpy(buf, &ohci_confd, l); 2559 buf = (char *)buf + l; 2560 len -= l; 2561 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 2562 totlen += l; 2563 memcpy(buf, &ohci_ifcd, l); 2564 buf = (char *)buf + l; 2565 len -= l; 2566 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 2567 totlen += l; 2568 memcpy(buf, &ohci_endpd, l); 2569 break; 2570 case UDESC_STRING: 2571 #define sd ((usb_string_descriptor_t *)buf) 2572 switch (value & 0xff) { 2573 case 0: /* Language table */ 2574 totlen = usb_makelangtbl(sd, len); 2575 break; 2576 case 1: /* Vendor */ 2577 totlen = usb_makestrdesc(sd, len, 2578 sc->sc_vendor); 2579 break; 2580 case 2: /* Product */ 2581 totlen = usb_makestrdesc(sd, len, 2582 "OHCI root hub"); 2583 break; 2584 } 2585 #undef sd 2586 break; 2587 default: 2588 err = USBD_IOERROR; 2589 goto ret; 2590 } 2591 break; 2592 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 2593 if (len > 0) { 2594 *(u_int8_t *)buf = 0; 2595 totlen = 1; 2596 } 2597 break; 2598 case C(UR_GET_STATUS, UT_READ_DEVICE): 2599 if (len > 1) { 2600 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 2601 totlen = 2; 2602 } 2603 break; 2604 case C(UR_GET_STATUS, UT_READ_INTERFACE): 2605 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 2606 if (len > 1) { 2607 USETW(((usb_status_t *)buf)->wStatus, 0); 2608 totlen = 2; 2609 } 2610 break; 2611 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 2612 if (value >= USB_MAX_DEVICES) { 2613 err = USBD_IOERROR; 2614 goto ret; 2615 } 2616 sc->sc_addr = value; 2617 break; 2618 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 2619 if (value != 0 && value != 1) { 2620 err = USBD_IOERROR; 2621 goto ret; 2622 } 2623 sc->sc_conf = value; 2624 break; 2625 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 2626 break; 2627 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 2628 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 2629 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 2630 err = USBD_IOERROR; 2631 goto ret; 2632 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 2633 break; 2634 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 2635 break; 2636 /* Hub requests */ 2637 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2638 break; 2639 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2640 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 2641 "port=%d feature=%d\n", 2642 index, value)); 2643 if (index < 1 || index > sc->sc_noport) { 2644 err = USBD_IOERROR; 2645 goto ret; 2646 } 2647 port = OHCI_RH_PORT_STATUS(index); 2648 switch(value) { 2649 case UHF_PORT_ENABLE: 2650 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2651 break; 2652 case UHF_PORT_SUSPEND: 2653 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2654 break; 2655 case UHF_PORT_POWER: 2656 /* Yes, writing to the LOW_SPEED bit clears power. */ 2657 OWRITE4(sc, port, UPS_LOW_SPEED); 2658 break; 2659 case UHF_C_PORT_CONNECTION: 2660 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2661 break; 2662 case UHF_C_PORT_ENABLE: 2663 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2664 break; 2665 case UHF_C_PORT_SUSPEND: 2666 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2667 break; 2668 case UHF_C_PORT_OVER_CURRENT: 2669 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2670 break; 2671 case UHF_C_PORT_RESET: 2672 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2673 break; 2674 default: 2675 err = USBD_IOERROR; 2676 goto ret; 2677 } 2678 switch(value) { 2679 case UHF_C_PORT_CONNECTION: 2680 case UHF_C_PORT_ENABLE: 2681 case UHF_C_PORT_SUSPEND: 2682 case UHF_C_PORT_OVER_CURRENT: 2683 case UHF_C_PORT_RESET: 2684 /* Enable RHSC interrupt if condition is cleared. */ 2685 if ((OREAD4(sc, port) >> 16) == 0) 2686 ohci_rhsc_enable(sc); 2687 break; 2688 default: 2689 break; 2690 } 2691 break; 2692 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2693 if (len == 0) 2694 break; 2695 if ((value & 0xff) != 0) { 2696 err = USBD_IOERROR; 2697 goto ret; 2698 } 2699 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2700 hubd = ohci_hubd; 2701 hubd.bNbrPorts = sc->sc_noport; 2702 USETW(hubd.wHubCharacteristics, 2703 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2704 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2705 /* XXX overcurrent */ 2706 ); 2707 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2708 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2709 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2710 hubd.DeviceRemovable[i++] = (u_int8_t)v; 2711 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2712 l = min(len, hubd.bDescLength); 2713 totlen = l; 2714 memcpy(buf, &hubd, l); 2715 break; 2716 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2717 if (len != 4) { 2718 err = USBD_IOERROR; 2719 goto ret; 2720 } 2721 memset(buf, 0, len); /* ? XXX */ 2722 totlen = len; 2723 break; 2724 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2725 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 2726 index)); 2727 if (index < 1 || index > sc->sc_noport) { 2728 err = USBD_IOERROR; 2729 goto ret; 2730 } 2731 if (len != 4) { 2732 err = USBD_IOERROR; 2733 goto ret; 2734 } 2735 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2736 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 2737 v)); 2738 USETW(ps.wPortStatus, v); 2739 USETW(ps.wPortChange, v >> 16); 2740 l = min(len, sizeof ps); 2741 memcpy(buf, &ps, l); 2742 totlen = l; 2743 break; 2744 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2745 err = USBD_IOERROR; 2746 goto ret; 2747 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2748 break; 2749 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2750 if (index < 1 || index > sc->sc_noport) { 2751 err = USBD_IOERROR; 2752 goto ret; 2753 } 2754 port = OHCI_RH_PORT_STATUS(index); 2755 switch(value) { 2756 case UHF_PORT_ENABLE: 2757 OWRITE4(sc, port, UPS_PORT_ENABLED); 2758 break; 2759 case UHF_PORT_SUSPEND: 2760 OWRITE4(sc, port, UPS_SUSPEND); 2761 break; 2762 case UHF_PORT_RESET: 2763 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 2764 index)); 2765 OWRITE4(sc, port, UPS_RESET); 2766 for (i = 0; i < 5; i++) { 2767 usb_delay_ms(&sc->sc_bus, 2768 USB_PORT_ROOT_RESET_DELAY); 2769 if (sc->sc_dying) { 2770 err = USBD_IOERROR; 2771 goto ret; 2772 } 2773 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2774 break; 2775 } 2776 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 2777 index, OREAD4(sc, port))); 2778 break; 2779 case UHF_PORT_POWER: 2780 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 2781 "%d\n", index)); 2782 OWRITE4(sc, port, UPS_PORT_POWER); 2783 break; 2784 default: 2785 err = USBD_IOERROR; 2786 goto ret; 2787 } 2788 break; 2789 default: 2790 err = USBD_IOERROR; 2791 goto ret; 2792 } 2793 xfer->actlen = totlen; 2794 err = USBD_NORMAL_COMPLETION; 2795 ret: 2796 xfer->status = err; 2797 mutex_enter(&sc->sc_lock); 2798 usb_transfer_complete(xfer); 2799 mutex_exit(&sc->sc_lock); 2800 return (USBD_IN_PROGRESS); 2801 } 2802 2803 /* Abort a root control request. */ 2804 Static void 2805 ohci_root_ctrl_abort(usbd_xfer_handle xfer) 2806 { 2807 /* Nothing to do, all transfers are synchronous. */ 2808 } 2809 2810 /* Close the root pipe. */ 2811 Static void 2812 ohci_root_ctrl_close(usbd_pipe_handle pipe) 2813 { 2814 DPRINTF(("ohci_root_ctrl_close\n")); 2815 /* Nothing to do. */ 2816 } 2817 2818 Static usbd_status 2819 ohci_root_intr_transfer(usbd_xfer_handle xfer) 2820 { 2821 ohci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2822 usbd_status err; 2823 2824 /* Insert last in queue. */ 2825 mutex_enter(&sc->sc_lock); 2826 err = usb_insert_transfer(xfer); 2827 mutex_exit(&sc->sc_lock); 2828 if (err) 2829 return (err); 2830 2831 /* Pipe isn't running, start first */ 2832 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2833 } 2834 2835 Static usbd_status 2836 ohci_root_intr_start(usbd_xfer_handle xfer) 2837 { 2838 usbd_pipe_handle pipe = xfer->pipe; 2839 ohci_softc_t *sc = pipe->device->bus->hci_private; 2840 2841 if (sc->sc_dying) 2842 return (USBD_IOERROR); 2843 2844 mutex_enter(&sc->sc_lock); 2845 KASSERT(sc->sc_intrxfer == NULL); 2846 sc->sc_intrxfer = xfer; 2847 mutex_exit(&sc->sc_lock); 2848 2849 return (USBD_IN_PROGRESS); 2850 } 2851 2852 /* Abort a root interrupt request. */ 2853 Static void 2854 ohci_root_intr_abort(usbd_xfer_handle xfer) 2855 { 2856 #ifdef DIAGNOSTIC 2857 ohci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2858 #endif 2859 2860 KASSERT(mutex_owned(&sc->sc_lock)); 2861 2862 if (xfer->pipe->intrxfer == xfer) { 2863 DPRINTF(("ohci_root_intr_abort: remove\n")); 2864 xfer->pipe->intrxfer = NULL; 2865 } 2866 xfer->status = USBD_CANCELLED; 2867 usb_transfer_complete(xfer); 2868 } 2869 2870 /* Close the root pipe. */ 2871 Static void 2872 ohci_root_intr_close(usbd_pipe_handle pipe) 2873 { 2874 ohci_softc_t *sc = pipe->device->bus->hci_private; 2875 2876 KASSERT(mutex_owned(&sc->sc_lock)); 2877 2878 DPRINTF(("ohci_root_intr_close\n")); 2879 2880 sc->sc_intrxfer = NULL; 2881 } 2882 2883 /************************/ 2884 2885 Static usbd_status 2886 ohci_device_ctrl_transfer(usbd_xfer_handle xfer) 2887 { 2888 ohci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2889 usbd_status err; 2890 2891 /* Insert last in queue. */ 2892 mutex_enter(&sc->sc_lock); 2893 err = usb_insert_transfer(xfer); 2894 mutex_exit(&sc->sc_lock); 2895 if (err) 2896 return (err); 2897 2898 /* Pipe isn't running, start first */ 2899 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2900 } 2901 2902 Static usbd_status 2903 ohci_device_ctrl_start(usbd_xfer_handle xfer) 2904 { 2905 ohci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2906 usbd_status err; 2907 2908 if (sc->sc_dying) 2909 return (USBD_IOERROR); 2910 2911 #ifdef DIAGNOSTIC 2912 if (!(xfer->rqflags & URQ_REQUEST)) { 2913 /* XXX panic */ 2914 printf("ohci_device_ctrl_transfer: not a request\n"); 2915 return (USBD_INVAL); 2916 } 2917 #endif 2918 2919 mutex_enter(&sc->sc_lock); 2920 err = ohci_device_request(xfer); 2921 mutex_exit(&sc->sc_lock); 2922 if (err) 2923 return (err); 2924 2925 if (sc->sc_bus.use_polling) 2926 ohci_waitintr(sc, xfer); 2927 return (USBD_IN_PROGRESS); 2928 } 2929 2930 /* Abort a device control request. */ 2931 Static void 2932 ohci_device_ctrl_abort(usbd_xfer_handle xfer) 2933 { 2934 #ifdef DIAGNOSTIC 2935 ohci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2936 #endif 2937 2938 KASSERT(mutex_owned(&sc->sc_lock)); 2939 2940 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer)); 2941 ohci_abort_xfer(xfer, USBD_CANCELLED); 2942 } 2943 2944 /* Close a device control pipe. */ 2945 Static void 2946 ohci_device_ctrl_close(usbd_pipe_handle pipe) 2947 { 2948 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2949 ohci_softc_t *sc = pipe->device->bus->hci_private; 2950 2951 KASSERT(mutex_owned(&sc->sc_lock)); 2952 2953 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe)); 2954 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2955 ohci_free_std(sc, opipe->tail.td); 2956 } 2957 2958 /************************/ 2959 2960 Static void 2961 ohci_device_clear_toggle(usbd_pipe_handle pipe) 2962 { 2963 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2964 ohci_softc_t *sc = pipe->device->bus->hci_private; 2965 2966 opipe->sed->ed.ed_headp &= HTOO32(~OHCI_TOGGLECARRY); 2967 } 2968 2969 Static void 2970 ohci_noop(usbd_pipe_handle pipe) 2971 { 2972 } 2973 2974 Static usbd_status 2975 ohci_device_bulk_transfer(usbd_xfer_handle xfer) 2976 { 2977 ohci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2978 usbd_status err; 2979 2980 /* Insert last in queue. */ 2981 mutex_enter(&sc->sc_lock); 2982 err = usb_insert_transfer(xfer); 2983 mutex_exit(&sc->sc_lock); 2984 if (err) 2985 return (err); 2986 2987 /* Pipe isn't running, start first */ 2988 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2989 } 2990 2991 Static usbd_status 2992 ohci_device_bulk_start(usbd_xfer_handle xfer) 2993 { 2994 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2995 usbd_device_handle dev = opipe->pipe.device; 2996 ohci_softc_t *sc = dev->bus->hci_private; 2997 int addr = dev->address; 2998 ohci_soft_td_t *data, *tail, *tdp; 2999 ohci_soft_ed_t *sed; 3000 int len, isread, endpt; 3001 usbd_status err; 3002 3003 if (sc->sc_dying) 3004 return (USBD_IOERROR); 3005 3006 #ifdef DIAGNOSTIC 3007 if (xfer->rqflags & URQ_REQUEST) { 3008 /* XXX panic */ 3009 printf("ohci_device_bulk_start: a request\n"); 3010 return (USBD_INVAL); 3011 } 3012 #endif 3013 3014 mutex_enter(&sc->sc_lock); 3015 3016 len = xfer->length; 3017 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 3018 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3019 sed = opipe->sed; 3020 3021 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d " 3022 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags, 3023 endpt)); 3024 3025 opipe->u.bulk.isread = isread; 3026 opipe->u.bulk.length = len; 3027 3028 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3029 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3030 /* Update device address */ 3031 sed->ed.ed_flags = HTOO32( 3032 (O32TOH(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) | 3033 OHCI_ED_SET_FA(addr)); 3034 3035 /* Allocate a chain of new TDs (including a new tail). */ 3036 data = opipe->tail.td; 3037 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 3038 data, &tail); 3039 if (err) 3040 return err; 3041 3042 /* We want interrupt at the end of the transfer. */ 3043 tail->td.td_flags &= HTOO32(~OHCI_TD_INTR_MASK); 3044 tail->td.td_flags |= HTOO32(OHCI_TD_SET_DI(1)); 3045 tail->flags |= OHCI_CALL_DONE; 3046 tail = tail->nexttd; /* point at sentinel */ 3047 usb_syncmem(&tail->dma, tail->offs + offsetof(ohci_td_t, td_flags), 3048 sizeof(tail->td.td_flags), 3049 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3050 if (err) { 3051 mutex_exit(&sc->sc_lock); 3052 return (err); 3053 } 3054 3055 tail->xfer = NULL; 3056 xfer->hcpriv = data; 3057 3058 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x " 3059 "td_cbp=0x%08x td_be=0x%08x\n", 3060 (int)O32TOH(sed->ed.ed_flags), 3061 (int)O32TOH(data->td.td_flags), 3062 (int)O32TOH(data->td.td_cbp), 3063 (int)O32TOH(data->td.td_be))); 3064 3065 #ifdef OHCI_DEBUG 3066 if (ohcidebug > 5) { 3067 ohci_dump_ed(sc, sed); 3068 ohci_dump_tds(sc, data); 3069 } 3070 #endif 3071 3072 /* Insert ED in schedule */ 3073 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 3074 tdp->xfer = xfer; 3075 } 3076 sed->ed.ed_tailp = HTOO32(tail->physaddr); 3077 opipe->tail.td = tail; 3078 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3079 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3080 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3081 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 3082 if (xfer->timeout && !sc->sc_bus.use_polling) { 3083 callout_reset(&xfer->timeout_handle, mstohz(xfer->timeout), 3084 ohci_timeout, xfer); 3085 } 3086 mutex_exit(&sc->sc_lock); 3087 3088 #if 0 3089 /* This goes wrong if we are too slow. */ 3090 if (ohcidebug > 10) { 3091 delay(10000); 3092 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 3093 OREAD4(sc, OHCI_COMMAND_STATUS))); 3094 ohci_dump_ed(sc, sed); 3095 ohci_dump_tds(sc, data); 3096 } 3097 #endif 3098 3099 return (USBD_IN_PROGRESS); 3100 } 3101 3102 Static void 3103 ohci_device_bulk_abort(usbd_xfer_handle xfer) 3104 { 3105 #ifdef DIAGNOSTIC 3106 ohci_softc_t *sc = xfer->pipe->device->bus->hci_private; 3107 #endif 3108 3109 KASSERT(mutex_owned(&sc->sc_lock)); 3110 3111 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer)); 3112 ohci_abort_xfer(xfer, USBD_CANCELLED); 3113 } 3114 3115 /* 3116 * Close a device bulk pipe. 3117 */ 3118 Static void 3119 ohci_device_bulk_close(usbd_pipe_handle pipe) 3120 { 3121 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3122 ohci_softc_t *sc = pipe->device->bus->hci_private; 3123 3124 KASSERT(mutex_owned(&sc->sc_lock)); 3125 3126 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe)); 3127 ohci_close_pipe(pipe, sc->sc_bulk_head); 3128 ohci_free_std(sc, opipe->tail.td); 3129 } 3130 3131 /************************/ 3132 3133 Static usbd_status 3134 ohci_device_intr_transfer(usbd_xfer_handle xfer) 3135 { 3136 ohci_softc_t *sc = xfer->pipe->device->bus->hci_private; 3137 usbd_status err; 3138 3139 /* Insert last in queue. */ 3140 mutex_enter(&sc->sc_lock); 3141 err = usb_insert_transfer(xfer); 3142 mutex_exit(&sc->sc_lock); 3143 if (err) 3144 return (err); 3145 3146 /* Pipe isn't running, start first */ 3147 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 3148 } 3149 3150 Static usbd_status 3151 ohci_device_intr_start(usbd_xfer_handle xfer) 3152 { 3153 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3154 usbd_device_handle dev = opipe->pipe.device; 3155 ohci_softc_t *sc = dev->bus->hci_private; 3156 ohci_soft_ed_t *sed = opipe->sed; 3157 ohci_soft_td_t *data, *tail; 3158 int len, isread, endpt; 3159 3160 if (sc->sc_dying) 3161 return (USBD_IOERROR); 3162 3163 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d " 3164 "flags=%d priv=%p\n", 3165 xfer, xfer->length, xfer->flags, xfer->priv)); 3166 3167 #ifdef DIAGNOSTIC 3168 if (xfer->rqflags & URQ_REQUEST) 3169 panic("ohci_device_intr_transfer: a request"); 3170 #endif 3171 3172 len = xfer->length; 3173 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 3174 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3175 3176 data = opipe->tail.td; 3177 mutex_enter(&sc->sc_lock); 3178 tail = ohci_alloc_std(sc); 3179 mutex_exit(&sc->sc_lock); 3180 if (tail == NULL) 3181 return (USBD_NOMEM); 3182 tail->xfer = NULL; 3183 3184 data->td.td_flags = HTOO32( 3185 isread ? OHCI_TD_IN : OHCI_TD_OUT | 3186 OHCI_TD_NOCC | 3187 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 3188 if (xfer->flags & USBD_SHORT_XFER_OK) 3189 data->td.td_flags |= HTOO32(OHCI_TD_R); 3190 data->td.td_cbp = HTOO32(DMAADDR(&xfer->dmabuf, 0)); 3191 data->nexttd = tail; 3192 data->td.td_nexttd = HTOO32(tail->physaddr); 3193 data->td.td_be = HTOO32(O32TOH(data->td.td_cbp) + len - 1); 3194 data->len = len; 3195 data->xfer = xfer; 3196 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 3197 usb_syncmem(&data->dma, data->offs, sizeof(data->td), 3198 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3199 xfer->hcpriv = data; 3200 3201 #ifdef OHCI_DEBUG 3202 if (ohcidebug > 5) { 3203 DPRINTF(("ohci_device_intr_transfer:\n")); 3204 ohci_dump_ed(sc, sed); 3205 ohci_dump_tds(sc, data); 3206 } 3207 #endif 3208 3209 /* Insert ED in schedule */ 3210 mutex_enter(&sc->sc_lock); 3211 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3212 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3213 sed->ed.ed_tailp = HTOO32(tail->physaddr); 3214 opipe->tail.td = tail; 3215 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3216 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3217 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3218 3219 #if 0 3220 /* 3221 * This goes horribly wrong, printing thousands of descriptors, 3222 * because false references are followed due to the fact that the 3223 * TD is gone. 3224 */ 3225 if (ohcidebug > 5) { 3226 usb_delay_ms_locked(&sc->sc_bus, 5, &sc->sc_lock); 3227 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 3228 OREAD4(sc, OHCI_COMMAND_STATUS))); 3229 ohci_dump_ed(sc, sed); 3230 ohci_dump_tds(sc, data); 3231 } 3232 #endif 3233 mutex_exit(&sc->sc_lock); 3234 3235 return (USBD_IN_PROGRESS); 3236 } 3237 3238 /* Abort a device interrupt request. */ 3239 Static void 3240 ohci_device_intr_abort(usbd_xfer_handle xfer) 3241 { 3242 #ifdef DIAGNOSTIC 3243 ohci_softc_t *sc = xfer->pipe->device->bus->hci_private; 3244 #endif 3245 3246 KASSERT(mutex_owned(&sc->sc_lock)); 3247 3248 if (xfer->pipe->intrxfer == xfer) { 3249 DPRINTF(("ohci_device_intr_abort: remove\n")); 3250 xfer->pipe->intrxfer = NULL; 3251 } 3252 ohci_abort_xfer(xfer, USBD_CANCELLED); 3253 } 3254 3255 /* Close a device interrupt pipe. */ 3256 Static void 3257 ohci_device_intr_close(usbd_pipe_handle pipe) 3258 { 3259 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3260 ohci_softc_t *sc = pipe->device->bus->hci_private; 3261 int nslots = opipe->u.intr.nslots; 3262 int pos = opipe->u.intr.pos; 3263 int j; 3264 ohci_soft_ed_t *p, *sed = opipe->sed; 3265 3266 KASSERT(mutex_owned(&sc->sc_lock)); 3267 3268 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 3269 pipe, nslots, pos)); 3270 usb_syncmem(&sed->dma, sed->offs, 3271 sizeof(sed->ed), BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3272 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 3273 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3274 sizeof(sed->ed.ed_flags), 3275 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3276 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 3277 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) 3278 usb_delay_ms_locked(&sc->sc_bus, 2, &sc->sc_lock); 3279 3280 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 3281 continue; 3282 #ifdef DIAGNOSTIC 3283 if (p == NULL) 3284 panic("ohci_device_intr_close: ED not found"); 3285 #endif 3286 p->next = sed->next; 3287 p->ed.ed_nexted = sed->ed.ed_nexted; 3288 usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted), 3289 sizeof(p->ed.ed_nexted), 3290 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3291 3292 for (j = 0; j < nslots; j++) 3293 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 3294 3295 ohci_free_std(sc, opipe->tail.td); 3296 ohci_free_sed(sc, opipe->sed); 3297 } 3298 3299 Static usbd_status 3300 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival) 3301 { 3302 int i, j, best; 3303 u_int npoll, slow, shigh, nslots; 3304 u_int bestbw, bw; 3305 ohci_soft_ed_t *hsed, *sed = opipe->sed; 3306 3307 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 3308 if (ival == 0) { 3309 printf("ohci_setintr: 0 interval\n"); 3310 return (USBD_INVAL); 3311 } 3312 3313 npoll = OHCI_NO_INTRS; 3314 while (npoll > ival) 3315 npoll /= 2; 3316 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 3317 3318 /* 3319 * We now know which level in the tree the ED must go into. 3320 * Figure out which slot has most bandwidth left over. 3321 * Slots to examine: 3322 * npoll 3323 * 1 0 3324 * 2 1 2 3325 * 4 3 4 5 6 3326 * 8 7 8 9 10 11 12 13 14 3327 * N (N-1) .. (N-1+N-1) 3328 */ 3329 slow = npoll-1; 3330 shigh = slow + npoll; 3331 nslots = OHCI_NO_INTRS / npoll; 3332 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 3333 bw = 0; 3334 for (j = 0; j < nslots; j++) 3335 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 3336 if (bw < bestbw) { 3337 best = i; 3338 bestbw = bw; 3339 } 3340 } 3341 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 3342 best, slow, shigh, bestbw)); 3343 3344 mutex_enter(&sc->sc_lock); 3345 hsed = sc->sc_eds[best]; 3346 sed->next = hsed->next; 3347 usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags), 3348 sizeof(hsed->ed.ed_flags), 3349 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3350 sed->ed.ed_nexted = hsed->ed.ed_nexted; 3351 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3352 sizeof(sed->ed.ed_flags), 3353 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3354 hsed->next = sed; 3355 hsed->ed.ed_nexted = HTOO32(sed->physaddr); 3356 usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags), 3357 sizeof(hsed->ed.ed_flags), 3358 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3359 mutex_exit(&sc->sc_lock); 3360 3361 for (j = 0; j < nslots; j++) 3362 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 3363 opipe->u.intr.nslots = nslots; 3364 opipe->u.intr.pos = best; 3365 3366 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 3367 return (USBD_NORMAL_COMPLETION); 3368 } 3369 3370 /***********************/ 3371 3372 usbd_status 3373 ohci_device_isoc_transfer(usbd_xfer_handle xfer) 3374 { 3375 ohci_softc_t *sc = xfer->pipe->device->bus->hci_private; 3376 usbd_status err; 3377 3378 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer)); 3379 3380 /* Put it on our queue, */ 3381 mutex_enter(&sc->sc_lock); 3382 err = usb_insert_transfer(xfer); 3383 mutex_exit(&sc->sc_lock); 3384 3385 /* bail out on error, */ 3386 if (err && err != USBD_IN_PROGRESS) 3387 return (err); 3388 3389 /* XXX should check inuse here */ 3390 3391 /* insert into schedule, */ 3392 ohci_device_isoc_enter(xfer); 3393 3394 /* and start if the pipe wasn't running */ 3395 if (!err) 3396 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 3397 3398 return (err); 3399 } 3400 3401 void 3402 ohci_device_isoc_enter(usbd_xfer_handle xfer) 3403 { 3404 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3405 usbd_device_handle dev = opipe->pipe.device; 3406 ohci_softc_t *sc = dev->bus->hci_private; 3407 ohci_soft_ed_t *sed = opipe->sed; 3408 struct iso *iso = &opipe->u.iso; 3409 ohci_soft_itd_t *sitd, *nsitd; 3410 ohci_physaddr_t buf, offs, noffs, bp0; 3411 int i, ncur, nframes; 3412 3413 DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p " 3414 "nframes=%d\n", 3415 iso->inuse, iso->next, xfer, xfer->nframes)); 3416 3417 if (sc->sc_dying) 3418 return; 3419 3420 if (iso->next == -1) { 3421 /* Not in use yet, schedule it a few frames ahead. */ 3422 iso->next = O32TOH(sc->sc_hcca->hcca_frame_number) + 5; 3423 DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n", 3424 iso->next)); 3425 } 3426 3427 sitd = opipe->tail.itd; 3428 buf = DMAADDR(&xfer->dmabuf, 0); 3429 bp0 = OHCI_PAGE(buf); 3430 offs = OHCI_PAGE_OFFSET(buf); 3431 nframes = xfer->nframes; 3432 xfer->hcpriv = sitd; 3433 for (i = ncur = 0; i < nframes; i++, ncur++) { 3434 noffs = offs + xfer->frlengths[i]; 3435 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ 3436 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */ 3437 3438 /* Allocate next ITD */ 3439 mutex_enter(&sc->sc_lock); 3440 nsitd = ohci_alloc_sitd(sc); 3441 mutex_exit(&sc->sc_lock); 3442 if (nsitd == NULL) { 3443 /* XXX what now? */ 3444 printf("%s: isoc TD alloc failed\n", 3445 device_xname(sc->sc_dev)); 3446 return; 3447 } 3448 3449 /* Fill current ITD */ 3450 sitd->itd.itd_flags = HTOO32( 3451 OHCI_ITD_NOCC | 3452 OHCI_ITD_SET_SF(iso->next) | 3453 OHCI_ITD_SET_DI(6) | /* delay intr a little */ 3454 OHCI_ITD_SET_FC(ncur)); 3455 sitd->itd.itd_bp0 = HTOO32(bp0); 3456 sitd->nextitd = nsitd; 3457 sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr); 3458 sitd->itd.itd_be = HTOO32(bp0 + offs - 1); 3459 sitd->xfer = xfer; 3460 sitd->flags = 0; 3461 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 3462 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3463 3464 sitd = nsitd; 3465 iso->next = iso->next + ncur; 3466 bp0 = OHCI_PAGE(buf + offs); 3467 ncur = 0; 3468 } 3469 sitd->itd.itd_offset[ncur] = HTOO16(OHCI_ITD_MK_OFFS(offs)); 3470 offs = noffs; 3471 } 3472 mutex_enter(&sc->sc_lock); 3473 nsitd = ohci_alloc_sitd(sc); 3474 mutex_exit(&sc->sc_lock); 3475 if (nsitd == NULL) { 3476 /* XXX what now? */ 3477 printf("%s: isoc TD alloc failed\n", 3478 device_xname(sc->sc_dev)); 3479 return; 3480 } 3481 /* Fixup last used ITD */ 3482 sitd->itd.itd_flags = HTOO32( 3483 OHCI_ITD_NOCC | 3484 OHCI_ITD_SET_SF(iso->next) | 3485 OHCI_ITD_SET_DI(0) | 3486 OHCI_ITD_SET_FC(ncur)); 3487 sitd->itd.itd_bp0 = HTOO32(bp0); 3488 sitd->nextitd = nsitd; 3489 sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr); 3490 sitd->itd.itd_be = HTOO32(bp0 + offs - 1); 3491 sitd->xfer = xfer; 3492 sitd->flags = OHCI_CALL_DONE; 3493 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 3494 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3495 3496 iso->next = iso->next + ncur; 3497 iso->inuse += nframes; 3498 3499 xfer->actlen = offs; /* XXX pretend we did it all */ 3500 3501 xfer->status = USBD_IN_PROGRESS; 3502 3503 #ifdef OHCI_DEBUG 3504 if (ohcidebug > 5) { 3505 DPRINTF(("ohci_device_isoc_enter: frame=%d\n", 3506 O32TOH(sc->sc_hcca->hcca_frame_number))); 3507 ohci_dump_itds(sc, xfer->hcpriv); 3508 ohci_dump_ed(sc, sed); 3509 } 3510 #endif 3511 3512 mutex_enter(&sc->sc_lock); 3513 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3514 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3515 sed->ed.ed_tailp = HTOO32(nsitd->physaddr); 3516 opipe->tail.itd = nsitd; 3517 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3518 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3519 sizeof(sed->ed.ed_flags), 3520 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3521 mutex_exit(&sc->sc_lock); 3522 3523 #ifdef OHCI_DEBUG 3524 if (ohcidebug > 5) { 3525 delay(150000); 3526 DPRINTF(("ohci_device_isoc_enter: after frame=%d\n", 3527 O32TOH(sc->sc_hcca->hcca_frame_number))); 3528 ohci_dump_itds(sc, xfer->hcpriv); 3529 ohci_dump_ed(sc, sed); 3530 } 3531 #endif 3532 } 3533 3534 usbd_status 3535 ohci_device_isoc_start(usbd_xfer_handle xfer) 3536 { 3537 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3538 ohci_softc_t *sc = opipe->pipe.device->bus->hci_private; 3539 3540 DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer)); 3541 3542 mutex_enter(&sc->sc_lock); 3543 3544 if (sc->sc_dying) { 3545 mutex_exit(&sc->sc_lock); 3546 return (USBD_IOERROR); 3547 } 3548 3549 #ifdef DIAGNOSTIC 3550 if (xfer->status != USBD_IN_PROGRESS) 3551 printf("ohci_device_isoc_start: not in progress %p\n", xfer); 3552 #endif 3553 3554 /* XXX anything to do? */ 3555 3556 mutex_exit(&sc->sc_lock); 3557 3558 return (USBD_IN_PROGRESS); 3559 } 3560 3561 void 3562 ohci_device_isoc_abort(usbd_xfer_handle xfer) 3563 { 3564 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3565 ohci_softc_t *sc = opipe->pipe.device->bus->hci_private; 3566 ohci_soft_ed_t *sed; 3567 ohci_soft_itd_t *sitd; 3568 3569 DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p lock=%p\n", xfer, &sc->sc_lock)); 3570 3571 KASSERT(mutex_owned(&sc->sc_lock)); 3572 3573 /* Transfer is already done. */ 3574 if (xfer->status != USBD_NOT_STARTED && 3575 xfer->status != USBD_IN_PROGRESS) { 3576 printf("ohci_device_isoc_abort: early return\n"); 3577 goto done; 3578 } 3579 3580 /* Give xfer the requested abort code. */ 3581 xfer->status = USBD_CANCELLED; 3582 3583 sed = opipe->sed; 3584 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3585 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3586 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */ 3587 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3588 sizeof(sed->ed.ed_flags), 3589 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3590 3591 sitd = xfer->hcpriv; 3592 #ifdef DIAGNOSTIC 3593 if (sitd == NULL) { 3594 printf("ohci_device_isoc_abort: hcpriv==0\n"); 3595 goto done; 3596 } 3597 #endif 3598 for (; sitd->xfer == xfer; sitd = sitd->nextitd) { 3599 #ifdef DIAGNOSTIC 3600 DPRINTFN(1,("abort sets done sitd=%p\n", sitd)); 3601 sitd->isdone = 1; 3602 #endif 3603 } 3604 3605 usb_delay_ms_locked(&sc->sc_bus, OHCI_ITD_NOFFSET, &sc->sc_lock); 3606 3607 /* Run callback. */ 3608 usb_transfer_complete(xfer); 3609 3610 sed->ed.ed_headp = HTOO32(sitd->physaddr); /* unlink TDs */ 3611 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */ 3612 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3613 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3614 3615 done: 3616 KASSERT(mutex_owned(&sc->sc_lock)); 3617 } 3618 3619 void 3620 ohci_device_isoc_done(usbd_xfer_handle xfer) 3621 { 3622 DPRINTFN(1,("ohci_device_isoc_done: xfer=%p\n", xfer)); 3623 } 3624 3625 usbd_status 3626 ohci_setup_isoc(usbd_pipe_handle pipe) 3627 { 3628 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3629 ohci_softc_t *sc = pipe->device->bus->hci_private; 3630 struct iso *iso = &opipe->u.iso; 3631 3632 iso->next = -1; 3633 iso->inuse = 0; 3634 3635 mutex_enter(&sc->sc_lock); 3636 ohci_add_ed(sc, opipe->sed, sc->sc_isoc_head); 3637 mutex_exit(&sc->sc_lock); 3638 3639 return (USBD_NORMAL_COMPLETION); 3640 } 3641 3642 void 3643 ohci_device_isoc_close(usbd_pipe_handle pipe) 3644 { 3645 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3646 ohci_softc_t *sc = pipe->device->bus->hci_private; 3647 3648 KASSERT(mutex_owned(&sc->sc_lock)); 3649 3650 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe)); 3651 ohci_close_pipe(pipe, sc->sc_isoc_head); 3652 #ifdef DIAGNOSTIC 3653 opipe->tail.itd->isdone = 1; 3654 #endif 3655 ohci_free_sitd(sc, opipe->tail.itd); 3656 } 3657
Indexes created Fri Oct 03 02:09:57 GMT 2025