ohci.c revision 1.25
1 /* $NetBSD: ohci.c,v 1.25 1999/01/10 18:42:10 augustss Exp $ */ 2 3 /* 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (augustss (at) carlstedt.se) at 9 * Carlstedt Research & Technology. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * USB Open Host Controller driver. 42 * 43 * OHCI spec: http://www.intel.com/design/usb/ohci11d.pdf 44 * USB spec: http://www.teleport.com/cgi-bin/mailmerge.cgi/~usb/cgiform.tpl 45 */ 46 47 #include <sys/param.h> 48 #include <sys/systm.h> 49 #include <sys/kernel.h> 50 #include <sys/malloc.h> 51 #if defined(__NetBSD__) 52 #include <sys/device.h> 53 #elif defined(__FreeBSD__) 54 #include <sys/module.h> 55 #include <sys/bus.h> 56 #endif 57 #include <sys/proc.h> 58 #include <sys/queue.h> 59 #include <sys/select.h> 60 61 #include <machine/bus.h> 62 #include <machine/endian.h> 63 64 #include <dev/usb/usb.h> 65 #include <dev/usb/usbdi.h> 66 #include <dev/usb/usbdivar.h> 67 #include <dev/usb/usb_quirks.h> 68 #include <dev/usb/usb_mem.h> 69 70 #include <dev/usb/ohcireg.h> 71 #include <dev/usb/ohcivar.h> 72 73 #if defined(__FreeBSD__) 74 #include <machine/clock.h> 75 76 #define delay(d) DELAY(d) 77 78 #endif 79 80 /* 81 * The OHCI controller is little endian, so on big endian machines 82 * the data strored in memory needs to be swapped. 83 */ 84 #if BYTE_ORDER == BIG_ENDIAN 85 #define LE(x) (bswap32(x)) 86 #else 87 #define LE(x) (x) 88 #endif 89 90 struct ohci_pipe; 91 92 ohci_soft_ed_t *ohci_alloc_sed __P((ohci_softc_t *)); 93 void ohci_free_sed __P((ohci_softc_t *, ohci_soft_ed_t *)); 94 95 ohci_soft_td_t *ohci_alloc_std __P((ohci_softc_t *)); 96 void ohci_free_std __P((ohci_softc_t *, ohci_soft_td_t *)); 97 98 usbd_status ohci_open __P((usbd_pipe_handle)); 99 void ohci_poll __P((struct usbd_bus *)); 100 void ohci_waitintr __P((ohci_softc_t *, usbd_request_handle)); 101 void ohci_rhsc __P((ohci_softc_t *, usbd_request_handle)); 102 void ohci_process_done __P((ohci_softc_t *, ohci_physaddr_t)); 103 void ohci_ii_done __P((ohci_softc_t *, usbd_request_handle)); 104 void ohci_ctrl_done __P((ohci_softc_t *, usbd_request_handle)); 105 void ohci_intr_done __P((ohci_softc_t *, usbd_request_handle)); 106 void ohci_bulk_done __P((ohci_softc_t *, usbd_request_handle)); 107 108 usbd_status ohci_device_request __P((usbd_request_handle reqh)); 109 void ohci_add_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *)); 110 void ohci_rem_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *)); 111 void ohci_hash_add_td __P((ohci_softc_t *, ohci_soft_td_t *)); 112 void ohci_hash_rem_td __P((ohci_softc_t *, ohci_soft_td_t *)); 113 ohci_soft_td_t *ohci_hash_find_td __P((ohci_softc_t *, ohci_physaddr_t)); 114 115 usbd_status ohci_root_ctrl_transfer __P((usbd_request_handle)); 116 usbd_status ohci_root_ctrl_start __P((usbd_request_handle)); 117 void ohci_root_ctrl_abort __P((usbd_request_handle)); 118 void ohci_root_ctrl_close __P((usbd_pipe_handle)); 119 120 usbd_status ohci_root_intr_transfer __P((usbd_request_handle)); 121 usbd_status ohci_root_intr_start __P((usbd_request_handle)); 122 void ohci_root_intr_abort __P((usbd_request_handle)); 123 void ohci_root_intr_close __P((usbd_pipe_handle)); 124 125 usbd_status ohci_device_ctrl_transfer __P((usbd_request_handle)); 126 usbd_status ohci_device_ctrl_start __P((usbd_request_handle)); 127 void ohci_device_ctrl_abort __P((usbd_request_handle)); 128 void ohci_device_ctrl_close __P((usbd_pipe_handle)); 129 130 usbd_status ohci_device_bulk_transfer __P((usbd_request_handle)); 131 usbd_status ohci_device_bulk_start __P((usbd_request_handle)); 132 void ohci_device_bulk_abort __P((usbd_request_handle)); 133 void ohci_device_bulk_close __P((usbd_pipe_handle)); 134 135 usbd_status ohci_device_intr_transfer __P((usbd_request_handle)); 136 usbd_status ohci_device_intr_start __P((usbd_request_handle)); 137 void ohci_device_intr_abort __P((usbd_request_handle)); 138 void ohci_device_intr_close __P((usbd_pipe_handle)); 139 usbd_status ohci_device_setintr __P((ohci_softc_t *sc, 140 struct ohci_pipe *pipe, int ival)); 141 142 int ohci_str __P((usb_string_descriptor_t *, int, char *)); 143 144 void ohci_timeout __P((void *)); 145 void ohci_rhsc_able __P((ohci_softc_t *, int)); 146 147 #ifdef USB_DEBUG 148 ohci_softc_t *thesc; 149 void ohci_dumpregs __P((ohci_softc_t *)); 150 void ohci_dump_tds __P((ohci_soft_td_t *)); 151 void ohci_dump_td __P((ohci_soft_td_t *)); 152 void ohci_dump_ed __P((ohci_soft_ed_t *)); 153 #endif 154 155 #if defined(__NetBSD__) 156 #define OWRITE4(sc, r, x) bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)) 157 #define OREAD4(sc, r) bus_space_read_4((sc)->iot, (sc)->ioh, (r)) 158 #define OREAD2(sc, r) bus_space_read_2((sc)->iot, (sc)->ioh, (r)) 159 #elif defined(__FreeBSD__) 160 #define OWRITE4(sc, r, x) *(unsigned int *) ((sc)->sc_iobase + (r)) = x 161 #define OREAD4(sc, r) (*(unsigned int *) ((sc)->sc_iobase + (r))) 162 #define OREAD2(sc, r) (*(unsigned short *) ((sc)->sc_iobase + (r))) 163 #endif 164 165 /* Reverse the bits in a value 0 .. 31 */ 166 static u_int8_t revbits[OHCI_NO_INTRS] = 167 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 168 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 169 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 170 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 171 172 struct ohci_pipe { 173 struct usbd_pipe pipe; 174 ohci_soft_ed_t *sed; 175 ohci_soft_td_t *tail; 176 /* Info needed for different pipe kinds. */ 177 union { 178 /* Control pipe */ 179 struct { 180 usb_dma_t datadma; 181 usb_dma_t reqdma; 182 u_int length; 183 ohci_soft_td_t *setup, *xfer, *stat; 184 } ctl; 185 /* Interrupt pipe */ 186 struct { 187 usb_dma_t datadma; 188 int nslots; 189 int pos; 190 } intr; 191 /* Bulk pipe */ 192 struct { 193 usb_dma_t datadma; 194 u_int length; 195 } bulk; 196 } u; 197 }; 198 199 #define OHCI_INTR_ENDPT 1 200 201 struct usbd_methods ohci_root_ctrl_methods = { 202 ohci_root_ctrl_transfer, 203 ohci_root_ctrl_start, 204 ohci_root_ctrl_abort, 205 ohci_root_ctrl_close, 206 0, 207 }; 208 209 struct usbd_methods ohci_root_intr_methods = { 210 ohci_root_intr_transfer, 211 ohci_root_intr_start, 212 ohci_root_intr_abort, 213 ohci_root_intr_close, 214 0, 215 }; 216 217 struct usbd_methods ohci_device_ctrl_methods = { 218 ohci_device_ctrl_transfer, 219 ohci_device_ctrl_start, 220 ohci_device_ctrl_abort, 221 ohci_device_ctrl_close, 222 0, 223 }; 224 225 struct usbd_methods ohci_device_intr_methods = { 226 ohci_device_intr_transfer, 227 ohci_device_intr_start, 228 ohci_device_intr_abort, 229 ohci_device_intr_close, 230 }; 231 232 struct usbd_methods ohci_device_bulk_methods = { 233 ohci_device_bulk_transfer, 234 ohci_device_bulk_start, 235 ohci_device_bulk_abort, 236 ohci_device_bulk_close, 237 0, 238 }; 239 240 ohci_soft_ed_t * 241 ohci_alloc_sed(sc) 242 ohci_softc_t *sc; 243 { 244 ohci_soft_ed_t *sed; 245 usbd_status r; 246 int i, offs; 247 usb_dma_t dma; 248 249 if (!sc->sc_freeeds) { 250 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 251 sed = malloc(sizeof(ohci_soft_ed_t) * OHCI_ED_CHUNK, 252 M_USBDEV, M_NOWAIT); 253 if (!sed) 254 return 0; 255 r = usb_allocmem(sc->sc_dmatag, OHCI_ED_SIZE * OHCI_ED_CHUNK, 256 OHCI_ED_ALIGN, &dma); 257 if (r != USBD_NORMAL_COMPLETION) { 258 free(sed, M_USBDEV); 259 return 0; 260 } 261 for(i = 0; i < OHCI_ED_CHUNK; i++, sed++) { 262 offs = i * OHCI_ED_SIZE; 263 sed->physaddr = DMAADDR(&dma) + offs; 264 sed->ed = (ohci_ed_t *) 265 ((char *)KERNADDR(&dma) + offs); 266 sed->next = sc->sc_freeeds; 267 sc->sc_freeeds = sed; 268 } 269 } 270 sed = sc->sc_freeeds; 271 sc->sc_freeeds = sed->next; 272 memset(sed->ed, 0, OHCI_ED_SIZE); 273 sed->next = 0; 274 return sed; 275 } 276 277 void 278 ohci_free_sed(sc, sed) 279 ohci_softc_t *sc; 280 ohci_soft_ed_t *sed; 281 { 282 sed->next = sc->sc_freeeds; 283 sc->sc_freeeds = sed; 284 } 285 286 ohci_soft_td_t * 287 ohci_alloc_std(sc) 288 ohci_softc_t *sc; 289 { 290 ohci_soft_td_t *std; 291 usbd_status r; 292 int i, offs; 293 usb_dma_t dma; 294 295 if (!sc->sc_freetds) { 296 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 297 std = malloc(sizeof(ohci_soft_td_t) * OHCI_TD_CHUNK, 298 M_USBDEV, M_NOWAIT); 299 if (!std) 300 return 0; 301 r = usb_allocmem(sc->sc_dmatag, OHCI_TD_SIZE * OHCI_TD_CHUNK, 302 OHCI_TD_ALIGN, &dma); 303 if (r != USBD_NORMAL_COMPLETION) { 304 free(std, M_USBDEV); 305 return 0; 306 } 307 for(i = 0; i < OHCI_TD_CHUNK; i++, std++) { 308 offs = i * OHCI_TD_SIZE; 309 std->physaddr = DMAADDR(&dma) + offs; 310 std->td = (ohci_td_t *) 311 ((char *)KERNADDR(&dma) + offs); 312 std->nexttd = sc->sc_freetds; 313 sc->sc_freetds = std; 314 } 315 } 316 std = sc->sc_freetds; 317 sc->sc_freetds = std->nexttd; 318 memset(std->td, 0, OHCI_TD_SIZE); 319 std->nexttd = 0; 320 return (std); 321 } 322 323 void 324 ohci_free_std(sc, std) 325 ohci_softc_t *sc; 326 ohci_soft_td_t *std; 327 { 328 std->nexttd = sc->sc_freetds; 329 sc->sc_freetds = std; 330 } 331 332 usbd_status 333 ohci_init(sc) 334 ohci_softc_t *sc; 335 { 336 ohci_soft_ed_t *sed, *psed; 337 usbd_status r; 338 int rev; 339 int i; 340 u_int32_t s, ctl, ival, hcr, fm, per; 341 342 DPRINTF(("ohci_init: start\n")); 343 rev = OREAD4(sc, OHCI_REVISION); 344 printf("%s: OHCI version %d.%d%s\n", USBDEVNAME(sc->sc_bus.bdev), 345 OHCI_REV_HI(rev), OHCI_REV_LO(rev), 346 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 347 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 348 printf("%s: unsupported OHCI revision\n", 349 USBDEVNAME(sc->sc_bus.bdev)); 350 return (USBD_INVAL); 351 } 352 353 for (i = 0; i < OHCI_HASH_SIZE; i++) 354 LIST_INIT(&sc->sc_hash_tds[i]); 355 356 /* Allocate the HCCA area. */ 357 r = usb_allocmem(sc->sc_dmatag, OHCI_HCCA_SIZE, 358 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 359 if (r != USBD_NORMAL_COMPLETION) 360 return (r); 361 sc->sc_hcca = (struct ohci_hcca *)KERNADDR(&sc->sc_hccadma); 362 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 363 364 sc->sc_eintrs = OHCI_NORMAL_INTRS; 365 366 sc->sc_ctrl_head = ohci_alloc_sed(sc); 367 if (!sc->sc_ctrl_head) { 368 r = USBD_NOMEM; 369 goto bad1; 370 } 371 sc->sc_ctrl_head->ed->ed_flags |= LE(OHCI_ED_SKIP); 372 sc->sc_bulk_head = ohci_alloc_sed(sc); 373 if (!sc->sc_bulk_head) { 374 r = USBD_NOMEM; 375 goto bad2; 376 } 377 sc->sc_bulk_head->ed->ed_flags |= LE(OHCI_ED_SKIP); 378 379 /* Allocate all the dummy EDs that make up the interrupt tree. */ 380 for (i = 0; i < OHCI_NO_EDS; i++) { 381 sed = ohci_alloc_sed(sc); 382 if (!sed) { 383 while (--i >= 0) 384 ohci_free_sed(sc, sc->sc_eds[i]); 385 r = USBD_NOMEM; 386 goto bad3; 387 } 388 /* All ED fields are set to 0. */ 389 sc->sc_eds[i] = sed; 390 sed->ed->ed_flags |= LE(OHCI_ED_SKIP); 391 if (i != 0) { 392 psed = sc->sc_eds[(i-1) / 2]; 393 sed->next = psed; 394 sed->ed->ed_nexted = LE(psed->physaddr); 395 } 396 } 397 /* 398 * Fill HCCA interrupt table. The bit reversal is to get 399 * the tree set up properly to spread the interrupts. 400 */ 401 for (i = 0; i < OHCI_NO_INTRS; i++) 402 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 403 LE(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 404 405 /* Determine in what context we are running. */ 406 ctl = OREAD4(sc, OHCI_CONTROL); 407 if (ctl & OHCI_IR) { 408 /* SMM active, request change */ 409 DPRINTF(("ohci_init: SMM active, request owner change\n")); 410 s = OREAD4(sc, OHCI_COMMAND_STATUS); 411 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 412 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 413 delay(1000); 414 ctl = OREAD4(sc, OHCI_CONTROL); 415 } 416 if ((ctl & OHCI_IR) == 0) { 417 printf("%s: SMM does not respond, resetting\n", 418 USBDEVNAME(sc->sc_bus.bdev)); 419 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 420 goto reset; 421 } 422 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 423 /* BIOS started controller. */ 424 DPRINTF(("ohci_init: BIOS active\n")); 425 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 426 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL); 427 delay(USB_RESUME_DELAY * 1000); 428 } 429 } else { 430 DPRINTF(("ohci_init: cold started\n")); 431 reset: 432 /* Controller was cold started. */ 433 delay(USB_BUS_RESET_DELAY * 1000); 434 } 435 436 /* 437 * This reset should not be necessary according to the OHCI spec, but 438 * without it some controllers do not start. 439 */ 440 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 441 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 442 delay(USB_BUS_RESET_DELAY * 1000); 443 444 /* We now own the host controller and the bus has been reset. */ 445 ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL)); 446 447 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 448 /* Nominal time for a reset is 10 us. */ 449 for (i = 0; i < 10; i++) { 450 delay(10); 451 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 452 if (!hcr) 453 break; 454 } 455 if (hcr) { 456 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 457 r = USBD_IOERROR; 458 goto bad3; 459 } 460 #ifdef USB_DEBUG 461 thesc = sc; 462 if (ohcidebug > 15) 463 ohci_dumpregs(sc); 464 #endif 465 466 /* The controller is now in suspend state, we have 2ms to finish. */ 467 468 /* Set up HC registers. */ 469 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma)); 470 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 471 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 472 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 473 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 474 ctl = OREAD4(sc, OHCI_CONTROL); 475 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 476 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 477 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL; 478 /* And finally start it! */ 479 OWRITE4(sc, OHCI_CONTROL, ctl); 480 481 /* 482 * The controller is now OPERATIONAL. Set a some final 483 * registers that should be set earlier, but that the 484 * controller ignores when in the SUSPEND state. 485 */ 486 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 487 fm |= OHCI_FSMPS(ival) | ival; 488 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 489 per = OHCI_PERIODIC(ival); /* 90% periodic */ 490 OWRITE4(sc, OHCI_PERIODIC_START, per); 491 492 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 493 494 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 495 496 #ifdef USB_DEBUG 497 if (ohcidebug > 5) 498 ohci_dumpregs(sc); 499 #endif 500 501 /* Set up the bus struct. */ 502 sc->sc_bus.open_pipe = ohci_open; 503 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 504 sc->sc_bus.do_poll = ohci_poll; 505 506 return (USBD_NORMAL_COMPLETION); 507 508 bad3: 509 ohci_free_sed(sc, sc->sc_ctrl_head); 510 bad2: 511 ohci_free_sed(sc, sc->sc_bulk_head); 512 bad1: 513 usb_freemem(sc->sc_dmatag, &sc->sc_hccadma); 514 return (r); 515 } 516 517 #ifdef USB_DEBUG 518 void ohcidump(void); 519 void ohcidump(void) { ohci_dumpregs(thesc); } 520 521 void 522 ohci_dumpregs(sc) 523 ohci_softc_t *sc; 524 { 525 printf("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 526 OREAD4(sc, OHCI_REVISION), 527 OREAD4(sc, OHCI_CONTROL), 528 OREAD4(sc, OHCI_COMMAND_STATUS)); 529 printf(" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 530 OREAD4(sc, OHCI_INTERRUPT_STATUS), 531 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 532 OREAD4(sc, OHCI_INTERRUPT_DISABLE)); 533 printf(" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 534 OREAD4(sc, OHCI_HCCA), 535 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 536 OREAD4(sc, OHCI_CONTROL_HEAD_ED)); 537 printf(" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 538 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 539 OREAD4(sc, OHCI_BULK_HEAD_ED), 540 OREAD4(sc, OHCI_BULK_CURRENT_ED)); 541 printf(" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 542 OREAD4(sc, OHCI_DONE_HEAD), 543 OREAD4(sc, OHCI_FM_INTERVAL), 544 OREAD4(sc, OHCI_FM_REMAINING)); 545 printf(" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 546 OREAD4(sc, OHCI_FM_NUMBER), 547 OREAD4(sc, OHCI_PERIODIC_START), 548 OREAD4(sc, OHCI_LS_THRESHOLD)); 549 printf(" desca=0x%08x descb=0x%08x stat=0x%08x\n", 550 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 551 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 552 OREAD4(sc, OHCI_RH_STATUS)); 553 printf(" port1=0x%08x port2=0x%08x\n", 554 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 555 OREAD4(sc, OHCI_RH_PORT_STATUS(2))); 556 printf(" HCCA: frame_number=0x%04x done_head=0x%08x\n", 557 LE(sc->sc_hcca->hcca_frame_number), 558 LE(sc->sc_hcca->hcca_done_head)); 559 } 560 #endif 561 562 int 563 ohci_intr(p) 564 void *p; 565 { 566 ohci_softc_t *sc = p; 567 u_int32_t intrs, eintrs; 568 ohci_physaddr_t done; 569 570 /* In case the interrupt occurs before initialization has completed. */ 571 if (sc == NULL || sc->sc_hcca == NULL) { /* NWH added sc==0 */ 572 #ifdef DIAGNOSTIC 573 printf("ohci_intr: sc->sc_hcca == NULL\n"); 574 #endif 575 return (0); 576 } 577 578 done = LE(sc->sc_hcca->hcca_done_head); 579 if (done != 0) { 580 intrs = OHCI_WDH; 581 if (done & OHCI_DONE_INTRS) 582 intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS); 583 } else 584 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 585 if (!intrs) 586 return (0); 587 intrs &= ~OHCI_MIE; 588 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */ 589 eintrs = intrs & sc->sc_eintrs; 590 if (!eintrs) 591 return (0); 592 593 sc->sc_intrs++; 594 DPRINTFN(7, ("ohci_intr: sc=%p intrs=%x(%x) eintr=%x\n", 595 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 596 (u_int)eintrs)); 597 598 if (eintrs & OHCI_SO) { 599 printf("%s: scheduling overrun\n",USBDEVNAME(sc->sc_bus.bdev)); 600 /* XXX do what */ 601 intrs &= ~OHCI_SO; 602 } 603 if (eintrs & OHCI_WDH) { 604 ohci_process_done(sc, done &~ OHCI_DONE_INTRS); 605 sc->sc_hcca->hcca_done_head = 0; 606 intrs &= ~OHCI_WDH; 607 } 608 if (eintrs & OHCI_RD) { 609 /* XXX process resume detect */ 610 } 611 if (eintrs & OHCI_UE) { 612 printf("%s: unrecoverable error, controller halted\n", 613 USBDEVNAME(sc->sc_bus.bdev)); 614 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 615 /* XXX what else */ 616 } 617 if (eintrs & OHCI_RHSC) { 618 ohci_rhsc(sc, sc->sc_intrreqh); 619 intrs &= ~OHCI_RHSC; 620 621 /* 622 * Disable RHSC interrupt for now, because it will be 623 * on until the port has been reset. 624 */ 625 ohci_rhsc_able(sc, 0); 626 } 627 628 /* Block unprocessed interrupts. XXX */ 629 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, intrs); 630 sc->sc_eintrs &= ~intrs; 631 632 return (1); 633 } 634 635 void 636 ohci_rhsc_able(sc, on) 637 ohci_softc_t *sc; 638 int on; 639 { 640 DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on)); 641 if (on) { 642 sc->sc_eintrs |= OHCI_RHSC; 643 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 644 } else { 645 sc->sc_eintrs &= ~OHCI_RHSC; 646 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC); 647 } 648 } 649 650 #ifdef USB_DEBUG 651 char *ohci_cc_strs[] = { 652 "NO_ERROR", 653 "CRC", 654 "BIT_STUFFING", 655 "DATA_TOGGLE_MISMATCH", 656 "STALL", 657 "DEVICE_NOT_RESPONDING", 658 "PID_CHECK_FAILURE", 659 "UNEXPECTED_PID", 660 "DATA_OVERRUN", 661 "DATA_UNDERRUN", 662 "BUFFER_OVERRUN", 663 "BUFFER_UNDERRUN", 664 "NOT_ACCESSED", 665 }; 666 #endif 667 668 void 669 ohci_process_done(sc, done) 670 ohci_softc_t *sc; 671 ohci_physaddr_t done; 672 { 673 ohci_soft_td_t *std, *sdone; 674 usbd_request_handle reqh; 675 int len, cc; 676 677 DPRINTFN(10,("ohci_process_done: done=0x%08lx\n", (u_long)done)); 678 679 /* Reverse the done list. */ 680 for (sdone = 0; done; done = LE(std->td->td_nexttd)) { 681 std = ohci_hash_find_td(sc, done); 682 std->dnext = sdone; 683 sdone = std; 684 } 685 686 #ifdef USB_DEBUG 687 if (ohcidebug > 10) { 688 printf("ohci_process_done: TD done:\n"); 689 ohci_dump_tds(sdone); 690 } 691 #endif 692 693 for (std = sdone; std; std = std->dnext) { 694 reqh = std->reqh; 695 DPRINTFN(10, ("ohci_process_done: std=%p reqh=%p\n",std,reqh)); 696 cc = OHCI_TD_GET_CC(LE(std->td->td_flags)); 697 if (cc == OHCI_CC_NO_ERROR) { 698 if (std->td->td_cbp == 0) 699 len = std->len; 700 else 701 len = LE(std->td->td_be) - 702 LE(std->td->td_cbp) + 1; 703 /* 704 * Only do a callback on the last stage of a transfer. 705 * Others have hcpriv = 0. 706 */ 707 if ((reqh->pipe->endpoint->edesc->bmAttributes & 708 UE_XFERTYPE) == UE_CONTROL) { 709 /* For a control transfer the length is in 710 * the xfer stage */ 711 if (reqh->hcpriv == std) { 712 reqh->status = USBD_NORMAL_COMPLETION; 713 ohci_ii_done(sc, reqh); 714 } else 715 reqh->actlen = len; 716 } else { 717 if (reqh->hcpriv == std) { 718 reqh->actlen = len; 719 reqh->status = USBD_NORMAL_COMPLETION; 720 ohci_ii_done(sc, reqh); 721 } 722 } 723 } else { 724 ohci_soft_td_t *p, *n; 725 struct ohci_pipe *opipe = 726 (struct ohci_pipe *)reqh->pipe; 727 DPRINTFN(-1,("ohci_process_done: error cc=%d (%s)\n", 728 OHCI_TD_GET_CC(LE(std->td->td_flags)), 729 ohci_cc_strs[OHCI_TD_GET_CC(LE(std->td->td_flags))])); 730 /* 731 * Endpoint is halted. First unlink all the TDs 732 * belonging to the failed transfer, and then restart 733 * the endpoint. 734 */ 735 for (p = std->nexttd; p->reqh == reqh; p = n) { 736 n = p->nexttd; 737 ohci_hash_rem_td(sc, p); 738 ohci_free_std(sc, p); 739 } 740 /* clear halt */ 741 opipe->sed->ed->ed_headp = LE(p->physaddr); 742 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 743 744 if (cc == OHCI_CC_STALL) 745 reqh->status = USBD_STALLED; 746 else 747 reqh->status = USBD_IOERROR; 748 ohci_ii_done(sc, reqh); 749 } 750 ohci_hash_rem_td(sc, std); 751 ohci_free_std(sc, std); 752 } 753 } 754 755 void 756 ohci_ii_done(sc, reqh) 757 ohci_softc_t *sc; 758 usbd_request_handle reqh; 759 { 760 switch (reqh->pipe->endpoint->edesc->bmAttributes & UE_XFERTYPE) { 761 case UE_CONTROL: 762 ohci_ctrl_done(sc, reqh); 763 usb_start_next(reqh->pipe); 764 break; 765 case UE_INTERRUPT: 766 ohci_intr_done(sc, reqh); 767 break; 768 case UE_BULK: 769 ohci_bulk_done(sc, reqh); 770 usb_start_next(reqh->pipe); 771 break; 772 case UE_ISOCHRONOUS: 773 printf("ohci_process_done: ISO done?\n"); 774 usb_start_next(reqh->pipe); 775 break; 776 } 777 778 /* And finally execute callback. */ 779 reqh->xfercb(reqh); 780 } 781 782 void 783 ohci_ctrl_done(sc, reqh) 784 ohci_softc_t *sc; 785 usbd_request_handle reqh; 786 { 787 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe; 788 u_int len = opipe->u.ctl.length; 789 usb_dma_t *dma; 790 791 DPRINTFN(10,("ohci_ctrl_done: reqh=%p\n", reqh)); 792 793 if (!reqh->isreq) { 794 panic("ohci_ctrl_done: not a request\n"); 795 return; 796 } 797 798 if (len != 0) { 799 dma = &opipe->u.ctl.datadma; 800 if (reqh->request.bmRequestType & UT_READ) 801 memcpy(reqh->buffer, KERNADDR(dma), len); 802 usb_freemem(sc->sc_dmatag, dma); 803 } 804 usb_untimeout(ohci_timeout, reqh, reqh->timo_handle); 805 } 806 807 void 808 ohci_intr_done(sc, reqh) 809 ohci_softc_t *sc; 810 usbd_request_handle reqh; 811 { 812 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe; 813 usb_dma_t *dma; 814 ohci_soft_ed_t *sed = opipe->sed; 815 ohci_soft_td_t *xfer, *tail; 816 817 818 DPRINTFN(10,("ohci_intr_done: reqh=%p, actlen=%d\n", 819 reqh, reqh->actlen)); 820 821 dma = &opipe->u.intr.datadma; 822 memcpy(reqh->buffer, KERNADDR(dma), reqh->actlen); 823 824 if (reqh->pipe->intrreqh == reqh) { 825 xfer = opipe->tail; 826 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 827 if (!tail) { 828 reqh->status = USBD_NOMEM; 829 return; 830 } 831 tail->reqh = 0; 832 833 xfer->td->td_flags = LE( 834 OHCI_TD_IN | OHCI_TD_NOCC | 835 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 836 if (reqh->flags & USBD_SHORT_XFER_OK) 837 xfer->td->td_flags |= LE(OHCI_TD_R); 838 xfer->td->td_cbp = LE(DMAADDR(dma)); 839 xfer->nexttd = tail; 840 xfer->td->td_nexttd = LE(tail->physaddr); 841 xfer->td->td_be = LE(LE(xfer->td->td_cbp) + reqh->length - 1); 842 xfer->len = reqh->length; 843 xfer->reqh = reqh; 844 845 reqh->hcpriv = xfer; 846 847 ohci_hash_add_td(sc, xfer); 848 sed->ed->ed_tailp = LE(tail->physaddr); 849 opipe->tail = tail; 850 } else { 851 usb_freemem(sc->sc_dmatag, dma); 852 usb_start_next(reqh->pipe); 853 } 854 } 855 856 void 857 ohci_bulk_done(sc, reqh) 858 ohci_softc_t *sc; 859 usbd_request_handle reqh; 860 { 861 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe; 862 usb_dma_t *dma; 863 864 865 DPRINTFN(10,("ohci_bulk_done: reqh=%p, actlen=%d\n", 866 reqh, reqh->actlen)); 867 868 dma = &opipe->u.bulk.datadma; 869 if (reqh->request.bmRequestType & UT_READ) 870 memcpy(reqh->buffer, KERNADDR(dma), reqh->actlen); 871 usb_freemem(sc->sc_dmatag, dma); 872 usb_untimeout(ohci_timeout, reqh, reqh->timo_handle); 873 } 874 875 void 876 ohci_rhsc(sc, reqh) 877 ohci_softc_t *sc; 878 usbd_request_handle reqh; 879 { 880 usbd_pipe_handle pipe; 881 struct ohci_pipe *opipe; 882 u_char *p; 883 int i, m; 884 int hstatus; 885 886 hstatus = OREAD4(sc, OHCI_RH_STATUS); 887 DPRINTF(("ohci_rhsc: sc=%p reqh=%p hstatus=0x%08x\n", 888 sc, reqh, hstatus)); 889 890 if (reqh == 0) { 891 /* Just ignore the change. */ 892 return; 893 } 894 895 pipe = reqh->pipe; 896 opipe = (struct ohci_pipe *)pipe; 897 898 p = KERNADDR(&opipe->u.intr.datadma); 899 m = min(sc->sc_noport, reqh->length * 8 - 1); 900 memset(p, 0, reqh->length); 901 for (i = 1; i <= m; i++) { 902 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 903 p[i/8] |= 1 << (i%8); 904 } 905 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 906 reqh->actlen = reqh->length; 907 reqh->status = USBD_NORMAL_COMPLETION; 908 reqh->xfercb(reqh); 909 910 if (reqh->pipe->intrreqh != reqh) { 911 sc->sc_intrreqh = 0; 912 usb_freemem(sc->sc_dmatag, &opipe->u.intr.datadma); 913 usb_start_next(reqh->pipe); 914 } 915 } 916 917 /* 918 * Wait here until controller claims to have an interrupt. 919 * Then call ohci_intr and return. Use timeout to avoid waiting 920 * too long. 921 */ 922 void 923 ohci_waitintr(sc, reqh) 924 ohci_softc_t *sc; 925 usbd_request_handle reqh; 926 { 927 int timo = reqh->timeout; 928 int usecs; 929 u_int32_t intrs; 930 931 reqh->status = USBD_IN_PROGRESS; 932 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 933 usb_delay_ms(&sc->sc_bus, 1); 934 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 935 DPRINTFN(10,("ohci_waitintr: 0x%04x\n", intrs)); 936 #ifdef USB_DEBUG 937 if (ohcidebug > 15) 938 ohci_dumpregs(sc); 939 #endif 940 if (intrs) { 941 ohci_intr(sc); 942 if (reqh->status != USBD_IN_PROGRESS) 943 return; 944 } 945 } 946 947 /* Timeout */ 948 DPRINTF(("ohci_waitintr: timeout\n")); 949 reqh->status = USBD_TIMEOUT; 950 ohci_ii_done(sc, reqh); 951 /* XXX should free TD */ 952 } 953 954 void 955 ohci_poll(bus) 956 struct usbd_bus *bus; 957 { 958 ohci_softc_t *sc = (ohci_softc_t *)bus; 959 960 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) 961 ohci_intr(sc); 962 } 963 964 usbd_status 965 ohci_device_request(reqh) 966 usbd_request_handle reqh; 967 { 968 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe; 969 usb_device_request_t *req = &reqh->request; 970 usbd_device_handle dev = opipe->pipe.device; 971 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 972 int addr = dev->address; 973 ohci_soft_td_t *setup, *xfer = 0, *stat, *next, *tail; 974 ohci_soft_ed_t *sed; 975 usb_dma_t *dmap; 976 int isread; 977 int len; 978 usbd_status r; 979 int s; 980 981 isread = req->bmRequestType & UT_READ; 982 len = UGETW(req->wLength); 983 984 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 985 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 986 req->bmRequestType, req->bRequest, UGETW(req->wValue), 987 UGETW(req->wIndex), len, addr, 988 opipe->pipe.endpoint->edesc->bEndpointAddress)); 989 990 setup = opipe->tail; 991 stat = ohci_alloc_std(sc); 992 if (!stat) { 993 r = USBD_NOMEM; 994 goto bad1; 995 } 996 tail = ohci_alloc_std(sc); 997 if (!tail) { 998 r = USBD_NOMEM; 999 goto bad2; 1000 } 1001 tail->reqh = 0; 1002 1003 sed = opipe->sed; 1004 dmap = &opipe->u.ctl.datadma; 1005 opipe->u.ctl.length = len; 1006 1007 /* Update device address and length since they may have changed. */ 1008 /* XXX This only needs to be done once, but it's too early in open. */ 1009 sed->ed->ed_flags = LE( 1010 (LE(sed->ed->ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) | 1011 OHCI_ED_SET_FA(addr) | 1012 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize))); 1013 1014 /* Set up data transaction */ 1015 if (len != 0) { 1016 xfer = ohci_alloc_std(sc); 1017 if (!xfer) { 1018 r = USBD_NOMEM; 1019 goto bad3; 1020 } 1021 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap); 1022 if (r != USBD_NORMAL_COMPLETION) 1023 goto bad4; 1024 xfer->td->td_flags = LE( 1025 (isread ? OHCI_TD_IN : OHCI_TD_OUT) | OHCI_TD_NOCC | 1026 OHCI_TD_TOGGLE_1 | OHCI_TD_NOINTR | 1027 (reqh->flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0)); 1028 xfer->td->td_cbp = LE(DMAADDR(dmap)); 1029 xfer->nexttd = stat; 1030 xfer->td->td_nexttd = LE(stat->physaddr); 1031 xfer->td->td_be = LE(LE(xfer->td->td_cbp) + len - 1); 1032 xfer->len = len; 1033 xfer->reqh = reqh; 1034 1035 next = xfer; 1036 } else 1037 next = stat; 1038 1039 memcpy(KERNADDR(&opipe->u.ctl.reqdma), req, sizeof *req); 1040 if (!isread && len != 0) 1041 memcpy(KERNADDR(dmap), reqh->buffer, len); 1042 1043 setup->td->td_flags = LE(OHCI_TD_SETUP | OHCI_TD_NOCC | 1044 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1045 setup->td->td_cbp = LE(DMAADDR(&opipe->u.ctl.reqdma)); 1046 setup->nexttd = next; 1047 setup->td->td_nexttd = LE(next->physaddr); 1048 setup->td->td_be = LE(LE(setup->td->td_cbp) + sizeof *req - 1); 1049 setup->len = 0; /* XXX The number of byte we count */ 1050 setup->reqh = reqh; 1051 1052 stat->td->td_flags = LE( 1053 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | OHCI_TD_NOCC | 1054 OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1055 stat->td->td_cbp = 0; 1056 stat->nexttd = tail; 1057 stat->td->td_nexttd = LE(tail->physaddr); 1058 stat->td->td_be = 0; 1059 stat->len = 0; 1060 stat->reqh = reqh; 1061 1062 reqh->hcpriv = stat; 1063 1064 #if USB_DEBUG 1065 if (ohcidebug > 5) { 1066 printf("ohci_device_request:\n"); 1067 ohci_dump_ed(sed); 1068 ohci_dump_tds(setup); 1069 } 1070 #endif 1071 1072 /* Insert ED in schedule */ 1073 s = splusb(); 1074 ohci_hash_add_td(sc, setup); 1075 if (len != 0) 1076 ohci_hash_add_td(sc, xfer); 1077 ohci_hash_add_td(sc, stat); 1078 sed->ed->ed_tailp = LE(tail->physaddr); 1079 opipe->tail = tail; 1080 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1081 if (reqh->timeout && !sc->sc_bus.use_polling) { 1082 usb_timeout(ohci_timeout, reqh, 1083 MS_TO_TICKS(reqh->timeout), reqh->timo_handle); 1084 } 1085 splx(s); 1086 1087 #if USB_DEBUG 1088 if (ohcidebug > 5) { 1089 delay(5000); 1090 printf("ohci_device_request: status=%x\n", 1091 OREAD4(sc, OHCI_COMMAND_STATUS)); 1092 ohci_dump_ed(sed); 1093 ohci_dump_tds(setup); 1094 } 1095 #endif 1096 1097 return (USBD_NORMAL_COMPLETION); 1098 1099 bad4: 1100 ohci_free_std(sc, xfer); 1101 bad3: 1102 ohci_free_std(sc, tail); 1103 bad2: 1104 ohci_free_std(sc, stat); 1105 bad1: 1106 return (r); 1107 } 1108 1109 /* 1110 * Add an ED to the schedule. Called at splusb(). 1111 */ 1112 void 1113 ohci_add_ed(sed, head) 1114 ohci_soft_ed_t *sed; 1115 ohci_soft_ed_t *head; 1116 { 1117 sed->next = head->next; 1118 sed->ed->ed_nexted = head->ed->ed_nexted; 1119 head->next = sed; 1120 head->ed->ed_nexted = LE(sed->physaddr); 1121 } 1122 1123 /* 1124 * Remove an ED from the schedule. Called at splusb(). 1125 */ 1126 void 1127 ohci_rem_ed(sed, head) 1128 ohci_soft_ed_t *sed; 1129 ohci_soft_ed_t *head; 1130 { 1131 ohci_soft_ed_t *p; 1132 1133 /* XXX */ 1134 for (p = head; p && p->next != sed; p = p->next) 1135 ; 1136 if (!p) 1137 panic("ohci_rem_ed: ED not found\n"); 1138 p->next = sed->next; 1139 p->ed->ed_nexted = sed->ed->ed_nexted; 1140 } 1141 1142 /* 1143 * When a transfer is completed the TD is added to the done queue by 1144 * the host controller. This queue is the processed by software. 1145 * Unfortunately the queue contains the physical address of the TD 1146 * and we have no simple way to translate this back to a kernel address. 1147 * To make the translation possible (and fast) we use a hash table of 1148 * TDs currently in the schedule. The physical address is used as the 1149 * hash value. 1150 */ 1151 1152 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1153 /* Called at splusb() */ 1154 void 1155 ohci_hash_add_td(sc, std) 1156 ohci_softc_t *sc; 1157 ohci_soft_td_t *std; 1158 { 1159 int h = HASH(std->physaddr); 1160 1161 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1162 } 1163 1164 /* Called at splusb() */ 1165 void 1166 ohci_hash_rem_td(sc, std) 1167 ohci_softc_t *sc; 1168 ohci_soft_td_t *std; 1169 { 1170 LIST_REMOVE(std, hnext); 1171 } 1172 1173 ohci_soft_td_t * 1174 ohci_hash_find_td(sc, a) 1175 ohci_softc_t *sc; 1176 ohci_physaddr_t a; 1177 { 1178 int h = HASH(a); 1179 ohci_soft_td_t *std; 1180 1181 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1182 std != 0; 1183 std = LIST_NEXT(std, hnext)) 1184 if (std->physaddr == a) 1185 return (std); 1186 panic("ohci_hash_find_td: addr 0x%08lx not found\n", (u_long)a); 1187 } 1188 1189 void 1190 ohci_timeout(addr) 1191 void *addr; 1192 { 1193 #if 0 1194 usbd_request_handle *reqh = addr; 1195 int s; 1196 1197 DPRINTF(("ohci_timeout: reqh=%p\n", reqh)); 1198 s = splusb(); 1199 /* XXX need to inactivate TD before calling interrupt routine */ 1200 ohci_XXX_done(reqh); 1201 splx(s); 1202 #endif 1203 } 1204 1205 #ifdef USB_DEBUG 1206 void 1207 ohci_dump_tds(std) 1208 ohci_soft_td_t *std; 1209 { 1210 for (; std; std = std->nexttd) 1211 ohci_dump_td(std); 1212 } 1213 1214 void 1215 ohci_dump_td(std) 1216 ohci_soft_td_t *std; 1217 { 1218 printf("TD(%p) at %08lx: %b delay=%d ec=%d cc=%d\ncbp=0x%08lx " 1219 "nexttd=0x%08lx be=0x%08lx\n", 1220 std, (u_long)std->physaddr, 1221 (u_long)LE(std->td->td_flags), 1222 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 1223 OHCI_TD_GET_DI(LE(std->td->td_flags)), 1224 OHCI_TD_GET_EC(LE(std->td->td_flags)), 1225 OHCI_TD_GET_CC(LE(std->td->td_flags)), 1226 (u_long)LE(std->td->td_cbp), 1227 (u_long)LE(std->td->td_nexttd), (u_long)LE(std->td->td_be)); 1228 } 1229 1230 void 1231 ohci_dump_ed(sed) 1232 ohci_soft_ed_t *sed; 1233 { 1234 printf("ED(%p) at %08lx: addr=%d endpt=%d maxp=%d %b\ntailp=0x%08lx " 1235 "headp=%b nexted=0x%08lx\n", 1236 sed, (u_long)sed->physaddr, 1237 OHCI_ED_GET_FA(LE(sed->ed->ed_flags)), 1238 OHCI_ED_GET_EN(LE(sed->ed->ed_flags)), 1239 OHCI_ED_GET_MAXP(LE(sed->ed->ed_flags)), 1240 (u_long)LE(sed->ed->ed_flags), 1241 "\20\14OUT\15IN\16LOWSPEED\17SKIP\18ISO", 1242 (u_long)LE(sed->ed->ed_tailp), 1243 (u_long)LE(sed->ed->ed_headp), "\20\1HALT\2CARRY", 1244 (u_long)LE(sed->ed->ed_nexted)); 1245 } 1246 #endif 1247 1248 usbd_status 1249 ohci_open(pipe) 1250 usbd_pipe_handle pipe; 1251 { 1252 usbd_device_handle dev = pipe->device; 1253 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1254 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1255 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1256 u_int8_t addr = dev->address; 1257 ohci_soft_ed_t *sed; 1258 ohci_soft_td_t *std; 1259 usbd_status r; 1260 int s; 1261 1262 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1263 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1264 if (addr == sc->sc_addr) { 1265 switch (ed->bEndpointAddress) { 1266 case USB_CONTROL_ENDPOINT: 1267 pipe->methods = &ohci_root_ctrl_methods; 1268 break; 1269 case UE_IN | OHCI_INTR_ENDPT: 1270 pipe->methods = &ohci_root_intr_methods; 1271 break; 1272 default: 1273 return (USBD_INVAL); 1274 } 1275 } else { 1276 sed = ohci_alloc_sed(sc); 1277 if (sed == 0) 1278 goto bad0; 1279 std = ohci_alloc_std(sc); 1280 if (std == 0) 1281 goto bad1; 1282 opipe->sed = sed; 1283 opipe->tail = std; 1284 sed->ed->ed_flags = LE( 1285 OHCI_ED_SET_FA(addr) | 1286 OHCI_ED_SET_EN(ed->bEndpointAddress) | 1287 OHCI_ED_DIR_TD | 1288 (dev->lowspeed ? OHCI_ED_SPEED : 0) | 1289 ((ed->bmAttributes & UE_XFERTYPE) == UE_ISOCHRONOUS ? 1290 OHCI_ED_FORMAT_ISO : OHCI_ED_FORMAT_GEN) | 1291 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 1292 sed->ed->ed_headp = sed->ed->ed_tailp = LE(std->physaddr); 1293 1294 switch (ed->bmAttributes & UE_XFERTYPE) { 1295 case UE_CONTROL: 1296 pipe->methods = &ohci_device_ctrl_methods; 1297 r = usb_allocmem(sc->sc_dmatag, 1298 sizeof(usb_device_request_t), 1299 0, &opipe->u.ctl.reqdma); 1300 if (r != USBD_NORMAL_COMPLETION) 1301 goto bad; 1302 s = splusb(); 1303 ohci_add_ed(sed, sc->sc_ctrl_head); 1304 splx(s); 1305 break; 1306 case UE_INTERRUPT: 1307 pipe->methods = &ohci_device_intr_methods; 1308 return (ohci_device_setintr(sc, opipe, ed->bInterval)); 1309 case UE_ISOCHRONOUS: 1310 printf("ohci_open: open iso unimplemented\n"); 1311 return (USBD_XXX); 1312 case UE_BULK: 1313 pipe->methods = &ohci_device_bulk_methods; 1314 s = splusb(); 1315 ohci_add_ed(sed, sc->sc_bulk_head); 1316 splx(s); 1317 break; 1318 } 1319 } 1320 return (USBD_NORMAL_COMPLETION); 1321 1322 bad: 1323 ohci_free_std(sc, std); 1324 bad1: 1325 ohci_free_sed(sc, sed); 1326 bad0: 1327 return (USBD_NOMEM); 1328 1329 } 1330 1331 /* 1332 * Data structures and routines to emulate the root hub. 1333 */ 1334 usb_device_descriptor_t ohci_devd = { 1335 USB_DEVICE_DESCRIPTOR_SIZE, 1336 UDESC_DEVICE, /* type */ 1337 {0x00, 0x01}, /* USB version */ 1338 UCLASS_HUB, /* class */ 1339 USUBCLASS_HUB, /* subclass */ 1340 0, /* protocol */ 1341 64, /* max packet */ 1342 {0},{0},{0x00,0x01}, /* device id */ 1343 1,2,0, /* string indicies */ 1344 1 /* # of configurations */ 1345 }; 1346 1347 usb_config_descriptor_t ohci_confd = { 1348 USB_CONFIG_DESCRIPTOR_SIZE, 1349 UDESC_CONFIG, 1350 {USB_CONFIG_DESCRIPTOR_SIZE + 1351 USB_INTERFACE_DESCRIPTOR_SIZE + 1352 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1353 1, 1354 1, 1355 0, 1356 UC_SELF_POWERED, 1357 0 /* max power */ 1358 }; 1359 1360 usb_interface_descriptor_t ohci_ifcd = { 1361 USB_INTERFACE_DESCRIPTOR_SIZE, 1362 UDESC_INTERFACE, 1363 0, 1364 0, 1365 1, 1366 UCLASS_HUB, 1367 USUBCLASS_HUB, 1368 0, 1369 0 1370 }; 1371 1372 usb_endpoint_descriptor_t ohci_endpd = { 1373 USB_ENDPOINT_DESCRIPTOR_SIZE, 1374 UDESC_ENDPOINT, 1375 UE_IN | OHCI_INTR_ENDPT, 1376 UE_INTERRUPT, 1377 {8, 0}, /* max packet */ 1378 255 1379 }; 1380 1381 usb_hub_descriptor_t ohci_hubd = { 1382 USB_HUB_DESCRIPTOR_SIZE, 1383 UDESC_HUB, 1384 0, 1385 {0,0}, 1386 0, 1387 0, 1388 {0}, 1389 }; 1390 1391 int 1392 ohci_str(p, l, s) 1393 usb_string_descriptor_t *p; 1394 int l; 1395 char *s; 1396 { 1397 int i; 1398 1399 if (l == 0) 1400 return (0); 1401 p->bLength = 2 * strlen(s) + 2; 1402 if (l == 1) 1403 return (1); 1404 p->bDescriptorType = UDESC_STRING; 1405 l -= 2; 1406 for (i = 0; s[i] && l > 1; i++, l -= 2) 1407 USETW2(p->bString[i], 0, s[i]); 1408 return (2*i+2); 1409 } 1410 1411 /* 1412 * Simulate a hardware hub by handling all the necessary requests. 1413 */ 1414 usbd_status 1415 ohci_root_ctrl_transfer(reqh) 1416 usbd_request_handle reqh; 1417 { 1418 int s; 1419 usbd_status r; 1420 1421 s = splusb(); 1422 r = usb_insert_transfer(reqh); 1423 splx(s); 1424 if (r != USBD_NORMAL_COMPLETION) 1425 return (r); 1426 else 1427 return (ohci_root_ctrl_start(reqh)); 1428 } 1429 1430 usbd_status 1431 ohci_root_ctrl_start(reqh) 1432 usbd_request_handle reqh; 1433 { 1434 ohci_softc_t *sc = (ohci_softc_t *)reqh->pipe->device->bus; 1435 usb_device_request_t *req; 1436 void *buf; 1437 int port, i; 1438 int len, value, index, l, totlen = 0; 1439 usb_port_status_t ps; 1440 usb_hub_descriptor_t hubd; 1441 usbd_status r; 1442 u_int32_t v; 1443 1444 if (!reqh->isreq) 1445 /* XXX panic */ 1446 return (USBD_INVAL); 1447 req = &reqh->request; 1448 buf = reqh->buffer; 1449 1450 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 1451 req->bmRequestType, req->bRequest)); 1452 1453 len = UGETW(req->wLength); 1454 value = UGETW(req->wValue); 1455 index = UGETW(req->wIndex); 1456 #define C(x,y) ((x) | ((y) << 8)) 1457 switch(C(req->bRequest, req->bmRequestType)) { 1458 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 1459 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 1460 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 1461 /* 1462 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 1463 * for the integrated root hub. 1464 */ 1465 break; 1466 case C(UR_GET_CONFIG, UT_READ_DEVICE): 1467 if (len > 0) { 1468 *(u_int8_t *)buf = sc->sc_conf; 1469 totlen = 1; 1470 } 1471 break; 1472 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 1473 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 1474 switch(value >> 8) { 1475 case UDESC_DEVICE: 1476 if ((value & 0xff) != 0) { 1477 r = USBD_IOERROR; 1478 goto ret; 1479 } 1480 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1481 memcpy(buf, &ohci_devd, l); 1482 break; 1483 case UDESC_CONFIG: 1484 if ((value & 0xff) != 0) { 1485 r = USBD_IOERROR; 1486 goto ret; 1487 } 1488 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 1489 memcpy(buf, &ohci_confd, l); 1490 buf = (char *)buf + l; 1491 len -= l; 1492 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 1493 totlen += l; 1494 memcpy(buf, &ohci_ifcd, l); 1495 buf = (char *)buf + l; 1496 len -= l; 1497 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 1498 totlen += l; 1499 memcpy(buf, &ohci_endpd, l); 1500 break; 1501 case UDESC_STRING: 1502 if (len == 0) 1503 break; 1504 *(u_int8_t *)buf = 0; 1505 totlen = 1; 1506 switch (value & 0xff) { 1507 case 1: /* Vendor */ 1508 totlen = ohci_str(buf, len, sc->sc_vendor); 1509 break; 1510 case 2: /* Product */ 1511 totlen = ohci_str(buf, len, "OHCI root hub"); 1512 break; 1513 } 1514 break; 1515 default: 1516 r = USBD_IOERROR; 1517 goto ret; 1518 } 1519 break; 1520 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 1521 if (len > 0) { 1522 *(u_int8_t *)buf = 0; 1523 totlen = 1; 1524 } 1525 break; 1526 case C(UR_GET_STATUS, UT_READ_DEVICE): 1527 if (len > 1) { 1528 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 1529 totlen = 2; 1530 } 1531 break; 1532 case C(UR_GET_STATUS, UT_READ_INTERFACE): 1533 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 1534 if (len > 1) { 1535 USETW(((usb_status_t *)buf)->wStatus, 0); 1536 totlen = 2; 1537 } 1538 break; 1539 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 1540 if (value >= USB_MAX_DEVICES) { 1541 r = USBD_IOERROR; 1542 goto ret; 1543 } 1544 sc->sc_addr = value; 1545 break; 1546 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 1547 if (value != 0 && value != 1) { 1548 r = USBD_IOERROR; 1549 goto ret; 1550 } 1551 sc->sc_conf = value; 1552 break; 1553 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 1554 break; 1555 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 1556 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 1557 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 1558 r = USBD_IOERROR; 1559 goto ret; 1560 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 1561 break; 1562 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 1563 break; 1564 /* Hub requests */ 1565 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 1566 break; 1567 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 1568 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 1569 "port=%d feature=%d\n", 1570 index, value)); 1571 if (index < 1 || index > sc->sc_noport) { 1572 r = USBD_IOERROR; 1573 goto ret; 1574 } 1575 port = OHCI_RH_PORT_STATUS(index); 1576 switch(value) { 1577 case UHF_PORT_ENABLE: 1578 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 1579 break; 1580 case UHF_PORT_SUSPEND: 1581 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 1582 break; 1583 case UHF_PORT_POWER: 1584 OWRITE4(sc, port, UPS_LOW_SPEED); 1585 break; 1586 case UHF_C_PORT_CONNECTION: 1587 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 1588 break; 1589 case UHF_C_PORT_ENABLE: 1590 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 1591 break; 1592 case UHF_C_PORT_SUSPEND: 1593 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 1594 break; 1595 case UHF_C_PORT_OVER_CURRENT: 1596 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 1597 break; 1598 case UHF_C_PORT_RESET: 1599 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 1600 break; 1601 default: 1602 r = USBD_IOERROR; 1603 goto ret; 1604 } 1605 switch(value) { 1606 case UHF_C_PORT_CONNECTION: 1607 case UHF_C_PORT_ENABLE: 1608 case UHF_C_PORT_SUSPEND: 1609 case UHF_C_PORT_OVER_CURRENT: 1610 case UHF_C_PORT_RESET: 1611 /* Enable RHSC interrupt if condition is cleared. */ 1612 if ((OREAD4(sc, port) >> 16) == 0) 1613 ohci_rhsc_able(sc, 1); 1614 break; 1615 default: 1616 break; 1617 } 1618 break; 1619 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 1620 if (value != 0) { 1621 r = USBD_IOERROR; 1622 goto ret; 1623 } 1624 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 1625 hubd = ohci_hubd; 1626 hubd.bNbrPorts = sc->sc_noport; 1627 USETW(hubd.wHubCharacteristics, 1628 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 1629 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 1630 /* XXX overcurrent */ 1631 ); 1632 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 1633 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 1634 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 1635 hubd.DeviceRemovable[i++] = (u_int8_t)v; 1636 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 1637 l = min(len, hubd.bDescLength); 1638 totlen = l; 1639 memcpy(buf, &hubd, l); 1640 break; 1641 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 1642 if (len != 4) { 1643 r = USBD_IOERROR; 1644 goto ret; 1645 } 1646 memset(buf, 0, len); /* ? XXX */ 1647 totlen = len; 1648 break; 1649 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 1650 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 1651 index)); 1652 if (index < 1 || index > sc->sc_noport) { 1653 r = USBD_IOERROR; 1654 goto ret; 1655 } 1656 if (len != 4) { 1657 r = USBD_IOERROR; 1658 goto ret; 1659 } 1660 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 1661 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 1662 v)); 1663 USETW(ps.wPortStatus, v); 1664 USETW(ps.wPortChange, v >> 16); 1665 l = min(len, sizeof ps); 1666 memcpy(buf, &ps, l); 1667 totlen = l; 1668 break; 1669 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 1670 r = USBD_IOERROR; 1671 goto ret; 1672 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 1673 break; 1674 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 1675 if (index < 1 || index > sc->sc_noport) { 1676 r = USBD_IOERROR; 1677 goto ret; 1678 } 1679 port = OHCI_RH_PORT_STATUS(index); 1680 switch(value) { 1681 case UHF_PORT_ENABLE: 1682 OWRITE4(sc, port, UPS_PORT_ENABLED); 1683 break; 1684 case UHF_PORT_SUSPEND: 1685 OWRITE4(sc, port, UPS_SUSPEND); 1686 break; 1687 case UHF_PORT_RESET: 1688 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 1689 index)); 1690 OWRITE4(sc, port, UPS_RESET); 1691 for (i = 0; i < 10; i++) { 1692 usb_delay_ms(&sc->sc_bus, 10); 1693 if ((OREAD4(sc, port) & UPS_RESET) == 0) 1694 break; 1695 } 1696 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 1697 index, OREAD4(sc, port))); 1698 break; 1699 case UHF_PORT_POWER: 1700 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 1701 "%d\n", index)); 1702 OWRITE4(sc, port, UPS_PORT_POWER); 1703 break; 1704 default: 1705 r = USBD_IOERROR; 1706 goto ret; 1707 } 1708 break; 1709 default: 1710 r = USBD_IOERROR; 1711 goto ret; 1712 } 1713 reqh->actlen = totlen; 1714 r = USBD_NORMAL_COMPLETION; 1715 ret: 1716 reqh->status = r; 1717 reqh->xfercb(reqh); 1718 usb_start_next(reqh->pipe); 1719 return (USBD_IN_PROGRESS); 1720 } 1721 1722 /* Abort a root control request. */ 1723 void 1724 ohci_root_ctrl_abort(reqh) 1725 usbd_request_handle reqh; 1726 { 1727 /* Nothing to do, all transfers are synchronous. */ 1728 } 1729 1730 /* Close the root pipe. */ 1731 void 1732 ohci_root_ctrl_close(pipe) 1733 usbd_pipe_handle pipe; 1734 { 1735 DPRINTF(("ohci_root_ctrl_close\n")); 1736 } 1737 1738 usbd_status 1739 ohci_root_intr_transfer(reqh) 1740 usbd_request_handle reqh; 1741 { 1742 int s; 1743 usbd_status r; 1744 1745 s = splusb(); 1746 r = usb_insert_transfer(reqh); 1747 splx(s); 1748 if (r != USBD_NORMAL_COMPLETION) 1749 return (r); 1750 else 1751 return (ohci_root_intr_start(reqh)); 1752 } 1753 1754 usbd_status 1755 ohci_root_intr_start(reqh) 1756 usbd_request_handle reqh; 1757 { 1758 usbd_pipe_handle pipe = reqh->pipe; 1759 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 1760 struct ohci_pipe *upipe = (struct ohci_pipe *)pipe; 1761 usb_dma_t *dmap; 1762 usbd_status r; 1763 int len; 1764 1765 len = reqh->length; 1766 dmap = &upipe->u.intr.datadma; 1767 if (len == 0) 1768 return (USBD_INVAL); /* XXX should it be? */ 1769 1770 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap); 1771 if (r != USBD_NORMAL_COMPLETION) 1772 return (r); 1773 sc->sc_intrreqh = reqh; 1774 1775 return (USBD_IN_PROGRESS); 1776 } 1777 1778 /* Abort a root interrupt request. */ 1779 void 1780 ohci_root_intr_abort(reqh) 1781 usbd_request_handle reqh; 1782 { 1783 /* No need to abort. */ 1784 } 1785 1786 /* Close the root pipe. */ 1787 void 1788 ohci_root_intr_close(pipe) 1789 usbd_pipe_handle pipe; 1790 { 1791 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 1792 sc->sc_intrreqh = 0; 1793 1794 DPRINTF(("ohci_root_intr_close\n")); 1795 } 1796 1797 /************************/ 1798 1799 usbd_status 1800 ohci_device_ctrl_transfer(reqh) 1801 usbd_request_handle reqh; 1802 { 1803 int s; 1804 usbd_status r; 1805 1806 s = splusb(); 1807 r = usb_insert_transfer(reqh); 1808 splx(s); 1809 if (r != USBD_NORMAL_COMPLETION) 1810 return (r); 1811 else 1812 return (ohci_device_ctrl_start(reqh)); 1813 } 1814 1815 usbd_status 1816 ohci_device_ctrl_start(reqh) 1817 usbd_request_handle reqh; 1818 { 1819 ohci_softc_t *sc = (ohci_softc_t *)reqh->pipe->device->bus; 1820 usbd_status r; 1821 1822 if (!reqh->isreq) { 1823 /* XXX panic */ 1824 printf("ohci_device_ctrl_transfer: not a request\n"); 1825 return (USBD_INVAL); 1826 } 1827 1828 r = ohci_device_request(reqh); 1829 if (r != USBD_NORMAL_COMPLETION) 1830 return (r); 1831 1832 if (sc->sc_bus.use_polling) 1833 ohci_waitintr(sc, reqh); 1834 return (USBD_IN_PROGRESS); 1835 } 1836 1837 /* Abort a device control request. */ 1838 void 1839 ohci_device_ctrl_abort(reqh) 1840 usbd_request_handle reqh; 1841 { 1842 /* XXX inactivate */ 1843 usb_delay_ms(reqh->pipe->device->bus, 1); /* make sure it is donw */ 1844 /* XXX call done */ 1845 } 1846 1847 /* Close a device control pipe. */ 1848 void 1849 ohci_device_ctrl_close(pipe) 1850 usbd_pipe_handle pipe; 1851 { 1852 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1853 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 1854 ohci_soft_ed_t *sed = opipe->sed; 1855 int s; 1856 1857 s = splusb(); 1858 sed->ed->ed_flags |= LE(OHCI_ED_SKIP); 1859 if ((LE(sed->ed->ed_tailp) & OHCI_TAILMASK) != LE(sed->ed->ed_headp)) 1860 usb_delay_ms(&sc->sc_bus, 2); 1861 ohci_rem_ed(sed, sc->sc_ctrl_head); 1862 splx(s); 1863 ohci_free_std(sc, opipe->tail); 1864 ohci_free_sed(sc, opipe->sed); 1865 /* XXX free other resources */ 1866 } 1867 1868 /************************/ 1869 1870 usbd_status 1871 ohci_device_bulk_transfer(reqh) 1872 usbd_request_handle reqh; 1873 { 1874 int s; 1875 usbd_status r; 1876 1877 s = splusb(); 1878 r = usb_insert_transfer(reqh); 1879 splx(s); 1880 if (r != USBD_NORMAL_COMPLETION) 1881 return (r); 1882 else 1883 return (ohci_device_bulk_start(reqh)); 1884 } 1885 1886 usbd_status 1887 ohci_device_bulk_start(reqh) 1888 usbd_request_handle reqh; 1889 { 1890 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe; 1891 usbd_device_handle dev = opipe->pipe.device; 1892 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1893 int addr = dev->address; 1894 ohci_soft_td_t *xfer, *tail; 1895 ohci_soft_ed_t *sed; 1896 usb_dma_t *dmap; 1897 usbd_status r; 1898 int s, len, isread; 1899 1900 if (reqh->isreq) { 1901 /* XXX panic */ 1902 printf("ohci_device_bulk_transfer: a request\n"); 1903 return (USBD_INVAL); 1904 } 1905 1906 len = reqh->length; 1907 dmap = &opipe->u.bulk.datadma; 1908 isread = reqh->pipe->endpoint->edesc->bEndpointAddress & UE_IN; 1909 sed = opipe->sed; 1910 1911 opipe->u.bulk.length = len; 1912 1913 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap); 1914 if (r != USBD_NORMAL_COMPLETION) 1915 goto ret1; 1916 1917 tail = ohci_alloc_std(sc); 1918 if (!tail) { 1919 r = USBD_NOMEM; 1920 goto ret2; 1921 } 1922 tail->reqh = 0; 1923 1924 /* Update device address */ 1925 sed->ed->ed_flags = LE( 1926 (LE(sed->ed->ed_flags) & ~OHCI_ED_ADDRMASK) | 1927 OHCI_ED_SET_FA(addr)); 1928 1929 /* Set up data transaction */ 1930 xfer = opipe->tail; 1931 xfer->td->td_flags = LE( 1932 (isread ? OHCI_TD_IN : OHCI_TD_OUT) | OHCI_TD_NOCC | 1933 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY | 1934 (reqh->flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0)); 1935 xfer->td->td_cbp = LE(DMAADDR(dmap)); 1936 xfer->nexttd = tail; 1937 xfer->td->td_nexttd = LE(tail->physaddr); 1938 xfer->td->td_be = LE(LE(xfer->td->td_cbp) + len - 1); 1939 xfer->len = len; 1940 xfer->reqh = reqh; 1941 1942 reqh->hcpriv = xfer; 1943 1944 if (!isread) 1945 memcpy(KERNADDR(dmap), reqh->buffer, len); 1946 1947 /* Insert ED in schedule */ 1948 s = splusb(); 1949 ohci_hash_add_td(sc, xfer); 1950 sed->ed->ed_tailp = LE(tail->physaddr); 1951 opipe->tail = tail; 1952 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 1953 if (reqh->timeout && !sc->sc_bus.use_polling) { 1954 usb_timeout(ohci_timeout, reqh, 1955 MS_TO_TICKS(reqh->timeout), reqh->timo_handle); 1956 } 1957 splx(s); 1958 1959 return (USBD_IN_PROGRESS); 1960 1961 ret2: 1962 usb_freemem(sc->sc_dmatag, dmap); 1963 ret1: 1964 return (r); 1965 } 1966 1967 /* Abort a device bulk request. */ 1968 void 1969 ohci_device_bulk_abort(reqh) 1970 usbd_request_handle reqh; 1971 { 1972 #if 0 1973 sed->ed->ed_flags |= LE(OHCI_ED_SKIP); 1974 if ((LE(sed->ed->ed_tailp) & OHCI_TAILMASK) != LE(sed->ed->ed_headp)) 1975 usb_delay_ms(reqh->pipe->device->bus, 2); 1976 #endif 1977 /* XXX inactivate */ 1978 usb_delay_ms(reqh->pipe->device->bus, 1); /* make sure it is done */ 1979 /* XXX call done */ 1980 } 1981 1982 /* Close a device bulk pipe. */ 1983 void 1984 ohci_device_bulk_close(pipe) 1985 usbd_pipe_handle pipe; 1986 { 1987 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1988 usbd_device_handle dev = opipe->pipe.device; 1989 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1990 int s; 1991 1992 s = splusb(); 1993 ohci_rem_ed(opipe->sed, sc->sc_bulk_head); 1994 splx(s); 1995 ohci_free_std(sc, opipe->tail); 1996 ohci_free_sed(sc, opipe->sed); 1997 /* XXX free other resources */ 1998 } 1999 2000 /************************/ 2001 2002 usbd_status 2003 ohci_device_intr_transfer(reqh) 2004 usbd_request_handle reqh; 2005 { 2006 int s; 2007 usbd_status r; 2008 2009 s = splusb(); 2010 r = usb_insert_transfer(reqh); 2011 splx(s); 2012 if (r != USBD_NORMAL_COMPLETION) 2013 return (r); 2014 else 2015 return (ohci_device_intr_start(reqh)); 2016 } 2017 2018 usbd_status 2019 ohci_device_intr_start(reqh) 2020 usbd_request_handle reqh; 2021 { 2022 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe; 2023 usbd_device_handle dev = opipe->pipe.device; 2024 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2025 ohci_soft_ed_t *sed = opipe->sed; 2026 ohci_soft_td_t *xfer, *tail; 2027 usb_dma_t *dmap; 2028 usbd_status r; 2029 int len; 2030 int s; 2031 2032 DPRINTFN(3, ("ohci_device_intr_transfer: reqh=%p buf=%p len=%d " 2033 "flags=%d priv=%p\n", 2034 reqh, reqh->buffer, reqh->length, reqh->flags, reqh->priv)); 2035 2036 if (reqh->isreq) 2037 panic("ohci_device_intr_transfer: a request\n"); 2038 2039 len = reqh->length; 2040 dmap = &opipe->u.intr.datadma; 2041 if (len == 0) 2042 return (USBD_INVAL); /* XXX should it be? */ 2043 2044 xfer = opipe->tail; 2045 tail = ohci_alloc_std(sc); 2046 if (!tail) { 2047 r = USBD_NOMEM; 2048 goto ret1; 2049 } 2050 tail->reqh = 0; 2051 2052 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap); 2053 if (r != USBD_NORMAL_COMPLETION) 2054 goto ret2; 2055 2056 xfer->td->td_flags = LE( 2057 OHCI_TD_IN | OHCI_TD_NOCC | 2058 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 2059 if (reqh->flags & USBD_SHORT_XFER_OK) 2060 xfer->td->td_flags |= LE(OHCI_TD_R); 2061 xfer->td->td_cbp = LE(DMAADDR(dmap)); 2062 xfer->nexttd = tail; 2063 xfer->td->td_nexttd = LE(tail->physaddr); 2064 xfer->td->td_be = LE(LE(xfer->td->td_cbp) + len - 1); 2065 xfer->len = len; 2066 xfer->reqh = reqh; 2067 2068 reqh->hcpriv = xfer; 2069 2070 #if USB_DEBUG 2071 if (ohcidebug > 5) { 2072 printf("ohci_device_intr_transfer:\n"); 2073 ohci_dump_ed(sed); 2074 ohci_dump_tds(xfer); 2075 } 2076 #endif 2077 2078 /* Insert ED in schedule */ 2079 s = splusb(); 2080 ohci_hash_add_td(sc, xfer); 2081 sed->ed->ed_tailp = LE(tail->physaddr); 2082 opipe->tail = tail; 2083 #if 0 2084 if (reqh->timeout && !sc->sc_bus.use_polling) { 2085 usb_timeout(ohci_timeout, reqh, 2086 MS_TO_TICKS(reqh->timeout), reqh->timo_handle); 2087 } 2088 #endif 2089 sed->ed->ed_flags &= LE(~OHCI_ED_SKIP); 2090 splx(s); 2091 2092 #ifdef USB_DEBUG 2093 if (ohcidebug > 5) { 2094 delay(5000); 2095 printf("ohci_device_intr_transfer: status=%x\n", 2096 OREAD4(sc, OHCI_COMMAND_STATUS)); 2097 ohci_dump_ed(sed); 2098 ohci_dump_tds(xfer); 2099 } 2100 #endif 2101 2102 return (USBD_IN_PROGRESS); 2103 2104 ret2: 2105 ohci_free_std(sc, xfer); 2106 ret1: 2107 return (r); 2108 } 2109 2110 /* Abort a device control request. */ 2111 void 2112 ohci_device_intr_abort(reqh) 2113 usbd_request_handle reqh; 2114 { 2115 /* XXX inactivate */ 2116 usb_delay_ms(reqh->pipe->device->bus, 1); /* make sure it is done */ 2117 if (reqh->pipe->intrreqh == reqh) { 2118 DPRINTF(("ohci_device_intr_abort: remove\n")); 2119 reqh->pipe->intrreqh = 0; 2120 ohci_intr_done((ohci_softc_t *)reqh->pipe->device->bus, reqh); 2121 } 2122 } 2123 2124 /* Close a device interrupt pipe. */ 2125 void 2126 ohci_device_intr_close(pipe) 2127 usbd_pipe_handle pipe; 2128 { 2129 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2130 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2131 int nslots = opipe->u.intr.nslots; 2132 int pos = opipe->u.intr.pos; 2133 int j; 2134 ohci_soft_ed_t *p, *sed = opipe->sed; 2135 int s; 2136 2137 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 2138 pipe, nslots, pos)); 2139 s = splusb(); 2140 sed->ed->ed_flags |= LE(OHCI_ED_SKIP); 2141 if ((sed->ed->ed_tailp & LE(OHCI_TAILMASK)) != sed->ed->ed_headp) 2142 usb_delay_ms(&sc->sc_bus, 2); 2143 2144 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 2145 ; 2146 if (!p) 2147 panic("ohci_device_intr_close: ED not found\n"); 2148 p->next = sed->next; 2149 p->ed->ed_nexted = sed->ed->ed_nexted; 2150 splx(s); 2151 2152 for (j = 0; j < nslots; j++) 2153 --sc->sc_bws[pos * nslots + j]; 2154 2155 ohci_free_std(sc, opipe->tail); 2156 ohci_free_sed(sc, opipe->sed); 2157 /* XXX free other resources */ 2158 } 2159 2160 usbd_status 2161 ohci_device_setintr(sc, opipe, ival) 2162 ohci_softc_t *sc; 2163 struct ohci_pipe *opipe; 2164 int ival; 2165 { 2166 int i, j, s, best; 2167 u_int npoll, slow, shigh, nslots; 2168 u_int bestbw, bw; 2169 ohci_soft_ed_t *hsed, *sed = opipe->sed; 2170 2171 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 2172 if (ival == 0) { 2173 printf("ohci_setintr: 0 interval\n"); 2174 return (USBD_INVAL); 2175 } 2176 2177 npoll = OHCI_NO_INTRS; 2178 while (npoll > ival) 2179 npoll /= 2; 2180 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 2181 2182 /* 2183 * We now know which level in the tree the ED must go into. 2184 * Figure out which slot has most bandwidth left over. 2185 * Slots to examine: 2186 * npoll 2187 * 1 0 2188 * 2 1 2 2189 * 4 3 4 5 6 2190 * 8 7 8 9 10 11 12 13 14 2191 * N (N-1) .. (N-1+N-1) 2192 */ 2193 slow = npoll-1; 2194 shigh = slow + npoll; 2195 nslots = OHCI_NO_INTRS / npoll; 2196 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 2197 bw = 0; 2198 for (j = 0; j < nslots; j++) 2199 bw += sc->sc_bws[i * nslots + j]; 2200 if (bw < bestbw) { 2201 best = i; 2202 bestbw = bw; 2203 } 2204 } 2205 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 2206 best, slow, shigh, bestbw)); 2207 2208 s = splusb(); 2209 hsed = sc->sc_eds[best]; 2210 sed->next = hsed->next; 2211 sed->ed->ed_nexted = hsed->ed->ed_nexted; 2212 hsed->next = sed; 2213 hsed->ed->ed_nexted = LE(sed->physaddr); 2214 splx(s); 2215 2216 for (j = 0; j < nslots; j++) 2217 ++sc->sc_bws[best * nslots + j]; 2218 opipe->u.intr.nslots = nslots; 2219 opipe->u.intr.pos = best; 2220 2221 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 2222 return (USBD_NORMAL_COMPLETION); 2223 } 2224 2225
Indexes created Fri Sep 26 08:10:20 GMT 2025