ohci.c revision 1.254.2.19
1 /* $NetBSD: ohci.c,v 1.254.2.19 2015/03/19 17:26:43 skrll Exp $ */ 2 3 /* 4 * Copyright (c) 1998, 2004, 2005, 2012 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net) at 9 * Carlstedt Research & Technology, Jared D. McNeill (jmcneill (at) invisible.ca) 10 * and Matthew R. Green (mrg (at) eterna.com.au). 11 * This code is derived from software contributed to The NetBSD Foundation 12 * by Charles M. Hannum. 13 * 14 * Redistribution and use in source and binary forms, with or without 15 * modification, are permitted provided that the following conditions 16 * are met: 17 * 1. Redistributions of source code must retain the above copyright 18 * notice, this list of conditions and the following disclaimer. 19 * 2. Redistributions in binary form must reproduce the above copyright 20 * notice, this list of conditions and the following disclaimer in the 21 * documentation and/or other materials provided with the distribution. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 24 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 25 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 26 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 27 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 31 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 32 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 33 * POSSIBILITY OF SUCH DAMAGE. 34 */ 35 36 /* 37 * USB Open Host Controller driver. 38 * 39 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html 40 * USB spec: http://www.usb.org/developers/docs/ 41 */ 42 43 #include <sys/cdefs.h> 44 __KERNEL_RCSID(0, "$NetBSD: ohci.c,v 1.254.2.19 2015/03/19 17:26:43 skrll Exp $"); 45 46 #include "opt_usb.h" 47 48 #include <sys/param.h> 49 50 #include <sys/cpu.h> 51 #include <sys/device.h> 52 #include <sys/kernel.h> 53 #include <sys/kmem.h> 54 #include <sys/proc.h> 55 #include <sys/queue.h> 56 #include <sys/select.h> 57 #include <sys/sysctl.h> 58 #include <sys/systm.h> 59 60 #include <machine/endian.h> 61 62 #include <dev/usb/usb.h> 63 #include <dev/usb/usbdi.h> 64 #include <dev/usb/usbdivar.h> 65 #include <dev/usb/usb_mem.h> 66 #include <dev/usb/usb_quirks.h> 67 68 #include <dev/usb/ohcireg.h> 69 #include <dev/usb/ohcivar.h> 70 #include <dev/usb/usbroothub.h> 71 #include <dev/usb/usbhist.h> 72 73 #ifdef USB_DEBUG 74 #ifndef OHCI_DEBUG 75 #define ohcidebug 0 76 #else 77 static int ohcidebug = 0; 78 79 SYSCTL_SETUP(sysctl_hw_ohci_setup, "sysctl hw.ohci setup") 80 { 81 int err; 82 const struct sysctlnode *rnode; 83 const struct sysctlnode *cnode; 84 85 err = sysctl_createv(clog, 0, NULL, &rnode, 86 CTLFLAG_PERMANENT, CTLTYPE_NODE, "ohci", 87 SYSCTL_DESCR("ohci global controls"), 88 NULL, 0, NULL, 0, CTL_HW, CTL_CREATE, CTL_EOL); 89 90 if (err) 91 goto fail; 92 93 /* control debugging printfs */ 94 err = sysctl_createv(clog, 0, &rnode, &cnode, 95 CTLFLAG_PERMANENT|CTLFLAG_READWRITE, CTLTYPE_INT, 96 "debug", SYSCTL_DESCR("Enable debugging output"), 97 NULL, 0, &ohcidebug, sizeof(ohcidebug), CTL_CREATE, CTL_EOL); 98 if (err) 99 goto fail; 100 101 return; 102 fail: 103 aprint_error("%s: sysctl_createv failed (err = %d)\n", __func__, err); 104 } 105 106 #endif /* OHCI_DEBUG */ 107 #endif /* USB_DEBUG */ 108 109 #define DPRINTF(FMT,A,B,C,D) USBHIST_LOG(ohcidebug,FMT,A,B,C,D) 110 #define DPRINTFN(N,FMT,A,B,C,D) USBHIST_LOGN(ohcidebug,N,FMT,A,B,C,D) 111 #define OHCIHIST_FUNC() USBHIST_FUNC() 112 #define OHCIHIST_CALLED(name) USBHIST_CALLED(ohcidebug) 113 114 #if BYTE_ORDER == BIG_ENDIAN 115 #define SWAP_ENDIAN OHCI_LITTLE_ENDIAN 116 #else 117 #define SWAP_ENDIAN OHCI_BIG_ENDIAN 118 #endif 119 120 #define O16TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap16(val) : val) 121 #define O32TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap32(val) : val) 122 #define HTOO16(val) O16TOH(val) 123 #define HTOO32(val) O32TOH(val) 124 125 struct ohci_pipe; 126 127 Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *); 128 Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *); 129 130 Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *); 131 Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *); 132 133 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *); 134 Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *); 135 136 Static void ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *, 137 ohci_soft_td_t *); 138 Static usbd_status ohci_alloc_std_chain(struct ohci_pipe *, 139 ohci_softc_t *, int, int, struct usbd_xfer *, 140 ohci_soft_td_t *, ohci_soft_td_t **); 141 142 Static usbd_status ohci_open(struct usbd_pipe *); 143 Static void ohci_poll(struct usbd_bus *); 144 Static void ohci_softintr(void *); 145 Static void ohci_waitintr(ohci_softc_t *, struct usbd_xfer *); 146 Static void ohci_rhsc(ohci_softc_t *, struct usbd_xfer *); 147 Static void ohci_rhsc_softint(void *); 148 149 Static usbd_status ohci_device_request(struct usbd_xfer *xfer); 150 Static void ohci_add_ed(ohci_softc_t *, ohci_soft_ed_t *, 151 ohci_soft_ed_t *); 152 153 Static void ohci_rem_ed(ohci_softc_t *, ohci_soft_ed_t *, 154 ohci_soft_ed_t *); 155 Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *); 156 Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *); 157 Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t); 158 Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *); 159 Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *); 160 Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t); 161 162 Static usbd_status ohci_setup_isoc(struct usbd_pipe *); 163 Static void ohci_device_isoc_enter(struct usbd_xfer *); 164 165 Static struct usbd_xfer * ohci_allocx(struct usbd_bus *); 166 Static void ohci_freex(struct usbd_bus *, struct usbd_xfer *); 167 Static void ohci_get_lock(struct usbd_bus *, kmutex_t **); 168 Static int ohci_roothub_ctrl(struct usbd_bus *, 169 usb_device_request_t *, void *, int); 170 171 Static usbd_status ohci_root_intr_transfer(struct usbd_xfer *); 172 Static usbd_status ohci_root_intr_start(struct usbd_xfer *); 173 Static void ohci_root_intr_abort(struct usbd_xfer *); 174 Static void ohci_root_intr_close(struct usbd_pipe *); 175 Static void ohci_root_intr_done(struct usbd_xfer *); 176 177 Static usbd_status ohci_device_ctrl_transfer(struct usbd_xfer *); 178 Static usbd_status ohci_device_ctrl_start(struct usbd_xfer *); 179 Static void ohci_device_ctrl_abort(struct usbd_xfer *); 180 Static void ohci_device_ctrl_close(struct usbd_pipe *); 181 Static void ohci_device_ctrl_done(struct usbd_xfer *); 182 183 Static usbd_status ohci_device_bulk_transfer(struct usbd_xfer *); 184 Static usbd_status ohci_device_bulk_start(struct usbd_xfer *); 185 Static void ohci_device_bulk_abort(struct usbd_xfer *); 186 Static void ohci_device_bulk_close(struct usbd_pipe *); 187 Static void ohci_device_bulk_done(struct usbd_xfer *); 188 189 Static usbd_status ohci_device_intr_transfer(struct usbd_xfer *); 190 Static usbd_status ohci_device_intr_start(struct usbd_xfer *); 191 Static void ohci_device_intr_abort(struct usbd_xfer *); 192 Static void ohci_device_intr_close(struct usbd_pipe *); 193 Static void ohci_device_intr_done(struct usbd_xfer *); 194 195 Static usbd_status ohci_device_isoc_transfer(struct usbd_xfer *); 196 Static usbd_status ohci_device_isoc_start(struct usbd_xfer *); 197 Static void ohci_device_isoc_abort(struct usbd_xfer *); 198 Static void ohci_device_isoc_close(struct usbd_pipe *); 199 Static void ohci_device_isoc_done(struct usbd_xfer *); 200 201 Static usbd_status ohci_device_setintr(ohci_softc_t *, 202 struct ohci_pipe *, int); 203 204 Static void ohci_timeout(void *); 205 Static void ohci_timeout_task(void *); 206 Static void ohci_rhsc_enable(void *); 207 208 Static void ohci_close_pipe(struct usbd_pipe *, ohci_soft_ed_t *); 209 Static void ohci_abort_xfer(struct usbd_xfer *, usbd_status); 210 211 Static void ohci_device_clear_toggle(struct usbd_pipe *); 212 Static void ohci_noop(struct usbd_pipe *); 213 214 #ifdef OHCI_DEBUG 215 Static void ohci_dumpregs(ohci_softc_t *); 216 Static void ohci_dump_tds(ohci_softc_t *, ohci_soft_td_t *); 217 Static void ohci_dump_td(ohci_softc_t *, ohci_soft_td_t *); 218 Static void ohci_dump_ed(ohci_softc_t *, ohci_soft_ed_t *); 219 Static void ohci_dump_itd(ohci_softc_t *, ohci_soft_itd_t *); 220 Static void ohci_dump_itds(ohci_softc_t *, ohci_soft_itd_t *); 221 #endif 222 223 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 224 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 225 #define OWRITE1(sc, r, x) \ 226 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 227 #define OWRITE2(sc, r, x) \ 228 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 229 #define OWRITE4(sc, r, x) \ 230 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 231 232 static __inline uint32_t 233 OREAD4(ohci_softc_t *sc, bus_size_t r) 234 { 235 236 OBARR(sc); 237 return bus_space_read_4(sc->iot, sc->ioh, r); 238 } 239 240 /* Reverse the bits in a value 0 .. 31 */ 241 Static uint8_t revbits[OHCI_NO_INTRS] = 242 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 243 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 244 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 245 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 246 247 struct ohci_pipe { 248 struct usbd_pipe pipe; 249 ohci_soft_ed_t *sed; 250 union { 251 ohci_soft_td_t *td; 252 ohci_soft_itd_t *itd; 253 } tail; 254 /* Info needed for different pipe kinds. */ 255 union { 256 /* Control pipe */ 257 struct { 258 usb_dma_t reqdma; 259 u_int length; 260 ohci_soft_td_t *setup, *data, *stat; 261 } ctl; 262 /* Interrupt pipe */ 263 struct { 264 int nslots; 265 int pos; 266 } intr; 267 /* Bulk pipe */ 268 struct { 269 u_int length; 270 int isread; 271 } bulk; 272 /* Iso pipe */ 273 struct iso { 274 int next, inuse; 275 } iso; 276 } u; 277 }; 278 279 Static const struct usbd_bus_methods ohci_bus_methods = { 280 .ubm_open = ohci_open, 281 .ubm_softint = ohci_softintr, 282 .ubm_dopoll = ohci_poll, 283 .ubm_allocx = ohci_allocx, 284 .ubm_freex = ohci_freex, 285 .ubm_getlock = ohci_get_lock, 286 .ubm_rhctrl = ohci_roothub_ctrl, 287 }; 288 289 Static const struct usbd_pipe_methods ohci_root_intr_methods = { 290 .upm_transfer = ohci_root_intr_transfer, 291 .upm_start = ohci_root_intr_start, 292 .upm_abort = ohci_root_intr_abort, 293 .upm_close = ohci_root_intr_close, 294 .upm_cleartoggle = ohci_noop, 295 .upm_done = ohci_root_intr_done, 296 }; 297 298 Static const struct usbd_pipe_methods ohci_device_ctrl_methods = { 299 .upm_transfer = ohci_device_ctrl_transfer, 300 .upm_start = ohci_device_ctrl_start, 301 .upm_abort = ohci_device_ctrl_abort, 302 .upm_close = ohci_device_ctrl_close, 303 .upm_cleartoggle = ohci_noop, 304 .upm_done = ohci_device_ctrl_done, 305 }; 306 307 Static const struct usbd_pipe_methods ohci_device_intr_methods = { 308 .upm_transfer = ohci_device_intr_transfer, 309 .upm_start = ohci_device_intr_start, 310 .upm_abort = ohci_device_intr_abort, 311 .upm_close = ohci_device_intr_close, 312 .upm_cleartoggle = ohci_device_clear_toggle, 313 .upm_done = ohci_device_intr_done, 314 }; 315 316 Static const struct usbd_pipe_methods ohci_device_bulk_methods = { 317 .upm_transfer = ohci_device_bulk_transfer, 318 .upm_start = ohci_device_bulk_start, 319 .upm_abort = ohci_device_bulk_abort, 320 .upm_close = ohci_device_bulk_close, 321 .upm_cleartoggle = ohci_device_clear_toggle, 322 .upm_done = ohci_device_bulk_done, 323 }; 324 325 Static const struct usbd_pipe_methods ohci_device_isoc_methods = { 326 .upm_transfer = ohci_device_isoc_transfer, 327 .upm_start = ohci_device_isoc_start, 328 .upm_abort = ohci_device_isoc_abort, 329 .upm_close = ohci_device_isoc_close, 330 .upm_cleartoggle = ohci_noop, 331 .upm_done = ohci_device_isoc_done, 332 }; 333 334 int 335 ohci_activate(device_t self, enum devact act) 336 { 337 struct ohci_softc *sc = device_private(self); 338 339 switch (act) { 340 case DVACT_DEACTIVATE: 341 sc->sc_dying = 1; 342 return 0; 343 default: 344 return EOPNOTSUPP; 345 } 346 } 347 348 void 349 ohci_childdet(device_t self, device_t child) 350 { 351 struct ohci_softc *sc = device_private(self); 352 353 KASSERT(sc->sc_child == child); 354 sc->sc_child = NULL; 355 } 356 357 int 358 ohci_detach(struct ohci_softc *sc, int flags) 359 { 360 int rv = 0; 361 362 if (sc->sc_child != NULL) 363 rv = config_detach(sc->sc_child, flags); 364 365 if (rv != 0) 366 return rv; 367 368 callout_halt(&sc->sc_tmo_rhsc, &sc->sc_lock); 369 370 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 371 callout_destroy(&sc->sc_tmo_rhsc); 372 373 softint_disestablish(sc->sc_rhsc_si); 374 375 cv_destroy(&sc->sc_softwake_cv); 376 377 mutex_destroy(&sc->sc_lock); 378 mutex_destroy(&sc->sc_intr_lock); 379 380 if (sc->sc_hcca != NULL) 381 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 382 pool_cache_destroy(sc->sc_xferpool); 383 384 return rv; 385 } 386 387 ohci_soft_ed_t * 388 ohci_alloc_sed(ohci_softc_t *sc) 389 { 390 ohci_soft_ed_t *sed; 391 usbd_status err; 392 int i, offs; 393 usb_dma_t dma; 394 395 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 396 397 if (sc->sc_freeeds == NULL) { 398 DPRINTFN(2, "allocating chunk", 0, 0, 0, 0); 399 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 400 OHCI_ED_ALIGN, &dma); 401 if (err) 402 return 0; 403 for (i = 0; i < OHCI_SED_CHUNK; i++) { 404 offs = i * OHCI_SED_SIZE; 405 sed = KERNADDR(&dma, offs); 406 sed->physaddr = DMAADDR(&dma, offs); 407 sed->dma = dma; 408 sed->offs = offs; 409 sed->next = sc->sc_freeeds; 410 sc->sc_freeeds = sed; 411 } 412 } 413 sed = sc->sc_freeeds; 414 sc->sc_freeeds = sed->next; 415 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 416 sed->next = 0; 417 return sed; 418 } 419 420 void 421 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 422 { 423 sed->next = sc->sc_freeeds; 424 sc->sc_freeeds = sed; 425 } 426 427 ohci_soft_td_t * 428 ohci_alloc_std(ohci_softc_t *sc) 429 { 430 ohci_soft_td_t *std; 431 usbd_status err; 432 int i, offs; 433 usb_dma_t dma; 434 435 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 436 437 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 438 439 if (sc->sc_freetds == NULL) { 440 DPRINTFN(2, "allocating chunk", 0, 0, 0, 0); 441 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 442 OHCI_TD_ALIGN, &dma); 443 if (err) 444 return NULL; 445 for(i = 0; i < OHCI_STD_CHUNK; i++) { 446 offs = i * OHCI_STD_SIZE; 447 std = KERNADDR(&dma, offs); 448 std->physaddr = DMAADDR(&dma, offs); 449 std->dma = dma; 450 std->offs = offs; 451 std->nexttd = sc->sc_freetds; 452 sc->sc_freetds = std; 453 } 454 } 455 456 std = sc->sc_freetds; 457 sc->sc_freetds = std->nexttd; 458 memset(&std->td, 0, sizeof(ohci_td_t)); 459 std->nexttd = NULL; 460 std->xfer = NULL; 461 ohci_hash_add_td(sc, std); 462 463 return std; 464 } 465 466 void 467 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std) 468 { 469 470 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 471 472 ohci_hash_rem_td(sc, std); 473 std->nexttd = sc->sc_freetds; 474 sc->sc_freetds = std; 475 } 476 477 usbd_status 478 ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc, 479 int alen, int rd, struct usbd_xfer *xfer, 480 ohci_soft_td_t *sp, ohci_soft_td_t **ep) 481 { 482 ohci_soft_td_t *next, *cur; 483 ohci_physaddr_t dataphys, dataphysend; 484 uint32_t tdflags; 485 int len, curlen; 486 usb_dma_t *dma = &xfer->ux_dmabuf; 487 uint16_t flags = xfer->ux_flags; 488 489 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 490 DPRINTF("start len=%d", alen, 0, 0, 0); 491 492 KASSERT(mutex_owned(&sc->sc_lock)); 493 494 DPRINTFN(8, "addr=%d endpt=%d len=%d speed=%d", 495 opipe->pipe.up_dev->ud_addr, 496 UE_GET_ADDR(opipe->pipe.up_endpoint->ue_edesc->bEndpointAddress), 497 alen, opipe->pipe.up_dev->ud_speed); 498 499 len = alen; 500 cur = sp; 501 dataphys = DMAADDR(dma, 0); 502 dataphysend = OHCI_PAGE(dataphys + len - 1); 503 usb_syncmem(dma, 0, len, 504 rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 505 tdflags = HTOO32( 506 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 507 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) | 508 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR); 509 510 for (;;) { 511 next = ohci_alloc_std(sc); 512 if (next == NULL) 513 goto nomem; 514 515 /* The OHCI hardware can handle at most one page crossing. */ 516 if (OHCI_PAGE(dataphys) == dataphysend || 517 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) { 518 /* we can handle it in this TD */ 519 curlen = len; 520 } else { 521 /* must use multiple TDs, fill as much as possible. */ 522 curlen = 2 * OHCI_PAGE_SIZE - 523 (dataphys & (OHCI_PAGE_SIZE-1)); 524 /* the length must be a multiple of the max size */ 525 curlen -= curlen % UGETW(opipe->pipe.up_endpoint->ue_edesc->wMaxPacketSize); 526 #ifdef DIAGNOSTIC 527 if (curlen == 0) 528 panic("ohci_alloc_std: curlen == 0"); 529 #endif 530 } 531 DPRINTFN(4, "dataphys=0x%08x dataphysend=0x%08x " 532 "len=%d curlen=%d", dataphys, dataphysend, len, curlen); 533 len -= curlen; 534 535 cur->td.td_flags = tdflags; 536 cur->td.td_cbp = HTOO32(dataphys); 537 cur->nexttd = next; 538 cur->td.td_nexttd = HTOO32(next->physaddr); 539 cur->td.td_be = HTOO32(dataphys + curlen - 1); 540 cur->len = curlen; 541 cur->flags = OHCI_ADD_LEN; 542 cur->xfer = xfer; 543 usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td), 544 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 545 DPRINTFN(10, "cbp=0x%08x be=0x%08x", dataphys, 546 dataphys + curlen - 1, 0, 0); 547 if (len == 0) 548 break; 549 DPRINTFN(10, "extend chain", 0, 0, 0, 0); 550 dataphys += curlen; 551 cur = next; 552 } 553 if (!rd && (flags & USBD_FORCE_SHORT_XFER) && 554 alen % UGETW(opipe->pipe.up_endpoint->ue_edesc->wMaxPacketSize) == 0) { 555 /* Force a 0 length transfer at the end. */ 556 557 cur = next; 558 next = ohci_alloc_std(sc); 559 if (next == NULL) 560 goto nomem; 561 562 cur->td.td_flags = tdflags; 563 cur->td.td_cbp = 0; /* indicate 0 length packet */ 564 cur->nexttd = next; 565 cur->td.td_nexttd = HTOO32(next->physaddr); 566 cur->td.td_be = ~0; 567 cur->len = 0; 568 cur->flags = 0; 569 cur->xfer = xfer; 570 usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td), 571 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 572 DPRINTFN(2, "add 0 xfer", 0, 0, 0, 0); 573 } 574 *ep = cur; 575 576 return USBD_NORMAL_COMPLETION; 577 578 nomem: 579 580 /* Don't free sp - let the caller do that */ 581 ohci_free_std_chain(sc, sp->nexttd, NULL); 582 583 return USBD_NOMEM; 584 } 585 586 Static void 587 ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std, 588 ohci_soft_td_t *stdend) 589 { 590 ohci_soft_td_t *p; 591 592 for (; std != stdend; std = p) { 593 p = std->nexttd; 594 ohci_free_std(sc, std); 595 } 596 } 597 598 ohci_soft_itd_t * 599 ohci_alloc_sitd(ohci_softc_t *sc) 600 { 601 ohci_soft_itd_t *sitd; 602 usbd_status err; 603 int i, offs; 604 usb_dma_t dma; 605 606 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 607 608 if (sc->sc_freeitds == NULL) { 609 DPRINTFN(2, "allocating chunk", 0, 0, 0, 0); 610 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK, 611 OHCI_ITD_ALIGN, &dma); 612 if (err) 613 return NULL; 614 for(i = 0; i < OHCI_SITD_CHUNK; i++) { 615 offs = i * OHCI_SITD_SIZE; 616 sitd = KERNADDR(&dma, offs); 617 sitd->physaddr = DMAADDR(&dma, offs); 618 sitd->dma = dma; 619 sitd->offs = offs; 620 sitd->nextitd = sc->sc_freeitds; 621 sc->sc_freeitds = sitd; 622 } 623 } 624 625 sitd = sc->sc_freeitds; 626 sc->sc_freeitds = sitd->nextitd; 627 memset(&sitd->itd, 0, sizeof(ohci_itd_t)); 628 sitd->nextitd = NULL; 629 sitd->xfer = NULL; 630 ohci_hash_add_itd(sc, sitd); 631 632 #ifdef DIAGNOSTIC 633 sitd->isdone = 0; 634 #endif 635 636 return sitd; 637 } 638 639 void 640 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 641 { 642 643 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 644 DPRINTFN(10, "sitd=%p", sitd, 0, 0, 0); 645 646 #ifdef DIAGNOSTIC 647 if (!sitd->isdone) { 648 panic("ohci_free_sitd: sitd=%p not done", sitd); 649 return; 650 } 651 /* Warn double free */ 652 sitd->isdone = 0; 653 #endif 654 655 ohci_hash_rem_itd(sc, sitd); 656 sitd->nextitd = sc->sc_freeitds; 657 sc->sc_freeitds = sitd; 658 } 659 660 int 661 ohci_init(ohci_softc_t *sc) 662 { 663 ohci_soft_ed_t *sed, *psed; 664 usbd_status err; 665 int i; 666 uint32_t s, ctl, rwc, ival, hcr, fm, per, rev, desca /*, descb */; 667 668 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 669 670 aprint_normal_dev(sc->sc_dev, ""); 671 672 sc->sc_hcca = NULL; 673 callout_init(&sc->sc_tmo_rhsc, CALLOUT_MPSAFE); 674 675 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_SOFTUSB); 676 mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_SCHED); 677 cv_init(&sc->sc_softwake_cv, "ohciab"); 678 679 sc->sc_rhsc_si = softint_establish(SOFTINT_NET | SOFTINT_MPSAFE, 680 ohci_rhsc_softint, sc); 681 682 for (i = 0; i < OHCI_HASH_SIZE; i++) 683 LIST_INIT(&sc->sc_hash_tds[i]); 684 for (i = 0; i < OHCI_HASH_SIZE; i++) 685 LIST_INIT(&sc->sc_hash_itds[i]); 686 687 sc->sc_xferpool = pool_cache_init(sizeof(struct ohci_xfer), 0, 0, 0, 688 "ohcixfer", NULL, IPL_USB, NULL, NULL, NULL); 689 690 rev = OREAD4(sc, OHCI_REVISION); 691 aprint_normal("OHCI version %d.%d%s\n", 692 OHCI_REV_HI(rev), OHCI_REV_LO(rev), 693 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 694 695 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 696 aprint_error_dev(sc->sc_dev, "unsupported OHCI revision\n"); 697 sc->sc_bus.ub_revision = USBREV_UNKNOWN; 698 return -1; 699 } 700 sc->sc_bus.ub_revision = USBREV_1_0; 701 sc->sc_bus.ub_usedma = true; 702 703 /* XXX determine alignment by R/W */ 704 /* Allocate the HCCA area. */ 705 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 706 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 707 if (err) { 708 sc->sc_hcca = NULL; 709 return err; 710 } 711 sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0); 712 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 713 714 sc->sc_eintrs = OHCI_NORMAL_INTRS; 715 716 /* Allocate dummy ED that starts the control list. */ 717 sc->sc_ctrl_head = ohci_alloc_sed(sc); 718 if (sc->sc_ctrl_head == NULL) { 719 err = ENOMEM; 720 goto bad1; 721 } 722 sc->sc_ctrl_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 723 724 /* Allocate dummy ED that starts the bulk list. */ 725 sc->sc_bulk_head = ohci_alloc_sed(sc); 726 if (sc->sc_bulk_head == NULL) { 727 err = ENOMEM; 728 goto bad2; 729 } 730 sc->sc_bulk_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 731 usb_syncmem(&sc->sc_bulk_head->dma, sc->sc_bulk_head->offs, 732 sizeof(sc->sc_bulk_head->ed), 733 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 734 735 /* Allocate dummy ED that starts the isochronous list. */ 736 sc->sc_isoc_head = ohci_alloc_sed(sc); 737 if (sc->sc_isoc_head == NULL) { 738 err = ENOMEM; 739 goto bad3; 740 } 741 sc->sc_isoc_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 742 usb_syncmem(&sc->sc_isoc_head->dma, sc->sc_isoc_head->offs, 743 sizeof(sc->sc_isoc_head->ed), 744 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 745 746 /* Allocate all the dummy EDs that make up the interrupt tree. */ 747 for (i = 0; i < OHCI_NO_EDS; i++) { 748 sed = ohci_alloc_sed(sc); 749 if (sed == NULL) { 750 while (--i >= 0) 751 ohci_free_sed(sc, sc->sc_eds[i]); 752 err = ENOMEM; 753 goto bad4; 754 } 755 /* All ED fields are set to 0. */ 756 sc->sc_eds[i] = sed; 757 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 758 if (i != 0) 759 psed = sc->sc_eds[(i-1) / 2]; 760 else 761 psed= sc->sc_isoc_head; 762 sed->next = psed; 763 sed->ed.ed_nexted = HTOO32(psed->physaddr); 764 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 765 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 766 } 767 /* 768 * Fill HCCA interrupt table. The bit reversal is to get 769 * the tree set up properly to spread the interrupts. 770 */ 771 for (i = 0; i < OHCI_NO_INTRS; i++) 772 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 773 HTOO32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 774 usb_syncmem(&sc->sc_hccadma, 0, OHCI_HCCA_SIZE, 775 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 776 777 #ifdef OHCI_DEBUG 778 DPRINTFN(15, "--- dump start ---", 0, 0, 0 ,0); 779 if (ohcidebug > 15) { 780 for (i = 0; i < OHCI_NO_EDS; i++) { 781 DPRINTFN(15, "ed#%d ", i, 0, 0, 0); 782 ohci_dump_ed(sc, sc->sc_eds[i]); 783 } 784 DPRINTFN(15, "iso", 0, 0, 0 ,0); 785 ohci_dump_ed(sc, sc->sc_isoc_head); 786 } 787 DPRINTFN(15, "--- dump end ---", 0, 0, 0 ,0); 788 #endif 789 790 /* Preserve values programmed by SMM/BIOS but lost over reset. */ 791 ctl = OREAD4(sc, OHCI_CONTROL); 792 rwc = ctl & OHCI_RWC; 793 fm = OREAD4(sc, OHCI_FM_INTERVAL); 794 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 795 /* descb = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); */ 796 797 /* Determine in what context we are running. */ 798 if (ctl & OHCI_IR) { 799 /* SMM active, request change */ 800 DPRINTF("SMM active, request owner change", 0, 0, 0, 0); 801 if ((sc->sc_intre & (OHCI_OC | OHCI_MIE)) == 802 (OHCI_OC | OHCI_MIE)) 803 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_MIE); 804 s = OREAD4(sc, OHCI_COMMAND_STATUS); 805 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 806 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 807 usb_delay_ms(&sc->sc_bus, 1); 808 ctl = OREAD4(sc, OHCI_CONTROL); 809 } 810 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_MIE); 811 if ((ctl & OHCI_IR) == 0) { 812 aprint_error_dev(sc->sc_dev, 813 "SMM does not respond, resetting\n"); 814 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 815 goto reset; 816 } 817 #if 0 818 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */ 819 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 820 /* BIOS started controller. */ 821 DPRINTF("BIOS active", 0, 0, 0, 0); 822 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 823 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL | rwc); 824 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 825 } 826 #endif 827 } else { 828 DPRINTF("cold started", 0 ,0 ,0 ,0); 829 reset: 830 /* Controller was cold started. */ 831 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 832 } 833 834 /* 835 * This reset should not be necessary according to the OHCI spec, but 836 * without it some controllers do not start. 837 */ 838 DPRINTF("sc %p: resetting", sc, 0, 0, 0); 839 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 840 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 841 842 /* We now own the host controller and the bus has been reset. */ 843 844 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 845 /* Nominal time for a reset is 10 us. */ 846 for (i = 0; i < 10; i++) { 847 delay(10); 848 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 849 if (!hcr) 850 break; 851 } 852 if (hcr) { 853 aprint_error_dev(sc->sc_dev, "reset timeout\n"); 854 err = EIO; 855 goto bad5; 856 } 857 #ifdef OHCI_DEBUG 858 if (ohcidebug > 15) 859 ohci_dumpregs(sc); 860 #endif 861 862 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 863 864 /* Set up HC registers. */ 865 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 866 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 867 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 868 /* disable all interrupts and then switch on all desired interrupts */ 869 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 870 /* switch on desired functional features */ 871 ctl = OREAD4(sc, OHCI_CONTROL); 872 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 873 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 874 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL | rwc; 875 /* And finally start it! */ 876 OWRITE4(sc, OHCI_CONTROL, ctl); 877 878 /* 879 * The controller is now OPERATIONAL. Set a some final 880 * registers that should be set earlier, but that the 881 * controller ignores when in the SUSPEND state. 882 */ 883 ival = OHCI_GET_IVAL(fm); 884 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 885 fm |= OHCI_FSMPS(ival) | ival; 886 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 887 per = OHCI_PERIODIC(ival); /* 90% periodic */ 888 OWRITE4(sc, OHCI_PERIODIC_START, per); 889 890 if (sc->sc_flags & OHCIF_SUPERIO) { 891 /* no overcurrent protection */ 892 desca |= OHCI_NOCP; 893 /* 894 * Clear NoPowerSwitching and PowerOnToPowerGoodTime meaning 895 * that 896 * - ports are always power switched 897 * - don't wait for powered root hub port 898 */ 899 desca &= ~(__SHIFTIN(0xff, OHCI_POTPGT_MASK) | OHCI_NPS); 900 } 901 902 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */ 903 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP); 904 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 905 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY); 906 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca); 907 908 /* 909 * The AMD756 requires a delay before re-reading the register, 910 * otherwise it will occasionally report 0 ports. 911 */ 912 sc->sc_noport = 0; 913 for (i = 0; i < 10 && sc->sc_noport == 0; i++) { 914 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY); 915 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 916 } 917 918 #ifdef OHCI_DEBUG 919 if (ohcidebug > 5) 920 ohci_dumpregs(sc); 921 #endif 922 923 /* Set up the bus struct. */ 924 sc->sc_bus.ub_methods = &ohci_bus_methods; 925 sc->sc_bus.ub_pipesize = sizeof(struct ohci_pipe); 926 927 sc->sc_control = sc->sc_intre = 0; 928 929 /* Finally, turn on interrupts. */ 930 DPRINTF("enabling %#x", sc->sc_eintrs | OHCI_MIE, 0, 0, 0); 931 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 932 933 return 0; 934 935 bad5: 936 for (i = 0; i < OHCI_NO_EDS; i++) 937 ohci_free_sed(sc, sc->sc_eds[i]); 938 bad4: 939 ohci_free_sed(sc, sc->sc_isoc_head); 940 bad3: 941 ohci_free_sed(sc, sc->sc_bulk_head); 942 bad2: 943 ohci_free_sed(sc, sc->sc_ctrl_head); 944 bad1: 945 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 946 sc->sc_hcca = NULL; 947 return err; 948 } 949 950 struct usbd_xfer * 951 ohci_allocx(struct usbd_bus *bus) 952 { 953 struct ohci_softc *sc = bus->ub_hcpriv; 954 struct usbd_xfer *xfer; 955 956 xfer = pool_cache_get(sc->sc_xferpool, PR_NOWAIT); 957 if (xfer != NULL) { 958 memset(xfer, 0, sizeof(struct ohci_xfer)); 959 #ifdef DIAGNOSTIC 960 xfer->ux_state = XFER_BUSY; 961 #endif 962 } 963 return xfer; 964 } 965 966 void 967 ohci_freex(struct usbd_bus *bus, struct usbd_xfer *xfer) 968 { 969 struct ohci_softc *sc = bus->ub_hcpriv; 970 971 #ifdef DIAGNOSTIC 972 if (xfer->ux_state != XFER_BUSY) { 973 printf("ohci_freex: xfer=%p not busy, 0x%08x\n", xfer, 974 xfer->ux_state); 975 } 976 xfer->ux_state = XFER_FREE; 977 #endif 978 pool_cache_put(sc->sc_xferpool, xfer); 979 } 980 981 Static void 982 ohci_get_lock(struct usbd_bus *bus, kmutex_t **lock) 983 { 984 struct ohci_softc *sc = bus->ub_hcpriv; 985 986 *lock = &sc->sc_lock; 987 } 988 989 /* 990 * Shut down the controller when the system is going down. 991 */ 992 bool 993 ohci_shutdown(device_t self, int flags) 994 { 995 ohci_softc_t *sc = device_private(self); 996 997 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 998 999 DPRINTF("stopping the HC", 0, 0, 0, 0); 1000 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1001 return true; 1002 } 1003 1004 bool 1005 ohci_resume(device_t dv, const pmf_qual_t *qual) 1006 { 1007 ohci_softc_t *sc = device_private(dv); 1008 uint32_t ctl; 1009 1010 mutex_spin_enter(&sc->sc_intr_lock); 1011 sc->sc_bus.ub_usepolling++; 1012 mutex_spin_exit(&sc->sc_intr_lock); 1013 1014 /* Some broken BIOSes do not recover these values */ 1015 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 1016 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, 1017 sc->sc_ctrl_head->physaddr); 1018 OWRITE4(sc, OHCI_BULK_HEAD_ED, 1019 sc->sc_bulk_head->physaddr); 1020 if (sc->sc_intre) 1021 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_intre & 1022 (OHCI_ALL_INTRS | OHCI_MIE)); 1023 if (sc->sc_control) 1024 ctl = sc->sc_control; 1025 else 1026 ctl = OREAD4(sc, OHCI_CONTROL); 1027 ctl |= OHCI_HCFS_RESUME; 1028 OWRITE4(sc, OHCI_CONTROL, ctl); 1029 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 1030 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL; 1031 OWRITE4(sc, OHCI_CONTROL, ctl); 1032 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 1033 sc->sc_control = sc->sc_intre = 0; 1034 1035 mutex_spin_enter(&sc->sc_intr_lock); 1036 sc->sc_bus.ub_usepolling--; 1037 mutex_spin_exit(&sc->sc_intr_lock); 1038 1039 return true; 1040 } 1041 1042 bool 1043 ohci_suspend(device_t dv, const pmf_qual_t *qual) 1044 { 1045 ohci_softc_t *sc = device_private(dv); 1046 uint32_t ctl; 1047 1048 mutex_spin_enter(&sc->sc_intr_lock); 1049 sc->sc_bus.ub_usepolling++; 1050 mutex_spin_exit(&sc->sc_intr_lock); 1051 1052 ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK; 1053 if (sc->sc_control == 0) { 1054 /* 1055 * Preserve register values, in case that BIOS 1056 * does not recover them. 1057 */ 1058 sc->sc_control = ctl; 1059 sc->sc_intre = OREAD4(sc, 1060 OHCI_INTERRUPT_ENABLE); 1061 } 1062 ctl |= OHCI_HCFS_SUSPEND; 1063 OWRITE4(sc, OHCI_CONTROL, ctl); 1064 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1065 1066 mutex_spin_enter(&sc->sc_intr_lock); 1067 sc->sc_bus.ub_usepolling--; 1068 mutex_spin_exit(&sc->sc_intr_lock); 1069 1070 return true; 1071 } 1072 1073 #ifdef OHCI_DEBUG 1074 void 1075 ohci_dumpregs(ohci_softc_t *sc) 1076 { 1077 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1078 1079 DPRINTF("rev=0x%08x control=0x%08x command=0x%08x", 1080 OREAD4(sc, OHCI_REVISION), 1081 OREAD4(sc, OHCI_CONTROL), 1082 OREAD4(sc, OHCI_COMMAND_STATUS), 0); 1083 DPRINTF(" intrstat=0x%08x intre=0x%08x intrd=0x%08x", 1084 OREAD4(sc, OHCI_INTERRUPT_STATUS), 1085 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 1086 OREAD4(sc, OHCI_INTERRUPT_DISABLE), 0); 1087 DPRINTF(" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x", 1088 OREAD4(sc, OHCI_HCCA), 1089 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 1090 OREAD4(sc, OHCI_CONTROL_HEAD_ED), 0); 1091 DPRINTF(" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x", 1092 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 1093 OREAD4(sc, OHCI_BULK_HEAD_ED), 1094 OREAD4(sc, OHCI_BULK_CURRENT_ED) ,0); 1095 DPRINTF(" done=0x%08x fmival=0x%08x fmrem=0x%08x", 1096 OREAD4(sc, OHCI_DONE_HEAD), 1097 OREAD4(sc, OHCI_FM_INTERVAL), 1098 OREAD4(sc, OHCI_FM_REMAINING), 0); 1099 DPRINTF(" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x", 1100 OREAD4(sc, OHCI_FM_NUMBER), 1101 OREAD4(sc, OHCI_PERIODIC_START), 1102 OREAD4(sc, OHCI_LS_THRESHOLD), 0); 1103 DPRINTF(" desca=0x%08x descb=0x%08x stat=0x%08x", 1104 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 1105 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 1106 OREAD4(sc, OHCI_RH_STATUS), 0); 1107 DPRINTF(" port1=0x%08x port2=0x%08x", 1108 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 1109 OREAD4(sc, OHCI_RH_PORT_STATUS(2)), 0, 0); 1110 DPRINTF(" HCCA: frame_number=0x%04x done_head=0x%08x", 1111 O32TOH(sc->sc_hcca->hcca_frame_number), 1112 O32TOH(sc->sc_hcca->hcca_done_head), 0, 0); 1113 } 1114 #endif 1115 1116 Static int ohci_intr1(ohci_softc_t *); 1117 1118 int 1119 ohci_intr(void *p) 1120 { 1121 ohci_softc_t *sc = p; 1122 int ret = 0; 1123 1124 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1125 1126 if (sc == NULL) 1127 return 0; 1128 1129 mutex_spin_enter(&sc->sc_intr_lock); 1130 1131 if (sc->sc_dying || !device_has_power(sc->sc_dev)) 1132 goto done; 1133 1134 /* If we get an interrupt while polling, then just ignore it. */ 1135 if (sc->sc_bus.ub_usepolling) { 1136 #ifdef DIAGNOSTIC 1137 DPRINTFN(16, "ignored interrupt while polling", 0, 0, 0, 0); 1138 #endif 1139 /* for level triggered intrs, should do something to ack */ 1140 OWRITE4(sc, OHCI_INTERRUPT_STATUS, 1141 OREAD4(sc, OHCI_INTERRUPT_STATUS)); 1142 1143 goto done; 1144 } 1145 1146 ret = ohci_intr1(sc); 1147 1148 done: 1149 mutex_spin_exit(&sc->sc_intr_lock); 1150 return ret; 1151 } 1152 1153 Static int 1154 ohci_intr1(ohci_softc_t *sc) 1155 { 1156 uint32_t intrs, eintrs; 1157 1158 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1159 1160 /* In case the interrupt occurs before initialization has completed. */ 1161 if (sc == NULL || sc->sc_hcca == NULL) { 1162 #ifdef DIAGNOSTIC 1163 printf("ohci_intr: sc->sc_hcca == NULL\n"); 1164 #endif 1165 return 0; 1166 } 1167 1168 KASSERT(mutex_owned(&sc->sc_intr_lock)); 1169 1170 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1171 if (!intrs) 1172 return 0; 1173 1174 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs & ~(OHCI_MIE|OHCI_WDH)); /* Acknowledge */ 1175 eintrs = intrs & sc->sc_eintrs; 1176 DPRINTFN(7, "sc=%p", sc, 0, 0, 0); 1177 DPRINTFN(7, "intrs=%#x(%#x) eintrs=%#x(%#x)", 1178 intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), eintrs, 1179 sc->sc_eintrs); 1180 1181 if (!eintrs) { 1182 return 0; 1183 } 1184 1185 if (eintrs & OHCI_SO) { 1186 sc->sc_overrun_cnt++; 1187 if (usbd_ratecheck(&sc->sc_overrun_ntc)) { 1188 printf("%s: %u scheduling overruns\n", 1189 device_xname(sc->sc_dev), sc->sc_overrun_cnt); 1190 sc->sc_overrun_cnt = 0; 1191 } 1192 /* XXX do what */ 1193 eintrs &= ~OHCI_SO; 1194 } 1195 if (eintrs & OHCI_WDH) { 1196 /* 1197 * We block the interrupt below, and reenable it later from 1198 * ohci_softintr(). 1199 */ 1200 usb_schedsoftintr(&sc->sc_bus); 1201 } 1202 if (eintrs & OHCI_RD) { 1203 printf("%s: resume detect\n", device_xname(sc->sc_dev)); 1204 /* XXX process resume detect */ 1205 } 1206 if (eintrs & OHCI_UE) { 1207 printf("%s: unrecoverable error, controller halted\n", 1208 device_xname(sc->sc_dev)); 1209 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1210 /* XXX what else */ 1211 } 1212 if (eintrs & OHCI_RHSC) { 1213 /* 1214 * We block the interrupt below, and reenable it later from 1215 * a timeout. 1216 */ 1217 softint_schedule(sc->sc_rhsc_si); 1218 } 1219 1220 if (eintrs != 0) { 1221 /* Block unprocessed interrupts. */ 1222 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs); 1223 sc->sc_eintrs &= ~eintrs; 1224 DPRINTF("sc %p blocking intrs 0x%x", sc, eintrs, 0, 0); 1225 } 1226 1227 return 1; 1228 } 1229 1230 void 1231 ohci_rhsc_enable(void *v_sc) 1232 { 1233 ohci_softc_t *sc = v_sc; 1234 1235 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1236 DPRINTF("sc %p", sc, 0, 0, 0); 1237 mutex_spin_enter(&sc->sc_intr_lock); 1238 sc->sc_eintrs |= OHCI_RHSC; 1239 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1240 mutex_spin_exit(&sc->sc_intr_lock); 1241 } 1242 1243 #ifdef OHCI_DEBUG 1244 const char *ohci_cc_strs[] = { 1245 "NO_ERROR", 1246 "CRC", 1247 "BIT_STUFFING", 1248 "DATA_TOGGLE_MISMATCH", 1249 "STALL", 1250 "DEVICE_NOT_RESPONDING", 1251 "PID_CHECK_FAILURE", 1252 "UNEXPECTED_PID", 1253 "DATA_OVERRUN", 1254 "DATA_UNDERRUN", 1255 "BUFFER_OVERRUN", 1256 "BUFFER_UNDERRUN", 1257 "reserved", 1258 "reserved", 1259 "NOT_ACCESSED", 1260 "NOT_ACCESSED", 1261 }; 1262 #endif 1263 1264 void 1265 ohci_softintr(void *v) 1266 { 1267 struct usbd_bus *bus = v; 1268 ohci_softc_t *sc = bus->ub_hcpriv; 1269 ohci_soft_itd_t *sitd, *sidone, *sitdnext; 1270 ohci_soft_td_t *std, *sdone, *stdnext; 1271 struct usbd_xfer *xfer; 1272 struct ohci_pipe *opipe; 1273 int len, cc; 1274 int i, j, actlen, iframes, uedir; 1275 ohci_physaddr_t done; 1276 1277 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1278 1279 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1280 1281 usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head), 1282 sizeof(sc->sc_hcca->hcca_done_head), 1283 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1284 done = O32TOH(sc->sc_hcca->hcca_done_head) & ~OHCI_DONE_INTRS; 1285 sc->sc_hcca->hcca_done_head = 0; 1286 usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head), 1287 sizeof(sc->sc_hcca->hcca_done_head), 1288 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1289 OWRITE4(sc, OHCI_INTERRUPT_STATUS, OHCI_WDH); 1290 sc->sc_eintrs |= OHCI_WDH; 1291 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_WDH); 1292 1293 /* Reverse the done list. */ 1294 for (sdone = NULL, sidone = NULL; done != 0; ) { 1295 std = ohci_hash_find_td(sc, done); 1296 if (std != NULL) { 1297 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 1298 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1299 std->dnext = sdone; 1300 done = O32TOH(std->td.td_nexttd); 1301 sdone = std; 1302 DPRINTFN(10, "add TD %p", std, 0, 0, 0); 1303 continue; 1304 } 1305 sitd = ohci_hash_find_itd(sc, done); 1306 if (sitd != NULL) { 1307 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 1308 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1309 sitd->dnext = sidone; 1310 done = O32TOH(sitd->itd.itd_nextitd); 1311 sidone = sitd; 1312 DPRINTFN(5, "add ITD %p", sitd, 0, 0, 0); 1313 continue; 1314 } 1315 device_printf(sc->sc_dev, "WARNING: addr 0x%08lx not found\n", 1316 (u_long)done); 1317 break; 1318 } 1319 1320 DPRINTFN(10, "sdone=%p sidone=%p", sdone, sidone, 0, 0); 1321 DPRINTFN(10, "--- dump start ---", 0, 0, 0, 0); 1322 #ifdef OHCI_DEBUG 1323 if (ohcidebug > 10) { 1324 for (std = sdone; std; std = std->dnext) 1325 ohci_dump_td(sc, std); 1326 } 1327 #endif 1328 DPRINTFN(10, "--- dump end ---", 0, 0, 0, 0); 1329 1330 for (std = sdone; std; std = stdnext) { 1331 xfer = std->xfer; 1332 stdnext = std->dnext; 1333 DPRINTFN(10, "std=%p xfer=%p hcpriv=%p", std, xfer, 1334 xfer ? xfer->ux_hcpriv : 0, 0); 1335 if (xfer == NULL) { 1336 /* 1337 * xfer == NULL: There seems to be no xfer associated 1338 * with this TD. It is tailp that happened to end up on 1339 * the done queue. 1340 * Shouldn't happen, but some chips are broken(?). 1341 */ 1342 continue; 1343 } 1344 if (xfer->ux_status == USBD_CANCELLED || 1345 xfer->ux_status == USBD_TIMEOUT) { 1346 DPRINTF("cancel/timeout %p", xfer, 0, 0, 0); 1347 /* Handled by abort routine. */ 1348 continue; 1349 } 1350 callout_stop(&xfer->ux_callout); 1351 1352 len = std->len; 1353 if (std->td.td_cbp != 0) 1354 len -= O32TOH(std->td.td_be) - 1355 O32TOH(std->td.td_cbp) + 1; 1356 DPRINTFN(10, "len=%d, flags=0x%x", len, std->flags, 0, 0); 1357 if (std->flags & OHCI_ADD_LEN) 1358 xfer->ux_actlen += len; 1359 1360 cc = OHCI_TD_GET_CC(O32TOH(std->td.td_flags)); 1361 if (cc == OHCI_CC_NO_ERROR) { 1362 if (std->flags & OHCI_CALL_DONE) { 1363 xfer->ux_status = USBD_NORMAL_COMPLETION; 1364 usb_transfer_complete(xfer); 1365 } 1366 ohci_free_std(sc, std); 1367 } else { 1368 /* 1369 * Endpoint is halted. First unlink all the TDs 1370 * belonging to the failed transfer, and then restart 1371 * the endpoint. 1372 */ 1373 ohci_soft_td_t *p, *n; 1374 opipe = (struct ohci_pipe *)xfer->ux_pipe; 1375 1376 DPRINTFN(15, "error cc=%d", 1377 OHCI_TD_GET_CC(O32TOH(std->td.td_flags)), 0, 0, 0); 1378 1379 /* remove TDs */ 1380 for (p = std; p->xfer == xfer; p = n) { 1381 n = p->nexttd; 1382 ohci_free_std(sc, p); 1383 } 1384 1385 /* clear halt */ 1386 opipe->sed->ed.ed_headp = HTOO32(p->physaddr); 1387 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1388 1389 if (cc == OHCI_CC_STALL) 1390 xfer->ux_status = USBD_STALLED; 1391 else 1392 xfer->ux_status = USBD_IOERROR; 1393 usb_transfer_complete(xfer); 1394 } 1395 } 1396 DPRINTFN(10, "--- dump start ---", 0, 0, 0, 0); 1397 #ifdef OHCI_DEBUG 1398 if (ohcidebug > 10) { 1399 DPRINTFN(10, "ITD done", 0, 0, 0, 0); 1400 for (sitd = sidone; sitd; sitd = sitd->dnext) 1401 ohci_dump_itd(sc, sitd); 1402 } 1403 #endif 1404 DPRINTFN(10, "--- dump end ---", 0, 0, 0, 0); 1405 1406 for (sitd = sidone; sitd != NULL; sitd = sitdnext) { 1407 xfer = sitd->xfer; 1408 sitdnext = sitd->dnext; 1409 DPRINTFN(1, "sitd=%p xfer=%p hcpriv=%p", sitd, xfer, 1410 xfer ? xfer->ux_hcpriv : 0, 0); 1411 if (xfer == NULL) 1412 continue; 1413 if (xfer->ux_status == USBD_CANCELLED || 1414 xfer->ux_status == USBD_TIMEOUT) { 1415 DPRINTF("cancel/timeout %p", xfer, 0, 0, 0); 1416 /* Handled by abort routine. */ 1417 continue; 1418 } 1419 #ifdef DIAGNOSTIC 1420 if (sitd->isdone) 1421 printf("ohci_softintr: sitd=%p is done\n", sitd); 1422 sitd->isdone = 1; 1423 #endif 1424 if (sitd->flags & OHCI_CALL_DONE) { 1425 ohci_soft_itd_t *next; 1426 1427 opipe = (struct ohci_pipe *)xfer->ux_pipe; 1428 opipe->u.iso.inuse -= xfer->ux_nframes; 1429 uedir = UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc-> 1430 bEndpointAddress); 1431 xfer->ux_status = USBD_NORMAL_COMPLETION; 1432 actlen = 0; 1433 for (i = 0, sitd = xfer->ux_hcpriv;; 1434 sitd = next) { 1435 next = sitd->nextitd; 1436 if (OHCI_ITD_GET_CC(O32TOH(sitd-> 1437 itd.itd_flags)) != OHCI_CC_NO_ERROR) 1438 xfer->ux_status = USBD_IOERROR; 1439 /* For input, update frlengths with actual */ 1440 /* XXX anything necessary for output? */ 1441 if (uedir == UE_DIR_IN && 1442 xfer->ux_status == USBD_NORMAL_COMPLETION) { 1443 iframes = OHCI_ITD_GET_FC(O32TOH( 1444 sitd->itd.itd_flags)); 1445 for (j = 0; j < iframes; i++, j++) { 1446 len = O16TOH(sitd-> 1447 itd.itd_offset[j]); 1448 if ((OHCI_ITD_PSW_GET_CC(len) & 1449 OHCI_CC_NOT_ACCESSED_MASK) 1450 == OHCI_CC_NOT_ACCESSED) 1451 len = 0; 1452 else 1453 len = OHCI_ITD_PSW_LENGTH(len); 1454 xfer->ux_frlengths[i] = len; 1455 actlen += len; 1456 } 1457 } 1458 if (sitd->flags & OHCI_CALL_DONE) 1459 break; 1460 ohci_free_sitd(sc, sitd); 1461 } 1462 ohci_free_sitd(sc, sitd); 1463 if (uedir == UE_DIR_IN && 1464 xfer->ux_status == USBD_NORMAL_COMPLETION) 1465 xfer->ux_actlen = actlen; 1466 xfer->ux_hcpriv = NULL; 1467 1468 usb_transfer_complete(xfer); 1469 } 1470 } 1471 1472 if (sc->sc_softwake) { 1473 sc->sc_softwake = 0; 1474 cv_broadcast(&sc->sc_softwake_cv); 1475 } 1476 1477 DPRINTFN(10, "done", 0, 0, 0, 0); 1478 } 1479 1480 void 1481 ohci_device_ctrl_done(struct usbd_xfer *xfer) 1482 { 1483 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->ux_pipe; 1484 #ifdef DIAGNOSTIC 1485 ohci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv; 1486 #endif 1487 int len = UGETW(xfer->ux_request.wLength); 1488 int isread = (xfer->ux_request.bmRequestType & UT_READ); 1489 1490 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1491 DPRINTFN(10, "xfer=%p", xfer, 0, 0, 0); 1492 1493 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1494 1495 #ifdef DIAGNOSTIC 1496 if (!(xfer->ux_rqflags & URQ_REQUEST)) { 1497 panic("ohci_device_ctrl_done: not a request"); 1498 } 1499 #endif 1500 if (len) 1501 usb_syncmem(&xfer->ux_dmabuf, 0, len, 1502 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1503 usb_syncmem(&opipe->u.ctl.reqdma, 0, 1504 sizeof(usb_device_request_t), BUS_DMASYNC_POSTWRITE); 1505 } 1506 1507 void 1508 ohci_device_intr_done(struct usbd_xfer *xfer) 1509 { 1510 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->ux_pipe; 1511 ohci_softc_t *sc = opipe->pipe.up_dev->ud_bus->ub_hcpriv; 1512 ohci_soft_ed_t *sed = opipe->sed; 1513 ohci_soft_td_t *data, *tail; 1514 int isread = 1515 (UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress) == UE_DIR_IN); 1516 1517 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1518 DPRINTFN(10, "xfer=%p, actlen=%d", xfer, xfer->ux_actlen, 0, 0); 1519 1520 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1521 1522 usb_syncmem(&xfer->ux_dmabuf, 0, xfer->ux_length, 1523 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1524 if (xfer->ux_pipe->up_repeat) { 1525 data = opipe->tail.td; 1526 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 1527 if (tail == NULL) { 1528 xfer->ux_status = USBD_NOMEM; 1529 return; 1530 } 1531 tail->xfer = NULL; 1532 1533 data->td.td_flags = HTOO32( 1534 OHCI_TD_IN | OHCI_TD_NOCC | 1535 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 1536 if (xfer->ux_flags & USBD_SHORT_XFER_OK) 1537 data->td.td_flags |= HTOO32(OHCI_TD_R); 1538 data->td.td_cbp = HTOO32(DMAADDR(&xfer->ux_dmabuf, 0)); 1539 data->nexttd = tail; 1540 data->td.td_nexttd = HTOO32(tail->physaddr); 1541 data->td.td_be = HTOO32(O32TOH(data->td.td_cbp) + 1542 xfer->ux_length - 1); 1543 data->len = xfer->ux_length; 1544 data->xfer = xfer; 1545 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1546 usb_syncmem(&data->dma, data->offs, sizeof(data->td), 1547 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1548 xfer->ux_hcpriv = data; 1549 xfer->ux_actlen = 0; 1550 1551 sed->ed.ed_tailp = HTOO32(tail->physaddr); 1552 usb_syncmem(&sed->dma, 1553 sed->offs + offsetof(ohci_ed_t, ed_tailp), 1554 sizeof(sed->ed.ed_tailp), 1555 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1556 opipe->tail.td = tail; 1557 } 1558 } 1559 1560 void 1561 ohci_device_bulk_done(struct usbd_xfer *xfer) 1562 { 1563 #ifdef DIAGNOSTIC 1564 ohci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv; 1565 #endif 1566 int isread = 1567 (UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress) == UE_DIR_IN); 1568 1569 KASSERT(mutex_owned(&sc->sc_lock)); 1570 1571 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1572 DPRINTFN(10, "xfer=%p, actlen=%d", xfer, xfer->ux_actlen, 0, 0); 1573 usb_syncmem(&xfer->ux_dmabuf, 0, xfer->ux_length, 1574 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1575 } 1576 1577 Static void 1578 ohci_rhsc_softint(void *arg) 1579 { 1580 ohci_softc_t *sc = arg; 1581 1582 mutex_enter(&sc->sc_lock); 1583 1584 ohci_rhsc(sc, sc->sc_intrxfer); 1585 1586 /* Do not allow RHSC interrupts > 1 per second */ 1587 callout_reset(&sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc); 1588 1589 mutex_exit(&sc->sc_lock); 1590 } 1591 1592 void 1593 ohci_rhsc(ohci_softc_t *sc, struct usbd_xfer *xfer) 1594 { 1595 u_char *p; 1596 int i, m; 1597 int hstatus __unused; 1598 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1599 1600 KASSERT(mutex_owned(&sc->sc_lock)); 1601 1602 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1603 DPRINTF("sc=%p xfer=%p hstatus=0x%08x", sc, xfer, hstatus, 0); 1604 1605 if (xfer == NULL) { 1606 /* Just ignore the change. */ 1607 return; 1608 } 1609 1610 p = xfer->ux_buf; 1611 m = min(sc->sc_noport, xfer->ux_length * 8 - 1); 1612 memset(p, 0, xfer->ux_length); 1613 for (i = 1; i <= m; i++) { 1614 /* Pick out CHANGE bits from the status reg. */ 1615 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1616 p[i/8] |= 1 << (i%8); 1617 } 1618 DPRINTF("change=0x%02x", *p, 0, 0, 0); 1619 xfer->ux_actlen = xfer->ux_length; 1620 xfer->ux_status = USBD_NORMAL_COMPLETION; 1621 1622 usb_transfer_complete(xfer); 1623 } 1624 1625 void 1626 ohci_root_intr_done(struct usbd_xfer *xfer) 1627 { 1628 } 1629 1630 /* 1631 * Wait here until controller claims to have an interrupt. 1632 * Then call ohci_intr and return. Use timeout to avoid waiting 1633 * too long. 1634 */ 1635 void 1636 ohci_waitintr(ohci_softc_t *sc, struct usbd_xfer *xfer) 1637 { 1638 int timo; 1639 uint32_t intrs; 1640 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1641 1642 mutex_enter(&sc->sc_lock); 1643 1644 xfer->ux_status = USBD_IN_PROGRESS; 1645 for (timo = xfer->ux_timeout; timo >= 0; timo--) { 1646 usb_delay_ms(&sc->sc_bus, 1); 1647 if (sc->sc_dying) 1648 break; 1649 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 1650 DPRINTFN(15, "intrs 0x%04x", intrs, 0, 0, 0); 1651 #ifdef OHCI_DEBUG 1652 if (ohcidebug > 15) 1653 ohci_dumpregs(sc); 1654 #endif 1655 if (intrs) { 1656 mutex_spin_enter(&sc->sc_intr_lock); 1657 ohci_intr1(sc); 1658 mutex_spin_exit(&sc->sc_intr_lock); 1659 if (xfer->ux_status != USBD_IN_PROGRESS) 1660 goto done; 1661 } 1662 } 1663 1664 /* Timeout */ 1665 DPRINTF("timeout", 0, 0, 0, 0); 1666 xfer->ux_status = USBD_TIMEOUT; 1667 usb_transfer_complete(xfer); 1668 1669 /* XXX should free TD */ 1670 1671 done: 1672 mutex_exit(&sc->sc_lock); 1673 } 1674 1675 void 1676 ohci_poll(struct usbd_bus *bus) 1677 { 1678 ohci_softc_t *sc = bus->ub_hcpriv; 1679 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1680 1681 #ifdef OHCI_DEBUG 1682 static int last; 1683 int new; 1684 new = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1685 if (new != last) { 1686 DPRINTFN(10, "intrs=0x%04x", new, 0, 0, 0); 1687 last = new; 1688 } 1689 #endif 1690 sc->sc_eintrs |= OHCI_WDH; 1691 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) { 1692 mutex_spin_enter(&sc->sc_intr_lock); 1693 ohci_intr1(sc); 1694 mutex_spin_exit(&sc->sc_intr_lock); 1695 } 1696 } 1697 1698 usbd_status 1699 ohci_device_request(struct usbd_xfer *xfer) 1700 { 1701 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->ux_pipe; 1702 usb_device_request_t *req = &xfer->ux_request; 1703 struct usbd_device *dev = opipe->pipe.up_dev; 1704 ohci_softc_t *sc = dev->ud_bus->ub_hcpriv; 1705 ohci_soft_td_t *setup, *stat, *next, *tail; 1706 ohci_soft_ed_t *sed; 1707 int isread; 1708 int len; 1709 usbd_status err; 1710 1711 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1712 1713 KASSERT(mutex_owned(&sc->sc_lock)); 1714 1715 isread = req->bmRequestType & UT_READ; 1716 len = UGETW(req->wLength); 1717 1718 DPRINTF("type=0x%02x, request=0x%02x, " 1719 "wValue=0x%04x, wIndex=0x%04x", 1720 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1721 UGETW(req->wIndex)); 1722 DPRINTF("len=%d, addr=%d, endpt=%d", 1723 len, dev->ud_addr, 1724 opipe->pipe.up_endpoint->ue_edesc->bEndpointAddress, 0); 1725 1726 setup = opipe->tail.td; 1727 stat = ohci_alloc_std(sc); 1728 if (stat == NULL) { 1729 err = USBD_NOMEM; 1730 goto bad1; 1731 } 1732 tail = ohci_alloc_std(sc); 1733 if (tail == NULL) { 1734 err = USBD_NOMEM; 1735 goto bad2; 1736 } 1737 tail->xfer = NULL; 1738 1739 sed = opipe->sed; 1740 opipe->u.ctl.length = len; 1741 1742 KASSERTMSG(OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)) == dev->ud_addr, 1743 "address ED %d pipe %d\n", 1744 OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)), dev->ud_addr); 1745 KASSERTMSG(OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)) == 1746 UGETW(opipe->pipe.up_endpoint->ue_edesc->wMaxPacketSize), 1747 "MPL ED %d pipe %d\n", 1748 OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)), 1749 UGETW(opipe->pipe.up_endpoint->ue_edesc->wMaxPacketSize)); 1750 1751 next = stat; 1752 1753 /* Set up data transaction */ 1754 if (len != 0) { 1755 ohci_soft_td_t *std = stat; 1756 1757 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 1758 std, &stat); 1759 if (err) { 1760 /* stat is unchanged if error */ 1761 goto bad3; 1762 } 1763 stat = stat->nexttd; /* point at free TD */ 1764 1765 /* Start toggle at 1 and then use the carried toggle. */ 1766 std->td.td_flags &= HTOO32(~OHCI_TD_TOGGLE_MASK); 1767 std->td.td_flags |= HTOO32(OHCI_TD_TOGGLE_1); 1768 usb_syncmem(&std->dma, 1769 std->offs + offsetof(ohci_td_t, td_flags), 1770 sizeof(std->td.td_flags), 1771 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1772 } 1773 1774 memcpy(KERNADDR(&opipe->u.ctl.reqdma, 0), req, sizeof(*req)); 1775 usb_syncmem(&opipe->u.ctl.reqdma, 0, sizeof(*req), BUS_DMASYNC_PREWRITE); 1776 1777 setup->td.td_flags = HTOO32(OHCI_TD_SETUP | OHCI_TD_NOCC | 1778 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1779 setup->td.td_cbp = HTOO32(DMAADDR(&opipe->u.ctl.reqdma, 0)); 1780 setup->nexttd = next; 1781 setup->td.td_nexttd = HTOO32(next->physaddr); 1782 setup->td.td_be = HTOO32(O32TOH(setup->td.td_cbp) + sizeof(*req) - 1); 1783 setup->len = 0; 1784 setup->xfer = xfer; 1785 setup->flags = 0; 1786 xfer->ux_hcpriv = setup; 1787 usb_syncmem(&setup->dma, setup->offs, sizeof(setup->td), 1788 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1789 1790 stat->td.td_flags = HTOO32( 1791 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | 1792 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1793 stat->td.td_cbp = 0; 1794 stat->nexttd = tail; 1795 stat->td.td_nexttd = HTOO32(tail->physaddr); 1796 stat->td.td_be = 0; 1797 stat->flags = OHCI_CALL_DONE; 1798 stat->len = 0; 1799 stat->xfer = xfer; 1800 usb_syncmem(&stat->dma, stat->offs, sizeof(stat->td), 1801 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1802 1803 #ifdef OHCI_DEBUG 1804 USBHIST_LOGN(ohcidebug, 5, "--- dump start ---", 0, 0, 0, 0); 1805 if (ohcidebug > 5) { 1806 ohci_dump_ed(sc, sed); 1807 ohci_dump_tds(sc, setup); 1808 } 1809 USBHIST_LOGN(ohcidebug, 5, "--- dump end ---", 0, 0, 0, 0); 1810 #endif 1811 1812 /* Insert ED in schedule */ 1813 sed->ed.ed_tailp = HTOO32(tail->physaddr); 1814 usb_syncmem(&sed->dma, 1815 sed->offs + offsetof(ohci_ed_t, ed_tailp), 1816 sizeof(sed->ed.ed_tailp), 1817 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1818 opipe->tail.td = tail; 1819 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1820 if (xfer->ux_timeout && !sc->sc_bus.ub_usepolling) { 1821 callout_reset(&xfer->ux_callout, mstohz(xfer->ux_timeout), 1822 ohci_timeout, xfer); 1823 } 1824 1825 #ifdef OHCI_DEBUG 1826 DPRINTFN(20, "--- dump start ---", 0, 0, 0, 0); 1827 if (ohcidebug > 20) { 1828 delay(10000); 1829 DPRINTFN(20, "status=%x", OREAD4(sc, OHCI_COMMAND_STATUS), 1830 0, 0, 0); 1831 ohci_dumpregs(sc); 1832 DPRINTFN(20, "ctrl head:", 0, 0, 0, 0); 1833 ohci_dump_ed(sc, sc->sc_ctrl_head); 1834 DPRINTF("sed:", 0, 0, 0, 0); 1835 ohci_dump_ed(sc, sed); 1836 ohci_dump_tds(sc, setup); 1837 } 1838 DPRINTFN(20, "--- dump start ---", 0, 0, 0, 0); 1839 #endif 1840 1841 return USBD_NORMAL_COMPLETION; 1842 1843 bad3: 1844 ohci_free_std(sc, tail); 1845 bad2: 1846 ohci_free_std(sc, stat); 1847 bad1: 1848 return err; 1849 } 1850 1851 /* 1852 * Add an ED to the schedule. Called with USB lock held. 1853 */ 1854 Static void 1855 ohci_add_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1856 { 1857 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1858 DPRINTFN(8, "sed=%p head=%p", sed, head, 0, 0); 1859 1860 KASSERT(mutex_owned(&sc->sc_lock)); 1861 1862 usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted), 1863 sizeof(head->ed.ed_nexted), 1864 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1865 sed->next = head->next; 1866 sed->ed.ed_nexted = head->ed.ed_nexted; 1867 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted), 1868 sizeof(sed->ed.ed_nexted), 1869 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1870 head->next = sed; 1871 head->ed.ed_nexted = HTOO32(sed->physaddr); 1872 usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted), 1873 sizeof(head->ed.ed_nexted), 1874 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1875 } 1876 1877 /* 1878 * Remove an ED from the schedule. Called with USB lock held. 1879 */ 1880 Static void 1881 ohci_rem_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1882 { 1883 ohci_soft_ed_t *p; 1884 1885 KASSERT(mutex_owned(&sc->sc_lock)); 1886 1887 /* XXX */ 1888 for (p = head; p != NULL && p->next != sed; p = p->next) 1889 ; 1890 if (p == NULL) 1891 panic("ohci_rem_ed: ED not found"); 1892 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted), 1893 sizeof(sed->ed.ed_nexted), 1894 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1895 p->next = sed->next; 1896 p->ed.ed_nexted = sed->ed.ed_nexted; 1897 usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted), 1898 sizeof(p->ed.ed_nexted), 1899 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1900 } 1901 1902 /* 1903 * When a transfer is completed the TD is added to the done queue by 1904 * the host controller. This queue is the processed by software. 1905 * Unfortunately the queue contains the physical address of the TD 1906 * and we have no simple way to translate this back to a kernel address. 1907 * To make the translation possible (and fast) we use a hash table of 1908 * TDs currently in the schedule. The physical address is used as the 1909 * hash value. 1910 */ 1911 1912 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1913 /* Called with USB lock held. */ 1914 void 1915 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1916 { 1917 int h = HASH(std->physaddr); 1918 1919 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1920 1921 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1922 } 1923 1924 /* Called with USB lock held. */ 1925 void 1926 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1927 { 1928 1929 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1930 1931 LIST_REMOVE(std, hnext); 1932 } 1933 1934 ohci_soft_td_t * 1935 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a) 1936 { 1937 int h = HASH(a); 1938 ohci_soft_td_t *std; 1939 1940 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1941 std != NULL; 1942 std = LIST_NEXT(std, hnext)) 1943 if (std->physaddr == a) 1944 return std; 1945 return NULL; 1946 } 1947 1948 /* Called with USB lock held. */ 1949 void 1950 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1951 { 1952 int h = HASH(sitd->physaddr); 1953 1954 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1955 1956 KASSERT(mutex_owned(&sc->sc_lock)); 1957 1958 DPRINTFN(10, "sitd=%p physaddr=0x%08lx", sitd, (u_long)sitd->physaddr, 1959 0, 0); 1960 1961 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext); 1962 } 1963 1964 /* Called with USB lock held. */ 1965 void 1966 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1967 { 1968 1969 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1970 1971 KASSERT(mutex_owned(&sc->sc_lock)); 1972 1973 DPRINTFN(10, "sitd=%p physaddr=0x%08lx", sitd, (u_long)sitd->physaddr, 1974 0, 0); 1975 1976 LIST_REMOVE(sitd, hnext); 1977 } 1978 1979 ohci_soft_itd_t * 1980 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a) 1981 { 1982 int h = HASH(a); 1983 ohci_soft_itd_t *sitd; 1984 1985 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]); 1986 sitd != NULL; 1987 sitd = LIST_NEXT(sitd, hnext)) 1988 if (sitd->physaddr == a) 1989 return sitd; 1990 return NULL; 1991 } 1992 1993 void 1994 ohci_timeout(void *addr) 1995 { 1996 struct ohci_xfer *oxfer = addr; 1997 struct ohci_pipe *opipe = (struct ohci_pipe *)oxfer->xfer.ux_pipe; 1998 ohci_softc_t *sc = opipe->pipe.up_dev->ud_bus->ub_hcpriv; 1999 2000 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2001 DPRINTF("oxfer=%p", oxfer, 0, 0, 0); 2002 2003 if (sc->sc_dying) { 2004 mutex_enter(&sc->sc_lock); 2005 ohci_abort_xfer(&oxfer->xfer, USBD_TIMEOUT); 2006 mutex_exit(&sc->sc_lock); 2007 return; 2008 } 2009 2010 /* Execute the abort in a process context. */ 2011 usb_init_task(&oxfer->abort_task, ohci_timeout_task, addr, 2012 USB_TASKQ_MPSAFE); 2013 usb_add_task(oxfer->xfer.ux_pipe->up_dev, &oxfer->abort_task, 2014 USB_TASKQ_HC); 2015 } 2016 2017 void 2018 ohci_timeout_task(void *addr) 2019 { 2020 struct usbd_xfer *xfer = addr; 2021 ohci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv; 2022 2023 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2024 2025 DPRINTF("xfer=%p", xfer, 0, 0, 0); 2026 2027 mutex_enter(&sc->sc_lock); 2028 ohci_abort_xfer(xfer, USBD_TIMEOUT); 2029 mutex_exit(&sc->sc_lock); 2030 } 2031 2032 #ifdef OHCI_DEBUG 2033 void 2034 ohci_dump_tds(ohci_softc_t *sc, ohci_soft_td_t *std) 2035 { 2036 for (; std; std = std->nexttd) 2037 ohci_dump_td(sc, std); 2038 } 2039 2040 void 2041 ohci_dump_td(ohci_softc_t *sc, ohci_soft_td_t *std) 2042 { 2043 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2044 2045 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 2046 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2047 2048 uint32_t flags = O32TOH(std->td.td_flags); 2049 DPRINTF("TD(%p) at %08lx:", std, (u_long)std->physaddr, 0, 0); 2050 DPRINTF(" round=%d DP=%x DI=%x T=%x", 2051 !!(flags & OHCI_TD_R), 2052 __SHIFTOUT(flags, OHCI_TD_DP_MASK), 2053 OHCI_TD_GET_DI(flags), 2054 __SHIFTOUT(flags, OHCI_TD_TOGGLE_MASK)); 2055 DPRINTF(" EC=%d CC=%d", OHCI_TD_GET_EC(flags), OHCI_TD_GET_CC(flags), 2056 0, 0); 2057 DPRINTF(" cbp=0x%08lx nexttd=0x%08lx be=0x%08lx", 2058 (u_long)O32TOH(std->td.td_cbp), 2059 (u_long)O32TOH(std->td.td_nexttd), 2060 (u_long)O32TOH(std->td.td_be), 0); 2061 } 2062 2063 void 2064 ohci_dump_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 2065 { 2066 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2067 2068 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 2069 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2070 2071 uint32_t flags = O32TOH(sitd->itd.itd_flags); 2072 DPRINTF("ITD(%p) at %08lx", sitd, (u_long)sitd->physaddr, 0, 0); 2073 DPRINTF(" sf=%d di=%d fc=%d cc=%d", 2074 OHCI_ITD_GET_SF(flags), OHCI_ITD_GET_DI(flags), 2075 OHCI_ITD_GET_FC(flags), OHCI_ITD_GET_CC(flags)); 2076 DPRINTF(" bp0=0x%08x next=0x%08x be=0x%08x", 2077 O32TOH(sitd->itd.itd_bp0), 2078 O32TOH(sitd->itd.itd_nextitd), 2079 O32TOH(sitd->itd.itd_be), 0); 2080 CTASSERT(OHCI_ITD_NOFFSET == 8); 2081 DPRINTF(" offs[0] = 0x%04x offs[1] = 0x%04x " 2082 "offs[2] = 0x%04x offs[3] = 0x%04x", 2083 O16TOH(sitd->itd.itd_offset[0]), 2084 O16TOH(sitd->itd.itd_offset[1]), 2085 O16TOH(sitd->itd.itd_offset[2]), 2086 O16TOH(sitd->itd.itd_offset[3])); 2087 DPRINTF(" offs[4] = 0x%04x offs[5] = 0x%04x " 2088 "offs[6] = 0x%04x offs[7] = 0x%04x", 2089 O16TOH(sitd->itd.itd_offset[4]), 2090 O16TOH(sitd->itd.itd_offset[5]), 2091 O16TOH(sitd->itd.itd_offset[6]), 2092 O16TOH(sitd->itd.itd_offset[7])); 2093 } 2094 2095 void 2096 ohci_dump_itds(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 2097 { 2098 for (; sitd; sitd = sitd->nextitd) 2099 ohci_dump_itd(sc, sitd); 2100 } 2101 2102 void 2103 ohci_dump_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 2104 { 2105 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2106 2107 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 2108 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2109 2110 uint32_t flags = O32TOH(sed->ed.ed_flags); 2111 DPRINTF("ED(%p) at 0x%08lx:", sed, sed->physaddr, 0, 0); 2112 DPRINTF(" addr=%d endpt=%d maxp=%d", 2113 OHCI_ED_GET_FA(flags), 2114 OHCI_ED_GET_EN(flags), 2115 OHCI_ED_GET_MAXP(flags), 2116 0); 2117 DPRINTF(" dir=%d speed=%d skip=%d iso=%d", 2118 __SHIFTOUT(flags, OHCI_ED_DIR_MASK), 2119 !!(flags & OHCI_ED_SPEED), 2120 !!(flags & OHCI_ED_SKIP), 2121 !!(flags & OHCI_ED_FORMAT_ISO)); 2122 DPRINTF(" tailp=0x%08lx", (u_long)O32TOH(sed->ed.ed_tailp), 2123 0, 0, 0); 2124 DPRINTF(" headp=0x%08lx nexted=0x%08lx halted=%d carry=%d", 2125 O32TOH(sed->ed.ed_headp), O32TOH(sed->ed.ed_nexted), 2126 !!(O32TOH(sed->ed.ed_headp) & OHCI_HALTED), 2127 !!(O32TOH(sed->ed.ed_headp) & OHCI_TOGGLECARRY)); 2128 } 2129 #endif 2130 2131 usbd_status 2132 ohci_open(struct usbd_pipe *pipe) 2133 { 2134 struct usbd_device *dev = pipe->up_dev; 2135 struct usbd_bus *bus = dev->ud_bus; 2136 ohci_softc_t *sc = dev->ud_bus->ub_hcpriv; 2137 usb_endpoint_descriptor_t *ed = pipe->up_endpoint->ue_edesc; 2138 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2139 uint8_t addr = dev->ud_addr; 2140 uint8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 2141 ohci_soft_ed_t *sed; 2142 ohci_soft_td_t *std; 2143 ohci_soft_itd_t *sitd; 2144 ohci_physaddr_t tdphys; 2145 uint32_t fmt; 2146 usbd_status err = USBD_NOMEM; 2147 int ival; 2148 2149 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2150 DPRINTFN(1, "pipe=%p, addr=%d, endpt=%d (%d)", pipe, addr, 2151 ed->bEndpointAddress, bus->ub_rhaddr); 2152 2153 if (sc->sc_dying) { 2154 return USBD_IOERROR; 2155 } 2156 2157 std = NULL; 2158 sed = NULL; 2159 2160 if (addr == bus->ub_rhaddr) { 2161 switch (ed->bEndpointAddress) { 2162 case USB_CONTROL_ENDPOINT: 2163 pipe->up_methods = &roothub_ctrl_methods; 2164 break; 2165 case UE_DIR_IN | USBROOTHUB_INTR_ENDPT: 2166 pipe->up_methods = &ohci_root_intr_methods; 2167 break; 2168 default: 2169 err = USBD_INVAL; 2170 goto bad; 2171 } 2172 } else { 2173 sed = ohci_alloc_sed(sc); 2174 if (sed == NULL) 2175 goto bad; 2176 opipe->sed = sed; 2177 if (xfertype == UE_ISOCHRONOUS) { 2178 mutex_enter(&sc->sc_lock); 2179 sitd = ohci_alloc_sitd(sc); 2180 mutex_exit(&sc->sc_lock); 2181 if (sitd == NULL) 2182 goto bad; 2183 2184 opipe->tail.itd = sitd; 2185 tdphys = sitd->physaddr; 2186 fmt = OHCI_ED_FORMAT_ISO; 2187 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 2188 fmt |= OHCI_ED_DIR_IN; 2189 else 2190 fmt |= OHCI_ED_DIR_OUT; 2191 } else { 2192 mutex_enter(&sc->sc_lock); 2193 std = ohci_alloc_std(sc); 2194 mutex_exit(&sc->sc_lock); 2195 if (std == NULL) 2196 goto bad; 2197 2198 opipe->tail.td = std; 2199 tdphys = std->physaddr; 2200 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD; 2201 } 2202 sed->ed.ed_flags = HTOO32( 2203 OHCI_ED_SET_FA(addr) | 2204 OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) | 2205 (dev->ud_speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) | 2206 fmt | 2207 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 2208 sed->ed.ed_headp = HTOO32(tdphys | 2209 (pipe->up_endpoint->ue_toggle ? OHCI_TOGGLECARRY : 0)); 2210 sed->ed.ed_tailp = HTOO32(tdphys); 2211 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 2212 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2213 2214 switch (xfertype) { 2215 case UE_CONTROL: 2216 pipe->up_methods = &ohci_device_ctrl_methods; 2217 err = usb_allocmem(&sc->sc_bus, 2218 sizeof(usb_device_request_t), 2219 0, &opipe->u.ctl.reqdma); 2220 if (err) 2221 goto bad; 2222 mutex_enter(&sc->sc_lock); 2223 ohci_add_ed(sc, sed, sc->sc_ctrl_head); 2224 mutex_exit(&sc->sc_lock); 2225 break; 2226 case UE_INTERRUPT: 2227 pipe->up_methods = &ohci_device_intr_methods; 2228 ival = pipe->up_interval; 2229 if (ival == USBD_DEFAULT_INTERVAL) 2230 ival = ed->bInterval; 2231 err = ohci_device_setintr(sc, opipe, ival); 2232 if (err) 2233 goto bad; 2234 break; 2235 case UE_ISOCHRONOUS: 2236 pipe->up_methods = &ohci_device_isoc_methods; 2237 return ohci_setup_isoc(pipe); 2238 case UE_BULK: 2239 pipe->up_methods = &ohci_device_bulk_methods; 2240 mutex_enter(&sc->sc_lock); 2241 ohci_add_ed(sc, sed, sc->sc_bulk_head); 2242 mutex_exit(&sc->sc_lock); 2243 break; 2244 } 2245 } 2246 2247 return USBD_NORMAL_COMPLETION; 2248 2249 bad: 2250 if (std != NULL) { 2251 mutex_enter(&sc->sc_lock); 2252 ohci_free_std(sc, std); 2253 mutex_exit(&sc->sc_lock); 2254 } 2255 if (sed != NULL) 2256 ohci_free_sed(sc, sed); 2257 return err; 2258 2259 } 2260 2261 /* 2262 * Close a reqular pipe. 2263 * Assumes that there are no pending transactions. 2264 */ 2265 void 2266 ohci_close_pipe(struct usbd_pipe *pipe, ohci_soft_ed_t *head) 2267 { 2268 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2269 ohci_softc_t *sc = pipe->up_dev->ud_bus->ub_hcpriv; 2270 ohci_soft_ed_t *sed = opipe->sed; 2271 2272 KASSERT(mutex_owned(&sc->sc_lock)); 2273 2274 #ifdef DIAGNOSTIC 2275 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 2276 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2277 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) { 2278 ohci_soft_td_t *std; 2279 std = ohci_hash_find_td(sc, O32TOH(sed->ed.ed_headp)); 2280 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 2281 "tl=0x%x pipe=%p, std=%p\n", sed, 2282 (int)O32TOH(sed->ed.ed_headp), 2283 (int)O32TOH(sed->ed.ed_tailp), 2284 pipe, std); 2285 #ifdef OHCI_DEBUG 2286 usbd_dump_pipe(&opipe->pipe); 2287 ohci_dump_ed(sc, sed); 2288 if (std) 2289 ohci_dump_td(sc, std); 2290 #endif 2291 usb_delay_ms(&sc->sc_bus, 2); 2292 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2293 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) 2294 printf("ohci_close_pipe: pipe still not empty\n"); 2295 } 2296 #endif 2297 ohci_rem_ed(sc, sed, head); 2298 /* Make sure the host controller is not touching this ED */ 2299 usb_delay_ms(&sc->sc_bus, 1); 2300 pipe->up_endpoint->ue_toggle = 2301 (O32TOH(sed->ed.ed_headp) & OHCI_TOGGLECARRY) ? 1 : 0; 2302 ohci_free_sed(sc, opipe->sed); 2303 } 2304 2305 /* 2306 * Abort a device request. 2307 * If this routine is called at splusb() it guarantees that the request 2308 * will be removed from the hardware scheduling and that the callback 2309 * for it will be called with USBD_CANCELLED status. 2310 * It's impossible to guarantee that the requested transfer will not 2311 * have happened since the hardware runs concurrently. 2312 * If the transaction has already happened we rely on the ordinary 2313 * interrupt processing to process it. 2314 * XXX This is most probably wrong. 2315 * XXXMRG this doesn't make sense anymore. 2316 */ 2317 void 2318 ohci_abort_xfer(struct usbd_xfer *xfer, usbd_status status) 2319 { 2320 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->ux_pipe; 2321 ohci_softc_t *sc = opipe->pipe.up_dev->ud_bus->ub_hcpriv; 2322 ohci_soft_ed_t *sed = opipe->sed; 2323 ohci_soft_td_t *p, *n; 2324 ohci_physaddr_t headp; 2325 int hit; 2326 int wake; 2327 2328 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2329 DPRINTF("xfer=%p pipe=%p sed=%p", xfer, opipe,sed, 0); 2330 2331 KASSERT(mutex_owned(&sc->sc_lock)); 2332 ASSERT_SLEEPABLE(); 2333 2334 if (sc->sc_dying) { 2335 /* If we're dying, just do the software part. */ 2336 xfer->ux_status = status; /* make software ignore it */ 2337 callout_halt(&xfer->ux_callout, &sc->sc_lock); 2338 usb_transfer_complete(xfer); 2339 return; 2340 } 2341 2342 /* 2343 * If an abort is already in progress then just wait for it to 2344 * complete and return. 2345 */ 2346 if (xfer->ux_hcflags & UXFER_ABORTING) { 2347 DPRINTFN(2, "already aborting", 0, 0, 0, 0); 2348 #ifdef DIAGNOSTIC 2349 if (status == USBD_TIMEOUT) 2350 printf("%s: TIMEOUT while aborting\n", __func__); 2351 #endif 2352 /* Override the status which might be USBD_TIMEOUT. */ 2353 xfer->ux_status = status; 2354 DPRINTFN(2, "waiting for abort to finish", 0, 0, 0, 0); 2355 xfer->ux_hcflags |= UXFER_ABORTWAIT; 2356 while (xfer->ux_hcflags & UXFER_ABORTING) 2357 cv_wait(&xfer->ux_hccv, &sc->sc_lock); 2358 goto done; 2359 } 2360 xfer->ux_hcflags |= UXFER_ABORTING; 2361 2362 /* 2363 * Step 1: Make interrupt routine and hardware ignore xfer. 2364 */ 2365 xfer->ux_status = status; /* make software ignore it */ 2366 callout_stop(&xfer->ux_callout); 2367 DPRINTFN(1, "stop ed=%p", sed, 0, 0, 0); 2368 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2369 sizeof(sed->ed.ed_flags), 2370 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2371 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */ 2372 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2373 sizeof(sed->ed.ed_flags), 2374 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2375 2376 /* 2377 * Step 2: Wait until we know hardware has finished any possible 2378 * use of the xfer. Also make sure the soft interrupt routine 2379 * has run. 2380 */ 2381 /* Hardware finishes in 1ms */ 2382 usb_delay_ms_locked(opipe->pipe.up_dev->ud_bus, 20, &sc->sc_lock); 2383 sc->sc_softwake = 1; 2384 usb_schedsoftintr(&sc->sc_bus); 2385 cv_wait(&sc->sc_softwake_cv, &sc->sc_lock); 2386 2387 /* 2388 * Step 3: Remove any vestiges of the xfer from the hardware. 2389 * The complication here is that the hardware may have executed 2390 * beyond the xfer we're trying to abort. So as we're scanning 2391 * the TDs of this xfer we check if the hardware points to 2392 * any of them. 2393 */ 2394 p = xfer->ux_hcpriv; 2395 #ifdef DIAGNOSTIC 2396 if (p == NULL) { 2397 xfer->ux_hcflags &= ~UXFER_ABORTING; /* XXX */ 2398 printf("ohci_abort_xfer: hcpriv is NULL\n"); 2399 goto done; 2400 } 2401 #endif 2402 #ifdef OHCI_DEBUG 2403 DPRINTF("--- dump start ---", 0, 0, 0, 0); 2404 2405 if (ohcidebug > 1) { 2406 DPRINTF("sed:", 0, 0, 0, 0); 2407 ohci_dump_ed(sc, sed); 2408 ohci_dump_tds(sc, p); 2409 } 2410 DPRINTF("--- dump end ---", 0, 0, 0, 0); 2411 #endif 2412 headp = O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK; 2413 hit = 0; 2414 for (; p->xfer == xfer; p = n) { 2415 hit |= headp == p->physaddr; 2416 n = p->nexttd; 2417 ohci_free_std(sc, p); 2418 } 2419 /* Zap headp register if hardware pointed inside the xfer. */ 2420 if (hit) { 2421 DPRINTFN(1, "set hd=0x%08x, tl=0x%08x", (int)p->physaddr, 2422 (int)O32TOH(sed->ed.ed_tailp), 0, 0); 2423 sed->ed.ed_headp = HTOO32(p->physaddr); /* unlink TDs */ 2424 usb_syncmem(&sed->dma, 2425 sed->offs + offsetof(ohci_ed_t, ed_headp), 2426 sizeof(sed->ed.ed_headp), 2427 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2428 } else { 2429 DPRINTFN(1, "no hit", 0, 0, 0, 0); 2430 } 2431 2432 /* 2433 * Step 4: Turn on hardware again. 2434 */ 2435 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2436 sizeof(sed->ed.ed_flags), 2437 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2438 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */ 2439 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2440 sizeof(sed->ed.ed_flags), 2441 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2442 2443 /* 2444 * Step 5: Execute callback. 2445 */ 2446 wake = xfer->ux_hcflags & UXFER_ABORTWAIT; 2447 xfer->ux_hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT); 2448 usb_transfer_complete(xfer); 2449 if (wake) 2450 cv_broadcast(&xfer->ux_hccv); 2451 2452 done: 2453 KASSERT(mutex_owned(&sc->sc_lock)); 2454 } 2455 2456 /* 2457 * Data structures and routines to emulate the root hub. 2458 */ 2459 Static int 2460 ohci_roothub_ctrl(struct usbd_bus *bus, usb_device_request_t *req, 2461 void *buf, int buflen) 2462 { 2463 ohci_softc_t *sc = bus->ub_hcpriv; 2464 usb_port_status_t ps; 2465 uint16_t len, value, index; 2466 int l, totlen = 0; 2467 int port, i; 2468 uint32_t v; 2469 2470 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2471 2472 if (sc->sc_dying) 2473 return -1; 2474 2475 DPRINTFN(4, "type=0x%02x request=%02x", req->bmRequestType, 2476 req->bRequest, 0, 0); 2477 2478 len = UGETW(req->wLength); 2479 value = UGETW(req->wValue); 2480 index = UGETW(req->wIndex); 2481 2482 #define C(x,y) ((x) | ((y) << 8)) 2483 switch (C(req->bRequest, req->bmRequestType)) { 2484 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2485 DPRINTFN(8, "wValue=0x%04x", value, 0, 0, 0); 2486 if (len == 0) 2487 break; 2488 switch (value) { 2489 case C(0, UDESC_DEVICE): { 2490 usb_device_descriptor_t devd; 2491 2492 totlen = min(buflen, sizeof(devd)); 2493 memcpy(&devd, buf, totlen); 2494 USETW(devd.idVendor, sc->sc_id_vendor); 2495 memcpy(buf, &devd, totlen); 2496 break; 2497 } 2498 case C(1, UDESC_STRING): 2499 #define sd ((usb_string_descriptor_t *)buf) 2500 /* Vendor */ 2501 totlen = usb_makestrdesc(sd, len, sc->sc_vendor); 2502 break; 2503 case C(2, UDESC_STRING): 2504 /* Product */ 2505 totlen = usb_makestrdesc(sd, len, "OHCI root hub"); 2506 break; 2507 #undef sd 2508 default: 2509 /* default from usbroothub */ 2510 return buflen; 2511 } 2512 break; 2513 2514 /* Hub requests */ 2515 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2516 break; 2517 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2518 DPRINTFN(8, "UR_CLEAR_PORT_FEATURE port=%d feature=%d", 2519 index, value, 0, 0); 2520 if (index < 1 || index > sc->sc_noport) { 2521 return -1; 2522 } 2523 port = OHCI_RH_PORT_STATUS(index); 2524 switch(value) { 2525 case UHF_PORT_ENABLE: 2526 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2527 break; 2528 case UHF_PORT_SUSPEND: 2529 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2530 break; 2531 case UHF_PORT_POWER: 2532 /* Yes, writing to the LOW_SPEED bit clears power. */ 2533 OWRITE4(sc, port, UPS_LOW_SPEED); 2534 break; 2535 case UHF_C_PORT_CONNECTION: 2536 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2537 break; 2538 case UHF_C_PORT_ENABLE: 2539 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2540 break; 2541 case UHF_C_PORT_SUSPEND: 2542 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2543 break; 2544 case UHF_C_PORT_OVER_CURRENT: 2545 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2546 break; 2547 case UHF_C_PORT_RESET: 2548 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2549 break; 2550 default: 2551 return -1; 2552 } 2553 switch(value) { 2554 case UHF_C_PORT_CONNECTION: 2555 case UHF_C_PORT_ENABLE: 2556 case UHF_C_PORT_SUSPEND: 2557 case UHF_C_PORT_OVER_CURRENT: 2558 case UHF_C_PORT_RESET: 2559 /* Enable RHSC interrupt if condition is cleared. */ 2560 if ((OREAD4(sc, port) >> 16) == 0) 2561 ohci_rhsc_enable(sc); 2562 break; 2563 default: 2564 break; 2565 } 2566 break; 2567 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2568 if (len == 0) 2569 break; 2570 if ((value & 0xff) != 0) { 2571 return -1; 2572 } 2573 usb_hub_descriptor_t hubd; 2574 2575 totlen = min(buflen, sizeof(hubd)); 2576 memcpy(&hubd, buf, totlen); 2577 2578 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2579 hubd.bNbrPorts = sc->sc_noport; 2580 USETW(hubd.wHubCharacteristics, 2581 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2582 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2583 /* XXX overcurrent */ 2584 ); 2585 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2586 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2587 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2588 hubd.DeviceRemovable[i++] = (uint8_t)v; 2589 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2590 totlen = min(totlen, hubd.bDescLength); 2591 memcpy(buf, &hubd, totlen); 2592 break; 2593 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2594 if (len != 4) { 2595 return -1; 2596 } 2597 memset(buf, 0, len); /* ? XXX */ 2598 totlen = len; 2599 break; 2600 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2601 DPRINTFN(8, "get port status i=%d", index, 0, 0, 0); 2602 if (index < 1 || index > sc->sc_noport) { 2603 return -1; 2604 } 2605 if (len != 4) { 2606 return -1; 2607 } 2608 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2609 DPRINTFN(8, "port status=0x%04x", v, 0, 0, 0); 2610 USETW(ps.wPortStatus, v); 2611 USETW(ps.wPortChange, v >> 16); 2612 totlen = min(len, sizeof(ps)); 2613 memcpy(buf, &ps, totlen); 2614 break; 2615 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2616 return -1; 2617 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2618 break; 2619 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2620 if (index < 1 || index > sc->sc_noport) { 2621 return -1; 2622 } 2623 port = OHCI_RH_PORT_STATUS(index); 2624 switch(value) { 2625 case UHF_PORT_ENABLE: 2626 OWRITE4(sc, port, UPS_PORT_ENABLED); 2627 break; 2628 case UHF_PORT_SUSPEND: 2629 OWRITE4(sc, port, UPS_SUSPEND); 2630 break; 2631 case UHF_PORT_RESET: 2632 DPRINTFN(5, "reset port %d", index, 0, 0, 0); 2633 OWRITE4(sc, port, UPS_RESET); 2634 for (i = 0; i < 5; i++) { 2635 usb_delay_ms(&sc->sc_bus, 2636 USB_PORT_ROOT_RESET_DELAY); 2637 if (sc->sc_dying) { 2638 return -1; 2639 } 2640 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2641 break; 2642 } 2643 DPRINTFN(8, "port %d reset, status = 0x%04x", index, 2644 OREAD4(sc, port), 0, 0); 2645 break; 2646 case UHF_PORT_POWER: 2647 DPRINTFN(2, "set port power %d", index, 0, 0, 0); 2648 OWRITE4(sc, port, UPS_PORT_POWER); 2649 break; 2650 default: 2651 return -1; 2652 } 2653 break; 2654 default: 2655 /* default from usbroothub */ 2656 return buflen; 2657 } 2658 2659 return totlen; 2660 } 2661 2662 Static usbd_status 2663 ohci_root_intr_transfer(struct usbd_xfer *xfer) 2664 { 2665 ohci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv; 2666 usbd_status err; 2667 2668 /* Insert last in queue. */ 2669 mutex_enter(&sc->sc_lock); 2670 err = usb_insert_transfer(xfer); 2671 mutex_exit(&sc->sc_lock); 2672 if (err) 2673 return err; 2674 2675 /* Pipe isn't running, start first */ 2676 return ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 2677 } 2678 2679 Static usbd_status 2680 ohci_root_intr_start(struct usbd_xfer *xfer) 2681 { 2682 struct usbd_pipe *pipe = xfer->ux_pipe; 2683 ohci_softc_t *sc = pipe->up_dev->ud_bus->ub_hcpriv; 2684 2685 if (sc->sc_dying) 2686 return USBD_IOERROR; 2687 2688 mutex_enter(&sc->sc_lock); 2689 KASSERT(sc->sc_intrxfer == NULL); 2690 sc->sc_intrxfer = xfer; 2691 mutex_exit(&sc->sc_lock); 2692 2693 return USBD_IN_PROGRESS; 2694 } 2695 2696 /* Abort a root interrupt request. */ 2697 Static void 2698 ohci_root_intr_abort(struct usbd_xfer *xfer) 2699 { 2700 ohci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv; 2701 2702 KASSERT(mutex_owned(&sc->sc_lock)); 2703 KASSERT(xfer->ux_pipe->up_intrxfer == xfer); 2704 2705 sc->sc_intrxfer = NULL; 2706 2707 xfer->ux_status = USBD_CANCELLED; 2708 usb_transfer_complete(xfer); 2709 } 2710 2711 /* Close the root pipe. */ 2712 Static void 2713 ohci_root_intr_close(struct usbd_pipe *pipe) 2714 { 2715 ohci_softc_t *sc = pipe->up_dev->ud_bus->ub_hcpriv; 2716 2717 KASSERT(mutex_owned(&sc->sc_lock)); 2718 2719 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2720 2721 sc->sc_intrxfer = NULL; 2722 } 2723 2724 /************************/ 2725 2726 Static usbd_status 2727 ohci_device_ctrl_transfer(struct usbd_xfer *xfer) 2728 { 2729 ohci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv; 2730 usbd_status err; 2731 2732 /* Insert last in queue. */ 2733 mutex_enter(&sc->sc_lock); 2734 err = usb_insert_transfer(xfer); 2735 mutex_exit(&sc->sc_lock); 2736 if (err) 2737 return err; 2738 2739 /* Pipe isn't running, start first */ 2740 return ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 2741 } 2742 2743 Static usbd_status 2744 ohci_device_ctrl_start(struct usbd_xfer *xfer) 2745 { 2746 ohci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv; 2747 usbd_status err; 2748 2749 if (sc->sc_dying) 2750 return USBD_IOERROR; 2751 2752 #ifdef DIAGNOSTIC 2753 if (!(xfer->ux_rqflags & URQ_REQUEST)) { 2754 /* XXX panic */ 2755 printf("ohci_device_ctrl_transfer: not a request\n"); 2756 return USBD_INVAL; 2757 } 2758 #endif 2759 2760 mutex_enter(&sc->sc_lock); 2761 err = ohci_device_request(xfer); 2762 mutex_exit(&sc->sc_lock); 2763 if (err) 2764 return err; 2765 2766 if (sc->sc_bus.ub_usepolling) 2767 ohci_waitintr(sc, xfer); 2768 return USBD_IN_PROGRESS; 2769 } 2770 2771 /* Abort a device control request. */ 2772 Static void 2773 ohci_device_ctrl_abort(struct usbd_xfer *xfer) 2774 { 2775 #ifdef DIAGNOSTIC 2776 ohci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv; 2777 #endif 2778 2779 KASSERT(mutex_owned(&sc->sc_lock)); 2780 2781 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2782 DPRINTF("xfer=%p", xfer, 0, 0, 0); 2783 ohci_abort_xfer(xfer, USBD_CANCELLED); 2784 } 2785 2786 /* Close a device control pipe. */ 2787 Static void 2788 ohci_device_ctrl_close(struct usbd_pipe *pipe) 2789 { 2790 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2791 ohci_softc_t *sc = pipe->up_dev->ud_bus->ub_hcpriv; 2792 2793 KASSERT(mutex_owned(&sc->sc_lock)); 2794 2795 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2796 DPRINTF("pipe=%p", pipe, 0, 0, 0); 2797 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2798 ohci_free_std(sc, opipe->tail.td); 2799 } 2800 2801 /************************/ 2802 2803 Static void 2804 ohci_device_clear_toggle(struct usbd_pipe *pipe) 2805 { 2806 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2807 ohci_softc_t *sc = pipe->up_dev->ud_bus->ub_hcpriv; 2808 2809 opipe->sed->ed.ed_headp &= HTOO32(~OHCI_TOGGLECARRY); 2810 } 2811 2812 Static void 2813 ohci_noop(struct usbd_pipe *pipe) 2814 { 2815 } 2816 2817 Static usbd_status 2818 ohci_device_bulk_transfer(struct usbd_xfer *xfer) 2819 { 2820 ohci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv; 2821 usbd_status err; 2822 2823 /* Insert last in queue. */ 2824 mutex_enter(&sc->sc_lock); 2825 err = usb_insert_transfer(xfer); 2826 mutex_exit(&sc->sc_lock); 2827 if (err) 2828 return err; 2829 2830 /* Pipe isn't running, start first */ 2831 return ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 2832 } 2833 2834 Static usbd_status 2835 ohci_device_bulk_start(struct usbd_xfer *xfer) 2836 { 2837 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->ux_pipe; 2838 struct usbd_device *dev = opipe->pipe.up_dev; 2839 ohci_softc_t *sc = dev->ud_bus->ub_hcpriv; 2840 int addr = dev->ud_addr; 2841 ohci_soft_td_t *data, *tail, *tdp; 2842 ohci_soft_ed_t *sed; 2843 int len, isread, endpt; 2844 usbd_status err; 2845 2846 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2847 2848 if (sc->sc_dying) 2849 return USBD_IOERROR; 2850 2851 #ifdef DIAGNOSTIC 2852 if (xfer->ux_rqflags & URQ_REQUEST) { 2853 /* XXX panic */ 2854 printf("ohci_device_bulk_start: a request\n"); 2855 return USBD_INVAL; 2856 } 2857 #endif 2858 2859 mutex_enter(&sc->sc_lock); 2860 2861 len = xfer->ux_length; 2862 endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress; 2863 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2864 sed = opipe->sed; 2865 2866 DPRINTFN(4, "xfer=%p len=%d isread=%d flags=%d", xfer, len, isread, 2867 xfer->ux_flags); 2868 DPRINTFN(4, "endpt=%d", endpt, 0, 0, 0); 2869 2870 opipe->u.bulk.isread = isread; 2871 opipe->u.bulk.length = len; 2872 2873 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 2874 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2875 /* Update device address */ 2876 sed->ed.ed_flags = HTOO32( 2877 (O32TOH(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) | 2878 OHCI_ED_SET_FA(addr)); 2879 2880 /* Allocate a chain of new TDs (including a new tail). */ 2881 data = opipe->tail.td; 2882 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 2883 data, &tail); 2884 if (err) 2885 return err; 2886 2887 /* We want interrupt at the end of the transfer. */ 2888 tail->td.td_flags &= HTOO32(~OHCI_TD_INTR_MASK); 2889 tail->td.td_flags |= HTOO32(OHCI_TD_SET_DI(1)); 2890 tail->flags |= OHCI_CALL_DONE; 2891 tail = tail->nexttd; /* point at sentinel */ 2892 usb_syncmem(&tail->dma, tail->offs + offsetof(ohci_td_t, td_flags), 2893 sizeof(tail->td.td_flags), 2894 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2895 if (err) { 2896 mutex_exit(&sc->sc_lock); 2897 return err; 2898 } 2899 2900 tail->xfer = NULL; 2901 xfer->ux_hcpriv = data; 2902 2903 DPRINTFN(4, "ed_flags=0x%08x td_flags=0x%08x " 2904 "td_cbp=0x%08x td_be=0x%08x", 2905 (int)O32TOH(sed->ed.ed_flags), 2906 (int)O32TOH(data->td.td_flags), 2907 (int)O32TOH(data->td.td_cbp), 2908 (int)O32TOH(data->td.td_be)); 2909 2910 #ifdef OHCI_DEBUG 2911 DPRINTFN(5, "--- dump start ---", 0, 0, 0, 0); 2912 if (ohcidebug > 5) { 2913 ohci_dump_ed(sc, sed); 2914 ohci_dump_tds(sc, data); 2915 } 2916 DPRINTFN(5, "--- dump end ---", 0, 0, 0, 0); 2917 #endif 2918 2919 /* Insert ED in schedule */ 2920 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 2921 tdp->xfer = xfer; 2922 } 2923 sed->ed.ed_tailp = HTOO32(tail->physaddr); 2924 opipe->tail.td = tail; 2925 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 2926 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 2927 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2928 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 2929 if (xfer->ux_timeout && !sc->sc_bus.ub_usepolling) { 2930 callout_reset(&xfer->ux_callout, mstohz(xfer->ux_timeout), 2931 ohci_timeout, xfer); 2932 } 2933 mutex_exit(&sc->sc_lock); 2934 2935 #if 0 2936 /* This goes wrong if we are too slow. */ 2937 if (ohcidebug > 10) { 2938 delay(10000); 2939 DPRINTF("status=%x", OREAD4(sc, OHCI_COMMAND_STATUS), 2940 0, 0, 0); 2941 ohci_dump_ed(sc, sed); 2942 ohci_dump_tds(sc, data); 2943 } 2944 #endif 2945 2946 return USBD_IN_PROGRESS; 2947 } 2948 2949 Static void 2950 ohci_device_bulk_abort(struct usbd_xfer *xfer) 2951 { 2952 #ifdef DIAGNOSTIC 2953 ohci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv; 2954 #endif 2955 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2956 2957 KASSERT(mutex_owned(&sc->sc_lock)); 2958 2959 DPRINTF("xfer=%p", xfer, 0, 0, 0); 2960 ohci_abort_xfer(xfer, USBD_CANCELLED); 2961 } 2962 2963 /* 2964 * Close a device bulk pipe. 2965 */ 2966 Static void 2967 ohci_device_bulk_close(struct usbd_pipe *pipe) 2968 { 2969 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2970 ohci_softc_t *sc = pipe->up_dev->ud_bus->ub_hcpriv; 2971 2972 KASSERT(mutex_owned(&sc->sc_lock)); 2973 2974 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2975 2976 DPRINTF("pipe=%p", pipe, 0, 0, 0); 2977 ohci_close_pipe(pipe, sc->sc_bulk_head); 2978 ohci_free_std(sc, opipe->tail.td); 2979 } 2980 2981 /************************/ 2982 2983 Static usbd_status 2984 ohci_device_intr_transfer(struct usbd_xfer *xfer) 2985 { 2986 ohci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv; 2987 usbd_status err; 2988 2989 /* Insert last in queue. */ 2990 mutex_enter(&sc->sc_lock); 2991 err = usb_insert_transfer(xfer); 2992 mutex_exit(&sc->sc_lock); 2993 if (err) 2994 return err; 2995 2996 /* Pipe isn't running, start first */ 2997 return ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 2998 } 2999 3000 Static usbd_status 3001 ohci_device_intr_start(struct usbd_xfer *xfer) 3002 { 3003 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->ux_pipe; 3004 struct usbd_device *dev = opipe->pipe.up_dev; 3005 ohci_softc_t *sc = dev->ud_bus->ub_hcpriv; 3006 ohci_soft_ed_t *sed = opipe->sed; 3007 ohci_soft_td_t *data, *tail; 3008 int len, isread, endpt; 3009 3010 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3011 3012 if (sc->sc_dying) 3013 return USBD_IOERROR; 3014 3015 DPRINTFN(3, "xfer=%p len=%d flags=%d priv=%p", xfer, xfer->ux_length, 3016 xfer->ux_flags, xfer->ux_priv); 3017 3018 #ifdef DIAGNOSTIC 3019 if (xfer->ux_rqflags & URQ_REQUEST) 3020 panic("ohci_device_intr_transfer: a request"); 3021 #endif 3022 3023 len = xfer->ux_length; 3024 endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress; 3025 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3026 3027 data = opipe->tail.td; 3028 mutex_enter(&sc->sc_lock); 3029 tail = ohci_alloc_std(sc); 3030 mutex_exit(&sc->sc_lock); 3031 if (tail == NULL) 3032 return USBD_NOMEM; 3033 tail->xfer = NULL; 3034 3035 data->td.td_flags = HTOO32( 3036 isread ? OHCI_TD_IN : OHCI_TD_OUT | 3037 OHCI_TD_NOCC | 3038 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 3039 if (xfer->ux_flags & USBD_SHORT_XFER_OK) 3040 data->td.td_flags |= HTOO32(OHCI_TD_R); 3041 data->td.td_cbp = HTOO32(DMAADDR(&xfer->ux_dmabuf, 0)); 3042 data->nexttd = tail; 3043 data->td.td_nexttd = HTOO32(tail->physaddr); 3044 data->td.td_be = HTOO32(O32TOH(data->td.td_cbp) + len - 1); 3045 data->len = len; 3046 data->xfer = xfer; 3047 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 3048 usb_syncmem(&data->dma, data->offs, sizeof(data->td), 3049 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3050 xfer->ux_hcpriv = data; 3051 3052 #ifdef OHCI_DEBUG 3053 DPRINTFN(5, "--- dump start ---", 0, 0, 0, 0); 3054 if (ohcidebug > 5) { 3055 ohci_dump_ed(sc, sed); 3056 ohci_dump_tds(sc, data); 3057 } 3058 DPRINTFN(5, "--- dump end ---", 0, 0, 0, 0); 3059 #endif 3060 3061 /* Insert ED in schedule */ 3062 mutex_enter(&sc->sc_lock); 3063 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3064 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3065 sed->ed.ed_tailp = HTOO32(tail->physaddr); 3066 opipe->tail.td = tail; 3067 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3068 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3069 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3070 3071 #if 0 3072 /* 3073 * This goes horribly wrong, printing thousands of descriptors, 3074 * because false references are followed due to the fact that the 3075 * TD is gone. 3076 */ 3077 if (ohcidebug > 5) { 3078 usb_delay_ms_locked(&sc->sc_bus, 5, &sc->sc_lock); 3079 DPRINTF("status=%x", OREAD4(sc, OHCI_COMMAND_STATUS), 3080 0, 0, 0); 3081 ohci_dump_ed(sc, sed); 3082 ohci_dump_tds(sc, data); 3083 } 3084 #endif 3085 mutex_exit(&sc->sc_lock); 3086 3087 return USBD_IN_PROGRESS; 3088 } 3089 3090 /* Abort a device interrupt request. */ 3091 Static void 3092 ohci_device_intr_abort(struct usbd_xfer *xfer) 3093 { 3094 #ifdef DIAGNOSTIC 3095 ohci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv; 3096 #endif 3097 3098 KASSERT(mutex_owned(&sc->sc_lock)); 3099 KASSERT(xfer->ux_pipe->up_intrxfer == xfer); 3100 3101 ohci_abort_xfer(xfer, USBD_CANCELLED); 3102 } 3103 3104 /* Close a device interrupt pipe. */ 3105 Static void 3106 ohci_device_intr_close(struct usbd_pipe *pipe) 3107 { 3108 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3109 ohci_softc_t *sc = pipe->up_dev->ud_bus->ub_hcpriv; 3110 int nslots = opipe->u.intr.nslots; 3111 int pos = opipe->u.intr.pos; 3112 int j; 3113 ohci_soft_ed_t *p, *sed = opipe->sed; 3114 3115 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3116 3117 KASSERT(mutex_owned(&sc->sc_lock)); 3118 3119 DPRINTFN(1, "pipe=%p nslots=%d pos=%d", pipe, nslots, pos, 0); 3120 usb_syncmem(&sed->dma, sed->offs, 3121 sizeof(sed->ed), BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3122 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 3123 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3124 sizeof(sed->ed.ed_flags), 3125 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3126 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 3127 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) 3128 usb_delay_ms_locked(&sc->sc_bus, 2, &sc->sc_lock); 3129 3130 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 3131 continue; 3132 #ifdef DIAGNOSTIC 3133 if (p == NULL) 3134 panic("ohci_device_intr_close: ED not found"); 3135 #endif 3136 p->next = sed->next; 3137 p->ed.ed_nexted = sed->ed.ed_nexted; 3138 usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted), 3139 sizeof(p->ed.ed_nexted), 3140 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3141 3142 for (j = 0; j < nslots; j++) 3143 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 3144 3145 ohci_free_std(sc, opipe->tail.td); 3146 ohci_free_sed(sc, opipe->sed); 3147 } 3148 3149 Static usbd_status 3150 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival) 3151 { 3152 int i, j, best; 3153 u_int npoll, slow, shigh, nslots; 3154 u_int bestbw, bw; 3155 ohci_soft_ed_t *hsed, *sed = opipe->sed; 3156 3157 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3158 3159 DPRINTFN(2, "pipe=%p", opipe, 0, 0, 0); 3160 if (ival == 0) { 3161 printf("ohci_setintr: 0 interval\n"); 3162 return USBD_INVAL; 3163 } 3164 3165 npoll = OHCI_NO_INTRS; 3166 while (npoll > ival) 3167 npoll /= 2; 3168 DPRINTFN(2, "ival=%d npoll=%d", ival, npoll, 0, 0); 3169 3170 /* 3171 * We now know which level in the tree the ED must go into. 3172 * Figure out which slot has most bandwidth left over. 3173 * Slots to examine: 3174 * npoll 3175 * 1 0 3176 * 2 1 2 3177 * 4 3 4 5 6 3178 * 8 7 8 9 10 11 12 13 14 3179 * N (N-1) .. (N-1+N-1) 3180 */ 3181 slow = npoll-1; 3182 shigh = slow + npoll; 3183 nslots = OHCI_NO_INTRS / npoll; 3184 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 3185 bw = 0; 3186 for (j = 0; j < nslots; j++) 3187 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 3188 if (bw < bestbw) { 3189 best = i; 3190 bestbw = bw; 3191 } 3192 } 3193 DPRINTFN(2, "best=%d(%d..%d) bestbw=%d", best, slow, shigh, bestbw); 3194 3195 mutex_enter(&sc->sc_lock); 3196 hsed = sc->sc_eds[best]; 3197 sed->next = hsed->next; 3198 usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags), 3199 sizeof(hsed->ed.ed_flags), 3200 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3201 sed->ed.ed_nexted = hsed->ed.ed_nexted; 3202 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3203 sizeof(sed->ed.ed_flags), 3204 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3205 hsed->next = sed; 3206 hsed->ed.ed_nexted = HTOO32(sed->physaddr); 3207 usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags), 3208 sizeof(hsed->ed.ed_flags), 3209 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3210 mutex_exit(&sc->sc_lock); 3211 3212 for (j = 0; j < nslots; j++) 3213 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 3214 opipe->u.intr.nslots = nslots; 3215 opipe->u.intr.pos = best; 3216 3217 DPRINTFN(5, "returns %p", opipe, 0, 0, 0); 3218 return USBD_NORMAL_COMPLETION; 3219 } 3220 3221 /***********************/ 3222 3223 usbd_status 3224 ohci_device_isoc_transfer(struct usbd_xfer *xfer) 3225 { 3226 ohci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv; 3227 usbd_status err; 3228 3229 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3230 3231 DPRINTFN(5, "xfer=%p", xfer, 0, 0, 0); 3232 3233 /* Put it on our queue, */ 3234 mutex_enter(&sc->sc_lock); 3235 err = usb_insert_transfer(xfer); 3236 mutex_exit(&sc->sc_lock); 3237 3238 /* bail out on error, */ 3239 if (err && err != USBD_IN_PROGRESS) 3240 return err; 3241 3242 /* XXX should check inuse here */ 3243 3244 /* insert into schedule, */ 3245 ohci_device_isoc_enter(xfer); 3246 3247 /* and start if the pipe wasn't running */ 3248 if (!err) 3249 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 3250 3251 return err; 3252 } 3253 3254 void 3255 ohci_device_isoc_enter(struct usbd_xfer *xfer) 3256 { 3257 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->ux_pipe; 3258 struct usbd_device *dev = opipe->pipe.up_dev; 3259 ohci_softc_t *sc = dev->ud_bus->ub_hcpriv; 3260 ohci_soft_ed_t *sed = opipe->sed; 3261 struct iso *iso = &opipe->u.iso; 3262 ohci_soft_itd_t *sitd, *nsitd; 3263 ohci_physaddr_t buf, offs, noffs, bp0; 3264 int i, ncur, nframes; 3265 3266 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3267 3268 DPRINTFN(1, "used=%d next=%d xfer=%p nframes=%d", 3269 iso->inuse, iso->next, xfer, xfer->ux_nframes); 3270 3271 if (sc->sc_dying) 3272 return; 3273 3274 if (iso->next == -1) { 3275 /* Not in use yet, schedule it a few frames ahead. */ 3276 iso->next = O32TOH(sc->sc_hcca->hcca_frame_number) + 5; 3277 DPRINTFN(2,"start next=%d", iso->next, 0, 0, 0); 3278 } 3279 3280 sitd = opipe->tail.itd; 3281 buf = DMAADDR(&xfer->ux_dmabuf, 0); 3282 bp0 = OHCI_PAGE(buf); 3283 offs = OHCI_PAGE_OFFSET(buf); 3284 nframes = xfer->ux_nframes; 3285 xfer->ux_hcpriv = sitd; 3286 for (i = ncur = 0; i < nframes; i++, ncur++) { 3287 noffs = offs + xfer->ux_frlengths[i]; 3288 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ 3289 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */ 3290 3291 /* Allocate next ITD */ 3292 mutex_enter(&sc->sc_lock); 3293 nsitd = ohci_alloc_sitd(sc); 3294 mutex_exit(&sc->sc_lock); 3295 if (nsitd == NULL) { 3296 /* XXX what now? */ 3297 printf("%s: isoc TD alloc failed\n", 3298 device_xname(sc->sc_dev)); 3299 return; 3300 } 3301 3302 /* Fill current ITD */ 3303 sitd->itd.itd_flags = HTOO32( 3304 OHCI_ITD_NOCC | 3305 OHCI_ITD_SET_SF(iso->next) | 3306 OHCI_ITD_SET_DI(6) | /* delay intr a little */ 3307 OHCI_ITD_SET_FC(ncur)); 3308 sitd->itd.itd_bp0 = HTOO32(bp0); 3309 sitd->nextitd = nsitd; 3310 sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr); 3311 sitd->itd.itd_be = HTOO32(bp0 + offs - 1); 3312 sitd->xfer = xfer; 3313 sitd->flags = 0; 3314 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 3315 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3316 3317 sitd = nsitd; 3318 iso->next = iso->next + ncur; 3319 bp0 = OHCI_PAGE(buf + offs); 3320 ncur = 0; 3321 } 3322 sitd->itd.itd_offset[ncur] = HTOO16(OHCI_ITD_MK_OFFS(offs)); 3323 offs = noffs; 3324 } 3325 mutex_enter(&sc->sc_lock); 3326 nsitd = ohci_alloc_sitd(sc); 3327 mutex_exit(&sc->sc_lock); 3328 if (nsitd == NULL) { 3329 /* XXX what now? */ 3330 printf("%s: isoc TD alloc failed\n", 3331 device_xname(sc->sc_dev)); 3332 return; 3333 } 3334 /* Fixup last used ITD */ 3335 sitd->itd.itd_flags = HTOO32( 3336 OHCI_ITD_NOCC | 3337 OHCI_ITD_SET_SF(iso->next) | 3338 OHCI_ITD_SET_DI(0) | 3339 OHCI_ITD_SET_FC(ncur)); 3340 sitd->itd.itd_bp0 = HTOO32(bp0); 3341 sitd->nextitd = nsitd; 3342 sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr); 3343 sitd->itd.itd_be = HTOO32(bp0 + offs - 1); 3344 sitd->xfer = xfer; 3345 sitd->flags = OHCI_CALL_DONE; 3346 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 3347 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3348 3349 iso->next = iso->next + ncur; 3350 iso->inuse += nframes; 3351 3352 xfer->ux_actlen = offs; /* XXX pretend we did it all */ 3353 3354 xfer->ux_status = USBD_IN_PROGRESS; 3355 3356 #ifdef OHCI_DEBUG 3357 if (ohcidebug > 5) { 3358 DPRINTF("frame=%d", O32TOH(sc->sc_hcca->hcca_frame_number), 3359 0, 0, 0); 3360 ohci_dump_itds(sc, xfer->ux_hcpriv); 3361 ohci_dump_ed(sc, sed); 3362 } 3363 #endif 3364 3365 mutex_enter(&sc->sc_lock); 3366 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3367 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3368 sed->ed.ed_tailp = HTOO32(nsitd->physaddr); 3369 opipe->tail.itd = nsitd; 3370 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3371 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3372 sizeof(sed->ed.ed_flags), 3373 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3374 mutex_exit(&sc->sc_lock); 3375 3376 #ifdef OHCI_DEBUG 3377 if (ohcidebug > 5) { 3378 delay(150000); 3379 DPRINTF("after frame=%d", O32TOH(sc->sc_hcca->hcca_frame_number), 3380 0, 0, 0); 3381 ohci_dump_itds(sc, xfer->ux_hcpriv); 3382 ohci_dump_ed(sc, sed); 3383 } 3384 #endif 3385 } 3386 3387 usbd_status 3388 ohci_device_isoc_start(struct usbd_xfer *xfer) 3389 { 3390 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->ux_pipe; 3391 ohci_softc_t *sc = opipe->pipe.up_dev->ud_bus->ub_hcpriv; 3392 3393 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3394 DPRINTFN(5, "xfer=%p", xfer, 0, 0, 0); 3395 3396 mutex_enter(&sc->sc_lock); 3397 3398 if (sc->sc_dying) { 3399 mutex_exit(&sc->sc_lock); 3400 return USBD_IOERROR; 3401 } 3402 3403 #ifdef DIAGNOSTIC 3404 if (xfer->ux_status != USBD_IN_PROGRESS) 3405 printf("ohci_device_isoc_start: not in progress %p\n", xfer); 3406 #endif 3407 3408 /* XXX anything to do? */ 3409 3410 mutex_exit(&sc->sc_lock); 3411 3412 return USBD_IN_PROGRESS; 3413 } 3414 3415 void 3416 ohci_device_isoc_abort(struct usbd_xfer *xfer) 3417 { 3418 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->ux_pipe; 3419 ohci_softc_t *sc = opipe->pipe.up_dev->ud_bus->ub_hcpriv; 3420 ohci_soft_ed_t *sed; 3421 ohci_soft_itd_t *sitd; 3422 3423 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3424 DPRINTFN(1, "xfer=%p", xfer, 0, 0, 0); 3425 3426 KASSERT(mutex_owned(&sc->sc_lock)); 3427 3428 /* Transfer is already done. */ 3429 if (xfer->ux_status != USBD_NOT_STARTED && 3430 xfer->ux_status != USBD_IN_PROGRESS) { 3431 printf("ohci_device_isoc_abort: early return\n"); 3432 goto done; 3433 } 3434 3435 /* Give xfer the requested abort code. */ 3436 xfer->ux_status = USBD_CANCELLED; 3437 3438 sed = opipe->sed; 3439 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3440 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3441 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */ 3442 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3443 sizeof(sed->ed.ed_flags), 3444 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3445 3446 sitd = xfer->ux_hcpriv; 3447 #ifdef DIAGNOSTIC 3448 if (sitd == NULL) { 3449 printf("ohci_device_isoc_abort: hcpriv==0\n"); 3450 goto done; 3451 } 3452 #endif 3453 for (; sitd->xfer == xfer; sitd = sitd->nextitd) { 3454 #ifdef DIAGNOSTIC 3455 DPRINTFN(1, "abort sets done sitd=%p", sitd, 0, 0, 0); 3456 sitd->isdone = 1; 3457 #endif 3458 } 3459 3460 usb_delay_ms_locked(&sc->sc_bus, OHCI_ITD_NOFFSET, &sc->sc_lock); 3461 3462 /* Run callback. */ 3463 usb_transfer_complete(xfer); 3464 3465 sed->ed.ed_headp = HTOO32(sitd->physaddr); /* unlink TDs */ 3466 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */ 3467 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3468 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3469 3470 done: 3471 KASSERT(mutex_owned(&sc->sc_lock)); 3472 } 3473 3474 void 3475 ohci_device_isoc_done(struct usbd_xfer *xfer) 3476 { 3477 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3478 DPRINTFN(1, "xfer=%p", xfer, 0, 0, 0); 3479 } 3480 3481 usbd_status 3482 ohci_setup_isoc(struct usbd_pipe *pipe) 3483 { 3484 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3485 ohci_softc_t *sc = pipe->up_dev->ud_bus->ub_hcpriv; 3486 struct iso *iso = &opipe->u.iso; 3487 3488 iso->next = -1; 3489 iso->inuse = 0; 3490 3491 mutex_enter(&sc->sc_lock); 3492 ohci_add_ed(sc, opipe->sed, sc->sc_isoc_head); 3493 mutex_exit(&sc->sc_lock); 3494 3495 return USBD_NORMAL_COMPLETION; 3496 } 3497 3498 void 3499 ohci_device_isoc_close(struct usbd_pipe *pipe) 3500 { 3501 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3502 ohci_softc_t *sc = pipe->up_dev->ud_bus->ub_hcpriv; 3503 3504 KASSERT(mutex_owned(&sc->sc_lock)); 3505 3506 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3507 DPRINTF("pipe=%p", pipe, 0, 0, 0); 3508 ohci_close_pipe(pipe, sc->sc_isoc_head); 3509 #ifdef DIAGNOSTIC 3510 opipe->tail.itd->isdone = 1; 3511 #endif 3512 ohci_free_sitd(sc, opipe->tail.itd); 3513 } 3514
Indexes created Fri Oct 03 02:09:57 GMT 2025