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ohci.c revision 1.254.2.5
      1 /*	$NetBSD: ohci.c,v 1.254.2.5 2014/12/01 12:38:39 skrll Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1998, 2004, 2005, 2012 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Lennart Augustsson (lennart (at) augustsson.net) at
      9  * Carlstedt Research & Technology, Jared D. McNeill (jmcneill (at) invisible.ca)
     10  * and Matthew R. Green (mrg (at) eterna.com.au).
     11  * This code is derived from software contributed to The NetBSD Foundation
     12  * by Charles M. Hannum.
     13  *
     14  * Redistribution and use in source and binary forms, with or without
     15  * modification, are permitted provided that the following conditions
     16  * are met:
     17  * 1. Redistributions of source code must retain the above copyright
     18  *    notice, this list of conditions and the following disclaimer.
     19  * 2. Redistributions in binary form must reproduce the above copyright
     20  *    notice, this list of conditions and the following disclaimer in the
     21  *    documentation and/or other materials provided with the distribution.
     22  *
     23  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     24  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     25  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     26  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     27  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     28  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     29  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     30  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     31  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     32  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     33  * POSSIBILITY OF SUCH DAMAGE.
     34  */
     35 
     36 /*
     37  * USB Open Host Controller driver.
     38  *
     39  * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html
     40  * USB spec: http://www.usb.org/developers/docs/
     41  */
     42 
     43 #include <sys/cdefs.h>
     44 __KERNEL_RCSID(0, "$NetBSD: ohci.c,v 1.254.2.5 2014/12/01 12:38:39 skrll Exp $");
     45 
     46 #include <sys/param.h>
     47 #include <sys/systm.h>
     48 #include <sys/kmem.h>
     49 #include <sys/kernel.h>
     50 #include <sys/device.h>
     51 #include <sys/select.h>
     52 #include <sys/proc.h>
     53 #include <sys/queue.h>
     54 #include <sys/cpu.h>
     55 
     56 #include <machine/endian.h>
     57 
     58 #include <dev/usb/usb.h>
     59 #include <dev/usb/usbdi.h>
     60 #include <dev/usb/usbdivar.h>
     61 #include <dev/usb/usb_mem.h>
     62 #include <dev/usb/usb_quirks.h>
     63 
     64 #include <dev/usb/ohcireg.h>
     65 #include <dev/usb/ohcivar.h>
     66 #include <dev/usb/usbroothub_subr.h>
     67 
     68 
     69 
     70 #ifdef OHCI_DEBUG
     71 #define DPRINTF(x)	if (ohcidebug) printf x
     72 #define DPRINTFN(n,x)	if (ohcidebug>(n)) printf x
     73 int ohcidebug = 0;
     74 #else
     75 #define DPRINTF(x)
     76 #define DPRINTFN(n,x)
     77 #endif
     78 
     79 #if BYTE_ORDER == BIG_ENDIAN
     80 #define	SWAP_ENDIAN	OHCI_LITTLE_ENDIAN
     81 #else
     82 #define	SWAP_ENDIAN	OHCI_BIG_ENDIAN
     83 #endif
     84 
     85 #define	O16TOH(val)	(sc->sc_endian == SWAP_ENDIAN ? bswap16(val) : val)
     86 #define	O32TOH(val)	(sc->sc_endian == SWAP_ENDIAN ? bswap32(val) : val)
     87 #define	HTOO16(val)	O16TOH(val)
     88 #define	HTOO32(val)	O32TOH(val)
     89 
     90 struct ohci_pipe;
     91 
     92 Static ohci_soft_ed_t  *ohci_alloc_sed(ohci_softc_t *);
     93 Static void		ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *);
     94 
     95 Static ohci_soft_td_t  *ohci_alloc_std(ohci_softc_t *);
     96 Static void		ohci_free_std(ohci_softc_t *, ohci_soft_td_t *);
     97 
     98 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *);
     99 Static void		ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *);
    100 
    101 Static void		ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *,
    102 					    ohci_soft_td_t *);
    103 Static usbd_status	ohci_alloc_std_chain(struct ohci_pipe *,
    104 			    ohci_softc_t *, int, int, usbd_xfer_handle,
    105 			    ohci_soft_td_t *, ohci_soft_td_t **);
    106 
    107 Static usbd_status	ohci_open(usbd_pipe_handle);
    108 Static void		ohci_poll(struct usbd_bus *);
    109 Static void		ohci_softintr(void *);
    110 Static void		ohci_waitintr(ohci_softc_t *, usbd_xfer_handle);
    111 Static void		ohci_rhsc(ohci_softc_t *, usbd_xfer_handle);
    112 Static void		ohci_rhsc_softint(void *arg);
    113 
    114 Static usbd_status	ohci_device_request(usbd_xfer_handle xfer);
    115 Static void		ohci_add_ed(ohci_softc_t *, ohci_soft_ed_t *,
    116 			    ohci_soft_ed_t *);
    117 
    118 Static void		ohci_rem_ed(ohci_softc_t *, ohci_soft_ed_t *,
    119 				    ohci_soft_ed_t *);
    120 Static void		ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *);
    121 Static void		ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *);
    122 Static ohci_soft_td_t  *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t);
    123 Static void		ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *);
    124 Static void		ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *);
    125 Static ohci_soft_itd_t  *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t);
    126 
    127 Static usbd_status	ohci_setup_isoc(usbd_pipe_handle pipe);
    128 Static void		ohci_device_isoc_enter(usbd_xfer_handle);
    129 
    130 Static usbd_status	ohci_allocm(struct usbd_bus *, usb_dma_t *, uint32_t);
    131 Static void		ohci_freem(struct usbd_bus *, usb_dma_t *);
    132 
    133 Static usbd_xfer_handle	ohci_allocx(struct usbd_bus *);
    134 Static void		ohci_freex(struct usbd_bus *, usbd_xfer_handle);
    135 Static void		ohci_get_lock(struct usbd_bus *, kmutex_t **);
    136 
    137 Static usbd_status	ohci_root_ctrl_transfer(usbd_xfer_handle);
    138 Static usbd_status	ohci_root_ctrl_start(usbd_xfer_handle);
    139 Static void		ohci_root_ctrl_abort(usbd_xfer_handle);
    140 Static void		ohci_root_ctrl_close(usbd_pipe_handle);
    141 Static void		ohci_root_ctrl_done(usbd_xfer_handle);
    142 
    143 Static usbd_status	ohci_root_intr_transfer(usbd_xfer_handle);
    144 Static usbd_status	ohci_root_intr_start(usbd_xfer_handle);
    145 Static void		ohci_root_intr_abort(usbd_xfer_handle);
    146 Static void		ohci_root_intr_close(usbd_pipe_handle);
    147 Static void		ohci_root_intr_done(usbd_xfer_handle);
    148 
    149 Static usbd_status	ohci_device_ctrl_transfer(usbd_xfer_handle);
    150 Static usbd_status	ohci_device_ctrl_start(usbd_xfer_handle);
    151 Static void		ohci_device_ctrl_abort(usbd_xfer_handle);
    152 Static void		ohci_device_ctrl_close(usbd_pipe_handle);
    153 Static void		ohci_device_ctrl_done(usbd_xfer_handle);
    154 
    155 Static usbd_status	ohci_device_bulk_transfer(usbd_xfer_handle);
    156 Static usbd_status	ohci_device_bulk_start(usbd_xfer_handle);
    157 Static void		ohci_device_bulk_abort(usbd_xfer_handle);
    158 Static void		ohci_device_bulk_close(usbd_pipe_handle);
    159 Static void		ohci_device_bulk_done(usbd_xfer_handle);
    160 
    161 Static usbd_status	ohci_device_intr_transfer(usbd_xfer_handle);
    162 Static usbd_status	ohci_device_intr_start(usbd_xfer_handle);
    163 Static void		ohci_device_intr_abort(usbd_xfer_handle);
    164 Static void		ohci_device_intr_close(usbd_pipe_handle);
    165 Static void		ohci_device_intr_done(usbd_xfer_handle);
    166 
    167 Static usbd_status	ohci_device_isoc_transfer(usbd_xfer_handle);
    168 Static usbd_status	ohci_device_isoc_start(usbd_xfer_handle);
    169 Static void		ohci_device_isoc_abort(usbd_xfer_handle);
    170 Static void		ohci_device_isoc_close(usbd_pipe_handle);
    171 Static void		ohci_device_isoc_done(usbd_xfer_handle);
    172 
    173 Static usbd_status	ohci_device_setintr(ohci_softc_t *sc,
    174 			    struct ohci_pipe *pipe, int ival);
    175 
    176 Static void		ohci_timeout(void *);
    177 Static void		ohci_timeout_task(void *);
    178 Static void		ohci_rhsc_enable(void *);
    179 
    180 Static void		ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *);
    181 Static void		ohci_abort_xfer(usbd_xfer_handle, usbd_status);
    182 
    183 Static void		ohci_device_clear_toggle(usbd_pipe_handle pipe);
    184 Static void		ohci_noop(usbd_pipe_handle pipe);
    185 
    186 #ifdef OHCI_DEBUG
    187 Static void		ohci_dumpregs(ohci_softc_t *);
    188 Static void		ohci_dump_tds(ohci_softc_t *, ohci_soft_td_t *);
    189 Static void		ohci_dump_td(ohci_softc_t *, ohci_soft_td_t *);
    190 Static void		ohci_dump_ed(ohci_softc_t *, ohci_soft_ed_t *);
    191 Static void		ohci_dump_itd(ohci_softc_t *, ohci_soft_itd_t *);
    192 Static void		ohci_dump_itds(ohci_softc_t *, ohci_soft_itd_t *);
    193 #endif
    194 
    195 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \
    196 			BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
    197 #define OWRITE1(sc, r, x) \
    198  do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
    199 #define OWRITE2(sc, r, x) \
    200  do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
    201 #define OWRITE4(sc, r, x) \
    202  do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
    203 
    204 static __inline uint32_t
    205 OREAD4(ohci_softc_t *sc, bus_size_t r)
    206 {
    207 
    208 	OBARR(sc);
    209 	return bus_space_read_4(sc->iot, sc->ioh, r);
    210 }
    211 
    212 /* Reverse the bits in a value 0 .. 31 */
    213 Static uint8_t revbits[OHCI_NO_INTRS] =
    214   { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c,
    215     0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e,
    216     0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d,
    217     0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f };
    218 
    219 struct ohci_pipe {
    220 	struct usbd_pipe pipe;
    221 	ohci_soft_ed_t *sed;
    222 	union {
    223 		ohci_soft_td_t *td;
    224 		ohci_soft_itd_t *itd;
    225 	} tail;
    226 	/* Info needed for different pipe kinds. */
    227 	union {
    228 		/* Control pipe */
    229 		struct {
    230 			usb_dma_t reqdma;
    231 			u_int length;
    232 			ohci_soft_td_t *setup, *data, *stat;
    233 		} ctl;
    234 		/* Interrupt pipe */
    235 		struct {
    236 			int nslots;
    237 			int pos;
    238 		} intr;
    239 		/* Bulk pipe */
    240 		struct {
    241 			u_int length;
    242 			int isread;
    243 		} bulk;
    244 		/* Iso pipe */
    245 		struct iso {
    246 			int next, inuse;
    247 		} iso;
    248 	} u;
    249 };
    250 
    251 #define OHCI_INTR_ENDPT 1
    252 
    253 Static const struct usbd_bus_methods ohci_bus_methods = {
    254 	.ubm_open =	ohci_open,
    255 	.ubm_softint =	ohci_softintr,
    256 	.ubm_dopoll =	ohci_poll,
    257 	.ubm_allocm =	ohci_allocm,
    258 	.ubm_freem =	ohci_freem,
    259 	.ubm_allocx =	ohci_allocx,
    260 	.ubm_freex =	ohci_freex,
    261 	.ubm_getlock =	ohci_get_lock,
    262 	.ubm_newdev =	NULL,
    263 };
    264 
    265 Static const struct usbd_pipe_methods ohci_root_ctrl_methods = {
    266 	.upm_transfer =	ohci_root_ctrl_transfer,
    267 	.upm_start =	ohci_root_ctrl_start,
    268 	.upm_abort =	ohci_root_ctrl_abort,
    269 	.upm_close =	ohci_root_ctrl_close,
    270 	.upm_cleartoggle =	ohci_noop,
    271 	.upm_done =	ohci_root_ctrl_done,
    272 };
    273 
    274 Static const struct usbd_pipe_methods ohci_root_intr_methods = {
    275 	.upm_transfer =	ohci_root_intr_transfer,
    276 	.upm_start =	ohci_root_intr_start,
    277 	.upm_abort =	ohci_root_intr_abort,
    278 	.upm_close =	ohci_root_intr_close,
    279 	.upm_cleartoggle =	ohci_noop,
    280 	.upm_done =	ohci_root_intr_done,
    281 };
    282 
    283 Static const struct usbd_pipe_methods ohci_device_ctrl_methods = {
    284 	.upm_transfer =	ohci_device_ctrl_transfer,
    285 	.upm_start =	ohci_device_ctrl_start,
    286 	.upm_abort =	ohci_device_ctrl_abort,
    287 	.upm_close =	ohci_device_ctrl_close,
    288 	.upm_cleartoggle =	ohci_noop,
    289 	.upm_done =	ohci_device_ctrl_done,
    290 };
    291 
    292 Static const struct usbd_pipe_methods ohci_device_intr_methods = {
    293 	.upm_transfer =	ohci_device_intr_transfer,
    294 	.upm_start =	ohci_device_intr_start,
    295 	.upm_abort =	ohci_device_intr_abort,
    296 	.upm_close =	ohci_device_intr_close,
    297 	.upm_cleartoggle =	ohci_device_clear_toggle,
    298 	.upm_done =	ohci_device_intr_done,
    299 };
    300 
    301 Static const struct usbd_pipe_methods ohci_device_bulk_methods = {
    302 	.upm_transfer =	ohci_device_bulk_transfer,
    303 	.upm_start =	ohci_device_bulk_start,
    304 	.upm_abort =	ohci_device_bulk_abort,
    305 	.upm_close =	ohci_device_bulk_close,
    306 	.upm_cleartoggle =	ohci_device_clear_toggle,
    307 	.upm_done =	ohci_device_bulk_done,
    308 };
    309 
    310 Static const struct usbd_pipe_methods ohci_device_isoc_methods = {
    311 	.upm_transfer =	ohci_device_isoc_transfer,
    312 	.upm_start =	ohci_device_isoc_start,
    313 	.upm_abort =	ohci_device_isoc_abort,
    314 	.upm_close =	ohci_device_isoc_close,
    315 	.upm_cleartoggle =	ohci_noop,
    316 	.upm_done =	ohci_device_isoc_done,
    317 };
    318 
    319 int
    320 ohci_activate(device_t self, enum devact act)
    321 {
    322 	struct ohci_softc *sc = device_private(self);
    323 
    324 	switch (act) {
    325 	case DVACT_DEACTIVATE:
    326 		sc->sc_dying = 1;
    327 		return 0;
    328 	default:
    329 		return EOPNOTSUPP;
    330 	}
    331 }
    332 
    333 void
    334 ohci_childdet(device_t self, device_t child)
    335 {
    336 	struct ohci_softc *sc = device_private(self);
    337 
    338 	KASSERT(sc->sc_child == child);
    339 	sc->sc_child = NULL;
    340 }
    341 
    342 int
    343 ohci_detach(struct ohci_softc *sc, int flags)
    344 {
    345 	int rv = 0;
    346 
    347 	if (sc->sc_child != NULL)
    348 		rv = config_detach(sc->sc_child, flags);
    349 
    350 	if (rv != 0)
    351 		return (rv);
    352 
    353 	callout_halt(&sc->sc_tmo_rhsc, &sc->sc_lock);
    354 
    355 	usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */
    356 	callout_destroy(&sc->sc_tmo_rhsc);
    357 
    358 	softint_disestablish(sc->sc_rhsc_si);
    359 
    360 	cv_destroy(&sc->sc_softwake_cv);
    361 
    362 	mutex_destroy(&sc->sc_lock);
    363 	mutex_destroy(&sc->sc_intr_lock);
    364 
    365 	if (sc->sc_hcca != NULL)
    366 		usb_freemem(&sc->sc_bus, &sc->sc_hccadma);
    367 	pool_cache_destroy(sc->sc_xferpool);
    368 
    369 	return (rv);
    370 }
    371 
    372 ohci_soft_ed_t *
    373 ohci_alloc_sed(ohci_softc_t *sc)
    374 {
    375 	ohci_soft_ed_t *sed;
    376 	usbd_status err;
    377 	int i, offs;
    378 	usb_dma_t dma;
    379 
    380 	if (sc->sc_freeeds == NULL) {
    381 		DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n"));
    382 		err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK,
    383 			  OHCI_ED_ALIGN, &dma);
    384 		if (err)
    385 			return (0);
    386 		for (i = 0; i < OHCI_SED_CHUNK; i++) {
    387 			offs = i * OHCI_SED_SIZE;
    388 			sed = KERNADDR(&dma, offs);
    389 			sed->physaddr = DMAADDR(&dma, offs);
    390 			sed->dma = dma;
    391 			sed->offs = offs;
    392 			sed->next = sc->sc_freeeds;
    393 			sc->sc_freeeds = sed;
    394 		}
    395 	}
    396 	sed = sc->sc_freeeds;
    397 	sc->sc_freeeds = sed->next;
    398 	memset(&sed->ed, 0, sizeof(ohci_ed_t));
    399 	sed->next = 0;
    400 	return (sed);
    401 }
    402 
    403 void
    404 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed)
    405 {
    406 	sed->next = sc->sc_freeeds;
    407 	sc->sc_freeeds = sed;
    408 }
    409 
    410 ohci_soft_td_t *
    411 ohci_alloc_std(ohci_softc_t *sc)
    412 {
    413 	ohci_soft_td_t *std;
    414 	usbd_status err;
    415 	int i, offs;
    416 	usb_dma_t dma;
    417 
    418 	KASSERT(sc->sc_bus.use_polling || mutex_owned(&sc->sc_lock));
    419 
    420 	if (sc->sc_freetds == NULL) {
    421 		DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n"));
    422 		err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK,
    423 			  OHCI_TD_ALIGN, &dma);
    424 		if (err)
    425 			return (NULL);
    426 		for(i = 0; i < OHCI_STD_CHUNK; i++) {
    427 			offs = i * OHCI_STD_SIZE;
    428 			std = KERNADDR(&dma, offs);
    429 			std->physaddr = DMAADDR(&dma, offs);
    430 			std->dma = dma;
    431 			std->offs = offs;
    432 			std->nexttd = sc->sc_freetds;
    433 			sc->sc_freetds = std;
    434 		}
    435 	}
    436 
    437 	std = sc->sc_freetds;
    438 	sc->sc_freetds = std->nexttd;
    439 	memset(&std->td, 0, sizeof(ohci_td_t));
    440 	std->nexttd = NULL;
    441 	std->xfer = NULL;
    442 	ohci_hash_add_td(sc, std);
    443 
    444 	return (std);
    445 }
    446 
    447 void
    448 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std)
    449 {
    450 	KASSERT(sc->sc_bus.use_polling || mutex_owned(&sc->sc_lock));
    451 
    452 	ohci_hash_rem_td(sc, std);
    453 	std->nexttd = sc->sc_freetds;
    454 	sc->sc_freetds = std;
    455 }
    456 
    457 usbd_status
    458 ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc,
    459 		     int alen, int rd, usbd_xfer_handle xfer,
    460 		     ohci_soft_td_t *sp, ohci_soft_td_t **ep)
    461 {
    462 	ohci_soft_td_t *next, *cur;
    463 	ohci_physaddr_t dataphys, dataphysend;
    464 	uint32_t tdflags;
    465 	int len, curlen;
    466 	usb_dma_t *dma = &xfer->dmabuf;
    467 	uint16_t flags = xfer->flags;
    468 
    469 	DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen));
    470 
    471 	KASSERT(mutex_owned(&sc->sc_lock));
    472 
    473 	len = alen;
    474 	cur = sp;
    475 	dataphys = DMAADDR(dma, 0);
    476 	dataphysend = OHCI_PAGE(dataphys + len - 1);
    477 	usb_syncmem(dma, 0, len,
    478 	    rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
    479 	tdflags = HTOO32(
    480 	    (rd ? OHCI_TD_IN : OHCI_TD_OUT) |
    481 	    (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) |
    482 	    OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR);
    483 
    484 	for (;;) {
    485 		next = ohci_alloc_std(sc);
    486 		if (next == NULL)
    487 			goto nomem;
    488 
    489 		/* The OHCI hardware can handle at most one page crossing. */
    490 		if (OHCI_PAGE(dataphys) == dataphysend ||
    491 		    OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) {
    492 			/* we can handle it in this TD */
    493 			curlen = len;
    494 		} else {
    495 			/* must use multiple TDs, fill as much as possible. */
    496 			curlen = 2 * OHCI_PAGE_SIZE -
    497 				 (dataphys & (OHCI_PAGE_SIZE-1));
    498 			/* the length must be a multiple of the max size */
    499 			curlen -= curlen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize);
    500 #ifdef DIAGNOSTIC
    501 			if (curlen == 0)
    502 				panic("ohci_alloc_std: curlen == 0");
    503 #endif
    504 		}
    505 		DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x "
    506 			    "dataphysend=0x%08x len=%d curlen=%d\n",
    507 			    dataphys, dataphysend,
    508 			    len, curlen));
    509 		len -= curlen;
    510 
    511 		cur->td.td_flags = tdflags;
    512 		cur->td.td_cbp = HTOO32(dataphys);
    513 		cur->nexttd = next;
    514 		cur->td.td_nexttd = HTOO32(next->physaddr);
    515 		cur->td.td_be = HTOO32(dataphys + curlen - 1);
    516 		cur->len = curlen;
    517 		cur->flags = OHCI_ADD_LEN;
    518 		cur->xfer = xfer;
    519 		usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td),
    520 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    521 		DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n",
    522 			    dataphys, dataphys + curlen - 1));
    523 		if (len == 0)
    524 			break;
    525 		DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n"));
    526 		dataphys += curlen;
    527 		cur = next;
    528 	}
    529 	if (!rd && (flags & USBD_FORCE_SHORT_XFER) &&
    530 	    alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) {
    531 		/* Force a 0 length transfer at the end. */
    532 
    533 		cur = next;
    534 		next = ohci_alloc_std(sc);
    535 		if (next == NULL)
    536 			goto nomem;
    537 
    538 		cur->td.td_flags = tdflags;
    539 		cur->td.td_cbp = 0; /* indicate 0 length packet */
    540 		cur->nexttd = next;
    541 		cur->td.td_nexttd = HTOO32(next->physaddr);
    542 		cur->td.td_be = ~0;
    543 		cur->len = 0;
    544 		cur->flags = 0;
    545 		cur->xfer = xfer;
    546 		usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td),
    547 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    548 		DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n"));
    549 	}
    550 	*ep = cur;
    551 
    552 	return (USBD_NORMAL_COMPLETION);
    553 
    554  nomem:
    555 
    556 	/* Don't free sp - let the caller do that */
    557 	ohci_free_std_chain(sc, sp->nexttd, NULL);
    558 
    559 	return (USBD_NOMEM);
    560 }
    561 
    562 Static void
    563 ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std,
    564 		    ohci_soft_td_t *stdend)
    565 {
    566 	ohci_soft_td_t *p;
    567 
    568 	for (; std != stdend; std = p) {
    569 		p = std->nexttd;
    570 		ohci_free_std(sc, std);
    571 	}
    572 }
    573 
    574 ohci_soft_itd_t *
    575 ohci_alloc_sitd(ohci_softc_t *sc)
    576 {
    577 	ohci_soft_itd_t *sitd;
    578 	usbd_status err;
    579 	int i, offs;
    580 	usb_dma_t dma;
    581 
    582 	if (sc->sc_freeitds == NULL) {
    583 		DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n"));
    584 		err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK,
    585 			  OHCI_ITD_ALIGN, &dma);
    586 		if (err)
    587 			return (NULL);
    588 		for(i = 0; i < OHCI_SITD_CHUNK; i++) {
    589 			offs = i * OHCI_SITD_SIZE;
    590 			sitd = KERNADDR(&dma, offs);
    591 			sitd->physaddr = DMAADDR(&dma, offs);
    592 			sitd->dma = dma;
    593 			sitd->offs = offs;
    594 			sitd->nextitd = sc->sc_freeitds;
    595 			sc->sc_freeitds = sitd;
    596 		}
    597 	}
    598 
    599 	sitd = sc->sc_freeitds;
    600 	sc->sc_freeitds = sitd->nextitd;
    601 	memset(&sitd->itd, 0, sizeof(ohci_itd_t));
    602 	sitd->nextitd = NULL;
    603 	sitd->xfer = NULL;
    604 	ohci_hash_add_itd(sc, sitd);
    605 
    606 #ifdef DIAGNOSTIC
    607 	sitd->isdone = 0;
    608 #endif
    609 
    610 	return (sitd);
    611 }
    612 
    613 void
    614 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
    615 {
    616 
    617 	DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd));
    618 
    619 #ifdef DIAGNOSTIC
    620 	if (!sitd->isdone) {
    621 		panic("ohci_free_sitd: sitd=%p not done", sitd);
    622 		return;
    623 	}
    624 	/* Warn double free */
    625 	sitd->isdone = 0;
    626 #endif
    627 
    628 	ohci_hash_rem_itd(sc, sitd);
    629 	sitd->nextitd = sc->sc_freeitds;
    630 	sc->sc_freeitds = sitd;
    631 }
    632 
    633 usbd_status
    634 ohci_init(ohci_softc_t *sc)
    635 {
    636 	ohci_soft_ed_t *sed, *psed;
    637 	usbd_status err;
    638 	int i;
    639 	uint32_t s, ctl, rwc, ival, hcr, fm, per, rev, desca /*, descb */;
    640 
    641 	DPRINTF(("ohci_init: start\n"));
    642 	aprint_normal_dev(sc->sc_dev, "");
    643 
    644 	sc->sc_hcca = NULL;
    645 	callout_init(&sc->sc_tmo_rhsc, CALLOUT_MPSAFE);
    646 
    647 	mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_SOFTUSB);
    648 	mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_SCHED);
    649 	cv_init(&sc->sc_softwake_cv, "ohciab");
    650 
    651 	sc->sc_rhsc_si = softint_establish(SOFTINT_NET | SOFTINT_MPSAFE,
    652 	    ohci_rhsc_softint, sc);
    653 
    654 	for (i = 0; i < OHCI_HASH_SIZE; i++)
    655 		LIST_INIT(&sc->sc_hash_tds[i]);
    656 	for (i = 0; i < OHCI_HASH_SIZE; i++)
    657 		LIST_INIT(&sc->sc_hash_itds[i]);
    658 
    659 	sc->sc_xferpool = pool_cache_init(sizeof(struct ohci_xfer), 0, 0, 0,
    660 	    "ohcixfer", NULL, IPL_USB, NULL, NULL, NULL);
    661 
    662 	rev = OREAD4(sc, OHCI_REVISION);
    663 	aprint_normal("OHCI version %d.%d%s\n",
    664 	    OHCI_REV_HI(rev), OHCI_REV_LO(rev),
    665 	    OHCI_REV_LEGACY(rev) ? ", legacy support" : "");
    666 
    667 	if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) {
    668 		aprint_error_dev(sc->sc_dev, "unsupported OHCI revision\n");
    669 		sc->sc_bus.usbrev = USBREV_UNKNOWN;
    670 		return (USBD_INVAL);
    671 	}
    672 	sc->sc_bus.usbrev = USBREV_1_0;
    673 
    674 	usb_setup_reserve(sc->sc_dev, &sc->sc_dma_reserve, sc->sc_bus.dmatag,
    675 	    USB_MEM_RESERVE);
    676 
    677 	/* XXX determine alignment by R/W */
    678 	/* Allocate the HCCA area. */
    679 	err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE,
    680 			 OHCI_HCCA_ALIGN, &sc->sc_hccadma);
    681 	if (err) {
    682 		sc->sc_hcca = NULL;
    683 		return err;
    684 	}
    685 	sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0);
    686 	memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE);
    687 
    688 	sc->sc_eintrs = OHCI_NORMAL_INTRS;
    689 
    690 	/* Allocate dummy ED that starts the control list. */
    691 	sc->sc_ctrl_head = ohci_alloc_sed(sc);
    692 	if (sc->sc_ctrl_head == NULL) {
    693 		err = USBD_NOMEM;
    694 		goto bad1;
    695 	}
    696 	sc->sc_ctrl_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
    697 
    698 	/* Allocate dummy ED that starts the bulk list. */
    699 	sc->sc_bulk_head = ohci_alloc_sed(sc);
    700 	if (sc->sc_bulk_head == NULL) {
    701 		err = USBD_NOMEM;
    702 		goto bad2;
    703 	}
    704 	sc->sc_bulk_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
    705 	usb_syncmem(&sc->sc_bulk_head->dma, sc->sc_bulk_head->offs,
    706 	    sizeof(sc->sc_bulk_head->ed),
    707 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    708 
    709 	/* Allocate dummy ED that starts the isochronous list. */
    710 	sc->sc_isoc_head = ohci_alloc_sed(sc);
    711 	if (sc->sc_isoc_head == NULL) {
    712 		err = USBD_NOMEM;
    713 		goto bad3;
    714 	}
    715 	sc->sc_isoc_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
    716 	usb_syncmem(&sc->sc_isoc_head->dma, sc->sc_isoc_head->offs,
    717 	    sizeof(sc->sc_isoc_head->ed),
    718 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    719 
    720 	/* Allocate all the dummy EDs that make up the interrupt tree. */
    721 	for (i = 0; i < OHCI_NO_EDS; i++) {
    722 		sed = ohci_alloc_sed(sc);
    723 		if (sed == NULL) {
    724 			while (--i >= 0)
    725 				ohci_free_sed(sc, sc->sc_eds[i]);
    726 			err = USBD_NOMEM;
    727 			goto bad4;
    728 		}
    729 		/* All ED fields are set to 0. */
    730 		sc->sc_eds[i] = sed;
    731 		sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
    732 		if (i != 0)
    733 			psed = sc->sc_eds[(i-1) / 2];
    734 		else
    735 			psed= sc->sc_isoc_head;
    736 		sed->next = psed;
    737 		sed->ed.ed_nexted = HTOO32(psed->physaddr);
    738 		usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
    739 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    740 	}
    741 	/*
    742 	 * Fill HCCA interrupt table.  The bit reversal is to get
    743 	 * the tree set up properly to spread the interrupts.
    744 	 */
    745 	for (i = 0; i < OHCI_NO_INTRS; i++)
    746 		sc->sc_hcca->hcca_interrupt_table[revbits[i]] =
    747 		    HTOO32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr);
    748 	usb_syncmem(&sc->sc_hccadma, 0, OHCI_HCCA_SIZE,
    749 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    750 
    751 #ifdef OHCI_DEBUG
    752 	if (ohcidebug > 15) {
    753 		for (i = 0; i < OHCI_NO_EDS; i++) {
    754 			printf("ed#%d ", i);
    755 			ohci_dump_ed(sc, sc->sc_eds[i]);
    756 		}
    757 		printf("iso ");
    758 		ohci_dump_ed(sc, sc->sc_isoc_head);
    759 	}
    760 #endif
    761 
    762 	/* Preserve values programmed by SMM/BIOS but lost over reset. */
    763 	ctl = OREAD4(sc, OHCI_CONTROL);
    764 	rwc = ctl & OHCI_RWC;
    765 	fm = OREAD4(sc, OHCI_FM_INTERVAL);
    766 	desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
    767 	/* descb = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); */
    768 
    769 	/* Determine in what context we are running. */
    770 	if (ctl & OHCI_IR) {
    771 		/* SMM active, request change */
    772 		DPRINTF(("ohci_init: SMM active, request owner change\n"));
    773 		if ((sc->sc_intre & (OHCI_OC | OHCI_MIE)) ==
    774 		    (OHCI_OC | OHCI_MIE))
    775 			OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_MIE);
    776 		s = OREAD4(sc, OHCI_COMMAND_STATUS);
    777 		OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR);
    778 		for (i = 0; i < 100 && (ctl & OHCI_IR); i++) {
    779 			usb_delay_ms(&sc->sc_bus, 1);
    780 			ctl = OREAD4(sc, OHCI_CONTROL);
    781 		}
    782 		OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_MIE);
    783 		if ((ctl & OHCI_IR) == 0) {
    784 			aprint_error_dev(sc->sc_dev,
    785 			    "SMM does not respond, resetting\n");
    786 			OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc);
    787 			goto reset;
    788 		}
    789 #if 0
    790 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */
    791 	} else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) {
    792 		/* BIOS started controller. */
    793 		DPRINTF(("ohci_init: BIOS active\n"));
    794 		if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) {
    795 			OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL | rwc);
    796 			usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
    797 		}
    798 #endif
    799 	} else {
    800 		DPRINTF(("ohci_init: cold started\n"));
    801 	reset:
    802 		/* Controller was cold started. */
    803 		usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
    804 	}
    805 
    806 	/*
    807 	 * This reset should not be necessary according to the OHCI spec, but
    808 	 * without it some controllers do not start.
    809 	 */
    810 	DPRINTF(("%s: resetting\n", device_xname(sc->sc_dev)));
    811 	OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc);
    812 	usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
    813 
    814 	/* We now own the host controller and the bus has been reset. */
    815 
    816 	OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */
    817 	/* Nominal time for a reset is 10 us. */
    818 	for (i = 0; i < 10; i++) {
    819 		delay(10);
    820 		hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR;
    821 		if (!hcr)
    822 			break;
    823 	}
    824 	if (hcr) {
    825 		aprint_error_dev(sc->sc_dev, "reset timeout\n");
    826 		err = USBD_IOERROR;
    827 		goto bad5;
    828 	}
    829 #ifdef OHCI_DEBUG
    830 	if (ohcidebug > 15)
    831 		ohci_dumpregs(sc);
    832 #endif
    833 
    834 	/* The controller is now in SUSPEND state, we have 2ms to finish. */
    835 
    836 	/* Set up HC registers. */
    837 	OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0));
    838 	OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
    839 	OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
    840 	/* disable all interrupts and then switch on all desired interrupts */
    841 	OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
    842 	/* switch on desired functional features */
    843 	ctl = OREAD4(sc, OHCI_CONTROL);
    844 	ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR);
    845 	ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE |
    846 		OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL | rwc;
    847 	/* And finally start it! */
    848 	OWRITE4(sc, OHCI_CONTROL, ctl);
    849 
    850 	/*
    851 	 * The controller is now OPERATIONAL.  Set a some final
    852 	 * registers that should be set earlier, but that the
    853 	 * controller ignores when in the SUSPEND state.
    854 	 */
    855 	ival = OHCI_GET_IVAL(fm);
    856 	fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT;
    857 	fm |= OHCI_FSMPS(ival) | ival;
    858 	OWRITE4(sc, OHCI_FM_INTERVAL, fm);
    859 	per = OHCI_PERIODIC(ival); /* 90% periodic */
    860 	OWRITE4(sc, OHCI_PERIODIC_START, per);
    861 
    862 	if (sc->sc_flags & OHCIF_SUPERIO) {
    863 		/* no overcurrent protection */
    864 		desca |= OHCI_NOCP;
    865 		/*
    866 		 * Clear NoPowerSwitching and PowerOnToPowerGoodTime meaning
    867 		 * that
    868 		 *  - ports are always power switched
    869 		 *  - don't wait for powered root hub port
    870 		 */
    871 		desca &= ~(__SHIFTIN(0xff, OHCI_POTPGT_MASK) | OHCI_NPS);
    872 	}
    873 
    874 	/* Fiddle the No OverCurrent Protection bit to avoid chip bug. */
    875 	OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP);
    876 	OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */
    877 	usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY);
    878 	OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca);
    879 
    880 	/*
    881 	 * The AMD756 requires a delay before re-reading the register,
    882 	 * otherwise it will occasionally report 0 ports.
    883 	 */
    884 	sc->sc_noport = 0;
    885 	for (i = 0; i < 10 && sc->sc_noport == 0; i++) {
    886 		usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY);
    887 		sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A));
    888 	}
    889 
    890 #ifdef OHCI_DEBUG
    891 	if (ohcidebug > 5)
    892 		ohci_dumpregs(sc);
    893 #endif
    894 
    895 	/* Set up the bus struct. */
    896 	sc->sc_bus.methods = &ohci_bus_methods;
    897 	sc->sc_bus.pipe_size = sizeof(struct ohci_pipe);
    898 
    899 	sc->sc_control = sc->sc_intre = 0;
    900 
    901 	/* Finally, turn on interrupts. */
    902 	DPRINTFN(1,("ohci_init: enabling %#x\n", sc->sc_eintrs | OHCI_MIE));
    903 	OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE);
    904 
    905 	return (USBD_NORMAL_COMPLETION);
    906 
    907  bad5:
    908 	for (i = 0; i < OHCI_NO_EDS; i++)
    909 		ohci_free_sed(sc, sc->sc_eds[i]);
    910  bad4:
    911 	ohci_free_sed(sc, sc->sc_isoc_head);
    912  bad3:
    913 	ohci_free_sed(sc, sc->sc_bulk_head);
    914  bad2:
    915 	ohci_free_sed(sc, sc->sc_ctrl_head);
    916  bad1:
    917 	usb_freemem(&sc->sc_bus, &sc->sc_hccadma);
    918 	sc->sc_hcca = NULL;
    919 	return (err);
    920 }
    921 
    922 usbd_status
    923 ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, uint32_t size)
    924 {
    925 	struct ohci_softc *sc = bus->hci_private;
    926 	usbd_status status;
    927 
    928 	status = usb_allocmem(&sc->sc_bus, size, 0, dma);
    929 	if (status == USBD_NOMEM)
    930 		status = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size);
    931 	return status;
    932 }
    933 
    934 void
    935 ohci_freem(struct usbd_bus *bus, usb_dma_t *dma)
    936 {
    937 	struct ohci_softc *sc = bus->hci_private;
    938 	if (dma->block->flags & USB_DMA_RESERVE) {
    939 		usb_reserve_freem(&sc->sc_dma_reserve, dma);
    940 		return;
    941 	}
    942 	usb_freemem(&sc->sc_bus, dma);
    943 }
    944 
    945 usbd_xfer_handle
    946 ohci_allocx(struct usbd_bus *bus)
    947 {
    948 	struct ohci_softc *sc = bus->hci_private;
    949 	usbd_xfer_handle xfer;
    950 
    951 	xfer = pool_cache_get(sc->sc_xferpool, PR_NOWAIT);
    952 	if (xfer != NULL) {
    953 		memset(xfer, 0, sizeof(struct ohci_xfer));
    954 #ifdef DIAGNOSTIC
    955 		xfer->busy_free = XFER_BUSY;
    956 #endif
    957 	}
    958 	return (xfer);
    959 }
    960 
    961 void
    962 ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
    963 {
    964 	struct ohci_softc *sc = bus->hci_private;
    965 
    966 #ifdef DIAGNOSTIC
    967 	if (xfer->busy_free != XFER_BUSY) {
    968 		printf("ohci_freex: xfer=%p not busy, 0x%08x\n", xfer,
    969 		       xfer->busy_free);
    970 	}
    971 	xfer->busy_free = XFER_FREE;
    972 #endif
    973 	pool_cache_put(sc->sc_xferpool, xfer);
    974 }
    975 
    976 Static void
    977 ohci_get_lock(struct usbd_bus *bus, kmutex_t **lock)
    978 {
    979 	struct ohci_softc *sc = bus->hci_private;
    980 
    981 	*lock = &sc->sc_lock;
    982 }
    983 
    984 /*
    985  * Shut down the controller when the system is going down.
    986  */
    987 bool
    988 ohci_shutdown(device_t self, int flags)
    989 {
    990 	ohci_softc_t *sc = device_private(self);
    991 
    992 	DPRINTF(("ohci_shutdown: stopping the HC\n"));
    993 	OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
    994 	return true;
    995 }
    996 
    997 bool
    998 ohci_resume(device_t dv, const pmf_qual_t *qual)
    999 {
   1000 	ohci_softc_t *sc = device_private(dv);
   1001 	uint32_t ctl;
   1002 
   1003 	mutex_spin_enter(&sc->sc_intr_lock);
   1004 	sc->sc_bus.use_polling++;
   1005 	mutex_spin_exit(&sc->sc_intr_lock);
   1006 
   1007 	/* Some broken BIOSes do not recover these values */
   1008 	OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0));
   1009 	OWRITE4(sc, OHCI_CONTROL_HEAD_ED,
   1010 	    sc->sc_ctrl_head->physaddr);
   1011 	OWRITE4(sc, OHCI_BULK_HEAD_ED,
   1012 	    sc->sc_bulk_head->physaddr);
   1013 	if (sc->sc_intre)
   1014 		OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_intre &
   1015 		    (OHCI_ALL_INTRS | OHCI_MIE));
   1016 	if (sc->sc_control)
   1017 		ctl = sc->sc_control;
   1018 	else
   1019 		ctl = OREAD4(sc, OHCI_CONTROL);
   1020 	ctl |= OHCI_HCFS_RESUME;
   1021 	OWRITE4(sc, OHCI_CONTROL, ctl);
   1022 	usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
   1023 	ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL;
   1024 	OWRITE4(sc, OHCI_CONTROL, ctl);
   1025 	usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
   1026 	sc->sc_control = sc->sc_intre = 0;
   1027 
   1028 	mutex_spin_enter(&sc->sc_intr_lock);
   1029 	sc->sc_bus.use_polling--;
   1030 	mutex_spin_exit(&sc->sc_intr_lock);
   1031 
   1032 	return true;
   1033 }
   1034 
   1035 bool
   1036 ohci_suspend(device_t dv, const pmf_qual_t *qual)
   1037 {
   1038 	ohci_softc_t *sc = device_private(dv);
   1039 	uint32_t ctl;
   1040 
   1041 	mutex_spin_enter(&sc->sc_intr_lock);
   1042 	sc->sc_bus.use_polling++;
   1043 	mutex_spin_exit(&sc->sc_intr_lock);
   1044 
   1045 	ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK;
   1046 	if (sc->sc_control == 0) {
   1047 		/*
   1048 		 * Preserve register values, in case that BIOS
   1049 		 * does not recover them.
   1050 		 */
   1051 		sc->sc_control = ctl;
   1052 		sc->sc_intre = OREAD4(sc,
   1053 		    OHCI_INTERRUPT_ENABLE);
   1054 	}
   1055 	ctl |= OHCI_HCFS_SUSPEND;
   1056 	OWRITE4(sc, OHCI_CONTROL, ctl);
   1057 	usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
   1058 
   1059 	mutex_spin_enter(&sc->sc_intr_lock);
   1060 	sc->sc_bus.use_polling--;
   1061 	mutex_spin_exit(&sc->sc_intr_lock);
   1062 
   1063 	return true;
   1064 }
   1065 
   1066 #ifdef OHCI_DEBUG
   1067 void
   1068 ohci_dumpregs(ohci_softc_t *sc)
   1069 {
   1070 	DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n",
   1071 		 OREAD4(sc, OHCI_REVISION),
   1072 		 OREAD4(sc, OHCI_CONTROL),
   1073 		 OREAD4(sc, OHCI_COMMAND_STATUS)));
   1074 	DPRINTF(("               intrstat=0x%08x intre=0x%08x intrd=0x%08x\n",
   1075 		 OREAD4(sc, OHCI_INTERRUPT_STATUS),
   1076 		 OREAD4(sc, OHCI_INTERRUPT_ENABLE),
   1077 		 OREAD4(sc, OHCI_INTERRUPT_DISABLE)));
   1078 	DPRINTF(("               hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n",
   1079 		 OREAD4(sc, OHCI_HCCA),
   1080 		 OREAD4(sc, OHCI_PERIOD_CURRENT_ED),
   1081 		 OREAD4(sc, OHCI_CONTROL_HEAD_ED)));
   1082 	DPRINTF(("               ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n",
   1083 		 OREAD4(sc, OHCI_CONTROL_CURRENT_ED),
   1084 		 OREAD4(sc, OHCI_BULK_HEAD_ED),
   1085 		 OREAD4(sc, OHCI_BULK_CURRENT_ED)));
   1086 	DPRINTF(("               done=0x%08x fmival=0x%08x fmrem=0x%08x\n",
   1087 		 OREAD4(sc, OHCI_DONE_HEAD),
   1088 		 OREAD4(sc, OHCI_FM_INTERVAL),
   1089 		 OREAD4(sc, OHCI_FM_REMAINING)));
   1090 	DPRINTF(("               fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n",
   1091 		 OREAD4(sc, OHCI_FM_NUMBER),
   1092 		 OREAD4(sc, OHCI_PERIODIC_START),
   1093 		 OREAD4(sc, OHCI_LS_THRESHOLD)));
   1094 	DPRINTF(("               desca=0x%08x descb=0x%08x stat=0x%08x\n",
   1095 		 OREAD4(sc, OHCI_RH_DESCRIPTOR_A),
   1096 		 OREAD4(sc, OHCI_RH_DESCRIPTOR_B),
   1097 		 OREAD4(sc, OHCI_RH_STATUS)));
   1098 	DPRINTF(("               port1=0x%08x port2=0x%08x\n",
   1099 		 OREAD4(sc, OHCI_RH_PORT_STATUS(1)),
   1100 		 OREAD4(sc, OHCI_RH_PORT_STATUS(2))));
   1101 	DPRINTF(("         HCCA: frame_number=0x%04x done_head=0x%08x\n",
   1102 		 O32TOH(sc->sc_hcca->hcca_frame_number),
   1103 		 O32TOH(sc->sc_hcca->hcca_done_head)));
   1104 }
   1105 #endif
   1106 
   1107 Static int ohci_intr1(ohci_softc_t *);
   1108 
   1109 int
   1110 ohci_intr(void *p)
   1111 {
   1112 	ohci_softc_t *sc = p;
   1113 	int ret = 0;
   1114 
   1115 	if (sc == NULL)
   1116 		return (0);
   1117 
   1118 	mutex_spin_enter(&sc->sc_intr_lock);
   1119 
   1120 	if (sc->sc_dying || !device_has_power(sc->sc_dev))
   1121 		goto done;
   1122 
   1123 	/* If we get an interrupt while polling, then just ignore it. */
   1124 	if (sc->sc_bus.use_polling) {
   1125 #ifdef DIAGNOSTIC
   1126 		DPRINTFN(16, ("ohci_intr: ignored interrupt while polling\n"));
   1127 #endif
   1128 		/* for level triggered intrs, should do something to ack */
   1129 		OWRITE4(sc, OHCI_INTERRUPT_STATUS,
   1130 			OREAD4(sc, OHCI_INTERRUPT_STATUS));
   1131 
   1132 		goto done;
   1133 	}
   1134 
   1135 	ret = ohci_intr1(sc);
   1136 
   1137 done:
   1138 	mutex_spin_exit(&sc->sc_intr_lock);
   1139 	return ret;
   1140 }
   1141 
   1142 Static int
   1143 ohci_intr1(ohci_softc_t *sc)
   1144 {
   1145 	uint32_t intrs, eintrs;
   1146 
   1147 	DPRINTFN(14,("ohci_intr1: enter\n"));
   1148 
   1149 	/* In case the interrupt occurs before initialization has completed. */
   1150 	if (sc == NULL || sc->sc_hcca == NULL) {
   1151 #ifdef DIAGNOSTIC
   1152 		printf("ohci_intr: sc->sc_hcca == NULL\n");
   1153 #endif
   1154 		return (0);
   1155 	}
   1156 
   1157 	KASSERT(mutex_owned(&sc->sc_intr_lock));
   1158 
   1159 	intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS);
   1160 	if (!intrs)
   1161 		return (0);
   1162 
   1163 	OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs & ~(OHCI_MIE|OHCI_WDH)); /* Acknowledge */
   1164 	eintrs = intrs & sc->sc_eintrs;
   1165 	DPRINTFN(7, ("ohci_intr: sc=%p intrs=%#x(%#x) eintrs=%#x(%#x)\n",
   1166 		     sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS),
   1167 		     (u_int)eintrs, sc->sc_eintrs));
   1168 
   1169 	if (!eintrs) {
   1170 		return (0);
   1171 	}
   1172 
   1173 	if (eintrs & OHCI_SO) {
   1174 		sc->sc_overrun_cnt++;
   1175 		if (usbd_ratecheck(&sc->sc_overrun_ntc)) {
   1176 			printf("%s: %u scheduling overruns\n",
   1177 			    device_xname(sc->sc_dev), sc->sc_overrun_cnt);
   1178 			sc->sc_overrun_cnt = 0;
   1179 		}
   1180 		/* XXX do what */
   1181 		eintrs &= ~OHCI_SO;
   1182 	}
   1183 	if (eintrs & OHCI_WDH) {
   1184 		/*
   1185 		 * We block the interrupt below, and reenable it later from
   1186 		 * ohci_softintr().
   1187 		 */
   1188 		usb_schedsoftintr(&sc->sc_bus);
   1189 	}
   1190 	if (eintrs & OHCI_RD) {
   1191 		printf("%s: resume detect\n", device_xname(sc->sc_dev));
   1192 		/* XXX process resume detect */
   1193 	}
   1194 	if (eintrs & OHCI_UE) {
   1195 		printf("%s: unrecoverable error, controller halted\n",
   1196 		       device_xname(sc->sc_dev));
   1197 		OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
   1198 		/* XXX what else */
   1199 	}
   1200 	if (eintrs & OHCI_RHSC) {
   1201 		/*
   1202 		 * We block the interrupt below, and reenable it later from
   1203 		 * a timeout.
   1204 		 */
   1205 		softint_schedule(sc->sc_rhsc_si);
   1206 	}
   1207 
   1208 	if (eintrs != 0) {
   1209 		/* Block unprocessed interrupts. */
   1210 		OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs);
   1211 		sc->sc_eintrs &= ~eintrs;
   1212 		DPRINTFN(1, ("%s: blocking intrs 0x%x\n",
   1213 		    device_xname(sc->sc_dev), eintrs));
   1214 	}
   1215 
   1216 	return (1);
   1217 }
   1218 
   1219 void
   1220 ohci_rhsc_enable(void *v_sc)
   1221 {
   1222 	ohci_softc_t *sc = v_sc;
   1223 
   1224 	DPRINTFN(1, ("%s: %s\n", __func__, device_xname(sc->sc_dev)));
   1225 	mutex_spin_enter(&sc->sc_intr_lock);
   1226 	sc->sc_eintrs |= OHCI_RHSC;
   1227 	OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC);
   1228 	mutex_spin_exit(&sc->sc_intr_lock);
   1229 }
   1230 
   1231 #ifdef OHCI_DEBUG
   1232 const char *ohci_cc_strs[] = {
   1233 	"NO_ERROR",
   1234 	"CRC",
   1235 	"BIT_STUFFING",
   1236 	"DATA_TOGGLE_MISMATCH",
   1237 	"STALL",
   1238 	"DEVICE_NOT_RESPONDING",
   1239 	"PID_CHECK_FAILURE",
   1240 	"UNEXPECTED_PID",
   1241 	"DATA_OVERRUN",
   1242 	"DATA_UNDERRUN",
   1243 	"BUFFER_OVERRUN",
   1244 	"BUFFER_UNDERRUN",
   1245 	"reserved",
   1246 	"reserved",
   1247 	"NOT_ACCESSED",
   1248 	"NOT_ACCESSED",
   1249 };
   1250 #endif
   1251 
   1252 void
   1253 ohci_softintr(void *v)
   1254 {
   1255 	struct usbd_bus *bus = v;
   1256 	ohci_softc_t *sc = bus->hci_private;
   1257 	ohci_soft_itd_t *sitd, *sidone, *sitdnext;
   1258 	ohci_soft_td_t  *std,  *sdone,  *stdnext;
   1259 	usbd_xfer_handle xfer;
   1260 	struct ohci_pipe *opipe;
   1261 	int len, cc;
   1262 	int i, j, actlen, iframes, uedir;
   1263 	ohci_physaddr_t done;
   1264 
   1265 	KASSERT(sc->sc_bus.use_polling || mutex_owned(&sc->sc_lock));
   1266 
   1267 	DPRINTFN(10,("ohci_softintr: enter\n"));
   1268 
   1269 	usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head),
   1270 	    sizeof(sc->sc_hcca->hcca_done_head),
   1271 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1272 	done = O32TOH(sc->sc_hcca->hcca_done_head) & ~OHCI_DONE_INTRS;
   1273 	sc->sc_hcca->hcca_done_head = 0;
   1274 	usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head),
   1275 	    sizeof(sc->sc_hcca->hcca_done_head),
   1276 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1277 	OWRITE4(sc, OHCI_INTERRUPT_STATUS, OHCI_WDH);
   1278 	sc->sc_eintrs |= OHCI_WDH;
   1279 	OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_WDH);
   1280 
   1281 	/* Reverse the done list. */
   1282 	for (sdone = NULL, sidone = NULL; done != 0; ) {
   1283 		std = ohci_hash_find_td(sc, done);
   1284 		if (std != NULL) {
   1285 			usb_syncmem(&std->dma, std->offs, sizeof(std->td),
   1286 			    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1287 			std->dnext = sdone;
   1288 			done = O32TOH(std->td.td_nexttd);
   1289 			sdone = std;
   1290 			DPRINTFN(10,("add TD %p\n", std));
   1291 			continue;
   1292 		}
   1293 		sitd = ohci_hash_find_itd(sc, done);
   1294 		if (sitd != NULL) {
   1295 			usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd),
   1296 			    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1297 			sitd->dnext = sidone;
   1298 			done = O32TOH(sitd->itd.itd_nextitd);
   1299 			sidone = sitd;
   1300 			DPRINTFN(5,("add ITD %p\n", sitd));
   1301 			continue;
   1302 		}
   1303 		device_printf(sc->sc_dev, "WARNING: addr 0x%08lx not found\n",
   1304 		    (u_long)done);
   1305 		break;
   1306 	}
   1307 
   1308 	DPRINTFN(10,("ohci_softintr: sdone=%p sidone=%p\n", sdone, sidone));
   1309 
   1310 #ifdef OHCI_DEBUG
   1311 	if (ohcidebug > 10) {
   1312 		DPRINTF(("ohci_process_done: TD done:\n"));
   1313 		for (std = sdone; std; std = std->dnext)
   1314 			ohci_dump_td(sc, std);
   1315 	}
   1316 #endif
   1317 
   1318 	for (std = sdone; std; std = stdnext) {
   1319 		xfer = std->xfer;
   1320 		stdnext = std->dnext;
   1321 		DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n",
   1322 				std, xfer, xfer ? xfer->hcpriv : 0));
   1323 		if (xfer == NULL) {
   1324 			/*
   1325 			 * xfer == NULL: There seems to be no xfer associated
   1326 			 * with this TD. It is tailp that happened to end up on
   1327 			 * the done queue.
   1328 			 * Shouldn't happen, but some chips are broken(?).
   1329 			 */
   1330 			continue;
   1331 		}
   1332 		if (xfer->status == USBD_CANCELLED ||
   1333 		    xfer->status == USBD_TIMEOUT) {
   1334 			DPRINTF(("ohci_process_done: cancel/timeout %p\n",
   1335 				 xfer));
   1336 			/* Handled by abort routine. */
   1337 			continue;
   1338 		}
   1339 		callout_stop(&xfer->timeout_handle);
   1340 
   1341 		len = std->len;
   1342 		if (std->td.td_cbp != 0)
   1343 			len -= O32TOH(std->td.td_be) -
   1344 			       O32TOH(std->td.td_cbp) + 1;
   1345 		DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", len,
   1346 		    std->flags));
   1347 		if (std->flags & OHCI_ADD_LEN)
   1348 			xfer->actlen += len;
   1349 
   1350 		cc = OHCI_TD_GET_CC(O32TOH(std->td.td_flags));
   1351 		if (cc == OHCI_CC_NO_ERROR) {
   1352 			if (std->flags & OHCI_CALL_DONE) {
   1353 				xfer->status = USBD_NORMAL_COMPLETION;
   1354 				usb_transfer_complete(xfer);
   1355 			}
   1356 			ohci_free_std(sc, std);
   1357 		} else {
   1358 			/*
   1359 			 * Endpoint is halted.  First unlink all the TDs
   1360 			 * belonging to the failed transfer, and then restart
   1361 			 * the endpoint.
   1362 			 */
   1363 			ohci_soft_td_t *p, *n;
   1364 			opipe = (struct ohci_pipe *)xfer->pipe;
   1365 
   1366 			DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n",
   1367 			  OHCI_TD_GET_CC(O32TOH(std->td.td_flags)),
   1368 			  ohci_cc_strs[OHCI_TD_GET_CC(O32TOH(std->td.td_flags))]));
   1369 
   1370 			/* remove TDs */
   1371 			for (p = std; p->xfer == xfer; p = n) {
   1372 				n = p->nexttd;
   1373 				ohci_free_std(sc, p);
   1374 			}
   1375 
   1376 			/* clear halt */
   1377 			opipe->sed->ed.ed_headp = HTOO32(p->physaddr);
   1378 			OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
   1379 
   1380 			if (cc == OHCI_CC_STALL)
   1381 				xfer->status = USBD_STALLED;
   1382 			else
   1383 				xfer->status = USBD_IOERROR;
   1384 			usb_transfer_complete(xfer);
   1385 		}
   1386 	}
   1387 
   1388 #ifdef OHCI_DEBUG
   1389 	if (ohcidebug > 10) {
   1390 		DPRINTF(("ohci_softintr: ITD done:\n"));
   1391 		for (sitd = sidone; sitd; sitd = sitd->dnext)
   1392 			ohci_dump_itd(sc, sitd);
   1393 	}
   1394 #endif
   1395 
   1396 	for (sitd = sidone; sitd != NULL; sitd = sitdnext) {
   1397 		xfer = sitd->xfer;
   1398 		sitdnext = sitd->dnext;
   1399 		DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n",
   1400 			     sitd, xfer, xfer ? xfer->hcpriv : 0));
   1401 		if (xfer == NULL)
   1402 			continue;
   1403 		if (xfer->status == USBD_CANCELLED ||
   1404 		    xfer->status == USBD_TIMEOUT) {
   1405 			DPRINTF(("ohci_process_done: cancel/timeout %p\n",
   1406 				 xfer));
   1407 			/* Handled by abort routine. */
   1408 			continue;
   1409 		}
   1410 #ifdef DIAGNOSTIC
   1411 		if (sitd->isdone)
   1412 			printf("ohci_softintr: sitd=%p is done\n", sitd);
   1413 		sitd->isdone = 1;
   1414 #endif
   1415 		if (sitd->flags & OHCI_CALL_DONE) {
   1416 			ohci_soft_itd_t *next;
   1417 
   1418 			opipe = (struct ohci_pipe *)xfer->pipe;
   1419 			opipe->u.iso.inuse -= xfer->nframes;
   1420 			uedir = UE_GET_DIR(xfer->pipe->endpoint->edesc->
   1421 			    bEndpointAddress);
   1422 			xfer->status = USBD_NORMAL_COMPLETION;
   1423 			actlen = 0;
   1424 			for (i = 0, sitd = xfer->hcpriv;;
   1425 			    sitd = next) {
   1426 				next = sitd->nextitd;
   1427 				if (OHCI_ITD_GET_CC(O32TOH(sitd->
   1428 				    itd.itd_flags)) != OHCI_CC_NO_ERROR)
   1429 					xfer->status = USBD_IOERROR;
   1430 				/* For input, update frlengths with actual */
   1431 				/* XXX anything necessary for output? */
   1432 				if (uedir == UE_DIR_IN &&
   1433 				    xfer->status == USBD_NORMAL_COMPLETION) {
   1434 					iframes = OHCI_ITD_GET_FC(O32TOH(
   1435 					    sitd->itd.itd_flags));
   1436 					for (j = 0; j < iframes; i++, j++) {
   1437 						len = O16TOH(sitd->
   1438 						    itd.itd_offset[j]);
   1439 						if ((OHCI_ITD_PSW_GET_CC(len) &
   1440 						    OHCI_CC_NOT_ACCESSED_MASK)
   1441 						    == OHCI_CC_NOT_ACCESSED)
   1442 							len = 0;
   1443 						else
   1444 							len = OHCI_ITD_PSW_LENGTH(len);
   1445 						xfer->frlengths[i] = len;
   1446 						actlen += len;
   1447 					}
   1448 				}
   1449 				if (sitd->flags & OHCI_CALL_DONE)
   1450 					break;
   1451 				ohci_free_sitd(sc, sitd);
   1452 			}
   1453 			ohci_free_sitd(sc, sitd);
   1454 			if (uedir == UE_DIR_IN &&
   1455 			    xfer->status == USBD_NORMAL_COMPLETION)
   1456 				xfer->actlen = actlen;
   1457 			xfer->hcpriv = NULL;
   1458 
   1459 			usb_transfer_complete(xfer);
   1460 		}
   1461 	}
   1462 
   1463 	if (sc->sc_softwake) {
   1464 		sc->sc_softwake = 0;
   1465 		cv_broadcast(&sc->sc_softwake_cv);
   1466 	}
   1467 
   1468 	DPRINTFN(10,("ohci_softintr: done:\n"));
   1469 }
   1470 
   1471 void
   1472 ohci_device_ctrl_done(usbd_xfer_handle xfer)
   1473 {
   1474 	struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
   1475 #ifdef DIAGNOSTIC
   1476 	ohci_softc_t *sc = xfer->pipe->device->bus->hci_private;
   1477 #endif
   1478 	int len = UGETW(xfer->request.wLength);
   1479 	int isread = (xfer->request.bmRequestType & UT_READ);
   1480 
   1481 	DPRINTFN(10,("ohci_device_ctrl_done: xfer=%p\n", xfer));
   1482 
   1483 	KASSERT(sc->sc_bus.use_polling || mutex_owned(&sc->sc_lock));
   1484 
   1485 #ifdef DIAGNOSTIC
   1486 	if (!(xfer->rqflags & URQ_REQUEST)) {
   1487 		panic("ohci_device_ctrl_done: not a request");
   1488 	}
   1489 #endif
   1490 	if (len)
   1491 		usb_syncmem(&xfer->dmabuf, 0, len,
   1492 		    isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
   1493 	 usb_syncmem(&opipe->u.ctl.reqdma, 0,
   1494 	     sizeof(usb_device_request_t),  BUS_DMASYNC_POSTWRITE);
   1495 }
   1496 
   1497 void
   1498 ohci_device_intr_done(usbd_xfer_handle xfer)
   1499 {
   1500 	struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
   1501 	ohci_softc_t *sc = opipe->pipe.device->bus->hci_private;
   1502 	ohci_soft_ed_t *sed = opipe->sed;
   1503 	ohci_soft_td_t *data, *tail;
   1504 	int isread =
   1505 	    (UE_GET_DIR(xfer->pipe->endpoint->edesc->bEndpointAddress) == UE_DIR_IN);
   1506 
   1507 	DPRINTFN(10,("ohci_device_intr_done: xfer=%p, actlen=%d\n",
   1508 		     xfer, xfer->actlen));
   1509 
   1510 	KASSERT(sc->sc_bus.use_polling || mutex_owned(&sc->sc_lock));
   1511 
   1512 	usb_syncmem(&xfer->dmabuf, 0, xfer->length,
   1513 	    isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
   1514 	if (xfer->pipe->repeat) {
   1515 		data = opipe->tail.td;
   1516 		tail = ohci_alloc_std(sc); /* XXX should reuse TD */
   1517 		if (tail == NULL) {
   1518 			xfer->status = USBD_NOMEM;
   1519 			return;
   1520 		}
   1521 		tail->xfer = NULL;
   1522 
   1523 		data->td.td_flags = HTOO32(
   1524 			OHCI_TD_IN | OHCI_TD_NOCC |
   1525 			OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
   1526 		if (xfer->flags & USBD_SHORT_XFER_OK)
   1527 			data->td.td_flags |= HTOO32(OHCI_TD_R);
   1528 		data->td.td_cbp = HTOO32(DMAADDR(&xfer->dmabuf, 0));
   1529 		data->nexttd = tail;
   1530 		data->td.td_nexttd = HTOO32(tail->physaddr);
   1531 		data->td.td_be = HTOO32(O32TOH(data->td.td_cbp) +
   1532 			xfer->length - 1);
   1533 		data->len = xfer->length;
   1534 		data->xfer = xfer;
   1535 		data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
   1536 		usb_syncmem(&data->dma, data->offs, sizeof(data->td),
   1537 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1538 		xfer->hcpriv = data;
   1539 		xfer->actlen = 0;
   1540 
   1541 		sed->ed.ed_tailp = HTOO32(tail->physaddr);
   1542 		usb_syncmem(&sed->dma,
   1543 		    sed->offs + offsetof(ohci_ed_t, ed_tailp),
   1544 		    sizeof(sed->ed.ed_tailp),
   1545 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1546 		opipe->tail.td = tail;
   1547 	}
   1548 }
   1549 
   1550 void
   1551 ohci_device_bulk_done(usbd_xfer_handle xfer)
   1552 {
   1553 #ifdef DIAGNOSTIC
   1554 	ohci_softc_t *sc = xfer->pipe->device->bus->hci_private;
   1555 #endif
   1556 	int isread =
   1557 	    (UE_GET_DIR(xfer->pipe->endpoint->edesc->bEndpointAddress) == UE_DIR_IN);
   1558 
   1559 	KASSERT(mutex_owned(&sc->sc_lock));
   1560 
   1561 	DPRINTFN(10,("ohci_device_bulk_done: xfer=%p, actlen=%d\n",
   1562 		     xfer, xfer->actlen));
   1563 	usb_syncmem(&xfer->dmabuf, 0, xfer->length,
   1564 	    isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
   1565 }
   1566 
   1567 Static void
   1568 ohci_rhsc_softint(void *arg)
   1569 {
   1570 	ohci_softc_t *sc = arg;
   1571 
   1572 	mutex_enter(&sc->sc_lock);
   1573 
   1574 	ohci_rhsc(sc, sc->sc_intrxfer);
   1575 
   1576 	/* Do not allow RHSC interrupts > 1 per second */
   1577 	callout_reset(&sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc);
   1578 
   1579 	mutex_exit(&sc->sc_lock);
   1580 }
   1581 
   1582 void
   1583 ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer)
   1584 {
   1585 	u_char *p;
   1586 	int i, m;
   1587 	int hstatus __unused;
   1588 
   1589 	KASSERT(mutex_owned(&sc->sc_lock));
   1590 
   1591 	hstatus = OREAD4(sc, OHCI_RH_STATUS);
   1592 	DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n",
   1593 		 sc, xfer, hstatus));
   1594 
   1595 	if (xfer == NULL) {
   1596 		/* Just ignore the change. */
   1597 		return;
   1598 	}
   1599 
   1600 	p = KERNADDR(&xfer->dmabuf, 0);
   1601 	m = min(sc->sc_noport, xfer->length * 8 - 1);
   1602 	memset(p, 0, xfer->length);
   1603 	for (i = 1; i <= m; i++) {
   1604 		/* Pick out CHANGE bits from the status reg. */
   1605 		if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16)
   1606 			p[i/8] |= 1 << (i%8);
   1607 	}
   1608 	DPRINTF(("ohci_rhsc: change=0x%02x\n", *p));
   1609 	xfer->actlen = xfer->length;
   1610 	xfer->status = USBD_NORMAL_COMPLETION;
   1611 
   1612 	usb_transfer_complete(xfer);
   1613 }
   1614 
   1615 void
   1616 ohci_root_intr_done(usbd_xfer_handle xfer)
   1617 {
   1618 }
   1619 
   1620 void
   1621 ohci_root_ctrl_done(usbd_xfer_handle xfer)
   1622 {
   1623 }
   1624 
   1625 /*
   1626  * Wait here until controller claims to have an interrupt.
   1627  * Then call ohci_intr and return.  Use timeout to avoid waiting
   1628  * too long.
   1629  */
   1630 void
   1631 ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer)
   1632 {
   1633 	int timo;
   1634 	uint32_t intrs;
   1635 
   1636 	mutex_enter(&sc->sc_lock);
   1637 
   1638 	xfer->status = USBD_IN_PROGRESS;
   1639 	for (timo = xfer->timeout; timo >= 0; timo--) {
   1640 		usb_delay_ms(&sc->sc_bus, 1);
   1641 		if (sc->sc_dying)
   1642 			break;
   1643 		intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs;
   1644 		DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs));
   1645 #ifdef OHCI_DEBUG
   1646 		if (ohcidebug > 15)
   1647 			ohci_dumpregs(sc);
   1648 #endif
   1649 		if (intrs) {
   1650 			mutex_spin_enter(&sc->sc_intr_lock);
   1651 			ohci_intr1(sc);
   1652 			mutex_spin_exit(&sc->sc_intr_lock);
   1653 			if (xfer->status != USBD_IN_PROGRESS)
   1654 				goto done;
   1655 		}
   1656 	}
   1657 
   1658 	/* Timeout */
   1659 	DPRINTF(("ohci_waitintr: timeout\n"));
   1660 	xfer->status = USBD_TIMEOUT;
   1661 	usb_transfer_complete(xfer);
   1662 
   1663 	/* XXX should free TD */
   1664 
   1665 done:
   1666 	mutex_exit(&sc->sc_lock);
   1667 }
   1668 
   1669 void
   1670 ohci_poll(struct usbd_bus *bus)
   1671 {
   1672 	ohci_softc_t *sc = bus->hci_private;
   1673 #ifdef OHCI_DEBUG
   1674 	static int last;
   1675 	int new;
   1676 	new = OREAD4(sc, OHCI_INTERRUPT_STATUS);
   1677 	if (new != last) {
   1678 		DPRINTFN(10,("ohci_poll: intrs=0x%04x\n", new));
   1679 		last = new;
   1680 	}
   1681 #endif
   1682 	sc->sc_eintrs |= OHCI_WDH;
   1683 	if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) {
   1684 		mutex_spin_enter(&sc->sc_intr_lock);
   1685 		ohci_intr1(sc);
   1686 		mutex_spin_exit(&sc->sc_intr_lock);
   1687 	}
   1688 }
   1689 
   1690 usbd_status
   1691 ohci_device_request(usbd_xfer_handle xfer)
   1692 {
   1693 	struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
   1694 	usb_device_request_t *req = &xfer->request;
   1695 	usbd_device_handle dev = opipe->pipe.device;
   1696 	ohci_softc_t *sc = dev->bus->hci_private;
   1697 	ohci_soft_td_t *setup, *stat, *next, *tail;
   1698 	ohci_soft_ed_t *sed;
   1699 	int isread;
   1700 	int len;
   1701 	usbd_status err;
   1702 
   1703 	KASSERT(mutex_owned(&sc->sc_lock));
   1704 
   1705 	isread = req->bmRequestType & UT_READ;
   1706 	len = UGETW(req->wLength);
   1707 
   1708 	DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, "
   1709 		    "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
   1710 		    req->bmRequestType, req->bRequest, UGETW(req->wValue),
   1711 		    UGETW(req->wIndex), len, dev->address,
   1712 		    opipe->pipe.endpoint->edesc->bEndpointAddress));
   1713 
   1714 	setup = opipe->tail.td;
   1715 	stat = ohci_alloc_std(sc);
   1716 	if (stat == NULL) {
   1717 		err = USBD_NOMEM;
   1718 		goto bad1;
   1719 	}
   1720 	tail = ohci_alloc_std(sc);
   1721 	if (tail == NULL) {
   1722 		err = USBD_NOMEM;
   1723 		goto bad2;
   1724 	}
   1725 	tail->xfer = NULL;
   1726 
   1727 	sed = opipe->sed;
   1728 	opipe->u.ctl.length = len;
   1729 
   1730 	KASSERTMSG(OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)) == dev->address,
   1731 	    "address ED %d pipe %d\n",
   1732 	    OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)), dev->address);
   1733 	KASSERTMSG(OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)) ==
   1734 	    UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize),
   1735 	    "MPL ED %d pipe %d\n",
   1736 	    OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)),
   1737 	    UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize));
   1738 
   1739 	next = stat;
   1740 
   1741 	/* Set up data transaction */
   1742 	if (len != 0) {
   1743 		ohci_soft_td_t *std = stat;
   1744 
   1745 		err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer,
   1746 			  std, &stat);
   1747 		if (err) {
   1748 			/* stat is unchanged if error */
   1749 			goto bad3;
   1750 		}
   1751 		stat = stat->nexttd; /* point at free TD */
   1752 
   1753 		/* Start toggle at 1 and then use the carried toggle. */
   1754 		std->td.td_flags &= HTOO32(~OHCI_TD_TOGGLE_MASK);
   1755 		std->td.td_flags |= HTOO32(OHCI_TD_TOGGLE_1);
   1756 		usb_syncmem(&std->dma,
   1757 		    std->offs + offsetof(ohci_td_t, td_flags),
   1758 		    sizeof(std->td.td_flags),
   1759 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1760 	}
   1761 
   1762 	memcpy(KERNADDR(&opipe->u.ctl.reqdma, 0), req, sizeof *req);
   1763 	usb_syncmem(&opipe->u.ctl.reqdma, 0, sizeof *req, BUS_DMASYNC_PREWRITE);
   1764 
   1765 	setup->td.td_flags = HTOO32(OHCI_TD_SETUP | OHCI_TD_NOCC |
   1766 				     OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR);
   1767 	setup->td.td_cbp = HTOO32(DMAADDR(&opipe->u.ctl.reqdma, 0));
   1768 	setup->nexttd = next;
   1769 	setup->td.td_nexttd = HTOO32(next->physaddr);
   1770 	setup->td.td_be = HTOO32(O32TOH(setup->td.td_cbp) + sizeof *req - 1);
   1771 	setup->len = 0;
   1772 	setup->xfer = xfer;
   1773 	setup->flags = 0;
   1774 	xfer->hcpriv = setup;
   1775 	usb_syncmem(&setup->dma, setup->offs, sizeof(setup->td),
   1776 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1777 
   1778 	stat->td.td_flags = HTOO32(
   1779 		(isread ? OHCI_TD_OUT : OHCI_TD_IN) |
   1780 		OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1));
   1781 	stat->td.td_cbp = 0;
   1782 	stat->nexttd = tail;
   1783 	stat->td.td_nexttd = HTOO32(tail->physaddr);
   1784 	stat->td.td_be = 0;
   1785 	stat->flags = OHCI_CALL_DONE;
   1786 	stat->len = 0;
   1787 	stat->xfer = xfer;
   1788 	usb_syncmem(&stat->dma, stat->offs, sizeof(stat->td),
   1789 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1790 
   1791 #ifdef OHCI_DEBUG
   1792 	if (ohcidebug > 5) {
   1793 		DPRINTF(("ohci_device_request:\n"));
   1794 		ohci_dump_ed(sc, sed);
   1795 		ohci_dump_tds(sc, setup);
   1796 	}
   1797 #endif
   1798 
   1799 	/* Insert ED in schedule */
   1800 	sed->ed.ed_tailp = HTOO32(tail->physaddr);
   1801 	usb_syncmem(&sed->dma,
   1802 	    sed->offs + offsetof(ohci_ed_t, ed_tailp),
   1803 	    sizeof(sed->ed.ed_tailp),
   1804 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1805 	opipe->tail.td = tail;
   1806 	OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
   1807 	if (xfer->timeout && !sc->sc_bus.use_polling) {
   1808 		callout_reset(&xfer->timeout_handle, mstohz(xfer->timeout),
   1809 			    ohci_timeout, xfer);
   1810 	}
   1811 
   1812 #ifdef OHCI_DEBUG
   1813 	if (ohcidebug > 20) {
   1814 		delay(10000);
   1815 		DPRINTF(("ohci_device_request: status=%x\n",
   1816 			 OREAD4(sc, OHCI_COMMAND_STATUS)));
   1817 		ohci_dumpregs(sc);
   1818 		printf("ctrl head:\n");
   1819 		ohci_dump_ed(sc, sc->sc_ctrl_head);
   1820 		printf("sed:\n");
   1821 		ohci_dump_ed(sc, sed);
   1822 		ohci_dump_tds(sc, setup);
   1823 	}
   1824 #endif
   1825 
   1826 	return (USBD_NORMAL_COMPLETION);
   1827 
   1828  bad3:
   1829 	ohci_free_std(sc, tail);
   1830  bad2:
   1831 	ohci_free_std(sc, stat);
   1832  bad1:
   1833 	return (err);
   1834 }
   1835 
   1836 /*
   1837  * Add an ED to the schedule.  Called with USB lock held.
   1838  */
   1839 Static void
   1840 ohci_add_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head)
   1841 {
   1842 	DPRINTFN(8,("ohci_add_ed: sed=%p head=%p\n", sed, head));
   1843 
   1844 	KASSERT(mutex_owned(&sc->sc_lock));
   1845 
   1846 	usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted),
   1847 	    sizeof(head->ed.ed_nexted),
   1848 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1849 	sed->next = head->next;
   1850 	sed->ed.ed_nexted = head->ed.ed_nexted;
   1851 	usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted),
   1852 	    sizeof(sed->ed.ed_nexted),
   1853 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1854 	head->next = sed;
   1855 	head->ed.ed_nexted = HTOO32(sed->physaddr);
   1856 	usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted),
   1857 	    sizeof(head->ed.ed_nexted),
   1858 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1859 }
   1860 
   1861 /*
   1862  * Remove an ED from the schedule.  Called with USB lock held.
   1863  */
   1864 Static void
   1865 ohci_rem_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head)
   1866 {
   1867 	ohci_soft_ed_t *p;
   1868 
   1869 	KASSERT(mutex_owned(&sc->sc_lock));
   1870 
   1871 	/* XXX */
   1872 	for (p = head; p != NULL && p->next != sed; p = p->next)
   1873 		;
   1874 	if (p == NULL)
   1875 		panic("ohci_rem_ed: ED not found");
   1876 	usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted),
   1877 	    sizeof(sed->ed.ed_nexted),
   1878 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1879 	p->next = sed->next;
   1880 	p->ed.ed_nexted = sed->ed.ed_nexted;
   1881 	usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted),
   1882 	    sizeof(p->ed.ed_nexted),
   1883 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1884 }
   1885 
   1886 /*
   1887  * When a transfer is completed the TD is added to the done queue by
   1888  * the host controller.  This queue is the processed by software.
   1889  * Unfortunately the queue contains the physical address of the TD
   1890  * and we have no simple way to translate this back to a kernel address.
   1891  * To make the translation possible (and fast) we use a hash table of
   1892  * TDs currently in the schedule.  The physical address is used as the
   1893  * hash value.
   1894  */
   1895 
   1896 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE)
   1897 /* Called with USB lock held. */
   1898 void
   1899 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std)
   1900 {
   1901 	int h = HASH(std->physaddr);
   1902 
   1903 	KASSERT(sc->sc_bus.use_polling || mutex_owned(&sc->sc_lock));
   1904 
   1905 	LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext);
   1906 }
   1907 
   1908 /* Called with USB lock held. */
   1909 void
   1910 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std)
   1911 {
   1912 
   1913 	KASSERT(sc->sc_bus.use_polling || mutex_owned(&sc->sc_lock));
   1914 
   1915 	LIST_REMOVE(std, hnext);
   1916 }
   1917 
   1918 ohci_soft_td_t *
   1919 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a)
   1920 {
   1921 	int h = HASH(a);
   1922 	ohci_soft_td_t *std;
   1923 
   1924 	for (std = LIST_FIRST(&sc->sc_hash_tds[h]);
   1925 	     std != NULL;
   1926 	     std = LIST_NEXT(std, hnext))
   1927 		if (std->physaddr == a)
   1928 			return (std);
   1929 	return (NULL);
   1930 }
   1931 
   1932 /* Called with USB lock held. */
   1933 void
   1934 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
   1935 {
   1936 	int h = HASH(sitd->physaddr);
   1937 
   1938 	KASSERT(mutex_owned(&sc->sc_lock));
   1939 
   1940 	DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n",
   1941 		    sitd, (u_long)sitd->physaddr));
   1942 
   1943 	LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext);
   1944 }
   1945 
   1946 /* Called with USB lock held. */
   1947 void
   1948 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
   1949 {
   1950 
   1951 	KASSERT(mutex_owned(&sc->sc_lock));
   1952 
   1953 	DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n",
   1954 		    sitd, (u_long)sitd->physaddr));
   1955 
   1956 	LIST_REMOVE(sitd, hnext);
   1957 }
   1958 
   1959 ohci_soft_itd_t *
   1960 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a)
   1961 {
   1962 	int h = HASH(a);
   1963 	ohci_soft_itd_t *sitd;
   1964 
   1965 	for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]);
   1966 	     sitd != NULL;
   1967 	     sitd = LIST_NEXT(sitd, hnext))
   1968 		if (sitd->physaddr == a)
   1969 			return (sitd);
   1970 	return (NULL);
   1971 }
   1972 
   1973 void
   1974 ohci_timeout(void *addr)
   1975 {
   1976 	struct ohci_xfer *oxfer = addr;
   1977 	struct ohci_pipe *opipe = (struct ohci_pipe *)oxfer->xfer.pipe;
   1978 	ohci_softc_t *sc = opipe->pipe.device->bus->hci_private;
   1979 
   1980 	DPRINTF(("ohci_timeout: oxfer=%p\n", oxfer));
   1981 
   1982 	if (sc->sc_dying) {
   1983 		mutex_enter(&sc->sc_lock);
   1984 		ohci_abort_xfer(&oxfer->xfer, USBD_TIMEOUT);
   1985 		mutex_exit(&sc->sc_lock);
   1986 		return;
   1987 	}
   1988 
   1989 	/* Execute the abort in a process context. */
   1990 	usb_init_task(&oxfer->abort_task, ohci_timeout_task, addr,
   1991 	    USB_TASKQ_MPSAFE);
   1992 	usb_add_task(oxfer->xfer.pipe->device, &oxfer->abort_task,
   1993 	    USB_TASKQ_HC);
   1994 }
   1995 
   1996 void
   1997 ohci_timeout_task(void *addr)
   1998 {
   1999 	usbd_xfer_handle xfer = addr;
   2000 	ohci_softc_t *sc = xfer->pipe->device->bus->hci_private;
   2001 
   2002 	DPRINTF(("ohci_timeout_task: xfer=%p\n", xfer));
   2003 
   2004 	mutex_enter(&sc->sc_lock);
   2005 	ohci_abort_xfer(xfer, USBD_TIMEOUT);
   2006 	mutex_exit(&sc->sc_lock);
   2007 }
   2008 
   2009 #ifdef OHCI_DEBUG
   2010 void
   2011 ohci_dump_tds(ohci_softc_t *sc, ohci_soft_td_t *std)
   2012 {
   2013 	for (; std; std = std->nexttd)
   2014 		ohci_dump_td(sc, std);
   2015 }
   2016 
   2017 void
   2018 ohci_dump_td(ohci_softc_t *sc, ohci_soft_td_t *std)
   2019 {
   2020 	char sbuf[128];
   2021 
   2022 	usb_syncmem(&std->dma, std->offs, sizeof(std->td),
   2023 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   2024 	snprintb(sbuf, sizeof(sbuf),
   2025 	    "\177\20"
   2026 	    "b\22R\0"
   2027 	    "f\23\02DP\0"
   2028 		"=\x0" "setup\0"
   2029 		"=\x1" "out\0"
   2030 		"=\x2" "in\0"
   2031 		"=\x3" "reserved\0"
   2032 	    "f\25\03DI\0"
   2033 		"=\x07" "none\0"
   2034 	    "f\30\02T\0"
   2035 		"=\x0" "carry\0"
   2036 		"=\x1" "carry\0"
   2037 		"=\x2" "0\0"
   2038 		"=\x3" "1\0"
   2039 	    "f\32\02EC\0"
   2040 	    "f\34\04CC\0",
   2041 	    (uint32_t)O32TOH(std->td.td_flags));
   2042 	printf("TD(%p) at %08lx:\n\tflags=%s\n\tcbp=0x%08lx nexttd=0x%08lx be=0x%08lx\n",
   2043 	       std, (u_long)std->physaddr, sbuf,
   2044 	       (u_long)O32TOH(std->td.td_cbp),
   2045 	       (u_long)O32TOH(std->td.td_nexttd),
   2046 	       (u_long)O32TOH(std->td.td_be));
   2047 }
   2048 
   2049 void
   2050 ohci_dump_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
   2051 {
   2052 	int i;
   2053 
   2054 	usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd),
   2055 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   2056 	printf("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n"
   2057 	       "bp0=0x%08lx next=0x%08lx be=0x%08lx\n",
   2058 	       sitd, (u_long)sitd->physaddr,
   2059 	       OHCI_ITD_GET_SF(O32TOH(sitd->itd.itd_flags)),
   2060 	       OHCI_ITD_GET_DI(O32TOH(sitd->itd.itd_flags)),
   2061 	       OHCI_ITD_GET_FC(O32TOH(sitd->itd.itd_flags)),
   2062 	       OHCI_ITD_GET_CC(O32TOH(sitd->itd.itd_flags)),
   2063 	       (u_long)O32TOH(sitd->itd.itd_bp0),
   2064 	       (u_long)O32TOH(sitd->itd.itd_nextitd),
   2065 	       (u_long)O32TOH(sitd->itd.itd_be));
   2066 	for (i = 0; i < OHCI_ITD_NOFFSET; i++)
   2067 		printf("offs[%d]=0x%04x ", i,
   2068 		       (u_int)O16TOH(sitd->itd.itd_offset[i]));
   2069 	printf("\n");
   2070 }
   2071 
   2072 void
   2073 ohci_dump_itds(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
   2074 {
   2075 	for (; sitd; sitd = sitd->nextitd)
   2076 		ohci_dump_itd(sc, sitd);
   2077 }
   2078 
   2079 void
   2080 ohci_dump_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed)
   2081 {
   2082 	char sbuf[128], sbuf2[128];
   2083 
   2084 	usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
   2085 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   2086 	snprintb(sbuf, sizeof(sbuf),
   2087 	    "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO",
   2088 	    (uint32_t)O32TOH(sed->ed.ed_flags));
   2089 	snprintb(sbuf2, sizeof(sbuf2), "\20\1HALT\2CARRY",
   2090 	    (uint32_t)O32TOH(sed->ed.ed_headp));
   2091 
   2092 	printf("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d flags=%s\ntailp=0x%08lx "
   2093 		 "headflags=%s headp=0x%08lx nexted=0x%08lx\n",
   2094 		 sed, (u_long)sed->physaddr,
   2095 		 OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)),
   2096 		 OHCI_ED_GET_EN(O32TOH(sed->ed.ed_flags)),
   2097 		 OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)), sbuf,
   2098 		 (u_long)O32TOH(sed->ed.ed_tailp), sbuf2,
   2099 		 (u_long)O32TOH(sed->ed.ed_headp),
   2100 		 (u_long)O32TOH(sed->ed.ed_nexted));
   2101 }
   2102 #endif
   2103 
   2104 usbd_status
   2105 ohci_open(usbd_pipe_handle pipe)
   2106 {
   2107 	usbd_device_handle dev = pipe->device;
   2108 	ohci_softc_t *sc = dev->bus->hci_private;
   2109 	usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
   2110 	struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
   2111 	uint8_t addr = dev->address;
   2112 	uint8_t xfertype = ed->bmAttributes & UE_XFERTYPE;
   2113 	ohci_soft_ed_t *sed;
   2114 	ohci_soft_td_t *std;
   2115 	ohci_soft_itd_t *sitd;
   2116 	ohci_physaddr_t tdphys;
   2117 	uint32_t fmt;
   2118 	usbd_status err = USBD_NOMEM;
   2119 	int ival;
   2120 
   2121 	DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
   2122 		     pipe, addr, ed->bEndpointAddress, sc->sc_addr));
   2123 
   2124 	if (sc->sc_dying) {
   2125 		return USBD_IOERROR;
   2126 	}
   2127 
   2128 	std = NULL;
   2129 	sed = NULL;
   2130 
   2131 	if (addr == sc->sc_addr) {
   2132 		switch (ed->bEndpointAddress) {
   2133 		case USB_CONTROL_ENDPOINT:
   2134 			pipe->methods = &ohci_root_ctrl_methods;
   2135 			break;
   2136 		case UE_DIR_IN | OHCI_INTR_ENDPT:
   2137 			pipe->methods = &ohci_root_intr_methods;
   2138 			break;
   2139 		default:
   2140 			err = USBD_INVAL;
   2141 			goto bad;
   2142 		}
   2143 	} else {
   2144 		sed = ohci_alloc_sed(sc);
   2145 		if (sed == NULL)
   2146 			goto bad;
   2147 		opipe->sed = sed;
   2148 		if (xfertype == UE_ISOCHRONOUS) {
   2149 			mutex_enter(&sc->sc_lock);
   2150 			sitd = ohci_alloc_sitd(sc);
   2151 			mutex_exit(&sc->sc_lock);
   2152 			if (sitd == NULL)
   2153 				goto bad;
   2154 
   2155 			opipe->tail.itd = sitd;
   2156 			tdphys = sitd->physaddr;
   2157 			fmt = OHCI_ED_FORMAT_ISO;
   2158 			if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN)
   2159 				fmt |= OHCI_ED_DIR_IN;
   2160 			else
   2161 				fmt |= OHCI_ED_DIR_OUT;
   2162 		} else {
   2163 			mutex_enter(&sc->sc_lock);
   2164 			std = ohci_alloc_std(sc);
   2165 			mutex_exit(&sc->sc_lock);
   2166 			if (std == NULL)
   2167 				goto bad;
   2168 
   2169 			opipe->tail.td = std;
   2170 			tdphys = std->physaddr;
   2171 			fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD;
   2172 		}
   2173 		sed->ed.ed_flags = HTOO32(
   2174 			OHCI_ED_SET_FA(addr) |
   2175 			OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) |
   2176 			(dev->speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) |
   2177 			fmt |
   2178 			OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize)));
   2179 		sed->ed.ed_headp = HTOO32(tdphys |
   2180 		    (pipe->endpoint->datatoggle ? OHCI_TOGGLECARRY : 0));
   2181 		sed->ed.ed_tailp = HTOO32(tdphys);
   2182 		usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
   2183 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2184 
   2185 		switch (xfertype) {
   2186 		case UE_CONTROL:
   2187 			pipe->methods = &ohci_device_ctrl_methods;
   2188 			err = usb_allocmem(&sc->sc_bus,
   2189 				  sizeof(usb_device_request_t),
   2190 				  0, &opipe->u.ctl.reqdma);
   2191 			if (err)
   2192 				goto bad;
   2193 			mutex_enter(&sc->sc_lock);
   2194 			ohci_add_ed(sc, sed, sc->sc_ctrl_head);
   2195 			mutex_exit(&sc->sc_lock);
   2196 			break;
   2197 		case UE_INTERRUPT:
   2198 			pipe->methods = &ohci_device_intr_methods;
   2199 			ival = pipe->interval;
   2200 			if (ival == USBD_DEFAULT_INTERVAL)
   2201 				ival = ed->bInterval;
   2202 			err = ohci_device_setintr(sc, opipe, ival);
   2203 			if (err)
   2204 				goto bad;
   2205 			break;
   2206 		case UE_ISOCHRONOUS:
   2207 			pipe->methods = &ohci_device_isoc_methods;
   2208 			return (ohci_setup_isoc(pipe));
   2209 		case UE_BULK:
   2210 			pipe->methods = &ohci_device_bulk_methods;
   2211 			mutex_enter(&sc->sc_lock);
   2212 			ohci_add_ed(sc, sed, sc->sc_bulk_head);
   2213 			mutex_exit(&sc->sc_lock);
   2214 			break;
   2215 		}
   2216 	}
   2217 
   2218 	return USBD_NORMAL_COMPLETION;
   2219 
   2220  bad:
   2221 	if (std != NULL) {
   2222 		mutex_enter(&sc->sc_lock);
   2223 		ohci_free_std(sc, std);
   2224 		mutex_exit(&sc->sc_lock);
   2225 	}
   2226 	if (sed != NULL)
   2227 		ohci_free_sed(sc, sed);
   2228 	return err;
   2229 
   2230 }
   2231 
   2232 /*
   2233  * Close a reqular pipe.
   2234  * Assumes that there are no pending transactions.
   2235  */
   2236 void
   2237 ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head)
   2238 {
   2239 	struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
   2240 	ohci_softc_t *sc = pipe->device->bus->hci_private;
   2241 	ohci_soft_ed_t *sed = opipe->sed;
   2242 
   2243 	KASSERT(mutex_owned(&sc->sc_lock));
   2244 
   2245 #ifdef DIAGNOSTIC
   2246 	sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
   2247 	if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
   2248 	    (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) {
   2249 		ohci_soft_td_t *std;
   2250 		std = ohci_hash_find_td(sc, O32TOH(sed->ed.ed_headp));
   2251 		printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x "
   2252 		       "tl=0x%x pipe=%p, std=%p\n", sed,
   2253 		       (int)O32TOH(sed->ed.ed_headp),
   2254 		       (int)O32TOH(sed->ed.ed_tailp),
   2255 		       pipe, std);
   2256 #ifdef OHCI_DEBUG
   2257 		usbd_dump_pipe(&opipe->pipe);
   2258 		ohci_dump_ed(sc, sed);
   2259 		if (std)
   2260 			ohci_dump_td(sc, std);
   2261 #endif
   2262 		usb_delay_ms(&sc->sc_bus, 2);
   2263 		if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
   2264 		    (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK))
   2265 			printf("ohci_close_pipe: pipe still not empty\n");
   2266 	}
   2267 #endif
   2268 	ohci_rem_ed(sc, sed, head);
   2269 	/* Make sure the host controller is not touching this ED */
   2270 	usb_delay_ms(&sc->sc_bus, 1);
   2271 	pipe->endpoint->datatoggle =
   2272 	    (O32TOH(sed->ed.ed_headp) & OHCI_TOGGLECARRY) ? 1 : 0;
   2273 	ohci_free_sed(sc, opipe->sed);
   2274 }
   2275 
   2276 /*
   2277  * Abort a device request.
   2278  * If this routine is called at splusb() it guarantees that the request
   2279  * will be removed from the hardware scheduling and that the callback
   2280  * for it will be called with USBD_CANCELLED status.
   2281  * It's impossible to guarantee that the requested transfer will not
   2282  * have happened since the hardware runs concurrently.
   2283  * If the transaction has already happened we rely on the ordinary
   2284  * interrupt processing to process it.
   2285  * XXX This is most probably wrong.
   2286  * XXXMRG this doesn't make sense anymore.
   2287  */
   2288 void
   2289 ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
   2290 {
   2291 	struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
   2292 	ohci_softc_t *sc = opipe->pipe.device->bus->hci_private;
   2293 	ohci_soft_ed_t *sed = opipe->sed;
   2294 	ohci_soft_td_t *p, *n;
   2295 	ohci_physaddr_t headp;
   2296 	int hit;
   2297 	int wake;
   2298 
   2299 	DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p sed=%p\n", xfer, opipe,sed));
   2300 
   2301 	KASSERT(mutex_owned(&sc->sc_lock));
   2302 	ASSERT_SLEEPABLE();
   2303 
   2304 	if (sc->sc_dying) {
   2305 		/* If we're dying, just do the software part. */
   2306 		xfer->status = status;	/* make software ignore it */
   2307 		callout_halt(&xfer->timeout_handle, &sc->sc_lock);
   2308 		usb_transfer_complete(xfer);
   2309 		return;
   2310 	}
   2311 
   2312 	/*
   2313 	 * If an abort is already in progress then just wait for it to
   2314 	 * complete and return.
   2315 	 */
   2316 	if (xfer->hcflags & UXFER_ABORTING) {
   2317 		DPRINTFN(2, ("ohci_abort_xfer: already aborting\n"));
   2318 #ifdef DIAGNOSTIC
   2319 		if (status == USBD_TIMEOUT)
   2320 			printf("%s: TIMEOUT while aborting\n", __func__);
   2321 #endif
   2322 		/* Override the status which might be USBD_TIMEOUT. */
   2323 		xfer->status = status;
   2324 		DPRINTFN(2, ("ohci_abort_xfer: waiting for abort to finish\n"));
   2325 		xfer->hcflags |= UXFER_ABORTWAIT;
   2326 		while (xfer->hcflags & UXFER_ABORTING)
   2327 			cv_wait(&xfer->hccv, &sc->sc_lock);
   2328 		goto done;
   2329 	}
   2330 	xfer->hcflags |= UXFER_ABORTING;
   2331 
   2332 	/*
   2333 	 * Step 1: Make interrupt routine and hardware ignore xfer.
   2334 	 */
   2335 	xfer->status = status;	/* make software ignore it */
   2336 	callout_stop(&xfer->timeout_handle);
   2337 	DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed));
   2338 	usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
   2339 	    sizeof(sed->ed.ed_flags),
   2340 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   2341 	sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */
   2342 	usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
   2343 	    sizeof(sed->ed.ed_flags),
   2344 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2345 
   2346 	/*
   2347 	 * Step 2: Wait until we know hardware has finished any possible
   2348 	 * use of the xfer.  Also make sure the soft interrupt routine
   2349 	 * has run.
   2350 	 */
   2351 	/* Hardware finishes in 1ms */
   2352 	usb_delay_ms_locked(opipe->pipe.device->bus, 20, &sc->sc_lock);
   2353 	sc->sc_softwake = 1;
   2354 	usb_schedsoftintr(&sc->sc_bus);
   2355 	cv_wait(&sc->sc_softwake_cv, &sc->sc_lock);
   2356 
   2357 	/*
   2358 	 * Step 3: Remove any vestiges of the xfer from the hardware.
   2359 	 * The complication here is that the hardware may have executed
   2360 	 * beyond the xfer we're trying to abort.  So as we're scanning
   2361 	 * the TDs of this xfer we check if the hardware points to
   2362 	 * any of them.
   2363 	 */
   2364 	p = xfer->hcpriv;
   2365 #ifdef DIAGNOSTIC
   2366 	if (p == NULL) {
   2367 		xfer->hcflags &= ~UXFER_ABORTING; /* XXX */
   2368 		printf("ohci_abort_xfer: hcpriv is NULL\n");
   2369 		goto done;
   2370 	}
   2371 #endif
   2372 #ifdef OHCI_DEBUG
   2373 	if (ohcidebug > 1) {
   2374 		DPRINTF(("ohci_abort_xfer: sed=\n"));
   2375 		ohci_dump_ed(sc, sed);
   2376 		ohci_dump_tds(sc, p);
   2377 	}
   2378 #endif
   2379 	headp = O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK;
   2380 	hit = 0;
   2381 	for (; p->xfer == xfer; p = n) {
   2382 		hit |= headp == p->physaddr;
   2383 		n = p->nexttd;
   2384 		ohci_free_std(sc, p);
   2385 	}
   2386 	/* Zap headp register if hardware pointed inside the xfer. */
   2387 	if (hit) {
   2388 		DPRINTFN(1,("ohci_abort_xfer: set hd=0x%08x, tl=0x%08x\n",
   2389 			    (int)p->physaddr, (int)O32TOH(sed->ed.ed_tailp)));
   2390 		sed->ed.ed_headp = HTOO32(p->physaddr); /* unlink TDs */
   2391 		usb_syncmem(&sed->dma,
   2392 		    sed->offs + offsetof(ohci_ed_t, ed_headp),
   2393 		    sizeof(sed->ed.ed_headp),
   2394 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2395 	} else {
   2396 		DPRINTFN(1,("ohci_abort_xfer: no hit\n"));
   2397 	}
   2398 
   2399 	/*
   2400 	 * Step 4: Turn on hardware again.
   2401 	 */
   2402 	usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
   2403 	    sizeof(sed->ed.ed_flags),
   2404 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   2405 	sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */
   2406 	usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
   2407 	    sizeof(sed->ed.ed_flags),
   2408 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2409 
   2410 	/*
   2411 	 * Step 5: Execute callback.
   2412 	 */
   2413 	wake = xfer->hcflags & UXFER_ABORTWAIT;
   2414 	xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT);
   2415 	usb_transfer_complete(xfer);
   2416 	if (wake)
   2417 		cv_broadcast(&xfer->hccv);
   2418 
   2419 done:
   2420 	KASSERT(mutex_owned(&sc->sc_lock));
   2421 }
   2422 
   2423 /*
   2424  * Data structures and routines to emulate the root hub.
   2425  */
   2426 Static usb_device_descriptor_t ohci_devd = {
   2427 	USB_DEVICE_DESCRIPTOR_SIZE,
   2428 	UDESC_DEVICE,		/* type */
   2429 	{0x00, 0x01},		/* USB version */
   2430 	UDCLASS_HUB,		/* class */
   2431 	UDSUBCLASS_HUB,		/* subclass */
   2432 	UDPROTO_FSHUB,		/* protocol */
   2433 	64,			/* max packet */
   2434 	{0},{0},{0x00,0x01},	/* device id */
   2435 	1,2,0,			/* string indicies */
   2436 	1			/* # of configurations */
   2437 };
   2438 
   2439 Static const usb_config_descriptor_t ohci_confd = {
   2440 	USB_CONFIG_DESCRIPTOR_SIZE,
   2441 	UDESC_CONFIG,
   2442 	{USB_CONFIG_DESCRIPTOR_SIZE +
   2443 	 USB_INTERFACE_DESCRIPTOR_SIZE +
   2444 	 USB_ENDPOINT_DESCRIPTOR_SIZE},
   2445 	1,
   2446 	1,
   2447 	0,
   2448 	UC_ATTR_MBO | UC_SELF_POWERED,
   2449 	0			/* max power */
   2450 };
   2451 
   2452 Static const usb_interface_descriptor_t ohci_ifcd = {
   2453 	USB_INTERFACE_DESCRIPTOR_SIZE,
   2454 	UDESC_INTERFACE,
   2455 	0,
   2456 	0,
   2457 	1,
   2458 	UICLASS_HUB,
   2459 	UISUBCLASS_HUB,
   2460 	UIPROTO_FSHUB,
   2461 	0
   2462 };
   2463 
   2464 Static const usb_endpoint_descriptor_t ohci_endpd = {
   2465 	.bLength = USB_ENDPOINT_DESCRIPTOR_SIZE,
   2466 	.bDescriptorType = UDESC_ENDPOINT,
   2467 	.bEndpointAddress = UE_DIR_IN | OHCI_INTR_ENDPT,
   2468 	.bmAttributes = UE_INTERRUPT,
   2469 	.wMaxPacketSize = {8, 0},			/* max packet */
   2470 	.bInterval = 255,
   2471 };
   2472 
   2473 Static const usb_hub_descriptor_t ohci_hubd = {
   2474 	.bDescLength = USB_HUB_DESCRIPTOR_SIZE,
   2475 	.bDescriptorType = UDESC_HUB,
   2476 };
   2477 
   2478 /*
   2479  * Simulate a hardware hub by handling all the necessary requests.
   2480  */
   2481 Static usbd_status
   2482 ohci_root_ctrl_transfer(usbd_xfer_handle xfer)
   2483 {
   2484 	ohci_softc_t *sc = xfer->pipe->device->bus->hci_private;
   2485 	usbd_status err;
   2486 
   2487 	/* Insert last in queue. */
   2488 	mutex_enter(&sc->sc_lock);
   2489 	err = usb_insert_transfer(xfer);
   2490 	mutex_exit(&sc->sc_lock);
   2491 	if (err)
   2492 		return (err);
   2493 
   2494 	/* Pipe isn't running, start first */
   2495 	return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   2496 }
   2497 
   2498 Static usbd_status
   2499 ohci_root_ctrl_start(usbd_xfer_handle xfer)
   2500 {
   2501 	ohci_softc_t *sc = xfer->pipe->device->bus->hci_private;
   2502 	usb_device_request_t *req;
   2503 	void *buf = NULL;
   2504 	int port, i;
   2505 	int len, value, index, l, totlen = 0;
   2506 	usb_port_status_t ps;
   2507 	usb_hub_descriptor_t hubd;
   2508 	usbd_status err;
   2509 	uint32_t v;
   2510 
   2511 	if (sc->sc_dying)
   2512 		return (USBD_IOERROR);
   2513 
   2514 #ifdef DIAGNOSTIC
   2515 	if (!(xfer->rqflags & URQ_REQUEST))
   2516 		/* XXX panic */
   2517 		return (USBD_INVAL);
   2518 #endif
   2519 	req = &xfer->request;
   2520 
   2521 	DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n",
   2522 		    req->bmRequestType, req->bRequest));
   2523 
   2524 	len = UGETW(req->wLength);
   2525 	value = UGETW(req->wValue);
   2526 	index = UGETW(req->wIndex);
   2527 
   2528 	if (len != 0)
   2529 		buf = KERNADDR(&xfer->dmabuf, 0);
   2530 
   2531 #define C(x,y) ((x) | ((y) << 8))
   2532 	switch(C(req->bRequest, req->bmRequestType)) {
   2533 	case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
   2534 	case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
   2535 	case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
   2536 		/*
   2537 		 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
   2538 		 * for the integrated root hub.
   2539 		 */
   2540 		break;
   2541 	case C(UR_GET_CONFIG, UT_READ_DEVICE):
   2542 		if (len > 0) {
   2543 			*(uint8_t *)buf = sc->sc_conf;
   2544 			totlen = 1;
   2545 		}
   2546 		break;
   2547 	case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
   2548 		DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value));
   2549 		if (len == 0)
   2550 			break;
   2551 		switch(value >> 8) {
   2552 		case UDESC_DEVICE:
   2553 			if ((value & 0xff) != 0) {
   2554 				err = USBD_IOERROR;
   2555 				goto ret;
   2556 			}
   2557 			totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
   2558 			USETW(ohci_devd.idVendor, sc->sc_id_vendor);
   2559 			memcpy(buf, &ohci_devd, l);
   2560 			break;
   2561 		case UDESC_CONFIG:
   2562 			if ((value & 0xff) != 0) {
   2563 				err = USBD_IOERROR;
   2564 				goto ret;
   2565 			}
   2566 			totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
   2567 			memcpy(buf, &ohci_confd, l);
   2568 			buf = (char *)buf + l;
   2569 			len -= l;
   2570 			l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
   2571 			totlen += l;
   2572 			memcpy(buf, &ohci_ifcd, l);
   2573 			buf = (char *)buf + l;
   2574 			len -= l;
   2575 			l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
   2576 			totlen += l;
   2577 			memcpy(buf, &ohci_endpd, l);
   2578 			break;
   2579 		case UDESC_STRING:
   2580 #define sd ((usb_string_descriptor_t *)buf)
   2581 			switch (value & 0xff) {
   2582 			case 0: /* Language table */
   2583 				totlen = usb_makelangtbl(sd, len);
   2584 				break;
   2585 			case 1: /* Vendor */
   2586 				totlen = usb_makestrdesc(sd, len,
   2587 							 sc->sc_vendor);
   2588 				break;
   2589 			case 2: /* Product */
   2590 				totlen = usb_makestrdesc(sd, len,
   2591 							 "OHCI root hub");
   2592 				break;
   2593 			}
   2594 #undef sd
   2595 			break;
   2596 		default:
   2597 			err = USBD_IOERROR;
   2598 			goto ret;
   2599 		}
   2600 		break;
   2601 	case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
   2602 		if (len > 0) {
   2603 			*(uint8_t *)buf = 0;
   2604 			totlen = 1;
   2605 		}
   2606 		break;
   2607 	case C(UR_GET_STATUS, UT_READ_DEVICE):
   2608 		if (len > 1) {
   2609 			USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
   2610 			totlen = 2;
   2611 		}
   2612 		break;
   2613 	case C(UR_GET_STATUS, UT_READ_INTERFACE):
   2614 	case C(UR_GET_STATUS, UT_READ_ENDPOINT):
   2615 		if (len > 1) {
   2616 			USETW(((usb_status_t *)buf)->wStatus, 0);
   2617 			totlen = 2;
   2618 		}
   2619 		break;
   2620 	case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
   2621 		if (value >= USB_MAX_DEVICES) {
   2622 			err = USBD_IOERROR;
   2623 			goto ret;
   2624 		}
   2625 		sc->sc_addr = value;
   2626 		break;
   2627 	case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
   2628 		if (value != 0 && value != 1) {
   2629 			err = USBD_IOERROR;
   2630 			goto ret;
   2631 		}
   2632 		sc->sc_conf = value;
   2633 		break;
   2634 	case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
   2635 		break;
   2636 	case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
   2637 	case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
   2638 	case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
   2639 		err = USBD_IOERROR;
   2640 		goto ret;
   2641 	case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
   2642 		break;
   2643 	case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
   2644 		break;
   2645 	/* Hub requests */
   2646 	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
   2647 		break;
   2648 	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
   2649 		DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
   2650 			     "port=%d feature=%d\n",
   2651 			     index, value));
   2652 		if (index < 1 || index > sc->sc_noport) {
   2653 			err = USBD_IOERROR;
   2654 			goto ret;
   2655 		}
   2656 		port = OHCI_RH_PORT_STATUS(index);
   2657 		switch(value) {
   2658 		case UHF_PORT_ENABLE:
   2659 			OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS);
   2660 			break;
   2661 		case UHF_PORT_SUSPEND:
   2662 			OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR);
   2663 			break;
   2664 		case UHF_PORT_POWER:
   2665 			/* Yes, writing to the LOW_SPEED bit clears power. */
   2666 			OWRITE4(sc, port, UPS_LOW_SPEED);
   2667 			break;
   2668 		case UHF_C_PORT_CONNECTION:
   2669 			OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16);
   2670 			break;
   2671 		case UHF_C_PORT_ENABLE:
   2672 			OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16);
   2673 			break;
   2674 		case UHF_C_PORT_SUSPEND:
   2675 			OWRITE4(sc, port, UPS_C_SUSPEND << 16);
   2676 			break;
   2677 		case UHF_C_PORT_OVER_CURRENT:
   2678 			OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16);
   2679 			break;
   2680 		case UHF_C_PORT_RESET:
   2681 			OWRITE4(sc, port, UPS_C_PORT_RESET << 16);
   2682 			break;
   2683 		default:
   2684 			err = USBD_IOERROR;
   2685 			goto ret;
   2686 		}
   2687 		switch(value) {
   2688 		case UHF_C_PORT_CONNECTION:
   2689 		case UHF_C_PORT_ENABLE:
   2690 		case UHF_C_PORT_SUSPEND:
   2691 		case UHF_C_PORT_OVER_CURRENT:
   2692 		case UHF_C_PORT_RESET:
   2693 			/* Enable RHSC interrupt if condition is cleared. */
   2694 			if ((OREAD4(sc, port) >> 16) == 0)
   2695 				ohci_rhsc_enable(sc);
   2696 			break;
   2697 		default:
   2698 			break;
   2699 		}
   2700 		break;
   2701 	case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
   2702 		if (len == 0)
   2703 			break;
   2704 		if ((value & 0xff) != 0) {
   2705 			err = USBD_IOERROR;
   2706 			goto ret;
   2707 		}
   2708 		v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
   2709 		hubd = ohci_hubd;
   2710 		hubd.bNbrPorts = sc->sc_noport;
   2711 		USETW(hubd.wHubCharacteristics,
   2712 		      (v & OHCI_NPS ? UHD_PWR_NO_SWITCH :
   2713 		       v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL)
   2714 		      /* XXX overcurrent */
   2715 		      );
   2716 		hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v);
   2717 		v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
   2718 		for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
   2719 			hubd.DeviceRemovable[i++] = (uint8_t)v;
   2720 		hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
   2721 		l = min(len, hubd.bDescLength);
   2722 		totlen = l;
   2723 		memcpy(buf, &hubd, l);
   2724 		break;
   2725 	case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
   2726 		if (len != 4) {
   2727 			err = USBD_IOERROR;
   2728 			goto ret;
   2729 		}
   2730 		memset(buf, 0, len); /* ? XXX */
   2731 		totlen = len;
   2732 		break;
   2733 	case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
   2734 		DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n",
   2735 			    index));
   2736 		if (index < 1 || index > sc->sc_noport) {
   2737 			err = USBD_IOERROR;
   2738 			goto ret;
   2739 		}
   2740 		if (len != 4) {
   2741 			err = USBD_IOERROR;
   2742 			goto ret;
   2743 		}
   2744 		v = OREAD4(sc, OHCI_RH_PORT_STATUS(index));
   2745 		DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n",
   2746 			    v));
   2747 		USETW(ps.wPortStatus, v);
   2748 		USETW(ps.wPortChange, v >> 16);
   2749 		l = min(len, sizeof ps);
   2750 		memcpy(buf, &ps, l);
   2751 		totlen = l;
   2752 		break;
   2753 	case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
   2754 		err = USBD_IOERROR;
   2755 		goto ret;
   2756 	case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
   2757 		break;
   2758 	case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
   2759 		if (index < 1 || index > sc->sc_noport) {
   2760 			err = USBD_IOERROR;
   2761 			goto ret;
   2762 		}
   2763 		port = OHCI_RH_PORT_STATUS(index);
   2764 		switch(value) {
   2765 		case UHF_PORT_ENABLE:
   2766 			OWRITE4(sc, port, UPS_PORT_ENABLED);
   2767 			break;
   2768 		case UHF_PORT_SUSPEND:
   2769 			OWRITE4(sc, port, UPS_SUSPEND);
   2770 			break;
   2771 		case UHF_PORT_RESET:
   2772 			DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n",
   2773 				    index));
   2774 			OWRITE4(sc, port, UPS_RESET);
   2775 			for (i = 0; i < 5; i++) {
   2776 				usb_delay_ms(&sc->sc_bus,
   2777 					     USB_PORT_ROOT_RESET_DELAY);
   2778 				if (sc->sc_dying) {
   2779 					err = USBD_IOERROR;
   2780 					goto ret;
   2781 				}
   2782 				if ((OREAD4(sc, port) & UPS_RESET) == 0)
   2783 					break;
   2784 			}
   2785 			DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n",
   2786 				    index, OREAD4(sc, port)));
   2787 			break;
   2788 		case UHF_PORT_POWER:
   2789 			DPRINTFN(2,("ohci_root_ctrl_transfer: set port power "
   2790 				    "%d\n", index));
   2791 			OWRITE4(sc, port, UPS_PORT_POWER);
   2792 			break;
   2793 		default:
   2794 			err = USBD_IOERROR;
   2795 			goto ret;
   2796 		}
   2797 		break;
   2798 	default:
   2799 		err = USBD_IOERROR;
   2800 		goto ret;
   2801 	}
   2802 	xfer->actlen = totlen;
   2803 	err = USBD_NORMAL_COMPLETION;
   2804  ret:
   2805 	xfer->status = err;
   2806 	mutex_enter(&sc->sc_lock);
   2807 	usb_transfer_complete(xfer);
   2808 	mutex_exit(&sc->sc_lock);
   2809 	return (USBD_IN_PROGRESS);
   2810 }
   2811 
   2812 /* Abort a root control request. */
   2813 Static void
   2814 ohci_root_ctrl_abort(usbd_xfer_handle xfer)
   2815 {
   2816 	/* Nothing to do, all transfers are synchronous. */
   2817 }
   2818 
   2819 /* Close the root pipe. */
   2820 Static void
   2821 ohci_root_ctrl_close(usbd_pipe_handle pipe)
   2822 {
   2823 	DPRINTF(("ohci_root_ctrl_close\n"));
   2824 	/* Nothing to do. */
   2825 }
   2826 
   2827 Static usbd_status
   2828 ohci_root_intr_transfer(usbd_xfer_handle xfer)
   2829 {
   2830 	ohci_softc_t *sc = xfer->pipe->device->bus->hci_private;
   2831 	usbd_status err;
   2832 
   2833 	/* Insert last in queue. */
   2834 	mutex_enter(&sc->sc_lock);
   2835 	err = usb_insert_transfer(xfer);
   2836 	mutex_exit(&sc->sc_lock);
   2837 	if (err)
   2838 		return (err);
   2839 
   2840 	/* Pipe isn't running, start first */
   2841 	return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   2842 }
   2843 
   2844 Static usbd_status
   2845 ohci_root_intr_start(usbd_xfer_handle xfer)
   2846 {
   2847 	usbd_pipe_handle pipe = xfer->pipe;
   2848 	ohci_softc_t *sc = pipe->device->bus->hci_private;
   2849 
   2850 	if (sc->sc_dying)
   2851 		return (USBD_IOERROR);
   2852 
   2853 	mutex_enter(&sc->sc_lock);
   2854 	KASSERT(sc->sc_intrxfer == NULL);
   2855 	sc->sc_intrxfer = xfer;
   2856 	mutex_exit(&sc->sc_lock);
   2857 
   2858 	return (USBD_IN_PROGRESS);
   2859 }
   2860 
   2861 /* Abort a root interrupt request. */
   2862 Static void
   2863 ohci_root_intr_abort(usbd_xfer_handle xfer)
   2864 {
   2865 	ohci_softc_t *sc = xfer->pipe->device->bus->hci_private;
   2866 
   2867 	KASSERT(mutex_owned(&sc->sc_lock));
   2868 	KASSERT(xfer->pipe->intrxfer == xfer);
   2869 
   2870 	sc->sc_intrxfer = NULL;
   2871 
   2872 	xfer->status = USBD_CANCELLED;
   2873 	usb_transfer_complete(xfer);
   2874 }
   2875 
   2876 /* Close the root pipe. */
   2877 Static void
   2878 ohci_root_intr_close(usbd_pipe_handle pipe)
   2879 {
   2880 	ohci_softc_t *sc = pipe->device->bus->hci_private;
   2881 
   2882 	KASSERT(mutex_owned(&sc->sc_lock));
   2883 
   2884 	DPRINTF(("ohci_root_intr_close\n"));
   2885 
   2886 	sc->sc_intrxfer = NULL;
   2887 }
   2888 
   2889 /************************/
   2890 
   2891 Static usbd_status
   2892 ohci_device_ctrl_transfer(usbd_xfer_handle xfer)
   2893 {
   2894 	ohci_softc_t *sc = xfer->pipe->device->bus->hci_private;
   2895 	usbd_status err;
   2896 
   2897 	/* Insert last in queue. */
   2898 	mutex_enter(&sc->sc_lock);
   2899 	err = usb_insert_transfer(xfer);
   2900 	mutex_exit(&sc->sc_lock);
   2901 	if (err)
   2902 		return (err);
   2903 
   2904 	/* Pipe isn't running, start first */
   2905 	return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   2906 }
   2907 
   2908 Static usbd_status
   2909 ohci_device_ctrl_start(usbd_xfer_handle xfer)
   2910 {
   2911 	ohci_softc_t *sc = xfer->pipe->device->bus->hci_private;
   2912 	usbd_status err;
   2913 
   2914 	if (sc->sc_dying)
   2915 		return (USBD_IOERROR);
   2916 
   2917 #ifdef DIAGNOSTIC
   2918 	if (!(xfer->rqflags & URQ_REQUEST)) {
   2919 		/* XXX panic */
   2920 		printf("ohci_device_ctrl_transfer: not a request\n");
   2921 		return (USBD_INVAL);
   2922 	}
   2923 #endif
   2924 
   2925 	mutex_enter(&sc->sc_lock);
   2926 	err = ohci_device_request(xfer);
   2927 	mutex_exit(&sc->sc_lock);
   2928 	if (err)
   2929 		return (err);
   2930 
   2931 	if (sc->sc_bus.use_polling)
   2932 		ohci_waitintr(sc, xfer);
   2933 	return (USBD_IN_PROGRESS);
   2934 }
   2935 
   2936 /* Abort a device control request. */
   2937 Static void
   2938 ohci_device_ctrl_abort(usbd_xfer_handle xfer)
   2939 {
   2940 #ifdef DIAGNOSTIC
   2941 	ohci_softc_t *sc = xfer->pipe->device->bus->hci_private;
   2942 #endif
   2943 
   2944 	KASSERT(mutex_owned(&sc->sc_lock));
   2945 
   2946 	DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer));
   2947 	ohci_abort_xfer(xfer, USBD_CANCELLED);
   2948 }
   2949 
   2950 /* Close a device control pipe. */
   2951 Static void
   2952 ohci_device_ctrl_close(usbd_pipe_handle pipe)
   2953 {
   2954 	struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
   2955 	ohci_softc_t *sc = pipe->device->bus->hci_private;
   2956 
   2957 	KASSERT(mutex_owned(&sc->sc_lock));
   2958 
   2959 	DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe));
   2960 	ohci_close_pipe(pipe, sc->sc_ctrl_head);
   2961 	ohci_free_std(sc, opipe->tail.td);
   2962 }
   2963 
   2964 /************************/
   2965 
   2966 Static void
   2967 ohci_device_clear_toggle(usbd_pipe_handle pipe)
   2968 {
   2969 	struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
   2970 	ohci_softc_t *sc = pipe->device->bus->hci_private;
   2971 
   2972 	opipe->sed->ed.ed_headp &= HTOO32(~OHCI_TOGGLECARRY);
   2973 }
   2974 
   2975 Static void
   2976 ohci_noop(usbd_pipe_handle pipe)
   2977 {
   2978 }
   2979 
   2980 Static usbd_status
   2981 ohci_device_bulk_transfer(usbd_xfer_handle xfer)
   2982 {
   2983 	ohci_softc_t *sc = xfer->pipe->device->bus->hci_private;
   2984 	usbd_status err;
   2985 
   2986 	/* Insert last in queue. */
   2987 	mutex_enter(&sc->sc_lock);
   2988 	err = usb_insert_transfer(xfer);
   2989 	mutex_exit(&sc->sc_lock);
   2990 	if (err)
   2991 		return (err);
   2992 
   2993 	/* Pipe isn't running, start first */
   2994 	return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   2995 }
   2996 
   2997 Static usbd_status
   2998 ohci_device_bulk_start(usbd_xfer_handle xfer)
   2999 {
   3000 	struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
   3001 	usbd_device_handle dev = opipe->pipe.device;
   3002 	ohci_softc_t *sc = dev->bus->hci_private;
   3003 	int addr = dev->address;
   3004 	ohci_soft_td_t *data, *tail, *tdp;
   3005 	ohci_soft_ed_t *sed;
   3006 	int len, isread, endpt;
   3007 	usbd_status err;
   3008 
   3009 	if (sc->sc_dying)
   3010 		return (USBD_IOERROR);
   3011 
   3012 #ifdef DIAGNOSTIC
   3013 	if (xfer->rqflags & URQ_REQUEST) {
   3014 		/* XXX panic */
   3015 		printf("ohci_device_bulk_start: a request\n");
   3016 		return (USBD_INVAL);
   3017 	}
   3018 #endif
   3019 
   3020 	mutex_enter(&sc->sc_lock);
   3021 
   3022 	len = xfer->length;
   3023 	endpt = xfer->pipe->endpoint->edesc->bEndpointAddress;
   3024 	isread = UE_GET_DIR(endpt) == UE_DIR_IN;
   3025 	sed = opipe->sed;
   3026 
   3027 	DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d "
   3028 		    "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags,
   3029 		    endpt));
   3030 
   3031 	opipe->u.bulk.isread = isread;
   3032 	opipe->u.bulk.length = len;
   3033 
   3034 	usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
   3035 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   3036 	/* Update device address */
   3037 	sed->ed.ed_flags = HTOO32(
   3038 		(O32TOH(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) |
   3039 		OHCI_ED_SET_FA(addr));
   3040 
   3041 	/* Allocate a chain of new TDs (including a new tail). */
   3042 	data = opipe->tail.td;
   3043 	err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer,
   3044 		  data, &tail);
   3045 	if (err)
   3046 		return err;
   3047 
   3048 	/* We want interrupt at the end of the transfer. */
   3049 	tail->td.td_flags &= HTOO32(~OHCI_TD_INTR_MASK);
   3050 	tail->td.td_flags |= HTOO32(OHCI_TD_SET_DI(1));
   3051 	tail->flags |= OHCI_CALL_DONE;
   3052 	tail = tail->nexttd;	/* point at sentinel */
   3053 	usb_syncmem(&tail->dma, tail->offs + offsetof(ohci_td_t, td_flags),
   3054 	    sizeof(tail->td.td_flags),
   3055 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3056 	if (err) {
   3057 		mutex_exit(&sc->sc_lock);
   3058 		return (err);
   3059 	}
   3060 
   3061 	tail->xfer = NULL;
   3062 	xfer->hcpriv = data;
   3063 
   3064 	DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x "
   3065 		    "td_cbp=0x%08x td_be=0x%08x\n",
   3066 		    (int)O32TOH(sed->ed.ed_flags),
   3067 		    (int)O32TOH(data->td.td_flags),
   3068 		    (int)O32TOH(data->td.td_cbp),
   3069 		    (int)O32TOH(data->td.td_be)));
   3070 
   3071 #ifdef OHCI_DEBUG
   3072 	if (ohcidebug > 5) {
   3073 		ohci_dump_ed(sc, sed);
   3074 		ohci_dump_tds(sc, data);
   3075 	}
   3076 #endif
   3077 
   3078 	/* Insert ED in schedule */
   3079 	for (tdp = data; tdp != tail; tdp = tdp->nexttd) {
   3080 		tdp->xfer = xfer;
   3081 	}
   3082 	sed->ed.ed_tailp = HTOO32(tail->physaddr);
   3083 	opipe->tail.td = tail;
   3084 	sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP);
   3085 	usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
   3086 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3087 	OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
   3088 	if (xfer->timeout && !sc->sc_bus.use_polling) {
   3089 		callout_reset(&xfer->timeout_handle, mstohz(xfer->timeout),
   3090 			    ohci_timeout, xfer);
   3091 	}
   3092 	mutex_exit(&sc->sc_lock);
   3093 
   3094 #if 0
   3095 /* This goes wrong if we are too slow. */
   3096 	if (ohcidebug > 10) {
   3097 		delay(10000);
   3098 		DPRINTF(("ohci_device_intr_transfer: status=%x\n",
   3099 			 OREAD4(sc, OHCI_COMMAND_STATUS)));
   3100 		ohci_dump_ed(sc, sed);
   3101 		ohci_dump_tds(sc, data);
   3102 	}
   3103 #endif
   3104 
   3105 	return (USBD_IN_PROGRESS);
   3106 }
   3107 
   3108 Static void
   3109 ohci_device_bulk_abort(usbd_xfer_handle xfer)
   3110 {
   3111 #ifdef DIAGNOSTIC
   3112 	ohci_softc_t *sc = xfer->pipe->device->bus->hci_private;
   3113 #endif
   3114 
   3115 	KASSERT(mutex_owned(&sc->sc_lock));
   3116 
   3117 	DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer));
   3118 	ohci_abort_xfer(xfer, USBD_CANCELLED);
   3119 }
   3120 
   3121 /*
   3122  * Close a device bulk pipe.
   3123  */
   3124 Static void
   3125 ohci_device_bulk_close(usbd_pipe_handle pipe)
   3126 {
   3127 	struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
   3128 	ohci_softc_t *sc = pipe->device->bus->hci_private;
   3129 
   3130 	KASSERT(mutex_owned(&sc->sc_lock));
   3131 
   3132 	DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe));
   3133 	ohci_close_pipe(pipe, sc->sc_bulk_head);
   3134 	ohci_free_std(sc, opipe->tail.td);
   3135 }
   3136 
   3137 /************************/
   3138 
   3139 Static usbd_status
   3140 ohci_device_intr_transfer(usbd_xfer_handle xfer)
   3141 {
   3142 	ohci_softc_t *sc = xfer->pipe->device->bus->hci_private;
   3143 	usbd_status err;
   3144 
   3145 	/* Insert last in queue. */
   3146 	mutex_enter(&sc->sc_lock);
   3147 	err = usb_insert_transfer(xfer);
   3148 	mutex_exit(&sc->sc_lock);
   3149 	if (err)
   3150 		return (err);
   3151 
   3152 	/* Pipe isn't running, start first */
   3153 	return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   3154 }
   3155 
   3156 Static usbd_status
   3157 ohci_device_intr_start(usbd_xfer_handle xfer)
   3158 {
   3159 	struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
   3160 	usbd_device_handle dev = opipe->pipe.device;
   3161 	ohci_softc_t *sc = dev->bus->hci_private;
   3162 	ohci_soft_ed_t *sed = opipe->sed;
   3163 	ohci_soft_td_t *data, *tail;
   3164 	int len, isread, endpt;
   3165 
   3166 	if (sc->sc_dying)
   3167 		return (USBD_IOERROR);
   3168 
   3169 	DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d "
   3170 		     "flags=%d priv=%p\n",
   3171 		     xfer, xfer->length, xfer->flags, xfer->priv));
   3172 
   3173 #ifdef DIAGNOSTIC
   3174 	if (xfer->rqflags & URQ_REQUEST)
   3175 		panic("ohci_device_intr_transfer: a request");
   3176 #endif
   3177 
   3178 	len = xfer->length;
   3179 	endpt = xfer->pipe->endpoint->edesc->bEndpointAddress;
   3180 	isread = UE_GET_DIR(endpt) == UE_DIR_IN;
   3181 
   3182 	data = opipe->tail.td;
   3183 	mutex_enter(&sc->sc_lock);
   3184 	tail = ohci_alloc_std(sc);
   3185 	mutex_exit(&sc->sc_lock);
   3186 	if (tail == NULL)
   3187 		return (USBD_NOMEM);
   3188 	tail->xfer = NULL;
   3189 
   3190 	data->td.td_flags = HTOO32(
   3191 		isread ? OHCI_TD_IN : OHCI_TD_OUT |
   3192 		OHCI_TD_NOCC |
   3193 		OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
   3194 	if (xfer->flags & USBD_SHORT_XFER_OK)
   3195 		data->td.td_flags |= HTOO32(OHCI_TD_R);
   3196 	data->td.td_cbp = HTOO32(DMAADDR(&xfer->dmabuf, 0));
   3197 	data->nexttd = tail;
   3198 	data->td.td_nexttd = HTOO32(tail->physaddr);
   3199 	data->td.td_be = HTOO32(O32TOH(data->td.td_cbp) + len - 1);
   3200 	data->len = len;
   3201 	data->xfer = xfer;
   3202 	data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
   3203 	usb_syncmem(&data->dma, data->offs, sizeof(data->td),
   3204 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3205 	xfer->hcpriv = data;
   3206 
   3207 #ifdef OHCI_DEBUG
   3208 	if (ohcidebug > 5) {
   3209 		DPRINTF(("ohci_device_intr_transfer:\n"));
   3210 		ohci_dump_ed(sc, sed);
   3211 		ohci_dump_tds(sc, data);
   3212 	}
   3213 #endif
   3214 
   3215 	/* Insert ED in schedule */
   3216 	mutex_enter(&sc->sc_lock);
   3217 	usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
   3218 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   3219 	sed->ed.ed_tailp = HTOO32(tail->physaddr);
   3220 	opipe->tail.td = tail;
   3221 	sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP);
   3222 	usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
   3223 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3224 
   3225 #if 0
   3226 /*
   3227  * This goes horribly wrong, printing thousands of descriptors,
   3228  * because false references are followed due to the fact that the
   3229  * TD is gone.
   3230  */
   3231 	if (ohcidebug > 5) {
   3232 		usb_delay_ms_locked(&sc->sc_bus, 5, &sc->sc_lock);
   3233 		DPRINTF(("ohci_device_intr_transfer: status=%x\n",
   3234 			 OREAD4(sc, OHCI_COMMAND_STATUS)));
   3235 		ohci_dump_ed(sc, sed);
   3236 		ohci_dump_tds(sc, data);
   3237 	}
   3238 #endif
   3239 	mutex_exit(&sc->sc_lock);
   3240 
   3241 	return (USBD_IN_PROGRESS);
   3242 }
   3243 
   3244 /* Abort a device interrupt request. */
   3245 Static void
   3246 ohci_device_intr_abort(usbd_xfer_handle xfer)
   3247 {
   3248 #ifdef DIAGNOSTIC
   3249 	ohci_softc_t *sc = xfer->pipe->device->bus->hci_private;
   3250 #endif
   3251 
   3252 	KASSERT(mutex_owned(&sc->sc_lock));
   3253 	KASSERT(xfer->pipe->intrxfer == xfer);
   3254 
   3255 	ohci_abort_xfer(xfer, USBD_CANCELLED);
   3256 }
   3257 
   3258 /* Close a device interrupt pipe. */
   3259 Static void
   3260 ohci_device_intr_close(usbd_pipe_handle pipe)
   3261 {
   3262 	struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
   3263 	ohci_softc_t *sc = pipe->device->bus->hci_private;
   3264 	int nslots = opipe->u.intr.nslots;
   3265 	int pos = opipe->u.intr.pos;
   3266 	int j;
   3267 	ohci_soft_ed_t *p, *sed = opipe->sed;
   3268 
   3269 	KASSERT(mutex_owned(&sc->sc_lock));
   3270 
   3271 	DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n",
   3272 		    pipe, nslots, pos));
   3273 	usb_syncmem(&sed->dma, sed->offs,
   3274 	    sizeof(sed->ed), BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   3275 	sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
   3276 	usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
   3277 	    sizeof(sed->ed.ed_flags),
   3278 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3279 	if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
   3280 	    (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK))
   3281 		usb_delay_ms_locked(&sc->sc_bus, 2, &sc->sc_lock);
   3282 
   3283 	for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next)
   3284 		continue;
   3285 #ifdef DIAGNOSTIC
   3286 	if (p == NULL)
   3287 		panic("ohci_device_intr_close: ED not found");
   3288 #endif
   3289 	p->next = sed->next;
   3290 	p->ed.ed_nexted = sed->ed.ed_nexted;
   3291 	usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted),
   3292 	    sizeof(p->ed.ed_nexted),
   3293 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3294 
   3295 	for (j = 0; j < nslots; j++)
   3296 		--sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS];
   3297 
   3298 	ohci_free_std(sc, opipe->tail.td);
   3299 	ohci_free_sed(sc, opipe->sed);
   3300 }
   3301 
   3302 Static usbd_status
   3303 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival)
   3304 {
   3305 	int i, j, best;
   3306 	u_int npoll, slow, shigh, nslots;
   3307 	u_int bestbw, bw;
   3308 	ohci_soft_ed_t *hsed, *sed = opipe->sed;
   3309 
   3310 	DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe));
   3311 	if (ival == 0) {
   3312 		printf("ohci_setintr: 0 interval\n");
   3313 		return (USBD_INVAL);
   3314 	}
   3315 
   3316 	npoll = OHCI_NO_INTRS;
   3317 	while (npoll > ival)
   3318 		npoll /= 2;
   3319 	DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll));
   3320 
   3321 	/*
   3322 	 * We now know which level in the tree the ED must go into.
   3323 	 * Figure out which slot has most bandwidth left over.
   3324 	 * Slots to examine:
   3325 	 * npoll
   3326 	 * 1	0
   3327 	 * 2	1 2
   3328 	 * 4	3 4 5 6
   3329 	 * 8	7 8 9 10 11 12 13 14
   3330 	 * N    (N-1) .. (N-1+N-1)
   3331 	 */
   3332 	slow = npoll-1;
   3333 	shigh = slow + npoll;
   3334 	nslots = OHCI_NO_INTRS / npoll;
   3335 	for (best = i = slow, bestbw = ~0; i < shigh; i++) {
   3336 		bw = 0;
   3337 		for (j = 0; j < nslots; j++)
   3338 			bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS];
   3339 		if (bw < bestbw) {
   3340 			best = i;
   3341 			bestbw = bw;
   3342 		}
   3343 	}
   3344 	DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n",
   3345 		     best, slow, shigh, bestbw));
   3346 
   3347 	mutex_enter(&sc->sc_lock);
   3348 	hsed = sc->sc_eds[best];
   3349 	sed->next = hsed->next;
   3350 	usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags),
   3351 	    sizeof(hsed->ed.ed_flags),
   3352 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   3353 	sed->ed.ed_nexted = hsed->ed.ed_nexted;
   3354 	usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
   3355 	    sizeof(sed->ed.ed_flags),
   3356 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3357 	hsed->next = sed;
   3358 	hsed->ed.ed_nexted = HTOO32(sed->physaddr);
   3359 	usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags),
   3360 	    sizeof(hsed->ed.ed_flags),
   3361 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3362 	mutex_exit(&sc->sc_lock);
   3363 
   3364 	for (j = 0; j < nslots; j++)
   3365 		++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS];
   3366 	opipe->u.intr.nslots = nslots;
   3367 	opipe->u.intr.pos = best;
   3368 
   3369 	DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe));
   3370 	return (USBD_NORMAL_COMPLETION);
   3371 }
   3372 
   3373 /***********************/
   3374 
   3375 usbd_status
   3376 ohci_device_isoc_transfer(usbd_xfer_handle xfer)
   3377 {
   3378 	ohci_softc_t *sc = xfer->pipe->device->bus->hci_private;
   3379 	usbd_status err;
   3380 
   3381 	DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer));
   3382 
   3383 	/* Put it on our queue, */
   3384 	mutex_enter(&sc->sc_lock);
   3385 	err = usb_insert_transfer(xfer);
   3386 	mutex_exit(&sc->sc_lock);
   3387 
   3388 	/* bail out on error, */
   3389 	if (err && err != USBD_IN_PROGRESS)
   3390 		return (err);
   3391 
   3392 	/* XXX should check inuse here */
   3393 
   3394 	/* insert into schedule, */
   3395 	ohci_device_isoc_enter(xfer);
   3396 
   3397 	/* and start if the pipe wasn't running */
   3398 	if (!err)
   3399 		ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue));
   3400 
   3401 	return (err);
   3402 }
   3403 
   3404 void
   3405 ohci_device_isoc_enter(usbd_xfer_handle xfer)
   3406 {
   3407 	struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
   3408 	usbd_device_handle dev = opipe->pipe.device;
   3409 	ohci_softc_t *sc = dev->bus->hci_private;
   3410 	ohci_soft_ed_t *sed = opipe->sed;
   3411 	struct iso *iso = &opipe->u.iso;
   3412 	ohci_soft_itd_t *sitd, *nsitd;
   3413 	ohci_physaddr_t buf, offs, noffs, bp0;
   3414 	int i, ncur, nframes;
   3415 
   3416 	DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p "
   3417 		    "nframes=%d\n",
   3418 		    iso->inuse, iso->next, xfer, xfer->nframes));
   3419 
   3420 	if (sc->sc_dying)
   3421 		return;
   3422 
   3423 	if (iso->next == -1) {
   3424 		/* Not in use yet, schedule it a few frames ahead. */
   3425 		iso->next = O32TOH(sc->sc_hcca->hcca_frame_number) + 5;
   3426 		DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n",
   3427 			    iso->next));
   3428 	}
   3429 
   3430 	sitd = opipe->tail.itd;
   3431 	buf = DMAADDR(&xfer->dmabuf, 0);
   3432 	bp0 = OHCI_PAGE(buf);
   3433 	offs = OHCI_PAGE_OFFSET(buf);
   3434 	nframes = xfer->nframes;
   3435 	xfer->hcpriv = sitd;
   3436 	for (i = ncur = 0; i < nframes; i++, ncur++) {
   3437 		noffs = offs + xfer->frlengths[i];
   3438 		if (ncur == OHCI_ITD_NOFFSET ||	/* all offsets used */
   3439 		    OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */
   3440 
   3441 			/* Allocate next ITD */
   3442 			mutex_enter(&sc->sc_lock);
   3443 			nsitd = ohci_alloc_sitd(sc);
   3444 			mutex_exit(&sc->sc_lock);
   3445 			if (nsitd == NULL) {
   3446 				/* XXX what now? */
   3447 				printf("%s: isoc TD alloc failed\n",
   3448 				       device_xname(sc->sc_dev));
   3449 				return;
   3450 			}
   3451 
   3452 			/* Fill current ITD */
   3453 			sitd->itd.itd_flags = HTOO32(
   3454 				OHCI_ITD_NOCC |
   3455 				OHCI_ITD_SET_SF(iso->next) |
   3456 				OHCI_ITD_SET_DI(6) | /* delay intr a little */
   3457 				OHCI_ITD_SET_FC(ncur));
   3458 			sitd->itd.itd_bp0 = HTOO32(bp0);
   3459 			sitd->nextitd = nsitd;
   3460 			sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr);
   3461 			sitd->itd.itd_be = HTOO32(bp0 + offs - 1);
   3462 			sitd->xfer = xfer;
   3463 			sitd->flags = 0;
   3464 			usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd),
   3465 			    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3466 
   3467 			sitd = nsitd;
   3468 			iso->next = iso->next + ncur;
   3469 			bp0 = OHCI_PAGE(buf + offs);
   3470 			ncur = 0;
   3471 		}
   3472 		sitd->itd.itd_offset[ncur] = HTOO16(OHCI_ITD_MK_OFFS(offs));
   3473 		offs = noffs;
   3474 	}
   3475 	mutex_enter(&sc->sc_lock);
   3476 	nsitd = ohci_alloc_sitd(sc);
   3477 	mutex_exit(&sc->sc_lock);
   3478 	if (nsitd == NULL) {
   3479 		/* XXX what now? */
   3480 		printf("%s: isoc TD alloc failed\n",
   3481 		       device_xname(sc->sc_dev));
   3482 		return;
   3483 	}
   3484 	/* Fixup last used ITD */
   3485 	sitd->itd.itd_flags = HTOO32(
   3486 		OHCI_ITD_NOCC |
   3487 		OHCI_ITD_SET_SF(iso->next) |
   3488 		OHCI_ITD_SET_DI(0) |
   3489 		OHCI_ITD_SET_FC(ncur));
   3490 	sitd->itd.itd_bp0 = HTOO32(bp0);
   3491 	sitd->nextitd = nsitd;
   3492 	sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr);
   3493 	sitd->itd.itd_be = HTOO32(bp0 + offs - 1);
   3494 	sitd->xfer = xfer;
   3495 	sitd->flags = OHCI_CALL_DONE;
   3496 	usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd),
   3497 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3498 
   3499 	iso->next = iso->next + ncur;
   3500 	iso->inuse += nframes;
   3501 
   3502 	xfer->actlen = offs;	/* XXX pretend we did it all */
   3503 
   3504 	xfer->status = USBD_IN_PROGRESS;
   3505 
   3506 #ifdef OHCI_DEBUG
   3507 	if (ohcidebug > 5) {
   3508 		DPRINTF(("ohci_device_isoc_enter: frame=%d\n",
   3509 			 O32TOH(sc->sc_hcca->hcca_frame_number)));
   3510 		ohci_dump_itds(sc, xfer->hcpriv);
   3511 		ohci_dump_ed(sc, sed);
   3512 	}
   3513 #endif
   3514 
   3515 	mutex_enter(&sc->sc_lock);
   3516 	usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
   3517 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   3518 	sed->ed.ed_tailp = HTOO32(nsitd->physaddr);
   3519 	opipe->tail.itd = nsitd;
   3520 	sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP);
   3521 	usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
   3522 	    sizeof(sed->ed.ed_flags),
   3523 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3524 	mutex_exit(&sc->sc_lock);
   3525 
   3526 #ifdef OHCI_DEBUG
   3527 	if (ohcidebug > 5) {
   3528 		delay(150000);
   3529 		DPRINTF(("ohci_device_isoc_enter: after frame=%d\n",
   3530 			 O32TOH(sc->sc_hcca->hcca_frame_number)));
   3531 		ohci_dump_itds(sc, xfer->hcpriv);
   3532 		ohci_dump_ed(sc, sed);
   3533 	}
   3534 #endif
   3535 }
   3536 
   3537 usbd_status
   3538 ohci_device_isoc_start(usbd_xfer_handle xfer)
   3539 {
   3540 	struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
   3541 	ohci_softc_t *sc = opipe->pipe.device->bus->hci_private;
   3542 
   3543 	DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer));
   3544 
   3545 	mutex_enter(&sc->sc_lock);
   3546 
   3547 	if (sc->sc_dying) {
   3548 		mutex_exit(&sc->sc_lock);
   3549 		return (USBD_IOERROR);
   3550 	}
   3551 
   3552 #ifdef DIAGNOSTIC
   3553 	if (xfer->status != USBD_IN_PROGRESS)
   3554 		printf("ohci_device_isoc_start: not in progress %p\n", xfer);
   3555 #endif
   3556 
   3557 	/* XXX anything to do? */
   3558 
   3559 	mutex_exit(&sc->sc_lock);
   3560 
   3561 	return (USBD_IN_PROGRESS);
   3562 }
   3563 
   3564 void
   3565 ohci_device_isoc_abort(usbd_xfer_handle xfer)
   3566 {
   3567 	struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
   3568 	ohci_softc_t *sc = opipe->pipe.device->bus->hci_private;
   3569 	ohci_soft_ed_t *sed;
   3570 	ohci_soft_itd_t *sitd;
   3571 
   3572 	DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p lock=%p\n", xfer, &sc->sc_lock));
   3573 
   3574 	KASSERT(mutex_owned(&sc->sc_lock));
   3575 
   3576 	/* Transfer is already done. */
   3577 	if (xfer->status != USBD_NOT_STARTED &&
   3578 	    xfer->status != USBD_IN_PROGRESS) {
   3579 		printf("ohci_device_isoc_abort: early return\n");
   3580 		goto done;
   3581 	}
   3582 
   3583 	/* Give xfer the requested abort code. */
   3584 	xfer->status = USBD_CANCELLED;
   3585 
   3586 	sed = opipe->sed;
   3587 	usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
   3588 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   3589 	sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */
   3590 	usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
   3591 	    sizeof(sed->ed.ed_flags),
   3592 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3593 
   3594 	sitd = xfer->hcpriv;
   3595 #ifdef DIAGNOSTIC
   3596 	if (sitd == NULL) {
   3597 		printf("ohci_device_isoc_abort: hcpriv==0\n");
   3598 		goto done;
   3599 	}
   3600 #endif
   3601 	for (; sitd->xfer == xfer; sitd = sitd->nextitd) {
   3602 #ifdef DIAGNOSTIC
   3603 		DPRINTFN(1,("abort sets done sitd=%p\n", sitd));
   3604 		sitd->isdone = 1;
   3605 #endif
   3606 	}
   3607 
   3608 	usb_delay_ms_locked(&sc->sc_bus, OHCI_ITD_NOFFSET, &sc->sc_lock);
   3609 
   3610 	/* Run callback. */
   3611 	usb_transfer_complete(xfer);
   3612 
   3613 	sed->ed.ed_headp = HTOO32(sitd->physaddr); /* unlink TDs */
   3614 	sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */
   3615 	usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
   3616 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3617 
   3618  done:
   3619 	KASSERT(mutex_owned(&sc->sc_lock));
   3620 }
   3621 
   3622 void
   3623 ohci_device_isoc_done(usbd_xfer_handle xfer)
   3624 {
   3625 	DPRINTFN(1,("ohci_device_isoc_done: xfer=%p\n", xfer));
   3626 }
   3627 
   3628 usbd_status
   3629 ohci_setup_isoc(usbd_pipe_handle pipe)
   3630 {
   3631 	struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
   3632 	ohci_softc_t *sc = pipe->device->bus->hci_private;
   3633 	struct iso *iso = &opipe->u.iso;
   3634 
   3635 	iso->next = -1;
   3636 	iso->inuse = 0;
   3637 
   3638 	mutex_enter(&sc->sc_lock);
   3639 	ohci_add_ed(sc, opipe->sed, sc->sc_isoc_head);
   3640 	mutex_exit(&sc->sc_lock);
   3641 
   3642 	return (USBD_NORMAL_COMPLETION);
   3643 }
   3644 
   3645 void
   3646 ohci_device_isoc_close(usbd_pipe_handle pipe)
   3647 {
   3648 	struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
   3649 	ohci_softc_t *sc = pipe->device->bus->hci_private;
   3650 
   3651 	KASSERT(mutex_owned(&sc->sc_lock));
   3652 
   3653 	DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe));
   3654 	ohci_close_pipe(pipe, sc->sc_isoc_head);
   3655 #ifdef DIAGNOSTIC
   3656 	opipe->tail.itd->isdone = 1;
   3657 #endif
   3658 	ohci_free_sitd(sc, opipe->tail.itd);
   3659 }
   3660