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ohci.c revision 1.254.2.53
      1 /*	$NetBSD: ohci.c,v 1.254.2.53 2016/02/27 15:54:30 skrll Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1998, 2004, 2005, 2012 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Lennart Augustsson (lennart (at) augustsson.net) at
      9  * Carlstedt Research & Technology, Jared D. McNeill (jmcneill (at) invisible.ca)
     10  * and Matthew R. Green (mrg (at) eterna.com.au).
     11  * This code is derived from software contributed to The NetBSD Foundation
     12  * by Charles M. Hannum.
     13  *
     14  * Redistribution and use in source and binary forms, with or without
     15  * modification, are permitted provided that the following conditions
     16  * are met:
     17  * 1. Redistributions of source code must retain the above copyright
     18  *    notice, this list of conditions and the following disclaimer.
     19  * 2. Redistributions in binary form must reproduce the above copyright
     20  *    notice, this list of conditions and the following disclaimer in the
     21  *    documentation and/or other materials provided with the distribution.
     22  *
     23  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     24  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     25  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     26  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     27  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     28  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     29  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     30  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     31  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     32  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     33  * POSSIBILITY OF SUCH DAMAGE.
     34  */
     35 
     36 /*
     37  * USB Open Host Controller driver.
     38  *
     39  * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html
     40  * USB spec: http://www.usb.org/developers/docs/
     41  */
     42 
     43 #include <sys/cdefs.h>
     44 __KERNEL_RCSID(0, "$NetBSD: ohci.c,v 1.254.2.53 2016/02/27 15:54:30 skrll Exp $");
     45 
     46 #include "opt_usb.h"
     47 
     48 #include <sys/param.h>
     49 
     50 #include <sys/cpu.h>
     51 #include <sys/device.h>
     52 #include <sys/kernel.h>
     53 #include <sys/kmem.h>
     54 #include <sys/proc.h>
     55 #include <sys/queue.h>
     56 #include <sys/select.h>
     57 #include <sys/sysctl.h>
     58 #include <sys/systm.h>
     59 
     60 #include <machine/endian.h>
     61 
     62 #include <dev/usb/usb.h>
     63 #include <dev/usb/usbdi.h>
     64 #include <dev/usb/usbdivar.h>
     65 #include <dev/usb/usb_mem.h>
     66 #include <dev/usb/usb_quirks.h>
     67 
     68 #include <dev/usb/ohcireg.h>
     69 #include <dev/usb/ohcivar.h>
     70 #include <dev/usb/usbroothub.h>
     71 #include <dev/usb/usbhist.h>
     72 
     73 #ifdef USB_DEBUG
     74 #ifndef OHCI_DEBUG
     75 #define ohcidebug 0
     76 #else
     77 static int ohcidebug = 0;
     78 
     79 SYSCTL_SETUP(sysctl_hw_ohci_setup, "sysctl hw.ohci setup")
     80 {
     81 	int err;
     82 	const struct sysctlnode *rnode;
     83 	const struct sysctlnode *cnode;
     84 
     85 	err = sysctl_createv(clog, 0, NULL, &rnode,
     86 	    CTLFLAG_PERMANENT, CTLTYPE_NODE, "ohci",
     87 	    SYSCTL_DESCR("ohci global controls"),
     88 	    NULL, 0, NULL, 0, CTL_HW, CTL_CREATE, CTL_EOL);
     89 
     90 	if (err)
     91 		goto fail;
     92 
     93 	/* control debugging printfs */
     94 	err = sysctl_createv(clog, 0, &rnode, &cnode,
     95 	    CTLFLAG_PERMANENT|CTLFLAG_READWRITE, CTLTYPE_INT,
     96 	    "debug", SYSCTL_DESCR("Enable debugging output"),
     97 	    NULL, 0, &ohcidebug, sizeof(ohcidebug), CTL_CREATE, CTL_EOL);
     98 	if (err)
     99 		goto fail;
    100 
    101 	return;
    102 fail:
    103 	aprint_error("%s: sysctl_createv failed (err = %d)\n", __func__, err);
    104 }
    105 
    106 #endif /* OHCI_DEBUG */
    107 #endif /* USB_DEBUG */
    108 
    109 #define	DPRINTF(FMT,A,B,C,D)	USBHIST_LOG(ohcidebug,FMT,A,B,C,D)
    110 #define	DPRINTFN(N,FMT,A,B,C,D)	USBHIST_LOGN(ohcidebug,N,FMT,A,B,C,D)
    111 #define	OHCIHIST_FUNC()		USBHIST_FUNC()
    112 #define	OHCIHIST_CALLED(name)	USBHIST_CALLED(ohcidebug)
    113 
    114 #if BYTE_ORDER == BIG_ENDIAN
    115 #define	SWAP_ENDIAN	OHCI_LITTLE_ENDIAN
    116 #else
    117 #define	SWAP_ENDIAN	OHCI_BIG_ENDIAN
    118 #endif
    119 
    120 #define	O16TOH(val)	(sc->sc_endian == SWAP_ENDIAN ? bswap16(val) : val)
    121 #define	O32TOH(val)	(sc->sc_endian == SWAP_ENDIAN ? bswap32(val) : val)
    122 #define	HTOO16(val)	O16TOH(val)
    123 #define	HTOO32(val)	O32TOH(val)
    124 
    125 struct ohci_pipe;
    126 
    127 Static ohci_soft_ed_t  *ohci_alloc_sed(ohci_softc_t *);
    128 Static void		ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *);
    129 
    130 Static ohci_soft_td_t  *ohci_alloc_std(ohci_softc_t *);
    131 Static void		ohci_free_std(ohci_softc_t *, ohci_soft_td_t *);
    132 Static void		ohci_free_std_locked(ohci_softc_t *, ohci_soft_td_t *);
    133 
    134 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *);
    135 Static void		ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *);
    136 Static void		ohci_free_sitd_locked(ohci_softc_t *,
    137 			    ohci_soft_itd_t *);
    138 
    139 Static usbd_status	ohci_alloc_std_chain(ohci_softc_t *, struct usbd_xfer *,
    140 			    int, int);
    141 Static void		ohci_free_stds(ohci_softc_t *, struct ohci_xfer *);
    142 
    143 Static void		ohci_reset_std_chain(ohci_softc_t *, struct usbd_xfer *,
    144 			    int, int, ohci_soft_td_t *, ohci_soft_td_t **);
    145 
    146 Static usbd_status	ohci_open(struct usbd_pipe *);
    147 Static void		ohci_poll(struct usbd_bus *);
    148 Static void		ohci_softintr(void *);
    149 Static void		ohci_waitintr(ohci_softc_t *, struct usbd_xfer *);
    150 Static void		ohci_rhsc(ohci_softc_t *, struct usbd_xfer *);
    151 Static void		ohci_rhsc_softint(void *);
    152 
    153 Static void		ohci_add_ed(ohci_softc_t *, ohci_soft_ed_t *,
    154 			    ohci_soft_ed_t *);
    155 
    156 Static void		ohci_rem_ed(ohci_softc_t *, ohci_soft_ed_t *,
    157 				    ohci_soft_ed_t *);
    158 Static void		ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *);
    159 Static void		ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *);
    160 Static ohci_soft_td_t  *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t);
    161 Static void		ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *);
    162 Static void		ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *);
    163 Static ohci_soft_itd_t  *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t);
    164 
    165 Static usbd_status	ohci_setup_isoc(struct usbd_pipe *);
    166 Static void		ohci_device_isoc_enter(struct usbd_xfer *);
    167 
    168 Static struct usbd_xfer *
    169 			ohci_allocx(struct usbd_bus *, unsigned int);
    170 Static void		ohci_freex(struct usbd_bus *, struct usbd_xfer *);
    171 Static void		ohci_get_lock(struct usbd_bus *, kmutex_t **);
    172 Static int		ohci_roothub_ctrl(struct usbd_bus *,
    173 			    usb_device_request_t *, void *, int);
    174 
    175 Static usbd_status	ohci_root_intr_transfer(struct usbd_xfer *);
    176 Static usbd_status	ohci_root_intr_start(struct usbd_xfer *);
    177 Static void		ohci_root_intr_abort(struct usbd_xfer *);
    178 Static void		ohci_root_intr_close(struct usbd_pipe *);
    179 Static void		ohci_root_intr_done(struct usbd_xfer *);
    180 
    181 Static int		ohci_device_ctrl_init(struct usbd_xfer *);
    182 Static void		ohci_device_ctrl_fini(struct usbd_xfer *);
    183 Static usbd_status	ohci_device_ctrl_transfer(struct usbd_xfer *);
    184 Static usbd_status	ohci_device_ctrl_start(struct usbd_xfer *);
    185 Static void		ohci_device_ctrl_abort(struct usbd_xfer *);
    186 Static void		ohci_device_ctrl_close(struct usbd_pipe *);
    187 Static void		ohci_device_ctrl_done(struct usbd_xfer *);
    188 
    189 Static int		ohci_device_bulk_init(struct usbd_xfer *);
    190 Static void		ohci_device_bulk_fini(struct usbd_xfer *);
    191 Static usbd_status	ohci_device_bulk_transfer(struct usbd_xfer *);
    192 Static usbd_status	ohci_device_bulk_start(struct usbd_xfer *);
    193 Static void		ohci_device_bulk_abort(struct usbd_xfer *);
    194 Static void		ohci_device_bulk_close(struct usbd_pipe *);
    195 Static void		ohci_device_bulk_done(struct usbd_xfer *);
    196 
    197 Static int		ohci_device_intr_init(struct usbd_xfer *);
    198 Static void		ohci_device_intr_fini(struct usbd_xfer *);
    199 Static usbd_status	ohci_device_intr_transfer(struct usbd_xfer *);
    200 Static usbd_status	ohci_device_intr_start(struct usbd_xfer *);
    201 Static void		ohci_device_intr_abort(struct usbd_xfer *);
    202 Static void		ohci_device_intr_close(struct usbd_pipe *);
    203 Static void		ohci_device_intr_done(struct usbd_xfer *);
    204 
    205 Static int		ohci_device_isoc_init(struct usbd_xfer *);
    206 Static void		ohci_device_isoc_fini(struct usbd_xfer *);
    207 Static usbd_status	ohci_device_isoc_transfer(struct usbd_xfer *);
    208 Static usbd_status	ohci_device_isoc_start(struct usbd_xfer *);
    209 Static void		ohci_device_isoc_abort(struct usbd_xfer *);
    210 Static void		ohci_device_isoc_close(struct usbd_pipe *);
    211 Static void		ohci_device_isoc_done(struct usbd_xfer *);
    212 
    213 Static usbd_status	ohci_device_setintr(ohci_softc_t *,
    214 			    struct ohci_pipe *, int);
    215 
    216 Static void		ohci_timeout(void *);
    217 Static void		ohci_timeout_task(void *);
    218 Static void		ohci_rhsc_enable(void *);
    219 
    220 Static void		ohci_close_pipe(struct usbd_pipe *, ohci_soft_ed_t *);
    221 Static void		ohci_abort_xfer(struct usbd_xfer *, usbd_status);
    222 
    223 Static void		ohci_device_clear_toggle(struct usbd_pipe *);
    224 Static void		ohci_noop(struct usbd_pipe *);
    225 
    226 #ifdef OHCI_DEBUG
    227 Static void		ohci_dumpregs(ohci_softc_t *);
    228 Static void		ohci_dump_tds(ohci_softc_t *, ohci_soft_td_t *);
    229 Static void		ohci_dump_td(ohci_softc_t *, ohci_soft_td_t *);
    230 Static void		ohci_dump_ed(ohci_softc_t *, ohci_soft_ed_t *);
    231 Static void		ohci_dump_itd(ohci_softc_t *, ohci_soft_itd_t *);
    232 Static void		ohci_dump_itds(ohci_softc_t *, ohci_soft_itd_t *);
    233 #endif
    234 
    235 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \
    236 			BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
    237 #define OWRITE1(sc, r, x) \
    238  do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
    239 #define OWRITE2(sc, r, x) \
    240  do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
    241 #define OWRITE4(sc, r, x) \
    242  do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
    243 
    244 static __inline uint32_t
    245 OREAD4(ohci_softc_t *sc, bus_size_t r)
    246 {
    247 
    248 	OBARR(sc);
    249 	return bus_space_read_4(sc->iot, sc->ioh, r);
    250 }
    251 
    252 /* Reverse the bits in a value 0 .. 31 */
    253 Static uint8_t revbits[OHCI_NO_INTRS] =
    254   { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c,
    255     0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e,
    256     0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d,
    257     0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f };
    258 
    259 struct ohci_pipe {
    260 	struct usbd_pipe pipe;
    261 	ohci_soft_ed_t *sed;
    262 	union {
    263 		ohci_soft_td_t *td;
    264 		ohci_soft_itd_t *itd;
    265 	} tail;
    266 	/* Info needed for different pipe kinds. */
    267 	union {
    268 		/* Control pipe */
    269 		struct {
    270 			usb_dma_t reqdma;
    271 		} ctrl;
    272 		/* Interrupt pipe */
    273 		struct {
    274 			int nslots;
    275 			int pos;
    276 		} intr;
    277 		/* Isochronous pipe */
    278 		struct isoc {
    279 			int next, inuse;
    280 		} isoc;
    281 	};
    282 };
    283 
    284 Static const struct usbd_bus_methods ohci_bus_methods = {
    285 	.ubm_open =	ohci_open,
    286 	.ubm_softint =	ohci_softintr,
    287 	.ubm_dopoll =	ohci_poll,
    288 	.ubm_allocx =	ohci_allocx,
    289 	.ubm_freex =	ohci_freex,
    290 	.ubm_getlock =	ohci_get_lock,
    291 	.ubm_rhctrl =	ohci_roothub_ctrl,
    292 };
    293 
    294 Static const struct usbd_pipe_methods ohci_root_intr_methods = {
    295 	.upm_transfer =	ohci_root_intr_transfer,
    296 	.upm_start =	ohci_root_intr_start,
    297 	.upm_abort =	ohci_root_intr_abort,
    298 	.upm_close =	ohci_root_intr_close,
    299 	.upm_cleartoggle =	ohci_noop,
    300 	.upm_done =	ohci_root_intr_done,
    301 };
    302 
    303 Static const struct usbd_pipe_methods ohci_device_ctrl_methods = {
    304 	.upm_init =	ohci_device_ctrl_init,
    305 	.upm_fini =	ohci_device_ctrl_fini,
    306 	.upm_transfer =	ohci_device_ctrl_transfer,
    307 	.upm_start =	ohci_device_ctrl_start,
    308 	.upm_abort =	ohci_device_ctrl_abort,
    309 	.upm_close =	ohci_device_ctrl_close,
    310 	.upm_cleartoggle =	ohci_noop,
    311 	.upm_done =	ohci_device_ctrl_done,
    312 };
    313 
    314 Static const struct usbd_pipe_methods ohci_device_intr_methods = {
    315 	.upm_init =	ohci_device_intr_init,
    316 	.upm_fini =	ohci_device_intr_fini,
    317 	.upm_transfer =	ohci_device_intr_transfer,
    318 	.upm_start =	ohci_device_intr_start,
    319 	.upm_abort =	ohci_device_intr_abort,
    320 	.upm_close =	ohci_device_intr_close,
    321 	.upm_cleartoggle =	ohci_device_clear_toggle,
    322 	.upm_done =	ohci_device_intr_done,
    323 };
    324 
    325 Static const struct usbd_pipe_methods ohci_device_bulk_methods = {
    326 	.upm_init =	ohci_device_bulk_init,
    327 	.upm_fini =	ohci_device_bulk_fini,
    328 	.upm_transfer =	ohci_device_bulk_transfer,
    329 	.upm_start =	ohci_device_bulk_start,
    330 	.upm_abort =	ohci_device_bulk_abort,
    331 	.upm_close =	ohci_device_bulk_close,
    332 	.upm_cleartoggle =	ohci_device_clear_toggle,
    333 	.upm_done =	ohci_device_bulk_done,
    334 };
    335 
    336 Static const struct usbd_pipe_methods ohci_device_isoc_methods = {
    337 	.upm_init =	ohci_device_isoc_init,
    338 	.upm_fini =	ohci_device_isoc_fini,
    339 	.upm_transfer =	ohci_device_isoc_transfer,
    340 	.upm_start =	ohci_device_isoc_start,
    341 	.upm_abort =	ohci_device_isoc_abort,
    342 	.upm_close =	ohci_device_isoc_close,
    343 	.upm_cleartoggle =	ohci_noop,
    344 	.upm_done =	ohci_device_isoc_done,
    345 };
    346 
    347 int
    348 ohci_activate(device_t self, enum devact act)
    349 {
    350 	struct ohci_softc *sc = device_private(self);
    351 
    352 	switch (act) {
    353 	case DVACT_DEACTIVATE:
    354 		sc->sc_dying = 1;
    355 		return 0;
    356 	default:
    357 		return EOPNOTSUPP;
    358 	}
    359 }
    360 
    361 void
    362 ohci_childdet(device_t self, device_t child)
    363 {
    364 	struct ohci_softc *sc = device_private(self);
    365 
    366 	KASSERT(sc->sc_child == child);
    367 	sc->sc_child = NULL;
    368 }
    369 
    370 int
    371 ohci_detach(struct ohci_softc *sc, int flags)
    372 {
    373 	int rv = 0;
    374 
    375 	if (sc->sc_child != NULL)
    376 		rv = config_detach(sc->sc_child, flags);
    377 
    378 	if (rv != 0)
    379 		return rv;
    380 
    381 	callout_halt(&sc->sc_tmo_rhsc, &sc->sc_lock);
    382 
    383 	usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */
    384 	callout_destroy(&sc->sc_tmo_rhsc);
    385 
    386 	softint_disestablish(sc->sc_rhsc_si);
    387 
    388 	cv_destroy(&sc->sc_softwake_cv);
    389 
    390 	mutex_destroy(&sc->sc_lock);
    391 	mutex_destroy(&sc->sc_intr_lock);
    392 
    393 	if (sc->sc_hcca != NULL)
    394 		usb_freemem(&sc->sc_bus, &sc->sc_hccadma);
    395 	pool_cache_destroy(sc->sc_xferpool);
    396 
    397 	return rv;
    398 }
    399 
    400 ohci_soft_ed_t *
    401 ohci_alloc_sed(ohci_softc_t *sc)
    402 {
    403 	ohci_soft_ed_t *sed;
    404 	usbd_status err;
    405 	int i, offs;
    406 	usb_dma_t dma;
    407 
    408 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
    409 
    410 	mutex_enter(&sc->sc_lock);
    411 	if (sc->sc_freeeds == NULL) {
    412 		DPRINTFN(2, "allocating chunk", 0, 0, 0, 0);
    413 		mutex_exit(&sc->sc_lock);
    414 
    415 		err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK,
    416 			  OHCI_ED_ALIGN, &dma);
    417 		if (err)
    418 			return 0;
    419 
    420 		mutex_enter(&sc->sc_lock);
    421 		for (i = 0; i < OHCI_SED_CHUNK; i++) {
    422 			offs = i * OHCI_SED_SIZE;
    423 			sed = KERNADDR(&dma, offs);
    424 			sed->physaddr = DMAADDR(&dma, offs);
    425 			sed->dma = dma;
    426 			sed->offs = offs;
    427 			sed->next = sc->sc_freeeds;
    428 			sc->sc_freeeds = sed;
    429 		}
    430 	}
    431 	sed = sc->sc_freeeds;
    432 	sc->sc_freeeds = sed->next;
    433 	mutex_exit(&sc->sc_lock);
    434 
    435 	memset(&sed->ed, 0, sizeof(ohci_ed_t));
    436 	sed->next = 0;
    437 	return sed;
    438 }
    439 
    440 static inline void
    441 ohci_free_sed_locked(ohci_softc_t *sc, ohci_soft_ed_t *sed)
    442 {
    443 
    444 	KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
    445 
    446 	sed->next = sc->sc_freeeds;
    447 	sc->sc_freeeds = sed;
    448 }
    449 
    450 void
    451 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed)
    452 {
    453 
    454 	mutex_enter(&sc->sc_lock);
    455 	ohci_free_sed_locked(sc, sed);
    456 	mutex_exit(&sc->sc_lock);
    457 }
    458 
    459 ohci_soft_td_t *
    460 ohci_alloc_std(ohci_softc_t *sc)
    461 {
    462 	ohci_soft_td_t *std;
    463 	usbd_status err;
    464 	int i, offs;
    465 	usb_dma_t dma;
    466 
    467 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
    468 
    469 	mutex_enter(&sc->sc_lock);
    470 	if (sc->sc_freetds == NULL) {
    471 		DPRINTFN(2, "allocating chunk", 0, 0, 0, 0);
    472 		mutex_exit(&sc->sc_lock);
    473 
    474 		err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK,
    475 			  OHCI_TD_ALIGN, &dma);
    476 		if (err)
    477 			return NULL;
    478 
    479 		mutex_enter(&sc->sc_lock);
    480 		for(i = 0; i < OHCI_STD_CHUNK; i++) {
    481 			offs = i * OHCI_STD_SIZE;
    482 			std = KERNADDR(&dma, offs);
    483 			std->physaddr = DMAADDR(&dma, offs);
    484 			std->dma = dma;
    485 			std->offs = offs;
    486 			std->nexttd = sc->sc_freetds;
    487 			sc->sc_freetds = std;
    488 		}
    489 	}
    490 
    491 	std = sc->sc_freetds;
    492 	sc->sc_freetds = std->nexttd;
    493 	mutex_exit(&sc->sc_lock);
    494 
    495 	memset(&std->td, 0, sizeof(ohci_td_t));
    496 	std->nexttd = NULL;
    497 	std->xfer = NULL;
    498 
    499 	return std;
    500 }
    501 
    502 void
    503 ohci_free_std_locked(ohci_softc_t *sc, ohci_soft_td_t *std)
    504 {
    505 
    506 	KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
    507 
    508 	std->nexttd = sc->sc_freetds;
    509 	sc->sc_freetds = std;
    510 }
    511 
    512 void
    513 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std)
    514 {
    515 
    516 	mutex_enter(&sc->sc_lock);
    517 	ohci_free_std_locked(sc, std);
    518 	mutex_exit(&sc->sc_lock);
    519 }
    520 
    521 Static usbd_status
    522 ohci_alloc_std_chain(ohci_softc_t *sc, struct usbd_xfer *xfer, int alen, int rd)
    523 {
    524 	struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer);
    525 	struct usbd_pipe *pipe = xfer->ux_pipe;
    526 	ohci_soft_td_t *next, *cur;
    527 	ohci_physaddr_t dataphys, dataphysend;
    528 	uint32_t tdflags;
    529 	int len = alen;
    530 	int curlen;
    531 	usb_dma_t *dma = &xfer->ux_dmabuf;
    532 	uint16_t flags = xfer->ux_flags;
    533 
    534 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
    535 
    536 	DPRINTFN(8, "addr=%d endpt=%d len=%d speed=%d",
    537 	    pipe->up_dev->ud_addr,
    538 	    UE_GET_ADDR(pipe->up_endpoint->ue_edesc->bEndpointAddress),
    539 	    alen, pipe->up_dev->ud_speed);
    540 
    541 	ASSERT_SLEEPABLE();
    542 
    543 	size_t nstd = (flags & USBD_FORCE_SHORT_XFER) ? 1 : 0;
    544 	nstd += ((len + OHCI_PAGE_SIZE - 1) / OHCI_PAGE_SIZE);
    545 	ox->ox_stds = kmem_zalloc(sizeof(ohci_soft_td_t *) * nstd,
    546 	    KM_SLEEP);
    547 	ox->ox_nstd = nstd;
    548 	int mps = UGETW(pipe->up_endpoint->ue_edesc->wMaxPacketSize);
    549 
    550 	DPRINTFN(8, "xfer %p nstd %d mps %d", xfer, nstd, mps, 0);
    551 
    552 	len = alen;
    553 	cur = ohci_alloc_std(sc);
    554 	if (cur == NULL)
    555 		goto nomem;
    556 
    557 	dataphys = DMAADDR(dma, 0);
    558 	dataphysend = OHCI_PAGE(dataphys + len - 1);
    559 	tdflags = HTOO32(
    560 	    (rd ? OHCI_TD_IN : OHCI_TD_OUT) |
    561 	    OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR);
    562 
    563 	for (size_t j = 0;;) {
    564 		ox->ox_stds[j++] = cur;
    565 		next = ohci_alloc_std(sc);
    566 		if (next == NULL)
    567 			goto nomem;
    568 
    569 		/* The OHCI hardware can handle at most one page crossing. */
    570 		if (OHCI_PAGE(dataphys) == dataphysend ||
    571 		    OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) {
    572 			/* we can handle it in this TD */
    573 			curlen = len;
    574 		} else {
    575 			/* must use multiple TDs, fill as much as possible. */
    576 			curlen = 2 * OHCI_PAGE_SIZE -
    577 				 (dataphys & (OHCI_PAGE_SIZE-1));
    578 			/* the length must be a multiple of the max size */
    579 			curlen -= curlen % mps;
    580 			KASSERT(curlen != 0);
    581 		}
    582 		DPRINTFN(4, "dataphys=0x%08x dataphysend=0x%08x "
    583 		    "len=%d curlen=%d",  dataphys, dataphysend, len, curlen);
    584 		len -= curlen;
    585 
    586 		cur->td.td_flags = tdflags;
    587 		cur->td.td_cbp = HTOO32(dataphys);
    588 		cur->td.td_nexttd = HTOO32(next->physaddr);
    589 		cur->td.td_be = HTOO32(dataphys + curlen - 1);
    590 		cur->nexttd = next;
    591 		cur->len = curlen;
    592 		cur->flags = OHCI_ADD_LEN;
    593 		cur->xfer = xfer;
    594 
    595 		DPRINTFN(10, "cbp=0x%08x be=0x%08x", dataphys,
    596 		    dataphys + curlen - 1, 0, 0);
    597 		if (len == 0)
    598 			break;
    599 		DPRINTFN(10, "extend chain", 0, 0, 0, 0);
    600 		dataphys += curlen;
    601 		cur = next;
    602 	}
    603 	if (!rd && (flags & USBD_FORCE_SHORT_XFER) &&
    604 	    alen % mps == 0) {
    605 		/* Force a 0 length transfer at the end. */
    606 
    607 		cur = next;
    608 		next = ohci_alloc_std(sc);
    609 		if (next == NULL)
    610 			goto nomem;
    611 
    612 		cur->td.td_flags = tdflags;
    613 		cur->td.td_cbp = 0; /* indicate 0 length packet */
    614 		cur->td.td_nexttd = HTOO32(next->physaddr);
    615 		cur->td.td_be = ~0;
    616 		cur->nexttd = next;
    617 		cur->len = 0;
    618 		cur->flags = 0;
    619 		cur->xfer = xfer;
    620 
    621 		DPRINTFN(2, "add 0 xfer", 0, 0, 0, 0);
    622 	}
    623 
    624 	return USBD_NORMAL_COMPLETION;
    625 
    626  nomem:
    627 	ohci_free_stds(sc, ox);
    628 
    629 	return USBD_NOMEM;
    630 }
    631 
    632 Static void
    633 ohci_free_stds(ohci_softc_t *sc, struct ohci_xfer *ox)
    634 {
    635 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
    636 	DPRINTF("ox=%p", ox, 0, 0, 0);
    637 
    638 	mutex_enter(&sc->sc_lock);
    639 	for (size_t i = 0; i < ox->ox_nstd; i++) {
    640 		ohci_soft_td_t *std = ox->ox_stds[i];
    641 		if (std == NULL)
    642 			break;
    643 		ohci_free_std_locked(sc, std);
    644 	}
    645 	mutex_exit(&sc->sc_lock);
    646 }
    647 
    648 void
    649 ohci_reset_std_chain(ohci_softc_t *sc, struct usbd_xfer *xfer,
    650     int alen, int rd, ohci_soft_td_t *sp, ohci_soft_td_t **ep)
    651 {
    652 	struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer);
    653 	ohci_soft_td_t *next, *cur;
    654 	ohci_physaddr_t dataphys, dataphysend;
    655 	uint32_t tdflags;
    656 	int len, curlen;
    657 	usb_dma_t *dma = &xfer->ux_dmabuf;
    658 	uint16_t flags = xfer->ux_flags;
    659 
    660 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
    661 	DPRINTF("start len=%d", alen, 0, 0, 0);
    662 
    663 	KASSERT(mutex_owned(&sc->sc_lock));
    664 
    665 	DPRINTFN(8, "addr=%d endpt=%d len=%d speed=%d",
    666 	    xfer->ux_pipe->up_dev->ud_addr,
    667 	    UE_GET_ADDR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress),
    668 	    alen, xfer->ux_pipe->up_dev->ud_speed);
    669 
    670 	KASSERT(sp);
    671 
    672 	int mps = UGETW(xfer->ux_pipe->up_endpoint->ue_edesc->wMaxPacketSize);
    673 
    674 	len = alen;
    675 	cur = sp;
    676 
    677 	dataphys = DMAADDR(dma, 0);
    678 	dataphysend = OHCI_PAGE(dataphys + len - 1);
    679 	usb_syncmem(dma, 0, len,
    680 	    rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
    681 	tdflags = HTOO32(
    682 	    (rd ? OHCI_TD_IN : OHCI_TD_OUT) |
    683 	    OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR);
    684 
    685 	for (size_t j = 1;;) {
    686 		if (j == ox->ox_nstd)
    687 			next = NULL;
    688 		else
    689 			next = ox->ox_stds[j++];
    690 		KASSERT(next != cur);
    691 
    692 		/* The OHCI hardware can handle at most one page crossing. */
    693 		if (OHCI_PAGE(dataphys) == dataphysend ||
    694 		    OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) {
    695 			/* we can handle it in this TD */
    696 			curlen = len;
    697 		} else {
    698 			/* must use multiple TDs, fill as much as possible. */
    699 			curlen = 2 * OHCI_PAGE_SIZE -
    700 				 (dataphys & (OHCI_PAGE_SIZE - 1));
    701 			/* the length must be a multiple of the max size */
    702 			curlen -= curlen % mps;
    703 			KASSERT(curlen != 0);
    704 		}
    705 		DPRINTFN(4, "dataphys=0x%08x dataphysend=0x%08x "
    706 		    "len=%d curlen=%d",  dataphys, dataphysend, len, curlen);
    707 		len -= curlen;
    708 
    709 		cur->td.td_flags = tdflags;
    710 		cur->td.td_cbp = HTOO32(dataphys);
    711 		cur->td.td_be = HTOO32(dataphys + curlen - 1);
    712 		cur->td.td_nexttd = (next != NULL) ? HTOO32(next->physaddr) : 0;
    713 		cur->nexttd = next;
    714 		cur->len = curlen;
    715 		cur->flags = OHCI_ADD_LEN;
    716 		cur->xfer = xfer;
    717 	 	ohci_hash_add_td(sc, cur);
    718 
    719 		usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td),
    720 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    721 		DPRINTFN(10, "cbp=0x%08x be=0x%08x", dataphys,
    722 		    dataphys + curlen - 1, 0, 0);
    723 		if (len == 0)
    724 			break;
    725 		KASSERT(next != NULL);
    726 		DPRINTFN(10, "extend chain", 0, 0, 0, 0);
    727 		dataphys += curlen;
    728 		cur = next;
    729 	}
    730 	cur->td.td_flags |=
    731 	    (xfer->ux_flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0);
    732 
    733 	if (!rd &&
    734 	    (flags & USBD_FORCE_SHORT_XFER) &&
    735 	    alen % mps == 0) {
    736 		/* Force a 0 length transfer at the end. */
    737 
    738 		KASSERT(next != NULL);
    739 		cur = next;
    740 
    741 		cur->td.td_flags = tdflags;
    742 		cur->td.td_cbp = 0; /* indicate 0 length packet */
    743 		cur->td.td_nexttd = HTOO32(next->physaddr);
    744 		cur->td.td_be = ~0;
    745 		cur->nexttd = NULL;
    746 		cur->len = 0;
    747 		cur->flags = 0;
    748 		cur->xfer = xfer;
    749 	 	ohci_hash_add_td(sc, cur);
    750 
    751 		usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td),
    752 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    753 		DPRINTFN(2, "add 0 xfer", 0, 0, 0, 0);
    754 	}
    755 	*ep = cur;
    756 }
    757 
    758 ohci_soft_itd_t *
    759 ohci_alloc_sitd(ohci_softc_t *sc)
    760 {
    761 	ohci_soft_itd_t *sitd;
    762 	usbd_status err;
    763 	int i, offs;
    764 	usb_dma_t dma;
    765 
    766 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
    767 
    768 	mutex_enter(&sc->sc_lock);
    769 	if (sc->sc_freeitds == NULL) {
    770 		DPRINTFN(2, "allocating chunk", 0, 0, 0, 0);
    771 		mutex_exit(&sc->sc_lock);
    772 
    773 		err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK,
    774 			  OHCI_ITD_ALIGN, &dma);
    775 		if (err)
    776 			return NULL;
    777 		mutex_enter(&sc->sc_lock);
    778 		for(i = 0; i < OHCI_SITD_CHUNK; i++) {
    779 			offs = i * OHCI_SITD_SIZE;
    780 			sitd = KERNADDR(&dma, offs);
    781 			sitd->physaddr = DMAADDR(&dma, offs);
    782 			sitd->dma = dma;
    783 			sitd->offs = offs;
    784 			sitd->nextitd = sc->sc_freeitds;
    785 			sc->sc_freeitds = sitd;
    786 		}
    787 	}
    788 
    789 	sitd = sc->sc_freeitds;
    790 	sc->sc_freeitds = sitd->nextitd;
    791 	mutex_exit(&sc->sc_lock);
    792 
    793 	memset(&sitd->itd, 0, sizeof(ohci_itd_t));
    794 	sitd->nextitd = NULL;
    795 	sitd->xfer = NULL;
    796 
    797 #ifdef DIAGNOSTIC
    798 	sitd->isdone = true;
    799 #endif
    800 
    801 	return sitd;
    802 }
    803 
    804 Static void
    805 ohci_free_sitd_locked(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
    806 {
    807 
    808 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
    809 	DPRINTFN(10, "sitd=%p", sitd, 0, 0, 0);
    810 
    811 	KASSERT(sitd->isdone);
    812 #ifdef DIAGNOSTIC
    813 	/* Warn double free */
    814 	sitd->isdone = false;
    815 #endif
    816 
    817 	sitd->nextitd = sc->sc_freeitds;
    818 	sc->sc_freeitds = sitd;
    819 }
    820 
    821 void
    822 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
    823 {
    824 
    825 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
    826 
    827 	mutex_enter(&sc->sc_lock);
    828 	ohci_free_sitd_locked(sc, sitd);
    829 	mutex_exit(&sc->sc_lock);
    830 }
    831 
    832 int
    833 ohci_init(ohci_softc_t *sc)
    834 {
    835 	ohci_soft_ed_t *sed, *psed;
    836 	usbd_status err;
    837 	int i;
    838 	uint32_t s, ctl, rwc, ival, hcr, fm, per, rev, desca /*, descb */;
    839 
    840 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
    841 
    842 	aprint_normal_dev(sc->sc_dev, "");
    843 
    844 	sc->sc_hcca = NULL;
    845 	callout_init(&sc->sc_tmo_rhsc, CALLOUT_MPSAFE);
    846 
    847 	mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_SOFTUSB);
    848 	mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_USB);
    849 	cv_init(&sc->sc_softwake_cv, "ohciab");
    850 
    851 	sc->sc_rhsc_si = softint_establish(SOFTINT_NET | SOFTINT_MPSAFE,
    852 	    ohci_rhsc_softint, sc);
    853 
    854 	for (i = 0; i < OHCI_HASH_SIZE; i++)
    855 		LIST_INIT(&sc->sc_hash_tds[i]);
    856 	for (i = 0; i < OHCI_HASH_SIZE; i++)
    857 		LIST_INIT(&sc->sc_hash_itds[i]);
    858 
    859 	sc->sc_xferpool = pool_cache_init(sizeof(struct ohci_xfer), 0, 0, 0,
    860 	    "ohcixfer", NULL, IPL_USB, NULL, NULL, NULL);
    861 
    862 	rev = OREAD4(sc, OHCI_REVISION);
    863 	aprint_normal("OHCI version %d.%d%s\n",
    864 	    OHCI_REV_HI(rev), OHCI_REV_LO(rev),
    865 	    OHCI_REV_LEGACY(rev) ? ", legacy support" : "");
    866 
    867 	if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) {
    868 		aprint_error_dev(sc->sc_dev, "unsupported OHCI revision\n");
    869 		sc->sc_bus.ub_revision = USBREV_UNKNOWN;
    870 		return -1;
    871 	}
    872 	sc->sc_bus.ub_revision = USBREV_1_0;
    873 	sc->sc_bus.ub_usedma = true;
    874 
    875 	/* XXX determine alignment by R/W */
    876 	/* Allocate the HCCA area. */
    877 	err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE,
    878 			 OHCI_HCCA_ALIGN, &sc->sc_hccadma);
    879 	if (err) {
    880 		sc->sc_hcca = NULL;
    881 		return err;
    882 	}
    883 	sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0);
    884 	memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE);
    885 
    886 	sc->sc_eintrs = OHCI_NORMAL_INTRS;
    887 
    888 	/* Allocate dummy ED that starts the control list. */
    889 	sc->sc_ctrl_head = ohci_alloc_sed(sc);
    890 	if (sc->sc_ctrl_head == NULL) {
    891 		err = ENOMEM;
    892 		goto bad1;
    893 	}
    894 	sc->sc_ctrl_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
    895 
    896 	/* Allocate dummy ED that starts the bulk list. */
    897 	sc->sc_bulk_head = ohci_alloc_sed(sc);
    898 	if (sc->sc_bulk_head == NULL) {
    899 		err = ENOMEM;
    900 		goto bad2;
    901 	}
    902 	sc->sc_bulk_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
    903 	usb_syncmem(&sc->sc_bulk_head->dma, sc->sc_bulk_head->offs,
    904 	    sizeof(sc->sc_bulk_head->ed),
    905 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    906 
    907 	/* Allocate dummy ED that starts the isochronous list. */
    908 	sc->sc_isoc_head = ohci_alloc_sed(sc);
    909 	if (sc->sc_isoc_head == NULL) {
    910 		err = ENOMEM;
    911 		goto bad3;
    912 	}
    913 	sc->sc_isoc_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
    914 	usb_syncmem(&sc->sc_isoc_head->dma, sc->sc_isoc_head->offs,
    915 	    sizeof(sc->sc_isoc_head->ed),
    916 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    917 
    918 	/* Allocate all the dummy EDs that make up the interrupt tree. */
    919 	for (i = 0; i < OHCI_NO_EDS; i++) {
    920 		sed = ohci_alloc_sed(sc);
    921 		if (sed == NULL) {
    922 			while (--i >= 0)
    923 				ohci_free_sed(sc, sc->sc_eds[i]);
    924 			err = ENOMEM;
    925 			goto bad4;
    926 		}
    927 		/* All ED fields are set to 0. */
    928 		sc->sc_eds[i] = sed;
    929 		sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
    930 		if (i != 0)
    931 			psed = sc->sc_eds[(i-1) / 2];
    932 		else
    933 			psed= sc->sc_isoc_head;
    934 		sed->next = psed;
    935 		sed->ed.ed_nexted = HTOO32(psed->physaddr);
    936 		usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
    937 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    938 	}
    939 	/*
    940 	 * Fill HCCA interrupt table.  The bit reversal is to get
    941 	 * the tree set up properly to spread the interrupts.
    942 	 */
    943 	for (i = 0; i < OHCI_NO_INTRS; i++)
    944 		sc->sc_hcca->hcca_interrupt_table[revbits[i]] =
    945 		    HTOO32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr);
    946 	usb_syncmem(&sc->sc_hccadma, 0, OHCI_HCCA_SIZE,
    947 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    948 
    949 #ifdef OHCI_DEBUG
    950 	DPRINTFN(15, "--- dump start ---", 0, 0, 0 ,0);
    951 	if (ohcidebug >= 15) {
    952 		for (i = 0; i < OHCI_NO_EDS; i++) {
    953 			DPRINTFN(15, "ed#%d ", i, 0, 0, 0);
    954 			ohci_dump_ed(sc, sc->sc_eds[i]);
    955 		}
    956 		DPRINTFN(15, "iso", 0, 0, 0 ,0);
    957 		ohci_dump_ed(sc, sc->sc_isoc_head);
    958 	}
    959 	DPRINTFN(15, "--- dump end ---", 0, 0, 0 ,0);
    960 #endif
    961 
    962 	/* Preserve values programmed by SMM/BIOS but lost over reset. */
    963 	ctl = OREAD4(sc, OHCI_CONTROL);
    964 	rwc = ctl & OHCI_RWC;
    965 	fm = OREAD4(sc, OHCI_FM_INTERVAL);
    966 	desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
    967 	/* descb = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); */
    968 
    969 	/* Determine in what context we are running. */
    970 	if (ctl & OHCI_IR) {
    971 		/* SMM active, request change */
    972 		DPRINTF("SMM active, request owner change", 0, 0, 0, 0);
    973 		if ((sc->sc_intre & (OHCI_OC | OHCI_MIE)) ==
    974 		    (OHCI_OC | OHCI_MIE))
    975 			OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_MIE);
    976 		s = OREAD4(sc, OHCI_COMMAND_STATUS);
    977 		OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR);
    978 		for (i = 0; i < 100 && (ctl & OHCI_IR); i++) {
    979 			usb_delay_ms(&sc->sc_bus, 1);
    980 			ctl = OREAD4(sc, OHCI_CONTROL);
    981 		}
    982 		OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_MIE);
    983 		if ((ctl & OHCI_IR) == 0) {
    984 			aprint_error_dev(sc->sc_dev,
    985 			    "SMM does not respond, resetting\n");
    986 			OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc);
    987 			goto reset;
    988 		}
    989 #if 0
    990 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */
    991 	} else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) {
    992 		/* BIOS started controller. */
    993 		DPRINTF("BIOS active", 0, 0, 0, 0);
    994 		if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) {
    995 			OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL | rwc);
    996 			usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
    997 		}
    998 #endif
    999 	} else {
   1000 		DPRINTF("cold started", 0 ,0 ,0 ,0);
   1001 	reset:
   1002 		/* Controller was cold started. */
   1003 		usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
   1004 	}
   1005 
   1006 	/*
   1007 	 * This reset should not be necessary according to the OHCI spec, but
   1008 	 * without it some controllers do not start.
   1009 	 */
   1010 	DPRINTF("sc %p: resetting", sc, 0, 0, 0);
   1011 	OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc);
   1012 	usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
   1013 
   1014 	/* We now own the host controller and the bus has been reset. */
   1015 
   1016 	OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */
   1017 	/* Nominal time for a reset is 10 us. */
   1018 	for (i = 0; i < 10; i++) {
   1019 		delay(10);
   1020 		hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR;
   1021 		if (!hcr)
   1022 			break;
   1023 	}
   1024 	if (hcr) {
   1025 		aprint_error_dev(sc->sc_dev, "reset timeout\n");
   1026 		err = EIO;
   1027 		goto bad5;
   1028 	}
   1029 #ifdef OHCI_DEBUG
   1030 	if (ohcidebug >= 15)
   1031 		ohci_dumpregs(sc);
   1032 #endif
   1033 
   1034 	/* The controller is now in SUSPEND state, we have 2ms to finish. */
   1035 
   1036 	/* Set up HC registers. */
   1037 	OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0));
   1038 	OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
   1039 	OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
   1040 	/* disable all interrupts and then switch on all desired interrupts */
   1041 	OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
   1042 	/* switch on desired functional features */
   1043 	ctl = OREAD4(sc, OHCI_CONTROL);
   1044 	ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR);
   1045 	ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE |
   1046 		OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL | rwc;
   1047 	/* And finally start it! */
   1048 	OWRITE4(sc, OHCI_CONTROL, ctl);
   1049 
   1050 	/*
   1051 	 * The controller is now OPERATIONAL.  Set a some final
   1052 	 * registers that should be set earlier, but that the
   1053 	 * controller ignores when in the SUSPEND state.
   1054 	 */
   1055 	ival = OHCI_GET_IVAL(fm);
   1056 	fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT;
   1057 	fm |= OHCI_FSMPS(ival) | ival;
   1058 	OWRITE4(sc, OHCI_FM_INTERVAL, fm);
   1059 	per = OHCI_PERIODIC(ival); /* 90% periodic */
   1060 	OWRITE4(sc, OHCI_PERIODIC_START, per);
   1061 
   1062 	if (sc->sc_flags & OHCIF_SUPERIO) {
   1063 		/* no overcurrent protection */
   1064 		desca |= OHCI_NOCP;
   1065 		/*
   1066 		 * Clear NoPowerSwitching and PowerOnToPowerGoodTime meaning
   1067 		 * that
   1068 		 *  - ports are always power switched
   1069 		 *  - don't wait for powered root hub port
   1070 		 */
   1071 		desca &= ~(__SHIFTIN(0xff, OHCI_POTPGT_MASK) | OHCI_NPS);
   1072 	}
   1073 
   1074 	/* Fiddle the No OverCurrent Protection bit to avoid chip bug. */
   1075 	OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP);
   1076 	OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */
   1077 	usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY);
   1078 	OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca);
   1079 
   1080 	/*
   1081 	 * The AMD756 requires a delay before re-reading the register,
   1082 	 * otherwise it will occasionally report 0 ports.
   1083 	 */
   1084 	sc->sc_noport = 0;
   1085 	for (i = 0; i < 10 && sc->sc_noport == 0; i++) {
   1086 		usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY);
   1087 		sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A));
   1088 	}
   1089 
   1090 #ifdef OHCI_DEBUG
   1091 	if (ohcidebug >= 5)
   1092 		ohci_dumpregs(sc);
   1093 #endif
   1094 
   1095 	/* Set up the bus struct. */
   1096 	sc->sc_bus.ub_methods = &ohci_bus_methods;
   1097 	sc->sc_bus.ub_pipesize = sizeof(struct ohci_pipe);
   1098 
   1099 	sc->sc_control = sc->sc_intre = 0;
   1100 
   1101 	/* Finally, turn on interrupts. */
   1102 	DPRINTF("enabling %#x", sc->sc_eintrs | OHCI_MIE, 0, 0, 0);
   1103 	OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE);
   1104 
   1105 	return 0;
   1106 
   1107  bad5:
   1108 	for (i = 0; i < OHCI_NO_EDS; i++)
   1109 		ohci_free_sed(sc, sc->sc_eds[i]);
   1110  bad4:
   1111 	ohci_free_sed(sc, sc->sc_isoc_head);
   1112  bad3:
   1113 	ohci_free_sed(sc, sc->sc_bulk_head);
   1114  bad2:
   1115 	ohci_free_sed(sc, sc->sc_ctrl_head);
   1116  bad1:
   1117 	usb_freemem(&sc->sc_bus, &sc->sc_hccadma);
   1118 	sc->sc_hcca = NULL;
   1119 	return err;
   1120 }
   1121 
   1122 struct usbd_xfer *
   1123 ohci_allocx(struct usbd_bus *bus, unsigned int nframes)
   1124 {
   1125 	ohci_softc_t *sc = OHCI_BUS2SC(bus);
   1126 	struct usbd_xfer *xfer;
   1127 
   1128 	xfer = pool_cache_get(sc->sc_xferpool, PR_NOWAIT);
   1129 	if (xfer != NULL) {
   1130 		memset(xfer, 0, sizeof(struct ohci_xfer));
   1131 #ifdef DIAGNOSTIC
   1132 		xfer->ux_state = XFER_BUSY;
   1133 #endif
   1134 	}
   1135 	return xfer;
   1136 }
   1137 
   1138 void
   1139 ohci_freex(struct usbd_bus *bus, struct usbd_xfer *xfer)
   1140 {
   1141 	ohci_softc_t *sc = OHCI_BUS2SC(bus);
   1142 
   1143 	KASSERTMSG(xfer->ux_state == XFER_BUSY,
   1144 	    "xfer=%p not busy, 0x%08x\n", xfer, xfer->ux_state);
   1145 #ifdef DIAGNOSTIC
   1146 	xfer->ux_state = XFER_FREE;
   1147 #endif
   1148 	pool_cache_put(sc->sc_xferpool, xfer);
   1149 }
   1150 
   1151 Static void
   1152 ohci_get_lock(struct usbd_bus *bus, kmutex_t **lock)
   1153 {
   1154 	ohci_softc_t *sc = OHCI_BUS2SC(bus);
   1155 
   1156 	*lock = &sc->sc_lock;
   1157 }
   1158 
   1159 /*
   1160  * Shut down the controller when the system is going down.
   1161  */
   1162 bool
   1163 ohci_shutdown(device_t self, int flags)
   1164 {
   1165 	ohci_softc_t *sc = device_private(self);
   1166 
   1167 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   1168 
   1169 	DPRINTF("stopping the HC", 0, 0, 0, 0);
   1170 	OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
   1171 	return true;
   1172 }
   1173 
   1174 bool
   1175 ohci_resume(device_t dv, const pmf_qual_t *qual)
   1176 {
   1177 	ohci_softc_t *sc = device_private(dv);
   1178 	uint32_t ctl;
   1179 
   1180 	mutex_spin_enter(&sc->sc_intr_lock);
   1181 	sc->sc_bus.ub_usepolling++;
   1182 	mutex_spin_exit(&sc->sc_intr_lock);
   1183 
   1184 	/* Some broken BIOSes do not recover these values */
   1185 	OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0));
   1186 	OWRITE4(sc, OHCI_CONTROL_HEAD_ED,
   1187 	    sc->sc_ctrl_head->physaddr);
   1188 	OWRITE4(sc, OHCI_BULK_HEAD_ED,
   1189 	    sc->sc_bulk_head->physaddr);
   1190 	if (sc->sc_intre)
   1191 		OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_intre &
   1192 		    (OHCI_ALL_INTRS | OHCI_MIE));
   1193 	if (sc->sc_control)
   1194 		ctl = sc->sc_control;
   1195 	else
   1196 		ctl = OREAD4(sc, OHCI_CONTROL);
   1197 	ctl |= OHCI_HCFS_RESUME;
   1198 	OWRITE4(sc, OHCI_CONTROL, ctl);
   1199 	usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
   1200 	ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL;
   1201 	OWRITE4(sc, OHCI_CONTROL, ctl);
   1202 	usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
   1203 	sc->sc_control = sc->sc_intre = 0;
   1204 
   1205 	mutex_spin_enter(&sc->sc_intr_lock);
   1206 	sc->sc_bus.ub_usepolling--;
   1207 	mutex_spin_exit(&sc->sc_intr_lock);
   1208 
   1209 	return true;
   1210 }
   1211 
   1212 bool
   1213 ohci_suspend(device_t dv, const pmf_qual_t *qual)
   1214 {
   1215 	ohci_softc_t *sc = device_private(dv);
   1216 	uint32_t ctl;
   1217 
   1218 	mutex_spin_enter(&sc->sc_intr_lock);
   1219 	sc->sc_bus.ub_usepolling++;
   1220 	mutex_spin_exit(&sc->sc_intr_lock);
   1221 
   1222 	ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK;
   1223 	if (sc->sc_control == 0) {
   1224 		/*
   1225 		 * Preserve register values, in case that BIOS
   1226 		 * does not recover them.
   1227 		 */
   1228 		sc->sc_control = ctl;
   1229 		sc->sc_intre = OREAD4(sc,
   1230 		    OHCI_INTERRUPT_ENABLE);
   1231 	}
   1232 	ctl |= OHCI_HCFS_SUSPEND;
   1233 	OWRITE4(sc, OHCI_CONTROL, ctl);
   1234 	usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
   1235 
   1236 	mutex_spin_enter(&sc->sc_intr_lock);
   1237 	sc->sc_bus.ub_usepolling--;
   1238 	mutex_spin_exit(&sc->sc_intr_lock);
   1239 
   1240 	return true;
   1241 }
   1242 
   1243 #ifdef OHCI_DEBUG
   1244 void
   1245 ohci_dumpregs(ohci_softc_t *sc)
   1246 {
   1247 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   1248 
   1249 	DPRINTF("rev=0x%08x control=0x%08x command=0x%08x",
   1250 		 OREAD4(sc, OHCI_REVISION),
   1251 		 OREAD4(sc, OHCI_CONTROL),
   1252 		 OREAD4(sc, OHCI_COMMAND_STATUS), 0);
   1253 	DPRINTF("               intrstat=0x%08x intre=0x%08x intrd=0x%08x",
   1254 		 OREAD4(sc, OHCI_INTERRUPT_STATUS),
   1255 		 OREAD4(sc, OHCI_INTERRUPT_ENABLE),
   1256 		 OREAD4(sc, OHCI_INTERRUPT_DISABLE), 0);
   1257 	DPRINTF("               hcca=0x%08x percur=0x%08x ctrlhd=0x%08x",
   1258 		 OREAD4(sc, OHCI_HCCA),
   1259 		 OREAD4(sc, OHCI_PERIOD_CURRENT_ED),
   1260 		 OREAD4(sc, OHCI_CONTROL_HEAD_ED), 0);
   1261 	DPRINTF("               ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x",
   1262 		 OREAD4(sc, OHCI_CONTROL_CURRENT_ED),
   1263 		 OREAD4(sc, OHCI_BULK_HEAD_ED),
   1264 		 OREAD4(sc, OHCI_BULK_CURRENT_ED) ,0);
   1265 	DPRINTF("               done=0x%08x fmival=0x%08x fmrem=0x%08x",
   1266 		 OREAD4(sc, OHCI_DONE_HEAD),
   1267 		 OREAD4(sc, OHCI_FM_INTERVAL),
   1268 		 OREAD4(sc, OHCI_FM_REMAINING), 0);
   1269 	DPRINTF("               fmnum=0x%08x perst=0x%08x lsthrs=0x%08x",
   1270 		 OREAD4(sc, OHCI_FM_NUMBER),
   1271 		 OREAD4(sc, OHCI_PERIODIC_START),
   1272 		 OREAD4(sc, OHCI_LS_THRESHOLD), 0);
   1273 	DPRINTF("               desca=0x%08x descb=0x%08x stat=0x%08x",
   1274 		 OREAD4(sc, OHCI_RH_DESCRIPTOR_A),
   1275 		 OREAD4(sc, OHCI_RH_DESCRIPTOR_B),
   1276 		 OREAD4(sc, OHCI_RH_STATUS), 0);
   1277 	DPRINTF("               port1=0x%08x port2=0x%08x",
   1278 		 OREAD4(sc, OHCI_RH_PORT_STATUS(1)),
   1279 		 OREAD4(sc, OHCI_RH_PORT_STATUS(2)), 0, 0);
   1280 	DPRINTF("         HCCA: frame_number=0x%04x done_head=0x%08x",
   1281 		 O32TOH(sc->sc_hcca->hcca_frame_number),
   1282 		 O32TOH(sc->sc_hcca->hcca_done_head), 0, 0);
   1283 }
   1284 #endif
   1285 
   1286 Static int ohci_intr1(ohci_softc_t *);
   1287 
   1288 int
   1289 ohci_intr(void *p)
   1290 {
   1291 	ohci_softc_t *sc = p;
   1292 	int ret = 0;
   1293 
   1294 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   1295 
   1296 	if (sc == NULL)
   1297 		return 0;
   1298 
   1299 	mutex_spin_enter(&sc->sc_intr_lock);
   1300 
   1301 	if (sc->sc_dying || !device_has_power(sc->sc_dev))
   1302 		goto done;
   1303 
   1304 	/* If we get an interrupt while polling, then just ignore it. */
   1305 	if (sc->sc_bus.ub_usepolling) {
   1306 		DPRINTFN(16, "ignored interrupt while polling", 0, 0, 0, 0);
   1307 		/* for level triggered intrs, should do something to ack */
   1308 		OWRITE4(sc, OHCI_INTERRUPT_STATUS,
   1309 			OREAD4(sc, OHCI_INTERRUPT_STATUS));
   1310 
   1311 		goto done;
   1312 	}
   1313 
   1314 	ret = ohci_intr1(sc);
   1315 
   1316 done:
   1317 	mutex_spin_exit(&sc->sc_intr_lock);
   1318 	return ret;
   1319 }
   1320 
   1321 Static int
   1322 ohci_intr1(ohci_softc_t *sc)
   1323 {
   1324 	uint32_t intrs, eintrs;
   1325 
   1326 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   1327 
   1328 	/* In case the interrupt occurs before initialization has completed. */
   1329 	if (sc == NULL || sc->sc_hcca == NULL) {
   1330 #ifdef DIAGNOSTIC
   1331 		printf("ohci_intr: sc->sc_hcca == NULL\n");
   1332 #endif
   1333 		return 0;
   1334 	}
   1335 
   1336 	KASSERT(mutex_owned(&sc->sc_intr_lock));
   1337 
   1338 	intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS);
   1339 	if (!intrs)
   1340 		return 0;
   1341 
   1342 	/* Acknowledge */
   1343 	OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs & ~(OHCI_MIE|OHCI_WDH));
   1344 	eintrs = intrs & sc->sc_eintrs;
   1345 	DPRINTFN(7, "sc=%p", sc, 0, 0, 0);
   1346 	DPRINTFN(7, "intrs=%#x(%#x) eintrs=%#x(%#x)",
   1347 	    intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), eintrs,
   1348 	    sc->sc_eintrs);
   1349 
   1350 	if (!eintrs) {
   1351 		return 0;
   1352 	}
   1353 
   1354 	if (eintrs & OHCI_SO) {
   1355 		sc->sc_overrun_cnt++;
   1356 		if (usbd_ratecheck(&sc->sc_overrun_ntc)) {
   1357 			printf("%s: %u scheduling overruns\n",
   1358 			    device_xname(sc->sc_dev), sc->sc_overrun_cnt);
   1359 			sc->sc_overrun_cnt = 0;
   1360 		}
   1361 		/* XXX do what */
   1362 		eintrs &= ~OHCI_SO;
   1363 	}
   1364 	if (eintrs & OHCI_WDH) {
   1365 		/*
   1366 		 * We block the interrupt below, and reenable it later from
   1367 		 * ohci_softintr().
   1368 		 */
   1369 		usb_schedsoftintr(&sc->sc_bus);
   1370 	}
   1371 	if (eintrs & OHCI_RD) {
   1372 		DPRINTFN(5, "resume detect", sc, 0, 0, 0);
   1373 		printf("%s: resume detect\n", device_xname(sc->sc_dev));
   1374 		/* XXX process resume detect */
   1375 	}
   1376 	if (eintrs & OHCI_UE) {
   1377 		DPRINTFN(5, "unrecoverable error", sc, 0, 0, 0);
   1378 		printf("%s: unrecoverable error, controller halted\n",
   1379 		       device_xname(sc->sc_dev));
   1380 		OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
   1381 		/* XXX what else */
   1382 	}
   1383 	if (eintrs & OHCI_RHSC) {
   1384 		/*
   1385 		 * We block the interrupt below, and reenable it later from
   1386 		 * a timeout.
   1387 		 */
   1388 		softint_schedule(sc->sc_rhsc_si);
   1389 	}
   1390 
   1391 	if (eintrs != 0) {
   1392 		/* Block unprocessed interrupts. */
   1393 		OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs);
   1394 		sc->sc_eintrs &= ~eintrs;
   1395 		DPRINTF("sc %p blocking intrs 0x%x", sc, eintrs, 0, 0);
   1396 	}
   1397 
   1398 	return 1;
   1399 }
   1400 
   1401 void
   1402 ohci_rhsc_enable(void *v_sc)
   1403 {
   1404 	ohci_softc_t *sc = v_sc;
   1405 
   1406 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   1407 	DPRINTF("sc %p", sc, 0, 0, 0);
   1408 	mutex_spin_enter(&sc->sc_intr_lock);
   1409 	sc->sc_eintrs |= OHCI_RHSC;
   1410 	OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC);
   1411 	mutex_spin_exit(&sc->sc_intr_lock);
   1412 }
   1413 
   1414 #ifdef OHCI_DEBUG
   1415 const char *ohci_cc_strs[] = {
   1416 	"NO_ERROR",
   1417 	"CRC",
   1418 	"BIT_STUFFING",
   1419 	"DATA_TOGGLE_MISMATCH",
   1420 	"STALL",
   1421 	"DEVICE_NOT_RESPONDING",
   1422 	"PID_CHECK_FAILURE",
   1423 	"UNEXPECTED_PID",
   1424 	"DATA_OVERRUN",
   1425 	"DATA_UNDERRUN",
   1426 	"BUFFER_OVERRUN",
   1427 	"BUFFER_UNDERRUN",
   1428 	"reserved",
   1429 	"reserved",
   1430 	"NOT_ACCESSED",
   1431 	"NOT_ACCESSED",
   1432 };
   1433 #endif
   1434 
   1435 void
   1436 ohci_softintr(void *v)
   1437 {
   1438 	struct usbd_bus *bus = v;
   1439 	ohci_softc_t *sc = OHCI_BUS2SC(bus);
   1440 	ohci_soft_itd_t *sitd, *sidone, *sitdnext;
   1441 	ohci_soft_td_t  *std,  *sdone,  *stdnext;
   1442 	struct usbd_xfer *xfer;
   1443 	struct ohci_pipe *opipe;
   1444 	int len, cc;
   1445 	int i, j, actlen, iframes, uedir;
   1446 	ohci_physaddr_t done;
   1447 
   1448 	KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
   1449 
   1450 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   1451 
   1452 	usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head),
   1453 	    sizeof(sc->sc_hcca->hcca_done_head),
   1454 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1455 	done = O32TOH(sc->sc_hcca->hcca_done_head) & ~OHCI_DONE_INTRS;
   1456 	sc->sc_hcca->hcca_done_head = 0;
   1457 	usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head),
   1458 	    sizeof(sc->sc_hcca->hcca_done_head),
   1459 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1460 	OWRITE4(sc, OHCI_INTERRUPT_STATUS, OHCI_WDH);
   1461 	sc->sc_eintrs |= OHCI_WDH;
   1462 	OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_WDH);
   1463 
   1464 	/* Reverse the done list. */
   1465 	for (sdone = NULL, sidone = NULL; done != 0; ) {
   1466 		std = ohci_hash_find_td(sc, done);
   1467 		if (std != NULL) {
   1468 			usb_syncmem(&std->dma, std->offs, sizeof(std->td),
   1469 			    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1470 			std->dnext = sdone;
   1471 			done = O32TOH(std->td.td_nexttd);
   1472 			sdone = std;
   1473 			DPRINTFN(10, "add TD %p", std, 0, 0, 0);
   1474 			continue;
   1475 		}
   1476 		sitd = ohci_hash_find_itd(sc, done);
   1477 		if (sitd != NULL) {
   1478 			usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd),
   1479 			    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1480 			sitd->dnext = sidone;
   1481 			done = O32TOH(sitd->itd.itd_nextitd);
   1482 			sidone = sitd;
   1483 			DPRINTFN(5, "add ITD %p", sitd, 0, 0, 0);
   1484 			continue;
   1485 		}
   1486 		device_printf(sc->sc_dev, "WARNING: addr 0x%08lx not found\n",
   1487 		    (u_long)done);
   1488 		break;
   1489 	}
   1490 
   1491 	DPRINTFN(10, "sdone=%p sidone=%p", sdone, sidone, 0, 0);
   1492 	DPRINTFN(10, "--- TD dump start ---", 0, 0, 0, 0);
   1493 #ifdef OHCI_DEBUG
   1494 	if (ohcidebug >= 10) {
   1495 		for (std = sdone; std; std = std->dnext)
   1496 			ohci_dump_td(sc, std);
   1497 	}
   1498 #endif
   1499 	DPRINTFN(10, "--- TD dump end ---", 0, 0, 0, 0);
   1500 
   1501 	for (std = sdone; std; std = stdnext) {
   1502 		xfer = std->xfer;
   1503 		stdnext = std->dnext;
   1504 		DPRINTFN(10, "std=%p xfer=%p hcpriv=%p", std, xfer,
   1505 		    xfer ? xfer->ux_hcpriv : 0, 0);
   1506 		if (xfer == NULL) {
   1507 			/*
   1508 			 * xfer == NULL: There seems to be no xfer associated
   1509 			 * with this TD. It is tailp that happened to end up on
   1510 			 * the done queue.
   1511 			 * Shouldn't happen, but some chips are broken(?).
   1512 			 */
   1513 			continue;
   1514 		}
   1515 		if (xfer->ux_status == USBD_CANCELLED ||
   1516 		    xfer->ux_status == USBD_TIMEOUT) {
   1517 			DPRINTF("cancel/timeout %p", xfer, 0, 0, 0);
   1518 			/* Handled by abort routine. */
   1519 			continue;
   1520 		}
   1521 		callout_stop(&xfer->ux_callout);
   1522 
   1523 		len = std->len;
   1524 		if (std->td.td_cbp != 0)
   1525 			len -= O32TOH(std->td.td_be) -
   1526 			       O32TOH(std->td.td_cbp) + 1;
   1527 		DPRINTFN(10, "len=%d, flags=0x%x", len, std->flags, 0, 0);
   1528 		if (std->flags & OHCI_ADD_LEN)
   1529 			xfer->ux_actlen += len;
   1530 
   1531 		cc = OHCI_TD_GET_CC(O32TOH(std->td.td_flags));
   1532 		if (cc == OHCI_CC_NO_ERROR) {
   1533 			ohci_hash_rem_td(sc, std);
   1534 			if (std->flags & OHCI_CALL_DONE) {
   1535 				xfer->ux_status = USBD_NORMAL_COMPLETION;
   1536 				usb_transfer_complete(xfer);
   1537 			}
   1538 		} else {
   1539 			/*
   1540 			 * Endpoint is halted.  First unlink all the TDs
   1541 			 * belonging to the failed transfer, and then restart
   1542 			 * the endpoint.
   1543 			 */
   1544 			ohci_soft_td_t *p, *n;
   1545 			opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe);
   1546 
   1547 			DPRINTFN(10, "error cc=%d", cc, 0, 0, 0);
   1548 
   1549 			/* remove xfer's TDs from the hash */
   1550 			for (p = std; p->xfer == xfer; p = n) {
   1551 				n = p->nexttd;
   1552 				ohci_hash_rem_td(sc, p);
   1553 			}
   1554 
   1555 			ohci_soft_ed_t *sed = opipe->sed;
   1556 
   1557 			/* clear halt and TD chain */
   1558 			sed->ed.ed_headp = HTOO32(p->physaddr);
   1559 			usb_syncmem(&sed->dma,
   1560 			    sed->offs + offsetof(ohci_ed_t, ed_headp),
   1561 			    sizeof(sed->ed.ed_headp),
   1562 			    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1563 
   1564 			OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
   1565 
   1566 			if (cc == OHCI_CC_DATA_UNDERRUN)
   1567 				xfer->ux_status = USBD_NORMAL_COMPLETION;
   1568 			else if (cc == OHCI_CC_STALL)
   1569 				xfer->ux_status = USBD_STALLED;
   1570 			else
   1571 				xfer->ux_status = USBD_IOERROR;
   1572 			usb_transfer_complete(xfer);
   1573 		}
   1574 	}
   1575 	DPRINTFN(10, "--- ITD dump start ---", 0, 0, 0, 0);
   1576 #ifdef OHCI_DEBUG
   1577 	if (ohcidebug >= 10) {
   1578 		for (sitd = sidone; sitd; sitd = sitd->dnext)
   1579 			ohci_dump_itd(sc, sitd);
   1580 	}
   1581 #endif
   1582 	DPRINTFN(10, "--- ITD dump end ---", 0, 0, 0, 0);
   1583 
   1584 	for (sitd = sidone; sitd != NULL; sitd = sitdnext) {
   1585 		xfer = sitd->xfer;
   1586 		sitdnext = sitd->dnext;
   1587 		DPRINTFN(1, "sitd=%p xfer=%p hcpriv=%p", sitd, xfer,
   1588 		    xfer ? xfer->ux_hcpriv : 0, 0);
   1589 		if (xfer == NULL)
   1590 			continue;
   1591 		if (xfer->ux_status == USBD_CANCELLED ||
   1592 		    xfer->ux_status == USBD_TIMEOUT) {
   1593 			DPRINTF("cancel/timeout %p", xfer, 0, 0, 0);
   1594 			/* Handled by abort routine. */
   1595 			continue;
   1596 		}
   1597 		KASSERT(!sitd->isdone);
   1598 #ifdef DIAGNOSTIC
   1599 		sitd->isdone = true;
   1600 #endif
   1601 		if (sitd->flags & OHCI_CALL_DONE) {
   1602 			ohci_soft_itd_t *next;
   1603 
   1604 			opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe);
   1605 			opipe->isoc.inuse -= xfer->ux_nframes;
   1606 			uedir = UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc->
   1607 			    bEndpointAddress);
   1608 			xfer->ux_status = USBD_NORMAL_COMPLETION;
   1609 			actlen = 0;
   1610 			for (i = 0, sitd = xfer->ux_hcpriv;;
   1611 			    sitd = next) {
   1612 				next = sitd->nextitd;
   1613 				if (OHCI_ITD_GET_CC(O32TOH(sitd->
   1614 				    itd.itd_flags)) != OHCI_CC_NO_ERROR)
   1615 					xfer->ux_status = USBD_IOERROR;
   1616 				/* For input, update frlengths with actual */
   1617 				/* XXX anything necessary for output? */
   1618 				if (uedir == UE_DIR_IN &&
   1619 				    xfer->ux_status == USBD_NORMAL_COMPLETION) {
   1620 					iframes = OHCI_ITD_GET_FC(O32TOH(
   1621 					    sitd->itd.itd_flags));
   1622 					for (j = 0; j < iframes; i++, j++) {
   1623 						len = O16TOH(sitd->
   1624 						    itd.itd_offset[j]);
   1625 						if ((OHCI_ITD_PSW_GET_CC(len) &
   1626 						    OHCI_CC_NOT_ACCESSED_MASK)
   1627 						    == OHCI_CC_NOT_ACCESSED)
   1628 							len = 0;
   1629 						else
   1630 							len = OHCI_ITD_PSW_LENGTH(len);
   1631 						xfer->ux_frlengths[i] = len;
   1632 						actlen += len;
   1633 					}
   1634 				}
   1635 				if (sitd->flags & OHCI_CALL_DONE)
   1636 					break;
   1637 				ohci_hash_rem_itd(sc, sitd);
   1638 
   1639 			}
   1640 			ohci_hash_rem_itd(sc, sitd);
   1641 			if (uedir == UE_DIR_IN &&
   1642 			    xfer->ux_status == USBD_NORMAL_COMPLETION)
   1643 				xfer->ux_actlen = actlen;
   1644 			xfer->ux_hcpriv = NULL;
   1645 
   1646 			usb_transfer_complete(xfer);
   1647 		}
   1648 	}
   1649 
   1650 	if (sc->sc_softwake) {
   1651 		sc->sc_softwake = 0;
   1652 		cv_broadcast(&sc->sc_softwake_cv);
   1653 	}
   1654 
   1655 	DPRINTFN(10, "done", 0, 0, 0, 0);
   1656 }
   1657 
   1658 void
   1659 ohci_device_ctrl_done(struct usbd_xfer *xfer)
   1660 {
   1661 	struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe);
   1662 	ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer);
   1663 	int len = UGETW(xfer->ux_request.wLength);
   1664 	int isread = (xfer->ux_request.bmRequestType & UT_READ);
   1665 
   1666 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   1667 	DPRINTFN(10, "xfer=%p", xfer, 0, 0, 0);
   1668 
   1669 	KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
   1670 	KASSERT(xfer->ux_rqflags & URQ_REQUEST);
   1671 
   1672 	if (len)
   1673 		usb_syncmem(&xfer->ux_dmabuf, 0, len,
   1674 		    isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
   1675 	usb_syncmem(&opipe->ctrl.reqdma, 0,
   1676 	    sizeof(usb_device_request_t),  BUS_DMASYNC_POSTWRITE);
   1677 }
   1678 
   1679 void
   1680 ohci_device_intr_done(struct usbd_xfer *xfer)
   1681 {
   1682 	struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer);
   1683 	struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe);
   1684 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   1685 	ohci_soft_ed_t *sed = opipe->sed;
   1686 	int isread =
   1687 	    (UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress) == UE_DIR_IN);
   1688 
   1689 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   1690 	DPRINTFN(10, "xfer=%p, actlen=%d", xfer, xfer->ux_actlen, 0, 0);
   1691 
   1692 	KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
   1693 
   1694 	usb_syncmem(&xfer->ux_dmabuf, 0, xfer->ux_length,
   1695 	    isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
   1696 	if (xfer->ux_pipe->up_repeat) {
   1697 	    	ohci_soft_td_t *data, *last, *tail;
   1698 		int len = xfer->ux_length;
   1699 
   1700 		/*
   1701 		 * Use the pipe "tail" TD as our first and loan our first TD
   1702 		 * to the next transfer.
   1703 		 */
   1704 		data = opipe->tail.td;
   1705 		opipe->tail.td = ox->ox_stds[0];
   1706 		ox->ox_stds[0] = data;
   1707 		ohci_reset_std_chain(sc, xfer, len, isread, data, &last);
   1708 
   1709 		/* point at sentinel */
   1710 		tail = opipe->tail.td;
   1711 		memset(&tail->td, 0, sizeof(tail->td));
   1712 		tail->nexttd = NULL;
   1713 		tail->xfer = NULL;
   1714 		usb_syncmem(&tail->dma, tail->offs, sizeof(tail->td),
   1715 		    BUS_DMASYNC_PREWRITE);
   1716 
   1717 		/* We want interrupt at the end of the transfer. */
   1718 		last->td.td_flags &= HTOO32(~OHCI_TD_INTR_MASK);
   1719 		last->td.td_flags |= HTOO32(OHCI_TD_SET_DI(1));
   1720 
   1721 		last->td.td_nexttd = HTOO32(tail->physaddr);
   1722 		last->nexttd = tail;
   1723 		last->flags |= OHCI_CALL_DONE;
   1724 		usb_syncmem(&last->dma, last->offs, sizeof(last->td),
   1725 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1726 
   1727 		xfer->ux_hcpriv = data;
   1728 		xfer->ux_actlen = 0;
   1729 
   1730 		/* Insert ED in schedule */
   1731 		sed->ed.ed_tailp = HTOO32(tail->physaddr);
   1732 		usb_syncmem(&sed->dma,
   1733 		    sed->offs + offsetof(ohci_ed_t, ed_tailp),
   1734 		    sizeof(sed->ed.ed_tailp),
   1735 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1736 	}
   1737 }
   1738 
   1739 void
   1740 ohci_device_bulk_done(struct usbd_xfer *xfer)
   1741 {
   1742 	ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer);
   1743 
   1744 	int isread =
   1745 	    (UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress) == UE_DIR_IN);
   1746 
   1747 	KASSERT(mutex_owned(&sc->sc_lock));
   1748 
   1749 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   1750 	DPRINTFN(10, "xfer=%p, actlen=%d", xfer, xfer->ux_actlen, 0, 0);
   1751 	usb_syncmem(&xfer->ux_dmabuf, 0, xfer->ux_length,
   1752 	    isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
   1753 }
   1754 
   1755 Static void
   1756 ohci_rhsc_softint(void *arg)
   1757 {
   1758 	ohci_softc_t *sc = arg;
   1759 
   1760 	mutex_enter(&sc->sc_lock);
   1761 
   1762 	ohci_rhsc(sc, sc->sc_intrxfer);
   1763 
   1764 	/* Do not allow RHSC interrupts > 1 per second */
   1765 	callout_reset(&sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc);
   1766 
   1767 	mutex_exit(&sc->sc_lock);
   1768 }
   1769 
   1770 void
   1771 ohci_rhsc(ohci_softc_t *sc, struct usbd_xfer *xfer)
   1772 {
   1773 	u_char *p;
   1774 	int i, m;
   1775 	int hstatus __unused;
   1776 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   1777 
   1778 	KASSERT(mutex_owned(&sc->sc_lock));
   1779 
   1780 	hstatus = OREAD4(sc, OHCI_RH_STATUS);
   1781 	DPRINTF("sc=%p xfer=%p hstatus=0x%08x", sc, xfer, hstatus, 0);
   1782 
   1783 	if (xfer == NULL) {
   1784 		/* Just ignore the change. */
   1785 		return;
   1786 	}
   1787 
   1788 	p = xfer->ux_buf;
   1789 	m = min(sc->sc_noport, xfer->ux_length * 8 - 1);
   1790 	memset(p, 0, xfer->ux_length);
   1791 	for (i = 1; i <= m; i++) {
   1792 		/* Pick out CHANGE bits from the status reg. */
   1793 		if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16)
   1794 			p[i/8] |= 1 << (i%8);
   1795 	}
   1796 	DPRINTF("change=0x%02x", *p, 0, 0, 0);
   1797 	xfer->ux_actlen = xfer->ux_length;
   1798 	xfer->ux_status = USBD_NORMAL_COMPLETION;
   1799 
   1800 	usb_transfer_complete(xfer);
   1801 }
   1802 
   1803 void
   1804 ohci_root_intr_done(struct usbd_xfer *xfer)
   1805 {
   1806 }
   1807 
   1808 /*
   1809  * Wait here until controller claims to have an interrupt.
   1810  * Then call ohci_intr and return.  Use timeout to avoid waiting
   1811  * too long.
   1812  */
   1813 void
   1814 ohci_waitintr(ohci_softc_t *sc, struct usbd_xfer *xfer)
   1815 {
   1816 	int timo;
   1817 	uint32_t intrs;
   1818 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   1819 
   1820 	mutex_enter(&sc->sc_lock);
   1821 
   1822 	xfer->ux_status = USBD_IN_PROGRESS;
   1823 	for (timo = xfer->ux_timeout; timo >= 0; timo--) {
   1824 		usb_delay_ms(&sc->sc_bus, 1);
   1825 		if (sc->sc_dying)
   1826 			break;
   1827 		intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs;
   1828 		DPRINTFN(15, "intrs 0x%04x", intrs, 0, 0, 0);
   1829 #ifdef OHCI_DEBUG
   1830 		if (ohcidebug > 15)
   1831 			ohci_dumpregs(sc);
   1832 #endif
   1833 		if (intrs) {
   1834 			mutex_spin_enter(&sc->sc_intr_lock);
   1835 			ohci_intr1(sc);
   1836 			mutex_spin_exit(&sc->sc_intr_lock);
   1837 			if (xfer->ux_status != USBD_IN_PROGRESS)
   1838 				goto done;
   1839 		}
   1840 	}
   1841 
   1842 	/* Timeout */
   1843 	DPRINTF("timeout", 0, 0, 0, 0);
   1844 	xfer->ux_status = USBD_TIMEOUT;
   1845 	usb_transfer_complete(xfer);
   1846 
   1847 done:
   1848 	mutex_exit(&sc->sc_lock);
   1849 }
   1850 
   1851 void
   1852 ohci_poll(struct usbd_bus *bus)
   1853 {
   1854 	ohci_softc_t *sc = OHCI_BUS2SC(bus);
   1855 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   1856 
   1857 #ifdef OHCI_DEBUG
   1858 	static int last;
   1859 	int new;
   1860 	new = OREAD4(sc, OHCI_INTERRUPT_STATUS);
   1861 	if (new != last) {
   1862 		DPRINTFN(10, "intrs=0x%04x", new, 0, 0, 0);
   1863 		last = new;
   1864 	}
   1865 #endif
   1866 	sc->sc_eintrs |= OHCI_WDH;
   1867 	if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) {
   1868 		mutex_spin_enter(&sc->sc_intr_lock);
   1869 		ohci_intr1(sc);
   1870 		mutex_spin_exit(&sc->sc_intr_lock);
   1871 	}
   1872 }
   1873 
   1874 /*
   1875  * Add an ED to the schedule.  Called with USB lock held.
   1876  */
   1877 Static void
   1878 ohci_add_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head)
   1879 {
   1880 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   1881 	DPRINTFN(8, "sed=%p head=%p", sed, head, 0, 0);
   1882 
   1883 	KASSERT(mutex_owned(&sc->sc_lock));
   1884 
   1885 	usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted),
   1886 	    sizeof(head->ed.ed_nexted),
   1887 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1888 	sed->next = head->next;
   1889 	sed->ed.ed_nexted = head->ed.ed_nexted;
   1890 	usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted),
   1891 	    sizeof(sed->ed.ed_nexted),
   1892 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1893 	head->next = sed;
   1894 	head->ed.ed_nexted = HTOO32(sed->physaddr);
   1895 	usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted),
   1896 	    sizeof(head->ed.ed_nexted),
   1897 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1898 }
   1899 
   1900 /*
   1901  * Remove an ED from the schedule.  Called with USB lock held.
   1902  */
   1903 Static void
   1904 ohci_rem_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head)
   1905 {
   1906 	ohci_soft_ed_t *p;
   1907 
   1908 	KASSERT(mutex_owned(&sc->sc_lock));
   1909 
   1910 	/* XXX */
   1911 	for (p = head; p != NULL && p->next != sed; p = p->next)
   1912 		;
   1913 	KASSERT(p != NULL);
   1914 
   1915 	usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted),
   1916 	    sizeof(sed->ed.ed_nexted),
   1917 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1918 	p->next = sed->next;
   1919 	p->ed.ed_nexted = sed->ed.ed_nexted;
   1920 	usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted),
   1921 	    sizeof(p->ed.ed_nexted),
   1922 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1923 }
   1924 
   1925 /*
   1926  * When a transfer is completed the TD is added to the done queue by
   1927  * the host controller.  This queue is the processed by software.
   1928  * Unfortunately the queue contains the physical address of the TD
   1929  * and we have no simple way to translate this back to a kernel address.
   1930  * To make the translation possible (and fast) we use a hash table of
   1931  * TDs currently in the schedule.  The physical address is used as the
   1932  * hash value.
   1933  */
   1934 
   1935 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE)
   1936 /* Called with USB lock held. */
   1937 void
   1938 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std)
   1939 {
   1940 	int h = HASH(std->physaddr);
   1941 
   1942 	KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
   1943 
   1944 	LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext);
   1945 }
   1946 
   1947 /* Called with USB lock held. */
   1948 void
   1949 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std)
   1950 {
   1951 
   1952 	KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
   1953 
   1954 	LIST_REMOVE(std, hnext);
   1955 }
   1956 
   1957 ohci_soft_td_t *
   1958 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a)
   1959 {
   1960 	int h = HASH(a);
   1961 	ohci_soft_td_t *std;
   1962 
   1963 	for (std = LIST_FIRST(&sc->sc_hash_tds[h]);
   1964 	     std != NULL;
   1965 	     std = LIST_NEXT(std, hnext))
   1966 		if (std->physaddr == a)
   1967 			return std;
   1968 	return NULL;
   1969 }
   1970 
   1971 /* Called with USB lock held. */
   1972 void
   1973 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
   1974 {
   1975 	int h = HASH(sitd->physaddr);
   1976 
   1977 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   1978 
   1979 	KASSERT(mutex_owned(&sc->sc_lock));
   1980 
   1981 	DPRINTFN(10, "sitd=%p physaddr=0x%08lx", sitd, (u_long)sitd->physaddr,
   1982 	    0, 0);
   1983 
   1984 	LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext);
   1985 }
   1986 
   1987 /* Called with USB lock held. */
   1988 void
   1989 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
   1990 {
   1991 
   1992 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   1993 
   1994 	KASSERT(mutex_owned(&sc->sc_lock));
   1995 
   1996 	DPRINTFN(10, "sitd=%p physaddr=0x%08lx", sitd, (u_long)sitd->physaddr,
   1997 	    0, 0);
   1998 
   1999 	LIST_REMOVE(sitd, hnext);
   2000 }
   2001 
   2002 ohci_soft_itd_t *
   2003 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a)
   2004 {
   2005 	int h = HASH(a);
   2006 	ohci_soft_itd_t *sitd;
   2007 
   2008 	for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]);
   2009 	     sitd != NULL;
   2010 	     sitd = LIST_NEXT(sitd, hnext))
   2011 		if (sitd->physaddr == a)
   2012 			return sitd;
   2013 	return NULL;
   2014 }
   2015 
   2016 void
   2017 ohci_timeout(void *addr)
   2018 {
   2019 	struct usbd_xfer *xfer = addr;
   2020 	struct ohci_xfer *oxfer = OHCI_XFER2OXFER(xfer);
   2021 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   2022 
   2023 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   2024 	DPRINTF("oxfer=%p", oxfer, 0, 0, 0);
   2025 
   2026 	if (sc->sc_dying) {
   2027 		mutex_enter(&sc->sc_lock);
   2028 		ohci_abort_xfer(xfer, USBD_TIMEOUT);
   2029 		mutex_exit(&sc->sc_lock);
   2030 		return;
   2031 	}
   2032 
   2033 	/* Execute the abort in a process context. */
   2034 	usb_init_task(&oxfer->abort_task, ohci_timeout_task, addr,
   2035 	    USB_TASKQ_MPSAFE);
   2036 	usb_add_task(xfer->ux_pipe->up_dev, &oxfer->abort_task,
   2037 	    USB_TASKQ_HC);
   2038 }
   2039 
   2040 void
   2041 ohci_timeout_task(void *addr)
   2042 {
   2043 	struct usbd_xfer *xfer = addr;
   2044 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   2045 
   2046 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   2047 
   2048 	DPRINTF("xfer=%p", xfer, 0, 0, 0);
   2049 
   2050 	mutex_enter(&sc->sc_lock);
   2051 	ohci_abort_xfer(xfer, USBD_TIMEOUT);
   2052 	mutex_exit(&sc->sc_lock);
   2053 }
   2054 
   2055 #ifdef OHCI_DEBUG
   2056 void
   2057 ohci_dump_tds(ohci_softc_t *sc, ohci_soft_td_t *std)
   2058 {
   2059 	for (; std; std = std->nexttd) {
   2060 		ohci_dump_td(sc, std);
   2061 		KASSERTMSG(std->nexttd == NULL || std != std->nexttd,
   2062 		    "std %p next %p", std, std->nexttd);
   2063 	}
   2064 }
   2065 
   2066 void
   2067 ohci_dump_td(ohci_softc_t *sc, ohci_soft_td_t *std)
   2068 {
   2069 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   2070 
   2071 	usb_syncmem(&std->dma, std->offs, sizeof(std->td),
   2072 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   2073 
   2074 	uint32_t flags = O32TOH(std->td.td_flags);
   2075 	DPRINTF("TD(%p) at 0x%08lx:", std, (u_long)std->physaddr, 0, 0);
   2076 	DPRINTF("    round=%d DP=%x DI=%x T=%x",
   2077 	    !!(flags & OHCI_TD_R),
   2078 	    __SHIFTOUT(flags, OHCI_TD_DP_MASK),
   2079 	    OHCI_TD_GET_DI(flags),
   2080 	    __SHIFTOUT(flags, OHCI_TD_TOGGLE_MASK));
   2081 	DPRINTF("    EC=%d CC=%d", OHCI_TD_GET_EC(flags), OHCI_TD_GET_CC(flags),
   2082 	    0, 0);
   2083 	DPRINTF("    td_cbp=0x%08lx td_nexttd=0x%08lx td_be=0x%08lx",
   2084 	       (u_long)O32TOH(std->td.td_cbp),
   2085 	       (u_long)O32TOH(std->td.td_nexttd),
   2086 	       (u_long)O32TOH(std->td.td_be), 0);
   2087 }
   2088 
   2089 void
   2090 ohci_dump_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
   2091 {
   2092 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   2093 
   2094 	usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd),
   2095 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   2096 
   2097 	uint32_t flags = O32TOH(sitd->itd.itd_flags);
   2098 	DPRINTF("ITD(%p) at 0x%08lx", sitd, (u_long)sitd->physaddr, 0, 0);
   2099 	DPRINTF("    sf=%d di=%d fc=%d cc=%d",
   2100 	    OHCI_ITD_GET_SF(flags), OHCI_ITD_GET_DI(flags),
   2101 	    OHCI_ITD_GET_FC(flags), OHCI_ITD_GET_CC(flags));
   2102 	DPRINTF("    bp0=0x%08x next=0x%08x be=0x%08x",
   2103 	    O32TOH(sitd->itd.itd_bp0),
   2104 	    O32TOH(sitd->itd.itd_nextitd),
   2105 	    O32TOH(sitd->itd.itd_be), 0);
   2106 	CTASSERT(OHCI_ITD_NOFFSET == 8);
   2107 	DPRINTF("    offs[0] = 0x%04x  offs[1] = 0x%04x  "
   2108 	    "offs[2] = 0x%04x  offs[3] = 0x%04x",
   2109 	    O16TOH(sitd->itd.itd_offset[0]),
   2110 	    O16TOH(sitd->itd.itd_offset[1]),
   2111 	    O16TOH(sitd->itd.itd_offset[2]),
   2112 	    O16TOH(sitd->itd.itd_offset[3]));
   2113 	DPRINTF("    offs[4] = 0x%04x  offs[5] = 0x%04x  "
   2114 	    "offs[6] = 0x%04x  offs[7] = 0x%04x",
   2115 	    O16TOH(sitd->itd.itd_offset[4]),
   2116 	    O16TOH(sitd->itd.itd_offset[5]),
   2117 	    O16TOH(sitd->itd.itd_offset[6]),
   2118 	    O16TOH(sitd->itd.itd_offset[7]));
   2119 }
   2120 
   2121 void
   2122 ohci_dump_itds(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
   2123 {
   2124 	for (; sitd; sitd = sitd->nextitd)
   2125 		ohci_dump_itd(sc, sitd);
   2126 }
   2127 
   2128 void
   2129 ohci_dump_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed)
   2130 {
   2131 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   2132 
   2133 	usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
   2134 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   2135 
   2136 	uint32_t flags = O32TOH(sed->ed.ed_flags);
   2137 	DPRINTF("ED(%p) at 0x%08lx:", sed, sed->physaddr, 0, 0);
   2138 	DPRINTF("    addr=%d endpt=%d maxp=%d",
   2139 	    OHCI_ED_GET_FA(flags),
   2140 	    OHCI_ED_GET_EN(flags),
   2141 	    OHCI_ED_GET_MAXP(flags),
   2142 	    0);
   2143 	DPRINTF("    dir=%d speed=%d skip=%d iso=%d",
   2144 	   __SHIFTOUT(flags, OHCI_ED_DIR_MASK),
   2145 	    !!(flags & OHCI_ED_SPEED),
   2146 	    !!(flags & OHCI_ED_SKIP),
   2147 	    !!(flags & OHCI_ED_FORMAT_ISO));
   2148 	DPRINTF("    tailp=0x%08lx", (u_long)O32TOH(sed->ed.ed_tailp),
   2149 	    0, 0, 0);
   2150 	DPRINTF("    headp=0x%08lx nexted=0x%08lx halted=%d carry=%d",
   2151 	    O32TOH(sed->ed.ed_headp), O32TOH(sed->ed.ed_nexted),
   2152 	    !!(O32TOH(sed->ed.ed_headp) & OHCI_HALTED),
   2153 	    !!(O32TOH(sed->ed.ed_headp) & OHCI_TOGGLECARRY));
   2154 }
   2155 #endif
   2156 
   2157 usbd_status
   2158 ohci_open(struct usbd_pipe *pipe)
   2159 {
   2160 	struct usbd_device *dev = pipe->up_dev;
   2161 	struct usbd_bus *bus = dev->ud_bus;
   2162 	ohci_softc_t *sc = OHCI_PIPE2SC(pipe);
   2163 	usb_endpoint_descriptor_t *ed = pipe->up_endpoint->ue_edesc;
   2164 	struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe);
   2165 	uint8_t addr = dev->ud_addr;
   2166 	uint8_t xfertype = ed->bmAttributes & UE_XFERTYPE;
   2167 	ohci_soft_ed_t *sed;
   2168 	ohci_soft_td_t *std;
   2169 	ohci_soft_itd_t *sitd;
   2170 	ohci_physaddr_t tdphys;
   2171 	uint32_t fmt;
   2172 	usbd_status err = USBD_NOMEM;
   2173 	int ival;
   2174 
   2175 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   2176 	DPRINTFN(1, "pipe=%p, addr=%d, endpt=%d (%d)", pipe, addr,
   2177 	    ed->bEndpointAddress, bus->ub_rhaddr);
   2178 
   2179 	if (sc->sc_dying) {
   2180 		return USBD_IOERROR;
   2181 	}
   2182 
   2183 	std = NULL;
   2184 	sed = NULL;
   2185 
   2186 	if (addr == bus->ub_rhaddr) {
   2187 		switch (ed->bEndpointAddress) {
   2188 		case USB_CONTROL_ENDPOINT:
   2189 			pipe->up_methods = &roothub_ctrl_methods;
   2190 			break;
   2191 		case UE_DIR_IN | USBROOTHUB_INTR_ENDPT:
   2192 			pipe->up_methods = &ohci_root_intr_methods;
   2193 			break;
   2194 		default:
   2195 			err = USBD_INVAL;
   2196 			goto bad;
   2197 		}
   2198 	} else {
   2199 		sed = ohci_alloc_sed(sc);
   2200 		if (sed == NULL)
   2201 			goto bad;
   2202 		opipe->sed = sed;
   2203 		if (xfertype == UE_ISOCHRONOUS) {
   2204 			sitd = ohci_alloc_sitd(sc);
   2205 			if (sitd == NULL)
   2206 				goto bad;
   2207 
   2208 			opipe->tail.itd = sitd;
   2209 			tdphys = sitd->physaddr;
   2210 			fmt = OHCI_ED_FORMAT_ISO;
   2211 			if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN)
   2212 				fmt |= OHCI_ED_DIR_IN;
   2213 			else
   2214 				fmt |= OHCI_ED_DIR_OUT;
   2215 		} else {
   2216 			std = ohci_alloc_std(sc);
   2217 			if (std == NULL)
   2218 				goto bad;
   2219 
   2220 			opipe->tail.td = std;
   2221 			tdphys = std->physaddr;
   2222 			fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD;
   2223 		}
   2224 		sed->ed.ed_flags = HTOO32(
   2225 			OHCI_ED_SET_FA(addr) |
   2226 			OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) |
   2227 			(dev->ud_speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) |
   2228 			fmt |
   2229 			OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize)));
   2230 		sed->ed.ed_headp = HTOO32(tdphys |
   2231 		    (pipe->up_endpoint->ue_toggle ? OHCI_TOGGLECARRY : 0));
   2232 		sed->ed.ed_tailp = HTOO32(tdphys);
   2233 		usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
   2234 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2235 
   2236 		switch (xfertype) {
   2237 		case UE_CONTROL:
   2238 			pipe->up_methods = &ohci_device_ctrl_methods;
   2239 			err = usb_allocmem(&sc->sc_bus,
   2240 				  sizeof(usb_device_request_t),
   2241 				  0, &opipe->ctrl.reqdma);
   2242 			if (err)
   2243 				goto bad;
   2244 			mutex_enter(&sc->sc_lock);
   2245 			ohci_add_ed(sc, sed, sc->sc_ctrl_head);
   2246 			mutex_exit(&sc->sc_lock);
   2247 			break;
   2248 		case UE_INTERRUPT:
   2249 			pipe->up_methods = &ohci_device_intr_methods;
   2250 			ival = pipe->up_interval;
   2251 			if (ival == USBD_DEFAULT_INTERVAL)
   2252 				ival = ed->bInterval;
   2253 			err = ohci_device_setintr(sc, opipe, ival);
   2254 			if (err)
   2255 				goto bad;
   2256 			break;
   2257 		case UE_ISOCHRONOUS:
   2258 			pipe->up_methods = &ohci_device_isoc_methods;
   2259 			return ohci_setup_isoc(pipe);
   2260 		case UE_BULK:
   2261 			pipe->up_methods = &ohci_device_bulk_methods;
   2262 			mutex_enter(&sc->sc_lock);
   2263 			ohci_add_ed(sc, sed, sc->sc_bulk_head);
   2264 			mutex_exit(&sc->sc_lock);
   2265 			break;
   2266 		}
   2267 	}
   2268 
   2269 	return USBD_NORMAL_COMPLETION;
   2270 
   2271  bad:
   2272 	if (std != NULL) {
   2273 		ohci_free_std(sc, std);
   2274 	}
   2275 	if (sed != NULL)
   2276 		ohci_free_sed(sc, sed);
   2277 	return err;
   2278 
   2279 }
   2280 
   2281 /*
   2282  * Close a reqular pipe.
   2283  * Assumes that there are no pending transactions.
   2284  */
   2285 void
   2286 ohci_close_pipe(struct usbd_pipe *pipe, ohci_soft_ed_t *head)
   2287 {
   2288 	struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe);
   2289 	ohci_softc_t *sc = OHCI_PIPE2SC(pipe);
   2290 	ohci_soft_ed_t *sed = opipe->sed;
   2291 
   2292 	KASSERT(mutex_owned(&sc->sc_lock));
   2293 
   2294 #ifdef DIAGNOSTIC
   2295 	sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
   2296 	if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
   2297 	    (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) {
   2298 		ohci_soft_td_t *std;
   2299 		std = ohci_hash_find_td(sc, O32TOH(sed->ed.ed_headp));
   2300 		printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x "
   2301 		       "tl=0x%x pipe=%p, std=%p\n", sed,
   2302 		       (int)O32TOH(sed->ed.ed_headp),
   2303 		       (int)O32TOH(sed->ed.ed_tailp),
   2304 		       pipe, std);
   2305 #ifdef OHCI_DEBUG
   2306 		usbd_dump_pipe(&opipe->pipe);
   2307 		ohci_dump_ed(sc, sed);
   2308 		if (std)
   2309 			ohci_dump_td(sc, std);
   2310 #endif
   2311 		usb_delay_ms(&sc->sc_bus, 2);
   2312 		if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
   2313 		    (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK))
   2314 			printf("ohci_close_pipe: pipe still not empty\n");
   2315 	}
   2316 #endif
   2317 	ohci_rem_ed(sc, sed, head);
   2318 	/* Make sure the host controller is not touching this ED */
   2319 	usb_delay_ms(&sc->sc_bus, 1);
   2320 	pipe->up_endpoint->ue_toggle =
   2321 	    (O32TOH(sed->ed.ed_headp) & OHCI_TOGGLECARRY) ? 1 : 0;
   2322 	ohci_free_sed_locked(sc, opipe->sed);
   2323 }
   2324 
   2325 /*
   2326  * Abort a device request.
   2327  * If this routine is called at splusb() it guarantees that the request
   2328  * will be removed from the hardware scheduling and that the callback
   2329  * for it will be called with USBD_CANCELLED status.
   2330  * It's impossible to guarantee that the requested transfer will not
   2331  * have happened since the hardware runs concurrently.
   2332  * If the transaction has already happened we rely on the ordinary
   2333  * interrupt processing to process it.
   2334  * XXX This is most probably wrong.
   2335  * XXXMRG this doesn't make sense anymore.
   2336  */
   2337 void
   2338 ohci_abort_xfer(struct usbd_xfer *xfer, usbd_status status)
   2339 {
   2340 	struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe);
   2341 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   2342 	ohci_soft_ed_t *sed = opipe->sed;
   2343 	ohci_soft_td_t *p, *n;
   2344 	ohci_physaddr_t headp;
   2345 	int hit;
   2346 	int wake;
   2347 
   2348 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   2349 	DPRINTF("xfer=%p pipe=%p sed=%p", xfer, opipe,sed, 0);
   2350 
   2351 	KASSERT(mutex_owned(&sc->sc_lock));
   2352 	ASSERT_SLEEPABLE();
   2353 
   2354 	if (sc->sc_dying) {
   2355 		/* If we're dying, just do the software part. */
   2356 		xfer->ux_status = status;	/* make software ignore it */
   2357 		callout_halt(&xfer->ux_callout, &sc->sc_lock);
   2358 		usb_transfer_complete(xfer);
   2359 		return;
   2360 	}
   2361 
   2362 	/*
   2363 	 * If an abort is already in progress then just wait for it to
   2364 	 * complete and return.
   2365 	 */
   2366 	if (xfer->ux_hcflags & UXFER_ABORTING) {
   2367 		DPRINTFN(2, "already aborting", 0, 0, 0, 0);
   2368 #ifdef DIAGNOSTIC
   2369 		if (status == USBD_TIMEOUT)
   2370 			printf("%s: TIMEOUT while aborting\n", __func__);
   2371 #endif
   2372 		/* Override the status which might be USBD_TIMEOUT. */
   2373 		xfer->ux_status = status;
   2374 		DPRINTFN(2, "waiting for abort to finish", 0, 0, 0, 0);
   2375 		xfer->ux_hcflags |= UXFER_ABORTWAIT;
   2376 		while (xfer->ux_hcflags & UXFER_ABORTING)
   2377 			cv_wait(&xfer->ux_hccv, &sc->sc_lock);
   2378 		goto done;
   2379 	}
   2380 	xfer->ux_hcflags |= UXFER_ABORTING;
   2381 
   2382 	/*
   2383 	 * Step 1: Make interrupt routine and hardware ignore xfer.
   2384 	 */
   2385 	xfer->ux_status = status;	/* make software ignore it */
   2386 	callout_stop(&xfer->ux_callout);
   2387 	DPRINTFN(1, "stop ed=%p", sed, 0, 0, 0);
   2388 	usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
   2389 	    sizeof(sed->ed.ed_flags),
   2390 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   2391 	sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */
   2392 	usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
   2393 	    sizeof(sed->ed.ed_flags),
   2394 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2395 
   2396 	/*
   2397 	 * Step 2: Wait until we know hardware has finished any possible
   2398 	 * use of the xfer.  Also make sure the soft interrupt routine
   2399 	 * has run.
   2400 	 */
   2401 	/* Hardware finishes in 1ms */
   2402 	usb_delay_ms_locked(opipe->pipe.up_dev->ud_bus, 20, &sc->sc_lock);
   2403 	sc->sc_softwake = 1;
   2404 	usb_schedsoftintr(&sc->sc_bus);
   2405 	cv_wait(&sc->sc_softwake_cv, &sc->sc_lock);
   2406 
   2407 	/*
   2408 	 * Step 3: Remove any vestiges of the xfer from the hardware.
   2409 	 * The complication here is that the hardware may have executed
   2410 	 * beyond the xfer we're trying to abort.  So as we're scanning
   2411 	 * the TDs of this xfer we check if the hardware points to
   2412 	 * any of them.
   2413 	 */
   2414 	p = xfer->ux_hcpriv;
   2415 	KASSERT(p);
   2416 
   2417 #ifdef OHCI_DEBUG
   2418 	DPRINTF("--- dump start ---", 0, 0, 0, 0);
   2419 
   2420 	if (ohcidebug >= 2) {
   2421 		DPRINTF("sed:", 0, 0, 0, 0);
   2422 		ohci_dump_ed(sc, sed);
   2423 		ohci_dump_tds(sc, p);
   2424 	}
   2425 	DPRINTF("--- dump end ---", 0, 0, 0, 0);
   2426 #endif
   2427 	headp = O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK;
   2428 	hit = 0;
   2429 	for (; p->xfer == xfer; p = n) {
   2430 		hit |= headp == p->physaddr;
   2431 		n = p->nexttd;
   2432 		ohci_hash_rem_td(sc, p);
   2433 	}
   2434 	/* Zap headp register if hardware pointed inside the xfer. */
   2435 	if (hit) {
   2436 		DPRINTFN(1, "set hd=0x%08x, tl=0x%08x",  (int)p->physaddr,
   2437 		    (int)O32TOH(sed->ed.ed_tailp), 0, 0);
   2438 		sed->ed.ed_headp = HTOO32(p->physaddr); /* unlink TDs */
   2439 		usb_syncmem(&sed->dma,
   2440 		    sed->offs + offsetof(ohci_ed_t, ed_headp),
   2441 		    sizeof(sed->ed.ed_headp),
   2442 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2443 	} else {
   2444 		DPRINTFN(1, "no hit", 0, 0, 0, 0);
   2445 	}
   2446 
   2447 	/*
   2448 	 * Step 4: Turn on hardware again.
   2449 	 */
   2450 	usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
   2451 	    sizeof(sed->ed.ed_flags),
   2452 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   2453 	sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */
   2454 	usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
   2455 	    sizeof(sed->ed.ed_flags),
   2456 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2457 
   2458 	/*
   2459 	 * Step 5: Execute callback.
   2460 	 */
   2461 	wake = xfer->ux_hcflags & UXFER_ABORTWAIT;
   2462 	xfer->ux_hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT);
   2463 	usb_transfer_complete(xfer);
   2464 	if (wake)
   2465 		cv_broadcast(&xfer->ux_hccv);
   2466 
   2467 done:
   2468 	KASSERT(mutex_owned(&sc->sc_lock));
   2469 }
   2470 
   2471 /*
   2472  * Data structures and routines to emulate the root hub.
   2473  */
   2474 Static int
   2475 ohci_roothub_ctrl(struct usbd_bus *bus, usb_device_request_t *req,
   2476     void *buf, int buflen)
   2477 {
   2478 	ohci_softc_t *sc = OHCI_BUS2SC(bus);
   2479 	usb_port_status_t ps;
   2480 	uint16_t len, value, index;
   2481 	int l, totlen = 0;
   2482 	int port, i;
   2483 	uint32_t v;
   2484 
   2485 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   2486 
   2487 	if (sc->sc_dying)
   2488 		return -1;
   2489 
   2490 	DPRINTFN(4, "type=0x%02x request=%02x", req->bmRequestType,
   2491 	    req->bRequest, 0, 0);
   2492 
   2493 	len = UGETW(req->wLength);
   2494 	value = UGETW(req->wValue);
   2495 	index = UGETW(req->wIndex);
   2496 
   2497 #define C(x,y) ((x) | ((y) << 8))
   2498 	switch (C(req->bRequest, req->bmRequestType)) {
   2499 	case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
   2500 		DPRINTFN(8, "wValue=0x%04x", value, 0, 0, 0);
   2501 		if (len == 0)
   2502 			break;
   2503 		switch (value) {
   2504 		case C(0, UDESC_DEVICE): {
   2505 			usb_device_descriptor_t devd;
   2506 
   2507 			totlen = min(buflen, sizeof(devd));
   2508 			memcpy(&devd, buf, totlen);
   2509 			USETW(devd.idVendor, sc->sc_id_vendor);
   2510 			memcpy(buf, &devd, totlen);
   2511 			break;
   2512 		}
   2513 		case C(1, UDESC_STRING):
   2514 #define sd ((usb_string_descriptor_t *)buf)
   2515 			/* Vendor */
   2516 			totlen = usb_makestrdesc(sd, len, sc->sc_vendor);
   2517 			break;
   2518 		case C(2, UDESC_STRING):
   2519 			/* Product */
   2520 			totlen = usb_makestrdesc(sd, len, "OHCI root hub");
   2521 			break;
   2522 #undef sd
   2523 		default:
   2524 			/* default from usbroothub */
   2525 			return buflen;
   2526 		}
   2527 		break;
   2528 
   2529 	/* Hub requests */
   2530 	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
   2531 		break;
   2532 	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
   2533 		DPRINTFN(8, "UR_CLEAR_PORT_FEATURE port=%d feature=%d",
   2534 		    index, value, 0, 0);
   2535 		if (index < 1 || index > sc->sc_noport) {
   2536 			return -1;
   2537 		}
   2538 		port = OHCI_RH_PORT_STATUS(index);
   2539 		switch(value) {
   2540 		case UHF_PORT_ENABLE:
   2541 			OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS);
   2542 			break;
   2543 		case UHF_PORT_SUSPEND:
   2544 			OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR);
   2545 			break;
   2546 		case UHF_PORT_POWER:
   2547 			/* Yes, writing to the LOW_SPEED bit clears power. */
   2548 			OWRITE4(sc, port, UPS_LOW_SPEED);
   2549 			break;
   2550 		case UHF_C_PORT_CONNECTION:
   2551 			OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16);
   2552 			break;
   2553 		case UHF_C_PORT_ENABLE:
   2554 			OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16);
   2555 			break;
   2556 		case UHF_C_PORT_SUSPEND:
   2557 			OWRITE4(sc, port, UPS_C_SUSPEND << 16);
   2558 			break;
   2559 		case UHF_C_PORT_OVER_CURRENT:
   2560 			OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16);
   2561 			break;
   2562 		case UHF_C_PORT_RESET:
   2563 			OWRITE4(sc, port, UPS_C_PORT_RESET << 16);
   2564 			break;
   2565 		default:
   2566 			return -1;
   2567 		}
   2568 		switch(value) {
   2569 		case UHF_C_PORT_CONNECTION:
   2570 		case UHF_C_PORT_ENABLE:
   2571 		case UHF_C_PORT_SUSPEND:
   2572 		case UHF_C_PORT_OVER_CURRENT:
   2573 		case UHF_C_PORT_RESET:
   2574 			/* Enable RHSC interrupt if condition is cleared. */
   2575 			if ((OREAD4(sc, port) >> 16) == 0)
   2576 				ohci_rhsc_enable(sc);
   2577 			break;
   2578 		default:
   2579 			break;
   2580 		}
   2581 		break;
   2582 	case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
   2583 		if (len == 0)
   2584 			break;
   2585 		if ((value & 0xff) != 0) {
   2586 			return -1;
   2587 		}
   2588 		usb_hub_descriptor_t hubd;
   2589 
   2590 		totlen = min(buflen, sizeof(hubd));
   2591 		memcpy(&hubd, buf, totlen);
   2592 
   2593 		v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
   2594 		hubd.bNbrPorts = sc->sc_noport;
   2595 		USETW(hubd.wHubCharacteristics,
   2596 		      (v & OHCI_NPS ? UHD_PWR_NO_SWITCH :
   2597 		       v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL)
   2598 		      /* XXX overcurrent */
   2599 		      );
   2600 		hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v);
   2601 		v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
   2602 		for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
   2603 			hubd.DeviceRemovable[i++] = (uint8_t)v;
   2604 		hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
   2605 		totlen = min(totlen, hubd.bDescLength);
   2606 		memcpy(buf, &hubd, totlen);
   2607 		break;
   2608 	case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
   2609 		if (len != 4) {
   2610 			return -1;
   2611 		}
   2612 		memset(buf, 0, len); /* ? XXX */
   2613 		totlen = len;
   2614 		break;
   2615 	case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
   2616 		DPRINTFN(8, "get port status i=%d", index, 0, 0, 0);
   2617 		if (index < 1 || index > sc->sc_noport) {
   2618 			return -1;
   2619 		}
   2620 		if (len != 4) {
   2621 			return -1;
   2622 			}
   2623 		v = OREAD4(sc, OHCI_RH_PORT_STATUS(index));
   2624 		DPRINTFN(8, "port status=0x%04x", v, 0, 0, 0);
   2625 		USETW(ps.wPortStatus, v);
   2626 		USETW(ps.wPortChange, v >> 16);
   2627 		totlen = min(len, sizeof(ps));
   2628 		memcpy(buf, &ps, totlen);
   2629 		break;
   2630 	case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
   2631 		return -1;
   2632 	case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
   2633 		break;
   2634 	case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
   2635 		if (index < 1 || index > sc->sc_noport) {
   2636 			return -1;
   2637 		}
   2638 		port = OHCI_RH_PORT_STATUS(index);
   2639 		switch(value) {
   2640 		case UHF_PORT_ENABLE:
   2641 			OWRITE4(sc, port, UPS_PORT_ENABLED);
   2642 			break;
   2643 		case UHF_PORT_SUSPEND:
   2644 			OWRITE4(sc, port, UPS_SUSPEND);
   2645 			break;
   2646 		case UHF_PORT_RESET:
   2647 			DPRINTFN(5, "reset port %d", index, 0, 0, 0);
   2648 			OWRITE4(sc, port, UPS_RESET);
   2649 			for (i = 0; i < 5; i++) {
   2650 				usb_delay_ms(&sc->sc_bus,
   2651 					     USB_PORT_ROOT_RESET_DELAY);
   2652 				if (sc->sc_dying) {
   2653 					return -1;
   2654 				}
   2655 				if ((OREAD4(sc, port) & UPS_RESET) == 0)
   2656 					break;
   2657 			}
   2658 			DPRINTFN(8, "port %d reset, status = 0x%04x", index,
   2659 			    OREAD4(sc, port), 0, 0);
   2660 			break;
   2661 		case UHF_PORT_POWER:
   2662 			DPRINTFN(2, "set port power %d", index, 0, 0, 0);
   2663 			OWRITE4(sc, port, UPS_PORT_POWER);
   2664 			break;
   2665 		default:
   2666 			return -1;
   2667 		}
   2668 		break;
   2669 	default:
   2670 		/* default from usbroothub */
   2671 		return buflen;
   2672 	}
   2673 
   2674 	return totlen;
   2675 }
   2676 
   2677 Static usbd_status
   2678 ohci_root_intr_transfer(struct usbd_xfer *xfer)
   2679 {
   2680 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   2681 	usbd_status err;
   2682 
   2683 	/* Insert last in queue. */
   2684 	mutex_enter(&sc->sc_lock);
   2685 	err = usb_insert_transfer(xfer);
   2686 	mutex_exit(&sc->sc_lock);
   2687 	if (err)
   2688 		return err;
   2689 
   2690 	/* Pipe isn't running, start first */
   2691 	return ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue));
   2692 }
   2693 
   2694 Static usbd_status
   2695 ohci_root_intr_start(struct usbd_xfer *xfer)
   2696 {
   2697 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   2698 
   2699 	if (sc->sc_dying)
   2700 		return USBD_IOERROR;
   2701 
   2702 	mutex_enter(&sc->sc_lock);
   2703 	KASSERT(sc->sc_intrxfer == NULL);
   2704 	sc->sc_intrxfer = xfer;
   2705 	mutex_exit(&sc->sc_lock);
   2706 
   2707 	return USBD_IN_PROGRESS;
   2708 }
   2709 
   2710 /* Abort a root interrupt request. */
   2711 Static void
   2712 ohci_root_intr_abort(struct usbd_xfer *xfer)
   2713 {
   2714 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   2715 
   2716 	KASSERT(mutex_owned(&sc->sc_lock));
   2717 	KASSERT(xfer->ux_pipe->up_intrxfer == xfer);
   2718 
   2719 	sc->sc_intrxfer = NULL;
   2720 
   2721 	xfer->ux_status = USBD_CANCELLED;
   2722 	usb_transfer_complete(xfer);
   2723 }
   2724 
   2725 /* Close the root pipe. */
   2726 Static void
   2727 ohci_root_intr_close(struct usbd_pipe *pipe)
   2728 {
   2729 	ohci_softc_t *sc = OHCI_PIPE2SC(pipe);
   2730 
   2731 	KASSERT(mutex_owned(&sc->sc_lock));
   2732 
   2733 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   2734 
   2735 	sc->sc_intrxfer = NULL;
   2736 }
   2737 
   2738 /************************/
   2739 
   2740 int
   2741 ohci_device_ctrl_init(struct usbd_xfer *xfer)
   2742 {
   2743 	struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer);
   2744 	usb_device_request_t *req = &xfer->ux_request;
   2745 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   2746 	ohci_soft_td_t *stat, *setup;
   2747 	int isread = req->bmRequestType & UT_READ;
   2748 	int len = xfer->ux_bufsize;
   2749 	int err = ENOMEM;
   2750 
   2751 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   2752 
   2753 	setup = ohci_alloc_std(sc);
   2754 	if (setup == NULL) {
   2755 		goto bad1;
   2756 	}
   2757 	stat = ohci_alloc_std(sc);
   2758 	if (stat == NULL) {
   2759 		goto bad2;
   2760 	}
   2761 
   2762 	ox->ox_setup = setup;
   2763 	ox->ox_stat = stat;
   2764 	ox->ox_nstd = 0;
   2765 
   2766 	/* Set up data transaction */
   2767 	if (len != 0) {
   2768 		err = ohci_alloc_std_chain(sc, xfer, len, isread);
   2769 		if (err) {
   2770 			goto bad3;
   2771 		}
   2772 	}
   2773 	return 0;
   2774 
   2775  bad3:
   2776 	ohci_free_std(sc, stat);
   2777  bad2:
   2778 	ohci_free_std(sc, setup);
   2779  bad1:
   2780 	return err;
   2781 }
   2782 
   2783 void
   2784 ohci_device_ctrl_fini(struct usbd_xfer *xfer)
   2785 {
   2786 	struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer);
   2787 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   2788 	struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe);
   2789 
   2790 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   2791 	DPRINTFN(8, "xfer %p nstd %d", xfer, ox->ox_nstd, 0, 0);
   2792 
   2793 	mutex_enter(&sc->sc_lock);
   2794 	if (ox->ox_setup != opipe->tail.td) {
   2795 		ohci_free_std_locked(sc, ox->ox_setup);
   2796 	}
   2797 	for (size_t i = 0; i < ox->ox_nstd; i++) {
   2798 		ohci_soft_td_t *std = ox->ox_stds[i];
   2799 		if (std == NULL)
   2800 			break;
   2801 		ohci_free_std_locked(sc, std);
   2802 	}
   2803 	ohci_free_std_locked(sc, ox->ox_stat);
   2804 	mutex_exit(&sc->sc_lock);
   2805 
   2806 	if (ox->ox_nstd) {
   2807 		const size_t sz = sizeof(ohci_soft_td_t *) * ox->ox_nstd;
   2808 		kmem_free(ox->ox_stds, sz);
   2809 	}
   2810 }
   2811 
   2812 Static usbd_status
   2813 ohci_device_ctrl_transfer(struct usbd_xfer *xfer)
   2814 {
   2815 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   2816 	usbd_status err;
   2817 
   2818 	/* Insert last in queue. */
   2819 	mutex_enter(&sc->sc_lock);
   2820 	err = usb_insert_transfer(xfer);
   2821 	mutex_exit(&sc->sc_lock);
   2822 	if (err)
   2823 		return err;
   2824 
   2825 	/* Pipe isn't running, start first */
   2826 	return ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue));
   2827 }
   2828 
   2829 Static usbd_status
   2830 ohci_device_ctrl_start(struct usbd_xfer *xfer)
   2831 {
   2832 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   2833 	struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer);
   2834 	struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe);
   2835 	usb_device_request_t *req = &xfer->ux_request;
   2836 	struct usbd_device *dev __diagused = opipe->pipe.up_dev;
   2837 	ohci_soft_td_t *setup, *stat, *next, *tail;
   2838 	ohci_soft_ed_t *sed;
   2839 	int isread;
   2840 	int len;
   2841 
   2842 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   2843 
   2844 	if (sc->sc_dying)
   2845 		return USBD_IOERROR;
   2846 
   2847 	KASSERT(xfer->ux_rqflags & URQ_REQUEST);
   2848 
   2849 	isread = req->bmRequestType & UT_READ;
   2850 	len = UGETW(req->wLength);
   2851 
   2852 	DPRINTF("xfer=%p len=%d, addr=%d, endpt=%d", xfer, len, dev->ud_addr,
   2853 	    opipe->pipe.up_endpoint->ue_edesc->bEndpointAddress);
   2854 	DPRINTF("type=0x%02x, request=0x%02x, wValue=0x%04x, wIndex=0x%04x",
   2855 	    req->bmRequestType, req->bRequest, UGETW(req->wValue),
   2856 	    UGETW(req->wIndex));
   2857 
   2858 	/* Need to take lock here for pipe->tail.td */
   2859 	mutex_enter(&sc->sc_lock);
   2860 
   2861 	/*
   2862 	 * Use the pipe "tail" TD as our first and loan our first TD to the
   2863 	 * next transfer
   2864 	 */
   2865 	setup = opipe->tail.td;
   2866 	opipe->tail.td = ox->ox_setup;
   2867 	ox->ox_setup = setup;
   2868 
   2869 	stat = ox->ox_stat;
   2870 
   2871 	/* point at sentinel */
   2872 	tail = opipe->tail.td;
   2873 	sed = opipe->sed;
   2874 
   2875 	KASSERTMSG(OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)) == dev->ud_addr,
   2876 	    "address ED %d pipe %d\n",
   2877 	    OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)), dev->ud_addr);
   2878 	KASSERTMSG(OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)) ==
   2879 	    UGETW(opipe->pipe.up_endpoint->ue_edesc->wMaxPacketSize),
   2880 	    "MPL ED %d pipe %d\n",
   2881 	    OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)),
   2882 	    UGETW(opipe->pipe.up_endpoint->ue_edesc->wMaxPacketSize));
   2883 
   2884 	/* next will point to data if len != 0 */
   2885 	next = stat;
   2886 
   2887 	/* Set up data transaction */
   2888 	if (len != 0) {
   2889 		ohci_soft_td_t *std;
   2890 		ohci_soft_td_t *end;
   2891 
   2892 		next = ox->ox_stds[0];
   2893 		ohci_reset_std_chain(sc, xfer, len, isread, next, &end);
   2894 
   2895 		end->td.td_nexttd = HTOO32(stat->physaddr);
   2896 		end->nexttd = stat;
   2897 
   2898 		usb_syncmem(&end->dma,
   2899 		    end->offs + offsetof(ohci_td_t, td_nexttd),
   2900 		    sizeof(end->td.td_nexttd),
   2901 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2902 
   2903 		usb_syncmem(&xfer->ux_dmabuf, 0, len,
   2904 		    isread ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
   2905 		std = ox->ox_stds[0];
   2906 		/* Start toggle at 1 and then use the carried toggle. */
   2907 		std->td.td_flags &= HTOO32(~OHCI_TD_TOGGLE_MASK);
   2908 		std->td.td_flags |= HTOO32(OHCI_TD_TOGGLE_1);
   2909 		usb_syncmem(&std->dma,
   2910 		    std->offs + offsetof(ohci_td_t, td_flags),
   2911 		    sizeof(std->td.td_flags),
   2912 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2913 	}
   2914 
   2915 	DPRINTFN(8, "setup %p data %p stat %p tail %p", setup,
   2916 	    (len != 0 ? ox->ox_stds[0] : NULL), stat, tail);
   2917 	KASSERT(opipe->tail.td == tail);
   2918 
   2919 	memcpy(KERNADDR(&opipe->ctrl.reqdma, 0), req, sizeof(*req));
   2920 	usb_syncmem(&opipe->ctrl.reqdma, 0, sizeof(*req), BUS_DMASYNC_PREWRITE);
   2921 
   2922 	setup->td.td_flags = HTOO32(OHCI_TD_SETUP | OHCI_TD_NOCC |
   2923 				     OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR);
   2924 	setup->td.td_cbp = HTOO32(DMAADDR(&opipe->ctrl.reqdma, 0));
   2925 	setup->td.td_nexttd = HTOO32(next->physaddr);
   2926 	setup->td.td_be = HTOO32(O32TOH(setup->td.td_cbp) + sizeof(*req) - 1);
   2927 	setup->nexttd = next;
   2928 	setup->len = 0;
   2929 	setup->xfer = xfer;
   2930 	setup->flags = 0;
   2931 	ohci_hash_add_td(sc, setup);
   2932 
   2933 	xfer->ux_hcpriv = setup;
   2934 	usb_syncmem(&setup->dma, setup->offs, sizeof(setup->td),
   2935 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2936 
   2937 	stat->td.td_flags = HTOO32(
   2938 		(isread ? OHCI_TD_OUT : OHCI_TD_IN) |
   2939 		OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1));
   2940 	stat->td.td_cbp = 0;
   2941 	stat->td.td_nexttd = HTOO32(tail->physaddr);
   2942 	stat->td.td_be = 0;
   2943 	stat->nexttd = tail;
   2944 	stat->flags = OHCI_CALL_DONE;
   2945 	stat->len = 0;
   2946 	stat->xfer = xfer;
   2947 	ohci_hash_add_td(sc, stat);
   2948 
   2949 	usb_syncmem(&stat->dma, stat->offs, sizeof(stat->td),
   2950 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2951 
   2952 	memset(&tail->td, 0, sizeof(tail->td));
   2953 	tail->nexttd = NULL;
   2954 	tail->xfer = NULL;
   2955 
   2956 	usb_syncmem(&tail->dma, tail->offs, sizeof(tail->td),
   2957 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2958 
   2959 #ifdef OHCI_DEBUG
   2960 	USBHIST_LOGN(ohcidebug, 5, "--- dump start ---", 0, 0, 0, 0);
   2961 	if (ohcidebug >= 5) {
   2962 		ohci_dump_ed(sc, sed);
   2963 		ohci_dump_tds(sc, setup);
   2964 	}
   2965 	USBHIST_LOGN(ohcidebug, 5, "--- dump end ---", 0, 0, 0, 0);
   2966 #endif
   2967 
   2968 	/* Insert ED in schedule */
   2969 	sed->ed.ed_tailp = HTOO32(tail->physaddr);
   2970 	usb_syncmem(&sed->dma,
   2971 	    sed->offs + offsetof(ohci_ed_t, ed_tailp),
   2972 	    sizeof(sed->ed.ed_tailp),
   2973 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2974 	OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
   2975 	if (xfer->ux_timeout && !sc->sc_bus.ub_usepolling) {
   2976 		callout_reset(&xfer->ux_callout, mstohz(xfer->ux_timeout),
   2977 			    ohci_timeout, xfer);
   2978 	}
   2979 
   2980 	DPRINTF("done", 0, 0, 0, 0);
   2981 
   2982 	mutex_exit(&sc->sc_lock);
   2983 
   2984 	if (sc->sc_bus.ub_usepolling)
   2985 		ohci_waitintr(sc, xfer);
   2986 
   2987 	return USBD_IN_PROGRESS;
   2988 }
   2989 
   2990 /* Abort a device control request. */
   2991 Static void
   2992 ohci_device_ctrl_abort(struct usbd_xfer *xfer)
   2993 {
   2994 	ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer);
   2995 
   2996 	KASSERT(mutex_owned(&sc->sc_lock));
   2997 
   2998 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   2999 	DPRINTF("xfer=%p", xfer, 0, 0, 0);
   3000 	ohci_abort_xfer(xfer, USBD_CANCELLED);
   3001 }
   3002 
   3003 /* Close a device control pipe. */
   3004 Static void
   3005 ohci_device_ctrl_close(struct usbd_pipe *pipe)
   3006 {
   3007 	struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe);
   3008 	ohci_softc_t *sc = OHCI_PIPE2SC(pipe);
   3009 
   3010 	KASSERT(mutex_owned(&sc->sc_lock));
   3011 
   3012 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   3013 	DPRINTF("pipe=%p", pipe, 0, 0, 0);
   3014 	ohci_close_pipe(pipe, sc->sc_ctrl_head);
   3015 	ohci_free_std_locked(sc, opipe->tail.td);
   3016 }
   3017 
   3018 /************************/
   3019 
   3020 Static void
   3021 ohci_device_clear_toggle(struct usbd_pipe *pipe)
   3022 {
   3023 	struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe);
   3024 	ohci_softc_t *sc = OHCI_PIPE2SC(pipe);
   3025 
   3026 	opipe->sed->ed.ed_headp &= HTOO32(~OHCI_TOGGLECARRY);
   3027 }
   3028 
   3029 Static void
   3030 ohci_noop(struct usbd_pipe *pipe)
   3031 {
   3032 }
   3033 
   3034 Static int
   3035 ohci_device_bulk_init(struct usbd_xfer *xfer)
   3036 {
   3037 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   3038 	int len = xfer->ux_bufsize;
   3039 	int endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress;;
   3040 	int isread = UE_GET_DIR(endpt) == UE_DIR_IN;
   3041 	int err;
   3042 
   3043 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   3044 
   3045 	KASSERT(!(xfer->ux_rqflags & URQ_REQUEST));
   3046 
   3047 	DPRINTFN(4, "xfer=%p len=%d isread=%d flags=%d", xfer, len, isread,
   3048 	    xfer->ux_flags);
   3049 	DPRINTFN(4, "endpt=%d", endpt, 0, 0, 0);
   3050 
   3051 	/* Allocate a chain of new TDs (including a new tail). */
   3052 	err = ohci_alloc_std_chain(sc, xfer, len, isread);
   3053 	if (err)
   3054 		return err;
   3055 
   3056 	return 0;
   3057 }
   3058 
   3059 Static void
   3060 ohci_device_bulk_fini(struct usbd_xfer *xfer)
   3061 {
   3062 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   3063 	struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer);
   3064 	struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe);
   3065 
   3066 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   3067 	DPRINTFN(8, "xfer %p nstd %d", xfer, ox->ox_nstd, 0, 0);
   3068 
   3069 	mutex_enter(&sc->sc_lock);
   3070 	for (size_t i = 0; i < ox->ox_nstd; i++) {
   3071 		ohci_soft_td_t *std = ox->ox_stds[i];
   3072 		if (std == NULL)
   3073 			break;
   3074 		if (std != opipe->tail.td)
   3075 			ohci_free_std_locked(sc, std);
   3076 	}
   3077 	mutex_exit(&sc->sc_lock);
   3078 
   3079 	if (ox->ox_nstd) {
   3080 		const size_t sz = sizeof(ohci_soft_td_t *) * ox->ox_nstd;
   3081 		kmem_free(ox->ox_stds, sz);
   3082 	}
   3083 }
   3084 
   3085 Static usbd_status
   3086 ohci_device_bulk_transfer(struct usbd_xfer *xfer)
   3087 {
   3088 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   3089 	usbd_status err;
   3090 
   3091 	/* Insert last in queue. */
   3092 	mutex_enter(&sc->sc_lock);
   3093 	err = usb_insert_transfer(xfer);
   3094 	mutex_exit(&sc->sc_lock);
   3095 	if (err)
   3096 		return err;
   3097 
   3098 	/* Pipe isn't running, start first */
   3099 	return ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue));
   3100 }
   3101 
   3102 Static usbd_status
   3103 ohci_device_bulk_start(struct usbd_xfer *xfer)
   3104 {
   3105 	struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer);
   3106 	struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe);
   3107 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   3108 	ohci_soft_td_t *last;
   3109 	ohci_soft_td_t *data, *tail, *tdp;
   3110 	ohci_soft_ed_t *sed;
   3111 	int len, isread, endpt;
   3112 
   3113 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   3114 
   3115 	if (sc->sc_dying)
   3116 		return USBD_IOERROR;
   3117 
   3118 	KASSERT(!(xfer->ux_rqflags & URQ_REQUEST));
   3119 
   3120 	len = xfer->ux_length;
   3121 	endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress;
   3122 	isread = UE_GET_DIR(endpt) == UE_DIR_IN;
   3123 	sed = opipe->sed;
   3124 
   3125 	DPRINTFN(4, "xfer=%p len=%d isread=%d flags=%d", xfer, len, isread,
   3126 	    xfer->ux_flags);
   3127 	DPRINTFN(4, "endpt=%d", endpt, 0, 0, 0);
   3128 
   3129 	mutex_enter(&sc->sc_lock);
   3130 
   3131 	/*
   3132 	 * Use the pipe "tail" TD as our first and loan our first TD to the
   3133 	 * next transfer
   3134 	 */
   3135 	data = opipe->tail.td;
   3136 	opipe->tail.td = ox->ox_stds[0];
   3137 	ox->ox_stds[0] = data;
   3138 	ohci_reset_std_chain(sc, xfer, len, isread, data, &last);
   3139 
   3140 	/* point at sentinel */
   3141 	tail = opipe->tail.td;
   3142 	memset(&tail->td, 0, sizeof(tail->td));
   3143 	tail->nexttd = NULL;
   3144 	tail->xfer = NULL;
   3145 	usb_syncmem(&tail->dma, tail->offs, sizeof(tail->td),
   3146 	    BUS_DMASYNC_PREWRITE);
   3147 	xfer->ux_hcpriv = data;
   3148 
   3149 	DPRINTFN(8, "xfer %p data %p tail %p", xfer, ox->ox_stds[0], tail, 0);
   3150 	KASSERT(opipe->tail.td == tail);
   3151 
   3152 	/* We want interrupt at the end of the transfer. */
   3153 	last->td.td_flags &= HTOO32(~OHCI_TD_INTR_MASK);
   3154 	last->td.td_flags |= HTOO32(OHCI_TD_SET_DI(1));
   3155 
   3156 	last->td.td_nexttd = HTOO32(tail->physaddr);
   3157 	last->nexttd = tail;
   3158 	last->flags |= OHCI_CALL_DONE;
   3159 	usb_syncmem(&last->dma, last->offs, sizeof(last->td),
   3160 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3161 
   3162 	DPRINTFN(4, "ed_flags=0x%08x td_flags=0x%08x "
   3163 		    "td_cbp=0x%08x td_be=0x%08x",
   3164 		    (int)O32TOH(sed->ed.ed_flags),
   3165 		    (int)O32TOH(data->td.td_flags),
   3166 		    (int)O32TOH(data->td.td_cbp),
   3167 		    (int)O32TOH(data->td.td_be));
   3168 
   3169 #ifdef OHCI_DEBUG
   3170 	DPRINTFN(5, "--- dump start ---", 0, 0, 0, 0);
   3171 	if (ohcidebug >= 5) {
   3172 		ohci_dump_ed(sc, sed);
   3173 		ohci_dump_tds(sc, data);
   3174 	}
   3175 	DPRINTFN(5, "--- dump end ---", 0, 0, 0, 0);
   3176 #endif
   3177 
   3178 	/* Insert ED in schedule */
   3179 	for (tdp = data; tdp != tail; tdp = tdp->nexttd) {
   3180 		KASSERT(tdp->xfer == xfer);
   3181 	}
   3182 	usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
   3183 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   3184 	sed->ed.ed_tailp = HTOO32(tail->physaddr);
   3185 	sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP);
   3186 	usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
   3187 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3188 	OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
   3189 	if (xfer->ux_timeout && !sc->sc_bus.ub_usepolling) {
   3190 		callout_reset(&xfer->ux_callout, mstohz(xfer->ux_timeout),
   3191 			    ohci_timeout, xfer);
   3192 	}
   3193 	mutex_exit(&sc->sc_lock);
   3194 
   3195 	return USBD_IN_PROGRESS;
   3196 }
   3197 
   3198 Static void
   3199 ohci_device_bulk_abort(struct usbd_xfer *xfer)
   3200 {
   3201 	ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer);
   3202 
   3203 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   3204 
   3205 	KASSERT(mutex_owned(&sc->sc_lock));
   3206 
   3207 	DPRINTF("xfer=%p", xfer, 0, 0, 0);
   3208 	ohci_abort_xfer(xfer, USBD_CANCELLED);
   3209 }
   3210 
   3211 /*
   3212  * Close a device bulk pipe.
   3213  */
   3214 Static void
   3215 ohci_device_bulk_close(struct usbd_pipe *pipe)
   3216 {
   3217 	struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe);
   3218 	ohci_softc_t *sc = OHCI_PIPE2SC(pipe);
   3219 
   3220 	KASSERT(mutex_owned(&sc->sc_lock));
   3221 
   3222 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   3223 
   3224 	DPRINTF("pipe=%p", pipe, 0, 0, 0);
   3225 	ohci_close_pipe(pipe, sc->sc_bulk_head);
   3226 	ohci_free_std_locked(sc, opipe->tail.td);
   3227 }
   3228 
   3229 /************************/
   3230 
   3231 Static int
   3232 ohci_device_intr_init(struct usbd_xfer *xfer)
   3233 {
   3234 	struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer);
   3235 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   3236 	int len = xfer->ux_bufsize;
   3237 	int endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress;;
   3238 	int isread = UE_GET_DIR(endpt) == UE_DIR_IN;
   3239 	int err;
   3240 
   3241 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   3242 
   3243 	KASSERT(!(xfer->ux_rqflags & URQ_REQUEST));
   3244 	KASSERT(len != 0);
   3245 
   3246 	DPRINTFN(4, "xfer=%p len=%d isread=%d flags=%d", xfer, len, isread,
   3247 	    xfer->ux_flags);
   3248 	DPRINTFN(4, "endpt=%d", endpt, 0, 0, 0);
   3249 
   3250 	ox->ox_nstd = 0;
   3251 
   3252 	err = ohci_alloc_std_chain(sc, xfer, len, isread);
   3253 	if (err) {
   3254 		return err;
   3255 	}
   3256 
   3257 	return 0;
   3258 }
   3259 
   3260 Static void
   3261 ohci_device_intr_fini(struct usbd_xfer *xfer)
   3262 {
   3263 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   3264 	struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer);
   3265 	struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe);
   3266 
   3267 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   3268 	DPRINTFN(8, "xfer %p nstd %d", xfer, ox->ox_nstd, 0, 0);
   3269 
   3270 	mutex_enter(&sc->sc_lock);
   3271 	for (size_t i = 0; i < ox->ox_nstd; i++) {
   3272 		ohci_soft_td_t *std = ox->ox_stds[i];
   3273 		if (std != NULL)
   3274 			break;
   3275 		if (std != opipe->tail.td)
   3276 			ohci_free_std_locked(sc, std);
   3277 	}
   3278 	mutex_exit(&sc->sc_lock);
   3279 
   3280 	if (ox->ox_nstd) {
   3281 		const size_t sz = sizeof(ohci_soft_td_t *) * ox->ox_nstd;
   3282 		kmem_free(ox->ox_stds, sz);
   3283 	}
   3284 }
   3285 
   3286 Static usbd_status
   3287 ohci_device_intr_transfer(struct usbd_xfer *xfer)
   3288 {
   3289 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   3290 	usbd_status err;
   3291 
   3292 	/* Insert last in queue. */
   3293 	mutex_enter(&sc->sc_lock);
   3294 	err = usb_insert_transfer(xfer);
   3295 	mutex_exit(&sc->sc_lock);
   3296 	if (err)
   3297 		return err;
   3298 
   3299 	/* Pipe isn't running, start first */
   3300 	return ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue));
   3301 }
   3302 
   3303 Static usbd_status
   3304 ohci_device_intr_start(struct usbd_xfer *xfer)
   3305 {
   3306 	struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer);
   3307 	struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe);
   3308 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   3309 	ohci_soft_ed_t *sed = opipe->sed;
   3310 	ohci_soft_td_t *data, *last, *tail;
   3311 	int len, isread, endpt;
   3312 
   3313 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   3314 
   3315 	if (sc->sc_dying)
   3316 		return USBD_IOERROR;
   3317 
   3318 	DPRINTFN(3, "xfer=%p len=%d flags=%d priv=%p", xfer, xfer->ux_length,
   3319 	    xfer->ux_flags, xfer->ux_priv);
   3320 
   3321 	KASSERT(!(xfer->ux_rqflags & URQ_REQUEST));
   3322 
   3323 	len = xfer->ux_length;
   3324 	endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress;
   3325 	isread = UE_GET_DIR(endpt) == UE_DIR_IN;
   3326 
   3327 	mutex_enter(&sc->sc_lock);
   3328 
   3329 	/*
   3330 	 * Use the pipe "tail" TD as our first and loan our first TD to the
   3331 	 * next transfer.
   3332 	 */
   3333 	data = opipe->tail.td;
   3334 	opipe->tail.td = ox->ox_stds[0];
   3335 	ox->ox_stds[0] = data;
   3336 	ohci_reset_std_chain(sc, xfer, len, isread, data, &last);
   3337 
   3338 	/* point at sentinel */
   3339 	tail = opipe->tail.td;
   3340 	memset(&tail->td, 0, sizeof(tail->td));
   3341 	tail->nexttd = NULL;
   3342 	tail->xfer = NULL;
   3343 	usb_syncmem(&tail->dma, tail->offs, sizeof(tail->td),
   3344 	    BUS_DMASYNC_PREWRITE);
   3345 	xfer->ux_hcpriv = data;
   3346 
   3347 	DPRINTFN(8, "data %p tail %p", ox->ox_stds[0], tail, 0, 0);
   3348 	KASSERT(opipe->tail.td == tail);
   3349 
   3350 	/* We want interrupt at the end of the transfer. */
   3351 	last->td.td_flags &= HTOO32(~OHCI_TD_INTR_MASK);
   3352 	last->td.td_flags |= HTOO32(OHCI_TD_SET_DI(1));
   3353 
   3354 	last->td.td_nexttd = HTOO32(tail->physaddr);
   3355 	last->nexttd = tail;
   3356 	last->flags |= OHCI_CALL_DONE;
   3357 	usb_syncmem(&last->dma, last->offs, sizeof(last->td),
   3358 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3359 
   3360 #ifdef OHCI_DEBUG
   3361 	DPRINTFN(5, "--- dump start ---", 0, 0, 0, 0);
   3362 	if (ohcidebug >= 5) {
   3363 		ohci_dump_ed(sc, sed);
   3364 		ohci_dump_tds(sc, data);
   3365 	}
   3366 	DPRINTFN(5, "--- dump end ---", 0, 0, 0, 0);
   3367 #endif
   3368 
   3369 	/* Insert ED in schedule */
   3370 	usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
   3371 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   3372 	sed->ed.ed_tailp = HTOO32(tail->physaddr);
   3373 	sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP);
   3374 	usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
   3375 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3376 
   3377 	mutex_exit(&sc->sc_lock);
   3378 
   3379 	return USBD_IN_PROGRESS;
   3380 }
   3381 
   3382 /* Abort a device interrupt request. */
   3383 Static void
   3384 ohci_device_intr_abort(struct usbd_xfer *xfer)
   3385 {
   3386 	ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer);
   3387 
   3388 	KASSERT(mutex_owned(&sc->sc_lock));
   3389 	KASSERT(xfer->ux_pipe->up_intrxfer == xfer);
   3390 
   3391 	ohci_abort_xfer(xfer, USBD_CANCELLED);
   3392 }
   3393 
   3394 /* Close a device interrupt pipe. */
   3395 Static void
   3396 ohci_device_intr_close(struct usbd_pipe *pipe)
   3397 {
   3398 	struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe);
   3399 	ohci_softc_t *sc = OHCI_PIPE2SC(pipe);
   3400 	int nslots = opipe->intr.nslots;
   3401 	int pos = opipe->intr.pos;
   3402 	int j;
   3403 	ohci_soft_ed_t *p, *sed = opipe->sed;
   3404 
   3405 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   3406 
   3407 	KASSERT(mutex_owned(&sc->sc_lock));
   3408 
   3409 	DPRINTFN(1, "pipe=%p nslots=%d pos=%d", pipe, nslots, pos, 0);
   3410 	usb_syncmem(&sed->dma, sed->offs,
   3411 	    sizeof(sed->ed), BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   3412 	sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
   3413 	usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
   3414 	    sizeof(sed->ed.ed_flags),
   3415 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3416 	if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
   3417 	    (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK))
   3418 		usb_delay_ms_locked(&sc->sc_bus, 2, &sc->sc_lock);
   3419 
   3420 	for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next)
   3421 		continue;
   3422 	KASSERT(p);
   3423 	p->next = sed->next;
   3424 	p->ed.ed_nexted = sed->ed.ed_nexted;
   3425 	usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted),
   3426 	    sizeof(p->ed.ed_nexted),
   3427 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3428 
   3429 	for (j = 0; j < nslots; j++)
   3430 		--sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS];
   3431 
   3432 	ohci_free_std_locked(sc, opipe->tail.td);
   3433 	ohci_free_sed_locked(sc, opipe->sed);
   3434 }
   3435 
   3436 Static usbd_status
   3437 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival)
   3438 {
   3439 	int i, j, best;
   3440 	u_int npoll, slow, shigh, nslots;
   3441 	u_int bestbw, bw;
   3442 	ohci_soft_ed_t *hsed, *sed = opipe->sed;
   3443 
   3444 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   3445 
   3446 	DPRINTFN(2, "pipe=%p", opipe, 0, 0, 0);
   3447 	if (ival == 0) {
   3448 		printf("ohci_setintr: 0 interval\n");
   3449 		return USBD_INVAL;
   3450 	}
   3451 
   3452 	npoll = OHCI_NO_INTRS;
   3453 	while (npoll > ival)
   3454 		npoll /= 2;
   3455 	DPRINTFN(2, "ival=%d npoll=%d", ival, npoll, 0, 0);
   3456 
   3457 	/*
   3458 	 * We now know which level in the tree the ED must go into.
   3459 	 * Figure out which slot has most bandwidth left over.
   3460 	 * Slots to examine:
   3461 	 * npoll
   3462 	 * 1	0
   3463 	 * 2	1 2
   3464 	 * 4	3 4 5 6
   3465 	 * 8	7 8 9 10 11 12 13 14
   3466 	 * N    (N-1) .. (N-1+N-1)
   3467 	 */
   3468 	slow = npoll-1;
   3469 	shigh = slow + npoll;
   3470 	nslots = OHCI_NO_INTRS / npoll;
   3471 	for (best = i = slow, bestbw = ~0; i < shigh; i++) {
   3472 		bw = 0;
   3473 		for (j = 0; j < nslots; j++)
   3474 			bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS];
   3475 		if (bw < bestbw) {
   3476 			best = i;
   3477 			bestbw = bw;
   3478 		}
   3479 	}
   3480 	DPRINTFN(2, "best=%d(%d..%d) bestbw=%d", best, slow, shigh, bestbw);
   3481 
   3482 	mutex_enter(&sc->sc_lock);
   3483 	hsed = sc->sc_eds[best];
   3484 	sed->next = hsed->next;
   3485 	usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags),
   3486 	    sizeof(hsed->ed.ed_flags),
   3487 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   3488 	sed->ed.ed_nexted = hsed->ed.ed_nexted;
   3489 	usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
   3490 	    sizeof(sed->ed.ed_flags),
   3491 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3492 	hsed->next = sed;
   3493 	hsed->ed.ed_nexted = HTOO32(sed->physaddr);
   3494 	usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags),
   3495 	    sizeof(hsed->ed.ed_flags),
   3496 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3497 	mutex_exit(&sc->sc_lock);
   3498 
   3499 	for (j = 0; j < nslots; j++)
   3500 		++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS];
   3501 	opipe->intr.nslots = nslots;
   3502 	opipe->intr.pos = best;
   3503 
   3504 	DPRINTFN(5, "returns %p", opipe, 0, 0, 0);
   3505 	return USBD_NORMAL_COMPLETION;
   3506 }
   3507 
   3508 /***********************/
   3509 
   3510 Static int
   3511 ohci_device_isoc_init(struct usbd_xfer *xfer)
   3512 {
   3513 	struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer);
   3514 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   3515 	ohci_soft_itd_t *sitd;
   3516 	size_t i;
   3517 	int err;
   3518 
   3519 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   3520 
   3521 	DPRINTFN(1, "xfer %p len %d flags %d", xfer, xfer->ux_length,
   3522 	    xfer->ux_flags, 0);
   3523 
   3524 	const size_t nfsitd =
   3525 	    (xfer->ux_nframes + OHCI_ITD_NOFFSET - 1) / OHCI_ITD_NOFFSET;
   3526 	const size_t nbsitd = xfer->ux_bufsize / OHCI_PAGE_SIZE;
   3527 	const size_t nsitd = MAX(nfsitd, nbsitd) + 1;
   3528 
   3529 	ox->ox_sitds = kmem_zalloc(sizeof(ohci_soft_itd_t *) * nsitd,
   3530 	    KM_SLEEP);
   3531 	ox->ox_nsitd = nsitd;
   3532 
   3533 	for (i = 0; i < nsitd; i++) {
   3534 		/* Allocate next ITD */
   3535 		sitd = ohci_alloc_sitd(sc);
   3536 		if (sitd == NULL) {
   3537 			err = ENOMEM;
   3538 			goto fail;
   3539 		}
   3540 		ox->ox_sitds[i] = sitd;
   3541 		sitd->xfer = xfer;
   3542 		sitd->flags = 0;
   3543 	}
   3544 
   3545 	return 0;
   3546 fail:
   3547 	for (; i > 0;) {
   3548 		ohci_free_sitd(sc, ox->ox_sitds[--i]);
   3549 	}
   3550 	return err;
   3551 }
   3552 
   3553 Static void
   3554 ohci_device_isoc_fini(struct usbd_xfer *xfer)
   3555 {
   3556 	struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer);
   3557 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   3558 	struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe);
   3559 
   3560 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   3561 
   3562 	mutex_enter(&sc->sc_lock);
   3563 	for (size_t i = 0; i < ox->ox_nsitd; i++) {
   3564 		if (ox->ox_sitds[i] != opipe->tail.itd) {
   3565 			ohci_free_sitd_locked(sc, ox->ox_sitds[i]);
   3566 		}
   3567 	}
   3568 	mutex_exit(&sc->sc_lock);
   3569 
   3570 	if (ox->ox_nsitd) {
   3571 		const size_t sz = sizeof(ohci_soft_itd_t *) * ox->ox_nsitd;
   3572 		kmem_free(ox->ox_sitds, sz);
   3573 	}
   3574 }
   3575 
   3576 
   3577 usbd_status
   3578 ohci_device_isoc_transfer(struct usbd_xfer *xfer)
   3579 {
   3580 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   3581 	usbd_status err;
   3582 
   3583 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   3584 
   3585 	DPRINTFN(5, "xfer=%p", xfer, 0, 0, 0);
   3586 
   3587 	/* Put it on our queue, */
   3588 	mutex_enter(&sc->sc_lock);
   3589 	err = usb_insert_transfer(xfer);
   3590 	mutex_exit(&sc->sc_lock);
   3591 
   3592 	/* bail out on error, */
   3593 	if (err && err != USBD_IN_PROGRESS)
   3594 		return err;
   3595 
   3596 	/* XXX should check inuse here */
   3597 
   3598 	/* insert into schedule, */
   3599 	ohci_device_isoc_enter(xfer);
   3600 
   3601 	/* and start if the pipe wasn't running */
   3602 	if (!err)
   3603 		ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue));
   3604 
   3605 	return err;
   3606 }
   3607 
   3608 void
   3609 ohci_device_isoc_enter(struct usbd_xfer *xfer)
   3610 {
   3611 	struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer);
   3612 	struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe);
   3613 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   3614 	ohci_soft_ed_t *sed = opipe->sed;
   3615 	ohci_soft_itd_t *sitd, *nsitd, *tail;
   3616 	ohci_physaddr_t buf, offs, noffs, bp0;
   3617 	int i, ncur, nframes;
   3618 
   3619 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   3620 	DPRINTFN(5, "xfer=%p", xfer, 0, 0, 0);
   3621 
   3622 	mutex_enter(&sc->sc_lock);
   3623 
   3624 	if (sc->sc_dying) {
   3625 		mutex_exit(&sc->sc_lock);
   3626 		return;
   3627 	}
   3628 
   3629 	struct isoc *isoc = &opipe->isoc;
   3630 
   3631 	DPRINTFN(1, "used=%d next=%d xfer=%p nframes=%d",
   3632 	     isoc->inuse, isoc->next, xfer, xfer->ux_nframes);
   3633 
   3634 	if (isoc->next == -1) {
   3635 		/* Not in use yet, schedule it a few frames ahead. */
   3636 		isoc->next = O32TOH(sc->sc_hcca->hcca_frame_number) + 5;
   3637 		DPRINTFN(2,"start next=%d", isoc->next, 0, 0, 0);
   3638 	}
   3639 
   3640 	sitd = opipe->tail.itd;
   3641 	opipe->tail.itd = ox->ox_sitds[0];
   3642 	ox->ox_sitds[0] = sitd;
   3643 
   3644 	buf = DMAADDR(&xfer->ux_dmabuf, 0);
   3645 	bp0 = OHCI_PAGE(buf);
   3646 	offs = OHCI_PAGE_OFFSET(buf);
   3647 	nframes = xfer->ux_nframes;
   3648 	xfer->ux_hcpriv = sitd;
   3649 	size_t j = 1;
   3650 	for (i = ncur = 0; i < nframes; i++, ncur++) {
   3651 		noffs = offs + xfer->ux_frlengths[i];
   3652 		if (ncur == OHCI_ITD_NOFFSET ||	/* all offsets used */
   3653 		    OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */
   3654 
   3655 			/* Allocate next ITD */
   3656 			nsitd = ox->ox_sitds[j++];
   3657 			KASSERT(nsitd != NULL);
   3658 			KASSERT(j < ox->ox_nsitd);
   3659 
   3660 			/* Fill current ITD */
   3661 			sitd->itd.itd_flags = HTOO32(
   3662 				OHCI_ITD_NOCC |
   3663 				OHCI_ITD_SET_SF(isoc->next) |
   3664 				OHCI_ITD_SET_DI(6) | /* delay intr a little */
   3665 				OHCI_ITD_SET_FC(ncur));
   3666 			sitd->itd.itd_bp0 = HTOO32(bp0);
   3667 			sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr);
   3668 			sitd->itd.itd_be = HTOO32(bp0 + offs - 1);
   3669 			sitd->nextitd = nsitd;
   3670 			sitd->xfer = xfer;
   3671 			sitd->flags = 0;
   3672 #ifdef DIAGNOSTIC
   3673 			sitd->isdone = false;
   3674 #endif
   3675 			ohci_hash_add_itd(sc, sitd);
   3676 			usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd),
   3677 			    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3678 
   3679 			sitd = nsitd;
   3680 			isoc->next = isoc->next + ncur;
   3681 			bp0 = OHCI_PAGE(buf + offs);
   3682 			ncur = 0;
   3683 		}
   3684 		sitd->itd.itd_offset[ncur] = HTOO16(OHCI_ITD_MK_OFFS(offs));
   3685 		offs = noffs;
   3686 	}
   3687 	KASSERT(j <= ox->ox_nsitd);
   3688 
   3689 	/* point at sentinel */
   3690 	tail = opipe->tail.itd;
   3691 	memset(&tail->itd, 0, sizeof(tail->itd));
   3692 	tail->nextitd = NULL;
   3693  	tail->xfer = NULL;
   3694 	usb_syncmem(&tail->dma, tail->offs, sizeof(tail->itd),
   3695 	    BUS_DMASYNC_PREWRITE);
   3696 
   3697 	/* Fixup last used ITD */
   3698 	sitd->itd.itd_flags = HTOO32(
   3699 		OHCI_ITD_NOCC |
   3700 		OHCI_ITD_SET_SF(isoc->next) |
   3701 		OHCI_ITD_SET_DI(0) |
   3702 		OHCI_ITD_SET_FC(ncur));
   3703 	sitd->itd.itd_bp0 = HTOO32(bp0);
   3704 	sitd->itd.itd_nextitd = HTOO32(tail->physaddr);
   3705 	sitd->itd.itd_be = HTOO32(bp0 + offs - 1);
   3706 	sitd->nextitd = tail;
   3707 	sitd->xfer = xfer;
   3708 	sitd->flags = OHCI_CALL_DONE;
   3709 #ifdef DIAGNOSTIC
   3710 	sitd->isdone = false;
   3711 #endif
   3712 	ohci_hash_add_itd(sc, sitd);
   3713 	usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd),
   3714 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3715 
   3716 	isoc->next = isoc->next + ncur;
   3717 	isoc->inuse += nframes;
   3718 
   3719 	/* XXX pretend we did it all */
   3720 	xfer->ux_actlen = offs;
   3721 	xfer->ux_status = USBD_IN_PROGRESS;
   3722 
   3723 #ifdef OHCI_DEBUG
   3724 	if (ohcidebug >= 5) {
   3725 		DPRINTF("frame=%d", O32TOH(sc->sc_hcca->hcca_frame_number),
   3726 		    0, 0, 0);
   3727 		ohci_dump_itds(sc, xfer->ux_hcpriv);
   3728 		ohci_dump_ed(sc, sed);
   3729 	}
   3730 #endif
   3731 
   3732 	usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
   3733 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   3734 	sed->ed.ed_tailp = HTOO32(tail->physaddr);
   3735 	sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP);
   3736 	usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
   3737 	    sizeof(sed->ed.ed_flags),
   3738 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3739 	mutex_exit(&sc->sc_lock);
   3740 }
   3741 
   3742 usbd_status
   3743 ohci_device_isoc_start(struct usbd_xfer *xfer)
   3744 {
   3745 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   3746 
   3747 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   3748 	DPRINTFN(5, "xfer=%p", xfer, 0, 0, 0);
   3749 
   3750 	mutex_enter(&sc->sc_lock);
   3751 
   3752 	if (sc->sc_dying) {
   3753 		mutex_exit(&sc->sc_lock);
   3754 		return USBD_IOERROR;
   3755 	}
   3756 
   3757 
   3758 #ifdef DIAGNOSTIC
   3759 	if (xfer->ux_status != USBD_IN_PROGRESS)
   3760 		printf("ohci_device_isoc_start: not in progress %p\n", xfer);
   3761 #endif
   3762 
   3763 	/* XXX anything to do? */
   3764 
   3765 	mutex_exit(&sc->sc_lock);
   3766 
   3767 	return USBD_IN_PROGRESS;
   3768 }
   3769 
   3770 void
   3771 ohci_device_isoc_abort(struct usbd_xfer *xfer)
   3772 {
   3773 	struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe);
   3774 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   3775 	ohci_soft_ed_t *sed;
   3776 	ohci_soft_itd_t *sitd;
   3777 
   3778 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   3779 	DPRINTFN(1, "xfer=%p", xfer, 0, 0, 0);
   3780 
   3781 	KASSERT(mutex_owned(&sc->sc_lock));
   3782 
   3783 	/* Transfer is already done. */
   3784 	if (xfer->ux_status != USBD_NOT_STARTED &&
   3785 	    xfer->ux_status != USBD_IN_PROGRESS) {
   3786 		printf("ohci_device_isoc_abort: early return\n");
   3787 		goto done;
   3788 	}
   3789 
   3790 	/* Give xfer the requested abort code. */
   3791 	xfer->ux_status = USBD_CANCELLED;
   3792 
   3793 	sed = opipe->sed;
   3794 	usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
   3795 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   3796 	sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */
   3797 	usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
   3798 	    sizeof(sed->ed.ed_flags),
   3799 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3800 
   3801 	sitd = xfer->ux_hcpriv;
   3802 	KASSERT(sitd);
   3803 
   3804 	for (; sitd->xfer == xfer; sitd = sitd->nextitd) {
   3805 #ifdef DIAGNOSTIC
   3806 		DPRINTFN(1, "abort sets done sitd=%p", sitd, 0, 0, 0);
   3807 		sitd->isdone = true;
   3808 #endif
   3809 	}
   3810 
   3811 	usb_delay_ms_locked(&sc->sc_bus, OHCI_ITD_NOFFSET, &sc->sc_lock);
   3812 
   3813 	/* Run callback. */
   3814 	usb_transfer_complete(xfer);
   3815 
   3816 	sed->ed.ed_headp = HTOO32(sitd->physaddr); /* unlink TDs */
   3817 	sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */
   3818 	usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
   3819 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3820 
   3821  done:
   3822 	KASSERT(mutex_owned(&sc->sc_lock));
   3823 }
   3824 
   3825 void
   3826 ohci_device_isoc_done(struct usbd_xfer *xfer)
   3827 {
   3828 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   3829 	DPRINTFN(1, "xfer=%p", xfer, 0, 0, 0);
   3830 }
   3831 
   3832 usbd_status
   3833 ohci_setup_isoc(struct usbd_pipe *pipe)
   3834 {
   3835 	struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe);
   3836 	ohci_softc_t *sc = OHCI_PIPE2SC(pipe);
   3837 	struct isoc *isoc = &opipe->isoc;
   3838 
   3839 	isoc->next = -1;
   3840 	isoc->inuse = 0;
   3841 
   3842 	mutex_enter(&sc->sc_lock);
   3843 	ohci_add_ed(sc, opipe->sed, sc->sc_isoc_head);
   3844 	mutex_exit(&sc->sc_lock);
   3845 
   3846 	return USBD_NORMAL_COMPLETION;
   3847 }
   3848 
   3849 void
   3850 ohci_device_isoc_close(struct usbd_pipe *pipe)
   3851 {
   3852 	struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe);
   3853 	ohci_softc_t *sc = OHCI_PIPE2SC(pipe);
   3854 
   3855 	KASSERT(mutex_owned(&sc->sc_lock));
   3856 
   3857 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   3858 	DPRINTF("pipe=%p", pipe, 0, 0, 0);
   3859 	ohci_close_pipe(pipe, sc->sc_isoc_head);
   3860 #ifdef DIAGNOSTIC
   3861 	opipe->tail.itd->isdone = true;
   3862 #endif
   3863 	ohci_free_sitd_locked(sc, opipe->tail.itd);
   3864 }
   3865