ohci.c revision 1.254.2.57
1 /* $NetBSD: ohci.c,v 1.254.2.57 2016/03/09 08:00:22 skrll Exp $ */ 2 3 /* 4 * Copyright (c) 1998, 2004, 2005, 2012 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net) at 9 * Carlstedt Research & Technology, Jared D. McNeill (jmcneill (at) invisible.ca) 10 * and Matthew R. Green (mrg (at) eterna.com.au). 11 * This code is derived from software contributed to The NetBSD Foundation 12 * by Charles M. Hannum. 13 * 14 * Redistribution and use in source and binary forms, with or without 15 * modification, are permitted provided that the following conditions 16 * are met: 17 * 1. Redistributions of source code must retain the above copyright 18 * notice, this list of conditions and the following disclaimer. 19 * 2. Redistributions in binary form must reproduce the above copyright 20 * notice, this list of conditions and the following disclaimer in the 21 * documentation and/or other materials provided with the distribution. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 24 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 25 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 26 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 27 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 31 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 32 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 33 * POSSIBILITY OF SUCH DAMAGE. 34 */ 35 36 /* 37 * USB Open Host Controller driver. 38 * 39 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html 40 * USB spec: http://www.usb.org/developers/docs/ 41 */ 42 43 #include <sys/cdefs.h> 44 __KERNEL_RCSID(0, "$NetBSD: ohci.c,v 1.254.2.57 2016/03/09 08:00:22 skrll Exp $"); 45 46 #include "opt_usb.h" 47 48 #include <sys/param.h> 49 50 #include <sys/cpu.h> 51 #include <sys/device.h> 52 #include <sys/kernel.h> 53 #include <sys/kmem.h> 54 #include <sys/proc.h> 55 #include <sys/queue.h> 56 #include <sys/select.h> 57 #include <sys/sysctl.h> 58 #include <sys/systm.h> 59 60 #include <machine/endian.h> 61 62 #include <dev/usb/usb.h> 63 #include <dev/usb/usbdi.h> 64 #include <dev/usb/usbdivar.h> 65 #include <dev/usb/usb_mem.h> 66 #include <dev/usb/usb_quirks.h> 67 68 #include <dev/usb/ohcireg.h> 69 #include <dev/usb/ohcivar.h> 70 #include <dev/usb/usbroothub.h> 71 #include <dev/usb/usbhist.h> 72 73 #ifdef USB_DEBUG 74 #ifndef OHCI_DEBUG 75 #define ohcidebug 0 76 #else 77 static int ohcidebug = 0; 78 79 SYSCTL_SETUP(sysctl_hw_ohci_setup, "sysctl hw.ohci setup") 80 { 81 int err; 82 const struct sysctlnode *rnode; 83 const struct sysctlnode *cnode; 84 85 err = sysctl_createv(clog, 0, NULL, &rnode, 86 CTLFLAG_PERMANENT, CTLTYPE_NODE, "ohci", 87 SYSCTL_DESCR("ohci global controls"), 88 NULL, 0, NULL, 0, CTL_HW, CTL_CREATE, CTL_EOL); 89 90 if (err) 91 goto fail; 92 93 /* control debugging printfs */ 94 err = sysctl_createv(clog, 0, &rnode, &cnode, 95 CTLFLAG_PERMANENT|CTLFLAG_READWRITE, CTLTYPE_INT, 96 "debug", SYSCTL_DESCR("Enable debugging output"), 97 NULL, 0, &ohcidebug, sizeof(ohcidebug), CTL_CREATE, CTL_EOL); 98 if (err) 99 goto fail; 100 101 return; 102 fail: 103 aprint_error("%s: sysctl_createv failed (err = %d)\n", __func__, err); 104 } 105 106 #endif /* OHCI_DEBUG */ 107 #endif /* USB_DEBUG */ 108 109 #define DPRINTF(FMT,A,B,C,D) USBHIST_LOG(ohcidebug,FMT,A,B,C,D) 110 #define DPRINTFN(N,FMT,A,B,C,D) USBHIST_LOGN(ohcidebug,N,FMT,A,B,C,D) 111 #define OHCIHIST_FUNC() USBHIST_FUNC() 112 #define OHCIHIST_CALLED(name) USBHIST_CALLED(ohcidebug) 113 114 #if BYTE_ORDER == BIG_ENDIAN 115 #define SWAP_ENDIAN OHCI_LITTLE_ENDIAN 116 #else 117 #define SWAP_ENDIAN OHCI_BIG_ENDIAN 118 #endif 119 120 #define O16TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap16(val) : val) 121 #define O32TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap32(val) : val) 122 #define HTOO16(val) O16TOH(val) 123 #define HTOO32(val) O32TOH(val) 124 125 struct ohci_pipe; 126 127 Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *); 128 Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *); 129 130 Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *); 131 Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *); 132 Static void ohci_free_std_locked(ohci_softc_t *, ohci_soft_td_t *); 133 134 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *); 135 Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *); 136 Static void ohci_free_sitd_locked(ohci_softc_t *, 137 ohci_soft_itd_t *); 138 139 Static usbd_status ohci_alloc_std_chain(ohci_softc_t *, struct usbd_xfer *, 140 int, int); 141 Static void ohci_free_stds(ohci_softc_t *, struct ohci_xfer *); 142 143 Static void ohci_reset_std_chain(ohci_softc_t *, struct usbd_xfer *, 144 int, int, ohci_soft_td_t *, ohci_soft_td_t **); 145 146 Static usbd_status ohci_open(struct usbd_pipe *); 147 Static void ohci_poll(struct usbd_bus *); 148 Static void ohci_softintr(void *); 149 Static void ohci_waitintr(ohci_softc_t *, struct usbd_xfer *); 150 Static void ohci_rhsc(ohci_softc_t *, struct usbd_xfer *); 151 Static void ohci_rhsc_softint(void *); 152 153 Static void ohci_add_ed(ohci_softc_t *, ohci_soft_ed_t *, 154 ohci_soft_ed_t *); 155 156 Static void ohci_rem_ed(ohci_softc_t *, ohci_soft_ed_t *, 157 ohci_soft_ed_t *); 158 Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *); 159 Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *); 160 Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t); 161 Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *); 162 Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *); 163 Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t); 164 165 Static usbd_status ohci_setup_isoc(struct usbd_pipe *); 166 Static void ohci_device_isoc_enter(struct usbd_xfer *); 167 168 Static struct usbd_xfer * 169 ohci_allocx(struct usbd_bus *, unsigned int); 170 Static void ohci_freex(struct usbd_bus *, struct usbd_xfer *); 171 Static void ohci_get_lock(struct usbd_bus *, kmutex_t **); 172 Static int ohci_roothub_ctrl(struct usbd_bus *, 173 usb_device_request_t *, void *, int); 174 175 Static usbd_status ohci_root_intr_transfer(struct usbd_xfer *); 176 Static usbd_status ohci_root_intr_start(struct usbd_xfer *); 177 Static void ohci_root_intr_abort(struct usbd_xfer *); 178 Static void ohci_root_intr_close(struct usbd_pipe *); 179 Static void ohci_root_intr_done(struct usbd_xfer *); 180 181 Static int ohci_device_ctrl_init(struct usbd_xfer *); 182 Static void ohci_device_ctrl_fini(struct usbd_xfer *); 183 Static usbd_status ohci_device_ctrl_transfer(struct usbd_xfer *); 184 Static usbd_status ohci_device_ctrl_start(struct usbd_xfer *); 185 Static void ohci_device_ctrl_abort(struct usbd_xfer *); 186 Static void ohci_device_ctrl_close(struct usbd_pipe *); 187 Static void ohci_device_ctrl_done(struct usbd_xfer *); 188 189 Static int ohci_device_bulk_init(struct usbd_xfer *); 190 Static void ohci_device_bulk_fini(struct usbd_xfer *); 191 Static usbd_status ohci_device_bulk_transfer(struct usbd_xfer *); 192 Static usbd_status ohci_device_bulk_start(struct usbd_xfer *); 193 Static void ohci_device_bulk_abort(struct usbd_xfer *); 194 Static void ohci_device_bulk_close(struct usbd_pipe *); 195 Static void ohci_device_bulk_done(struct usbd_xfer *); 196 197 Static int ohci_device_intr_init(struct usbd_xfer *); 198 Static void ohci_device_intr_fini(struct usbd_xfer *); 199 Static usbd_status ohci_device_intr_transfer(struct usbd_xfer *); 200 Static usbd_status ohci_device_intr_start(struct usbd_xfer *); 201 Static void ohci_device_intr_abort(struct usbd_xfer *); 202 Static void ohci_device_intr_close(struct usbd_pipe *); 203 Static void ohci_device_intr_done(struct usbd_xfer *); 204 205 Static int ohci_device_isoc_init(struct usbd_xfer *); 206 Static void ohci_device_isoc_fini(struct usbd_xfer *); 207 Static usbd_status ohci_device_isoc_transfer(struct usbd_xfer *); 208 Static usbd_status ohci_device_isoc_start(struct usbd_xfer *); 209 Static void ohci_device_isoc_abort(struct usbd_xfer *); 210 Static void ohci_device_isoc_close(struct usbd_pipe *); 211 Static void ohci_device_isoc_done(struct usbd_xfer *); 212 213 Static usbd_status ohci_device_setintr(ohci_softc_t *, 214 struct ohci_pipe *, int); 215 216 Static void ohci_timeout(void *); 217 Static void ohci_timeout_task(void *); 218 Static void ohci_rhsc_enable(void *); 219 220 Static void ohci_close_pipe(struct usbd_pipe *, ohci_soft_ed_t *); 221 Static void ohci_abort_xfer(struct usbd_xfer *, usbd_status); 222 223 Static void ohci_device_clear_toggle(struct usbd_pipe *); 224 Static void ohci_noop(struct usbd_pipe *); 225 226 #ifdef OHCI_DEBUG 227 Static void ohci_dumpregs(ohci_softc_t *); 228 Static void ohci_dump_tds(ohci_softc_t *, ohci_soft_td_t *); 229 Static void ohci_dump_td(ohci_softc_t *, ohci_soft_td_t *); 230 Static void ohci_dump_ed(ohci_softc_t *, ohci_soft_ed_t *); 231 Static void ohci_dump_itd(ohci_softc_t *, ohci_soft_itd_t *); 232 Static void ohci_dump_itds(ohci_softc_t *, ohci_soft_itd_t *); 233 #endif 234 235 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 236 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 237 #define OWRITE1(sc, r, x) \ 238 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 239 #define OWRITE2(sc, r, x) \ 240 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 241 #define OWRITE4(sc, r, x) \ 242 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 243 244 static __inline uint32_t 245 OREAD4(ohci_softc_t *sc, bus_size_t r) 246 { 247 248 OBARR(sc); 249 return bus_space_read_4(sc->iot, sc->ioh, r); 250 } 251 252 /* Reverse the bits in a value 0 .. 31 */ 253 Static uint8_t revbits[OHCI_NO_INTRS] = 254 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 255 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 256 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 257 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 258 259 struct ohci_pipe { 260 struct usbd_pipe pipe; 261 ohci_soft_ed_t *sed; 262 union { 263 ohci_soft_td_t *td; 264 ohci_soft_itd_t *itd; 265 } tail; 266 /* Info needed for different pipe kinds. */ 267 union { 268 /* Control pipe */ 269 struct { 270 usb_dma_t reqdma; 271 } ctrl; 272 /* Interrupt pipe */ 273 struct { 274 int nslots; 275 int pos; 276 } intr; 277 /* Isochronous pipe */ 278 struct isoc { 279 int next, inuse; 280 } isoc; 281 }; 282 }; 283 284 Static const struct usbd_bus_methods ohci_bus_methods = { 285 .ubm_open = ohci_open, 286 .ubm_softint = ohci_softintr, 287 .ubm_dopoll = ohci_poll, 288 .ubm_allocx = ohci_allocx, 289 .ubm_freex = ohci_freex, 290 .ubm_getlock = ohci_get_lock, 291 .ubm_rhctrl = ohci_roothub_ctrl, 292 }; 293 294 Static const struct usbd_pipe_methods ohci_root_intr_methods = { 295 .upm_transfer = ohci_root_intr_transfer, 296 .upm_start = ohci_root_intr_start, 297 .upm_abort = ohci_root_intr_abort, 298 .upm_close = ohci_root_intr_close, 299 .upm_cleartoggle = ohci_noop, 300 .upm_done = ohci_root_intr_done, 301 }; 302 303 Static const struct usbd_pipe_methods ohci_device_ctrl_methods = { 304 .upm_init = ohci_device_ctrl_init, 305 .upm_fini = ohci_device_ctrl_fini, 306 .upm_transfer = ohci_device_ctrl_transfer, 307 .upm_start = ohci_device_ctrl_start, 308 .upm_abort = ohci_device_ctrl_abort, 309 .upm_close = ohci_device_ctrl_close, 310 .upm_cleartoggle = ohci_noop, 311 .upm_done = ohci_device_ctrl_done, 312 }; 313 314 Static const struct usbd_pipe_methods ohci_device_intr_methods = { 315 .upm_init = ohci_device_intr_init, 316 .upm_fini = ohci_device_intr_fini, 317 .upm_transfer = ohci_device_intr_transfer, 318 .upm_start = ohci_device_intr_start, 319 .upm_abort = ohci_device_intr_abort, 320 .upm_close = ohci_device_intr_close, 321 .upm_cleartoggle = ohci_device_clear_toggle, 322 .upm_done = ohci_device_intr_done, 323 }; 324 325 Static const struct usbd_pipe_methods ohci_device_bulk_methods = { 326 .upm_init = ohci_device_bulk_init, 327 .upm_fini = ohci_device_bulk_fini, 328 .upm_transfer = ohci_device_bulk_transfer, 329 .upm_start = ohci_device_bulk_start, 330 .upm_abort = ohci_device_bulk_abort, 331 .upm_close = ohci_device_bulk_close, 332 .upm_cleartoggle = ohci_device_clear_toggle, 333 .upm_done = ohci_device_bulk_done, 334 }; 335 336 Static const struct usbd_pipe_methods ohci_device_isoc_methods = { 337 .upm_init = ohci_device_isoc_init, 338 .upm_fini = ohci_device_isoc_fini, 339 .upm_transfer = ohci_device_isoc_transfer, 340 .upm_start = ohci_device_isoc_start, 341 .upm_abort = ohci_device_isoc_abort, 342 .upm_close = ohci_device_isoc_close, 343 .upm_cleartoggle = ohci_noop, 344 .upm_done = ohci_device_isoc_done, 345 }; 346 347 int 348 ohci_activate(device_t self, enum devact act) 349 { 350 struct ohci_softc *sc = device_private(self); 351 352 switch (act) { 353 case DVACT_DEACTIVATE: 354 sc->sc_dying = 1; 355 return 0; 356 default: 357 return EOPNOTSUPP; 358 } 359 } 360 361 void 362 ohci_childdet(device_t self, device_t child) 363 { 364 struct ohci_softc *sc = device_private(self); 365 366 KASSERT(sc->sc_child == child); 367 sc->sc_child = NULL; 368 } 369 370 int 371 ohci_detach(struct ohci_softc *sc, int flags) 372 { 373 int rv = 0; 374 375 if (sc->sc_child != NULL) 376 rv = config_detach(sc->sc_child, flags); 377 378 if (rv != 0) 379 return rv; 380 381 callout_halt(&sc->sc_tmo_rhsc, &sc->sc_lock); 382 383 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 384 callout_destroy(&sc->sc_tmo_rhsc); 385 386 softint_disestablish(sc->sc_rhsc_si); 387 388 cv_destroy(&sc->sc_softwake_cv); 389 390 mutex_destroy(&sc->sc_lock); 391 mutex_destroy(&sc->sc_intr_lock); 392 393 if (sc->sc_hcca != NULL) 394 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 395 pool_cache_destroy(sc->sc_xferpool); 396 397 return rv; 398 } 399 400 ohci_soft_ed_t * 401 ohci_alloc_sed(ohci_softc_t *sc) 402 { 403 ohci_soft_ed_t *sed; 404 usbd_status err; 405 int i, offs; 406 usb_dma_t dma; 407 408 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 409 410 mutex_enter(&sc->sc_lock); 411 if (sc->sc_freeeds == NULL) { 412 DPRINTFN(2, "allocating chunk", 0, 0, 0, 0); 413 mutex_exit(&sc->sc_lock); 414 415 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 416 OHCI_ED_ALIGN, &dma); 417 if (err) 418 return 0; 419 420 mutex_enter(&sc->sc_lock); 421 for (i = 0; i < OHCI_SED_CHUNK; i++) { 422 offs = i * OHCI_SED_SIZE; 423 sed = KERNADDR(&dma, offs); 424 sed->physaddr = DMAADDR(&dma, offs); 425 sed->dma = dma; 426 sed->offs = offs; 427 sed->next = sc->sc_freeeds; 428 sc->sc_freeeds = sed; 429 } 430 } 431 sed = sc->sc_freeeds; 432 sc->sc_freeeds = sed->next; 433 mutex_exit(&sc->sc_lock); 434 435 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 436 sed->next = 0; 437 return sed; 438 } 439 440 static inline void 441 ohci_free_sed_locked(ohci_softc_t *sc, ohci_soft_ed_t *sed) 442 { 443 444 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 445 446 sed->next = sc->sc_freeeds; 447 sc->sc_freeeds = sed; 448 } 449 450 void 451 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 452 { 453 454 mutex_enter(&sc->sc_lock); 455 ohci_free_sed_locked(sc, sed); 456 mutex_exit(&sc->sc_lock); 457 } 458 459 ohci_soft_td_t * 460 ohci_alloc_std(ohci_softc_t *sc) 461 { 462 ohci_soft_td_t *std; 463 usbd_status err; 464 int i, offs; 465 usb_dma_t dma; 466 467 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 468 469 mutex_enter(&sc->sc_lock); 470 if (sc->sc_freetds == NULL) { 471 DPRINTFN(2, "allocating chunk", 0, 0, 0, 0); 472 mutex_exit(&sc->sc_lock); 473 474 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 475 OHCI_TD_ALIGN, &dma); 476 if (err) 477 return NULL; 478 479 mutex_enter(&sc->sc_lock); 480 for(i = 0; i < OHCI_STD_CHUNK; i++) { 481 offs = i * OHCI_STD_SIZE; 482 std = KERNADDR(&dma, offs); 483 std->physaddr = DMAADDR(&dma, offs); 484 std->dma = dma; 485 std->offs = offs; 486 std->nexttd = sc->sc_freetds; 487 sc->sc_freetds = std; 488 } 489 } 490 491 std = sc->sc_freetds; 492 sc->sc_freetds = std->nexttd; 493 mutex_exit(&sc->sc_lock); 494 495 memset(&std->td, 0, sizeof(ohci_td_t)); 496 std->nexttd = NULL; 497 std->xfer = NULL; 498 499 return std; 500 } 501 502 void 503 ohci_free_std_locked(ohci_softc_t *sc, ohci_soft_td_t *std) 504 { 505 506 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 507 508 std->nexttd = sc->sc_freetds; 509 sc->sc_freetds = std; 510 } 511 512 void 513 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std) 514 { 515 516 mutex_enter(&sc->sc_lock); 517 ohci_free_std_locked(sc, std); 518 mutex_exit(&sc->sc_lock); 519 } 520 521 Static usbd_status 522 ohci_alloc_std_chain(ohci_softc_t *sc, struct usbd_xfer *xfer, int alen, int rd) 523 { 524 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 525 struct usbd_pipe *pipe = xfer->ux_pipe; 526 ohci_soft_td_t *next, *cur; 527 ohci_physaddr_t dataphys, dataphysend; 528 uint32_t tdflags; 529 int len = alen; 530 int curlen; 531 usb_dma_t *dma = &xfer->ux_dmabuf; 532 uint16_t flags = xfer->ux_flags; 533 534 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 535 536 DPRINTFN(8, "addr=%d endpt=%d len=%d speed=%d", 537 pipe->up_dev->ud_addr, 538 UE_GET_ADDR(pipe->up_endpoint->ue_edesc->bEndpointAddress), 539 alen, pipe->up_dev->ud_speed); 540 541 ASSERT_SLEEPABLE(); 542 543 size_t nstd = (flags & USBD_FORCE_SHORT_XFER) ? 1 : 0; 544 nstd += ((len + OHCI_PAGE_SIZE - 1) / OHCI_PAGE_SIZE); 545 ox->ox_stds = kmem_zalloc(sizeof(ohci_soft_td_t *) * nstd, 546 KM_SLEEP); 547 ox->ox_nstd = nstd; 548 int mps = UGETW(pipe->up_endpoint->ue_edesc->wMaxPacketSize); 549 550 DPRINTFN(8, "xfer %p nstd %d mps %d", xfer, nstd, mps, 0); 551 552 len = alen; 553 cur = ohci_alloc_std(sc); 554 if (cur == NULL) 555 goto nomem; 556 557 dataphys = DMAADDR(dma, 0); 558 dataphysend = OHCI_PAGE(dataphys + len - 1); 559 tdflags = HTOO32( 560 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 561 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR); 562 563 for (size_t j = 0;;) { 564 ox->ox_stds[j++] = cur; 565 next = ohci_alloc_std(sc); 566 if (next == NULL) 567 goto nomem; 568 569 /* The OHCI hardware can handle at most one page crossing. */ 570 if (OHCI_PAGE(dataphys) == dataphysend || 571 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) { 572 /* we can handle it in this TD */ 573 curlen = len; 574 } else { 575 /* must use multiple TDs, fill as much as possible. */ 576 curlen = 2 * OHCI_PAGE_SIZE - 577 (dataphys & (OHCI_PAGE_SIZE-1)); 578 /* the length must be a multiple of the max size */ 579 curlen -= curlen % mps; 580 KASSERT(curlen != 0); 581 } 582 DPRINTFN(4, "dataphys=0x%08x dataphysend=0x%08x " 583 "len=%d curlen=%d", dataphys, dataphysend, len, curlen); 584 len -= curlen; 585 586 cur->td.td_flags = tdflags; 587 cur->td.td_cbp = HTOO32(dataphys); 588 cur->td.td_nexttd = HTOO32(next->physaddr); 589 cur->td.td_be = HTOO32(dataphys + curlen - 1); 590 cur->nexttd = next; 591 cur->len = curlen; 592 cur->flags = OHCI_ADD_LEN; 593 cur->xfer = xfer; 594 595 DPRINTFN(10, "cbp=0x%08x be=0x%08x", dataphys, 596 dataphys + curlen - 1, 0, 0); 597 if (len == 0) 598 break; 599 DPRINTFN(10, "extend chain", 0, 0, 0, 0); 600 dataphys += curlen; 601 cur = next; 602 } 603 if (!rd && (flags & USBD_FORCE_SHORT_XFER) && 604 alen % mps == 0) { 605 /* Force a 0 length transfer at the end. */ 606 607 cur = next; 608 next = ohci_alloc_std(sc); 609 if (next == NULL) 610 goto nomem; 611 612 cur->td.td_flags = tdflags; 613 cur->td.td_cbp = 0; /* indicate 0 length packet */ 614 cur->td.td_nexttd = HTOO32(next->physaddr); 615 cur->td.td_be = ~0; 616 cur->nexttd = next; 617 cur->len = 0; 618 cur->flags = 0; 619 cur->xfer = xfer; 620 621 DPRINTFN(2, "add 0 xfer", 0, 0, 0, 0); 622 } 623 624 return USBD_NORMAL_COMPLETION; 625 626 nomem: 627 ohci_free_stds(sc, ox); 628 629 return USBD_NOMEM; 630 } 631 632 Static void 633 ohci_free_stds(ohci_softc_t *sc, struct ohci_xfer *ox) 634 { 635 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 636 DPRINTF("ox=%p", ox, 0, 0, 0); 637 638 mutex_enter(&sc->sc_lock); 639 for (size_t i = 0; i < ox->ox_nstd; i++) { 640 ohci_soft_td_t *std = ox->ox_stds[i]; 641 if (std == NULL) 642 break; 643 ohci_free_std_locked(sc, std); 644 } 645 mutex_exit(&sc->sc_lock); 646 } 647 648 void 649 ohci_reset_std_chain(ohci_softc_t *sc, struct usbd_xfer *xfer, 650 int alen, int rd, ohci_soft_td_t *sp, ohci_soft_td_t **ep) 651 { 652 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 653 ohci_soft_td_t *next, *cur; 654 ohci_physaddr_t dataphys, dataphysend; 655 uint32_t tdflags; 656 int len, curlen; 657 usb_dma_t *dma = &xfer->ux_dmabuf; 658 uint16_t flags = xfer->ux_flags; 659 660 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 661 DPRINTF("start len=%d", alen, 0, 0, 0); 662 663 KASSERT(mutex_owned(&sc->sc_lock)); 664 665 DPRINTFN(8, "addr=%d endpt=%d len=%d speed=%d", 666 xfer->ux_pipe->up_dev->ud_addr, 667 UE_GET_ADDR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress), 668 alen, xfer->ux_pipe->up_dev->ud_speed); 669 670 KASSERT(sp); 671 672 int mps = UGETW(xfer->ux_pipe->up_endpoint->ue_edesc->wMaxPacketSize); 673 674 len = alen; 675 cur = sp; 676 677 dataphys = DMAADDR(dma, 0); 678 dataphysend = OHCI_PAGE(dataphys + len - 1); 679 usb_syncmem(dma, 0, len, 680 rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 681 tdflags = HTOO32( 682 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 683 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR); 684 685 for (size_t j = 1;;) { 686 if (j == ox->ox_nstd) 687 next = NULL; 688 else 689 next = ox->ox_stds[j++]; 690 KASSERT(next != cur); 691 692 /* The OHCI hardware can handle at most one page crossing. */ 693 if (OHCI_PAGE(dataphys) == dataphysend || 694 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) { 695 /* we can handle it in this TD */ 696 curlen = len; 697 } else { 698 /* must use multiple TDs, fill as much as possible. */ 699 curlen = 2 * OHCI_PAGE_SIZE - 700 (dataphys & (OHCI_PAGE_SIZE - 1)); 701 /* the length must be a multiple of the max size */ 702 curlen -= curlen % mps; 703 KASSERT(curlen != 0); 704 } 705 DPRINTFN(4, "dataphys=0x%08x dataphysend=0x%08x " 706 "len=%d curlen=%d", dataphys, dataphysend, len, curlen); 707 len -= curlen; 708 709 cur->td.td_flags = tdflags; 710 cur->td.td_cbp = HTOO32(dataphys); 711 cur->td.td_be = HTOO32(dataphys + curlen - 1); 712 cur->td.td_nexttd = (next != NULL) ? HTOO32(next->physaddr) : 0; 713 cur->nexttd = next; 714 cur->len = curlen; 715 cur->flags = OHCI_ADD_LEN; 716 cur->xfer = xfer; 717 ohci_hash_add_td(sc, cur); 718 719 usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td), 720 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 721 DPRINTFN(10, "cbp=0x%08x be=0x%08x", dataphys, 722 dataphys + curlen - 1, 0, 0); 723 if (len == 0) 724 break; 725 KASSERT(next != NULL); 726 DPRINTFN(10, "extend chain", 0, 0, 0, 0); 727 dataphys += curlen; 728 cur = next; 729 } 730 cur->td.td_flags |= 731 (xfer->ux_flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0); 732 733 if (!rd && 734 (flags & USBD_FORCE_SHORT_XFER) && 735 alen % mps == 0) { 736 /* Force a 0 length transfer at the end. */ 737 738 KASSERT(next != NULL); 739 cur = next; 740 741 cur->td.td_flags = tdflags; 742 cur->td.td_cbp = 0; /* indicate 0 length packet */ 743 cur->td.td_nexttd = HTOO32(next->physaddr); 744 cur->td.td_be = ~0; 745 cur->nexttd = NULL; 746 cur->len = 0; 747 cur->flags = 0; 748 cur->xfer = xfer; 749 ohci_hash_add_td(sc, cur); 750 751 usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td), 752 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 753 DPRINTFN(2, "add 0 xfer", 0, 0, 0, 0); 754 } 755 *ep = cur; 756 } 757 758 ohci_soft_itd_t * 759 ohci_alloc_sitd(ohci_softc_t *sc) 760 { 761 ohci_soft_itd_t *sitd; 762 usbd_status err; 763 int i, offs; 764 usb_dma_t dma; 765 766 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 767 768 mutex_enter(&sc->sc_lock); 769 if (sc->sc_freeitds == NULL) { 770 DPRINTFN(2, "allocating chunk", 0, 0, 0, 0); 771 mutex_exit(&sc->sc_lock); 772 773 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK, 774 OHCI_ITD_ALIGN, &dma); 775 if (err) 776 return NULL; 777 mutex_enter(&sc->sc_lock); 778 for(i = 0; i < OHCI_SITD_CHUNK; i++) { 779 offs = i * OHCI_SITD_SIZE; 780 sitd = KERNADDR(&dma, offs); 781 sitd->physaddr = DMAADDR(&dma, offs); 782 sitd->dma = dma; 783 sitd->offs = offs; 784 sitd->nextitd = sc->sc_freeitds; 785 sc->sc_freeitds = sitd; 786 } 787 } 788 789 sitd = sc->sc_freeitds; 790 sc->sc_freeitds = sitd->nextitd; 791 mutex_exit(&sc->sc_lock); 792 793 memset(&sitd->itd, 0, sizeof(ohci_itd_t)); 794 sitd->nextitd = NULL; 795 sitd->xfer = NULL; 796 797 #ifdef DIAGNOSTIC 798 sitd->isdone = true; 799 #endif 800 801 return sitd; 802 } 803 804 Static void 805 ohci_free_sitd_locked(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 806 { 807 808 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 809 DPRINTFN(10, "sitd=%p", sitd, 0, 0, 0); 810 811 KASSERT(sitd->isdone); 812 #ifdef DIAGNOSTIC 813 /* Warn double free */ 814 sitd->isdone = false; 815 #endif 816 817 sitd->nextitd = sc->sc_freeitds; 818 sc->sc_freeitds = sitd; 819 } 820 821 void 822 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 823 { 824 825 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 826 827 mutex_enter(&sc->sc_lock); 828 ohci_free_sitd_locked(sc, sitd); 829 mutex_exit(&sc->sc_lock); 830 } 831 832 int 833 ohci_init(ohci_softc_t *sc) 834 { 835 ohci_soft_ed_t *sed, *psed; 836 usbd_status err; 837 int i; 838 uint32_t s, ctl, rwc, ival, hcr, fm, per, rev, desca /*, descb */; 839 840 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 841 842 aprint_normal_dev(sc->sc_dev, ""); 843 844 sc->sc_hcca = NULL; 845 callout_init(&sc->sc_tmo_rhsc, CALLOUT_MPSAFE); 846 847 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_SOFTUSB); 848 mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_USB); 849 cv_init(&sc->sc_softwake_cv, "ohciab"); 850 851 sc->sc_rhsc_si = softint_establish(SOFTINT_NET | SOFTINT_MPSAFE, 852 ohci_rhsc_softint, sc); 853 854 for (i = 0; i < OHCI_HASH_SIZE; i++) 855 LIST_INIT(&sc->sc_hash_tds[i]); 856 for (i = 0; i < OHCI_HASH_SIZE; i++) 857 LIST_INIT(&sc->sc_hash_itds[i]); 858 859 sc->sc_xferpool = pool_cache_init(sizeof(struct ohci_xfer), 0, 0, 0, 860 "ohcixfer", NULL, IPL_USB, NULL, NULL, NULL); 861 862 rev = OREAD4(sc, OHCI_REVISION); 863 aprint_normal("OHCI version %d.%d%s\n", 864 OHCI_REV_HI(rev), OHCI_REV_LO(rev), 865 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 866 867 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 868 aprint_error_dev(sc->sc_dev, "unsupported OHCI revision\n"); 869 sc->sc_bus.ub_revision = USBREV_UNKNOWN; 870 return -1; 871 } 872 sc->sc_bus.ub_revision = USBREV_1_0; 873 sc->sc_bus.ub_usedma = true; 874 875 /* XXX determine alignment by R/W */ 876 /* Allocate the HCCA area. */ 877 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 878 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 879 if (err) { 880 sc->sc_hcca = NULL; 881 return err; 882 } 883 sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0); 884 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 885 886 sc->sc_eintrs = OHCI_NORMAL_INTRS; 887 888 /* Allocate dummy ED that starts the control list. */ 889 sc->sc_ctrl_head = ohci_alloc_sed(sc); 890 if (sc->sc_ctrl_head == NULL) { 891 err = ENOMEM; 892 goto bad1; 893 } 894 sc->sc_ctrl_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 895 896 /* Allocate dummy ED that starts the bulk list. */ 897 sc->sc_bulk_head = ohci_alloc_sed(sc); 898 if (sc->sc_bulk_head == NULL) { 899 err = ENOMEM; 900 goto bad2; 901 } 902 sc->sc_bulk_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 903 usb_syncmem(&sc->sc_bulk_head->dma, sc->sc_bulk_head->offs, 904 sizeof(sc->sc_bulk_head->ed), 905 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 906 907 /* Allocate dummy ED that starts the isochronous list. */ 908 sc->sc_isoc_head = ohci_alloc_sed(sc); 909 if (sc->sc_isoc_head == NULL) { 910 err = ENOMEM; 911 goto bad3; 912 } 913 sc->sc_isoc_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 914 usb_syncmem(&sc->sc_isoc_head->dma, sc->sc_isoc_head->offs, 915 sizeof(sc->sc_isoc_head->ed), 916 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 917 918 /* Allocate all the dummy EDs that make up the interrupt tree. */ 919 for (i = 0; i < OHCI_NO_EDS; i++) { 920 sed = ohci_alloc_sed(sc); 921 if (sed == NULL) { 922 while (--i >= 0) 923 ohci_free_sed(sc, sc->sc_eds[i]); 924 err = ENOMEM; 925 goto bad4; 926 } 927 /* All ED fields are set to 0. */ 928 sc->sc_eds[i] = sed; 929 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 930 if (i != 0) 931 psed = sc->sc_eds[(i-1) / 2]; 932 else 933 psed= sc->sc_isoc_head; 934 sed->next = psed; 935 sed->ed.ed_nexted = HTOO32(psed->physaddr); 936 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 937 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 938 } 939 /* 940 * Fill HCCA interrupt table. The bit reversal is to get 941 * the tree set up properly to spread the interrupts. 942 */ 943 for (i = 0; i < OHCI_NO_INTRS; i++) 944 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 945 HTOO32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 946 usb_syncmem(&sc->sc_hccadma, 0, OHCI_HCCA_SIZE, 947 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 948 949 #ifdef OHCI_DEBUG 950 DPRINTFN(15, "--- dump start ---", 0, 0, 0 ,0); 951 if (ohcidebug >= 15) { 952 for (i = 0; i < OHCI_NO_EDS; i++) { 953 DPRINTFN(15, "ed#%d ", i, 0, 0, 0); 954 ohci_dump_ed(sc, sc->sc_eds[i]); 955 } 956 DPRINTFN(15, "iso", 0, 0, 0 ,0); 957 ohci_dump_ed(sc, sc->sc_isoc_head); 958 } 959 DPRINTFN(15, "--- dump end ---", 0, 0, 0 ,0); 960 #endif 961 962 /* Preserve values programmed by SMM/BIOS but lost over reset. */ 963 ctl = OREAD4(sc, OHCI_CONTROL); 964 rwc = ctl & OHCI_RWC; 965 fm = OREAD4(sc, OHCI_FM_INTERVAL); 966 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 967 /* descb = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); */ 968 969 /* Determine in what context we are running. */ 970 if (ctl & OHCI_IR) { 971 /* SMM active, request change */ 972 DPRINTF("SMM active, request owner change", 0, 0, 0, 0); 973 if ((sc->sc_intre & (OHCI_OC | OHCI_MIE)) == 974 (OHCI_OC | OHCI_MIE)) 975 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_MIE); 976 s = OREAD4(sc, OHCI_COMMAND_STATUS); 977 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 978 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 979 usb_delay_ms(&sc->sc_bus, 1); 980 ctl = OREAD4(sc, OHCI_CONTROL); 981 } 982 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_MIE); 983 if ((ctl & OHCI_IR) == 0) { 984 aprint_error_dev(sc->sc_dev, 985 "SMM does not respond, resetting\n"); 986 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 987 goto reset; 988 } 989 #if 0 990 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */ 991 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 992 /* BIOS started controller. */ 993 DPRINTF("BIOS active", 0, 0, 0, 0); 994 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 995 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL | rwc); 996 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 997 } 998 #endif 999 } else { 1000 DPRINTF("cold started", 0 ,0 ,0 ,0); 1001 reset: 1002 /* Controller was cold started. */ 1003 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 1004 } 1005 1006 /* 1007 * This reset should not be necessary according to the OHCI spec, but 1008 * without it some controllers do not start. 1009 */ 1010 DPRINTF("sc %p: resetting", sc, 0, 0, 0); 1011 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 1012 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 1013 1014 /* We now own the host controller and the bus has been reset. */ 1015 1016 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 1017 /* Nominal time for a reset is 10 us. */ 1018 for (i = 0; i < 10; i++) { 1019 delay(10); 1020 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 1021 if (!hcr) 1022 break; 1023 } 1024 if (hcr) { 1025 aprint_error_dev(sc->sc_dev, "reset timeout\n"); 1026 err = EIO; 1027 goto bad5; 1028 } 1029 #ifdef OHCI_DEBUG 1030 if (ohcidebug >= 15) 1031 ohci_dumpregs(sc); 1032 #endif 1033 1034 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 1035 1036 /* Set up HC registers. */ 1037 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 1038 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 1039 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 1040 /* disable all interrupts and then switch on all desired interrupts */ 1041 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 1042 /* switch on desired functional features */ 1043 ctl = OREAD4(sc, OHCI_CONTROL); 1044 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 1045 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 1046 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL | rwc; 1047 /* And finally start it! */ 1048 OWRITE4(sc, OHCI_CONTROL, ctl); 1049 1050 /* 1051 * The controller is now OPERATIONAL. Set a some final 1052 * registers that should be set earlier, but that the 1053 * controller ignores when in the SUSPEND state. 1054 */ 1055 ival = OHCI_GET_IVAL(fm); 1056 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 1057 fm |= OHCI_FSMPS(ival) | ival; 1058 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 1059 per = OHCI_PERIODIC(ival); /* 90% periodic */ 1060 OWRITE4(sc, OHCI_PERIODIC_START, per); 1061 1062 if (sc->sc_flags & OHCIF_SUPERIO) { 1063 /* no overcurrent protection */ 1064 desca |= OHCI_NOCP; 1065 /* 1066 * Clear NoPowerSwitching and PowerOnToPowerGoodTime meaning 1067 * that 1068 * - ports are always power switched 1069 * - don't wait for powered root hub port 1070 */ 1071 desca &= ~(__SHIFTIN(0xff, OHCI_POTPGT_MASK) | OHCI_NPS); 1072 } 1073 1074 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */ 1075 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP); 1076 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 1077 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY); 1078 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca); 1079 1080 /* 1081 * The AMD756 requires a delay before re-reading the register, 1082 * otherwise it will occasionally report 0 ports. 1083 */ 1084 sc->sc_noport = 0; 1085 for (i = 0; i < 10 && sc->sc_noport == 0; i++) { 1086 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY); 1087 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 1088 } 1089 1090 #ifdef OHCI_DEBUG 1091 if (ohcidebug >= 5) 1092 ohci_dumpregs(sc); 1093 #endif 1094 1095 /* Set up the bus struct. */ 1096 sc->sc_bus.ub_methods = &ohci_bus_methods; 1097 sc->sc_bus.ub_pipesize = sizeof(struct ohci_pipe); 1098 1099 sc->sc_control = sc->sc_intre = 0; 1100 1101 /* Finally, turn on interrupts. */ 1102 DPRINTF("enabling %#x", sc->sc_eintrs | OHCI_MIE, 0, 0, 0); 1103 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 1104 1105 return 0; 1106 1107 bad5: 1108 for (i = 0; i < OHCI_NO_EDS; i++) 1109 ohci_free_sed(sc, sc->sc_eds[i]); 1110 bad4: 1111 ohci_free_sed(sc, sc->sc_isoc_head); 1112 bad3: 1113 ohci_free_sed(sc, sc->sc_bulk_head); 1114 bad2: 1115 ohci_free_sed(sc, sc->sc_ctrl_head); 1116 bad1: 1117 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 1118 sc->sc_hcca = NULL; 1119 return err; 1120 } 1121 1122 struct usbd_xfer * 1123 ohci_allocx(struct usbd_bus *bus, unsigned int nframes) 1124 { 1125 ohci_softc_t *sc = OHCI_BUS2SC(bus); 1126 struct usbd_xfer *xfer; 1127 1128 xfer = pool_cache_get(sc->sc_xferpool, PR_NOWAIT); 1129 if (xfer != NULL) { 1130 memset(xfer, 0, sizeof(struct ohci_xfer)); 1131 #ifdef DIAGNOSTIC 1132 xfer->ux_state = XFER_BUSY; 1133 #endif 1134 } 1135 return xfer; 1136 } 1137 1138 void 1139 ohci_freex(struct usbd_bus *bus, struct usbd_xfer *xfer) 1140 { 1141 ohci_softc_t *sc = OHCI_BUS2SC(bus); 1142 1143 KASSERTMSG(xfer->ux_state == XFER_BUSY, 1144 "xfer=%p not busy, 0x%08x\n", xfer, xfer->ux_state); 1145 #ifdef DIAGNOSTIC 1146 xfer->ux_state = XFER_FREE; 1147 #endif 1148 pool_cache_put(sc->sc_xferpool, xfer); 1149 } 1150 1151 Static void 1152 ohci_get_lock(struct usbd_bus *bus, kmutex_t **lock) 1153 { 1154 ohci_softc_t *sc = OHCI_BUS2SC(bus); 1155 1156 *lock = &sc->sc_lock; 1157 } 1158 1159 /* 1160 * Shut down the controller when the system is going down. 1161 */ 1162 bool 1163 ohci_shutdown(device_t self, int flags) 1164 { 1165 ohci_softc_t *sc = device_private(self); 1166 1167 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1168 1169 DPRINTF("stopping the HC", 0, 0, 0, 0); 1170 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1171 return true; 1172 } 1173 1174 bool 1175 ohci_resume(device_t dv, const pmf_qual_t *qual) 1176 { 1177 ohci_softc_t *sc = device_private(dv); 1178 uint32_t ctl; 1179 1180 mutex_spin_enter(&sc->sc_intr_lock); 1181 sc->sc_bus.ub_usepolling++; 1182 mutex_spin_exit(&sc->sc_intr_lock); 1183 1184 /* Some broken BIOSes do not recover these values */ 1185 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 1186 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, 1187 sc->sc_ctrl_head->physaddr); 1188 OWRITE4(sc, OHCI_BULK_HEAD_ED, 1189 sc->sc_bulk_head->physaddr); 1190 if (sc->sc_intre) 1191 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_intre & 1192 (OHCI_ALL_INTRS | OHCI_MIE)); 1193 if (sc->sc_control) 1194 ctl = sc->sc_control; 1195 else 1196 ctl = OREAD4(sc, OHCI_CONTROL); 1197 ctl |= OHCI_HCFS_RESUME; 1198 OWRITE4(sc, OHCI_CONTROL, ctl); 1199 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 1200 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL; 1201 OWRITE4(sc, OHCI_CONTROL, ctl); 1202 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 1203 sc->sc_control = sc->sc_intre = 0; 1204 1205 mutex_spin_enter(&sc->sc_intr_lock); 1206 sc->sc_bus.ub_usepolling--; 1207 mutex_spin_exit(&sc->sc_intr_lock); 1208 1209 return true; 1210 } 1211 1212 bool 1213 ohci_suspend(device_t dv, const pmf_qual_t *qual) 1214 { 1215 ohci_softc_t *sc = device_private(dv); 1216 uint32_t ctl; 1217 1218 mutex_spin_enter(&sc->sc_intr_lock); 1219 sc->sc_bus.ub_usepolling++; 1220 mutex_spin_exit(&sc->sc_intr_lock); 1221 1222 ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK; 1223 if (sc->sc_control == 0) { 1224 /* 1225 * Preserve register values, in case that BIOS 1226 * does not recover them. 1227 */ 1228 sc->sc_control = ctl; 1229 sc->sc_intre = OREAD4(sc, 1230 OHCI_INTERRUPT_ENABLE); 1231 } 1232 ctl |= OHCI_HCFS_SUSPEND; 1233 OWRITE4(sc, OHCI_CONTROL, ctl); 1234 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1235 1236 mutex_spin_enter(&sc->sc_intr_lock); 1237 sc->sc_bus.ub_usepolling--; 1238 mutex_spin_exit(&sc->sc_intr_lock); 1239 1240 return true; 1241 } 1242 1243 #ifdef OHCI_DEBUG 1244 void 1245 ohci_dumpregs(ohci_softc_t *sc) 1246 { 1247 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1248 1249 DPRINTF("rev=0x%08x control=0x%08x command=0x%08x", 1250 OREAD4(sc, OHCI_REVISION), 1251 OREAD4(sc, OHCI_CONTROL), 1252 OREAD4(sc, OHCI_COMMAND_STATUS), 0); 1253 DPRINTF(" intrstat=0x%08x intre=0x%08x intrd=0x%08x", 1254 OREAD4(sc, OHCI_INTERRUPT_STATUS), 1255 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 1256 OREAD4(sc, OHCI_INTERRUPT_DISABLE), 0); 1257 DPRINTF(" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x", 1258 OREAD4(sc, OHCI_HCCA), 1259 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 1260 OREAD4(sc, OHCI_CONTROL_HEAD_ED), 0); 1261 DPRINTF(" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x", 1262 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 1263 OREAD4(sc, OHCI_BULK_HEAD_ED), 1264 OREAD4(sc, OHCI_BULK_CURRENT_ED) ,0); 1265 DPRINTF(" done=0x%08x fmival=0x%08x fmrem=0x%08x", 1266 OREAD4(sc, OHCI_DONE_HEAD), 1267 OREAD4(sc, OHCI_FM_INTERVAL), 1268 OREAD4(sc, OHCI_FM_REMAINING), 0); 1269 DPRINTF(" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x", 1270 OREAD4(sc, OHCI_FM_NUMBER), 1271 OREAD4(sc, OHCI_PERIODIC_START), 1272 OREAD4(sc, OHCI_LS_THRESHOLD), 0); 1273 DPRINTF(" desca=0x%08x descb=0x%08x stat=0x%08x", 1274 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 1275 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 1276 OREAD4(sc, OHCI_RH_STATUS), 0); 1277 DPRINTF(" port1=0x%08x port2=0x%08x", 1278 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 1279 OREAD4(sc, OHCI_RH_PORT_STATUS(2)), 0, 0); 1280 DPRINTF(" HCCA: frame_number=0x%04x done_head=0x%08x", 1281 O32TOH(sc->sc_hcca->hcca_frame_number), 1282 O32TOH(sc->sc_hcca->hcca_done_head), 0, 0); 1283 } 1284 #endif 1285 1286 Static int ohci_intr1(ohci_softc_t *); 1287 1288 int 1289 ohci_intr(void *p) 1290 { 1291 ohci_softc_t *sc = p; 1292 int ret = 0; 1293 1294 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1295 1296 if (sc == NULL) 1297 return 0; 1298 1299 mutex_spin_enter(&sc->sc_intr_lock); 1300 1301 if (sc->sc_dying || !device_has_power(sc->sc_dev)) 1302 goto done; 1303 1304 /* If we get an interrupt while polling, then just ignore it. */ 1305 if (sc->sc_bus.ub_usepolling) { 1306 DPRINTFN(16, "ignored interrupt while polling", 0, 0, 0, 0); 1307 /* for level triggered intrs, should do something to ack */ 1308 OWRITE4(sc, OHCI_INTERRUPT_STATUS, 1309 OREAD4(sc, OHCI_INTERRUPT_STATUS)); 1310 1311 goto done; 1312 } 1313 1314 ret = ohci_intr1(sc); 1315 1316 done: 1317 mutex_spin_exit(&sc->sc_intr_lock); 1318 return ret; 1319 } 1320 1321 Static int 1322 ohci_intr1(ohci_softc_t *sc) 1323 { 1324 uint32_t intrs, eintrs; 1325 1326 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1327 1328 /* In case the interrupt occurs before initialization has completed. */ 1329 if (sc == NULL || sc->sc_hcca == NULL) { 1330 #ifdef DIAGNOSTIC 1331 printf("ohci_intr: sc->sc_hcca == NULL\n"); 1332 #endif 1333 return 0; 1334 } 1335 1336 KASSERT(mutex_owned(&sc->sc_intr_lock)); 1337 1338 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1339 if (!intrs) 1340 return 0; 1341 1342 /* Acknowledge */ 1343 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs & ~(OHCI_MIE|OHCI_WDH)); 1344 eintrs = intrs & sc->sc_eintrs; 1345 DPRINTFN(7, "sc=%p", sc, 0, 0, 0); 1346 DPRINTFN(7, "intrs=%#x(%#x) eintrs=%#x(%#x)", 1347 intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), eintrs, 1348 sc->sc_eintrs); 1349 1350 if (!eintrs) { 1351 return 0; 1352 } 1353 1354 if (eintrs & OHCI_SO) { 1355 sc->sc_overrun_cnt++; 1356 if (usbd_ratecheck(&sc->sc_overrun_ntc)) { 1357 printf("%s: %u scheduling overruns\n", 1358 device_xname(sc->sc_dev), sc->sc_overrun_cnt); 1359 sc->sc_overrun_cnt = 0; 1360 } 1361 /* XXX do what */ 1362 eintrs &= ~OHCI_SO; 1363 } 1364 if (eintrs & OHCI_WDH) { 1365 /* 1366 * We block the interrupt below, and reenable it later from 1367 * ohci_softintr(). 1368 */ 1369 usb_schedsoftintr(&sc->sc_bus); 1370 } 1371 if (eintrs & OHCI_RD) { 1372 DPRINTFN(5, "resume detect", sc, 0, 0, 0); 1373 printf("%s: resume detect\n", device_xname(sc->sc_dev)); 1374 /* XXX process resume detect */ 1375 } 1376 if (eintrs & OHCI_UE) { 1377 DPRINTFN(5, "unrecoverable error", sc, 0, 0, 0); 1378 printf("%s: unrecoverable error, controller halted\n", 1379 device_xname(sc->sc_dev)); 1380 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1381 /* XXX what else */ 1382 } 1383 if (eintrs & OHCI_RHSC) { 1384 /* 1385 * We block the interrupt below, and reenable it later from 1386 * a timeout. 1387 */ 1388 softint_schedule(sc->sc_rhsc_si); 1389 } 1390 1391 if (eintrs != 0) { 1392 /* Block unprocessed interrupts. */ 1393 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs); 1394 sc->sc_eintrs &= ~eintrs; 1395 DPRINTF("sc %p blocking intrs 0x%x", sc, eintrs, 0, 0); 1396 } 1397 1398 return 1; 1399 } 1400 1401 void 1402 ohci_rhsc_enable(void *v_sc) 1403 { 1404 ohci_softc_t *sc = v_sc; 1405 1406 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1407 DPRINTF("sc %p", sc, 0, 0, 0); 1408 mutex_spin_enter(&sc->sc_intr_lock); 1409 sc->sc_eintrs |= OHCI_RHSC; 1410 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1411 mutex_spin_exit(&sc->sc_intr_lock); 1412 } 1413 1414 #ifdef OHCI_DEBUG 1415 const char *ohci_cc_strs[] = { 1416 "NO_ERROR", 1417 "CRC", 1418 "BIT_STUFFING", 1419 "DATA_TOGGLE_MISMATCH", 1420 "STALL", 1421 "DEVICE_NOT_RESPONDING", 1422 "PID_CHECK_FAILURE", 1423 "UNEXPECTED_PID", 1424 "DATA_OVERRUN", 1425 "DATA_UNDERRUN", 1426 "BUFFER_OVERRUN", 1427 "BUFFER_UNDERRUN", 1428 "reserved", 1429 "reserved", 1430 "NOT_ACCESSED", 1431 "NOT_ACCESSED", 1432 }; 1433 #endif 1434 1435 void 1436 ohci_softintr(void *v) 1437 { 1438 struct usbd_bus *bus = v; 1439 ohci_softc_t *sc = OHCI_BUS2SC(bus); 1440 ohci_soft_itd_t *sitd, *sidone, *sitdnext; 1441 ohci_soft_td_t *std, *sdone, *stdnext; 1442 struct usbd_xfer *xfer; 1443 struct ohci_pipe *opipe; 1444 int len, cc; 1445 int i, j, actlen, iframes, uedir; 1446 ohci_physaddr_t done; 1447 1448 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1449 1450 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1451 1452 usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head), 1453 sizeof(sc->sc_hcca->hcca_done_head), 1454 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1455 done = O32TOH(sc->sc_hcca->hcca_done_head) & ~OHCI_DONE_INTRS; 1456 sc->sc_hcca->hcca_done_head = 0; 1457 usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head), 1458 sizeof(sc->sc_hcca->hcca_done_head), 1459 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1460 OWRITE4(sc, OHCI_INTERRUPT_STATUS, OHCI_WDH); 1461 sc->sc_eintrs |= OHCI_WDH; 1462 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_WDH); 1463 1464 /* Reverse the done list. */ 1465 for (sdone = NULL, sidone = NULL; done != 0; ) { 1466 std = ohci_hash_find_td(sc, done); 1467 if (std != NULL) { 1468 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 1469 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1470 std->dnext = sdone; 1471 done = O32TOH(std->td.td_nexttd); 1472 sdone = std; 1473 DPRINTFN(10, "add TD %p", std, 0, 0, 0); 1474 continue; 1475 } 1476 sitd = ohci_hash_find_itd(sc, done); 1477 if (sitd != NULL) { 1478 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 1479 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1480 sitd->dnext = sidone; 1481 done = O32TOH(sitd->itd.itd_nextitd); 1482 sidone = sitd; 1483 DPRINTFN(5, "add ITD %p", sitd, 0, 0, 0); 1484 continue; 1485 } 1486 DPRINTFN(10, "addr %p not found", done, 0, 0, 0); 1487 device_printf(sc->sc_dev, "WARNING: addr 0x%08lx not found\n", 1488 (u_long)done); 1489 break; 1490 } 1491 1492 DPRINTFN(10, "sdone=%p sidone=%p", sdone, sidone, 0, 0); 1493 DPRINTFN(10, "--- TD dump start ---", 0, 0, 0, 0); 1494 #ifdef OHCI_DEBUG 1495 if (ohcidebug >= 10) { 1496 for (std = sdone; std; std = std->dnext) 1497 ohci_dump_td(sc, std); 1498 } 1499 #endif 1500 DPRINTFN(10, "--- TD dump end ---", 0, 0, 0, 0); 1501 1502 for (std = sdone; std; std = stdnext) { 1503 xfer = std->xfer; 1504 stdnext = std->dnext; 1505 DPRINTFN(10, "std=%p xfer=%p hcpriv=%p", std, xfer, 1506 xfer ? xfer->ux_hcpriv : 0, 0); 1507 if (xfer == NULL) { 1508 /* 1509 * xfer == NULL: There seems to be no xfer associated 1510 * with this TD. It is tailp that happened to end up on 1511 * the done queue. 1512 * Shouldn't happen, but some chips are broken(?). 1513 */ 1514 continue; 1515 } 1516 if (xfer->ux_status == USBD_CANCELLED || 1517 xfer->ux_status == USBD_TIMEOUT) { 1518 DPRINTF("cancel/timeout %p", xfer, 0, 0, 0); 1519 /* Handled by abort routine. */ 1520 continue; 1521 } 1522 callout_stop(&xfer->ux_callout); 1523 1524 len = std->len; 1525 if (std->td.td_cbp != 0) 1526 len -= O32TOH(std->td.td_be) - 1527 O32TOH(std->td.td_cbp) + 1; 1528 DPRINTFN(10, "len=%d, flags=0x%x", len, std->flags, 0, 0); 1529 if (std->flags & OHCI_ADD_LEN) 1530 xfer->ux_actlen += len; 1531 1532 cc = OHCI_TD_GET_CC(O32TOH(std->td.td_flags)); 1533 if (cc == OHCI_CC_NO_ERROR) { 1534 ohci_hash_rem_td(sc, std); 1535 if (std->flags & OHCI_CALL_DONE) { 1536 xfer->ux_status = USBD_NORMAL_COMPLETION; 1537 usb_transfer_complete(xfer); 1538 } 1539 } else { 1540 /* 1541 * Endpoint is halted. First unlink all the TDs 1542 * belonging to the failed transfer, and then restart 1543 * the endpoint. 1544 */ 1545 ohci_soft_td_t *p, *n; 1546 opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 1547 1548 DPRINTFN(10, "error cc=%d", cc, 0, 0, 0); 1549 1550 /* remove xfer's TDs from the hash */ 1551 for (p = std; p->xfer == xfer; p = n) { 1552 n = p->nexttd; 1553 ohci_hash_rem_td(sc, p); 1554 } 1555 1556 ohci_soft_ed_t *sed = opipe->sed; 1557 1558 /* clear halt and TD chain */ 1559 sed->ed.ed_headp = HTOO32(p->physaddr); 1560 usb_syncmem(&sed->dma, 1561 sed->offs + offsetof(ohci_ed_t, ed_headp), 1562 sizeof(sed->ed.ed_headp), 1563 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1564 1565 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1566 1567 if (cc == OHCI_CC_DATA_UNDERRUN) 1568 xfer->ux_status = USBD_NORMAL_COMPLETION; 1569 else if (cc == OHCI_CC_STALL) 1570 xfer->ux_status = USBD_STALLED; 1571 else 1572 xfer->ux_status = USBD_IOERROR; 1573 usb_transfer_complete(xfer); 1574 } 1575 } 1576 DPRINTFN(10, "--- ITD dump start ---", 0, 0, 0, 0); 1577 #ifdef OHCI_DEBUG 1578 if (ohcidebug >= 10) { 1579 for (sitd = sidone; sitd; sitd = sitd->dnext) 1580 ohci_dump_itd(sc, sitd); 1581 } 1582 #endif 1583 DPRINTFN(10, "--- ITD dump end ---", 0, 0, 0, 0); 1584 1585 for (sitd = sidone; sitd != NULL; sitd = sitdnext) { 1586 xfer = sitd->xfer; 1587 sitdnext = sitd->dnext; 1588 DPRINTFN(1, "sitd=%p xfer=%p hcpriv=%p", sitd, xfer, 1589 xfer ? xfer->ux_hcpriv : 0, 0); 1590 if (xfer == NULL) 1591 continue; 1592 if (xfer->ux_status == USBD_CANCELLED || 1593 xfer->ux_status == USBD_TIMEOUT) { 1594 DPRINTF("cancel/timeout %p", xfer, 0, 0, 0); 1595 /* Handled by abort routine. */ 1596 continue; 1597 } 1598 KASSERT(!sitd->isdone); 1599 #ifdef DIAGNOSTIC 1600 sitd->isdone = true; 1601 #endif 1602 if (sitd->flags & OHCI_CALL_DONE) { 1603 ohci_soft_itd_t *next; 1604 1605 opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 1606 opipe->isoc.inuse -= xfer->ux_nframes; 1607 uedir = UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc-> 1608 bEndpointAddress); 1609 xfer->ux_status = USBD_NORMAL_COMPLETION; 1610 actlen = 0; 1611 for (i = 0, sitd = xfer->ux_hcpriv;; 1612 sitd = next) { 1613 next = sitd->nextitd; 1614 if (OHCI_ITD_GET_CC(O32TOH(sitd-> 1615 itd.itd_flags)) != OHCI_CC_NO_ERROR) 1616 xfer->ux_status = USBD_IOERROR; 1617 /* For input, update frlengths with actual */ 1618 /* XXX anything necessary for output? */ 1619 if (uedir == UE_DIR_IN && 1620 xfer->ux_status == USBD_NORMAL_COMPLETION) { 1621 iframes = OHCI_ITD_GET_FC(O32TOH( 1622 sitd->itd.itd_flags)); 1623 for (j = 0; j < iframes; i++, j++) { 1624 len = O16TOH(sitd-> 1625 itd.itd_offset[j]); 1626 if ((OHCI_ITD_PSW_GET_CC(len) & 1627 OHCI_CC_NOT_ACCESSED_MASK) 1628 == OHCI_CC_NOT_ACCESSED) 1629 len = 0; 1630 else 1631 len = OHCI_ITD_PSW_LENGTH(len); 1632 xfer->ux_frlengths[i] = len; 1633 actlen += len; 1634 } 1635 } 1636 if (sitd->flags & OHCI_CALL_DONE) 1637 break; 1638 ohci_hash_rem_itd(sc, sitd); 1639 1640 } 1641 ohci_hash_rem_itd(sc, sitd); 1642 if (uedir == UE_DIR_IN && 1643 xfer->ux_status == USBD_NORMAL_COMPLETION) 1644 xfer->ux_actlen = actlen; 1645 xfer->ux_hcpriv = NULL; 1646 1647 usb_transfer_complete(xfer); 1648 } 1649 } 1650 1651 if (sc->sc_softwake) { 1652 sc->sc_softwake = 0; 1653 cv_broadcast(&sc->sc_softwake_cv); 1654 } 1655 1656 DPRINTFN(10, "done", 0, 0, 0, 0); 1657 } 1658 1659 void 1660 ohci_device_ctrl_done(struct usbd_xfer *xfer) 1661 { 1662 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 1663 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 1664 int len = UGETW(xfer->ux_request.wLength); 1665 int isread = (xfer->ux_request.bmRequestType & UT_READ); 1666 1667 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1668 DPRINTFN(10, "xfer=%p", xfer, 0, 0, 0); 1669 1670 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1671 KASSERT(xfer->ux_rqflags & URQ_REQUEST); 1672 1673 if (len) 1674 usb_syncmem(&xfer->ux_dmabuf, 0, len, 1675 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1676 usb_syncmem(&opipe->ctrl.reqdma, 0, 1677 sizeof(usb_device_request_t), BUS_DMASYNC_POSTWRITE); 1678 } 1679 1680 void 1681 ohci_device_intr_done(struct usbd_xfer *xfer) 1682 { 1683 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 1684 int isread = 1685 (UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress) == UE_DIR_IN); 1686 1687 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1688 DPRINTFN(10, "xfer=%p, actlen=%d", xfer, xfer->ux_actlen, 0, 0); 1689 1690 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1691 1692 usb_syncmem(&xfer->ux_dmabuf, 0, xfer->ux_length, 1693 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1694 } 1695 1696 void 1697 ohci_device_bulk_done(struct usbd_xfer *xfer) 1698 { 1699 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 1700 1701 int isread = 1702 (UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress) == UE_DIR_IN); 1703 1704 KASSERT(mutex_owned(&sc->sc_lock)); 1705 1706 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1707 DPRINTFN(10, "xfer=%p, actlen=%d", xfer, xfer->ux_actlen, 0, 0); 1708 usb_syncmem(&xfer->ux_dmabuf, 0, xfer->ux_length, 1709 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1710 } 1711 1712 Static void 1713 ohci_rhsc_softint(void *arg) 1714 { 1715 ohci_softc_t *sc = arg; 1716 1717 mutex_enter(&sc->sc_lock); 1718 1719 ohci_rhsc(sc, sc->sc_intrxfer); 1720 1721 /* Do not allow RHSC interrupts > 1 per second */ 1722 callout_reset(&sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc); 1723 1724 mutex_exit(&sc->sc_lock); 1725 } 1726 1727 void 1728 ohci_rhsc(ohci_softc_t *sc, struct usbd_xfer *xfer) 1729 { 1730 u_char *p; 1731 int i, m; 1732 int hstatus __unused; 1733 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1734 1735 KASSERT(mutex_owned(&sc->sc_lock)); 1736 1737 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1738 DPRINTF("sc=%p xfer=%p hstatus=0x%08x", sc, xfer, hstatus, 0); 1739 1740 if (xfer == NULL) { 1741 /* Just ignore the change. */ 1742 return; 1743 } 1744 1745 p = xfer->ux_buf; 1746 m = min(sc->sc_noport, xfer->ux_length * 8 - 1); 1747 memset(p, 0, xfer->ux_length); 1748 for (i = 1; i <= m; i++) { 1749 /* Pick out CHANGE bits from the status reg. */ 1750 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1751 p[i/8] |= 1 << (i%8); 1752 } 1753 DPRINTF("change=0x%02x", *p, 0, 0, 0); 1754 xfer->ux_actlen = xfer->ux_length; 1755 xfer->ux_status = USBD_NORMAL_COMPLETION; 1756 1757 usb_transfer_complete(xfer); 1758 } 1759 1760 void 1761 ohci_root_intr_done(struct usbd_xfer *xfer) 1762 { 1763 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 1764 1765 KASSERT(mutex_owned(&sc->sc_lock)); 1766 1767 KASSERT(sc->sc_intrxfer == xfer); 1768 sc->sc_intrxfer = NULL; 1769 } 1770 1771 /* 1772 * Wait here until controller claims to have an interrupt. 1773 * Then call ohci_intr and return. Use timeout to avoid waiting 1774 * too long. 1775 */ 1776 void 1777 ohci_waitintr(ohci_softc_t *sc, struct usbd_xfer *xfer) 1778 { 1779 int timo; 1780 uint32_t intrs; 1781 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1782 1783 mutex_enter(&sc->sc_lock); 1784 1785 xfer->ux_status = USBD_IN_PROGRESS; 1786 for (timo = xfer->ux_timeout; timo >= 0; timo--) { 1787 usb_delay_ms(&sc->sc_bus, 1); 1788 if (sc->sc_dying) 1789 break; 1790 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 1791 DPRINTFN(15, "intrs 0x%04x", intrs, 0, 0, 0); 1792 #ifdef OHCI_DEBUG 1793 if (ohcidebug > 15) 1794 ohci_dumpregs(sc); 1795 #endif 1796 if (intrs) { 1797 mutex_spin_enter(&sc->sc_intr_lock); 1798 ohci_intr1(sc); 1799 mutex_spin_exit(&sc->sc_intr_lock); 1800 if (xfer->ux_status != USBD_IN_PROGRESS) 1801 goto done; 1802 } 1803 } 1804 1805 /* Timeout */ 1806 DPRINTF("timeout", 0, 0, 0, 0); 1807 xfer->ux_status = USBD_TIMEOUT; 1808 usb_transfer_complete(xfer); 1809 1810 done: 1811 mutex_exit(&sc->sc_lock); 1812 } 1813 1814 void 1815 ohci_poll(struct usbd_bus *bus) 1816 { 1817 ohci_softc_t *sc = OHCI_BUS2SC(bus); 1818 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1819 1820 #ifdef OHCI_DEBUG 1821 static int last; 1822 int new; 1823 new = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1824 if (new != last) { 1825 DPRINTFN(10, "intrs=0x%04x", new, 0, 0, 0); 1826 last = new; 1827 } 1828 #endif 1829 sc->sc_eintrs |= OHCI_WDH; 1830 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) { 1831 mutex_spin_enter(&sc->sc_intr_lock); 1832 ohci_intr1(sc); 1833 mutex_spin_exit(&sc->sc_intr_lock); 1834 } 1835 } 1836 1837 /* 1838 * Add an ED to the schedule. Called with USB lock held. 1839 */ 1840 Static void 1841 ohci_add_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1842 { 1843 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1844 DPRINTFN(8, "sed=%p head=%p", sed, head, 0, 0); 1845 1846 KASSERT(mutex_owned(&sc->sc_lock)); 1847 1848 usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted), 1849 sizeof(head->ed.ed_nexted), 1850 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1851 sed->next = head->next; 1852 sed->ed.ed_nexted = head->ed.ed_nexted; 1853 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted), 1854 sizeof(sed->ed.ed_nexted), 1855 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1856 head->next = sed; 1857 head->ed.ed_nexted = HTOO32(sed->physaddr); 1858 usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted), 1859 sizeof(head->ed.ed_nexted), 1860 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1861 } 1862 1863 /* 1864 * Remove an ED from the schedule. Called with USB lock held. 1865 */ 1866 Static void 1867 ohci_rem_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1868 { 1869 ohci_soft_ed_t *p; 1870 1871 KASSERT(mutex_owned(&sc->sc_lock)); 1872 1873 /* XXX */ 1874 for (p = head; p != NULL && p->next != sed; p = p->next) 1875 ; 1876 KASSERT(p != NULL); 1877 1878 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted), 1879 sizeof(sed->ed.ed_nexted), 1880 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1881 p->next = sed->next; 1882 p->ed.ed_nexted = sed->ed.ed_nexted; 1883 usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted), 1884 sizeof(p->ed.ed_nexted), 1885 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1886 } 1887 1888 /* 1889 * When a transfer is completed the TD is added to the done queue by 1890 * the host controller. This queue is the processed by software. 1891 * Unfortunately the queue contains the physical address of the TD 1892 * and we have no simple way to translate this back to a kernel address. 1893 * To make the translation possible (and fast) we use a hash table of 1894 * TDs currently in the schedule. The physical address is used as the 1895 * hash value. 1896 */ 1897 1898 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1899 /* Called with USB lock held. */ 1900 void 1901 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1902 { 1903 int h = HASH(std->physaddr); 1904 1905 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1906 1907 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1908 } 1909 1910 /* Called with USB lock held. */ 1911 void 1912 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1913 { 1914 1915 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1916 1917 LIST_REMOVE(std, hnext); 1918 } 1919 1920 ohci_soft_td_t * 1921 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a) 1922 { 1923 int h = HASH(a); 1924 ohci_soft_td_t *std; 1925 1926 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1927 std != NULL; 1928 std = LIST_NEXT(std, hnext)) 1929 if (std->physaddr == a) 1930 return std; 1931 return NULL; 1932 } 1933 1934 /* Called with USB lock held. */ 1935 void 1936 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1937 { 1938 int h = HASH(sitd->physaddr); 1939 1940 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1941 1942 KASSERT(mutex_owned(&sc->sc_lock)); 1943 1944 DPRINTFN(10, "sitd=%p physaddr=0x%08lx", sitd, (u_long)sitd->physaddr, 1945 0, 0); 1946 1947 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext); 1948 } 1949 1950 /* Called with USB lock held. */ 1951 void 1952 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1953 { 1954 1955 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1956 1957 KASSERT(mutex_owned(&sc->sc_lock)); 1958 1959 DPRINTFN(10, "sitd=%p physaddr=0x%08lx", sitd, (u_long)sitd->physaddr, 1960 0, 0); 1961 1962 LIST_REMOVE(sitd, hnext); 1963 } 1964 1965 ohci_soft_itd_t * 1966 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a) 1967 { 1968 int h = HASH(a); 1969 ohci_soft_itd_t *sitd; 1970 1971 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]); 1972 sitd != NULL; 1973 sitd = LIST_NEXT(sitd, hnext)) 1974 if (sitd->physaddr == a) 1975 return sitd; 1976 return NULL; 1977 } 1978 1979 void 1980 ohci_timeout(void *addr) 1981 { 1982 struct usbd_xfer *xfer = addr; 1983 struct ohci_xfer *oxfer = OHCI_XFER2OXFER(xfer); 1984 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 1985 1986 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1987 DPRINTF("oxfer=%p", oxfer, 0, 0, 0); 1988 1989 if (sc->sc_dying) { 1990 mutex_enter(&sc->sc_lock); 1991 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1992 mutex_exit(&sc->sc_lock); 1993 return; 1994 } 1995 1996 /* Execute the abort in a process context. */ 1997 usb_init_task(&oxfer->abort_task, ohci_timeout_task, addr, 1998 USB_TASKQ_MPSAFE); 1999 usb_add_task(xfer->ux_pipe->up_dev, &oxfer->abort_task, 2000 USB_TASKQ_HC); 2001 } 2002 2003 void 2004 ohci_timeout_task(void *addr) 2005 { 2006 struct usbd_xfer *xfer = addr; 2007 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2008 2009 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2010 2011 DPRINTF("xfer=%p", xfer, 0, 0, 0); 2012 2013 mutex_enter(&sc->sc_lock); 2014 ohci_abort_xfer(xfer, USBD_TIMEOUT); 2015 mutex_exit(&sc->sc_lock); 2016 } 2017 2018 #ifdef OHCI_DEBUG 2019 void 2020 ohci_dump_tds(ohci_softc_t *sc, ohci_soft_td_t *std) 2021 { 2022 for (; std; std = std->nexttd) { 2023 ohci_dump_td(sc, std); 2024 KASSERTMSG(std->nexttd == NULL || std != std->nexttd, 2025 "std %p next %p", std, std->nexttd); 2026 } 2027 } 2028 2029 void 2030 ohci_dump_td(ohci_softc_t *sc, ohci_soft_td_t *std) 2031 { 2032 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2033 2034 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 2035 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2036 2037 uint32_t flags = O32TOH(std->td.td_flags); 2038 DPRINTF("TD(%p) at 0x%08lx:", std, (u_long)std->physaddr, 0, 0); 2039 DPRINTF(" round=%d DP=%x DI=%x T=%x", 2040 !!(flags & OHCI_TD_R), 2041 __SHIFTOUT(flags, OHCI_TD_DP_MASK), 2042 OHCI_TD_GET_DI(flags), 2043 __SHIFTOUT(flags, OHCI_TD_TOGGLE_MASK)); 2044 DPRINTF(" EC=%d CC=%d", OHCI_TD_GET_EC(flags), OHCI_TD_GET_CC(flags), 2045 0, 0); 2046 DPRINTF(" td_cbp=0x%08lx td_nexttd=0x%08lx td_be=0x%08lx", 2047 (u_long)O32TOH(std->td.td_cbp), 2048 (u_long)O32TOH(std->td.td_nexttd), 2049 (u_long)O32TOH(std->td.td_be), 0); 2050 } 2051 2052 void 2053 ohci_dump_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 2054 { 2055 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2056 2057 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 2058 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2059 2060 uint32_t flags = O32TOH(sitd->itd.itd_flags); 2061 DPRINTF("ITD(%p) at 0x%08lx", sitd, (u_long)sitd->physaddr, 0, 0); 2062 DPRINTF(" sf=%d di=%d fc=%d cc=%d", 2063 OHCI_ITD_GET_SF(flags), OHCI_ITD_GET_DI(flags), 2064 OHCI_ITD_GET_FC(flags), OHCI_ITD_GET_CC(flags)); 2065 DPRINTF(" bp0=0x%08x next=0x%08x be=0x%08x", 2066 O32TOH(sitd->itd.itd_bp0), 2067 O32TOH(sitd->itd.itd_nextitd), 2068 O32TOH(sitd->itd.itd_be), 0); 2069 CTASSERT(OHCI_ITD_NOFFSET == 8); 2070 DPRINTF(" offs[0] = 0x%04x offs[1] = 0x%04x " 2071 "offs[2] = 0x%04x offs[3] = 0x%04x", 2072 O16TOH(sitd->itd.itd_offset[0]), 2073 O16TOH(sitd->itd.itd_offset[1]), 2074 O16TOH(sitd->itd.itd_offset[2]), 2075 O16TOH(sitd->itd.itd_offset[3])); 2076 DPRINTF(" offs[4] = 0x%04x offs[5] = 0x%04x " 2077 "offs[6] = 0x%04x offs[7] = 0x%04x", 2078 O16TOH(sitd->itd.itd_offset[4]), 2079 O16TOH(sitd->itd.itd_offset[5]), 2080 O16TOH(sitd->itd.itd_offset[6]), 2081 O16TOH(sitd->itd.itd_offset[7])); 2082 } 2083 2084 void 2085 ohci_dump_itds(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 2086 { 2087 for (; sitd; sitd = sitd->nextitd) 2088 ohci_dump_itd(sc, sitd); 2089 } 2090 2091 void 2092 ohci_dump_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 2093 { 2094 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2095 2096 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 2097 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2098 2099 uint32_t flags = O32TOH(sed->ed.ed_flags); 2100 DPRINTF("ED(%p) at 0x%08lx:", sed, sed->physaddr, 0, 0); 2101 DPRINTF(" addr=%d endpt=%d maxp=%d", 2102 OHCI_ED_GET_FA(flags), 2103 OHCI_ED_GET_EN(flags), 2104 OHCI_ED_GET_MAXP(flags), 2105 0); 2106 DPRINTF(" dir=%d speed=%d skip=%d iso=%d", 2107 __SHIFTOUT(flags, OHCI_ED_DIR_MASK), 2108 !!(flags & OHCI_ED_SPEED), 2109 !!(flags & OHCI_ED_SKIP), 2110 !!(flags & OHCI_ED_FORMAT_ISO)); 2111 DPRINTF(" tailp=0x%08lx", (u_long)O32TOH(sed->ed.ed_tailp), 2112 0, 0, 0); 2113 DPRINTF(" headp=0x%08lx nexted=0x%08lx halted=%d carry=%d", 2114 O32TOH(sed->ed.ed_headp), O32TOH(sed->ed.ed_nexted), 2115 !!(O32TOH(sed->ed.ed_headp) & OHCI_HALTED), 2116 !!(O32TOH(sed->ed.ed_headp) & OHCI_TOGGLECARRY)); 2117 } 2118 #endif 2119 2120 usbd_status 2121 ohci_open(struct usbd_pipe *pipe) 2122 { 2123 struct usbd_device *dev = pipe->up_dev; 2124 struct usbd_bus *bus = dev->ud_bus; 2125 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 2126 usb_endpoint_descriptor_t *ed = pipe->up_endpoint->ue_edesc; 2127 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 2128 uint8_t addr = dev->ud_addr; 2129 uint8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 2130 ohci_soft_ed_t *sed; 2131 ohci_soft_td_t *std; 2132 ohci_soft_itd_t *sitd; 2133 ohci_physaddr_t tdphys; 2134 uint32_t fmt; 2135 usbd_status err = USBD_NOMEM; 2136 int ival; 2137 2138 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2139 DPRINTFN(1, "pipe=%p, addr=%d, endpt=%d (%d)", pipe, addr, 2140 ed->bEndpointAddress, bus->ub_rhaddr); 2141 2142 if (sc->sc_dying) { 2143 return USBD_IOERROR; 2144 } 2145 2146 std = NULL; 2147 sed = NULL; 2148 2149 if (addr == bus->ub_rhaddr) { 2150 switch (ed->bEndpointAddress) { 2151 case USB_CONTROL_ENDPOINT: 2152 pipe->up_methods = &roothub_ctrl_methods; 2153 break; 2154 case UE_DIR_IN | USBROOTHUB_INTR_ENDPT: 2155 pipe->up_methods = &ohci_root_intr_methods; 2156 break; 2157 default: 2158 err = USBD_INVAL; 2159 goto bad; 2160 } 2161 } else { 2162 sed = ohci_alloc_sed(sc); 2163 if (sed == NULL) 2164 goto bad; 2165 opipe->sed = sed; 2166 if (xfertype == UE_ISOCHRONOUS) { 2167 sitd = ohci_alloc_sitd(sc); 2168 if (sitd == NULL) 2169 goto bad; 2170 2171 opipe->tail.itd = sitd; 2172 tdphys = sitd->physaddr; 2173 fmt = OHCI_ED_FORMAT_ISO; 2174 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 2175 fmt |= OHCI_ED_DIR_IN; 2176 else 2177 fmt |= OHCI_ED_DIR_OUT; 2178 } else { 2179 std = ohci_alloc_std(sc); 2180 if (std == NULL) 2181 goto bad; 2182 2183 opipe->tail.td = std; 2184 tdphys = std->physaddr; 2185 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD; 2186 } 2187 sed->ed.ed_flags = HTOO32( 2188 OHCI_ED_SET_FA(addr) | 2189 OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) | 2190 (dev->ud_speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) | 2191 fmt | 2192 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 2193 sed->ed.ed_headp = HTOO32(tdphys | 2194 (pipe->up_endpoint->ue_toggle ? OHCI_TOGGLECARRY : 0)); 2195 sed->ed.ed_tailp = HTOO32(tdphys); 2196 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 2197 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2198 2199 switch (xfertype) { 2200 case UE_CONTROL: 2201 pipe->up_methods = &ohci_device_ctrl_methods; 2202 err = usb_allocmem(&sc->sc_bus, 2203 sizeof(usb_device_request_t), 2204 0, &opipe->ctrl.reqdma); 2205 if (err) 2206 goto bad; 2207 mutex_enter(&sc->sc_lock); 2208 ohci_add_ed(sc, sed, sc->sc_ctrl_head); 2209 mutex_exit(&sc->sc_lock); 2210 break; 2211 case UE_INTERRUPT: 2212 pipe->up_methods = &ohci_device_intr_methods; 2213 ival = pipe->up_interval; 2214 if (ival == USBD_DEFAULT_INTERVAL) 2215 ival = ed->bInterval; 2216 err = ohci_device_setintr(sc, opipe, ival); 2217 if (err) 2218 goto bad; 2219 break; 2220 case UE_ISOCHRONOUS: 2221 pipe->up_methods = &ohci_device_isoc_methods; 2222 return ohci_setup_isoc(pipe); 2223 case UE_BULK: 2224 pipe->up_methods = &ohci_device_bulk_methods; 2225 mutex_enter(&sc->sc_lock); 2226 ohci_add_ed(sc, sed, sc->sc_bulk_head); 2227 mutex_exit(&sc->sc_lock); 2228 break; 2229 } 2230 } 2231 2232 return USBD_NORMAL_COMPLETION; 2233 2234 bad: 2235 if (std != NULL) { 2236 ohci_free_std(sc, std); 2237 } 2238 if (sed != NULL) 2239 ohci_free_sed(sc, sed); 2240 return err; 2241 2242 } 2243 2244 /* 2245 * Close a reqular pipe. 2246 * Assumes that there are no pending transactions. 2247 */ 2248 void 2249 ohci_close_pipe(struct usbd_pipe *pipe, ohci_soft_ed_t *head) 2250 { 2251 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 2252 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 2253 ohci_soft_ed_t *sed = opipe->sed; 2254 2255 KASSERT(mutex_owned(&sc->sc_lock)); 2256 2257 #ifdef DIAGNOSTIC 2258 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 2259 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2260 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) { 2261 ohci_soft_td_t *std; 2262 std = ohci_hash_find_td(sc, O32TOH(sed->ed.ed_headp)); 2263 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 2264 "tl=0x%x pipe=%p, std=%p\n", sed, 2265 (int)O32TOH(sed->ed.ed_headp), 2266 (int)O32TOH(sed->ed.ed_tailp), 2267 pipe, std); 2268 #ifdef OHCI_DEBUG 2269 usbd_dump_pipe(&opipe->pipe); 2270 ohci_dump_ed(sc, sed); 2271 if (std) 2272 ohci_dump_td(sc, std); 2273 #endif 2274 usb_delay_ms(&sc->sc_bus, 2); 2275 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2276 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) 2277 printf("ohci_close_pipe: pipe still not empty\n"); 2278 } 2279 #endif 2280 ohci_rem_ed(sc, sed, head); 2281 /* Make sure the host controller is not touching this ED */ 2282 usb_delay_ms(&sc->sc_bus, 1); 2283 pipe->up_endpoint->ue_toggle = 2284 (O32TOH(sed->ed.ed_headp) & OHCI_TOGGLECARRY) ? 1 : 0; 2285 ohci_free_sed_locked(sc, opipe->sed); 2286 } 2287 2288 /* 2289 * Abort a device request. 2290 * If this routine is called at splusb() it guarantees that the request 2291 * will be removed from the hardware scheduling and that the callback 2292 * for it will be called with USBD_CANCELLED status. 2293 * It's impossible to guarantee that the requested transfer will not 2294 * have happened since the hardware runs concurrently. 2295 * If the transaction has already happened we rely on the ordinary 2296 * interrupt processing to process it. 2297 * XXX This is most probably wrong. 2298 * XXXMRG this doesn't make sense anymore. 2299 */ 2300 void 2301 ohci_abort_xfer(struct usbd_xfer *xfer, usbd_status status) 2302 { 2303 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 2304 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2305 ohci_soft_ed_t *sed = opipe->sed; 2306 ohci_soft_td_t *p, *n; 2307 ohci_physaddr_t headp; 2308 int hit; 2309 int wake; 2310 2311 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2312 DPRINTF("xfer=%p pipe=%p sed=%p", xfer, opipe,sed, 0); 2313 2314 KASSERT(mutex_owned(&sc->sc_lock)); 2315 ASSERT_SLEEPABLE(); 2316 2317 if (sc->sc_dying) { 2318 /* If we're dying, just do the software part. */ 2319 xfer->ux_status = status; /* make software ignore it */ 2320 callout_halt(&xfer->ux_callout, &sc->sc_lock); 2321 usb_transfer_complete(xfer); 2322 return; 2323 } 2324 2325 /* 2326 * If an abort is already in progress then just wait for it to 2327 * complete and return. 2328 */ 2329 if (xfer->ux_hcflags & UXFER_ABORTING) { 2330 DPRINTFN(2, "already aborting", 0, 0, 0, 0); 2331 #ifdef DIAGNOSTIC 2332 if (status == USBD_TIMEOUT) 2333 printf("%s: TIMEOUT while aborting\n", __func__); 2334 #endif 2335 /* Override the status which might be USBD_TIMEOUT. */ 2336 xfer->ux_status = status; 2337 DPRINTFN(2, "waiting for abort to finish", 0, 0, 0, 0); 2338 xfer->ux_hcflags |= UXFER_ABORTWAIT; 2339 while (xfer->ux_hcflags & UXFER_ABORTING) 2340 cv_wait(&xfer->ux_hccv, &sc->sc_lock); 2341 goto done; 2342 } 2343 xfer->ux_hcflags |= UXFER_ABORTING; 2344 2345 /* 2346 * Step 1: Make interrupt routine and hardware ignore xfer. 2347 */ 2348 xfer->ux_status = status; /* make software ignore it */ 2349 callout_stop(&xfer->ux_callout); 2350 DPRINTFN(1, "stop ed=%p", sed, 0, 0, 0); 2351 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2352 sizeof(sed->ed.ed_flags), 2353 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2354 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */ 2355 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2356 sizeof(sed->ed.ed_flags), 2357 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2358 2359 /* 2360 * Step 2: Wait until we know hardware has finished any possible 2361 * use of the xfer. Also make sure the soft interrupt routine 2362 * has run. 2363 */ 2364 /* Hardware finishes in 1ms */ 2365 usb_delay_ms_locked(opipe->pipe.up_dev->ud_bus, 20, &sc->sc_lock); 2366 sc->sc_softwake = 1; 2367 usb_schedsoftintr(&sc->sc_bus); 2368 cv_wait(&sc->sc_softwake_cv, &sc->sc_lock); 2369 2370 /* 2371 * Step 3: Remove any vestiges of the xfer from the hardware. 2372 * The complication here is that the hardware may have executed 2373 * beyond the xfer we're trying to abort. So as we're scanning 2374 * the TDs of this xfer we check if the hardware points to 2375 * any of them. 2376 */ 2377 p = xfer->ux_hcpriv; 2378 KASSERT(p); 2379 2380 #ifdef OHCI_DEBUG 2381 DPRINTF("--- dump start ---", 0, 0, 0, 0); 2382 2383 if (ohcidebug >= 2) { 2384 DPRINTF("sed:", 0, 0, 0, 0); 2385 ohci_dump_ed(sc, sed); 2386 ohci_dump_tds(sc, p); 2387 } 2388 DPRINTF("--- dump end ---", 0, 0, 0, 0); 2389 #endif 2390 headp = O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK; 2391 hit = 0; 2392 for (; p->xfer == xfer; p = n) { 2393 hit |= headp == p->physaddr; 2394 n = p->nexttd; 2395 ohci_hash_rem_td(sc, p); 2396 } 2397 /* Zap headp register if hardware pointed inside the xfer. */ 2398 if (hit) { 2399 DPRINTFN(1, "set hd=0x%08x, tl=0x%08x", (int)p->physaddr, 2400 (int)O32TOH(sed->ed.ed_tailp), 0, 0); 2401 sed->ed.ed_headp = HTOO32(p->physaddr); /* unlink TDs */ 2402 usb_syncmem(&sed->dma, 2403 sed->offs + offsetof(ohci_ed_t, ed_headp), 2404 sizeof(sed->ed.ed_headp), 2405 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2406 } else { 2407 DPRINTFN(1, "no hit", 0, 0, 0, 0); 2408 } 2409 2410 /* 2411 * Step 4: Turn on hardware again. 2412 */ 2413 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2414 sizeof(sed->ed.ed_flags), 2415 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2416 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */ 2417 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2418 sizeof(sed->ed.ed_flags), 2419 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2420 2421 /* 2422 * Step 5: Execute callback. 2423 */ 2424 wake = xfer->ux_hcflags & UXFER_ABORTWAIT; 2425 xfer->ux_hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT); 2426 usb_transfer_complete(xfer); 2427 if (wake) 2428 cv_broadcast(&xfer->ux_hccv); 2429 2430 done: 2431 KASSERT(mutex_owned(&sc->sc_lock)); 2432 } 2433 2434 /* 2435 * Data structures and routines to emulate the root hub. 2436 */ 2437 Static int 2438 ohci_roothub_ctrl(struct usbd_bus *bus, usb_device_request_t *req, 2439 void *buf, int buflen) 2440 { 2441 ohci_softc_t *sc = OHCI_BUS2SC(bus); 2442 usb_port_status_t ps; 2443 uint16_t len, value, index; 2444 int l, totlen = 0; 2445 int port, i; 2446 uint32_t v; 2447 2448 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2449 2450 if (sc->sc_dying) 2451 return -1; 2452 2453 DPRINTFN(4, "type=0x%02x request=%02x", req->bmRequestType, 2454 req->bRequest, 0, 0); 2455 2456 len = UGETW(req->wLength); 2457 value = UGETW(req->wValue); 2458 index = UGETW(req->wIndex); 2459 2460 #define C(x,y) ((x) | ((y) << 8)) 2461 switch (C(req->bRequest, req->bmRequestType)) { 2462 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2463 DPRINTFN(8, "wValue=0x%04x", value, 0, 0, 0); 2464 if (len == 0) 2465 break; 2466 switch (value) { 2467 case C(0, UDESC_DEVICE): { 2468 usb_device_descriptor_t devd; 2469 2470 totlen = min(buflen, sizeof(devd)); 2471 memcpy(&devd, buf, totlen); 2472 USETW(devd.idVendor, sc->sc_id_vendor); 2473 memcpy(buf, &devd, totlen); 2474 break; 2475 } 2476 case C(1, UDESC_STRING): 2477 #define sd ((usb_string_descriptor_t *)buf) 2478 /* Vendor */ 2479 totlen = usb_makestrdesc(sd, len, sc->sc_vendor); 2480 break; 2481 case C(2, UDESC_STRING): 2482 /* Product */ 2483 totlen = usb_makestrdesc(sd, len, "OHCI root hub"); 2484 break; 2485 #undef sd 2486 default: 2487 /* default from usbroothub */ 2488 return buflen; 2489 } 2490 break; 2491 2492 /* Hub requests */ 2493 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2494 break; 2495 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2496 DPRINTFN(8, "UR_CLEAR_PORT_FEATURE port=%d feature=%d", 2497 index, value, 0, 0); 2498 if (index < 1 || index > sc->sc_noport) { 2499 return -1; 2500 } 2501 port = OHCI_RH_PORT_STATUS(index); 2502 switch(value) { 2503 case UHF_PORT_ENABLE: 2504 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2505 break; 2506 case UHF_PORT_SUSPEND: 2507 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2508 break; 2509 case UHF_PORT_POWER: 2510 /* Yes, writing to the LOW_SPEED bit clears power. */ 2511 OWRITE4(sc, port, UPS_LOW_SPEED); 2512 break; 2513 case UHF_C_PORT_CONNECTION: 2514 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2515 break; 2516 case UHF_C_PORT_ENABLE: 2517 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2518 break; 2519 case UHF_C_PORT_SUSPEND: 2520 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2521 break; 2522 case UHF_C_PORT_OVER_CURRENT: 2523 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2524 break; 2525 case UHF_C_PORT_RESET: 2526 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2527 break; 2528 default: 2529 return -1; 2530 } 2531 switch(value) { 2532 case UHF_C_PORT_CONNECTION: 2533 case UHF_C_PORT_ENABLE: 2534 case UHF_C_PORT_SUSPEND: 2535 case UHF_C_PORT_OVER_CURRENT: 2536 case UHF_C_PORT_RESET: 2537 /* Enable RHSC interrupt if condition is cleared. */ 2538 if ((OREAD4(sc, port) >> 16) == 0) 2539 ohci_rhsc_enable(sc); 2540 break; 2541 default: 2542 break; 2543 } 2544 break; 2545 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2546 if (len == 0) 2547 break; 2548 if ((value & 0xff) != 0) { 2549 return -1; 2550 } 2551 usb_hub_descriptor_t hubd; 2552 2553 totlen = min(buflen, sizeof(hubd)); 2554 memcpy(&hubd, buf, totlen); 2555 2556 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2557 hubd.bNbrPorts = sc->sc_noport; 2558 USETW(hubd.wHubCharacteristics, 2559 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2560 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2561 /* XXX overcurrent */ 2562 ); 2563 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2564 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2565 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2566 hubd.DeviceRemovable[i++] = (uint8_t)v; 2567 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2568 totlen = min(totlen, hubd.bDescLength); 2569 memcpy(buf, &hubd, totlen); 2570 break; 2571 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2572 if (len != 4) { 2573 return -1; 2574 } 2575 memset(buf, 0, len); /* ? XXX */ 2576 totlen = len; 2577 break; 2578 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2579 DPRINTFN(8, "get port status i=%d", index, 0, 0, 0); 2580 if (index < 1 || index > sc->sc_noport) { 2581 return -1; 2582 } 2583 if (len != 4) { 2584 return -1; 2585 } 2586 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2587 DPRINTFN(8, "port status=0x%04x", v, 0, 0, 0); 2588 USETW(ps.wPortStatus, v); 2589 USETW(ps.wPortChange, v >> 16); 2590 totlen = min(len, sizeof(ps)); 2591 memcpy(buf, &ps, totlen); 2592 break; 2593 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2594 return -1; 2595 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2596 break; 2597 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2598 if (index < 1 || index > sc->sc_noport) { 2599 return -1; 2600 } 2601 port = OHCI_RH_PORT_STATUS(index); 2602 switch(value) { 2603 case UHF_PORT_ENABLE: 2604 OWRITE4(sc, port, UPS_PORT_ENABLED); 2605 break; 2606 case UHF_PORT_SUSPEND: 2607 OWRITE4(sc, port, UPS_SUSPEND); 2608 break; 2609 case UHF_PORT_RESET: 2610 DPRINTFN(5, "reset port %d", index, 0, 0, 0); 2611 OWRITE4(sc, port, UPS_RESET); 2612 for (i = 0; i < 5; i++) { 2613 usb_delay_ms(&sc->sc_bus, 2614 USB_PORT_ROOT_RESET_DELAY); 2615 if (sc->sc_dying) { 2616 return -1; 2617 } 2618 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2619 break; 2620 } 2621 DPRINTFN(8, "port %d reset, status = 0x%04x", index, 2622 OREAD4(sc, port), 0, 0); 2623 break; 2624 case UHF_PORT_POWER: 2625 DPRINTFN(2, "set port power %d", index, 0, 0, 0); 2626 OWRITE4(sc, port, UPS_PORT_POWER); 2627 break; 2628 default: 2629 return -1; 2630 } 2631 break; 2632 default: 2633 /* default from usbroothub */ 2634 return buflen; 2635 } 2636 2637 return totlen; 2638 } 2639 2640 Static usbd_status 2641 ohci_root_intr_transfer(struct usbd_xfer *xfer) 2642 { 2643 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2644 usbd_status err; 2645 2646 /* Insert last in queue. */ 2647 mutex_enter(&sc->sc_lock); 2648 err = usb_insert_transfer(xfer); 2649 mutex_exit(&sc->sc_lock); 2650 if (err) 2651 return err; 2652 2653 /* Pipe isn't running, start first */ 2654 return ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 2655 } 2656 2657 Static usbd_status 2658 ohci_root_intr_start(struct usbd_xfer *xfer) 2659 { 2660 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2661 2662 if (sc->sc_dying) 2663 return USBD_IOERROR; 2664 2665 mutex_enter(&sc->sc_lock); 2666 KASSERT(sc->sc_intrxfer == NULL); 2667 sc->sc_intrxfer = xfer; 2668 mutex_exit(&sc->sc_lock); 2669 2670 return USBD_IN_PROGRESS; 2671 } 2672 2673 /* Abort a root interrupt request. */ 2674 Static void 2675 ohci_root_intr_abort(struct usbd_xfer *xfer) 2676 { 2677 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2678 2679 KASSERT(mutex_owned(&sc->sc_lock)); 2680 KASSERT(xfer->ux_pipe->up_intrxfer == xfer); 2681 2682 sc->sc_intrxfer = NULL; 2683 2684 xfer->ux_status = USBD_CANCELLED; 2685 usb_transfer_complete(xfer); 2686 } 2687 2688 /* Close the root pipe. */ 2689 Static void 2690 ohci_root_intr_close(struct usbd_pipe *pipe) 2691 { 2692 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 2693 2694 KASSERT(mutex_owned(&sc->sc_lock)); 2695 2696 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2697 2698 sc->sc_intrxfer = NULL; 2699 } 2700 2701 /************************/ 2702 2703 int 2704 ohci_device_ctrl_init(struct usbd_xfer *xfer) 2705 { 2706 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 2707 usb_device_request_t *req = &xfer->ux_request; 2708 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2709 ohci_soft_td_t *stat, *setup; 2710 int isread = req->bmRequestType & UT_READ; 2711 int len = xfer->ux_bufsize; 2712 int err = ENOMEM; 2713 2714 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2715 2716 setup = ohci_alloc_std(sc); 2717 if (setup == NULL) { 2718 goto bad1; 2719 } 2720 stat = ohci_alloc_std(sc); 2721 if (stat == NULL) { 2722 goto bad2; 2723 } 2724 2725 ox->ox_setup = setup; 2726 ox->ox_stat = stat; 2727 ox->ox_nstd = 0; 2728 2729 /* Set up data transaction */ 2730 if (len != 0) { 2731 err = ohci_alloc_std_chain(sc, xfer, len, isread); 2732 if (err) { 2733 goto bad3; 2734 } 2735 } 2736 return 0; 2737 2738 bad3: 2739 ohci_free_std(sc, stat); 2740 bad2: 2741 ohci_free_std(sc, setup); 2742 bad1: 2743 return err; 2744 } 2745 2746 void 2747 ohci_device_ctrl_fini(struct usbd_xfer *xfer) 2748 { 2749 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 2750 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2751 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 2752 2753 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2754 DPRINTFN(8, "xfer %p nstd %d", xfer, ox->ox_nstd, 0, 0); 2755 2756 mutex_enter(&sc->sc_lock); 2757 if (ox->ox_setup != opipe->tail.td) { 2758 ohci_free_std_locked(sc, ox->ox_setup); 2759 } 2760 for (size_t i = 0; i < ox->ox_nstd; i++) { 2761 ohci_soft_td_t *std = ox->ox_stds[i]; 2762 if (std == NULL) 2763 break; 2764 ohci_free_std_locked(sc, std); 2765 } 2766 ohci_free_std_locked(sc, ox->ox_stat); 2767 mutex_exit(&sc->sc_lock); 2768 2769 if (ox->ox_nstd) { 2770 const size_t sz = sizeof(ohci_soft_td_t *) * ox->ox_nstd; 2771 kmem_free(ox->ox_stds, sz); 2772 } 2773 } 2774 2775 Static usbd_status 2776 ohci_device_ctrl_transfer(struct usbd_xfer *xfer) 2777 { 2778 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2779 usbd_status err; 2780 2781 /* Insert last in queue. */ 2782 mutex_enter(&sc->sc_lock); 2783 err = usb_insert_transfer(xfer); 2784 mutex_exit(&sc->sc_lock); 2785 if (err) 2786 return err; 2787 2788 /* Pipe isn't running, start first */ 2789 return ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 2790 } 2791 2792 Static usbd_status 2793 ohci_device_ctrl_start(struct usbd_xfer *xfer) 2794 { 2795 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2796 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 2797 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 2798 usb_device_request_t *req = &xfer->ux_request; 2799 struct usbd_device *dev __diagused = opipe->pipe.up_dev; 2800 ohci_soft_td_t *setup, *stat, *next, *tail; 2801 ohci_soft_ed_t *sed; 2802 int isread; 2803 int len; 2804 2805 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2806 2807 if (sc->sc_dying) 2808 return USBD_IOERROR; 2809 2810 KASSERT(xfer->ux_rqflags & URQ_REQUEST); 2811 2812 isread = req->bmRequestType & UT_READ; 2813 len = UGETW(req->wLength); 2814 2815 DPRINTF("xfer=%p len=%d, addr=%d, endpt=%d", xfer, len, dev->ud_addr, 2816 opipe->pipe.up_endpoint->ue_edesc->bEndpointAddress); 2817 DPRINTF("type=0x%02x, request=0x%02x, wValue=0x%04x, wIndex=0x%04x", 2818 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2819 UGETW(req->wIndex)); 2820 2821 /* Need to take lock here for pipe->tail.td */ 2822 mutex_enter(&sc->sc_lock); 2823 2824 /* 2825 * Use the pipe "tail" TD as our first and loan our first TD to the 2826 * next transfer 2827 */ 2828 setup = opipe->tail.td; 2829 opipe->tail.td = ox->ox_setup; 2830 ox->ox_setup = setup; 2831 2832 stat = ox->ox_stat; 2833 2834 /* point at sentinel */ 2835 tail = opipe->tail.td; 2836 sed = opipe->sed; 2837 2838 KASSERTMSG(OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)) == dev->ud_addr, 2839 "address ED %d pipe %d\n", 2840 OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)), dev->ud_addr); 2841 KASSERTMSG(OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)) == 2842 UGETW(opipe->pipe.up_endpoint->ue_edesc->wMaxPacketSize), 2843 "MPL ED %d pipe %d\n", 2844 OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)), 2845 UGETW(opipe->pipe.up_endpoint->ue_edesc->wMaxPacketSize)); 2846 2847 /* next will point to data if len != 0 */ 2848 next = stat; 2849 2850 /* Set up data transaction */ 2851 if (len != 0) { 2852 ohci_soft_td_t *std; 2853 ohci_soft_td_t *end; 2854 2855 next = ox->ox_stds[0]; 2856 ohci_reset_std_chain(sc, xfer, len, isread, next, &end); 2857 2858 end->td.td_nexttd = HTOO32(stat->physaddr); 2859 end->nexttd = stat; 2860 2861 usb_syncmem(&end->dma, 2862 end->offs + offsetof(ohci_td_t, td_nexttd), 2863 sizeof(end->td.td_nexttd), 2864 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2865 2866 usb_syncmem(&xfer->ux_dmabuf, 0, len, 2867 isread ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 2868 std = ox->ox_stds[0]; 2869 /* Start toggle at 1 and then use the carried toggle. */ 2870 std->td.td_flags &= HTOO32(~OHCI_TD_TOGGLE_MASK); 2871 std->td.td_flags |= HTOO32(OHCI_TD_TOGGLE_1); 2872 usb_syncmem(&std->dma, 2873 std->offs + offsetof(ohci_td_t, td_flags), 2874 sizeof(std->td.td_flags), 2875 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2876 } 2877 2878 DPRINTFN(8, "setup %p data %p stat %p tail %p", setup, 2879 (len != 0 ? ox->ox_stds[0] : NULL), stat, tail); 2880 KASSERT(opipe->tail.td == tail); 2881 2882 memcpy(KERNADDR(&opipe->ctrl.reqdma, 0), req, sizeof(*req)); 2883 usb_syncmem(&opipe->ctrl.reqdma, 0, sizeof(*req), BUS_DMASYNC_PREWRITE); 2884 2885 setup->td.td_flags = HTOO32(OHCI_TD_SETUP | OHCI_TD_NOCC | 2886 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 2887 setup->td.td_cbp = HTOO32(DMAADDR(&opipe->ctrl.reqdma, 0)); 2888 setup->td.td_nexttd = HTOO32(next->physaddr); 2889 setup->td.td_be = HTOO32(O32TOH(setup->td.td_cbp) + sizeof(*req) - 1); 2890 setup->nexttd = next; 2891 setup->len = 0; 2892 setup->xfer = xfer; 2893 setup->flags = 0; 2894 ohci_hash_add_td(sc, setup); 2895 2896 xfer->ux_hcpriv = setup; 2897 usb_syncmem(&setup->dma, setup->offs, sizeof(setup->td), 2898 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2899 2900 stat->td.td_flags = HTOO32( 2901 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | 2902 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 2903 stat->td.td_cbp = 0; 2904 stat->td.td_nexttd = HTOO32(tail->physaddr); 2905 stat->td.td_be = 0; 2906 stat->nexttd = tail; 2907 stat->flags = OHCI_CALL_DONE; 2908 stat->len = 0; 2909 stat->xfer = xfer; 2910 ohci_hash_add_td(sc, stat); 2911 2912 usb_syncmem(&stat->dma, stat->offs, sizeof(stat->td), 2913 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2914 2915 memset(&tail->td, 0, sizeof(tail->td)); 2916 tail->nexttd = NULL; 2917 tail->xfer = NULL; 2918 2919 usb_syncmem(&tail->dma, tail->offs, sizeof(tail->td), 2920 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2921 2922 #ifdef OHCI_DEBUG 2923 USBHIST_LOGN(ohcidebug, 5, "--- dump start ---", 0, 0, 0, 0); 2924 if (ohcidebug >= 5) { 2925 ohci_dump_ed(sc, sed); 2926 ohci_dump_tds(sc, setup); 2927 } 2928 USBHIST_LOGN(ohcidebug, 5, "--- dump end ---", 0, 0, 0, 0); 2929 #endif 2930 2931 /* Insert ED in schedule */ 2932 sed->ed.ed_tailp = HTOO32(tail->physaddr); 2933 usb_syncmem(&sed->dma, 2934 sed->offs + offsetof(ohci_ed_t, ed_tailp), 2935 sizeof(sed->ed.ed_tailp), 2936 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2937 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 2938 if (xfer->ux_timeout && !sc->sc_bus.ub_usepolling) { 2939 callout_reset(&xfer->ux_callout, mstohz(xfer->ux_timeout), 2940 ohci_timeout, xfer); 2941 } 2942 2943 DPRINTF("done", 0, 0, 0, 0); 2944 2945 mutex_exit(&sc->sc_lock); 2946 2947 if (sc->sc_bus.ub_usepolling) 2948 ohci_waitintr(sc, xfer); 2949 2950 return USBD_IN_PROGRESS; 2951 } 2952 2953 /* Abort a device control request. */ 2954 Static void 2955 ohci_device_ctrl_abort(struct usbd_xfer *xfer) 2956 { 2957 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 2958 2959 KASSERT(mutex_owned(&sc->sc_lock)); 2960 2961 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2962 DPRINTF("xfer=%p", xfer, 0, 0, 0); 2963 ohci_abort_xfer(xfer, USBD_CANCELLED); 2964 } 2965 2966 /* Close a device control pipe. */ 2967 Static void 2968 ohci_device_ctrl_close(struct usbd_pipe *pipe) 2969 { 2970 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 2971 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 2972 2973 KASSERT(mutex_owned(&sc->sc_lock)); 2974 2975 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2976 DPRINTF("pipe=%p", pipe, 0, 0, 0); 2977 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2978 ohci_free_std_locked(sc, opipe->tail.td); 2979 } 2980 2981 /************************/ 2982 2983 Static void 2984 ohci_device_clear_toggle(struct usbd_pipe *pipe) 2985 { 2986 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 2987 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 2988 2989 opipe->sed->ed.ed_headp &= HTOO32(~OHCI_TOGGLECARRY); 2990 } 2991 2992 Static void 2993 ohci_noop(struct usbd_pipe *pipe) 2994 { 2995 } 2996 2997 Static int 2998 ohci_device_bulk_init(struct usbd_xfer *xfer) 2999 { 3000 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3001 int len = xfer->ux_bufsize; 3002 int endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress;; 3003 int isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3004 int err; 3005 3006 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3007 3008 KASSERT(!(xfer->ux_rqflags & URQ_REQUEST)); 3009 3010 DPRINTFN(4, "xfer=%p len=%d isread=%d flags=%d", xfer, len, isread, 3011 xfer->ux_flags); 3012 DPRINTFN(4, "endpt=%d", endpt, 0, 0, 0); 3013 3014 /* Allocate a chain of new TDs (including a new tail). */ 3015 err = ohci_alloc_std_chain(sc, xfer, len, isread); 3016 if (err) 3017 return err; 3018 3019 return 0; 3020 } 3021 3022 Static void 3023 ohci_device_bulk_fini(struct usbd_xfer *xfer) 3024 { 3025 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3026 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3027 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 3028 3029 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3030 DPRINTFN(8, "xfer %p nstd %d", xfer, ox->ox_nstd, 0, 0); 3031 3032 mutex_enter(&sc->sc_lock); 3033 for (size_t i = 0; i < ox->ox_nstd; i++) { 3034 ohci_soft_td_t *std = ox->ox_stds[i]; 3035 if (std == NULL) 3036 break; 3037 if (std != opipe->tail.td) 3038 ohci_free_std_locked(sc, std); 3039 } 3040 mutex_exit(&sc->sc_lock); 3041 3042 if (ox->ox_nstd) { 3043 const size_t sz = sizeof(ohci_soft_td_t *) * ox->ox_nstd; 3044 kmem_free(ox->ox_stds, sz); 3045 } 3046 } 3047 3048 Static usbd_status 3049 ohci_device_bulk_transfer(struct usbd_xfer *xfer) 3050 { 3051 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3052 usbd_status err; 3053 3054 /* Insert last in queue. */ 3055 mutex_enter(&sc->sc_lock); 3056 err = usb_insert_transfer(xfer); 3057 mutex_exit(&sc->sc_lock); 3058 if (err) 3059 return err; 3060 3061 /* Pipe isn't running, start first */ 3062 return ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 3063 } 3064 3065 Static usbd_status 3066 ohci_device_bulk_start(struct usbd_xfer *xfer) 3067 { 3068 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3069 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 3070 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3071 ohci_soft_td_t *last; 3072 ohci_soft_td_t *data, *tail, *tdp; 3073 ohci_soft_ed_t *sed; 3074 int len, isread, endpt; 3075 3076 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3077 3078 if (sc->sc_dying) 3079 return USBD_IOERROR; 3080 3081 KASSERT(!(xfer->ux_rqflags & URQ_REQUEST)); 3082 3083 len = xfer->ux_length; 3084 endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress; 3085 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3086 sed = opipe->sed; 3087 3088 DPRINTFN(4, "xfer=%p len=%d isread=%d flags=%d", xfer, len, isread, 3089 xfer->ux_flags); 3090 DPRINTFN(4, "endpt=%d", endpt, 0, 0, 0); 3091 3092 mutex_enter(&sc->sc_lock); 3093 3094 /* 3095 * Use the pipe "tail" TD as our first and loan our first TD to the 3096 * next transfer 3097 */ 3098 data = opipe->tail.td; 3099 opipe->tail.td = ox->ox_stds[0]; 3100 ox->ox_stds[0] = data; 3101 ohci_reset_std_chain(sc, xfer, len, isread, data, &last); 3102 3103 /* point at sentinel */ 3104 tail = opipe->tail.td; 3105 memset(&tail->td, 0, sizeof(tail->td)); 3106 tail->nexttd = NULL; 3107 tail->xfer = NULL; 3108 usb_syncmem(&tail->dma, tail->offs, sizeof(tail->td), 3109 BUS_DMASYNC_PREWRITE); 3110 xfer->ux_hcpriv = data; 3111 3112 DPRINTFN(8, "xfer %p data %p tail %p", xfer, ox->ox_stds[0], tail, 0); 3113 KASSERT(opipe->tail.td == tail); 3114 3115 /* We want interrupt at the end of the transfer. */ 3116 last->td.td_flags &= HTOO32(~OHCI_TD_INTR_MASK); 3117 last->td.td_flags |= HTOO32(OHCI_TD_SET_DI(1)); 3118 3119 last->td.td_nexttd = HTOO32(tail->physaddr); 3120 last->nexttd = tail; 3121 last->flags |= OHCI_CALL_DONE; 3122 usb_syncmem(&last->dma, last->offs, sizeof(last->td), 3123 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3124 3125 DPRINTFN(4, "ed_flags=0x%08x td_flags=0x%08x " 3126 "td_cbp=0x%08x td_be=0x%08x", 3127 (int)O32TOH(sed->ed.ed_flags), 3128 (int)O32TOH(data->td.td_flags), 3129 (int)O32TOH(data->td.td_cbp), 3130 (int)O32TOH(data->td.td_be)); 3131 3132 #ifdef OHCI_DEBUG 3133 DPRINTFN(5, "--- dump start ---", 0, 0, 0, 0); 3134 if (ohcidebug >= 5) { 3135 ohci_dump_ed(sc, sed); 3136 ohci_dump_tds(sc, data); 3137 } 3138 DPRINTFN(5, "--- dump end ---", 0, 0, 0, 0); 3139 #endif 3140 3141 /* Insert ED in schedule */ 3142 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 3143 KASSERT(tdp->xfer == xfer); 3144 } 3145 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3146 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3147 sed->ed.ed_tailp = HTOO32(tail->physaddr); 3148 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3149 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3150 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3151 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 3152 if (xfer->ux_timeout && !sc->sc_bus.ub_usepolling) { 3153 callout_reset(&xfer->ux_callout, mstohz(xfer->ux_timeout), 3154 ohci_timeout, xfer); 3155 } 3156 mutex_exit(&sc->sc_lock); 3157 3158 return USBD_IN_PROGRESS; 3159 } 3160 3161 Static void 3162 ohci_device_bulk_abort(struct usbd_xfer *xfer) 3163 { 3164 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 3165 3166 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3167 3168 KASSERT(mutex_owned(&sc->sc_lock)); 3169 3170 DPRINTF("xfer=%p", xfer, 0, 0, 0); 3171 ohci_abort_xfer(xfer, USBD_CANCELLED); 3172 } 3173 3174 /* 3175 * Close a device bulk pipe. 3176 */ 3177 Static void 3178 ohci_device_bulk_close(struct usbd_pipe *pipe) 3179 { 3180 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 3181 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 3182 3183 KASSERT(mutex_owned(&sc->sc_lock)); 3184 3185 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3186 3187 DPRINTF("pipe=%p", pipe, 0, 0, 0); 3188 ohci_close_pipe(pipe, sc->sc_bulk_head); 3189 ohci_free_std_locked(sc, opipe->tail.td); 3190 } 3191 3192 /************************/ 3193 3194 Static int 3195 ohci_device_intr_init(struct usbd_xfer *xfer) 3196 { 3197 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3198 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3199 int len = xfer->ux_bufsize; 3200 int endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress;; 3201 int isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3202 int err; 3203 3204 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3205 3206 KASSERT(!(xfer->ux_rqflags & URQ_REQUEST)); 3207 KASSERT(len != 0); 3208 3209 DPRINTFN(4, "xfer=%p len=%d isread=%d flags=%d", xfer, len, isread, 3210 xfer->ux_flags); 3211 DPRINTFN(4, "endpt=%d", endpt, 0, 0, 0); 3212 3213 ox->ox_nstd = 0; 3214 3215 err = ohci_alloc_std_chain(sc, xfer, len, isread); 3216 if (err) { 3217 return err; 3218 } 3219 3220 return 0; 3221 } 3222 3223 Static void 3224 ohci_device_intr_fini(struct usbd_xfer *xfer) 3225 { 3226 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3227 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3228 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 3229 3230 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3231 DPRINTFN(8, "xfer %p nstd %d", xfer, ox->ox_nstd, 0, 0); 3232 3233 mutex_enter(&sc->sc_lock); 3234 for (size_t i = 0; i < ox->ox_nstd; i++) { 3235 ohci_soft_td_t *std = ox->ox_stds[i]; 3236 if (std != NULL) 3237 break; 3238 if (std != opipe->tail.td) 3239 ohci_free_std_locked(sc, std); 3240 } 3241 mutex_exit(&sc->sc_lock); 3242 3243 if (ox->ox_nstd) { 3244 const size_t sz = sizeof(ohci_soft_td_t *) * ox->ox_nstd; 3245 kmem_free(ox->ox_stds, sz); 3246 } 3247 } 3248 3249 Static usbd_status 3250 ohci_device_intr_transfer(struct usbd_xfer *xfer) 3251 { 3252 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3253 usbd_status err; 3254 3255 /* Insert last in queue. */ 3256 mutex_enter(&sc->sc_lock); 3257 err = usb_insert_transfer(xfer); 3258 mutex_exit(&sc->sc_lock); 3259 if (err) 3260 return err; 3261 3262 /* Pipe isn't running, start first */ 3263 return ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 3264 } 3265 3266 Static usbd_status 3267 ohci_device_intr_start(struct usbd_xfer *xfer) 3268 { 3269 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3270 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 3271 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3272 ohci_soft_ed_t *sed = opipe->sed; 3273 ohci_soft_td_t *data, *last, *tail; 3274 int len, isread, endpt; 3275 3276 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3277 3278 if (sc->sc_dying) 3279 return USBD_IOERROR; 3280 3281 DPRINTFN(3, "xfer=%p len=%d flags=%d priv=%p", xfer, xfer->ux_length, 3282 xfer->ux_flags, xfer->ux_priv); 3283 3284 KASSERT(!(xfer->ux_rqflags & URQ_REQUEST)); 3285 3286 len = xfer->ux_length; 3287 endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress; 3288 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3289 3290 mutex_enter(&sc->sc_lock); 3291 3292 /* 3293 * Use the pipe "tail" TD as our first and loan our first TD to the 3294 * next transfer. 3295 */ 3296 data = opipe->tail.td; 3297 opipe->tail.td = ox->ox_stds[0]; 3298 ox->ox_stds[0] = data; 3299 ohci_reset_std_chain(sc, xfer, len, isread, data, &last); 3300 3301 /* point at sentinel */ 3302 tail = opipe->tail.td; 3303 memset(&tail->td, 0, sizeof(tail->td)); 3304 tail->nexttd = NULL; 3305 tail->xfer = NULL; 3306 usb_syncmem(&tail->dma, tail->offs, sizeof(tail->td), 3307 BUS_DMASYNC_PREWRITE); 3308 xfer->ux_hcpriv = data; 3309 3310 DPRINTFN(8, "data %p tail %p", ox->ox_stds[0], tail, 0, 0); 3311 KASSERT(opipe->tail.td == tail); 3312 3313 /* We want interrupt at the end of the transfer. */ 3314 last->td.td_flags &= HTOO32(~OHCI_TD_INTR_MASK); 3315 last->td.td_flags |= HTOO32(OHCI_TD_SET_DI(1)); 3316 3317 last->td.td_nexttd = HTOO32(tail->physaddr); 3318 last->nexttd = tail; 3319 last->flags |= OHCI_CALL_DONE; 3320 usb_syncmem(&last->dma, last->offs, sizeof(last->td), 3321 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3322 3323 #ifdef OHCI_DEBUG 3324 DPRINTFN(5, "--- dump start ---", 0, 0, 0, 0); 3325 if (ohcidebug >= 5) { 3326 ohci_dump_ed(sc, sed); 3327 ohci_dump_tds(sc, data); 3328 } 3329 DPRINTFN(5, "--- dump end ---", 0, 0, 0, 0); 3330 #endif 3331 3332 /* Insert ED in schedule */ 3333 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3334 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3335 sed->ed.ed_tailp = HTOO32(tail->physaddr); 3336 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3337 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3338 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3339 3340 mutex_exit(&sc->sc_lock); 3341 3342 return USBD_IN_PROGRESS; 3343 } 3344 3345 /* Abort a device interrupt request. */ 3346 Static void 3347 ohci_device_intr_abort(struct usbd_xfer *xfer) 3348 { 3349 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 3350 3351 KASSERT(mutex_owned(&sc->sc_lock)); 3352 KASSERT(xfer->ux_pipe->up_intrxfer == xfer); 3353 3354 ohci_abort_xfer(xfer, USBD_CANCELLED); 3355 } 3356 3357 /* Close a device interrupt pipe. */ 3358 Static void 3359 ohci_device_intr_close(struct usbd_pipe *pipe) 3360 { 3361 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 3362 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 3363 int nslots = opipe->intr.nslots; 3364 int pos = opipe->intr.pos; 3365 int j; 3366 ohci_soft_ed_t *p, *sed = opipe->sed; 3367 3368 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3369 3370 KASSERT(mutex_owned(&sc->sc_lock)); 3371 3372 DPRINTFN(1, "pipe=%p nslots=%d pos=%d", pipe, nslots, pos, 0); 3373 usb_syncmem(&sed->dma, sed->offs, 3374 sizeof(sed->ed), BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3375 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 3376 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3377 sizeof(sed->ed.ed_flags), 3378 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3379 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 3380 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) 3381 usb_delay_ms_locked(&sc->sc_bus, 2, &sc->sc_lock); 3382 3383 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 3384 continue; 3385 KASSERT(p); 3386 p->next = sed->next; 3387 p->ed.ed_nexted = sed->ed.ed_nexted; 3388 usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted), 3389 sizeof(p->ed.ed_nexted), 3390 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3391 3392 for (j = 0; j < nslots; j++) 3393 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 3394 3395 ohci_free_std_locked(sc, opipe->tail.td); 3396 ohci_free_sed_locked(sc, opipe->sed); 3397 } 3398 3399 Static usbd_status 3400 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival) 3401 { 3402 int i, j, best; 3403 u_int npoll, slow, shigh, nslots; 3404 u_int bestbw, bw; 3405 ohci_soft_ed_t *hsed, *sed = opipe->sed; 3406 3407 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3408 3409 DPRINTFN(2, "pipe=%p", opipe, 0, 0, 0); 3410 if (ival == 0) { 3411 printf("ohci_setintr: 0 interval\n"); 3412 return USBD_INVAL; 3413 } 3414 3415 npoll = OHCI_NO_INTRS; 3416 while (npoll > ival) 3417 npoll /= 2; 3418 DPRINTFN(2, "ival=%d npoll=%d", ival, npoll, 0, 0); 3419 3420 /* 3421 * We now know which level in the tree the ED must go into. 3422 * Figure out which slot has most bandwidth left over. 3423 * Slots to examine: 3424 * npoll 3425 * 1 0 3426 * 2 1 2 3427 * 4 3 4 5 6 3428 * 8 7 8 9 10 11 12 13 14 3429 * N (N-1) .. (N-1+N-1) 3430 */ 3431 slow = npoll-1; 3432 shigh = slow + npoll; 3433 nslots = OHCI_NO_INTRS / npoll; 3434 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 3435 bw = 0; 3436 for (j = 0; j < nslots; j++) 3437 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 3438 if (bw < bestbw) { 3439 best = i; 3440 bestbw = bw; 3441 } 3442 } 3443 DPRINTFN(2, "best=%d(%d..%d) bestbw=%d", best, slow, shigh, bestbw); 3444 3445 mutex_enter(&sc->sc_lock); 3446 hsed = sc->sc_eds[best]; 3447 sed->next = hsed->next; 3448 usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags), 3449 sizeof(hsed->ed.ed_flags), 3450 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3451 sed->ed.ed_nexted = hsed->ed.ed_nexted; 3452 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3453 sizeof(sed->ed.ed_flags), 3454 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3455 hsed->next = sed; 3456 hsed->ed.ed_nexted = HTOO32(sed->physaddr); 3457 usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags), 3458 sizeof(hsed->ed.ed_flags), 3459 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3460 mutex_exit(&sc->sc_lock); 3461 3462 for (j = 0; j < nslots; j++) 3463 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 3464 opipe->intr.nslots = nslots; 3465 opipe->intr.pos = best; 3466 3467 DPRINTFN(5, "returns %p", opipe, 0, 0, 0); 3468 return USBD_NORMAL_COMPLETION; 3469 } 3470 3471 /***********************/ 3472 3473 Static int 3474 ohci_device_isoc_init(struct usbd_xfer *xfer) 3475 { 3476 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3477 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3478 ohci_soft_itd_t *sitd; 3479 size_t i; 3480 int err; 3481 3482 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3483 3484 DPRINTFN(1, "xfer %p len %d flags %d", xfer, xfer->ux_length, 3485 xfer->ux_flags, 0); 3486 3487 const size_t nfsitd = 3488 (xfer->ux_nframes + OHCI_ITD_NOFFSET - 1) / OHCI_ITD_NOFFSET; 3489 const size_t nbsitd = xfer->ux_bufsize / OHCI_PAGE_SIZE; 3490 const size_t nsitd = MAX(nfsitd, nbsitd) + 1; 3491 3492 ox->ox_sitds = kmem_zalloc(sizeof(ohci_soft_itd_t *) * nsitd, 3493 KM_SLEEP); 3494 ox->ox_nsitd = nsitd; 3495 3496 for (i = 0; i < nsitd; i++) { 3497 /* Allocate next ITD */ 3498 sitd = ohci_alloc_sitd(sc); 3499 if (sitd == NULL) { 3500 err = ENOMEM; 3501 goto fail; 3502 } 3503 ox->ox_sitds[i] = sitd; 3504 sitd->xfer = xfer; 3505 sitd->flags = 0; 3506 } 3507 3508 return 0; 3509 fail: 3510 for (; i > 0;) { 3511 ohci_free_sitd(sc, ox->ox_sitds[--i]); 3512 } 3513 return err; 3514 } 3515 3516 Static void 3517 ohci_device_isoc_fini(struct usbd_xfer *xfer) 3518 { 3519 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3520 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3521 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 3522 3523 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3524 3525 mutex_enter(&sc->sc_lock); 3526 for (size_t i = 0; i < ox->ox_nsitd; i++) { 3527 if (ox->ox_sitds[i] != opipe->tail.itd) { 3528 ohci_free_sitd_locked(sc, ox->ox_sitds[i]); 3529 } 3530 } 3531 mutex_exit(&sc->sc_lock); 3532 3533 if (ox->ox_nsitd) { 3534 const size_t sz = sizeof(ohci_soft_itd_t *) * ox->ox_nsitd; 3535 kmem_free(ox->ox_sitds, sz); 3536 } 3537 } 3538 3539 3540 usbd_status 3541 ohci_device_isoc_transfer(struct usbd_xfer *xfer) 3542 { 3543 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3544 usbd_status err; 3545 3546 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3547 3548 DPRINTFN(5, "xfer=%p", xfer, 0, 0, 0); 3549 3550 /* Put it on our queue, */ 3551 mutex_enter(&sc->sc_lock); 3552 err = usb_insert_transfer(xfer); 3553 mutex_exit(&sc->sc_lock); 3554 3555 /* bail out on error, */ 3556 if (err && err != USBD_IN_PROGRESS) 3557 return err; 3558 3559 /* XXX should check inuse here */ 3560 3561 /* insert into schedule, */ 3562 ohci_device_isoc_enter(xfer); 3563 3564 /* and start if the pipe wasn't running */ 3565 if (!err) 3566 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 3567 3568 return err; 3569 } 3570 3571 void 3572 ohci_device_isoc_enter(struct usbd_xfer *xfer) 3573 { 3574 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3575 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 3576 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3577 ohci_soft_ed_t *sed = opipe->sed; 3578 ohci_soft_itd_t *sitd, *nsitd, *tail; 3579 ohci_physaddr_t buf, offs, noffs, bp0; 3580 int i, ncur, nframes; 3581 3582 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3583 DPRINTFN(5, "xfer=%p", xfer, 0, 0, 0); 3584 3585 mutex_enter(&sc->sc_lock); 3586 3587 if (sc->sc_dying) { 3588 mutex_exit(&sc->sc_lock); 3589 return; 3590 } 3591 3592 struct isoc *isoc = &opipe->isoc; 3593 3594 DPRINTFN(1, "used=%d next=%d xfer=%p nframes=%d", 3595 isoc->inuse, isoc->next, xfer, xfer->ux_nframes); 3596 3597 if (isoc->next == -1) { 3598 /* Not in use yet, schedule it a few frames ahead. */ 3599 isoc->next = O32TOH(sc->sc_hcca->hcca_frame_number) + 5; 3600 DPRINTFN(2,"start next=%d", isoc->next, 0, 0, 0); 3601 } 3602 3603 sitd = opipe->tail.itd; 3604 opipe->tail.itd = ox->ox_sitds[0]; 3605 ox->ox_sitds[0] = sitd; 3606 3607 buf = DMAADDR(&xfer->ux_dmabuf, 0); 3608 bp0 = OHCI_PAGE(buf); 3609 offs = OHCI_PAGE_OFFSET(buf); 3610 nframes = xfer->ux_nframes; 3611 xfer->ux_hcpriv = sitd; 3612 size_t j = 1; 3613 for (i = ncur = 0; i < nframes; i++, ncur++) { 3614 noffs = offs + xfer->ux_frlengths[i]; 3615 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ 3616 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */ 3617 3618 /* Allocate next ITD */ 3619 nsitd = ox->ox_sitds[j++]; 3620 KASSERT(nsitd != NULL); 3621 KASSERT(j < ox->ox_nsitd); 3622 3623 /* Fill current ITD */ 3624 sitd->itd.itd_flags = HTOO32( 3625 OHCI_ITD_NOCC | 3626 OHCI_ITD_SET_SF(isoc->next) | 3627 OHCI_ITD_SET_DI(6) | /* delay intr a little */ 3628 OHCI_ITD_SET_FC(ncur)); 3629 sitd->itd.itd_bp0 = HTOO32(bp0); 3630 sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr); 3631 sitd->itd.itd_be = HTOO32(bp0 + offs - 1); 3632 sitd->nextitd = nsitd; 3633 sitd->xfer = xfer; 3634 sitd->flags = 0; 3635 #ifdef DIAGNOSTIC 3636 sitd->isdone = false; 3637 #endif 3638 ohci_hash_add_itd(sc, sitd); 3639 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 3640 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3641 3642 sitd = nsitd; 3643 isoc->next = isoc->next + ncur; 3644 bp0 = OHCI_PAGE(buf + offs); 3645 ncur = 0; 3646 } 3647 sitd->itd.itd_offset[ncur] = HTOO16(OHCI_ITD_MK_OFFS(offs)); 3648 offs = noffs; 3649 } 3650 KASSERT(j <= ox->ox_nsitd); 3651 3652 /* point at sentinel */ 3653 tail = opipe->tail.itd; 3654 memset(&tail->itd, 0, sizeof(tail->itd)); 3655 tail->nextitd = NULL; 3656 tail->xfer = NULL; 3657 usb_syncmem(&tail->dma, tail->offs, sizeof(tail->itd), 3658 BUS_DMASYNC_PREWRITE); 3659 3660 /* Fixup last used ITD */ 3661 sitd->itd.itd_flags = HTOO32( 3662 OHCI_ITD_NOCC | 3663 OHCI_ITD_SET_SF(isoc->next) | 3664 OHCI_ITD_SET_DI(0) | 3665 OHCI_ITD_SET_FC(ncur)); 3666 sitd->itd.itd_bp0 = HTOO32(bp0); 3667 sitd->itd.itd_nextitd = HTOO32(tail->physaddr); 3668 sitd->itd.itd_be = HTOO32(bp0 + offs - 1); 3669 sitd->nextitd = tail; 3670 sitd->xfer = xfer; 3671 sitd->flags = OHCI_CALL_DONE; 3672 #ifdef DIAGNOSTIC 3673 sitd->isdone = false; 3674 #endif 3675 ohci_hash_add_itd(sc, sitd); 3676 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 3677 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3678 3679 isoc->next = isoc->next + ncur; 3680 isoc->inuse += nframes; 3681 3682 /* XXX pretend we did it all */ 3683 xfer->ux_actlen = offs; 3684 xfer->ux_status = USBD_IN_PROGRESS; 3685 3686 #ifdef OHCI_DEBUG 3687 if (ohcidebug >= 5) { 3688 DPRINTF("frame=%d", O32TOH(sc->sc_hcca->hcca_frame_number), 3689 0, 0, 0); 3690 ohci_dump_itds(sc, xfer->ux_hcpriv); 3691 ohci_dump_ed(sc, sed); 3692 } 3693 #endif 3694 3695 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3696 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3697 sed->ed.ed_tailp = HTOO32(tail->physaddr); 3698 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3699 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3700 sizeof(sed->ed.ed_flags), 3701 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3702 mutex_exit(&sc->sc_lock); 3703 } 3704 3705 usbd_status 3706 ohci_device_isoc_start(struct usbd_xfer *xfer) 3707 { 3708 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3709 3710 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3711 DPRINTFN(5, "xfer=%p", xfer, 0, 0, 0); 3712 3713 mutex_enter(&sc->sc_lock); 3714 3715 if (sc->sc_dying) { 3716 mutex_exit(&sc->sc_lock); 3717 return USBD_IOERROR; 3718 } 3719 3720 3721 #ifdef DIAGNOSTIC 3722 if (xfer->ux_status != USBD_IN_PROGRESS) 3723 printf("ohci_device_isoc_start: not in progress %p\n", xfer); 3724 #endif 3725 3726 /* XXX anything to do? */ 3727 3728 mutex_exit(&sc->sc_lock); 3729 3730 return USBD_IN_PROGRESS; 3731 } 3732 3733 void 3734 ohci_device_isoc_abort(struct usbd_xfer *xfer) 3735 { 3736 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 3737 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3738 ohci_soft_ed_t *sed; 3739 ohci_soft_itd_t *sitd; 3740 3741 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3742 DPRINTFN(1, "xfer=%p", xfer, 0, 0, 0); 3743 3744 KASSERT(mutex_owned(&sc->sc_lock)); 3745 3746 /* Transfer is already done. */ 3747 if (xfer->ux_status != USBD_NOT_STARTED && 3748 xfer->ux_status != USBD_IN_PROGRESS) { 3749 printf("ohci_device_isoc_abort: early return\n"); 3750 goto done; 3751 } 3752 3753 /* Give xfer the requested abort code. */ 3754 xfer->ux_status = USBD_CANCELLED; 3755 3756 sed = opipe->sed; 3757 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3758 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3759 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */ 3760 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3761 sizeof(sed->ed.ed_flags), 3762 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3763 3764 sitd = xfer->ux_hcpriv; 3765 KASSERT(sitd); 3766 3767 for (; sitd->xfer == xfer; sitd = sitd->nextitd) { 3768 ohci_hash_rem_itd(sc, sitd); 3769 #ifdef DIAGNOSTIC 3770 DPRINTFN(1, "abort sets done sitd=%p", sitd, 0, 0, 0); 3771 sitd->isdone = true; 3772 #endif 3773 } 3774 3775 usb_delay_ms_locked(&sc->sc_bus, OHCI_ITD_NOFFSET, &sc->sc_lock); 3776 3777 /* Run callback. */ 3778 usb_transfer_complete(xfer); 3779 3780 sed->ed.ed_headp = HTOO32(sitd->physaddr); /* unlink TDs */ 3781 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */ 3782 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3783 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3784 3785 done: 3786 KASSERT(mutex_owned(&sc->sc_lock)); 3787 } 3788 3789 void 3790 ohci_device_isoc_done(struct usbd_xfer *xfer) 3791 { 3792 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3793 DPRINTFN(1, "xfer=%p", xfer, 0, 0, 0); 3794 } 3795 3796 usbd_status 3797 ohci_setup_isoc(struct usbd_pipe *pipe) 3798 { 3799 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 3800 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 3801 struct isoc *isoc = &opipe->isoc; 3802 3803 isoc->next = -1; 3804 isoc->inuse = 0; 3805 3806 mutex_enter(&sc->sc_lock); 3807 ohci_add_ed(sc, opipe->sed, sc->sc_isoc_head); 3808 mutex_exit(&sc->sc_lock); 3809 3810 return USBD_NORMAL_COMPLETION; 3811 } 3812 3813 void 3814 ohci_device_isoc_close(struct usbd_pipe *pipe) 3815 { 3816 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 3817 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 3818 3819 KASSERT(mutex_owned(&sc->sc_lock)); 3820 3821 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3822 DPRINTF("pipe=%p", pipe, 0, 0, 0); 3823 ohci_close_pipe(pipe, sc->sc_isoc_head); 3824 #ifdef DIAGNOSTIC 3825 opipe->tail.itd->isdone = true; 3826 #endif 3827 ohci_free_sitd_locked(sc, opipe->tail.itd); 3828 } 3829
Indexes created Fri Oct 03 02:09:57 GMT 2025