ohci.c revision 1.254.2.59
1 /* $NetBSD: ohci.c,v 1.254.2.59 2016/03/17 09:04:53 skrll Exp $ */ 2 3 /* 4 * Copyright (c) 1998, 2004, 2005, 2012 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net) at 9 * Carlstedt Research & Technology, Jared D. McNeill (jmcneill (at) invisible.ca) 10 * and Matthew R. Green (mrg (at) eterna.com.au). 11 * This code is derived from software contributed to The NetBSD Foundation 12 * by Charles M. Hannum. 13 * 14 * Redistribution and use in source and binary forms, with or without 15 * modification, are permitted provided that the following conditions 16 * are met: 17 * 1. Redistributions of source code must retain the above copyright 18 * notice, this list of conditions and the following disclaimer. 19 * 2. Redistributions in binary form must reproduce the above copyright 20 * notice, this list of conditions and the following disclaimer in the 21 * documentation and/or other materials provided with the distribution. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 24 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 25 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 26 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 27 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 31 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 32 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 33 * POSSIBILITY OF SUCH DAMAGE. 34 */ 35 36 /* 37 * USB Open Host Controller driver. 38 * 39 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html 40 * USB spec: http://www.usb.org/developers/docs/ 41 */ 42 43 #include <sys/cdefs.h> 44 __KERNEL_RCSID(0, "$NetBSD: ohci.c,v 1.254.2.59 2016/03/17 09:04:53 skrll Exp $"); 45 46 #include "opt_usb.h" 47 48 #include <sys/param.h> 49 50 #include <sys/cpu.h> 51 #include <sys/device.h> 52 #include <sys/kernel.h> 53 #include <sys/kmem.h> 54 #include <sys/proc.h> 55 #include <sys/queue.h> 56 #include <sys/select.h> 57 #include <sys/sysctl.h> 58 #include <sys/systm.h> 59 60 #include <machine/endian.h> 61 62 #include <dev/usb/usb.h> 63 #include <dev/usb/usbdi.h> 64 #include <dev/usb/usbdivar.h> 65 #include <dev/usb/usb_mem.h> 66 #include <dev/usb/usb_quirks.h> 67 68 #include <dev/usb/ohcireg.h> 69 #include <dev/usb/ohcivar.h> 70 #include <dev/usb/usbroothub.h> 71 #include <dev/usb/usbhist.h> 72 73 #ifdef USB_DEBUG 74 #ifndef OHCI_DEBUG 75 #define ohcidebug 0 76 #else 77 static int ohcidebug = 10; 78 79 SYSCTL_SETUP(sysctl_hw_ohci_setup, "sysctl hw.ohci setup") 80 { 81 int err; 82 const struct sysctlnode *rnode; 83 const struct sysctlnode *cnode; 84 85 err = sysctl_createv(clog, 0, NULL, &rnode, 86 CTLFLAG_PERMANENT, CTLTYPE_NODE, "ohci", 87 SYSCTL_DESCR("ohci global controls"), 88 NULL, 0, NULL, 0, CTL_HW, CTL_CREATE, CTL_EOL); 89 90 if (err) 91 goto fail; 92 93 /* control debugging printfs */ 94 err = sysctl_createv(clog, 0, &rnode, &cnode, 95 CTLFLAG_PERMANENT|CTLFLAG_READWRITE, CTLTYPE_INT, 96 "debug", SYSCTL_DESCR("Enable debugging output"), 97 NULL, 0, &ohcidebug, sizeof(ohcidebug), CTL_CREATE, CTL_EOL); 98 if (err) 99 goto fail; 100 101 return; 102 fail: 103 aprint_error("%s: sysctl_createv failed (err = %d)\n", __func__, err); 104 } 105 106 #endif /* OHCI_DEBUG */ 107 #endif /* USB_DEBUG */ 108 109 #define DPRINTF(FMT,A,B,C,D) USBHIST_LOG(ohcidebug,FMT,A,B,C,D) 110 #define DPRINTFN(N,FMT,A,B,C,D) USBHIST_LOGN(ohcidebug,N,FMT,A,B,C,D) 111 #define OHCIHIST_FUNC() USBHIST_FUNC() 112 #define OHCIHIST_CALLED(name) USBHIST_CALLED(ohcidebug) 113 114 #if BYTE_ORDER == BIG_ENDIAN 115 #define SWAP_ENDIAN OHCI_LITTLE_ENDIAN 116 #else 117 #define SWAP_ENDIAN OHCI_BIG_ENDIAN 118 #endif 119 120 #define O16TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap16(val) : val) 121 #define O32TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap32(val) : val) 122 #define HTOO16(val) O16TOH(val) 123 #define HTOO32(val) O32TOH(val) 124 125 struct ohci_pipe; 126 127 Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *); 128 Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *); 129 130 Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *); 131 Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *); 132 Static void ohci_free_std_locked(ohci_softc_t *, ohci_soft_td_t *); 133 134 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *); 135 Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *); 136 Static void ohci_free_sitd_locked(ohci_softc_t *, 137 ohci_soft_itd_t *); 138 139 Static usbd_status ohci_alloc_std_chain(ohci_softc_t *, struct usbd_xfer *, 140 int, int); 141 Static void ohci_free_stds(ohci_softc_t *, struct ohci_xfer *); 142 143 Static void ohci_reset_std_chain(ohci_softc_t *, struct usbd_xfer *, 144 int, int, ohci_soft_td_t *, ohci_soft_td_t **); 145 146 Static usbd_status ohci_open(struct usbd_pipe *); 147 Static void ohci_poll(struct usbd_bus *); 148 Static void ohci_softintr(void *); 149 Static void ohci_waitintr(ohci_softc_t *, struct usbd_xfer *); 150 Static void ohci_rhsc(ohci_softc_t *, struct usbd_xfer *); 151 Static void ohci_rhsc_softint(void *); 152 153 Static void ohci_add_ed(ohci_softc_t *, ohci_soft_ed_t *, 154 ohci_soft_ed_t *); 155 156 Static void ohci_rem_ed(ohci_softc_t *, ohci_soft_ed_t *, 157 ohci_soft_ed_t *); 158 Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *); 159 Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *); 160 Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t); 161 Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *); 162 Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *); 163 Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t); 164 165 Static usbd_status ohci_setup_isoc(struct usbd_pipe *); 166 Static void ohci_device_isoc_enter(struct usbd_xfer *); 167 168 Static struct usbd_xfer * 169 ohci_allocx(struct usbd_bus *, unsigned int); 170 Static void ohci_freex(struct usbd_bus *, struct usbd_xfer *); 171 Static void ohci_get_lock(struct usbd_bus *, kmutex_t **); 172 Static int ohci_roothub_ctrl(struct usbd_bus *, 173 usb_device_request_t *, void *, int); 174 175 Static usbd_status ohci_root_intr_transfer(struct usbd_xfer *); 176 Static usbd_status ohci_root_intr_start(struct usbd_xfer *); 177 Static void ohci_root_intr_abort(struct usbd_xfer *); 178 Static void ohci_root_intr_close(struct usbd_pipe *); 179 Static void ohci_root_intr_done(struct usbd_xfer *); 180 181 Static int ohci_device_ctrl_init(struct usbd_xfer *); 182 Static void ohci_device_ctrl_fini(struct usbd_xfer *); 183 Static usbd_status ohci_device_ctrl_transfer(struct usbd_xfer *); 184 Static usbd_status ohci_device_ctrl_start(struct usbd_xfer *); 185 Static void ohci_device_ctrl_abort(struct usbd_xfer *); 186 Static void ohci_device_ctrl_close(struct usbd_pipe *); 187 Static void ohci_device_ctrl_done(struct usbd_xfer *); 188 189 Static int ohci_device_bulk_init(struct usbd_xfer *); 190 Static void ohci_device_bulk_fini(struct usbd_xfer *); 191 Static usbd_status ohci_device_bulk_transfer(struct usbd_xfer *); 192 Static usbd_status ohci_device_bulk_start(struct usbd_xfer *); 193 Static void ohci_device_bulk_abort(struct usbd_xfer *); 194 Static void ohci_device_bulk_close(struct usbd_pipe *); 195 Static void ohci_device_bulk_done(struct usbd_xfer *); 196 197 Static int ohci_device_intr_init(struct usbd_xfer *); 198 Static void ohci_device_intr_fini(struct usbd_xfer *); 199 Static usbd_status ohci_device_intr_transfer(struct usbd_xfer *); 200 Static usbd_status ohci_device_intr_start(struct usbd_xfer *); 201 Static void ohci_device_intr_abort(struct usbd_xfer *); 202 Static void ohci_device_intr_close(struct usbd_pipe *); 203 Static void ohci_device_intr_done(struct usbd_xfer *); 204 205 Static int ohci_device_isoc_init(struct usbd_xfer *); 206 Static void ohci_device_isoc_fini(struct usbd_xfer *); 207 Static usbd_status ohci_device_isoc_transfer(struct usbd_xfer *); 208 Static void ohci_device_isoc_abort(struct usbd_xfer *); 209 Static void ohci_device_isoc_close(struct usbd_pipe *); 210 Static void ohci_device_isoc_done(struct usbd_xfer *); 211 212 Static usbd_status ohci_device_setintr(ohci_softc_t *, 213 struct ohci_pipe *, int); 214 215 Static void ohci_timeout(void *); 216 Static void ohci_timeout_task(void *); 217 Static void ohci_rhsc_enable(void *); 218 219 Static void ohci_close_pipe(struct usbd_pipe *, ohci_soft_ed_t *); 220 Static void ohci_abort_xfer(struct usbd_xfer *, usbd_status); 221 222 Static void ohci_device_clear_toggle(struct usbd_pipe *); 223 Static void ohci_noop(struct usbd_pipe *); 224 225 #ifdef OHCI_DEBUG 226 Static void ohci_dumpregs(ohci_softc_t *); 227 Static void ohci_dump_tds(ohci_softc_t *, ohci_soft_td_t *); 228 Static void ohci_dump_td(ohci_softc_t *, ohci_soft_td_t *); 229 Static void ohci_dump_ed(ohci_softc_t *, ohci_soft_ed_t *); 230 Static void ohci_dump_itd(ohci_softc_t *, ohci_soft_itd_t *); 231 Static void ohci_dump_itds(ohci_softc_t *, ohci_soft_itd_t *); 232 #endif 233 234 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 235 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 236 #define OWRITE1(sc, r, x) \ 237 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 238 #define OWRITE2(sc, r, x) \ 239 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 240 #define OWRITE4(sc, r, x) \ 241 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 242 243 static __inline uint32_t 244 OREAD4(ohci_softc_t *sc, bus_size_t r) 245 { 246 247 OBARR(sc); 248 return bus_space_read_4(sc->iot, sc->ioh, r); 249 } 250 251 /* Reverse the bits in a value 0 .. 31 */ 252 Static uint8_t revbits[OHCI_NO_INTRS] = 253 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 254 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 255 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 256 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 257 258 struct ohci_pipe { 259 struct usbd_pipe pipe; 260 ohci_soft_ed_t *sed; 261 union { 262 ohci_soft_td_t *td; 263 ohci_soft_itd_t *itd; 264 } tail; 265 /* Info needed for different pipe kinds. */ 266 union { 267 /* Control pipe */ 268 struct { 269 usb_dma_t reqdma; 270 } ctrl; 271 /* Interrupt pipe */ 272 struct { 273 int nslots; 274 int pos; 275 } intr; 276 /* Isochronous pipe */ 277 struct isoc { 278 int next, inuse; 279 } isoc; 280 }; 281 }; 282 283 Static const struct usbd_bus_methods ohci_bus_methods = { 284 .ubm_open = ohci_open, 285 .ubm_softint = ohci_softintr, 286 .ubm_dopoll = ohci_poll, 287 .ubm_allocx = ohci_allocx, 288 .ubm_freex = ohci_freex, 289 .ubm_getlock = ohci_get_lock, 290 .ubm_rhctrl = ohci_roothub_ctrl, 291 }; 292 293 Static const struct usbd_pipe_methods ohci_root_intr_methods = { 294 .upm_transfer = ohci_root_intr_transfer, 295 .upm_start = ohci_root_intr_start, 296 .upm_abort = ohci_root_intr_abort, 297 .upm_close = ohci_root_intr_close, 298 .upm_cleartoggle = ohci_noop, 299 .upm_done = ohci_root_intr_done, 300 }; 301 302 Static const struct usbd_pipe_methods ohci_device_ctrl_methods = { 303 .upm_init = ohci_device_ctrl_init, 304 .upm_fini = ohci_device_ctrl_fini, 305 .upm_transfer = ohci_device_ctrl_transfer, 306 .upm_start = ohci_device_ctrl_start, 307 .upm_abort = ohci_device_ctrl_abort, 308 .upm_close = ohci_device_ctrl_close, 309 .upm_cleartoggle = ohci_noop, 310 .upm_done = ohci_device_ctrl_done, 311 }; 312 313 Static const struct usbd_pipe_methods ohci_device_intr_methods = { 314 .upm_init = ohci_device_intr_init, 315 .upm_fini = ohci_device_intr_fini, 316 .upm_transfer = ohci_device_intr_transfer, 317 .upm_start = ohci_device_intr_start, 318 .upm_abort = ohci_device_intr_abort, 319 .upm_close = ohci_device_intr_close, 320 .upm_cleartoggle = ohci_device_clear_toggle, 321 .upm_done = ohci_device_intr_done, 322 }; 323 324 Static const struct usbd_pipe_methods ohci_device_bulk_methods = { 325 .upm_init = ohci_device_bulk_init, 326 .upm_fini = ohci_device_bulk_fini, 327 .upm_transfer = ohci_device_bulk_transfer, 328 .upm_start = ohci_device_bulk_start, 329 .upm_abort = ohci_device_bulk_abort, 330 .upm_close = ohci_device_bulk_close, 331 .upm_cleartoggle = ohci_device_clear_toggle, 332 .upm_done = ohci_device_bulk_done, 333 }; 334 335 Static const struct usbd_pipe_methods ohci_device_isoc_methods = { 336 .upm_init = ohci_device_isoc_init, 337 .upm_fini = ohci_device_isoc_fini, 338 .upm_transfer = ohci_device_isoc_transfer, 339 .upm_abort = ohci_device_isoc_abort, 340 .upm_close = ohci_device_isoc_close, 341 .upm_cleartoggle = ohci_noop, 342 .upm_done = ohci_device_isoc_done, 343 }; 344 345 int 346 ohci_activate(device_t self, enum devact act) 347 { 348 struct ohci_softc *sc = device_private(self); 349 350 switch (act) { 351 case DVACT_DEACTIVATE: 352 sc->sc_dying = 1; 353 return 0; 354 default: 355 return EOPNOTSUPP; 356 } 357 } 358 359 void 360 ohci_childdet(device_t self, device_t child) 361 { 362 struct ohci_softc *sc = device_private(self); 363 364 KASSERT(sc->sc_child == child); 365 sc->sc_child = NULL; 366 } 367 368 int 369 ohci_detach(struct ohci_softc *sc, int flags) 370 { 371 int rv = 0; 372 373 if (sc->sc_child != NULL) 374 rv = config_detach(sc->sc_child, flags); 375 376 if (rv != 0) 377 return rv; 378 379 callout_halt(&sc->sc_tmo_rhsc, &sc->sc_lock); 380 381 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 382 callout_destroy(&sc->sc_tmo_rhsc); 383 384 softint_disestablish(sc->sc_rhsc_si); 385 386 cv_destroy(&sc->sc_softwake_cv); 387 388 mutex_destroy(&sc->sc_lock); 389 mutex_destroy(&sc->sc_intr_lock); 390 391 if (sc->sc_hcca != NULL) 392 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 393 pool_cache_destroy(sc->sc_xferpool); 394 395 return rv; 396 } 397 398 ohci_soft_ed_t * 399 ohci_alloc_sed(ohci_softc_t *sc) 400 { 401 ohci_soft_ed_t *sed; 402 usbd_status err; 403 int i, offs; 404 usb_dma_t dma; 405 406 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 407 408 mutex_enter(&sc->sc_lock); 409 if (sc->sc_freeeds == NULL) { 410 DPRINTFN(2, "allocating chunk", 0, 0, 0, 0); 411 mutex_exit(&sc->sc_lock); 412 413 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 414 OHCI_ED_ALIGN, &dma); 415 if (err) 416 return 0; 417 418 mutex_enter(&sc->sc_lock); 419 for (i = 0; i < OHCI_SED_CHUNK; i++) { 420 offs = i * OHCI_SED_SIZE; 421 sed = KERNADDR(&dma, offs); 422 sed->physaddr = DMAADDR(&dma, offs); 423 sed->dma = dma; 424 sed->offs = offs; 425 sed->next = sc->sc_freeeds; 426 sc->sc_freeeds = sed; 427 } 428 } 429 sed = sc->sc_freeeds; 430 sc->sc_freeeds = sed->next; 431 mutex_exit(&sc->sc_lock); 432 433 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 434 sed->next = 0; 435 return sed; 436 } 437 438 static inline void 439 ohci_free_sed_locked(ohci_softc_t *sc, ohci_soft_ed_t *sed) 440 { 441 442 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 443 444 sed->next = sc->sc_freeeds; 445 sc->sc_freeeds = sed; 446 } 447 448 void 449 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 450 { 451 452 mutex_enter(&sc->sc_lock); 453 ohci_free_sed_locked(sc, sed); 454 mutex_exit(&sc->sc_lock); 455 } 456 457 ohci_soft_td_t * 458 ohci_alloc_std(ohci_softc_t *sc) 459 { 460 ohci_soft_td_t *std; 461 usbd_status err; 462 int i, offs; 463 usb_dma_t dma; 464 465 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 466 467 mutex_enter(&sc->sc_lock); 468 if (sc->sc_freetds == NULL) { 469 DPRINTFN(2, "allocating chunk", 0, 0, 0, 0); 470 mutex_exit(&sc->sc_lock); 471 472 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 473 OHCI_TD_ALIGN, &dma); 474 if (err) 475 return NULL; 476 477 mutex_enter(&sc->sc_lock); 478 for (i = 0; i < OHCI_STD_CHUNK; i++) { 479 offs = i * OHCI_STD_SIZE; 480 std = KERNADDR(&dma, offs); 481 std->physaddr = DMAADDR(&dma, offs); 482 std->dma = dma; 483 std->offs = offs; 484 std->nexttd = sc->sc_freetds; 485 sc->sc_freetds = std; 486 } 487 } 488 489 std = sc->sc_freetds; 490 sc->sc_freetds = std->nexttd; 491 mutex_exit(&sc->sc_lock); 492 493 memset(&std->td, 0, sizeof(ohci_td_t)); 494 std->nexttd = NULL; 495 std->xfer = NULL; 496 497 return std; 498 } 499 500 void 501 ohci_free_std_locked(ohci_softc_t *sc, ohci_soft_td_t *std) 502 { 503 504 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 505 506 std->nexttd = sc->sc_freetds; 507 sc->sc_freetds = std; 508 } 509 510 void 511 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std) 512 { 513 514 mutex_enter(&sc->sc_lock); 515 ohci_free_std_locked(sc, std); 516 mutex_exit(&sc->sc_lock); 517 } 518 519 Static usbd_status 520 ohci_alloc_std_chain(ohci_softc_t *sc, struct usbd_xfer *xfer, int alen, int rd) 521 { 522 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 523 struct usbd_pipe *pipe = xfer->ux_pipe; 524 ohci_soft_td_t *next, *cur; 525 ohci_physaddr_t dataphys, dataphysend; 526 uint32_t tdflags; 527 int len = alen; 528 int curlen; 529 usb_dma_t *dma = &xfer->ux_dmabuf; 530 uint16_t flags = xfer->ux_flags; 531 532 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 533 534 DPRINTFN(8, "addr=%d endpt=%d len=%d speed=%d", 535 pipe->up_dev->ud_addr, 536 UE_GET_ADDR(pipe->up_endpoint->ue_edesc->bEndpointAddress), 537 alen, pipe->up_dev->ud_speed); 538 539 ASSERT_SLEEPABLE(); 540 541 size_t nstd = (flags & USBD_FORCE_SHORT_XFER) ? 1 : 0; 542 nstd += ((len + OHCI_PAGE_SIZE - 1) / OHCI_PAGE_SIZE); 543 ox->ox_stds = kmem_zalloc(sizeof(ohci_soft_td_t *) * nstd, 544 KM_SLEEP); 545 ox->ox_nstd = nstd; 546 int mps = UGETW(pipe->up_endpoint->ue_edesc->wMaxPacketSize); 547 548 DPRINTFN(8, "xfer %p nstd %d mps %d", xfer, nstd, mps, 0); 549 550 len = alen; 551 cur = ohci_alloc_std(sc); 552 if (cur == NULL) 553 goto nomem; 554 555 dataphys = DMAADDR(dma, 0); 556 dataphysend = OHCI_PAGE(dataphys + len - 1); 557 tdflags = HTOO32( 558 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 559 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR); 560 561 for (size_t j = 0;;) { 562 ox->ox_stds[j++] = cur; 563 next = ohci_alloc_std(sc); 564 if (next == NULL) 565 goto nomem; 566 567 /* The OHCI hardware can handle at most one page crossing. */ 568 if (OHCI_PAGE(dataphys) == dataphysend || 569 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) { 570 /* we can handle it in this TD */ 571 curlen = len; 572 } else { 573 /* must use multiple TDs, fill as much as possible. */ 574 curlen = 2 * OHCI_PAGE_SIZE - 575 (dataphys & (OHCI_PAGE_SIZE-1)); 576 /* the length must be a multiple of the max size */ 577 curlen -= curlen % mps; 578 KASSERT(curlen != 0); 579 } 580 DPRINTFN(4, "dataphys=0x%08x dataphysend=0x%08x " 581 "len=%d curlen=%d", dataphys, dataphysend, len, curlen); 582 len -= curlen; 583 584 cur->td.td_flags = tdflags; 585 cur->td.td_cbp = HTOO32(dataphys); 586 cur->td.td_nexttd = HTOO32(next->physaddr); 587 cur->td.td_be = HTOO32(dataphys + curlen - 1); 588 cur->nexttd = next; 589 cur->len = curlen; 590 cur->flags = OHCI_ADD_LEN; 591 cur->xfer = xfer; 592 593 DPRINTFN(10, "cbp=0x%08x be=0x%08x", dataphys, 594 dataphys + curlen - 1, 0, 0); 595 if (len == 0) 596 break; 597 DPRINTFN(10, "extend chain", 0, 0, 0, 0); 598 dataphys += curlen; 599 cur = next; 600 } 601 if (!rd && (flags & USBD_FORCE_SHORT_XFER) && 602 alen % mps == 0) { 603 /* Force a 0 length transfer at the end. */ 604 605 cur = next; 606 next = ohci_alloc_std(sc); 607 if (next == NULL) 608 goto nomem; 609 610 cur->td.td_flags = tdflags; 611 cur->td.td_cbp = 0; /* indicate 0 length packet */ 612 cur->td.td_nexttd = HTOO32(next->physaddr); 613 cur->td.td_be = ~0; 614 cur->nexttd = next; 615 cur->len = 0; 616 cur->flags = 0; 617 cur->xfer = xfer; 618 619 DPRINTFN(2, "add 0 xfer", 0, 0, 0, 0); 620 } 621 622 return USBD_NORMAL_COMPLETION; 623 624 nomem: 625 ohci_free_stds(sc, ox); 626 627 return USBD_NOMEM; 628 } 629 630 Static void 631 ohci_free_stds(ohci_softc_t *sc, struct ohci_xfer *ox) 632 { 633 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 634 DPRINTF("ox=%p", ox, 0, 0, 0); 635 636 mutex_enter(&sc->sc_lock); 637 for (size_t i = 0; i < ox->ox_nstd; i++) { 638 ohci_soft_td_t *std = ox->ox_stds[i]; 639 if (std == NULL) 640 break; 641 ohci_free_std_locked(sc, std); 642 } 643 mutex_exit(&sc->sc_lock); 644 } 645 646 void 647 ohci_reset_std_chain(ohci_softc_t *sc, struct usbd_xfer *xfer, 648 int alen, int rd, ohci_soft_td_t *sp, ohci_soft_td_t **ep) 649 { 650 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 651 ohci_soft_td_t *next, *cur; 652 ohci_physaddr_t dataphys, dataphysend; 653 uint32_t tdflags; 654 int len, curlen; 655 usb_dma_t *dma = &xfer->ux_dmabuf; 656 uint16_t flags = xfer->ux_flags; 657 658 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 659 DPRINTF("start len=%d", alen, 0, 0, 0); 660 661 KASSERT(mutex_owned(&sc->sc_lock)); 662 663 DPRINTFN(8, "addr=%d endpt=%d len=%d speed=%d", 664 xfer->ux_pipe->up_dev->ud_addr, 665 UE_GET_ADDR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress), 666 alen, xfer->ux_pipe->up_dev->ud_speed); 667 668 KASSERT(sp); 669 670 int mps = UGETW(xfer->ux_pipe->up_endpoint->ue_edesc->wMaxPacketSize); 671 672 len = alen; 673 cur = sp; 674 675 dataphys = DMAADDR(dma, 0); 676 dataphysend = OHCI_PAGE(dataphys + len - 1); 677 usb_syncmem(dma, 0, len, 678 rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 679 tdflags = HTOO32( 680 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 681 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR); 682 683 for (size_t j = 1;;) { 684 if (j == ox->ox_nstd) 685 next = NULL; 686 else 687 next = ox->ox_stds[j++]; 688 KASSERT(next != cur); 689 690 /* The OHCI hardware can handle at most one page crossing. */ 691 if (OHCI_PAGE(dataphys) == dataphysend || 692 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) { 693 /* we can handle it in this TD */ 694 curlen = len; 695 } else { 696 /* must use multiple TDs, fill as much as possible. */ 697 curlen = 2 * OHCI_PAGE_SIZE - 698 (dataphys & (OHCI_PAGE_SIZE - 1)); 699 /* the length must be a multiple of the max size */ 700 curlen -= curlen % mps; 701 KASSERT(curlen != 0); 702 } 703 DPRINTFN(4, "dataphys=0x%08x dataphysend=0x%08x " 704 "len=%d curlen=%d", dataphys, dataphysend, len, curlen); 705 len -= curlen; 706 707 cur->td.td_flags = tdflags; 708 cur->td.td_cbp = HTOO32(dataphys); 709 cur->td.td_be = HTOO32(dataphys + curlen - 1); 710 cur->td.td_nexttd = (next != NULL) ? HTOO32(next->physaddr) : 0; 711 cur->nexttd = next; 712 cur->len = curlen; 713 cur->flags = OHCI_ADD_LEN; 714 cur->xfer = xfer; 715 ohci_hash_add_td(sc, cur); 716 717 usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td), 718 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 719 DPRINTFN(10, "cbp=0x%08x be=0x%08x", dataphys, 720 dataphys + curlen - 1, 0, 0); 721 if (len == 0) 722 break; 723 KASSERT(next != NULL); 724 DPRINTFN(10, "extend chain", 0, 0, 0, 0); 725 dataphys += curlen; 726 cur = next; 727 } 728 cur->td.td_flags |= 729 (xfer->ux_flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0); 730 731 if (!rd && 732 (flags & USBD_FORCE_SHORT_XFER) && 733 alen % mps == 0) { 734 /* Force a 0 length transfer at the end. */ 735 736 KASSERT(next != NULL); 737 cur = next; 738 739 cur->td.td_flags = tdflags; 740 cur->td.td_cbp = 0; /* indicate 0 length packet */ 741 cur->td.td_nexttd = HTOO32(next->physaddr); 742 cur->td.td_be = ~0; 743 cur->nexttd = NULL; 744 cur->len = 0; 745 cur->flags = 0; 746 cur->xfer = xfer; 747 ohci_hash_add_td(sc, cur); 748 749 usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td), 750 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 751 DPRINTFN(2, "add 0 xfer", 0, 0, 0, 0); 752 } 753 *ep = cur; 754 } 755 756 ohci_soft_itd_t * 757 ohci_alloc_sitd(ohci_softc_t *sc) 758 { 759 ohci_soft_itd_t *sitd; 760 usbd_status err; 761 int i, offs; 762 usb_dma_t dma; 763 764 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 765 766 mutex_enter(&sc->sc_lock); 767 if (sc->sc_freeitds == NULL) { 768 DPRINTFN(2, "allocating chunk", 0, 0, 0, 0); 769 mutex_exit(&sc->sc_lock); 770 771 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK, 772 OHCI_ITD_ALIGN, &dma); 773 if (err) 774 return NULL; 775 mutex_enter(&sc->sc_lock); 776 for (i = 0; i < OHCI_SITD_CHUNK; i++) { 777 offs = i * OHCI_SITD_SIZE; 778 sitd = KERNADDR(&dma, offs); 779 sitd->physaddr = DMAADDR(&dma, offs); 780 sitd->dma = dma; 781 sitd->offs = offs; 782 sitd->nextitd = sc->sc_freeitds; 783 sc->sc_freeitds = sitd; 784 } 785 } 786 787 sitd = sc->sc_freeitds; 788 sc->sc_freeitds = sitd->nextitd; 789 mutex_exit(&sc->sc_lock); 790 791 memset(&sitd->itd, 0, sizeof(ohci_itd_t)); 792 sitd->nextitd = NULL; 793 sitd->xfer = NULL; 794 795 #ifdef DIAGNOSTIC 796 sitd->isdone = true; 797 #endif 798 799 return sitd; 800 } 801 802 Static void 803 ohci_free_sitd_locked(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 804 { 805 806 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 807 DPRINTFN(10, "sitd=%p", sitd, 0, 0, 0); 808 809 KASSERT(sitd->isdone); 810 #ifdef DIAGNOSTIC 811 /* Warn double free */ 812 sitd->isdone = false; 813 #endif 814 815 sitd->nextitd = sc->sc_freeitds; 816 sc->sc_freeitds = sitd; 817 } 818 819 void 820 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 821 { 822 823 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 824 825 mutex_enter(&sc->sc_lock); 826 ohci_free_sitd_locked(sc, sitd); 827 mutex_exit(&sc->sc_lock); 828 } 829 830 int 831 ohci_init(ohci_softc_t *sc) 832 { 833 ohci_soft_ed_t *sed, *psed; 834 usbd_status err; 835 int i; 836 uint32_t s, ctl, rwc, ival, hcr, fm, per, rev, desca /*, descb */; 837 838 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 839 840 aprint_normal_dev(sc->sc_dev, ""); 841 842 sc->sc_hcca = NULL; 843 callout_init(&sc->sc_tmo_rhsc, CALLOUT_MPSAFE); 844 845 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_SOFTUSB); 846 mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_USB); 847 cv_init(&sc->sc_softwake_cv, "ohciab"); 848 849 sc->sc_rhsc_si = softint_establish(SOFTINT_NET | SOFTINT_MPSAFE, 850 ohci_rhsc_softint, sc); 851 852 for (i = 0; i < OHCI_HASH_SIZE; i++) 853 LIST_INIT(&sc->sc_hash_tds[i]); 854 for (i = 0; i < OHCI_HASH_SIZE; i++) 855 LIST_INIT(&sc->sc_hash_itds[i]); 856 857 sc->sc_xferpool = pool_cache_init(sizeof(struct ohci_xfer), 0, 0, 0, 858 "ohcixfer", NULL, IPL_USB, NULL, NULL, NULL); 859 860 rev = OREAD4(sc, OHCI_REVISION); 861 aprint_normal("OHCI version %d.%d%s\n", 862 OHCI_REV_HI(rev), OHCI_REV_LO(rev), 863 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 864 865 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 866 aprint_error_dev(sc->sc_dev, "unsupported OHCI revision\n"); 867 sc->sc_bus.ub_revision = USBREV_UNKNOWN; 868 return -1; 869 } 870 sc->sc_bus.ub_revision = USBREV_1_0; 871 sc->sc_bus.ub_usedma = true; 872 873 /* XXX determine alignment by R/W */ 874 /* Allocate the HCCA area. */ 875 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 876 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 877 if (err) { 878 sc->sc_hcca = NULL; 879 return err; 880 } 881 sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0); 882 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 883 884 sc->sc_eintrs = OHCI_NORMAL_INTRS; 885 886 /* Allocate dummy ED that starts the control list. */ 887 sc->sc_ctrl_head = ohci_alloc_sed(sc); 888 if (sc->sc_ctrl_head == NULL) { 889 err = ENOMEM; 890 goto bad1; 891 } 892 sc->sc_ctrl_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 893 894 /* Allocate dummy ED that starts the bulk list. */ 895 sc->sc_bulk_head = ohci_alloc_sed(sc); 896 if (sc->sc_bulk_head == NULL) { 897 err = ENOMEM; 898 goto bad2; 899 } 900 sc->sc_bulk_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 901 usb_syncmem(&sc->sc_bulk_head->dma, sc->sc_bulk_head->offs, 902 sizeof(sc->sc_bulk_head->ed), 903 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 904 905 /* Allocate dummy ED that starts the isochronous list. */ 906 sc->sc_isoc_head = ohci_alloc_sed(sc); 907 if (sc->sc_isoc_head == NULL) { 908 err = ENOMEM; 909 goto bad3; 910 } 911 sc->sc_isoc_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 912 usb_syncmem(&sc->sc_isoc_head->dma, sc->sc_isoc_head->offs, 913 sizeof(sc->sc_isoc_head->ed), 914 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 915 916 /* Allocate all the dummy EDs that make up the interrupt tree. */ 917 for (i = 0; i < OHCI_NO_EDS; i++) { 918 sed = ohci_alloc_sed(sc); 919 if (sed == NULL) { 920 while (--i >= 0) 921 ohci_free_sed(sc, sc->sc_eds[i]); 922 err = ENOMEM; 923 goto bad4; 924 } 925 /* All ED fields are set to 0. */ 926 sc->sc_eds[i] = sed; 927 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 928 if (i != 0) 929 psed = sc->sc_eds[(i-1) / 2]; 930 else 931 psed= sc->sc_isoc_head; 932 sed->next = psed; 933 sed->ed.ed_nexted = HTOO32(psed->physaddr); 934 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 935 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 936 } 937 /* 938 * Fill HCCA interrupt table. The bit reversal is to get 939 * the tree set up properly to spread the interrupts. 940 */ 941 for (i = 0; i < OHCI_NO_INTRS; i++) 942 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 943 HTOO32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 944 usb_syncmem(&sc->sc_hccadma, 0, OHCI_HCCA_SIZE, 945 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 946 947 #ifdef OHCI_DEBUG 948 DPRINTFN(15, "--- dump start ---", 0, 0, 0 ,0); 949 if (ohcidebug >= 15) { 950 for (i = 0; i < OHCI_NO_EDS; i++) { 951 DPRINTFN(15, "ed#%d ", i, 0, 0, 0); 952 ohci_dump_ed(sc, sc->sc_eds[i]); 953 } 954 DPRINTFN(15, "iso", 0, 0, 0 ,0); 955 ohci_dump_ed(sc, sc->sc_isoc_head); 956 } 957 DPRINTFN(15, "--- dump end ---", 0, 0, 0 ,0); 958 #endif 959 960 /* Preserve values programmed by SMM/BIOS but lost over reset. */ 961 ctl = OREAD4(sc, OHCI_CONTROL); 962 rwc = ctl & OHCI_RWC; 963 fm = OREAD4(sc, OHCI_FM_INTERVAL); 964 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 965 /* descb = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); */ 966 967 /* Determine in what context we are running. */ 968 if (ctl & OHCI_IR) { 969 /* SMM active, request change */ 970 DPRINTF("SMM active, request owner change", 0, 0, 0, 0); 971 if ((sc->sc_intre & (OHCI_OC | OHCI_MIE)) == 972 (OHCI_OC | OHCI_MIE)) 973 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_MIE); 974 s = OREAD4(sc, OHCI_COMMAND_STATUS); 975 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 976 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 977 usb_delay_ms(&sc->sc_bus, 1); 978 ctl = OREAD4(sc, OHCI_CONTROL); 979 } 980 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_MIE); 981 if ((ctl & OHCI_IR) == 0) { 982 aprint_error_dev(sc->sc_dev, 983 "SMM does not respond, resetting\n"); 984 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 985 goto reset; 986 } 987 #if 0 988 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */ 989 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 990 /* BIOS started controller. */ 991 DPRINTF("BIOS active", 0, 0, 0, 0); 992 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 993 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL | rwc); 994 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 995 } 996 #endif 997 } else { 998 DPRINTF("cold started", 0 ,0 ,0 ,0); 999 reset: 1000 /* Controller was cold started. */ 1001 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 1002 } 1003 1004 /* 1005 * This reset should not be necessary according to the OHCI spec, but 1006 * without it some controllers do not start. 1007 */ 1008 DPRINTF("sc %p: resetting", sc, 0, 0, 0); 1009 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 1010 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 1011 1012 /* We now own the host controller and the bus has been reset. */ 1013 1014 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 1015 /* Nominal time for a reset is 10 us. */ 1016 for (i = 0; i < 10; i++) { 1017 delay(10); 1018 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 1019 if (!hcr) 1020 break; 1021 } 1022 if (hcr) { 1023 aprint_error_dev(sc->sc_dev, "reset timeout\n"); 1024 err = EIO; 1025 goto bad5; 1026 } 1027 #ifdef OHCI_DEBUG 1028 if (ohcidebug >= 15) 1029 ohci_dumpregs(sc); 1030 #endif 1031 1032 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 1033 1034 /* Set up HC registers. */ 1035 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 1036 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 1037 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 1038 /* disable all interrupts and then switch on all desired interrupts */ 1039 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 1040 /* switch on desired functional features */ 1041 ctl = OREAD4(sc, OHCI_CONTROL); 1042 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 1043 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 1044 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL | rwc; 1045 /* And finally start it! */ 1046 OWRITE4(sc, OHCI_CONTROL, ctl); 1047 1048 /* 1049 * The controller is now OPERATIONAL. Set a some final 1050 * registers that should be set earlier, but that the 1051 * controller ignores when in the SUSPEND state. 1052 */ 1053 ival = OHCI_GET_IVAL(fm); 1054 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 1055 fm |= OHCI_FSMPS(ival) | ival; 1056 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 1057 per = OHCI_PERIODIC(ival); /* 90% periodic */ 1058 OWRITE4(sc, OHCI_PERIODIC_START, per); 1059 1060 if (sc->sc_flags & OHCIF_SUPERIO) { 1061 /* no overcurrent protection */ 1062 desca |= OHCI_NOCP; 1063 /* 1064 * Clear NoPowerSwitching and PowerOnToPowerGoodTime meaning 1065 * that 1066 * - ports are always power switched 1067 * - don't wait for powered root hub port 1068 */ 1069 desca &= ~(__SHIFTIN(0xff, OHCI_POTPGT_MASK) | OHCI_NPS); 1070 } 1071 1072 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */ 1073 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP); 1074 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 1075 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY); 1076 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca); 1077 1078 /* 1079 * The AMD756 requires a delay before re-reading the register, 1080 * otherwise it will occasionally report 0 ports. 1081 */ 1082 sc->sc_noport = 0; 1083 for (i = 0; i < 10 && sc->sc_noport == 0; i++) { 1084 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY); 1085 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 1086 } 1087 1088 #ifdef OHCI_DEBUG 1089 if (ohcidebug >= 5) 1090 ohci_dumpregs(sc); 1091 #endif 1092 1093 /* Set up the bus struct. */ 1094 sc->sc_bus.ub_methods = &ohci_bus_methods; 1095 sc->sc_bus.ub_pipesize = sizeof(struct ohci_pipe); 1096 1097 sc->sc_control = sc->sc_intre = 0; 1098 1099 /* Finally, turn on interrupts. */ 1100 DPRINTF("enabling %#x", sc->sc_eintrs | OHCI_MIE, 0, 0, 0); 1101 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 1102 1103 return 0; 1104 1105 bad5: 1106 for (i = 0; i < OHCI_NO_EDS; i++) 1107 ohci_free_sed(sc, sc->sc_eds[i]); 1108 bad4: 1109 ohci_free_sed(sc, sc->sc_isoc_head); 1110 bad3: 1111 ohci_free_sed(sc, sc->sc_bulk_head); 1112 bad2: 1113 ohci_free_sed(sc, sc->sc_ctrl_head); 1114 bad1: 1115 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 1116 sc->sc_hcca = NULL; 1117 return err; 1118 } 1119 1120 struct usbd_xfer * 1121 ohci_allocx(struct usbd_bus *bus, unsigned int nframes) 1122 { 1123 ohci_softc_t *sc = OHCI_BUS2SC(bus); 1124 struct usbd_xfer *xfer; 1125 1126 xfer = pool_cache_get(sc->sc_xferpool, PR_NOWAIT); 1127 if (xfer != NULL) { 1128 memset(xfer, 0, sizeof(struct ohci_xfer)); 1129 #ifdef DIAGNOSTIC 1130 xfer->ux_state = XFER_BUSY; 1131 #endif 1132 } 1133 return xfer; 1134 } 1135 1136 void 1137 ohci_freex(struct usbd_bus *bus, struct usbd_xfer *xfer) 1138 { 1139 ohci_softc_t *sc = OHCI_BUS2SC(bus); 1140 1141 KASSERTMSG(xfer->ux_state == XFER_BUSY, 1142 "xfer=%p not busy, 0x%08x\n", xfer, xfer->ux_state); 1143 #ifdef DIAGNOSTIC 1144 xfer->ux_state = XFER_FREE; 1145 #endif 1146 pool_cache_put(sc->sc_xferpool, xfer); 1147 } 1148 1149 Static void 1150 ohci_get_lock(struct usbd_bus *bus, kmutex_t **lock) 1151 { 1152 ohci_softc_t *sc = OHCI_BUS2SC(bus); 1153 1154 *lock = &sc->sc_lock; 1155 } 1156 1157 /* 1158 * Shut down the controller when the system is going down. 1159 */ 1160 bool 1161 ohci_shutdown(device_t self, int flags) 1162 { 1163 ohci_softc_t *sc = device_private(self); 1164 1165 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1166 1167 DPRINTF("stopping the HC", 0, 0, 0, 0); 1168 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1169 return true; 1170 } 1171 1172 bool 1173 ohci_resume(device_t dv, const pmf_qual_t *qual) 1174 { 1175 ohci_softc_t *sc = device_private(dv); 1176 uint32_t ctl; 1177 1178 mutex_spin_enter(&sc->sc_intr_lock); 1179 sc->sc_bus.ub_usepolling++; 1180 mutex_spin_exit(&sc->sc_intr_lock); 1181 1182 /* Some broken BIOSes do not recover these values */ 1183 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 1184 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, 1185 sc->sc_ctrl_head->physaddr); 1186 OWRITE4(sc, OHCI_BULK_HEAD_ED, 1187 sc->sc_bulk_head->physaddr); 1188 if (sc->sc_intre) 1189 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_intre & 1190 (OHCI_ALL_INTRS | OHCI_MIE)); 1191 if (sc->sc_control) 1192 ctl = sc->sc_control; 1193 else 1194 ctl = OREAD4(sc, OHCI_CONTROL); 1195 ctl |= OHCI_HCFS_RESUME; 1196 OWRITE4(sc, OHCI_CONTROL, ctl); 1197 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 1198 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL; 1199 OWRITE4(sc, OHCI_CONTROL, ctl); 1200 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 1201 sc->sc_control = sc->sc_intre = 0; 1202 1203 mutex_spin_enter(&sc->sc_intr_lock); 1204 sc->sc_bus.ub_usepolling--; 1205 mutex_spin_exit(&sc->sc_intr_lock); 1206 1207 return true; 1208 } 1209 1210 bool 1211 ohci_suspend(device_t dv, const pmf_qual_t *qual) 1212 { 1213 ohci_softc_t *sc = device_private(dv); 1214 uint32_t ctl; 1215 1216 mutex_spin_enter(&sc->sc_intr_lock); 1217 sc->sc_bus.ub_usepolling++; 1218 mutex_spin_exit(&sc->sc_intr_lock); 1219 1220 ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK; 1221 if (sc->sc_control == 0) { 1222 /* 1223 * Preserve register values, in case that BIOS 1224 * does not recover them. 1225 */ 1226 sc->sc_control = ctl; 1227 sc->sc_intre = OREAD4(sc, 1228 OHCI_INTERRUPT_ENABLE); 1229 } 1230 ctl |= OHCI_HCFS_SUSPEND; 1231 OWRITE4(sc, OHCI_CONTROL, ctl); 1232 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1233 1234 mutex_spin_enter(&sc->sc_intr_lock); 1235 sc->sc_bus.ub_usepolling--; 1236 mutex_spin_exit(&sc->sc_intr_lock); 1237 1238 return true; 1239 } 1240 1241 #ifdef OHCI_DEBUG 1242 void 1243 ohci_dumpregs(ohci_softc_t *sc) 1244 { 1245 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1246 1247 DPRINTF("rev=0x%08x control=0x%08x command=0x%08x", 1248 OREAD4(sc, OHCI_REVISION), 1249 OREAD4(sc, OHCI_CONTROL), 1250 OREAD4(sc, OHCI_COMMAND_STATUS), 0); 1251 DPRINTF(" intrstat=0x%08x intre=0x%08x intrd=0x%08x", 1252 OREAD4(sc, OHCI_INTERRUPT_STATUS), 1253 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 1254 OREAD4(sc, OHCI_INTERRUPT_DISABLE), 0); 1255 DPRINTF(" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x", 1256 OREAD4(sc, OHCI_HCCA), 1257 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 1258 OREAD4(sc, OHCI_CONTROL_HEAD_ED), 0); 1259 DPRINTF(" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x", 1260 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 1261 OREAD4(sc, OHCI_BULK_HEAD_ED), 1262 OREAD4(sc, OHCI_BULK_CURRENT_ED) ,0); 1263 DPRINTF(" done=0x%08x fmival=0x%08x fmrem=0x%08x", 1264 OREAD4(sc, OHCI_DONE_HEAD), 1265 OREAD4(sc, OHCI_FM_INTERVAL), 1266 OREAD4(sc, OHCI_FM_REMAINING), 0); 1267 DPRINTF(" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x", 1268 OREAD4(sc, OHCI_FM_NUMBER), 1269 OREAD4(sc, OHCI_PERIODIC_START), 1270 OREAD4(sc, OHCI_LS_THRESHOLD), 0); 1271 DPRINTF(" desca=0x%08x descb=0x%08x stat=0x%08x", 1272 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 1273 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 1274 OREAD4(sc, OHCI_RH_STATUS), 0); 1275 DPRINTF(" port1=0x%08x port2=0x%08x", 1276 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 1277 OREAD4(sc, OHCI_RH_PORT_STATUS(2)), 0, 0); 1278 DPRINTF(" HCCA: frame_number=0x%04x done_head=0x%08x", 1279 O32TOH(sc->sc_hcca->hcca_frame_number), 1280 O32TOH(sc->sc_hcca->hcca_done_head), 0, 0); 1281 } 1282 #endif 1283 1284 Static int ohci_intr1(ohci_softc_t *); 1285 1286 int 1287 ohci_intr(void *p) 1288 { 1289 ohci_softc_t *sc = p; 1290 int ret = 0; 1291 1292 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1293 1294 if (sc == NULL) 1295 return 0; 1296 1297 mutex_spin_enter(&sc->sc_intr_lock); 1298 1299 if (sc->sc_dying || !device_has_power(sc->sc_dev)) 1300 goto done; 1301 1302 /* If we get an interrupt while polling, then just ignore it. */ 1303 if (sc->sc_bus.ub_usepolling) { 1304 DPRINTFN(16, "ignored interrupt while polling", 0, 0, 0, 0); 1305 /* for level triggered intrs, should do something to ack */ 1306 OWRITE4(sc, OHCI_INTERRUPT_STATUS, 1307 OREAD4(sc, OHCI_INTERRUPT_STATUS)); 1308 1309 goto done; 1310 } 1311 1312 ret = ohci_intr1(sc); 1313 1314 done: 1315 mutex_spin_exit(&sc->sc_intr_lock); 1316 return ret; 1317 } 1318 1319 Static int 1320 ohci_intr1(ohci_softc_t *sc) 1321 { 1322 uint32_t intrs, eintrs; 1323 1324 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1325 1326 /* In case the interrupt occurs before initialization has completed. */ 1327 if (sc == NULL || sc->sc_hcca == NULL) { 1328 #ifdef DIAGNOSTIC 1329 printf("ohci_intr: sc->sc_hcca == NULL\n"); 1330 #endif 1331 return 0; 1332 } 1333 1334 KASSERT(mutex_owned(&sc->sc_intr_lock)); 1335 1336 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1337 if (!intrs) 1338 return 0; 1339 1340 /* Acknowledge */ 1341 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs & ~(OHCI_MIE|OHCI_WDH)); 1342 eintrs = intrs & sc->sc_eintrs; 1343 DPRINTFN(7, "sc=%p", sc, 0, 0, 0); 1344 DPRINTFN(7, "intrs=%#x(%#x) eintrs=%#x(%#x)", 1345 intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), eintrs, 1346 sc->sc_eintrs); 1347 1348 if (!eintrs) { 1349 return 0; 1350 } 1351 1352 if (eintrs & OHCI_SO) { 1353 sc->sc_overrun_cnt++; 1354 if (usbd_ratecheck(&sc->sc_overrun_ntc)) { 1355 printf("%s: %u scheduling overruns\n", 1356 device_xname(sc->sc_dev), sc->sc_overrun_cnt); 1357 sc->sc_overrun_cnt = 0; 1358 } 1359 /* XXX do what */ 1360 eintrs &= ~OHCI_SO; 1361 } 1362 if (eintrs & OHCI_WDH) { 1363 /* 1364 * We block the interrupt below, and reenable it later from 1365 * ohci_softintr(). 1366 */ 1367 usb_schedsoftintr(&sc->sc_bus); 1368 } 1369 if (eintrs & OHCI_RD) { 1370 DPRINTFN(5, "resume detect", sc, 0, 0, 0); 1371 printf("%s: resume detect\n", device_xname(sc->sc_dev)); 1372 /* XXX process resume detect */ 1373 } 1374 if (eintrs & OHCI_UE) { 1375 DPRINTFN(5, "unrecoverable error", sc, 0, 0, 0); 1376 printf("%s: unrecoverable error, controller halted\n", 1377 device_xname(sc->sc_dev)); 1378 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1379 /* XXX what else */ 1380 } 1381 if (eintrs & OHCI_RHSC) { 1382 /* 1383 * We block the interrupt below, and reenable it later from 1384 * a timeout. 1385 */ 1386 softint_schedule(sc->sc_rhsc_si); 1387 } 1388 1389 if (eintrs != 0) { 1390 /* Block unprocessed interrupts. */ 1391 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs); 1392 sc->sc_eintrs &= ~eintrs; 1393 DPRINTF("sc %p blocking intrs 0x%x", sc, eintrs, 0, 0); 1394 } 1395 1396 return 1; 1397 } 1398 1399 void 1400 ohci_rhsc_enable(void *v_sc) 1401 { 1402 ohci_softc_t *sc = v_sc; 1403 1404 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1405 DPRINTF("sc %p", sc, 0, 0, 0); 1406 mutex_spin_enter(&sc->sc_intr_lock); 1407 sc->sc_eintrs |= OHCI_RHSC; 1408 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1409 mutex_spin_exit(&sc->sc_intr_lock); 1410 } 1411 1412 #ifdef OHCI_DEBUG 1413 const char *ohci_cc_strs[] = { 1414 "NO_ERROR", 1415 "CRC", 1416 "BIT_STUFFING", 1417 "DATA_TOGGLE_MISMATCH", 1418 "STALL", 1419 "DEVICE_NOT_RESPONDING", 1420 "PID_CHECK_FAILURE", 1421 "UNEXPECTED_PID", 1422 "DATA_OVERRUN", 1423 "DATA_UNDERRUN", 1424 "BUFFER_OVERRUN", 1425 "BUFFER_UNDERRUN", 1426 "reserved", 1427 "reserved", 1428 "NOT_ACCESSED", 1429 "NOT_ACCESSED", 1430 }; 1431 #endif 1432 1433 void 1434 ohci_softintr(void *v) 1435 { 1436 struct usbd_bus *bus = v; 1437 ohci_softc_t *sc = OHCI_BUS2SC(bus); 1438 ohci_soft_itd_t *sitd, *sidone, *sitdnext; 1439 ohci_soft_td_t *std, *sdone, *stdnext; 1440 struct usbd_xfer *xfer; 1441 struct ohci_pipe *opipe; 1442 int len, cc; 1443 int i, j, actlen, iframes, uedir; 1444 ohci_physaddr_t done; 1445 1446 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1447 1448 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1449 1450 usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head), 1451 sizeof(sc->sc_hcca->hcca_done_head), 1452 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1453 done = O32TOH(sc->sc_hcca->hcca_done_head) & ~OHCI_DONE_INTRS; 1454 sc->sc_hcca->hcca_done_head = 0; 1455 usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head), 1456 sizeof(sc->sc_hcca->hcca_done_head), 1457 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1458 OWRITE4(sc, OHCI_INTERRUPT_STATUS, OHCI_WDH); 1459 sc->sc_eintrs |= OHCI_WDH; 1460 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_WDH); 1461 1462 /* Reverse the done list. */ 1463 for (sdone = NULL, sidone = NULL; done != 0; ) { 1464 std = ohci_hash_find_td(sc, done); 1465 if (std != NULL) { 1466 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 1467 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1468 std->dnext = sdone; 1469 done = O32TOH(std->td.td_nexttd); 1470 sdone = std; 1471 DPRINTFN(10, "add TD %p", std, 0, 0, 0); 1472 continue; 1473 } 1474 sitd = ohci_hash_find_itd(sc, done); 1475 if (sitd != NULL) { 1476 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 1477 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1478 sitd->dnext = sidone; 1479 done = O32TOH(sitd->itd.itd_nextitd); 1480 sidone = sitd; 1481 DPRINTFN(5, "add ITD %p", sitd, 0, 0, 0); 1482 continue; 1483 } 1484 DPRINTFN(10, "addr %p not found", done, 0, 0, 0); 1485 device_printf(sc->sc_dev, "WARNING: addr 0x%08lx not found\n", 1486 (u_long)done); 1487 break; 1488 } 1489 1490 DPRINTFN(10, "sdone=%p sidone=%p", sdone, sidone, 0, 0); 1491 DPRINTFN(10, "--- TD dump start ---", 0, 0, 0, 0); 1492 #ifdef OHCI_DEBUG 1493 if (ohcidebug >= 10) { 1494 for (std = sdone; std; std = std->dnext) 1495 ohci_dump_td(sc, std); 1496 } 1497 #endif 1498 DPRINTFN(10, "--- TD dump end ---", 0, 0, 0, 0); 1499 1500 for (std = sdone; std; std = stdnext) { 1501 xfer = std->xfer; 1502 stdnext = std->dnext; 1503 DPRINTFN(10, "std=%p xfer=%p hcpriv=%p", std, xfer, 1504 xfer ? xfer->ux_hcpriv : 0, 0); 1505 if (xfer == NULL) { 1506 /* 1507 * xfer == NULL: There seems to be no xfer associated 1508 * with this TD. It is tailp that happened to end up on 1509 * the done queue. 1510 * Shouldn't happen, but some chips are broken(?). 1511 */ 1512 continue; 1513 } 1514 if (xfer->ux_status == USBD_CANCELLED || 1515 xfer->ux_status == USBD_TIMEOUT) { 1516 DPRINTF("cancel/timeout %p", xfer, 0, 0, 0); 1517 /* Handled by abort routine. */ 1518 continue; 1519 } 1520 callout_stop(&xfer->ux_callout); 1521 1522 len = std->len; 1523 if (std->td.td_cbp != 0) 1524 len -= O32TOH(std->td.td_be) - 1525 O32TOH(std->td.td_cbp) + 1; 1526 DPRINTFN(10, "len=%d, flags=0x%x", len, std->flags, 0, 0); 1527 if (std->flags & OHCI_ADD_LEN) 1528 xfer->ux_actlen += len; 1529 1530 cc = OHCI_TD_GET_CC(O32TOH(std->td.td_flags)); 1531 if (cc == OHCI_CC_NO_ERROR) { 1532 ohci_hash_rem_td(sc, std); 1533 if (std->flags & OHCI_CALL_DONE) { 1534 xfer->ux_status = USBD_NORMAL_COMPLETION; 1535 usb_transfer_complete(xfer); 1536 } 1537 } else { 1538 /* 1539 * Endpoint is halted. First unlink all the TDs 1540 * belonging to the failed transfer, and then restart 1541 * the endpoint. 1542 */ 1543 ohci_soft_td_t *p, *n; 1544 opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 1545 1546 DPRINTFN(10, "error cc=%d", cc, 0, 0, 0); 1547 1548 /* remove xfer's TDs from the hash */ 1549 for (p = std; p->xfer == xfer; p = n) { 1550 n = p->nexttd; 1551 ohci_hash_rem_td(sc, p); 1552 } 1553 1554 ohci_soft_ed_t *sed = opipe->sed; 1555 1556 /* clear halt and TD chain */ 1557 sed->ed.ed_headp = HTOO32(p->physaddr); 1558 usb_syncmem(&sed->dma, 1559 sed->offs + offsetof(ohci_ed_t, ed_headp), 1560 sizeof(sed->ed.ed_headp), 1561 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1562 1563 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1564 1565 if (cc == OHCI_CC_DATA_UNDERRUN) 1566 xfer->ux_status = USBD_NORMAL_COMPLETION; 1567 else if (cc == OHCI_CC_STALL) 1568 xfer->ux_status = USBD_STALLED; 1569 else 1570 xfer->ux_status = USBD_IOERROR; 1571 usb_transfer_complete(xfer); 1572 } 1573 } 1574 DPRINTFN(10, "--- ITD dump start ---", 0, 0, 0, 0); 1575 #ifdef OHCI_DEBUG 1576 if (ohcidebug >= 10) { 1577 for (sitd = sidone; sitd; sitd = sitd->dnext) 1578 ohci_dump_itd(sc, sitd); 1579 } 1580 #endif 1581 DPRINTFN(10, "--- ITD dump end ---", 0, 0, 0, 0); 1582 1583 for (sitd = sidone; sitd != NULL; sitd = sitdnext) { 1584 xfer = sitd->xfer; 1585 sitdnext = sitd->dnext; 1586 DPRINTFN(1, "sitd=%p xfer=%p hcpriv=%p", sitd, xfer, 1587 xfer ? xfer->ux_hcpriv : 0, 0); 1588 if (xfer == NULL) 1589 continue; 1590 if (xfer->ux_status == USBD_CANCELLED || 1591 xfer->ux_status == USBD_TIMEOUT) { 1592 DPRINTF("cancel/timeout %p", xfer, 0, 0, 0); 1593 /* Handled by abort routine. */ 1594 continue; 1595 } 1596 KASSERT(!sitd->isdone); 1597 #ifdef DIAGNOSTIC 1598 sitd->isdone = true; 1599 #endif 1600 if (sitd->flags & OHCI_CALL_DONE) { 1601 ohci_soft_itd_t *next; 1602 1603 opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 1604 opipe->isoc.inuse -= xfer->ux_nframes; 1605 uedir = UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc-> 1606 bEndpointAddress); 1607 xfer->ux_status = USBD_NORMAL_COMPLETION; 1608 actlen = 0; 1609 for (i = 0, sitd = xfer->ux_hcpriv;; 1610 sitd = next) { 1611 next = sitd->nextitd; 1612 if (OHCI_ITD_GET_CC(O32TOH(sitd-> 1613 itd.itd_flags)) != OHCI_CC_NO_ERROR) 1614 xfer->ux_status = USBD_IOERROR; 1615 /* For input, update frlengths with actual */ 1616 /* XXX anything necessary for output? */ 1617 if (uedir == UE_DIR_IN && 1618 xfer->ux_status == USBD_NORMAL_COMPLETION) { 1619 iframes = OHCI_ITD_GET_FC(O32TOH( 1620 sitd->itd.itd_flags)); 1621 for (j = 0; j < iframes; i++, j++) { 1622 len = O16TOH(sitd-> 1623 itd.itd_offset[j]); 1624 if ((OHCI_ITD_PSW_GET_CC(len) & 1625 OHCI_CC_NOT_ACCESSED_MASK) 1626 == OHCI_CC_NOT_ACCESSED) 1627 len = 0; 1628 else 1629 len = OHCI_ITD_PSW_LENGTH(len); 1630 xfer->ux_frlengths[i] = len; 1631 actlen += len; 1632 } 1633 } 1634 if (sitd->flags & OHCI_CALL_DONE) 1635 break; 1636 ohci_hash_rem_itd(sc, sitd); 1637 1638 } 1639 ohci_hash_rem_itd(sc, sitd); 1640 if (uedir == UE_DIR_IN && 1641 xfer->ux_status == USBD_NORMAL_COMPLETION) 1642 xfer->ux_actlen = actlen; 1643 xfer->ux_hcpriv = NULL; 1644 1645 usb_transfer_complete(xfer); 1646 } 1647 } 1648 1649 if (sc->sc_softwake) { 1650 sc->sc_softwake = 0; 1651 cv_broadcast(&sc->sc_softwake_cv); 1652 } 1653 1654 DPRINTFN(10, "done", 0, 0, 0, 0); 1655 } 1656 1657 void 1658 ohci_device_ctrl_done(struct usbd_xfer *xfer) 1659 { 1660 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 1661 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 1662 int len = UGETW(xfer->ux_request.wLength); 1663 int isread = (xfer->ux_request.bmRequestType & UT_READ); 1664 1665 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1666 DPRINTFN(10, "xfer=%p", xfer, 0, 0, 0); 1667 1668 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1669 KASSERT(xfer->ux_rqflags & URQ_REQUEST); 1670 1671 if (len) 1672 usb_syncmem(&xfer->ux_dmabuf, 0, len, 1673 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1674 usb_syncmem(&opipe->ctrl.reqdma, 0, 1675 sizeof(usb_device_request_t), BUS_DMASYNC_POSTWRITE); 1676 } 1677 1678 void 1679 ohci_device_intr_done(struct usbd_xfer *xfer) 1680 { 1681 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 1682 int isread = 1683 (UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress) == UE_DIR_IN); 1684 1685 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1686 DPRINTFN(10, "xfer=%p, actlen=%d", xfer, xfer->ux_actlen, 0, 0); 1687 1688 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1689 1690 usb_syncmem(&xfer->ux_dmabuf, 0, xfer->ux_length, 1691 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1692 } 1693 1694 void 1695 ohci_device_bulk_done(struct usbd_xfer *xfer) 1696 { 1697 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 1698 1699 int isread = 1700 (UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress) == UE_DIR_IN); 1701 1702 KASSERT(mutex_owned(&sc->sc_lock)); 1703 1704 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1705 DPRINTFN(10, "xfer=%p, actlen=%d", xfer, xfer->ux_actlen, 0, 0); 1706 usb_syncmem(&xfer->ux_dmabuf, 0, xfer->ux_length, 1707 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1708 } 1709 1710 Static void 1711 ohci_rhsc_softint(void *arg) 1712 { 1713 ohci_softc_t *sc = arg; 1714 1715 mutex_enter(&sc->sc_lock); 1716 1717 ohci_rhsc(sc, sc->sc_intrxfer); 1718 1719 /* Do not allow RHSC interrupts > 1 per second */ 1720 callout_reset(&sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc); 1721 1722 mutex_exit(&sc->sc_lock); 1723 } 1724 1725 void 1726 ohci_rhsc(ohci_softc_t *sc, struct usbd_xfer *xfer) 1727 { 1728 u_char *p; 1729 int i, m; 1730 int hstatus __unused; 1731 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1732 1733 KASSERT(mutex_owned(&sc->sc_lock)); 1734 1735 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1736 DPRINTF("sc=%p xfer=%p hstatus=0x%08x", sc, xfer, hstatus, 0); 1737 1738 if (xfer == NULL) { 1739 /* Just ignore the change. */ 1740 return; 1741 } 1742 1743 p = xfer->ux_buf; 1744 m = min(sc->sc_noport, xfer->ux_length * 8 - 1); 1745 memset(p, 0, xfer->ux_length); 1746 for (i = 1; i <= m; i++) { 1747 /* Pick out CHANGE bits from the status reg. */ 1748 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1749 p[i/8] |= 1 << (i%8); 1750 } 1751 DPRINTF("change=0x%02x", *p, 0, 0, 0); 1752 xfer->ux_actlen = xfer->ux_length; 1753 xfer->ux_status = USBD_NORMAL_COMPLETION; 1754 1755 usb_transfer_complete(xfer); 1756 } 1757 1758 void 1759 ohci_root_intr_done(struct usbd_xfer *xfer) 1760 { 1761 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 1762 1763 KASSERT(mutex_owned(&sc->sc_lock)); 1764 1765 KASSERT(sc->sc_intrxfer == xfer); 1766 sc->sc_intrxfer = NULL; 1767 } 1768 1769 /* 1770 * Wait here until controller claims to have an interrupt. 1771 * Then call ohci_intr and return. Use timeout to avoid waiting 1772 * too long. 1773 */ 1774 void 1775 ohci_waitintr(ohci_softc_t *sc, struct usbd_xfer *xfer) 1776 { 1777 int timo; 1778 uint32_t intrs; 1779 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1780 1781 mutex_enter(&sc->sc_lock); 1782 1783 xfer->ux_status = USBD_IN_PROGRESS; 1784 for (timo = xfer->ux_timeout; timo >= 0; timo--) { 1785 usb_delay_ms(&sc->sc_bus, 1); 1786 if (sc->sc_dying) 1787 break; 1788 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 1789 DPRINTFN(15, "intrs 0x%04x", intrs, 0, 0, 0); 1790 #ifdef OHCI_DEBUG 1791 if (ohcidebug > 15) 1792 ohci_dumpregs(sc); 1793 #endif 1794 if (intrs) { 1795 mutex_spin_enter(&sc->sc_intr_lock); 1796 ohci_intr1(sc); 1797 mutex_spin_exit(&sc->sc_intr_lock); 1798 if (xfer->ux_status != USBD_IN_PROGRESS) 1799 goto done; 1800 } 1801 } 1802 1803 /* Timeout */ 1804 DPRINTF("timeout", 0, 0, 0, 0); 1805 xfer->ux_status = USBD_TIMEOUT; 1806 usb_transfer_complete(xfer); 1807 1808 done: 1809 mutex_exit(&sc->sc_lock); 1810 } 1811 1812 void 1813 ohci_poll(struct usbd_bus *bus) 1814 { 1815 ohci_softc_t *sc = OHCI_BUS2SC(bus); 1816 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1817 1818 #ifdef OHCI_DEBUG 1819 static int last; 1820 int new; 1821 new = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1822 if (new != last) { 1823 DPRINTFN(10, "intrs=0x%04x", new, 0, 0, 0); 1824 last = new; 1825 } 1826 #endif 1827 sc->sc_eintrs |= OHCI_WDH; 1828 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) { 1829 mutex_spin_enter(&sc->sc_intr_lock); 1830 ohci_intr1(sc); 1831 mutex_spin_exit(&sc->sc_intr_lock); 1832 } 1833 } 1834 1835 /* 1836 * Add an ED to the schedule. Called with USB lock held. 1837 */ 1838 Static void 1839 ohci_add_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1840 { 1841 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1842 DPRINTFN(8, "sed=%p head=%p", sed, head, 0, 0); 1843 1844 KASSERT(mutex_owned(&sc->sc_lock)); 1845 1846 usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted), 1847 sizeof(head->ed.ed_nexted), 1848 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1849 sed->next = head->next; 1850 sed->ed.ed_nexted = head->ed.ed_nexted; 1851 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted), 1852 sizeof(sed->ed.ed_nexted), 1853 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1854 head->next = sed; 1855 head->ed.ed_nexted = HTOO32(sed->physaddr); 1856 usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted), 1857 sizeof(head->ed.ed_nexted), 1858 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1859 } 1860 1861 /* 1862 * Remove an ED from the schedule. Called with USB lock held. 1863 */ 1864 Static void 1865 ohci_rem_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1866 { 1867 ohci_soft_ed_t *p; 1868 1869 KASSERT(mutex_owned(&sc->sc_lock)); 1870 1871 /* XXX */ 1872 for (p = head; p != NULL && p->next != sed; p = p->next) 1873 ; 1874 KASSERT(p != NULL); 1875 1876 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted), 1877 sizeof(sed->ed.ed_nexted), 1878 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1879 p->next = sed->next; 1880 p->ed.ed_nexted = sed->ed.ed_nexted; 1881 usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted), 1882 sizeof(p->ed.ed_nexted), 1883 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1884 } 1885 1886 /* 1887 * When a transfer is completed the TD is added to the done queue by 1888 * the host controller. This queue is the processed by software. 1889 * Unfortunately the queue contains the physical address of the TD 1890 * and we have no simple way to translate this back to a kernel address. 1891 * To make the translation possible (and fast) we use a hash table of 1892 * TDs currently in the schedule. The physical address is used as the 1893 * hash value. 1894 */ 1895 1896 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1897 /* Called with USB lock held. */ 1898 void 1899 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1900 { 1901 int h = HASH(std->physaddr); 1902 1903 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1904 1905 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1906 } 1907 1908 /* Called with USB lock held. */ 1909 void 1910 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1911 { 1912 1913 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1914 1915 LIST_REMOVE(std, hnext); 1916 } 1917 1918 ohci_soft_td_t * 1919 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a) 1920 { 1921 int h = HASH(a); 1922 ohci_soft_td_t *std; 1923 1924 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1925 std != NULL; 1926 std = LIST_NEXT(std, hnext)) 1927 if (std->physaddr == a) 1928 return std; 1929 return NULL; 1930 } 1931 1932 /* Called with USB lock held. */ 1933 void 1934 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1935 { 1936 int h = HASH(sitd->physaddr); 1937 1938 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1939 1940 KASSERT(mutex_owned(&sc->sc_lock)); 1941 1942 DPRINTFN(10, "sitd=%p physaddr=0x%08lx", sitd, (u_long)sitd->physaddr, 1943 0, 0); 1944 1945 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext); 1946 } 1947 1948 /* Called with USB lock held. */ 1949 void 1950 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1951 { 1952 1953 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1954 1955 KASSERT(mutex_owned(&sc->sc_lock)); 1956 1957 DPRINTFN(10, "sitd=%p physaddr=0x%08lx", sitd, (u_long)sitd->physaddr, 1958 0, 0); 1959 1960 LIST_REMOVE(sitd, hnext); 1961 } 1962 1963 ohci_soft_itd_t * 1964 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a) 1965 { 1966 int h = HASH(a); 1967 ohci_soft_itd_t *sitd; 1968 1969 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]); 1970 sitd != NULL; 1971 sitd = LIST_NEXT(sitd, hnext)) 1972 if (sitd->physaddr == a) 1973 return sitd; 1974 return NULL; 1975 } 1976 1977 void 1978 ohci_timeout(void *addr) 1979 { 1980 struct usbd_xfer *xfer = addr; 1981 struct ohci_xfer *oxfer = OHCI_XFER2OXFER(xfer); 1982 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 1983 1984 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1985 DPRINTF("oxfer=%p", oxfer, 0, 0, 0); 1986 1987 if (sc->sc_dying) { 1988 mutex_enter(&sc->sc_lock); 1989 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1990 mutex_exit(&sc->sc_lock); 1991 return; 1992 } 1993 1994 /* Execute the abort in a process context. */ 1995 usb_init_task(&oxfer->abort_task, ohci_timeout_task, addr, 1996 USB_TASKQ_MPSAFE); 1997 usb_add_task(xfer->ux_pipe->up_dev, &oxfer->abort_task, 1998 USB_TASKQ_HC); 1999 } 2000 2001 void 2002 ohci_timeout_task(void *addr) 2003 { 2004 struct usbd_xfer *xfer = addr; 2005 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2006 2007 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2008 2009 DPRINTF("xfer=%p", xfer, 0, 0, 0); 2010 2011 mutex_enter(&sc->sc_lock); 2012 ohci_abort_xfer(xfer, USBD_TIMEOUT); 2013 mutex_exit(&sc->sc_lock); 2014 } 2015 2016 #ifdef OHCI_DEBUG 2017 void 2018 ohci_dump_tds(ohci_softc_t *sc, ohci_soft_td_t *std) 2019 { 2020 for (; std; std = std->nexttd) { 2021 ohci_dump_td(sc, std); 2022 KASSERTMSG(std->nexttd == NULL || std != std->nexttd, 2023 "std %p next %p", std, std->nexttd); 2024 } 2025 } 2026 2027 void 2028 ohci_dump_td(ohci_softc_t *sc, ohci_soft_td_t *std) 2029 { 2030 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2031 2032 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 2033 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2034 2035 uint32_t flags = O32TOH(std->td.td_flags); 2036 DPRINTF("TD(%p) at 0x%08lx:", std, (u_long)std->physaddr, 0, 0); 2037 DPRINTF(" round=%d DP=%x DI=%x T=%x", 2038 !!(flags & OHCI_TD_R), 2039 __SHIFTOUT(flags, OHCI_TD_DP_MASK), 2040 OHCI_TD_GET_DI(flags), 2041 __SHIFTOUT(flags, OHCI_TD_TOGGLE_MASK)); 2042 DPRINTF(" EC=%d CC=%d", OHCI_TD_GET_EC(flags), OHCI_TD_GET_CC(flags), 2043 0, 0); 2044 DPRINTF(" td_cbp=0x%08lx td_nexttd=0x%08lx td_be=0x%08lx", 2045 (u_long)O32TOH(std->td.td_cbp), 2046 (u_long)O32TOH(std->td.td_nexttd), 2047 (u_long)O32TOH(std->td.td_be), 0); 2048 } 2049 2050 void 2051 ohci_dump_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 2052 { 2053 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2054 2055 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 2056 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2057 2058 uint32_t flags = O32TOH(sitd->itd.itd_flags); 2059 DPRINTF("ITD(%p) at 0x%08lx", sitd, (u_long)sitd->physaddr, 0, 0); 2060 DPRINTF(" sf=%d di=%d fc=%d cc=%d", 2061 OHCI_ITD_GET_SF(flags), OHCI_ITD_GET_DI(flags), 2062 OHCI_ITD_GET_FC(flags), OHCI_ITD_GET_CC(flags)); 2063 DPRINTF(" bp0=0x%08x next=0x%08x be=0x%08x", 2064 O32TOH(sitd->itd.itd_bp0), 2065 O32TOH(sitd->itd.itd_nextitd), 2066 O32TOH(sitd->itd.itd_be), 0); 2067 CTASSERT(OHCI_ITD_NOFFSET == 8); 2068 DPRINTF(" offs[0] = 0x%04x offs[1] = 0x%04x " 2069 "offs[2] = 0x%04x offs[3] = 0x%04x", 2070 O16TOH(sitd->itd.itd_offset[0]), 2071 O16TOH(sitd->itd.itd_offset[1]), 2072 O16TOH(sitd->itd.itd_offset[2]), 2073 O16TOH(sitd->itd.itd_offset[3])); 2074 DPRINTF(" offs[4] = 0x%04x offs[5] = 0x%04x " 2075 "offs[6] = 0x%04x offs[7] = 0x%04x", 2076 O16TOH(sitd->itd.itd_offset[4]), 2077 O16TOH(sitd->itd.itd_offset[5]), 2078 O16TOH(sitd->itd.itd_offset[6]), 2079 O16TOH(sitd->itd.itd_offset[7])); 2080 } 2081 2082 void 2083 ohci_dump_itds(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 2084 { 2085 for (; sitd; sitd = sitd->nextitd) 2086 ohci_dump_itd(sc, sitd); 2087 } 2088 2089 void 2090 ohci_dump_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 2091 { 2092 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2093 2094 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 2095 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2096 2097 uint32_t flags = O32TOH(sed->ed.ed_flags); 2098 DPRINTF("ED(%p) at 0x%08lx:", sed, sed->physaddr, 0, 0); 2099 DPRINTF(" addr=%d endpt=%d maxp=%d", 2100 OHCI_ED_GET_FA(flags), 2101 OHCI_ED_GET_EN(flags), 2102 OHCI_ED_GET_MAXP(flags), 2103 0); 2104 DPRINTF(" dir=%d speed=%d skip=%d iso=%d", 2105 __SHIFTOUT(flags, OHCI_ED_DIR_MASK), 2106 !!(flags & OHCI_ED_SPEED), 2107 !!(flags & OHCI_ED_SKIP), 2108 !!(flags & OHCI_ED_FORMAT_ISO)); 2109 DPRINTF(" tailp=0x%08lx", (u_long)O32TOH(sed->ed.ed_tailp), 2110 0, 0, 0); 2111 DPRINTF(" headp=0x%08lx nexted=0x%08lx halted=%d carry=%d", 2112 O32TOH(sed->ed.ed_headp), O32TOH(sed->ed.ed_nexted), 2113 !!(O32TOH(sed->ed.ed_headp) & OHCI_HALTED), 2114 !!(O32TOH(sed->ed.ed_headp) & OHCI_TOGGLECARRY)); 2115 } 2116 #endif 2117 2118 usbd_status 2119 ohci_open(struct usbd_pipe *pipe) 2120 { 2121 struct usbd_device *dev = pipe->up_dev; 2122 struct usbd_bus *bus = dev->ud_bus; 2123 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 2124 usb_endpoint_descriptor_t *ed = pipe->up_endpoint->ue_edesc; 2125 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 2126 uint8_t addr = dev->ud_addr; 2127 uint8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 2128 ohci_soft_ed_t *sed; 2129 ohci_soft_td_t *std; 2130 ohci_soft_itd_t *sitd; 2131 ohci_physaddr_t tdphys; 2132 uint32_t fmt; 2133 usbd_status err = USBD_NOMEM; 2134 int ival; 2135 2136 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2137 DPRINTFN(1, "pipe=%p, addr=%d, endpt=%d (%d)", pipe, addr, 2138 ed->bEndpointAddress, bus->ub_rhaddr); 2139 2140 if (sc->sc_dying) { 2141 return USBD_IOERROR; 2142 } 2143 2144 std = NULL; 2145 sed = NULL; 2146 2147 if (addr == bus->ub_rhaddr) { 2148 switch (ed->bEndpointAddress) { 2149 case USB_CONTROL_ENDPOINT: 2150 pipe->up_methods = &roothub_ctrl_methods; 2151 break; 2152 case UE_DIR_IN | USBROOTHUB_INTR_ENDPT: 2153 pipe->up_methods = &ohci_root_intr_methods; 2154 break; 2155 default: 2156 err = USBD_INVAL; 2157 goto bad; 2158 } 2159 } else { 2160 sed = ohci_alloc_sed(sc); 2161 if (sed == NULL) 2162 goto bad; 2163 opipe->sed = sed; 2164 if (xfertype == UE_ISOCHRONOUS) { 2165 sitd = ohci_alloc_sitd(sc); 2166 if (sitd == NULL) 2167 goto bad; 2168 2169 opipe->tail.itd = sitd; 2170 tdphys = sitd->physaddr; 2171 fmt = OHCI_ED_FORMAT_ISO; 2172 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 2173 fmt |= OHCI_ED_DIR_IN; 2174 else 2175 fmt |= OHCI_ED_DIR_OUT; 2176 } else { 2177 std = ohci_alloc_std(sc); 2178 if (std == NULL) 2179 goto bad; 2180 2181 opipe->tail.td = std; 2182 tdphys = std->physaddr; 2183 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD; 2184 } 2185 sed->ed.ed_flags = HTOO32( 2186 OHCI_ED_SET_FA(addr) | 2187 OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) | 2188 (dev->ud_speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) | 2189 fmt | 2190 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 2191 sed->ed.ed_headp = HTOO32(tdphys | 2192 (pipe->up_endpoint->ue_toggle ? OHCI_TOGGLECARRY : 0)); 2193 sed->ed.ed_tailp = HTOO32(tdphys); 2194 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 2195 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2196 2197 switch (xfertype) { 2198 case UE_CONTROL: 2199 pipe->up_methods = &ohci_device_ctrl_methods; 2200 err = usb_allocmem(&sc->sc_bus, 2201 sizeof(usb_device_request_t), 2202 0, &opipe->ctrl.reqdma); 2203 if (err) 2204 goto bad; 2205 mutex_enter(&sc->sc_lock); 2206 ohci_add_ed(sc, sed, sc->sc_ctrl_head); 2207 mutex_exit(&sc->sc_lock); 2208 break; 2209 case UE_INTERRUPT: 2210 pipe->up_methods = &ohci_device_intr_methods; 2211 ival = pipe->up_interval; 2212 if (ival == USBD_DEFAULT_INTERVAL) 2213 ival = ed->bInterval; 2214 err = ohci_device_setintr(sc, opipe, ival); 2215 if (err) 2216 goto bad; 2217 break; 2218 case UE_ISOCHRONOUS: 2219 pipe->up_serialise = false; 2220 pipe->up_methods = &ohci_device_isoc_methods; 2221 return ohci_setup_isoc(pipe); 2222 case UE_BULK: 2223 pipe->up_methods = &ohci_device_bulk_methods; 2224 mutex_enter(&sc->sc_lock); 2225 ohci_add_ed(sc, sed, sc->sc_bulk_head); 2226 mutex_exit(&sc->sc_lock); 2227 break; 2228 } 2229 } 2230 2231 return USBD_NORMAL_COMPLETION; 2232 2233 bad: 2234 if (std != NULL) { 2235 ohci_free_std(sc, std); 2236 } 2237 if (sed != NULL) 2238 ohci_free_sed(sc, sed); 2239 return err; 2240 2241 } 2242 2243 /* 2244 * Close a reqular pipe. 2245 * Assumes that there are no pending transactions. 2246 */ 2247 void 2248 ohci_close_pipe(struct usbd_pipe *pipe, ohci_soft_ed_t *head) 2249 { 2250 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 2251 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 2252 ohci_soft_ed_t *sed = opipe->sed; 2253 2254 KASSERT(mutex_owned(&sc->sc_lock)); 2255 2256 #ifdef DIAGNOSTIC 2257 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 2258 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2259 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) { 2260 ohci_soft_td_t *std; 2261 std = ohci_hash_find_td(sc, O32TOH(sed->ed.ed_headp)); 2262 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 2263 "tl=0x%x pipe=%p, std=%p\n", sed, 2264 (int)O32TOH(sed->ed.ed_headp), 2265 (int)O32TOH(sed->ed.ed_tailp), 2266 pipe, std); 2267 #ifdef OHCI_DEBUG 2268 usbd_dump_pipe(&opipe->pipe); 2269 ohci_dump_ed(sc, sed); 2270 if (std) 2271 ohci_dump_td(sc, std); 2272 #endif 2273 usb_delay_ms(&sc->sc_bus, 2); 2274 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2275 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) 2276 printf("ohci_close_pipe: pipe still not empty\n"); 2277 } 2278 #endif 2279 ohci_rem_ed(sc, sed, head); 2280 /* Make sure the host controller is not touching this ED */ 2281 usb_delay_ms(&sc->sc_bus, 1); 2282 pipe->up_endpoint->ue_toggle = 2283 (O32TOH(sed->ed.ed_headp) & OHCI_TOGGLECARRY) ? 1 : 0; 2284 ohci_free_sed_locked(sc, opipe->sed); 2285 } 2286 2287 /* 2288 * Abort a device request. 2289 * If this routine is called at splusb() it guarantees that the request 2290 * will be removed from the hardware scheduling and that the callback 2291 * for it will be called with USBD_CANCELLED status. 2292 * It's impossible to guarantee that the requested transfer will not 2293 * have happened since the hardware runs concurrently. 2294 * If the transaction has already happened we rely on the ordinary 2295 * interrupt processing to process it. 2296 * XXX This is most probably wrong. 2297 * XXXMRG this doesn't make sense anymore. 2298 */ 2299 void 2300 ohci_abort_xfer(struct usbd_xfer *xfer, usbd_status status) 2301 { 2302 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 2303 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2304 ohci_soft_ed_t *sed = opipe->sed; 2305 ohci_soft_td_t *p, *n; 2306 ohci_physaddr_t headp; 2307 int hit; 2308 int wake; 2309 2310 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2311 DPRINTF("xfer=%p pipe=%p sed=%p", xfer, opipe,sed, 0); 2312 2313 KASSERT(mutex_owned(&sc->sc_lock)); 2314 ASSERT_SLEEPABLE(); 2315 2316 if (sc->sc_dying) { 2317 /* If we're dying, just do the software part. */ 2318 xfer->ux_status = status; /* make software ignore it */ 2319 callout_halt(&xfer->ux_callout, &sc->sc_lock); 2320 usb_transfer_complete(xfer); 2321 return; 2322 } 2323 2324 /* 2325 * If an abort is already in progress then just wait for it to 2326 * complete and return. 2327 */ 2328 if (xfer->ux_hcflags & UXFER_ABORTING) { 2329 DPRINTFN(2, "already aborting", 0, 0, 0, 0); 2330 #ifdef DIAGNOSTIC 2331 if (status == USBD_TIMEOUT) 2332 printf("%s: TIMEOUT while aborting\n", __func__); 2333 #endif 2334 /* Override the status which might be USBD_TIMEOUT. */ 2335 xfer->ux_status = status; 2336 DPRINTFN(2, "waiting for abort to finish", 0, 0, 0, 0); 2337 xfer->ux_hcflags |= UXFER_ABORTWAIT; 2338 while (xfer->ux_hcflags & UXFER_ABORTING) 2339 cv_wait(&xfer->ux_hccv, &sc->sc_lock); 2340 goto done; 2341 } 2342 xfer->ux_hcflags |= UXFER_ABORTING; 2343 2344 /* 2345 * Step 1: Make interrupt routine and hardware ignore xfer. 2346 */ 2347 xfer->ux_status = status; /* make software ignore it */ 2348 callout_stop(&xfer->ux_callout); 2349 DPRINTFN(1, "stop ed=%p", sed, 0, 0, 0); 2350 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2351 sizeof(sed->ed.ed_flags), 2352 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2353 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */ 2354 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2355 sizeof(sed->ed.ed_flags), 2356 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2357 2358 /* 2359 * Step 2: Wait until we know hardware has finished any possible 2360 * use of the xfer. Also make sure the soft interrupt routine 2361 * has run. 2362 */ 2363 /* Hardware finishes in 1ms */ 2364 usb_delay_ms_locked(opipe->pipe.up_dev->ud_bus, 20, &sc->sc_lock); 2365 sc->sc_softwake = 1; 2366 usb_schedsoftintr(&sc->sc_bus); 2367 cv_wait(&sc->sc_softwake_cv, &sc->sc_lock); 2368 2369 /* 2370 * Step 3: Remove any vestiges of the xfer from the hardware. 2371 * The complication here is that the hardware may have executed 2372 * beyond the xfer we're trying to abort. So as we're scanning 2373 * the TDs of this xfer we check if the hardware points to 2374 * any of them. 2375 */ 2376 p = xfer->ux_hcpriv; 2377 KASSERT(p); 2378 2379 #ifdef OHCI_DEBUG 2380 DPRINTF("--- dump start ---", 0, 0, 0, 0); 2381 2382 if (ohcidebug >= 2) { 2383 DPRINTF("sed:", 0, 0, 0, 0); 2384 ohci_dump_ed(sc, sed); 2385 ohci_dump_tds(sc, p); 2386 } 2387 DPRINTF("--- dump end ---", 0, 0, 0, 0); 2388 #endif 2389 headp = O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK; 2390 hit = 0; 2391 for (; p->xfer == xfer; p = n) { 2392 hit |= headp == p->physaddr; 2393 n = p->nexttd; 2394 ohci_hash_rem_td(sc, p); 2395 } 2396 /* Zap headp register if hardware pointed inside the xfer. */ 2397 if (hit) { 2398 DPRINTFN(1, "set hd=0x%08x, tl=0x%08x", (int)p->physaddr, 2399 (int)O32TOH(sed->ed.ed_tailp), 0, 0); 2400 sed->ed.ed_headp = HTOO32(p->physaddr); /* unlink TDs */ 2401 usb_syncmem(&sed->dma, 2402 sed->offs + offsetof(ohci_ed_t, ed_headp), 2403 sizeof(sed->ed.ed_headp), 2404 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2405 } else { 2406 DPRINTFN(1, "no hit", 0, 0, 0, 0); 2407 } 2408 2409 /* 2410 * Step 4: Turn on hardware again. 2411 */ 2412 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2413 sizeof(sed->ed.ed_flags), 2414 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2415 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */ 2416 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2417 sizeof(sed->ed.ed_flags), 2418 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2419 2420 /* 2421 * Step 5: Execute callback. 2422 */ 2423 wake = xfer->ux_hcflags & UXFER_ABORTWAIT; 2424 xfer->ux_hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT); 2425 usb_transfer_complete(xfer); 2426 if (wake) 2427 cv_broadcast(&xfer->ux_hccv); 2428 2429 done: 2430 KASSERT(mutex_owned(&sc->sc_lock)); 2431 } 2432 2433 /* 2434 * Data structures and routines to emulate the root hub. 2435 */ 2436 Static int 2437 ohci_roothub_ctrl(struct usbd_bus *bus, usb_device_request_t *req, 2438 void *buf, int buflen) 2439 { 2440 ohci_softc_t *sc = OHCI_BUS2SC(bus); 2441 usb_port_status_t ps; 2442 uint16_t len, value, index; 2443 int l, totlen = 0; 2444 int port, i; 2445 uint32_t v; 2446 2447 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2448 2449 if (sc->sc_dying) 2450 return -1; 2451 2452 DPRINTFN(4, "type=0x%02x request=%02x", req->bmRequestType, 2453 req->bRequest, 0, 0); 2454 2455 len = UGETW(req->wLength); 2456 value = UGETW(req->wValue); 2457 index = UGETW(req->wIndex); 2458 2459 #define C(x,y) ((x) | ((y) << 8)) 2460 switch (C(req->bRequest, req->bmRequestType)) { 2461 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2462 DPRINTFN(8, "wValue=0x%04x", value, 0, 0, 0); 2463 if (len == 0) 2464 break; 2465 switch (value) { 2466 case C(0, UDESC_DEVICE): { 2467 usb_device_descriptor_t devd; 2468 2469 totlen = min(buflen, sizeof(devd)); 2470 memcpy(&devd, buf, totlen); 2471 USETW(devd.idVendor, sc->sc_id_vendor); 2472 memcpy(buf, &devd, totlen); 2473 break; 2474 } 2475 case C(1, UDESC_STRING): 2476 #define sd ((usb_string_descriptor_t *)buf) 2477 /* Vendor */ 2478 totlen = usb_makestrdesc(sd, len, sc->sc_vendor); 2479 break; 2480 case C(2, UDESC_STRING): 2481 /* Product */ 2482 totlen = usb_makestrdesc(sd, len, "OHCI root hub"); 2483 break; 2484 #undef sd 2485 default: 2486 /* default from usbroothub */ 2487 return buflen; 2488 } 2489 break; 2490 2491 /* Hub requests */ 2492 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2493 break; 2494 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2495 DPRINTFN(8, "UR_CLEAR_PORT_FEATURE port=%d feature=%d", 2496 index, value, 0, 0); 2497 if (index < 1 || index > sc->sc_noport) { 2498 return -1; 2499 } 2500 port = OHCI_RH_PORT_STATUS(index); 2501 switch(value) { 2502 case UHF_PORT_ENABLE: 2503 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2504 break; 2505 case UHF_PORT_SUSPEND: 2506 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2507 break; 2508 case UHF_PORT_POWER: 2509 /* Yes, writing to the LOW_SPEED bit clears power. */ 2510 OWRITE4(sc, port, UPS_LOW_SPEED); 2511 break; 2512 case UHF_C_PORT_CONNECTION: 2513 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2514 break; 2515 case UHF_C_PORT_ENABLE: 2516 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2517 break; 2518 case UHF_C_PORT_SUSPEND: 2519 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2520 break; 2521 case UHF_C_PORT_OVER_CURRENT: 2522 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2523 break; 2524 case UHF_C_PORT_RESET: 2525 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2526 break; 2527 default: 2528 return -1; 2529 } 2530 switch(value) { 2531 case UHF_C_PORT_CONNECTION: 2532 case UHF_C_PORT_ENABLE: 2533 case UHF_C_PORT_SUSPEND: 2534 case UHF_C_PORT_OVER_CURRENT: 2535 case UHF_C_PORT_RESET: 2536 /* Enable RHSC interrupt if condition is cleared. */ 2537 if ((OREAD4(sc, port) >> 16) == 0) 2538 ohci_rhsc_enable(sc); 2539 break; 2540 default: 2541 break; 2542 } 2543 break; 2544 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2545 if (len == 0) 2546 break; 2547 if ((value & 0xff) != 0) { 2548 return -1; 2549 } 2550 usb_hub_descriptor_t hubd; 2551 2552 totlen = min(buflen, sizeof(hubd)); 2553 memcpy(&hubd, buf, totlen); 2554 2555 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2556 hubd.bNbrPorts = sc->sc_noport; 2557 USETW(hubd.wHubCharacteristics, 2558 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2559 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2560 /* XXX overcurrent */ 2561 ); 2562 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2563 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2564 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2565 hubd.DeviceRemovable[i++] = (uint8_t)v; 2566 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2567 totlen = min(totlen, hubd.bDescLength); 2568 memcpy(buf, &hubd, totlen); 2569 break; 2570 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2571 if (len != 4) { 2572 return -1; 2573 } 2574 memset(buf, 0, len); /* ? XXX */ 2575 totlen = len; 2576 break; 2577 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2578 DPRINTFN(8, "get port status i=%d", index, 0, 0, 0); 2579 if (index < 1 || index > sc->sc_noport) { 2580 return -1; 2581 } 2582 if (len != 4) { 2583 return -1; 2584 } 2585 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2586 DPRINTFN(8, "port status=0x%04x", v, 0, 0, 0); 2587 USETW(ps.wPortStatus, v); 2588 USETW(ps.wPortChange, v >> 16); 2589 totlen = min(len, sizeof(ps)); 2590 memcpy(buf, &ps, totlen); 2591 break; 2592 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2593 return -1; 2594 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2595 break; 2596 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2597 if (index < 1 || index > sc->sc_noport) { 2598 return -1; 2599 } 2600 port = OHCI_RH_PORT_STATUS(index); 2601 switch(value) { 2602 case UHF_PORT_ENABLE: 2603 OWRITE4(sc, port, UPS_PORT_ENABLED); 2604 break; 2605 case UHF_PORT_SUSPEND: 2606 OWRITE4(sc, port, UPS_SUSPEND); 2607 break; 2608 case UHF_PORT_RESET: 2609 DPRINTFN(5, "reset port %d", index, 0, 0, 0); 2610 OWRITE4(sc, port, UPS_RESET); 2611 for (i = 0; i < 5; i++) { 2612 usb_delay_ms(&sc->sc_bus, 2613 USB_PORT_ROOT_RESET_DELAY); 2614 if (sc->sc_dying) { 2615 return -1; 2616 } 2617 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2618 break; 2619 } 2620 DPRINTFN(8, "port %d reset, status = 0x%04x", index, 2621 OREAD4(sc, port), 0, 0); 2622 break; 2623 case UHF_PORT_POWER: 2624 DPRINTFN(2, "set port power %d", index, 0, 0, 0); 2625 OWRITE4(sc, port, UPS_PORT_POWER); 2626 break; 2627 default: 2628 return -1; 2629 } 2630 break; 2631 default: 2632 /* default from usbroothub */ 2633 return buflen; 2634 } 2635 2636 return totlen; 2637 } 2638 2639 Static usbd_status 2640 ohci_root_intr_transfer(struct usbd_xfer *xfer) 2641 { 2642 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2643 usbd_status err; 2644 2645 /* Insert last in queue. */ 2646 mutex_enter(&sc->sc_lock); 2647 err = usb_insert_transfer(xfer); 2648 mutex_exit(&sc->sc_lock); 2649 if (err) 2650 return err; 2651 2652 /* Pipe isn't running, start first */ 2653 return ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 2654 } 2655 2656 Static usbd_status 2657 ohci_root_intr_start(struct usbd_xfer *xfer) 2658 { 2659 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2660 2661 if (sc->sc_dying) 2662 return USBD_IOERROR; 2663 2664 mutex_enter(&sc->sc_lock); 2665 KASSERT(sc->sc_intrxfer == NULL); 2666 sc->sc_intrxfer = xfer; 2667 mutex_exit(&sc->sc_lock); 2668 2669 return USBD_IN_PROGRESS; 2670 } 2671 2672 /* Abort a root interrupt request. */ 2673 Static void 2674 ohci_root_intr_abort(struct usbd_xfer *xfer) 2675 { 2676 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2677 2678 KASSERT(mutex_owned(&sc->sc_lock)); 2679 KASSERT(xfer->ux_pipe->up_intrxfer == xfer); 2680 2681 sc->sc_intrxfer = NULL; 2682 2683 xfer->ux_status = USBD_CANCELLED; 2684 usb_transfer_complete(xfer); 2685 } 2686 2687 /* Close the root pipe. */ 2688 Static void 2689 ohci_root_intr_close(struct usbd_pipe *pipe) 2690 { 2691 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 2692 2693 KASSERT(mutex_owned(&sc->sc_lock)); 2694 2695 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2696 2697 sc->sc_intrxfer = NULL; 2698 } 2699 2700 /************************/ 2701 2702 int 2703 ohci_device_ctrl_init(struct usbd_xfer *xfer) 2704 { 2705 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 2706 usb_device_request_t *req = &xfer->ux_request; 2707 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2708 ohci_soft_td_t *stat, *setup; 2709 int isread = req->bmRequestType & UT_READ; 2710 int len = xfer->ux_bufsize; 2711 int err = ENOMEM; 2712 2713 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2714 2715 setup = ohci_alloc_std(sc); 2716 if (setup == NULL) { 2717 goto bad1; 2718 } 2719 stat = ohci_alloc_std(sc); 2720 if (stat == NULL) { 2721 goto bad2; 2722 } 2723 2724 ox->ox_setup = setup; 2725 ox->ox_stat = stat; 2726 ox->ox_nstd = 0; 2727 2728 /* Set up data transaction */ 2729 if (len != 0) { 2730 err = ohci_alloc_std_chain(sc, xfer, len, isread); 2731 if (err) { 2732 goto bad3; 2733 } 2734 } 2735 return 0; 2736 2737 bad3: 2738 ohci_free_std(sc, stat); 2739 bad2: 2740 ohci_free_std(sc, setup); 2741 bad1: 2742 return err; 2743 } 2744 2745 void 2746 ohci_device_ctrl_fini(struct usbd_xfer *xfer) 2747 { 2748 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 2749 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2750 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 2751 2752 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2753 DPRINTFN(8, "xfer %p nstd %d", xfer, ox->ox_nstd, 0, 0); 2754 2755 mutex_enter(&sc->sc_lock); 2756 if (ox->ox_setup != opipe->tail.td) { 2757 ohci_free_std_locked(sc, ox->ox_setup); 2758 } 2759 for (size_t i = 0; i < ox->ox_nstd; i++) { 2760 ohci_soft_td_t *std = ox->ox_stds[i]; 2761 if (std == NULL) 2762 break; 2763 ohci_free_std_locked(sc, std); 2764 } 2765 ohci_free_std_locked(sc, ox->ox_stat); 2766 mutex_exit(&sc->sc_lock); 2767 2768 if (ox->ox_nstd) { 2769 const size_t sz = sizeof(ohci_soft_td_t *) * ox->ox_nstd; 2770 kmem_free(ox->ox_stds, sz); 2771 } 2772 } 2773 2774 Static usbd_status 2775 ohci_device_ctrl_transfer(struct usbd_xfer *xfer) 2776 { 2777 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2778 usbd_status err; 2779 2780 /* Insert last in queue. */ 2781 mutex_enter(&sc->sc_lock); 2782 err = usb_insert_transfer(xfer); 2783 mutex_exit(&sc->sc_lock); 2784 if (err) 2785 return err; 2786 2787 /* Pipe isn't running, start first */ 2788 return ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 2789 } 2790 2791 Static usbd_status 2792 ohci_device_ctrl_start(struct usbd_xfer *xfer) 2793 { 2794 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2795 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 2796 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 2797 usb_device_request_t *req = &xfer->ux_request; 2798 struct usbd_device *dev __diagused = opipe->pipe.up_dev; 2799 ohci_soft_td_t *setup, *stat, *next, *tail; 2800 ohci_soft_ed_t *sed; 2801 int isread; 2802 int len; 2803 2804 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2805 2806 if (sc->sc_dying) 2807 return USBD_IOERROR; 2808 2809 KASSERT(xfer->ux_rqflags & URQ_REQUEST); 2810 2811 isread = req->bmRequestType & UT_READ; 2812 len = UGETW(req->wLength); 2813 2814 DPRINTF("xfer=%p len=%d, addr=%d, endpt=%d", xfer, len, dev->ud_addr, 2815 opipe->pipe.up_endpoint->ue_edesc->bEndpointAddress); 2816 DPRINTF("type=0x%02x, request=0x%02x, wValue=0x%04x, wIndex=0x%04x", 2817 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2818 UGETW(req->wIndex)); 2819 2820 /* Need to take lock here for pipe->tail.td */ 2821 mutex_enter(&sc->sc_lock); 2822 2823 /* 2824 * Use the pipe "tail" TD as our first and loan our first TD to the 2825 * next transfer 2826 */ 2827 setup = opipe->tail.td; 2828 opipe->tail.td = ox->ox_setup; 2829 ox->ox_setup = setup; 2830 2831 stat = ox->ox_stat; 2832 2833 /* point at sentinel */ 2834 tail = opipe->tail.td; 2835 sed = opipe->sed; 2836 2837 KASSERTMSG(OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)) == dev->ud_addr, 2838 "address ED %d pipe %d\n", 2839 OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)), dev->ud_addr); 2840 KASSERTMSG(OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)) == 2841 UGETW(opipe->pipe.up_endpoint->ue_edesc->wMaxPacketSize), 2842 "MPL ED %d pipe %d\n", 2843 OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)), 2844 UGETW(opipe->pipe.up_endpoint->ue_edesc->wMaxPacketSize)); 2845 2846 /* next will point to data if len != 0 */ 2847 next = stat; 2848 2849 /* Set up data transaction */ 2850 if (len != 0) { 2851 ohci_soft_td_t *std; 2852 ohci_soft_td_t *end; 2853 2854 next = ox->ox_stds[0]; 2855 ohci_reset_std_chain(sc, xfer, len, isread, next, &end); 2856 2857 end->td.td_nexttd = HTOO32(stat->physaddr); 2858 end->nexttd = stat; 2859 2860 usb_syncmem(&end->dma, 2861 end->offs + offsetof(ohci_td_t, td_nexttd), 2862 sizeof(end->td.td_nexttd), 2863 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2864 2865 usb_syncmem(&xfer->ux_dmabuf, 0, len, 2866 isread ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 2867 std = ox->ox_stds[0]; 2868 /* Start toggle at 1 and then use the carried toggle. */ 2869 std->td.td_flags &= HTOO32(~OHCI_TD_TOGGLE_MASK); 2870 std->td.td_flags |= HTOO32(OHCI_TD_TOGGLE_1); 2871 usb_syncmem(&std->dma, 2872 std->offs + offsetof(ohci_td_t, td_flags), 2873 sizeof(std->td.td_flags), 2874 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2875 } 2876 2877 DPRINTFN(8, "setup %p data %p stat %p tail %p", setup, 2878 (len != 0 ? ox->ox_stds[0] : NULL), stat, tail); 2879 KASSERT(opipe->tail.td == tail); 2880 2881 memcpy(KERNADDR(&opipe->ctrl.reqdma, 0), req, sizeof(*req)); 2882 usb_syncmem(&opipe->ctrl.reqdma, 0, sizeof(*req), BUS_DMASYNC_PREWRITE); 2883 2884 setup->td.td_flags = HTOO32(OHCI_TD_SETUP | OHCI_TD_NOCC | 2885 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 2886 setup->td.td_cbp = HTOO32(DMAADDR(&opipe->ctrl.reqdma, 0)); 2887 setup->td.td_nexttd = HTOO32(next->physaddr); 2888 setup->td.td_be = HTOO32(O32TOH(setup->td.td_cbp) + sizeof(*req) - 1); 2889 setup->nexttd = next; 2890 setup->len = 0; 2891 setup->xfer = xfer; 2892 setup->flags = 0; 2893 ohci_hash_add_td(sc, setup); 2894 2895 xfer->ux_hcpriv = setup; 2896 usb_syncmem(&setup->dma, setup->offs, sizeof(setup->td), 2897 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2898 2899 stat->td.td_flags = HTOO32( 2900 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | 2901 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 2902 stat->td.td_cbp = 0; 2903 stat->td.td_nexttd = HTOO32(tail->physaddr); 2904 stat->td.td_be = 0; 2905 stat->nexttd = tail; 2906 stat->flags = OHCI_CALL_DONE; 2907 stat->len = 0; 2908 stat->xfer = xfer; 2909 ohci_hash_add_td(sc, stat); 2910 2911 usb_syncmem(&stat->dma, stat->offs, sizeof(stat->td), 2912 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2913 2914 memset(&tail->td, 0, sizeof(tail->td)); 2915 tail->nexttd = NULL; 2916 tail->xfer = NULL; 2917 2918 usb_syncmem(&tail->dma, tail->offs, sizeof(tail->td), 2919 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2920 2921 #ifdef OHCI_DEBUG 2922 USBHIST_LOGN(ohcidebug, 5, "--- dump start ---", 0, 0, 0, 0); 2923 if (ohcidebug >= 5) { 2924 ohci_dump_ed(sc, sed); 2925 ohci_dump_tds(sc, setup); 2926 } 2927 USBHIST_LOGN(ohcidebug, 5, "--- dump end ---", 0, 0, 0, 0); 2928 #endif 2929 2930 /* Insert ED in schedule */ 2931 sed->ed.ed_tailp = HTOO32(tail->physaddr); 2932 usb_syncmem(&sed->dma, 2933 sed->offs + offsetof(ohci_ed_t, ed_tailp), 2934 sizeof(sed->ed.ed_tailp), 2935 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2936 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 2937 if (xfer->ux_timeout && !sc->sc_bus.ub_usepolling) { 2938 callout_reset(&xfer->ux_callout, mstohz(xfer->ux_timeout), 2939 ohci_timeout, xfer); 2940 } 2941 2942 DPRINTF("done", 0, 0, 0, 0); 2943 2944 mutex_exit(&sc->sc_lock); 2945 2946 if (sc->sc_bus.ub_usepolling) 2947 ohci_waitintr(sc, xfer); 2948 2949 return USBD_IN_PROGRESS; 2950 } 2951 2952 /* Abort a device control request. */ 2953 Static void 2954 ohci_device_ctrl_abort(struct usbd_xfer *xfer) 2955 { 2956 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 2957 2958 KASSERT(mutex_owned(&sc->sc_lock)); 2959 2960 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2961 DPRINTF("xfer=%p", xfer, 0, 0, 0); 2962 ohci_abort_xfer(xfer, USBD_CANCELLED); 2963 } 2964 2965 /* Close a device control pipe. */ 2966 Static void 2967 ohci_device_ctrl_close(struct usbd_pipe *pipe) 2968 { 2969 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 2970 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 2971 2972 KASSERT(mutex_owned(&sc->sc_lock)); 2973 2974 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2975 DPRINTF("pipe=%p", pipe, 0, 0, 0); 2976 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2977 ohci_free_std_locked(sc, opipe->tail.td); 2978 } 2979 2980 /************************/ 2981 2982 Static void 2983 ohci_device_clear_toggle(struct usbd_pipe *pipe) 2984 { 2985 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 2986 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 2987 2988 opipe->sed->ed.ed_headp &= HTOO32(~OHCI_TOGGLECARRY); 2989 } 2990 2991 Static void 2992 ohci_noop(struct usbd_pipe *pipe) 2993 { 2994 } 2995 2996 Static int 2997 ohci_device_bulk_init(struct usbd_xfer *xfer) 2998 { 2999 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3000 int len = xfer->ux_bufsize; 3001 int endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress;; 3002 int isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3003 int err; 3004 3005 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3006 3007 KASSERT(!(xfer->ux_rqflags & URQ_REQUEST)); 3008 3009 DPRINTFN(4, "xfer=%p len=%d isread=%d flags=%d", xfer, len, isread, 3010 xfer->ux_flags); 3011 DPRINTFN(4, "endpt=%d", endpt, 0, 0, 0); 3012 3013 /* Allocate a chain of new TDs (including a new tail). */ 3014 err = ohci_alloc_std_chain(sc, xfer, len, isread); 3015 if (err) 3016 return err; 3017 3018 return 0; 3019 } 3020 3021 Static void 3022 ohci_device_bulk_fini(struct usbd_xfer *xfer) 3023 { 3024 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3025 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3026 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 3027 3028 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3029 DPRINTFN(8, "xfer %p nstd %d", xfer, ox->ox_nstd, 0, 0); 3030 3031 mutex_enter(&sc->sc_lock); 3032 for (size_t i = 0; i < ox->ox_nstd; i++) { 3033 ohci_soft_td_t *std = ox->ox_stds[i]; 3034 if (std == NULL) 3035 break; 3036 if (std != opipe->tail.td) 3037 ohci_free_std_locked(sc, std); 3038 } 3039 mutex_exit(&sc->sc_lock); 3040 3041 if (ox->ox_nstd) { 3042 const size_t sz = sizeof(ohci_soft_td_t *) * ox->ox_nstd; 3043 kmem_free(ox->ox_stds, sz); 3044 } 3045 } 3046 3047 Static usbd_status 3048 ohci_device_bulk_transfer(struct usbd_xfer *xfer) 3049 { 3050 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3051 usbd_status err; 3052 3053 /* Insert last in queue. */ 3054 mutex_enter(&sc->sc_lock); 3055 err = usb_insert_transfer(xfer); 3056 mutex_exit(&sc->sc_lock); 3057 if (err) 3058 return err; 3059 3060 /* Pipe isn't running, start first */ 3061 return ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 3062 } 3063 3064 Static usbd_status 3065 ohci_device_bulk_start(struct usbd_xfer *xfer) 3066 { 3067 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3068 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 3069 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3070 ohci_soft_td_t *last; 3071 ohci_soft_td_t *data, *tail, *tdp; 3072 ohci_soft_ed_t *sed; 3073 int len, isread, endpt; 3074 3075 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3076 3077 if (sc->sc_dying) 3078 return USBD_IOERROR; 3079 3080 KASSERT(!(xfer->ux_rqflags & URQ_REQUEST)); 3081 3082 len = xfer->ux_length; 3083 endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress; 3084 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3085 sed = opipe->sed; 3086 3087 DPRINTFN(4, "xfer=%p len=%d isread=%d flags=%d", xfer, len, isread, 3088 xfer->ux_flags); 3089 DPRINTFN(4, "endpt=%d", endpt, 0, 0, 0); 3090 3091 mutex_enter(&sc->sc_lock); 3092 3093 /* 3094 * Use the pipe "tail" TD as our first and loan our first TD to the 3095 * next transfer 3096 */ 3097 data = opipe->tail.td; 3098 opipe->tail.td = ox->ox_stds[0]; 3099 ox->ox_stds[0] = data; 3100 ohci_reset_std_chain(sc, xfer, len, isread, data, &last); 3101 3102 /* point at sentinel */ 3103 tail = opipe->tail.td; 3104 memset(&tail->td, 0, sizeof(tail->td)); 3105 tail->nexttd = NULL; 3106 tail->xfer = NULL; 3107 usb_syncmem(&tail->dma, tail->offs, sizeof(tail->td), 3108 BUS_DMASYNC_PREWRITE); 3109 xfer->ux_hcpriv = data; 3110 3111 DPRINTFN(8, "xfer %p data %p tail %p", xfer, ox->ox_stds[0], tail, 0); 3112 KASSERT(opipe->tail.td == tail); 3113 3114 /* We want interrupt at the end of the transfer. */ 3115 last->td.td_flags &= HTOO32(~OHCI_TD_INTR_MASK); 3116 last->td.td_flags |= HTOO32(OHCI_TD_SET_DI(1)); 3117 3118 last->td.td_nexttd = HTOO32(tail->physaddr); 3119 last->nexttd = tail; 3120 last->flags |= OHCI_CALL_DONE; 3121 usb_syncmem(&last->dma, last->offs, sizeof(last->td), 3122 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3123 3124 DPRINTFN(4, "ed_flags=0x%08x td_flags=0x%08x " 3125 "td_cbp=0x%08x td_be=0x%08x", 3126 (int)O32TOH(sed->ed.ed_flags), 3127 (int)O32TOH(data->td.td_flags), 3128 (int)O32TOH(data->td.td_cbp), 3129 (int)O32TOH(data->td.td_be)); 3130 3131 #ifdef OHCI_DEBUG 3132 DPRINTFN(5, "--- dump start ---", 0, 0, 0, 0); 3133 if (ohcidebug >= 5) { 3134 ohci_dump_ed(sc, sed); 3135 ohci_dump_tds(sc, data); 3136 } 3137 DPRINTFN(5, "--- dump end ---", 0, 0, 0, 0); 3138 #endif 3139 3140 /* Insert ED in schedule */ 3141 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 3142 KASSERT(tdp->xfer == xfer); 3143 } 3144 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3145 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3146 sed->ed.ed_tailp = HTOO32(tail->physaddr); 3147 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3148 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3149 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3150 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 3151 if (xfer->ux_timeout && !sc->sc_bus.ub_usepolling) { 3152 callout_reset(&xfer->ux_callout, mstohz(xfer->ux_timeout), 3153 ohci_timeout, xfer); 3154 } 3155 mutex_exit(&sc->sc_lock); 3156 3157 return USBD_IN_PROGRESS; 3158 } 3159 3160 Static void 3161 ohci_device_bulk_abort(struct usbd_xfer *xfer) 3162 { 3163 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 3164 3165 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3166 3167 KASSERT(mutex_owned(&sc->sc_lock)); 3168 3169 DPRINTF("xfer=%p", xfer, 0, 0, 0); 3170 ohci_abort_xfer(xfer, USBD_CANCELLED); 3171 } 3172 3173 /* 3174 * Close a device bulk pipe. 3175 */ 3176 Static void 3177 ohci_device_bulk_close(struct usbd_pipe *pipe) 3178 { 3179 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 3180 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 3181 3182 KASSERT(mutex_owned(&sc->sc_lock)); 3183 3184 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3185 3186 DPRINTF("pipe=%p", pipe, 0, 0, 0); 3187 ohci_close_pipe(pipe, sc->sc_bulk_head); 3188 ohci_free_std_locked(sc, opipe->tail.td); 3189 } 3190 3191 /************************/ 3192 3193 Static int 3194 ohci_device_intr_init(struct usbd_xfer *xfer) 3195 { 3196 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3197 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3198 int len = xfer->ux_bufsize; 3199 int endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress;; 3200 int isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3201 int err; 3202 3203 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3204 3205 KASSERT(!(xfer->ux_rqflags & URQ_REQUEST)); 3206 KASSERT(len != 0); 3207 3208 DPRINTFN(4, "xfer=%p len=%d isread=%d flags=%d", xfer, len, isread, 3209 xfer->ux_flags); 3210 DPRINTFN(4, "endpt=%d", endpt, 0, 0, 0); 3211 3212 ox->ox_nstd = 0; 3213 3214 err = ohci_alloc_std_chain(sc, xfer, len, isread); 3215 if (err) { 3216 return err; 3217 } 3218 3219 return 0; 3220 } 3221 3222 Static void 3223 ohci_device_intr_fini(struct usbd_xfer *xfer) 3224 { 3225 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3226 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3227 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 3228 3229 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3230 DPRINTFN(8, "xfer %p nstd %d", xfer, ox->ox_nstd, 0, 0); 3231 3232 mutex_enter(&sc->sc_lock); 3233 for (size_t i = 0; i < ox->ox_nstd; i++) { 3234 ohci_soft_td_t *std = ox->ox_stds[i]; 3235 if (std != NULL) 3236 break; 3237 if (std != opipe->tail.td) 3238 ohci_free_std_locked(sc, std); 3239 } 3240 mutex_exit(&sc->sc_lock); 3241 3242 if (ox->ox_nstd) { 3243 const size_t sz = sizeof(ohci_soft_td_t *) * ox->ox_nstd; 3244 kmem_free(ox->ox_stds, sz); 3245 } 3246 } 3247 3248 Static usbd_status 3249 ohci_device_intr_transfer(struct usbd_xfer *xfer) 3250 { 3251 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3252 usbd_status err; 3253 3254 /* Insert last in queue. */ 3255 mutex_enter(&sc->sc_lock); 3256 err = usb_insert_transfer(xfer); 3257 mutex_exit(&sc->sc_lock); 3258 if (err) 3259 return err; 3260 3261 /* Pipe isn't running, start first */ 3262 return ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 3263 } 3264 3265 Static usbd_status 3266 ohci_device_intr_start(struct usbd_xfer *xfer) 3267 { 3268 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3269 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 3270 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3271 ohci_soft_ed_t *sed = opipe->sed; 3272 ohci_soft_td_t *data, *last, *tail; 3273 int len, isread, endpt; 3274 3275 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3276 3277 if (sc->sc_dying) 3278 return USBD_IOERROR; 3279 3280 DPRINTFN(3, "xfer=%p len=%d flags=%d priv=%p", xfer, xfer->ux_length, 3281 xfer->ux_flags, xfer->ux_priv); 3282 3283 KASSERT(!(xfer->ux_rqflags & URQ_REQUEST)); 3284 3285 len = xfer->ux_length; 3286 endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress; 3287 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3288 3289 mutex_enter(&sc->sc_lock); 3290 3291 /* 3292 * Use the pipe "tail" TD as our first and loan our first TD to the 3293 * next transfer. 3294 */ 3295 data = opipe->tail.td; 3296 opipe->tail.td = ox->ox_stds[0]; 3297 ox->ox_stds[0] = data; 3298 ohci_reset_std_chain(sc, xfer, len, isread, data, &last); 3299 3300 /* point at sentinel */ 3301 tail = opipe->tail.td; 3302 memset(&tail->td, 0, sizeof(tail->td)); 3303 tail->nexttd = NULL; 3304 tail->xfer = NULL; 3305 usb_syncmem(&tail->dma, tail->offs, sizeof(tail->td), 3306 BUS_DMASYNC_PREWRITE); 3307 xfer->ux_hcpriv = data; 3308 3309 DPRINTFN(8, "data %p tail %p", ox->ox_stds[0], tail, 0, 0); 3310 KASSERT(opipe->tail.td == tail); 3311 3312 /* We want interrupt at the end of the transfer. */ 3313 last->td.td_flags &= HTOO32(~OHCI_TD_INTR_MASK); 3314 last->td.td_flags |= HTOO32(OHCI_TD_SET_DI(1)); 3315 3316 last->td.td_nexttd = HTOO32(tail->physaddr); 3317 last->nexttd = tail; 3318 last->flags |= OHCI_CALL_DONE; 3319 usb_syncmem(&last->dma, last->offs, sizeof(last->td), 3320 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3321 3322 #ifdef OHCI_DEBUG 3323 DPRINTFN(5, "--- dump start ---", 0, 0, 0, 0); 3324 if (ohcidebug >= 5) { 3325 ohci_dump_ed(sc, sed); 3326 ohci_dump_tds(sc, data); 3327 } 3328 DPRINTFN(5, "--- dump end ---", 0, 0, 0, 0); 3329 #endif 3330 3331 /* Insert ED in schedule */ 3332 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3333 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3334 sed->ed.ed_tailp = HTOO32(tail->physaddr); 3335 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3336 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3337 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3338 3339 mutex_exit(&sc->sc_lock); 3340 3341 return USBD_IN_PROGRESS; 3342 } 3343 3344 /* Abort a device interrupt request. */ 3345 Static void 3346 ohci_device_intr_abort(struct usbd_xfer *xfer) 3347 { 3348 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 3349 3350 KASSERT(mutex_owned(&sc->sc_lock)); 3351 KASSERT(xfer->ux_pipe->up_intrxfer == xfer); 3352 3353 ohci_abort_xfer(xfer, USBD_CANCELLED); 3354 } 3355 3356 /* Close a device interrupt pipe. */ 3357 Static void 3358 ohci_device_intr_close(struct usbd_pipe *pipe) 3359 { 3360 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 3361 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 3362 int nslots = opipe->intr.nslots; 3363 int pos = opipe->intr.pos; 3364 int j; 3365 ohci_soft_ed_t *p, *sed = opipe->sed; 3366 3367 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3368 3369 KASSERT(mutex_owned(&sc->sc_lock)); 3370 3371 DPRINTFN(1, "pipe=%p nslots=%d pos=%d", pipe, nslots, pos, 0); 3372 usb_syncmem(&sed->dma, sed->offs, 3373 sizeof(sed->ed), BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3374 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 3375 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3376 sizeof(sed->ed.ed_flags), 3377 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3378 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 3379 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) 3380 usb_delay_ms_locked(&sc->sc_bus, 2, &sc->sc_lock); 3381 3382 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 3383 continue; 3384 KASSERT(p); 3385 p->next = sed->next; 3386 p->ed.ed_nexted = sed->ed.ed_nexted; 3387 usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted), 3388 sizeof(p->ed.ed_nexted), 3389 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3390 3391 for (j = 0; j < nslots; j++) 3392 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 3393 3394 ohci_free_std_locked(sc, opipe->tail.td); 3395 ohci_free_sed_locked(sc, opipe->sed); 3396 } 3397 3398 Static usbd_status 3399 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival) 3400 { 3401 int i, j, best; 3402 u_int npoll, slow, shigh, nslots; 3403 u_int bestbw, bw; 3404 ohci_soft_ed_t *hsed, *sed = opipe->sed; 3405 3406 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3407 3408 DPRINTFN(2, "pipe=%p", opipe, 0, 0, 0); 3409 if (ival == 0) { 3410 printf("ohci_setintr: 0 interval\n"); 3411 return USBD_INVAL; 3412 } 3413 3414 npoll = OHCI_NO_INTRS; 3415 while (npoll > ival) 3416 npoll /= 2; 3417 DPRINTFN(2, "ival=%d npoll=%d", ival, npoll, 0, 0); 3418 3419 /* 3420 * We now know which level in the tree the ED must go into. 3421 * Figure out which slot has most bandwidth left over. 3422 * Slots to examine: 3423 * npoll 3424 * 1 0 3425 * 2 1 2 3426 * 4 3 4 5 6 3427 * 8 7 8 9 10 11 12 13 14 3428 * N (N-1) .. (N-1+N-1) 3429 */ 3430 slow = npoll-1; 3431 shigh = slow + npoll; 3432 nslots = OHCI_NO_INTRS / npoll; 3433 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 3434 bw = 0; 3435 for (j = 0; j < nslots; j++) 3436 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 3437 if (bw < bestbw) { 3438 best = i; 3439 bestbw = bw; 3440 } 3441 } 3442 DPRINTFN(2, "best=%d(%d..%d) bestbw=%d", best, slow, shigh, bestbw); 3443 3444 mutex_enter(&sc->sc_lock); 3445 hsed = sc->sc_eds[best]; 3446 sed->next = hsed->next; 3447 usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags), 3448 sizeof(hsed->ed.ed_flags), 3449 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3450 sed->ed.ed_nexted = hsed->ed.ed_nexted; 3451 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3452 sizeof(sed->ed.ed_flags), 3453 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3454 hsed->next = sed; 3455 hsed->ed.ed_nexted = HTOO32(sed->physaddr); 3456 usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags), 3457 sizeof(hsed->ed.ed_flags), 3458 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3459 mutex_exit(&sc->sc_lock); 3460 3461 for (j = 0; j < nslots; j++) 3462 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 3463 opipe->intr.nslots = nslots; 3464 opipe->intr.pos = best; 3465 3466 DPRINTFN(5, "returns %p", opipe, 0, 0, 0); 3467 return USBD_NORMAL_COMPLETION; 3468 } 3469 3470 /***********************/ 3471 3472 Static int 3473 ohci_device_isoc_init(struct usbd_xfer *xfer) 3474 { 3475 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3476 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3477 ohci_soft_itd_t *sitd; 3478 size_t i; 3479 int err; 3480 3481 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3482 3483 DPRINTFN(1, "xfer %p len %d flags %d", xfer, xfer->ux_length, 3484 xfer->ux_flags, 0); 3485 3486 const size_t nfsitd = 3487 (xfer->ux_nframes + OHCI_ITD_NOFFSET - 1) / OHCI_ITD_NOFFSET; 3488 const size_t nbsitd = xfer->ux_bufsize / OHCI_PAGE_SIZE; 3489 const size_t nsitd = MAX(nfsitd, nbsitd) + 1; 3490 3491 ox->ox_sitds = kmem_zalloc(sizeof(ohci_soft_itd_t *) * nsitd, 3492 KM_SLEEP); 3493 ox->ox_nsitd = nsitd; 3494 3495 for (i = 0; i < nsitd; i++) { 3496 /* Allocate next ITD */ 3497 sitd = ohci_alloc_sitd(sc); 3498 if (sitd == NULL) { 3499 err = ENOMEM; 3500 goto fail; 3501 } 3502 ox->ox_sitds[i] = sitd; 3503 sitd->xfer = xfer; 3504 sitd->flags = 0; 3505 } 3506 3507 return 0; 3508 fail: 3509 for (; i > 0;) { 3510 ohci_free_sitd(sc, ox->ox_sitds[--i]); 3511 } 3512 return err; 3513 } 3514 3515 Static void 3516 ohci_device_isoc_fini(struct usbd_xfer *xfer) 3517 { 3518 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3519 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3520 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 3521 3522 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3523 3524 mutex_enter(&sc->sc_lock); 3525 for (size_t i = 0; i < ox->ox_nsitd; i++) { 3526 if (ox->ox_sitds[i] != opipe->tail.itd) { 3527 ohci_free_sitd_locked(sc, ox->ox_sitds[i]); 3528 } 3529 } 3530 mutex_exit(&sc->sc_lock); 3531 3532 if (ox->ox_nsitd) { 3533 const size_t sz = sizeof(ohci_soft_itd_t *) * ox->ox_nsitd; 3534 kmem_free(ox->ox_sitds, sz); 3535 } 3536 } 3537 3538 3539 usbd_status 3540 ohci_device_isoc_transfer(struct usbd_xfer *xfer) 3541 { 3542 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3543 usbd_status __diagused err; 3544 3545 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3546 3547 DPRINTFN(5, "xfer=%p", xfer, 0, 0, 0); 3548 3549 /* Put it on our queue, */ 3550 mutex_enter(&sc->sc_lock); 3551 err = usb_insert_transfer(xfer); 3552 mutex_exit(&sc->sc_lock); 3553 3554 KASSERT(err == USBD_NORMAL_COMPLETION); 3555 3556 /* insert into schedule, */ 3557 ohci_device_isoc_enter(xfer); 3558 3559 /* and start if the pipe wasn't running */ 3560 return USBD_IN_PROGRESS; 3561 } 3562 3563 void 3564 ohci_device_isoc_enter(struct usbd_xfer *xfer) 3565 { 3566 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3567 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 3568 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3569 ohci_soft_ed_t *sed = opipe->sed; 3570 ohci_soft_itd_t *sitd, *nsitd, *tail; 3571 ohci_physaddr_t buf, offs, noffs, bp0; 3572 int i, ncur, nframes; 3573 3574 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3575 DPRINTFN(5, "xfer=%p", xfer, 0, 0, 0); 3576 3577 mutex_enter(&sc->sc_lock); 3578 3579 if (sc->sc_dying) { 3580 mutex_exit(&sc->sc_lock); 3581 return; 3582 } 3583 3584 struct isoc *isoc = &opipe->isoc; 3585 3586 DPRINTFN(1, "used=%d next=%d xfer=%p nframes=%d", 3587 isoc->inuse, isoc->next, xfer, xfer->ux_nframes); 3588 3589 if (isoc->next == -1) { 3590 /* Not in use yet, schedule it a few frames ahead. */ 3591 isoc->next = O32TOH(sc->sc_hcca->hcca_frame_number) + 5; 3592 DPRINTFN(2,"start next=%d", isoc->next, 0, 0, 0); 3593 } 3594 3595 sitd = opipe->tail.itd; 3596 opipe->tail.itd = ox->ox_sitds[0]; 3597 ox->ox_sitds[0] = sitd; 3598 3599 buf = DMAADDR(&xfer->ux_dmabuf, 0); 3600 bp0 = OHCI_PAGE(buf); 3601 offs = OHCI_PAGE_OFFSET(buf); 3602 nframes = xfer->ux_nframes; 3603 xfer->ux_hcpriv = sitd; 3604 size_t j = 1; 3605 for (i = ncur = 0; i < nframes; i++, ncur++) { 3606 noffs = offs + xfer->ux_frlengths[i]; 3607 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ 3608 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */ 3609 3610 /* Allocate next ITD */ 3611 nsitd = ox->ox_sitds[j++]; 3612 KASSERT(nsitd != NULL); 3613 KASSERT(j < ox->ox_nsitd); 3614 3615 /* Fill current ITD */ 3616 sitd->itd.itd_flags = HTOO32( 3617 OHCI_ITD_NOCC | 3618 OHCI_ITD_SET_SF(isoc->next) | 3619 OHCI_ITD_SET_DI(6) | /* delay intr a little */ 3620 OHCI_ITD_SET_FC(ncur)); 3621 sitd->itd.itd_bp0 = HTOO32(bp0); 3622 sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr); 3623 sitd->itd.itd_be = HTOO32(bp0 + offs - 1); 3624 sitd->nextitd = nsitd; 3625 sitd->xfer = xfer; 3626 sitd->flags = 0; 3627 #ifdef DIAGNOSTIC 3628 sitd->isdone = false; 3629 #endif 3630 ohci_hash_add_itd(sc, sitd); 3631 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 3632 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3633 3634 sitd = nsitd; 3635 isoc->next = isoc->next + ncur; 3636 bp0 = OHCI_PAGE(buf + offs); 3637 ncur = 0; 3638 } 3639 sitd->itd.itd_offset[ncur] = HTOO16(OHCI_ITD_MK_OFFS(offs)); 3640 offs = noffs; 3641 } 3642 KASSERT(j <= ox->ox_nsitd); 3643 3644 /* point at sentinel */ 3645 tail = opipe->tail.itd; 3646 memset(&tail->itd, 0, sizeof(tail->itd)); 3647 tail->nextitd = NULL; 3648 tail->xfer = NULL; 3649 usb_syncmem(&tail->dma, tail->offs, sizeof(tail->itd), 3650 BUS_DMASYNC_PREWRITE); 3651 3652 /* Fixup last used ITD */ 3653 sitd->itd.itd_flags = HTOO32( 3654 OHCI_ITD_NOCC | 3655 OHCI_ITD_SET_SF(isoc->next) | 3656 OHCI_ITD_SET_DI(0) | 3657 OHCI_ITD_SET_FC(ncur)); 3658 sitd->itd.itd_bp0 = HTOO32(bp0); 3659 sitd->itd.itd_nextitd = HTOO32(tail->physaddr); 3660 sitd->itd.itd_be = HTOO32(bp0 + offs - 1); 3661 sitd->nextitd = tail; 3662 sitd->xfer = xfer; 3663 sitd->flags = OHCI_CALL_DONE; 3664 #ifdef DIAGNOSTIC 3665 sitd->isdone = false; 3666 #endif 3667 ohci_hash_add_itd(sc, sitd); 3668 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 3669 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3670 3671 isoc->next = isoc->next + ncur; 3672 isoc->inuse += nframes; 3673 3674 /* XXX pretend we did it all */ 3675 xfer->ux_actlen = offs; 3676 xfer->ux_status = USBD_IN_PROGRESS; 3677 3678 #ifdef OHCI_DEBUG 3679 if (ohcidebug >= 5) { 3680 DPRINTF("frame=%d", O32TOH(sc->sc_hcca->hcca_frame_number), 3681 0, 0, 0); 3682 ohci_dump_itds(sc, xfer->ux_hcpriv); 3683 ohci_dump_ed(sc, sed); 3684 } 3685 #endif 3686 3687 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3688 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3689 sed->ed.ed_tailp = HTOO32(tail->physaddr); 3690 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3691 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3692 sizeof(sed->ed.ed_flags), 3693 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3694 mutex_exit(&sc->sc_lock); 3695 } 3696 3697 void 3698 ohci_device_isoc_abort(struct usbd_xfer *xfer) 3699 { 3700 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 3701 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3702 ohci_soft_ed_t *sed; 3703 ohci_soft_itd_t *sitd; 3704 3705 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3706 DPRINTFN(1, "xfer=%p", xfer, 0, 0, 0); 3707 3708 KASSERT(mutex_owned(&sc->sc_lock)); 3709 3710 /* Transfer is already done. */ 3711 if (xfer->ux_status != USBD_NOT_STARTED && 3712 xfer->ux_status != USBD_IN_PROGRESS) { 3713 printf("ohci_device_isoc_abort: early return\n"); 3714 goto done; 3715 } 3716 3717 /* Give xfer the requested abort code. */ 3718 xfer->ux_status = USBD_CANCELLED; 3719 3720 sed = opipe->sed; 3721 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3722 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3723 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */ 3724 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3725 sizeof(sed->ed.ed_flags), 3726 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3727 3728 sitd = xfer->ux_hcpriv; 3729 KASSERT(sitd); 3730 3731 for (; sitd->xfer == xfer; sitd = sitd->nextitd) { 3732 ohci_hash_rem_itd(sc, sitd); 3733 #ifdef DIAGNOSTIC 3734 DPRINTFN(1, "abort sets done sitd=%p", sitd, 0, 0, 0); 3735 sitd->isdone = true; 3736 #endif 3737 } 3738 3739 usb_delay_ms_locked(&sc->sc_bus, OHCI_ITD_NOFFSET, &sc->sc_lock); 3740 3741 /* Run callback. */ 3742 usb_transfer_complete(xfer); 3743 3744 sed->ed.ed_headp = HTOO32(sitd->physaddr); /* unlink TDs */ 3745 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */ 3746 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3747 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3748 3749 done: 3750 KASSERT(mutex_owned(&sc->sc_lock)); 3751 } 3752 3753 void 3754 ohci_device_isoc_done(struct usbd_xfer *xfer) 3755 { 3756 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3757 DPRINTFN(1, "xfer=%p", xfer, 0, 0, 0); 3758 } 3759 3760 usbd_status 3761 ohci_setup_isoc(struct usbd_pipe *pipe) 3762 { 3763 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 3764 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 3765 struct isoc *isoc = &opipe->isoc; 3766 3767 isoc->next = -1; 3768 isoc->inuse = 0; 3769 3770 mutex_enter(&sc->sc_lock); 3771 ohci_add_ed(sc, opipe->sed, sc->sc_isoc_head); 3772 mutex_exit(&sc->sc_lock); 3773 3774 return USBD_NORMAL_COMPLETION; 3775 } 3776 3777 void 3778 ohci_device_isoc_close(struct usbd_pipe *pipe) 3779 { 3780 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 3781 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 3782 3783 KASSERT(mutex_owned(&sc->sc_lock)); 3784 3785 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3786 DPRINTF("pipe=%p", pipe, 0, 0, 0); 3787 ohci_close_pipe(pipe, sc->sc_isoc_head); 3788 #ifdef DIAGNOSTIC 3789 opipe->tail.itd->isdone = true; 3790 #endif 3791 ohci_free_sitd_locked(sc, opipe->tail.itd); 3792 } 3793
Indexes created Fri Oct 03 02:09:57 GMT 2025