ohci.c revision 1.254.2.67
1 /* $NetBSD: ohci.c,v 1.254.2.67 2016/04/01 14:17:24 skrll Exp $ */ 2 3 /* 4 * Copyright (c) 1998, 2004, 2005, 2012 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net) at 9 * Carlstedt Research & Technology, Jared D. McNeill (jmcneill (at) invisible.ca) 10 * and Matthew R. Green (mrg (at) eterna.com.au). 11 * This code is derived from software contributed to The NetBSD Foundation 12 * by Charles M. Hannum. 13 * 14 * Redistribution and use in source and binary forms, with or without 15 * modification, are permitted provided that the following conditions 16 * are met: 17 * 1. Redistributions of source code must retain the above copyright 18 * notice, this list of conditions and the following disclaimer. 19 * 2. Redistributions in binary form must reproduce the above copyright 20 * notice, this list of conditions and the following disclaimer in the 21 * documentation and/or other materials provided with the distribution. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 24 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 25 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 26 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 27 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 31 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 32 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 33 * POSSIBILITY OF SUCH DAMAGE. 34 */ 35 36 /* 37 * USB Open Host Controller driver. 38 * 39 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html 40 * USB spec: http://www.usb.org/developers/docs/ 41 */ 42 43 #include <sys/cdefs.h> 44 __KERNEL_RCSID(0, "$NetBSD: ohci.c,v 1.254.2.67 2016/04/01 14:17:24 skrll Exp $"); 45 46 #include "opt_usb.h" 47 48 #include <sys/param.h> 49 50 #include <sys/cpu.h> 51 #include <sys/device.h> 52 #include <sys/kernel.h> 53 #include <sys/kmem.h> 54 #include <sys/proc.h> 55 #include <sys/queue.h> 56 #include <sys/select.h> 57 #include <sys/sysctl.h> 58 #include <sys/systm.h> 59 60 #include <machine/endian.h> 61 62 #include <dev/usb/usb.h> 63 #include <dev/usb/usbdi.h> 64 #include <dev/usb/usbdivar.h> 65 #include <dev/usb/usb_mem.h> 66 #include <dev/usb/usb_quirks.h> 67 68 #include <dev/usb/ohcireg.h> 69 #include <dev/usb/ohcivar.h> 70 #include <dev/usb/usbroothub.h> 71 #include <dev/usb/usbhist.h> 72 73 #ifdef USB_DEBUG 74 #ifndef OHCI_DEBUG 75 #define ohcidebug 0 76 #else 77 static int ohcidebug = 10; 78 79 SYSCTL_SETUP(sysctl_hw_ohci_setup, "sysctl hw.ohci setup") 80 { 81 int err; 82 const struct sysctlnode *rnode; 83 const struct sysctlnode *cnode; 84 85 err = sysctl_createv(clog, 0, NULL, &rnode, 86 CTLFLAG_PERMANENT, CTLTYPE_NODE, "ohci", 87 SYSCTL_DESCR("ohci global controls"), 88 NULL, 0, NULL, 0, CTL_HW, CTL_CREATE, CTL_EOL); 89 90 if (err) 91 goto fail; 92 93 /* control debugging printfs */ 94 err = sysctl_createv(clog, 0, &rnode, &cnode, 95 CTLFLAG_PERMANENT|CTLFLAG_READWRITE, CTLTYPE_INT, 96 "debug", SYSCTL_DESCR("Enable debugging output"), 97 NULL, 0, &ohcidebug, sizeof(ohcidebug), CTL_CREATE, CTL_EOL); 98 if (err) 99 goto fail; 100 101 return; 102 fail: 103 aprint_error("%s: sysctl_createv failed (err = %d)\n", __func__, err); 104 } 105 106 #endif /* OHCI_DEBUG */ 107 #endif /* USB_DEBUG */ 108 109 #define DPRINTF(FMT,A,B,C,D) USBHIST_LOG(ohcidebug,FMT,A,B,C,D) 110 #define DPRINTFN(N,FMT,A,B,C,D) USBHIST_LOGN(ohcidebug,N,FMT,A,B,C,D) 111 #define OHCIHIST_FUNC() USBHIST_FUNC() 112 #define OHCIHIST_CALLED(name) USBHIST_CALLED(ohcidebug) 113 114 #if BYTE_ORDER == BIG_ENDIAN 115 #define SWAP_ENDIAN OHCI_LITTLE_ENDIAN 116 #else 117 #define SWAP_ENDIAN OHCI_BIG_ENDIAN 118 #endif 119 120 #define O16TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap16(val) : val) 121 #define O32TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap32(val) : val) 122 #define HTOO16(val) O16TOH(val) 123 #define HTOO32(val) O32TOH(val) 124 125 struct ohci_pipe; 126 127 Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *); 128 Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *); 129 130 Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *); 131 Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *); 132 Static void ohci_free_std_locked(ohci_softc_t *, ohci_soft_td_t *); 133 134 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *); 135 Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *); 136 Static void ohci_free_sitd_locked(ohci_softc_t *, 137 ohci_soft_itd_t *); 138 139 Static usbd_status ohci_alloc_std_chain(ohci_softc_t *, struct usbd_xfer *, 140 int, int); 141 Static void ohci_free_stds(ohci_softc_t *, struct ohci_xfer *); 142 143 Static void ohci_reset_std_chain(ohci_softc_t *, struct usbd_xfer *, 144 int, int, ohci_soft_td_t *, ohci_soft_td_t **); 145 146 Static usbd_status ohci_open(struct usbd_pipe *); 147 Static void ohci_poll(struct usbd_bus *); 148 Static void ohci_softintr(void *); 149 Static void ohci_waitintr(ohci_softc_t *, struct usbd_xfer *); 150 Static void ohci_rhsc(ohci_softc_t *, struct usbd_xfer *); 151 Static void ohci_rhsc_softint(void *); 152 153 Static void ohci_add_ed(ohci_softc_t *, ohci_soft_ed_t *, 154 ohci_soft_ed_t *); 155 156 Static void ohci_rem_ed(ohci_softc_t *, ohci_soft_ed_t *, 157 ohci_soft_ed_t *); 158 Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *); 159 Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *); 160 Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t); 161 Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *); 162 Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *); 163 Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t); 164 165 Static usbd_status ohci_setup_isoc(struct usbd_pipe *); 166 Static void ohci_device_isoc_enter(struct usbd_xfer *); 167 168 Static struct usbd_xfer * 169 ohci_allocx(struct usbd_bus *, unsigned int); 170 Static void ohci_freex(struct usbd_bus *, struct usbd_xfer *); 171 Static void ohci_get_lock(struct usbd_bus *, kmutex_t **); 172 Static int ohci_roothub_ctrl(struct usbd_bus *, 173 usb_device_request_t *, void *, int); 174 175 Static usbd_status ohci_root_intr_transfer(struct usbd_xfer *); 176 Static usbd_status ohci_root_intr_start(struct usbd_xfer *); 177 Static void ohci_root_intr_abort(struct usbd_xfer *); 178 Static void ohci_root_intr_close(struct usbd_pipe *); 179 Static void ohci_root_intr_done(struct usbd_xfer *); 180 181 Static int ohci_device_ctrl_init(struct usbd_xfer *); 182 Static void ohci_device_ctrl_fini(struct usbd_xfer *); 183 Static usbd_status ohci_device_ctrl_transfer(struct usbd_xfer *); 184 Static usbd_status ohci_device_ctrl_start(struct usbd_xfer *); 185 Static void ohci_device_ctrl_abort(struct usbd_xfer *); 186 Static void ohci_device_ctrl_close(struct usbd_pipe *); 187 Static void ohci_device_ctrl_done(struct usbd_xfer *); 188 189 Static int ohci_device_bulk_init(struct usbd_xfer *); 190 Static void ohci_device_bulk_fini(struct usbd_xfer *); 191 Static usbd_status ohci_device_bulk_transfer(struct usbd_xfer *); 192 Static usbd_status ohci_device_bulk_start(struct usbd_xfer *); 193 Static void ohci_device_bulk_abort(struct usbd_xfer *); 194 Static void ohci_device_bulk_close(struct usbd_pipe *); 195 Static void ohci_device_bulk_done(struct usbd_xfer *); 196 197 Static int ohci_device_intr_init(struct usbd_xfer *); 198 Static void ohci_device_intr_fini(struct usbd_xfer *); 199 Static usbd_status ohci_device_intr_transfer(struct usbd_xfer *); 200 Static usbd_status ohci_device_intr_start(struct usbd_xfer *); 201 Static void ohci_device_intr_abort(struct usbd_xfer *); 202 Static void ohci_device_intr_close(struct usbd_pipe *); 203 Static void ohci_device_intr_done(struct usbd_xfer *); 204 205 Static int ohci_device_isoc_init(struct usbd_xfer *); 206 Static void ohci_device_isoc_fini(struct usbd_xfer *); 207 Static usbd_status ohci_device_isoc_transfer(struct usbd_xfer *); 208 Static void ohci_device_isoc_abort(struct usbd_xfer *); 209 Static void ohci_device_isoc_close(struct usbd_pipe *); 210 Static void ohci_device_isoc_done(struct usbd_xfer *); 211 212 Static usbd_status ohci_device_setintr(ohci_softc_t *, 213 struct ohci_pipe *, int); 214 215 Static void ohci_timeout(void *); 216 Static void ohci_timeout_task(void *); 217 Static void ohci_rhsc_enable(void *); 218 219 Static void ohci_close_pipe(struct usbd_pipe *, ohci_soft_ed_t *); 220 Static void ohci_abort_xfer(struct usbd_xfer *, usbd_status); 221 222 Static void ohci_device_clear_toggle(struct usbd_pipe *); 223 Static void ohci_noop(struct usbd_pipe *); 224 225 #ifdef OHCI_DEBUG 226 Static void ohci_dumpregs(ohci_softc_t *); 227 Static void ohci_dump_tds(ohci_softc_t *, ohci_soft_td_t *); 228 Static void ohci_dump_td(ohci_softc_t *, ohci_soft_td_t *); 229 Static void ohci_dump_ed(ohci_softc_t *, ohci_soft_ed_t *); 230 Static void ohci_dump_itd(ohci_softc_t *, ohci_soft_itd_t *); 231 Static void ohci_dump_itds(ohci_softc_t *, ohci_soft_itd_t *); 232 #endif 233 234 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 235 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 236 #define OWRITE1(sc, r, x) \ 237 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 238 #define OWRITE2(sc, r, x) \ 239 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 240 #define OWRITE4(sc, r, x) \ 241 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 242 243 static __inline uint32_t 244 OREAD4(ohci_softc_t *sc, bus_size_t r) 245 { 246 247 OBARR(sc); 248 return bus_space_read_4(sc->iot, sc->ioh, r); 249 } 250 251 /* Reverse the bits in a value 0 .. 31 */ 252 Static uint8_t revbits[OHCI_NO_INTRS] = 253 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 254 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 255 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 256 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 257 258 struct ohci_pipe { 259 struct usbd_pipe pipe; 260 ohci_soft_ed_t *sed; 261 union { 262 ohci_soft_td_t *td; 263 ohci_soft_itd_t *itd; 264 } tail; 265 /* Info needed for different pipe kinds. */ 266 union { 267 /* Control pipe */ 268 struct { 269 usb_dma_t reqdma; 270 } ctrl; 271 /* Interrupt pipe */ 272 struct { 273 int nslots; 274 int pos; 275 } intr; 276 /* Isochronous pipe */ 277 struct isoc { 278 int next, inuse; 279 } isoc; 280 }; 281 }; 282 283 Static const struct usbd_bus_methods ohci_bus_methods = { 284 .ubm_open = ohci_open, 285 .ubm_softint = ohci_softintr, 286 .ubm_dopoll = ohci_poll, 287 .ubm_allocx = ohci_allocx, 288 .ubm_freex = ohci_freex, 289 .ubm_getlock = ohci_get_lock, 290 .ubm_rhctrl = ohci_roothub_ctrl, 291 }; 292 293 Static const struct usbd_pipe_methods ohci_root_intr_methods = { 294 .upm_transfer = ohci_root_intr_transfer, 295 .upm_start = ohci_root_intr_start, 296 .upm_abort = ohci_root_intr_abort, 297 .upm_close = ohci_root_intr_close, 298 .upm_cleartoggle = ohci_noop, 299 .upm_done = ohci_root_intr_done, 300 }; 301 302 Static const struct usbd_pipe_methods ohci_device_ctrl_methods = { 303 .upm_init = ohci_device_ctrl_init, 304 .upm_fini = ohci_device_ctrl_fini, 305 .upm_transfer = ohci_device_ctrl_transfer, 306 .upm_start = ohci_device_ctrl_start, 307 .upm_abort = ohci_device_ctrl_abort, 308 .upm_close = ohci_device_ctrl_close, 309 .upm_cleartoggle = ohci_noop, 310 .upm_done = ohci_device_ctrl_done, 311 }; 312 313 Static const struct usbd_pipe_methods ohci_device_intr_methods = { 314 .upm_init = ohci_device_intr_init, 315 .upm_fini = ohci_device_intr_fini, 316 .upm_transfer = ohci_device_intr_transfer, 317 .upm_start = ohci_device_intr_start, 318 .upm_abort = ohci_device_intr_abort, 319 .upm_close = ohci_device_intr_close, 320 .upm_cleartoggle = ohci_device_clear_toggle, 321 .upm_done = ohci_device_intr_done, 322 }; 323 324 Static const struct usbd_pipe_methods ohci_device_bulk_methods = { 325 .upm_init = ohci_device_bulk_init, 326 .upm_fini = ohci_device_bulk_fini, 327 .upm_transfer = ohci_device_bulk_transfer, 328 .upm_start = ohci_device_bulk_start, 329 .upm_abort = ohci_device_bulk_abort, 330 .upm_close = ohci_device_bulk_close, 331 .upm_cleartoggle = ohci_device_clear_toggle, 332 .upm_done = ohci_device_bulk_done, 333 }; 334 335 Static const struct usbd_pipe_methods ohci_device_isoc_methods = { 336 .upm_init = ohci_device_isoc_init, 337 .upm_fini = ohci_device_isoc_fini, 338 .upm_transfer = ohci_device_isoc_transfer, 339 .upm_abort = ohci_device_isoc_abort, 340 .upm_close = ohci_device_isoc_close, 341 .upm_cleartoggle = ohci_noop, 342 .upm_done = ohci_device_isoc_done, 343 }; 344 345 int 346 ohci_activate(device_t self, enum devact act) 347 { 348 struct ohci_softc *sc = device_private(self); 349 350 switch (act) { 351 case DVACT_DEACTIVATE: 352 sc->sc_dying = 1; 353 return 0; 354 default: 355 return EOPNOTSUPP; 356 } 357 } 358 359 void 360 ohci_childdet(device_t self, device_t child) 361 { 362 struct ohci_softc *sc = device_private(self); 363 364 KASSERT(sc->sc_child == child); 365 sc->sc_child = NULL; 366 } 367 368 int 369 ohci_detach(struct ohci_softc *sc, int flags) 370 { 371 int rv = 0; 372 373 if (sc->sc_child != NULL) 374 rv = config_detach(sc->sc_child, flags); 375 376 if (rv != 0) 377 return rv; 378 379 callout_halt(&sc->sc_tmo_rhsc, &sc->sc_lock); 380 381 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 382 callout_destroy(&sc->sc_tmo_rhsc); 383 384 softint_disestablish(sc->sc_rhsc_si); 385 386 cv_destroy(&sc->sc_softwake_cv); 387 388 mutex_destroy(&sc->sc_lock); 389 mutex_destroy(&sc->sc_intr_lock); 390 391 if (sc->sc_hcca != NULL) 392 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 393 pool_cache_destroy(sc->sc_xferpool); 394 395 return rv; 396 } 397 398 ohci_soft_ed_t * 399 ohci_alloc_sed(ohci_softc_t *sc) 400 { 401 ohci_soft_ed_t *sed; 402 usbd_status err; 403 int i, offs; 404 usb_dma_t dma; 405 406 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 407 408 mutex_enter(&sc->sc_lock); 409 if (sc->sc_freeeds == NULL) { 410 DPRINTFN(2, "allocating chunk", 0, 0, 0, 0); 411 mutex_exit(&sc->sc_lock); 412 413 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 414 OHCI_ED_ALIGN, &dma); 415 if (err) 416 return 0; 417 418 mutex_enter(&sc->sc_lock); 419 for (i = 0; i < OHCI_SED_CHUNK; i++) { 420 offs = i * OHCI_SED_SIZE; 421 sed = KERNADDR(&dma, offs); 422 sed->physaddr = DMAADDR(&dma, offs); 423 sed->dma = dma; 424 sed->offs = offs; 425 sed->next = sc->sc_freeeds; 426 sc->sc_freeeds = sed; 427 } 428 } 429 sed = sc->sc_freeeds; 430 sc->sc_freeeds = sed->next; 431 mutex_exit(&sc->sc_lock); 432 433 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 434 sed->next = 0; 435 return sed; 436 } 437 438 static inline void 439 ohci_free_sed_locked(ohci_softc_t *sc, ohci_soft_ed_t *sed) 440 { 441 442 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 443 444 sed->next = sc->sc_freeeds; 445 sc->sc_freeeds = sed; 446 } 447 448 void 449 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 450 { 451 452 mutex_enter(&sc->sc_lock); 453 ohci_free_sed_locked(sc, sed); 454 mutex_exit(&sc->sc_lock); 455 } 456 457 ohci_soft_td_t * 458 ohci_alloc_std(ohci_softc_t *sc) 459 { 460 ohci_soft_td_t *std; 461 usbd_status err; 462 int i, offs; 463 usb_dma_t dma; 464 465 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 466 467 mutex_enter(&sc->sc_lock); 468 if (sc->sc_freetds == NULL) { 469 DPRINTFN(2, "allocating chunk", 0, 0, 0, 0); 470 mutex_exit(&sc->sc_lock); 471 472 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 473 OHCI_TD_ALIGN, &dma); 474 if (err) 475 return NULL; 476 477 mutex_enter(&sc->sc_lock); 478 for (i = 0; i < OHCI_STD_CHUNK; i++) { 479 offs = i * OHCI_STD_SIZE; 480 std = KERNADDR(&dma, offs); 481 std->physaddr = DMAADDR(&dma, offs); 482 std->dma = dma; 483 std->offs = offs; 484 std->nexttd = sc->sc_freetds; 485 sc->sc_freetds = std; 486 } 487 } 488 489 std = sc->sc_freetds; 490 sc->sc_freetds = std->nexttd; 491 mutex_exit(&sc->sc_lock); 492 493 memset(&std->td, 0, sizeof(ohci_td_t)); 494 std->nexttd = NULL; 495 std->xfer = NULL; 496 497 return std; 498 } 499 500 void 501 ohci_free_std_locked(ohci_softc_t *sc, ohci_soft_td_t *std) 502 { 503 504 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 505 506 std->nexttd = sc->sc_freetds; 507 sc->sc_freetds = std; 508 } 509 510 void 511 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std) 512 { 513 514 mutex_enter(&sc->sc_lock); 515 ohci_free_std_locked(sc, std); 516 mutex_exit(&sc->sc_lock); 517 } 518 519 Static usbd_status 520 ohci_alloc_std_chain(ohci_softc_t *sc, struct usbd_xfer *xfer, int alen, int rd) 521 { 522 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 523 struct usbd_pipe *pipe = xfer->ux_pipe; 524 ohci_soft_td_t *next, *cur; 525 ohci_physaddr_t dataphys, dataphysend; 526 int len = alen; 527 int curlen; 528 usb_dma_t *dma = &xfer->ux_dmabuf; 529 uint16_t flags = xfer->ux_flags; 530 531 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 532 533 DPRINTFN(8, "addr=%d endpt=%d len=%d speed=%d", 534 pipe->up_dev->ud_addr, 535 UE_GET_ADDR(pipe->up_endpoint->ue_edesc->bEndpointAddress), 536 alen, pipe->up_dev->ud_speed); 537 538 ASSERT_SLEEPABLE(); 539 540 size_t nstd = (flags & USBD_FORCE_SHORT_XFER) ? 1 : 0; 541 nstd += ((len + OHCI_PAGE_SIZE - 1) / OHCI_PAGE_SIZE); 542 ox->ox_stds = kmem_zalloc(sizeof(ohci_soft_td_t *) * nstd, 543 KM_SLEEP); 544 ox->ox_nstd = nstd; 545 int mps = UGETW(pipe->up_endpoint->ue_edesc->wMaxPacketSize); 546 547 DPRINTFN(8, "xfer %p nstd %d mps %d", xfer, nstd, mps, 0); 548 549 len = alen; 550 cur = ohci_alloc_std(sc); 551 if (cur == NULL) 552 goto nomem; 553 554 dataphys = DMAADDR(dma, 0); 555 dataphysend = OHCI_PAGE(dataphys + len - 1); 556 const uint32_t tdflags = HTOO32( 557 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 558 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR); 559 560 for (size_t j = 0;;) { 561 ox->ox_stds[j++] = cur; 562 next = ohci_alloc_std(sc); 563 if (next == NULL) 564 goto nomem; 565 566 /* The OHCI hardware can handle at most one page crossing. */ 567 if (OHCI_PAGE(dataphys) == dataphysend || 568 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) { 569 /* we can handle it in this TD */ 570 curlen = len; 571 } else { 572 /* must use multiple TDs, fill as much as possible. */ 573 curlen = 2 * OHCI_PAGE_SIZE - 574 (dataphys & (OHCI_PAGE_SIZE - 1)); 575 /* the length must be a multiple of the max size */ 576 curlen -= curlen % mps; 577 KASSERT(curlen != 0); 578 } 579 DPRINTFN(4, "dataphys=0x%08x dataphysend=0x%08x " 580 "len=%d curlen=%d", dataphys, dataphysend, len, curlen); 581 len -= curlen; 582 583 cur->td.td_flags = tdflags; 584 cur->td.td_cbp = HTOO32(dataphys); 585 cur->td.td_nexttd = HTOO32(next->physaddr); 586 cur->td.td_be = HTOO32(dataphys + curlen - 1); 587 cur->nexttd = next; 588 cur->len = curlen; 589 cur->flags = OHCI_ADD_LEN; 590 cur->xfer = xfer; 591 592 DPRINTFN(10, "cbp=0x%08x be=0x%08x", dataphys, 593 dataphys + curlen - 1, 0, 0); 594 if (len == 0) 595 break; 596 DPRINTFN(10, "extend chain", 0, 0, 0, 0); 597 dataphys += curlen; 598 cur = next; 599 } 600 if (!rd && (flags & USBD_FORCE_SHORT_XFER) && 601 alen % mps == 0) { 602 /* Force a 0 length transfer at the end. */ 603 604 cur = next; 605 next = ohci_alloc_std(sc); 606 if (next == NULL) 607 goto nomem; 608 609 cur->td.td_flags = tdflags; 610 cur->td.td_cbp = 0; /* indicate 0 length packet */ 611 cur->td.td_nexttd = HTOO32(next->physaddr); 612 cur->td.td_be = ~0; 613 cur->nexttd = next; 614 cur->len = 0; 615 cur->flags = 0; 616 cur->xfer = xfer; 617 618 DPRINTFN(2, "add 0 xfer", 0, 0, 0, 0); 619 } 620 621 return USBD_NORMAL_COMPLETION; 622 623 nomem: 624 ohci_free_stds(sc, ox); 625 626 return USBD_NOMEM; 627 } 628 629 Static void 630 ohci_free_stds(ohci_softc_t *sc, struct ohci_xfer *ox) 631 { 632 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 633 DPRINTF("ox=%p", ox, 0, 0, 0); 634 635 mutex_enter(&sc->sc_lock); 636 for (size_t i = 0; i < ox->ox_nstd; i++) { 637 ohci_soft_td_t *std = ox->ox_stds[i]; 638 if (std == NULL) 639 break; 640 ohci_free_std_locked(sc, std); 641 } 642 mutex_exit(&sc->sc_lock); 643 } 644 645 void 646 ohci_reset_std_chain(ohci_softc_t *sc, struct usbd_xfer *xfer, 647 int alen, int rd, ohci_soft_td_t *sp, ohci_soft_td_t **ep) 648 { 649 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 650 ohci_soft_td_t *next, *cur; 651 ohci_physaddr_t dataphys, dataphysend; 652 int len, curlen; 653 usb_dma_t *dma = &xfer->ux_dmabuf; 654 uint16_t flags = xfer->ux_flags; 655 656 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 657 DPRINTF("start len=%d", alen, 0, 0, 0); 658 659 KASSERT(mutex_owned(&sc->sc_lock)); 660 661 DPRINTFN(8, "addr=%d endpt=%d len=%d speed=%d", 662 xfer->ux_pipe->up_dev->ud_addr, 663 UE_GET_ADDR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress), 664 alen, xfer->ux_pipe->up_dev->ud_speed); 665 666 KASSERT(sp); 667 668 int mps = UGETW(xfer->ux_pipe->up_endpoint->ue_edesc->wMaxPacketSize); 669 670 len = alen; 671 cur = sp; 672 673 dataphys = DMAADDR(dma, 0); 674 dataphysend = OHCI_PAGE(dataphys + len - 1); 675 usb_syncmem(dma, 0, len, 676 rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 677 const uint32_t tdflags = HTOO32( 678 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 679 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR); 680 681 for (size_t j = 1;;) { 682 if (j == ox->ox_nstd) 683 next = NULL; 684 else 685 next = ox->ox_stds[j++]; 686 KASSERT(next != cur); 687 688 /* The OHCI hardware can handle at most one page crossing. */ 689 if (OHCI_PAGE(dataphys) == dataphysend || 690 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) { 691 /* we can handle it in this TD */ 692 curlen = len; 693 } else { 694 /* must use multiple TDs, fill as much as possible. */ 695 curlen = 2 * OHCI_PAGE_SIZE - 696 (dataphys & (OHCI_PAGE_SIZE - 1)); 697 /* the length must be a multiple of the max size */ 698 curlen -= curlen % mps; 699 KASSERT(curlen != 0); 700 } 701 DPRINTFN(4, "dataphys=0x%08x dataphysend=0x%08x " 702 "len=%d curlen=%d", dataphys, dataphysend, len, curlen); 703 len -= curlen; 704 705 cur->td.td_flags = tdflags; 706 cur->td.td_cbp = HTOO32(dataphys); 707 cur->td.td_be = HTOO32(dataphys + curlen - 1); 708 cur->td.td_nexttd = (next != NULL) ? HTOO32(next->physaddr) : 0; 709 cur->nexttd = next; 710 cur->len = curlen; 711 cur->flags = OHCI_ADD_LEN; 712 cur->xfer = xfer; 713 ohci_hash_add_td(sc, cur); 714 715 usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td), 716 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 717 DPRINTFN(10, "cbp=0x%08x be=0x%08x", dataphys, 718 dataphys + curlen - 1, 0, 0); 719 if (len == 0) 720 break; 721 KASSERT(next != NULL); 722 DPRINTFN(10, "extend chain", 0, 0, 0, 0); 723 dataphys += curlen; 724 cur = next; 725 } 726 cur->td.td_flags |= 727 (xfer->ux_flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0); 728 729 if (!rd && 730 (flags & USBD_FORCE_SHORT_XFER) && 731 alen % mps == 0) { 732 /* Force a 0 length transfer at the end. */ 733 734 KASSERT(next != NULL); 735 cur = next; 736 737 cur->td.td_flags = tdflags; 738 cur->td.td_cbp = 0; /* indicate 0 length packet */ 739 cur->td.td_nexttd = HTOO32(next->physaddr); 740 cur->td.td_be = ~0; 741 cur->nexttd = NULL; 742 cur->len = 0; 743 cur->flags = 0; 744 cur->xfer = xfer; 745 ohci_hash_add_td(sc, cur); 746 747 usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td), 748 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 749 DPRINTFN(2, "add 0 xfer", 0, 0, 0, 0); 750 } 751 *ep = cur; 752 } 753 754 ohci_soft_itd_t * 755 ohci_alloc_sitd(ohci_softc_t *sc) 756 { 757 ohci_soft_itd_t *sitd; 758 usbd_status err; 759 int i, offs; 760 usb_dma_t dma; 761 762 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 763 764 mutex_enter(&sc->sc_lock); 765 if (sc->sc_freeitds == NULL) { 766 DPRINTFN(2, "allocating chunk", 0, 0, 0, 0); 767 mutex_exit(&sc->sc_lock); 768 769 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK, 770 OHCI_ITD_ALIGN, &dma); 771 if (err) 772 return NULL; 773 mutex_enter(&sc->sc_lock); 774 for (i = 0; i < OHCI_SITD_CHUNK; i++) { 775 offs = i * OHCI_SITD_SIZE; 776 sitd = KERNADDR(&dma, offs); 777 sitd->physaddr = DMAADDR(&dma, offs); 778 sitd->dma = dma; 779 sitd->offs = offs; 780 sitd->nextitd = sc->sc_freeitds; 781 sc->sc_freeitds = sitd; 782 } 783 } 784 785 sitd = sc->sc_freeitds; 786 sc->sc_freeitds = sitd->nextitd; 787 mutex_exit(&sc->sc_lock); 788 789 memset(&sitd->itd, 0, sizeof(ohci_itd_t)); 790 sitd->nextitd = NULL; 791 sitd->xfer = NULL; 792 793 #ifdef DIAGNOSTIC 794 sitd->isdone = true; 795 #endif 796 797 return sitd; 798 } 799 800 Static void 801 ohci_free_sitd_locked(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 802 { 803 804 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 805 DPRINTFN(10, "sitd=%p", sitd, 0, 0, 0); 806 807 KASSERT(sitd->isdone); 808 #ifdef DIAGNOSTIC 809 /* Warn double free */ 810 sitd->isdone = false; 811 #endif 812 813 sitd->nextitd = sc->sc_freeitds; 814 sc->sc_freeitds = sitd; 815 } 816 817 void 818 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 819 { 820 821 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 822 823 mutex_enter(&sc->sc_lock); 824 ohci_free_sitd_locked(sc, sitd); 825 mutex_exit(&sc->sc_lock); 826 } 827 828 int 829 ohci_init(ohci_softc_t *sc) 830 { 831 ohci_soft_ed_t *sed, *psed; 832 usbd_status err; 833 int i; 834 uint32_t s, ctl, rwc, ival, hcr, fm, per, rev, desca /*, descb */; 835 836 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 837 838 aprint_normal_dev(sc->sc_dev, ""); 839 840 sc->sc_hcca = NULL; 841 callout_init(&sc->sc_tmo_rhsc, CALLOUT_MPSAFE); 842 843 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_SOFTUSB); 844 mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_USB); 845 cv_init(&sc->sc_softwake_cv, "ohciab"); 846 847 sc->sc_rhsc_si = softint_establish(SOFTINT_NET | SOFTINT_MPSAFE, 848 ohci_rhsc_softint, sc); 849 850 for (i = 0; i < OHCI_HASH_SIZE; i++) 851 LIST_INIT(&sc->sc_hash_tds[i]); 852 for (i = 0; i < OHCI_HASH_SIZE; i++) 853 LIST_INIT(&sc->sc_hash_itds[i]); 854 855 sc->sc_xferpool = pool_cache_init(sizeof(struct ohci_xfer), 0, 0, 0, 856 "ohcixfer", NULL, IPL_USB, NULL, NULL, NULL); 857 858 rev = OREAD4(sc, OHCI_REVISION); 859 aprint_normal("OHCI version %d.%d%s\n", 860 OHCI_REV_HI(rev), OHCI_REV_LO(rev), 861 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 862 863 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 864 aprint_error_dev(sc->sc_dev, "unsupported OHCI revision\n"); 865 sc->sc_bus.ub_revision = USBREV_UNKNOWN; 866 return -1; 867 } 868 sc->sc_bus.ub_revision = USBREV_1_0; 869 sc->sc_bus.ub_usedma = true; 870 871 /* XXX determine alignment by R/W */ 872 /* Allocate the HCCA area. */ 873 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 874 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 875 if (err) { 876 sc->sc_hcca = NULL; 877 return err; 878 } 879 sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0); 880 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 881 882 sc->sc_eintrs = OHCI_NORMAL_INTRS; 883 884 /* Allocate dummy ED that starts the control list. */ 885 sc->sc_ctrl_head = ohci_alloc_sed(sc); 886 if (sc->sc_ctrl_head == NULL) { 887 err = ENOMEM; 888 goto bad1; 889 } 890 sc->sc_ctrl_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 891 892 /* Allocate dummy ED that starts the bulk list. */ 893 sc->sc_bulk_head = ohci_alloc_sed(sc); 894 if (sc->sc_bulk_head == NULL) { 895 err = ENOMEM; 896 goto bad2; 897 } 898 sc->sc_bulk_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 899 usb_syncmem(&sc->sc_bulk_head->dma, sc->sc_bulk_head->offs, 900 sizeof(sc->sc_bulk_head->ed), 901 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 902 903 /* Allocate dummy ED that starts the isochronous list. */ 904 sc->sc_isoc_head = ohci_alloc_sed(sc); 905 if (sc->sc_isoc_head == NULL) { 906 err = ENOMEM; 907 goto bad3; 908 } 909 sc->sc_isoc_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 910 usb_syncmem(&sc->sc_isoc_head->dma, sc->sc_isoc_head->offs, 911 sizeof(sc->sc_isoc_head->ed), 912 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 913 914 /* Allocate all the dummy EDs that make up the interrupt tree. */ 915 for (i = 0; i < OHCI_NO_EDS; i++) { 916 sed = ohci_alloc_sed(sc); 917 if (sed == NULL) { 918 while (--i >= 0) 919 ohci_free_sed(sc, sc->sc_eds[i]); 920 err = ENOMEM; 921 goto bad4; 922 } 923 /* All ED fields are set to 0. */ 924 sc->sc_eds[i] = sed; 925 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 926 if (i != 0) 927 psed = sc->sc_eds[(i-1) / 2]; 928 else 929 psed= sc->sc_isoc_head; 930 sed->next = psed; 931 sed->ed.ed_nexted = HTOO32(psed->physaddr); 932 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 933 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 934 } 935 /* 936 * Fill HCCA interrupt table. The bit reversal is to get 937 * the tree set up properly to spread the interrupts. 938 */ 939 for (i = 0; i < OHCI_NO_INTRS; i++) 940 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 941 HTOO32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 942 usb_syncmem(&sc->sc_hccadma, 0, OHCI_HCCA_SIZE, 943 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 944 945 #ifdef OHCI_DEBUG 946 DPRINTFN(15, "--- dump start ---", 0, 0, 0 ,0); 947 if (ohcidebug >= 15) { 948 for (i = 0; i < OHCI_NO_EDS; i++) { 949 DPRINTFN(15, "ed#%d ", i, 0, 0, 0); 950 ohci_dump_ed(sc, sc->sc_eds[i]); 951 } 952 DPRINTFN(15, "iso", 0, 0, 0 ,0); 953 ohci_dump_ed(sc, sc->sc_isoc_head); 954 } 955 DPRINTFN(15, "--- dump end ---", 0, 0, 0 ,0); 956 #endif 957 958 /* Preserve values programmed by SMM/BIOS but lost over reset. */ 959 ctl = OREAD4(sc, OHCI_CONTROL); 960 rwc = ctl & OHCI_RWC; 961 fm = OREAD4(sc, OHCI_FM_INTERVAL); 962 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 963 /* descb = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); */ 964 965 /* Determine in what context we are running. */ 966 if (ctl & OHCI_IR) { 967 /* SMM active, request change */ 968 DPRINTF("SMM active, request owner change", 0, 0, 0, 0); 969 if ((sc->sc_intre & (OHCI_OC | OHCI_MIE)) == 970 (OHCI_OC | OHCI_MIE)) 971 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_MIE); 972 s = OREAD4(sc, OHCI_COMMAND_STATUS); 973 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 974 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 975 usb_delay_ms(&sc->sc_bus, 1); 976 ctl = OREAD4(sc, OHCI_CONTROL); 977 } 978 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_MIE); 979 if ((ctl & OHCI_IR) == 0) { 980 aprint_error_dev(sc->sc_dev, 981 "SMM does not respond, resetting\n"); 982 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 983 goto reset; 984 } 985 #if 0 986 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */ 987 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 988 /* BIOS started controller. */ 989 DPRINTF("BIOS active", 0, 0, 0, 0); 990 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 991 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL | rwc); 992 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 993 } 994 #endif 995 } else { 996 DPRINTF("cold started", 0 ,0 ,0 ,0); 997 reset: 998 /* Controller was cold started. */ 999 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 1000 } 1001 1002 /* 1003 * This reset should not be necessary according to the OHCI spec, but 1004 * without it some controllers do not start. 1005 */ 1006 DPRINTF("sc %p: resetting", sc, 0, 0, 0); 1007 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 1008 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 1009 1010 /* We now own the host controller and the bus has been reset. */ 1011 1012 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 1013 /* Nominal time for a reset is 10 us. */ 1014 for (i = 0; i < 10; i++) { 1015 delay(10); 1016 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 1017 if (!hcr) 1018 break; 1019 } 1020 if (hcr) { 1021 aprint_error_dev(sc->sc_dev, "reset timeout\n"); 1022 err = EIO; 1023 goto bad5; 1024 } 1025 #ifdef OHCI_DEBUG 1026 if (ohcidebug >= 15) 1027 ohci_dumpregs(sc); 1028 #endif 1029 1030 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 1031 1032 /* Set up HC registers. */ 1033 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 1034 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 1035 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 1036 /* disable all interrupts and then switch on all desired interrupts */ 1037 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 1038 /* switch on desired functional features */ 1039 ctl = OREAD4(sc, OHCI_CONTROL); 1040 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 1041 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 1042 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL | rwc; 1043 /* And finally start it! */ 1044 OWRITE4(sc, OHCI_CONTROL, ctl); 1045 1046 /* 1047 * The controller is now OPERATIONAL. Set a some final 1048 * registers that should be set earlier, but that the 1049 * controller ignores when in the SUSPEND state. 1050 */ 1051 ival = OHCI_GET_IVAL(fm); 1052 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 1053 fm |= OHCI_FSMPS(ival) | ival; 1054 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 1055 per = OHCI_PERIODIC(ival); /* 90% periodic */ 1056 OWRITE4(sc, OHCI_PERIODIC_START, per); 1057 1058 if (sc->sc_flags & OHCIF_SUPERIO) { 1059 /* no overcurrent protection */ 1060 desca |= OHCI_NOCP; 1061 /* 1062 * Clear NoPowerSwitching and PowerOnToPowerGoodTime meaning 1063 * that 1064 * - ports are always power switched 1065 * - don't wait for powered root hub port 1066 */ 1067 desca &= ~(__SHIFTIN(0xff, OHCI_POTPGT_MASK) | OHCI_NPS); 1068 } 1069 1070 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */ 1071 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP); 1072 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 1073 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY); 1074 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca); 1075 1076 /* 1077 * The AMD756 requires a delay before re-reading the register, 1078 * otherwise it will occasionally report 0 ports. 1079 */ 1080 sc->sc_noport = 0; 1081 for (i = 0; i < 10 && sc->sc_noport == 0; i++) { 1082 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY); 1083 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 1084 } 1085 1086 #ifdef OHCI_DEBUG 1087 if (ohcidebug >= 5) 1088 ohci_dumpregs(sc); 1089 #endif 1090 1091 /* Set up the bus struct. */ 1092 sc->sc_bus.ub_methods = &ohci_bus_methods; 1093 sc->sc_bus.ub_pipesize = sizeof(struct ohci_pipe); 1094 1095 sc->sc_control = sc->sc_intre = 0; 1096 1097 /* Finally, turn on interrupts. */ 1098 DPRINTF("enabling %#x", sc->sc_eintrs | OHCI_MIE, 0, 0, 0); 1099 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 1100 1101 return 0; 1102 1103 bad5: 1104 for (i = 0; i < OHCI_NO_EDS; i++) 1105 ohci_free_sed(sc, sc->sc_eds[i]); 1106 bad4: 1107 ohci_free_sed(sc, sc->sc_isoc_head); 1108 bad3: 1109 ohci_free_sed(sc, sc->sc_bulk_head); 1110 bad2: 1111 ohci_free_sed(sc, sc->sc_ctrl_head); 1112 bad1: 1113 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 1114 sc->sc_hcca = NULL; 1115 return err; 1116 } 1117 1118 struct usbd_xfer * 1119 ohci_allocx(struct usbd_bus *bus, unsigned int nframes) 1120 { 1121 ohci_softc_t *sc = OHCI_BUS2SC(bus); 1122 struct usbd_xfer *xfer; 1123 1124 xfer = pool_cache_get(sc->sc_xferpool, PR_NOWAIT); 1125 if (xfer != NULL) { 1126 memset(xfer, 0, sizeof(struct ohci_xfer)); 1127 #ifdef DIAGNOSTIC 1128 xfer->ux_state = XFER_BUSY; 1129 #endif 1130 } 1131 return xfer; 1132 } 1133 1134 void 1135 ohci_freex(struct usbd_bus *bus, struct usbd_xfer *xfer) 1136 { 1137 ohci_softc_t *sc = OHCI_BUS2SC(bus); 1138 1139 KASSERTMSG(xfer->ux_state == XFER_BUSY, 1140 "xfer=%p not busy, 0x%08x\n", xfer, xfer->ux_state); 1141 #ifdef DIAGNOSTIC 1142 xfer->ux_state = XFER_FREE; 1143 #endif 1144 pool_cache_put(sc->sc_xferpool, xfer); 1145 } 1146 1147 Static void 1148 ohci_get_lock(struct usbd_bus *bus, kmutex_t **lock) 1149 { 1150 ohci_softc_t *sc = OHCI_BUS2SC(bus); 1151 1152 *lock = &sc->sc_lock; 1153 } 1154 1155 /* 1156 * Shut down the controller when the system is going down. 1157 */ 1158 bool 1159 ohci_shutdown(device_t self, int flags) 1160 { 1161 ohci_softc_t *sc = device_private(self); 1162 1163 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1164 1165 DPRINTF("stopping the HC", 0, 0, 0, 0); 1166 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1167 return true; 1168 } 1169 1170 bool 1171 ohci_resume(device_t dv, const pmf_qual_t *qual) 1172 { 1173 ohci_softc_t *sc = device_private(dv); 1174 uint32_t ctl; 1175 1176 mutex_spin_enter(&sc->sc_intr_lock); 1177 sc->sc_bus.ub_usepolling++; 1178 mutex_spin_exit(&sc->sc_intr_lock); 1179 1180 /* Some broken BIOSes do not recover these values */ 1181 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 1182 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, 1183 sc->sc_ctrl_head->physaddr); 1184 OWRITE4(sc, OHCI_BULK_HEAD_ED, 1185 sc->sc_bulk_head->physaddr); 1186 if (sc->sc_intre) 1187 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_intre & 1188 (OHCI_ALL_INTRS | OHCI_MIE)); 1189 if (sc->sc_control) 1190 ctl = sc->sc_control; 1191 else 1192 ctl = OREAD4(sc, OHCI_CONTROL); 1193 ctl |= OHCI_HCFS_RESUME; 1194 OWRITE4(sc, OHCI_CONTROL, ctl); 1195 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 1196 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL; 1197 OWRITE4(sc, OHCI_CONTROL, ctl); 1198 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 1199 sc->sc_control = sc->sc_intre = 0; 1200 1201 mutex_spin_enter(&sc->sc_intr_lock); 1202 sc->sc_bus.ub_usepolling--; 1203 mutex_spin_exit(&sc->sc_intr_lock); 1204 1205 return true; 1206 } 1207 1208 bool 1209 ohci_suspend(device_t dv, const pmf_qual_t *qual) 1210 { 1211 ohci_softc_t *sc = device_private(dv); 1212 uint32_t ctl; 1213 1214 mutex_spin_enter(&sc->sc_intr_lock); 1215 sc->sc_bus.ub_usepolling++; 1216 mutex_spin_exit(&sc->sc_intr_lock); 1217 1218 ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK; 1219 if (sc->sc_control == 0) { 1220 /* 1221 * Preserve register values, in case that BIOS 1222 * does not recover them. 1223 */ 1224 sc->sc_control = ctl; 1225 sc->sc_intre = OREAD4(sc, 1226 OHCI_INTERRUPT_ENABLE); 1227 } 1228 ctl |= OHCI_HCFS_SUSPEND; 1229 OWRITE4(sc, OHCI_CONTROL, ctl); 1230 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1231 1232 mutex_spin_enter(&sc->sc_intr_lock); 1233 sc->sc_bus.ub_usepolling--; 1234 mutex_spin_exit(&sc->sc_intr_lock); 1235 1236 return true; 1237 } 1238 1239 #ifdef OHCI_DEBUG 1240 void 1241 ohci_dumpregs(ohci_softc_t *sc) 1242 { 1243 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1244 1245 DPRINTF("rev=0x%08x control=0x%08x command=0x%08x", 1246 OREAD4(sc, OHCI_REVISION), 1247 OREAD4(sc, OHCI_CONTROL), 1248 OREAD4(sc, OHCI_COMMAND_STATUS), 0); 1249 DPRINTF(" intrstat=0x%08x intre=0x%08x intrd=0x%08x", 1250 OREAD4(sc, OHCI_INTERRUPT_STATUS), 1251 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 1252 OREAD4(sc, OHCI_INTERRUPT_DISABLE), 0); 1253 DPRINTF(" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x", 1254 OREAD4(sc, OHCI_HCCA), 1255 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 1256 OREAD4(sc, OHCI_CONTROL_HEAD_ED), 0); 1257 DPRINTF(" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x", 1258 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 1259 OREAD4(sc, OHCI_BULK_HEAD_ED), 1260 OREAD4(sc, OHCI_BULK_CURRENT_ED) ,0); 1261 DPRINTF(" done=0x%08x fmival=0x%08x fmrem=0x%08x", 1262 OREAD4(sc, OHCI_DONE_HEAD), 1263 OREAD4(sc, OHCI_FM_INTERVAL), 1264 OREAD4(sc, OHCI_FM_REMAINING), 0); 1265 DPRINTF(" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x", 1266 OREAD4(sc, OHCI_FM_NUMBER), 1267 OREAD4(sc, OHCI_PERIODIC_START), 1268 OREAD4(sc, OHCI_LS_THRESHOLD), 0); 1269 DPRINTF(" desca=0x%08x descb=0x%08x stat=0x%08x", 1270 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 1271 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 1272 OREAD4(sc, OHCI_RH_STATUS), 0); 1273 DPRINTF(" port1=0x%08x port2=0x%08x", 1274 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 1275 OREAD4(sc, OHCI_RH_PORT_STATUS(2)), 0, 0); 1276 DPRINTF(" HCCA: frame_number=0x%04x done_head=0x%08x", 1277 O32TOH(sc->sc_hcca->hcca_frame_number), 1278 O32TOH(sc->sc_hcca->hcca_done_head), 0, 0); 1279 } 1280 #endif 1281 1282 Static int ohci_intr1(ohci_softc_t *); 1283 1284 int 1285 ohci_intr(void *p) 1286 { 1287 ohci_softc_t *sc = p; 1288 int ret = 0; 1289 1290 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1291 1292 if (sc == NULL) 1293 return 0; 1294 1295 mutex_spin_enter(&sc->sc_intr_lock); 1296 1297 if (sc->sc_dying || !device_has_power(sc->sc_dev)) 1298 goto done; 1299 1300 /* If we get an interrupt while polling, then just ignore it. */ 1301 if (sc->sc_bus.ub_usepolling) { 1302 DPRINTFN(16, "ignored interrupt while polling", 0, 0, 0, 0); 1303 /* for level triggered intrs, should do something to ack */ 1304 OWRITE4(sc, OHCI_INTERRUPT_STATUS, 1305 OREAD4(sc, OHCI_INTERRUPT_STATUS)); 1306 1307 goto done; 1308 } 1309 1310 ret = ohci_intr1(sc); 1311 1312 done: 1313 mutex_spin_exit(&sc->sc_intr_lock); 1314 return ret; 1315 } 1316 1317 Static int 1318 ohci_intr1(ohci_softc_t *sc) 1319 { 1320 uint32_t intrs, eintrs; 1321 1322 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1323 1324 /* In case the interrupt occurs before initialization has completed. */ 1325 if (sc == NULL || sc->sc_hcca == NULL) { 1326 #ifdef DIAGNOSTIC 1327 printf("ohci_intr: sc->sc_hcca == NULL\n"); 1328 #endif 1329 return 0; 1330 } 1331 1332 KASSERT(mutex_owned(&sc->sc_intr_lock)); 1333 1334 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1335 if (!intrs) 1336 return 0; 1337 1338 /* Acknowledge */ 1339 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs & ~(OHCI_MIE|OHCI_WDH)); 1340 eintrs = intrs & sc->sc_eintrs; 1341 DPRINTFN(7, "sc=%p", sc, 0, 0, 0); 1342 DPRINTFN(7, "intrs=%#x(%#x) eintrs=%#x(%#x)", 1343 intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), eintrs, 1344 sc->sc_eintrs); 1345 1346 if (!eintrs) { 1347 return 0; 1348 } 1349 1350 if (eintrs & OHCI_SO) { 1351 sc->sc_overrun_cnt++; 1352 if (usbd_ratecheck(&sc->sc_overrun_ntc)) { 1353 printf("%s: %u scheduling overruns\n", 1354 device_xname(sc->sc_dev), sc->sc_overrun_cnt); 1355 sc->sc_overrun_cnt = 0; 1356 } 1357 /* XXX do what */ 1358 eintrs &= ~OHCI_SO; 1359 } 1360 if (eintrs & OHCI_WDH) { 1361 /* 1362 * We block the interrupt below, and reenable it later from 1363 * ohci_softintr(). 1364 */ 1365 usb_schedsoftintr(&sc->sc_bus); 1366 } 1367 if (eintrs & OHCI_RD) { 1368 DPRINTFN(5, "resume detect", sc, 0, 0, 0); 1369 printf("%s: resume detect\n", device_xname(sc->sc_dev)); 1370 /* XXX process resume detect */ 1371 } 1372 if (eintrs & OHCI_UE) { 1373 DPRINTFN(5, "unrecoverable error", sc, 0, 0, 0); 1374 printf("%s: unrecoverable error, controller halted\n", 1375 device_xname(sc->sc_dev)); 1376 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1377 /* XXX what else */ 1378 } 1379 if (eintrs & OHCI_RHSC) { 1380 /* 1381 * We block the interrupt below, and reenable it later from 1382 * a timeout. 1383 */ 1384 softint_schedule(sc->sc_rhsc_si); 1385 } 1386 1387 if (eintrs != 0) { 1388 /* Block unprocessed interrupts. */ 1389 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs); 1390 sc->sc_eintrs &= ~eintrs; 1391 DPRINTF("sc %p blocking intrs 0x%x", sc, eintrs, 0, 0); 1392 } 1393 1394 return 1; 1395 } 1396 1397 void 1398 ohci_rhsc_enable(void *v_sc) 1399 { 1400 ohci_softc_t *sc = v_sc; 1401 1402 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1403 DPRINTF("sc %p", sc, 0, 0, 0); 1404 mutex_spin_enter(&sc->sc_intr_lock); 1405 sc->sc_eintrs |= OHCI_RHSC; 1406 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1407 mutex_spin_exit(&sc->sc_intr_lock); 1408 } 1409 1410 #ifdef OHCI_DEBUG 1411 const char *ohci_cc_strs[] = { 1412 "NO_ERROR", 1413 "CRC", 1414 "BIT_STUFFING", 1415 "DATA_TOGGLE_MISMATCH", 1416 "STALL", 1417 "DEVICE_NOT_RESPONDING", 1418 "PID_CHECK_FAILURE", 1419 "UNEXPECTED_PID", 1420 "DATA_OVERRUN", 1421 "DATA_UNDERRUN", 1422 "BUFFER_OVERRUN", 1423 "BUFFER_UNDERRUN", 1424 "reserved", 1425 "reserved", 1426 "NOT_ACCESSED", 1427 "NOT_ACCESSED", 1428 }; 1429 #endif 1430 1431 void 1432 ohci_softintr(void *v) 1433 { 1434 struct usbd_bus *bus = v; 1435 ohci_softc_t *sc = OHCI_BUS2SC(bus); 1436 ohci_soft_itd_t *sitd, *sidone, *sitdnext; 1437 ohci_soft_td_t *std, *sdone, *stdnext; 1438 struct usbd_xfer *xfer; 1439 struct ohci_pipe *opipe; 1440 int len, cc; 1441 int i, j, actlen, iframes, uedir; 1442 ohci_physaddr_t done; 1443 1444 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1445 1446 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1447 1448 usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head), 1449 sizeof(sc->sc_hcca->hcca_done_head), 1450 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1451 done = O32TOH(sc->sc_hcca->hcca_done_head) & ~OHCI_DONE_INTRS; 1452 sc->sc_hcca->hcca_done_head = 0; 1453 usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head), 1454 sizeof(sc->sc_hcca->hcca_done_head), 1455 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1456 OWRITE4(sc, OHCI_INTERRUPT_STATUS, OHCI_WDH); 1457 sc->sc_eintrs |= OHCI_WDH; 1458 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_WDH); 1459 1460 /* Reverse the done list. */ 1461 for (sdone = NULL, sidone = NULL; done != 0; ) { 1462 std = ohci_hash_find_td(sc, done); 1463 if (std != NULL) { 1464 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 1465 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1466 std->dnext = sdone; 1467 done = O32TOH(std->td.td_nexttd); 1468 sdone = std; 1469 DPRINTFN(10, "add TD %p", std, 0, 0, 0); 1470 continue; 1471 } 1472 sitd = ohci_hash_find_itd(sc, done); 1473 if (sitd != NULL) { 1474 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 1475 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1476 sitd->dnext = sidone; 1477 done = O32TOH(sitd->itd.itd_nextitd); 1478 sidone = sitd; 1479 DPRINTFN(5, "add ITD %p", sitd, 0, 0, 0); 1480 continue; 1481 } 1482 DPRINTFN(10, "addr %p not found", done, 0, 0, 0); 1483 device_printf(sc->sc_dev, "WARNING: addr 0x%08lx not found\n", 1484 (u_long)done); 1485 break; 1486 } 1487 1488 DPRINTFN(10, "sdone=%p sidone=%p", sdone, sidone, 0, 0); 1489 DPRINTFN(10, "--- TD dump start ---", 0, 0, 0, 0); 1490 #ifdef OHCI_DEBUG 1491 if (ohcidebug >= 10) { 1492 for (std = sdone; std; std = std->dnext) 1493 ohci_dump_td(sc, std); 1494 } 1495 #endif 1496 DPRINTFN(10, "--- TD dump end ---", 0, 0, 0, 0); 1497 1498 for (std = sdone; std; std = stdnext) { 1499 xfer = std->xfer; 1500 stdnext = std->dnext; 1501 DPRINTFN(10, "std=%p xfer=%p hcpriv=%p", std, xfer, 1502 xfer ? xfer->ux_hcpriv : 0, 0); 1503 if (xfer == NULL) { 1504 /* 1505 * xfer == NULL: There seems to be no xfer associated 1506 * with this TD. It is tailp that happened to end up on 1507 * the done queue. 1508 * Shouldn't happen, but some chips are broken(?). 1509 */ 1510 continue; 1511 } 1512 if (xfer->ux_status == USBD_CANCELLED || 1513 xfer->ux_status == USBD_TIMEOUT) { 1514 DPRINTF("cancel/timeout %p", xfer, 0, 0, 0); 1515 /* Handled by abort routine. */ 1516 continue; 1517 } 1518 callout_stop(&xfer->ux_callout); 1519 1520 len = std->len; 1521 if (std->td.td_cbp != 0) 1522 len -= O32TOH(std->td.td_be) - 1523 O32TOH(std->td.td_cbp) + 1; 1524 DPRINTFN(10, "len=%d, flags=0x%x", len, std->flags, 0, 0); 1525 if (std->flags & OHCI_ADD_LEN) 1526 xfer->ux_actlen += len; 1527 1528 cc = OHCI_TD_GET_CC(O32TOH(std->td.td_flags)); 1529 if (cc == OHCI_CC_NO_ERROR) { 1530 ohci_hash_rem_td(sc, std); 1531 if (std->flags & OHCI_CALL_DONE) { 1532 xfer->ux_status = USBD_NORMAL_COMPLETION; 1533 usb_transfer_complete(xfer); 1534 } 1535 } else { 1536 /* 1537 * Endpoint is halted. First unlink all the TDs 1538 * belonging to the failed transfer, and then restart 1539 * the endpoint. 1540 */ 1541 ohci_soft_td_t *p, *n; 1542 opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 1543 1544 DPRINTFN(10, "error cc=%d", cc, 0, 0, 0); 1545 1546 /* remove xfer's TDs from the hash */ 1547 for (p = std; p->xfer == xfer; p = n) { 1548 n = p->nexttd; 1549 ohci_hash_rem_td(sc, p); 1550 } 1551 1552 ohci_soft_ed_t *sed = opipe->sed; 1553 1554 /* clear halt and TD chain */ 1555 sed->ed.ed_headp = HTOO32(p->physaddr); 1556 usb_syncmem(&sed->dma, 1557 sed->offs + offsetof(ohci_ed_t, ed_headp), 1558 sizeof(sed->ed.ed_headp), 1559 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1560 1561 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1562 1563 if (cc == OHCI_CC_DATA_UNDERRUN) 1564 xfer->ux_status = USBD_NORMAL_COMPLETION; 1565 else if (cc == OHCI_CC_STALL) 1566 xfer->ux_status = USBD_STALLED; 1567 else 1568 xfer->ux_status = USBD_IOERROR; 1569 usb_transfer_complete(xfer); 1570 } 1571 } 1572 DPRINTFN(10, "--- ITD dump start ---", 0, 0, 0, 0); 1573 #ifdef OHCI_DEBUG 1574 if (ohcidebug >= 10) { 1575 for (sitd = sidone; sitd; sitd = sitd->dnext) 1576 ohci_dump_itd(sc, sitd); 1577 } 1578 #endif 1579 DPRINTFN(10, "--- ITD dump end ---", 0, 0, 0, 0); 1580 1581 for (sitd = sidone; sitd != NULL; sitd = sitdnext) { 1582 xfer = sitd->xfer; 1583 sitdnext = sitd->dnext; 1584 DPRINTFN(1, "sitd=%p xfer=%p hcpriv=%p", sitd, xfer, 1585 xfer ? xfer->ux_hcpriv : 0, 0); 1586 if (xfer == NULL) 1587 continue; 1588 if (xfer->ux_status == USBD_CANCELLED || 1589 xfer->ux_status == USBD_TIMEOUT) { 1590 DPRINTF("cancel/timeout %p", xfer, 0, 0, 0); 1591 /* Handled by abort routine. */ 1592 continue; 1593 } 1594 KASSERT(!sitd->isdone); 1595 #ifdef DIAGNOSTIC 1596 sitd->isdone = true; 1597 #endif 1598 if (sitd->flags & OHCI_CALL_DONE) { 1599 ohci_soft_itd_t *next; 1600 1601 opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 1602 opipe->isoc.inuse -= xfer->ux_nframes; 1603 uedir = UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc-> 1604 bEndpointAddress); 1605 xfer->ux_status = USBD_NORMAL_COMPLETION; 1606 actlen = 0; 1607 for (i = 0, sitd = xfer->ux_hcpriv;; 1608 sitd = next) { 1609 next = sitd->nextitd; 1610 if (OHCI_ITD_GET_CC(O32TOH(sitd-> 1611 itd.itd_flags)) != OHCI_CC_NO_ERROR) 1612 xfer->ux_status = USBD_IOERROR; 1613 /* For input, update frlengths with actual */ 1614 /* XXX anything necessary for output? */ 1615 if (uedir == UE_DIR_IN && 1616 xfer->ux_status == USBD_NORMAL_COMPLETION) { 1617 iframes = OHCI_ITD_GET_FC(O32TOH( 1618 sitd->itd.itd_flags)); 1619 for (j = 0; j < iframes; i++, j++) { 1620 len = O16TOH(sitd-> 1621 itd.itd_offset[j]); 1622 if ((OHCI_ITD_PSW_GET_CC(len) & 1623 OHCI_CC_NOT_ACCESSED_MASK) 1624 == OHCI_CC_NOT_ACCESSED) 1625 len = 0; 1626 else 1627 len = OHCI_ITD_PSW_LENGTH(len); 1628 xfer->ux_frlengths[i] = len; 1629 actlen += len; 1630 } 1631 } 1632 if (sitd->flags & OHCI_CALL_DONE) 1633 break; 1634 ohci_hash_rem_itd(sc, sitd); 1635 1636 } 1637 ohci_hash_rem_itd(sc, sitd); 1638 if (uedir == UE_DIR_IN && 1639 xfer->ux_status == USBD_NORMAL_COMPLETION) 1640 xfer->ux_actlen = actlen; 1641 xfer->ux_hcpriv = NULL; 1642 1643 usb_transfer_complete(xfer); 1644 } 1645 } 1646 1647 if (sc->sc_softwake) { 1648 sc->sc_softwake = 0; 1649 cv_broadcast(&sc->sc_softwake_cv); 1650 } 1651 1652 DPRINTFN(10, "done", 0, 0, 0, 0); 1653 } 1654 1655 void 1656 ohci_device_ctrl_done(struct usbd_xfer *xfer) 1657 { 1658 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 1659 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 1660 int len = UGETW(xfer->ux_request.wLength); 1661 int isread = (xfer->ux_request.bmRequestType & UT_READ); 1662 1663 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1664 DPRINTFN(10, "xfer=%p", xfer, 0, 0, 0); 1665 1666 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1667 KASSERT(xfer->ux_rqflags & URQ_REQUEST); 1668 1669 if (len) 1670 usb_syncmem(&xfer->ux_dmabuf, 0, len, 1671 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1672 usb_syncmem(&opipe->ctrl.reqdma, 0, 1673 sizeof(usb_device_request_t), BUS_DMASYNC_POSTWRITE); 1674 } 1675 1676 void 1677 ohci_device_intr_done(struct usbd_xfer *xfer) 1678 { 1679 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 1680 int isread = 1681 (UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress) == UE_DIR_IN); 1682 1683 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1684 DPRINTFN(10, "xfer=%p, actlen=%d", xfer, xfer->ux_actlen, 0, 0); 1685 1686 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1687 1688 usb_syncmem(&xfer->ux_dmabuf, 0, xfer->ux_length, 1689 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1690 } 1691 1692 void 1693 ohci_device_bulk_done(struct usbd_xfer *xfer) 1694 { 1695 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 1696 1697 int isread = 1698 (UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress) == UE_DIR_IN); 1699 1700 KASSERT(mutex_owned(&sc->sc_lock)); 1701 1702 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1703 DPRINTFN(10, "xfer=%p, actlen=%d", xfer, xfer->ux_actlen, 0, 0); 1704 usb_syncmem(&xfer->ux_dmabuf, 0, xfer->ux_length, 1705 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1706 } 1707 1708 Static void 1709 ohci_rhsc_softint(void *arg) 1710 { 1711 ohci_softc_t *sc = arg; 1712 1713 mutex_enter(&sc->sc_lock); 1714 1715 ohci_rhsc(sc, sc->sc_intrxfer); 1716 1717 /* Do not allow RHSC interrupts > 1 per second */ 1718 callout_reset(&sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc); 1719 1720 mutex_exit(&sc->sc_lock); 1721 } 1722 1723 void 1724 ohci_rhsc(ohci_softc_t *sc, struct usbd_xfer *xfer) 1725 { 1726 u_char *p; 1727 int i, m; 1728 int hstatus __unused; 1729 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1730 1731 KASSERT(mutex_owned(&sc->sc_lock)); 1732 1733 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1734 DPRINTF("sc=%p xfer=%p hstatus=0x%08x", sc, xfer, hstatus, 0); 1735 1736 if (xfer == NULL) { 1737 /* Just ignore the change. */ 1738 return; 1739 } 1740 1741 p = xfer->ux_buf; 1742 m = min(sc->sc_noport, xfer->ux_length * 8 - 1); 1743 memset(p, 0, xfer->ux_length); 1744 for (i = 1; i <= m; i++) { 1745 /* Pick out CHANGE bits from the status reg. */ 1746 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1747 p[i/8] |= 1 << (i%8); 1748 } 1749 DPRINTF("change=0x%02x", *p, 0, 0, 0); 1750 xfer->ux_actlen = xfer->ux_length; 1751 xfer->ux_status = USBD_NORMAL_COMPLETION; 1752 1753 usb_transfer_complete(xfer); 1754 } 1755 1756 void 1757 ohci_root_intr_done(struct usbd_xfer *xfer) 1758 { 1759 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 1760 1761 KASSERT(mutex_owned(&sc->sc_lock)); 1762 1763 KASSERT(sc->sc_intrxfer == xfer); 1764 sc->sc_intrxfer = NULL; 1765 } 1766 1767 /* 1768 * Wait here until controller claims to have an interrupt. 1769 * Then call ohci_intr and return. Use timeout to avoid waiting 1770 * too long. 1771 */ 1772 void 1773 ohci_waitintr(ohci_softc_t *sc, struct usbd_xfer *xfer) 1774 { 1775 int timo; 1776 uint32_t intrs; 1777 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1778 1779 mutex_enter(&sc->sc_lock); 1780 1781 xfer->ux_status = USBD_IN_PROGRESS; 1782 for (timo = xfer->ux_timeout; timo >= 0; timo--) { 1783 usb_delay_ms(&sc->sc_bus, 1); 1784 if (sc->sc_dying) 1785 break; 1786 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 1787 DPRINTFN(15, "intrs 0x%04x", intrs, 0, 0, 0); 1788 #ifdef OHCI_DEBUG 1789 if (ohcidebug > 15) 1790 ohci_dumpregs(sc); 1791 #endif 1792 if (intrs) { 1793 mutex_spin_enter(&sc->sc_intr_lock); 1794 ohci_intr1(sc); 1795 mutex_spin_exit(&sc->sc_intr_lock); 1796 if (xfer->ux_status != USBD_IN_PROGRESS) 1797 goto done; 1798 } 1799 } 1800 1801 /* Timeout */ 1802 DPRINTF("timeout", 0, 0, 0, 0); 1803 xfer->ux_status = USBD_TIMEOUT; 1804 usb_transfer_complete(xfer); 1805 1806 done: 1807 mutex_exit(&sc->sc_lock); 1808 } 1809 1810 void 1811 ohci_poll(struct usbd_bus *bus) 1812 { 1813 ohci_softc_t *sc = OHCI_BUS2SC(bus); 1814 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1815 1816 #ifdef OHCI_DEBUG 1817 static int last; 1818 int new; 1819 new = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1820 if (new != last) { 1821 DPRINTFN(10, "intrs=0x%04x", new, 0, 0, 0); 1822 last = new; 1823 } 1824 #endif 1825 sc->sc_eintrs |= OHCI_WDH; 1826 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) { 1827 mutex_spin_enter(&sc->sc_intr_lock); 1828 ohci_intr1(sc); 1829 mutex_spin_exit(&sc->sc_intr_lock); 1830 } 1831 } 1832 1833 /* 1834 * Add an ED to the schedule. Called with USB lock held. 1835 */ 1836 Static void 1837 ohci_add_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1838 { 1839 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1840 DPRINTFN(8, "sed=%p head=%p", sed, head, 0, 0); 1841 1842 KASSERT(mutex_owned(&sc->sc_lock)); 1843 1844 usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted), 1845 sizeof(head->ed.ed_nexted), 1846 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1847 sed->next = head->next; 1848 sed->ed.ed_nexted = head->ed.ed_nexted; 1849 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted), 1850 sizeof(sed->ed.ed_nexted), 1851 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1852 head->next = sed; 1853 head->ed.ed_nexted = HTOO32(sed->physaddr); 1854 usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted), 1855 sizeof(head->ed.ed_nexted), 1856 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1857 } 1858 1859 /* 1860 * Remove an ED from the schedule. Called with USB lock held. 1861 */ 1862 Static void 1863 ohci_rem_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1864 { 1865 ohci_soft_ed_t *p; 1866 1867 KASSERT(mutex_owned(&sc->sc_lock)); 1868 1869 /* XXX */ 1870 for (p = head; p != NULL && p->next != sed; p = p->next) 1871 ; 1872 KASSERT(p != NULL); 1873 1874 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted), 1875 sizeof(sed->ed.ed_nexted), 1876 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1877 p->next = sed->next; 1878 p->ed.ed_nexted = sed->ed.ed_nexted; 1879 usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted), 1880 sizeof(p->ed.ed_nexted), 1881 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1882 } 1883 1884 /* 1885 * When a transfer is completed the TD is added to the done queue by 1886 * the host controller. This queue is the processed by software. 1887 * Unfortunately the queue contains the physical address of the TD 1888 * and we have no simple way to translate this back to a kernel address. 1889 * To make the translation possible (and fast) we use a hash table of 1890 * TDs currently in the schedule. The physical address is used as the 1891 * hash value. 1892 */ 1893 1894 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1895 /* Called with USB lock held. */ 1896 void 1897 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1898 { 1899 int h = HASH(std->physaddr); 1900 1901 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1902 1903 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1904 } 1905 1906 /* Called with USB lock held. */ 1907 void 1908 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1909 { 1910 1911 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1912 1913 LIST_REMOVE(std, hnext); 1914 } 1915 1916 ohci_soft_td_t * 1917 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a) 1918 { 1919 int h = HASH(a); 1920 ohci_soft_td_t *std; 1921 1922 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1923 std != NULL; 1924 std = LIST_NEXT(std, hnext)) 1925 if (std->physaddr == a) 1926 return std; 1927 return NULL; 1928 } 1929 1930 /* Called with USB lock held. */ 1931 void 1932 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1933 { 1934 int h = HASH(sitd->physaddr); 1935 1936 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1937 1938 KASSERT(mutex_owned(&sc->sc_lock)); 1939 1940 DPRINTFN(10, "sitd=%p physaddr=0x%08lx", sitd, (u_long)sitd->physaddr, 1941 0, 0); 1942 1943 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext); 1944 } 1945 1946 /* Called with USB lock held. */ 1947 void 1948 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1949 { 1950 1951 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1952 1953 KASSERT(mutex_owned(&sc->sc_lock)); 1954 1955 DPRINTFN(10, "sitd=%p physaddr=0x%08lx", sitd, (u_long)sitd->physaddr, 1956 0, 0); 1957 1958 LIST_REMOVE(sitd, hnext); 1959 } 1960 1961 ohci_soft_itd_t * 1962 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a) 1963 { 1964 int h = HASH(a); 1965 ohci_soft_itd_t *sitd; 1966 1967 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]); 1968 sitd != NULL; 1969 sitd = LIST_NEXT(sitd, hnext)) 1970 if (sitd->physaddr == a) 1971 return sitd; 1972 return NULL; 1973 } 1974 1975 void 1976 ohci_timeout(void *addr) 1977 { 1978 struct usbd_xfer *xfer = addr; 1979 struct ohci_xfer *oxfer = OHCI_XFER2OXFER(xfer); 1980 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 1981 1982 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1983 DPRINTF("oxfer=%p", oxfer, 0, 0, 0); 1984 1985 if (sc->sc_dying) { 1986 mutex_enter(&sc->sc_lock); 1987 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1988 mutex_exit(&sc->sc_lock); 1989 return; 1990 } 1991 1992 /* Execute the abort in a process context. */ 1993 usb_init_task(&oxfer->abort_task, ohci_timeout_task, addr, 1994 USB_TASKQ_MPSAFE); 1995 usb_add_task(xfer->ux_pipe->up_dev, &oxfer->abort_task, 1996 USB_TASKQ_HC); 1997 } 1998 1999 void 2000 ohci_timeout_task(void *addr) 2001 { 2002 struct usbd_xfer *xfer = addr; 2003 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2004 2005 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2006 2007 DPRINTF("xfer=%p", xfer, 0, 0, 0); 2008 2009 mutex_enter(&sc->sc_lock); 2010 ohci_abort_xfer(xfer, USBD_TIMEOUT); 2011 mutex_exit(&sc->sc_lock); 2012 } 2013 2014 #ifdef OHCI_DEBUG 2015 void 2016 ohci_dump_tds(ohci_softc_t *sc, ohci_soft_td_t *std) 2017 { 2018 for (; std; std = std->nexttd) { 2019 ohci_dump_td(sc, std); 2020 KASSERTMSG(std->nexttd == NULL || std != std->nexttd, 2021 "std %p next %p", std, std->nexttd); 2022 } 2023 } 2024 2025 void 2026 ohci_dump_td(ohci_softc_t *sc, ohci_soft_td_t *std) 2027 { 2028 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2029 2030 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 2031 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2032 2033 uint32_t flags = O32TOH(std->td.td_flags); 2034 DPRINTF("TD(%p) at 0x%08lx:", std, (u_long)std->physaddr, 0, 0); 2035 DPRINTF(" round=%d DP=%x DI=%x T=%x", 2036 !!(flags & OHCI_TD_R), 2037 __SHIFTOUT(flags, OHCI_TD_DP_MASK), 2038 OHCI_TD_GET_DI(flags), 2039 __SHIFTOUT(flags, OHCI_TD_TOGGLE_MASK)); 2040 DPRINTF(" EC=%d CC=%d", OHCI_TD_GET_EC(flags), OHCI_TD_GET_CC(flags), 2041 0, 0); 2042 DPRINTF(" td_cbp=0x%08lx td_nexttd=0x%08lx td_be=0x%08lx", 2043 (u_long)O32TOH(std->td.td_cbp), 2044 (u_long)O32TOH(std->td.td_nexttd), 2045 (u_long)O32TOH(std->td.td_be), 0); 2046 } 2047 2048 void 2049 ohci_dump_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 2050 { 2051 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2052 2053 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 2054 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2055 2056 uint32_t flags = O32TOH(sitd->itd.itd_flags); 2057 DPRINTF("ITD(%p) at 0x%08lx", sitd, (u_long)sitd->physaddr, 0, 0); 2058 DPRINTF(" sf=%d di=%d fc=%d cc=%d", 2059 OHCI_ITD_GET_SF(flags), OHCI_ITD_GET_DI(flags), 2060 OHCI_ITD_GET_FC(flags), OHCI_ITD_GET_CC(flags)); 2061 DPRINTF(" bp0=0x%08x next=0x%08x be=0x%08x", 2062 O32TOH(sitd->itd.itd_bp0), 2063 O32TOH(sitd->itd.itd_nextitd), 2064 O32TOH(sitd->itd.itd_be), 0); 2065 CTASSERT(OHCI_ITD_NOFFSET == 8); 2066 DPRINTF(" offs[0] = 0x%04x offs[1] = 0x%04x " 2067 "offs[2] = 0x%04x offs[3] = 0x%04x", 2068 O16TOH(sitd->itd.itd_offset[0]), 2069 O16TOH(sitd->itd.itd_offset[1]), 2070 O16TOH(sitd->itd.itd_offset[2]), 2071 O16TOH(sitd->itd.itd_offset[3])); 2072 DPRINTF(" offs[4] = 0x%04x offs[5] = 0x%04x " 2073 "offs[6] = 0x%04x offs[7] = 0x%04x", 2074 O16TOH(sitd->itd.itd_offset[4]), 2075 O16TOH(sitd->itd.itd_offset[5]), 2076 O16TOH(sitd->itd.itd_offset[6]), 2077 O16TOH(sitd->itd.itd_offset[7])); 2078 } 2079 2080 void 2081 ohci_dump_itds(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 2082 { 2083 for (; sitd; sitd = sitd->nextitd) 2084 ohci_dump_itd(sc, sitd); 2085 } 2086 2087 void 2088 ohci_dump_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 2089 { 2090 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2091 2092 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 2093 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2094 2095 uint32_t flags = O32TOH(sed->ed.ed_flags); 2096 DPRINTF("ED(%p) at 0x%08lx:", sed, sed->physaddr, 0, 0); 2097 DPRINTF(" addr=%d endpt=%d maxp=%d", 2098 OHCI_ED_GET_FA(flags), 2099 OHCI_ED_GET_EN(flags), 2100 OHCI_ED_GET_MAXP(flags), 2101 0); 2102 DPRINTF(" dir=%d speed=%d skip=%d iso=%d", 2103 __SHIFTOUT(flags, OHCI_ED_DIR_MASK), 2104 !!(flags & OHCI_ED_SPEED), 2105 !!(flags & OHCI_ED_SKIP), 2106 !!(flags & OHCI_ED_FORMAT_ISO)); 2107 DPRINTF(" tailp=0x%08lx", (u_long)O32TOH(sed->ed.ed_tailp), 2108 0, 0, 0); 2109 DPRINTF(" headp=0x%08lx nexted=0x%08lx halted=%d carry=%d", 2110 O32TOH(sed->ed.ed_headp), O32TOH(sed->ed.ed_nexted), 2111 !!(O32TOH(sed->ed.ed_headp) & OHCI_HALTED), 2112 !!(O32TOH(sed->ed.ed_headp) & OHCI_TOGGLECARRY)); 2113 } 2114 #endif 2115 2116 usbd_status 2117 ohci_open(struct usbd_pipe *pipe) 2118 { 2119 struct usbd_device *dev = pipe->up_dev; 2120 struct usbd_bus *bus = dev->ud_bus; 2121 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 2122 usb_endpoint_descriptor_t *ed = pipe->up_endpoint->ue_edesc; 2123 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 2124 uint8_t addr = dev->ud_addr; 2125 uint8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 2126 ohci_soft_ed_t *sed; 2127 ohci_soft_td_t *std; 2128 ohci_soft_itd_t *sitd; 2129 ohci_physaddr_t tdphys; 2130 uint32_t fmt; 2131 usbd_status err = USBD_NOMEM; 2132 int ival; 2133 2134 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2135 DPRINTFN(1, "pipe=%p, addr=%d, endpt=%d (%d)", pipe, addr, 2136 ed->bEndpointAddress, bus->ub_rhaddr); 2137 2138 if (sc->sc_dying) { 2139 return USBD_IOERROR; 2140 } 2141 2142 std = NULL; 2143 sed = NULL; 2144 2145 if (addr == bus->ub_rhaddr) { 2146 switch (ed->bEndpointAddress) { 2147 case USB_CONTROL_ENDPOINT: 2148 pipe->up_methods = &roothub_ctrl_methods; 2149 break; 2150 case UE_DIR_IN | USBROOTHUB_INTR_ENDPT: 2151 pipe->up_methods = &ohci_root_intr_methods; 2152 break; 2153 default: 2154 err = USBD_INVAL; 2155 goto bad; 2156 } 2157 } else { 2158 sed = ohci_alloc_sed(sc); 2159 if (sed == NULL) 2160 goto bad; 2161 opipe->sed = sed; 2162 if (xfertype == UE_ISOCHRONOUS) { 2163 sitd = ohci_alloc_sitd(sc); 2164 if (sitd == NULL) 2165 goto bad; 2166 2167 opipe->tail.itd = sitd; 2168 tdphys = sitd->physaddr; 2169 fmt = OHCI_ED_FORMAT_ISO; 2170 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 2171 fmt |= OHCI_ED_DIR_IN; 2172 else 2173 fmt |= OHCI_ED_DIR_OUT; 2174 } else { 2175 std = ohci_alloc_std(sc); 2176 if (std == NULL) 2177 goto bad; 2178 2179 opipe->tail.td = std; 2180 tdphys = std->physaddr; 2181 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD; 2182 } 2183 sed->ed.ed_flags = HTOO32( 2184 OHCI_ED_SET_FA(addr) | 2185 OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) | 2186 (dev->ud_speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) | 2187 fmt | 2188 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 2189 sed->ed.ed_headp = HTOO32(tdphys | 2190 (pipe->up_endpoint->ue_toggle ? OHCI_TOGGLECARRY : 0)); 2191 sed->ed.ed_tailp = HTOO32(tdphys); 2192 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 2193 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2194 2195 switch (xfertype) { 2196 case UE_CONTROL: 2197 pipe->up_methods = &ohci_device_ctrl_methods; 2198 err = usb_allocmem(&sc->sc_bus, 2199 sizeof(usb_device_request_t), 2200 0, &opipe->ctrl.reqdma); 2201 if (err) 2202 goto bad; 2203 mutex_enter(&sc->sc_lock); 2204 ohci_add_ed(sc, sed, sc->sc_ctrl_head); 2205 mutex_exit(&sc->sc_lock); 2206 break; 2207 case UE_INTERRUPT: 2208 pipe->up_methods = &ohci_device_intr_methods; 2209 ival = pipe->up_interval; 2210 if (ival == USBD_DEFAULT_INTERVAL) 2211 ival = ed->bInterval; 2212 err = ohci_device_setintr(sc, opipe, ival); 2213 if (err) 2214 goto bad; 2215 break; 2216 case UE_ISOCHRONOUS: 2217 pipe->up_serialise = false; 2218 pipe->up_methods = &ohci_device_isoc_methods; 2219 return ohci_setup_isoc(pipe); 2220 case UE_BULK: 2221 pipe->up_methods = &ohci_device_bulk_methods; 2222 mutex_enter(&sc->sc_lock); 2223 ohci_add_ed(sc, sed, sc->sc_bulk_head); 2224 mutex_exit(&sc->sc_lock); 2225 break; 2226 } 2227 } 2228 2229 return USBD_NORMAL_COMPLETION; 2230 2231 bad: 2232 if (std != NULL) { 2233 ohci_free_std(sc, std); 2234 } 2235 if (sed != NULL) 2236 ohci_free_sed(sc, sed); 2237 return err; 2238 2239 } 2240 2241 /* 2242 * Close a reqular pipe. 2243 * Assumes that there are no pending transactions. 2244 */ 2245 void 2246 ohci_close_pipe(struct usbd_pipe *pipe, ohci_soft_ed_t *head) 2247 { 2248 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 2249 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 2250 ohci_soft_ed_t *sed = opipe->sed; 2251 2252 KASSERT(mutex_owned(&sc->sc_lock)); 2253 2254 #ifdef DIAGNOSTIC 2255 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 2256 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2257 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) { 2258 ohci_soft_td_t *std; 2259 std = ohci_hash_find_td(sc, O32TOH(sed->ed.ed_headp)); 2260 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 2261 "tl=0x%x pipe=%p, std=%p\n", sed, 2262 (int)O32TOH(sed->ed.ed_headp), 2263 (int)O32TOH(sed->ed.ed_tailp), 2264 pipe, std); 2265 #ifdef OHCI_DEBUG 2266 usbd_dump_pipe(&opipe->pipe); 2267 ohci_dump_ed(sc, sed); 2268 if (std) 2269 ohci_dump_td(sc, std); 2270 #endif 2271 usb_delay_ms(&sc->sc_bus, 2); 2272 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2273 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) 2274 printf("ohci_close_pipe: pipe still not empty\n"); 2275 } 2276 #endif 2277 ohci_rem_ed(sc, sed, head); 2278 /* Make sure the host controller is not touching this ED */ 2279 usb_delay_ms(&sc->sc_bus, 1); 2280 pipe->up_endpoint->ue_toggle = 2281 (O32TOH(sed->ed.ed_headp) & OHCI_TOGGLECARRY) ? 1 : 0; 2282 ohci_free_sed_locked(sc, opipe->sed); 2283 } 2284 2285 /* 2286 * Abort a device request. 2287 * If this routine is called at splusb() it guarantees that the request 2288 * will be removed from the hardware scheduling and that the callback 2289 * for it will be called with USBD_CANCELLED status. 2290 * It's impossible to guarantee that the requested transfer will not 2291 * have happened since the hardware runs concurrently. 2292 * If the transaction has already happened we rely on the ordinary 2293 * interrupt processing to process it. 2294 * XXX This is most probably wrong. 2295 * XXXMRG this doesn't make sense anymore. 2296 */ 2297 void 2298 ohci_abort_xfer(struct usbd_xfer *xfer, usbd_status status) 2299 { 2300 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 2301 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2302 ohci_soft_ed_t *sed = opipe->sed; 2303 ohci_soft_td_t *p, *n; 2304 ohci_physaddr_t headp; 2305 int hit; 2306 int wake; 2307 2308 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2309 DPRINTF("xfer=%p pipe=%p sed=%p", xfer, opipe,sed, 0); 2310 2311 KASSERT(mutex_owned(&sc->sc_lock)); 2312 ASSERT_SLEEPABLE(); 2313 2314 if (sc->sc_dying) { 2315 /* If we're dying, just do the software part. */ 2316 xfer->ux_status = status; /* make software ignore it */ 2317 callout_halt(&xfer->ux_callout, &sc->sc_lock); 2318 usb_transfer_complete(xfer); 2319 return; 2320 } 2321 2322 /* 2323 * If an abort is already in progress then just wait for it to 2324 * complete and return. 2325 */ 2326 if (xfer->ux_hcflags & UXFER_ABORTING) { 2327 DPRINTFN(2, "already aborting", 0, 0, 0, 0); 2328 #ifdef DIAGNOSTIC 2329 if (status == USBD_TIMEOUT) 2330 printf("%s: TIMEOUT while aborting\n", __func__); 2331 #endif 2332 /* Override the status which might be USBD_TIMEOUT. */ 2333 xfer->ux_status = status; 2334 DPRINTFN(2, "waiting for abort to finish", 0, 0, 0, 0); 2335 xfer->ux_hcflags |= UXFER_ABORTWAIT; 2336 while (xfer->ux_hcflags & UXFER_ABORTING) 2337 cv_wait(&xfer->ux_hccv, &sc->sc_lock); 2338 goto done; 2339 } 2340 xfer->ux_hcflags |= UXFER_ABORTING; 2341 2342 /* 2343 * Step 1: Make interrupt routine and hardware ignore xfer. 2344 */ 2345 xfer->ux_status = status; /* make software ignore it */ 2346 callout_stop(&xfer->ux_callout); 2347 DPRINTFN(1, "stop ed=%p", sed, 0, 0, 0); 2348 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2349 sizeof(sed->ed.ed_flags), 2350 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2351 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */ 2352 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2353 sizeof(sed->ed.ed_flags), 2354 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2355 2356 /* 2357 * Step 2: Wait until we know hardware has finished any possible 2358 * use of the xfer. Also make sure the soft interrupt routine 2359 * has run. 2360 */ 2361 /* Hardware finishes in 1ms */ 2362 usb_delay_ms_locked(opipe->pipe.up_dev->ud_bus, 20, &sc->sc_lock); 2363 sc->sc_softwake = 1; 2364 usb_schedsoftintr(&sc->sc_bus); 2365 cv_wait(&sc->sc_softwake_cv, &sc->sc_lock); 2366 2367 /* 2368 * Step 3: Remove any vestiges of the xfer from the hardware. 2369 * The complication here is that the hardware may have executed 2370 * beyond the xfer we're trying to abort. So as we're scanning 2371 * the TDs of this xfer we check if the hardware points to 2372 * any of them. 2373 */ 2374 p = xfer->ux_hcpriv; 2375 KASSERT(p); 2376 2377 #ifdef OHCI_DEBUG 2378 DPRINTF("--- dump start ---", 0, 0, 0, 0); 2379 2380 if (ohcidebug >= 2) { 2381 DPRINTF("sed:", 0, 0, 0, 0); 2382 ohci_dump_ed(sc, sed); 2383 ohci_dump_tds(sc, p); 2384 } 2385 DPRINTF("--- dump end ---", 0, 0, 0, 0); 2386 #endif 2387 headp = O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK; 2388 hit = 0; 2389 for (; p->xfer == xfer; p = n) { 2390 hit |= headp == p->physaddr; 2391 n = p->nexttd; 2392 ohci_hash_rem_td(sc, p); 2393 } 2394 /* Zap headp register if hardware pointed inside the xfer. */ 2395 if (hit) { 2396 DPRINTFN(1, "set hd=0x%08x, tl=0x%08x", (int)p->physaddr, 2397 (int)O32TOH(sed->ed.ed_tailp), 0, 0); 2398 sed->ed.ed_headp = HTOO32(p->physaddr); /* unlink TDs */ 2399 usb_syncmem(&sed->dma, 2400 sed->offs + offsetof(ohci_ed_t, ed_headp), 2401 sizeof(sed->ed.ed_headp), 2402 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2403 } else { 2404 DPRINTFN(1, "no hit", 0, 0, 0, 0); 2405 } 2406 2407 /* 2408 * Step 4: Turn on hardware again. 2409 */ 2410 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2411 sizeof(sed->ed.ed_flags), 2412 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2413 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */ 2414 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2415 sizeof(sed->ed.ed_flags), 2416 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2417 2418 /* 2419 * Step 5: Execute callback. 2420 */ 2421 wake = xfer->ux_hcflags & UXFER_ABORTWAIT; 2422 xfer->ux_hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT); 2423 usb_transfer_complete(xfer); 2424 if (wake) 2425 cv_broadcast(&xfer->ux_hccv); 2426 2427 done: 2428 KASSERT(mutex_owned(&sc->sc_lock)); 2429 } 2430 2431 /* 2432 * Data structures and routines to emulate the root hub. 2433 */ 2434 Static int 2435 ohci_roothub_ctrl(struct usbd_bus *bus, usb_device_request_t *req, 2436 void *buf, int buflen) 2437 { 2438 ohci_softc_t *sc = OHCI_BUS2SC(bus); 2439 usb_port_status_t ps; 2440 uint16_t len, value, index; 2441 int l, totlen = 0; 2442 int port, i; 2443 uint32_t v; 2444 2445 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2446 2447 if (sc->sc_dying) 2448 return -1; 2449 2450 DPRINTFN(4, "type=0x%02x request=%02x", req->bmRequestType, 2451 req->bRequest, 0, 0); 2452 2453 len = UGETW(req->wLength); 2454 value = UGETW(req->wValue); 2455 index = UGETW(req->wIndex); 2456 2457 #define C(x,y) ((x) | ((y) << 8)) 2458 switch (C(req->bRequest, req->bmRequestType)) { 2459 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2460 DPRINTFN(8, "wValue=0x%04x", value, 0, 0, 0); 2461 if (len == 0) 2462 break; 2463 switch (value) { 2464 case C(0, UDESC_DEVICE): { 2465 usb_device_descriptor_t devd; 2466 2467 totlen = min(buflen, sizeof(devd)); 2468 memcpy(&devd, buf, totlen); 2469 USETW(devd.idVendor, sc->sc_id_vendor); 2470 memcpy(buf, &devd, totlen); 2471 break; 2472 } 2473 case C(1, UDESC_STRING): 2474 #define sd ((usb_string_descriptor_t *)buf) 2475 /* Vendor */ 2476 totlen = usb_makestrdesc(sd, len, sc->sc_vendor); 2477 break; 2478 case C(2, UDESC_STRING): 2479 /* Product */ 2480 totlen = usb_makestrdesc(sd, len, "OHCI root hub"); 2481 break; 2482 #undef sd 2483 default: 2484 /* default from usbroothub */ 2485 return buflen; 2486 } 2487 break; 2488 2489 /* Hub requests */ 2490 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2491 break; 2492 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2493 DPRINTFN(8, "UR_CLEAR_PORT_FEATURE port=%d feature=%d", 2494 index, value, 0, 0); 2495 if (index < 1 || index > sc->sc_noport) { 2496 return -1; 2497 } 2498 port = OHCI_RH_PORT_STATUS(index); 2499 switch(value) { 2500 case UHF_PORT_ENABLE: 2501 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2502 break; 2503 case UHF_PORT_SUSPEND: 2504 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2505 break; 2506 case UHF_PORT_POWER: 2507 /* Yes, writing to the LOW_SPEED bit clears power. */ 2508 OWRITE4(sc, port, UPS_LOW_SPEED); 2509 break; 2510 case UHF_C_PORT_CONNECTION: 2511 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2512 break; 2513 case UHF_C_PORT_ENABLE: 2514 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2515 break; 2516 case UHF_C_PORT_SUSPEND: 2517 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2518 break; 2519 case UHF_C_PORT_OVER_CURRENT: 2520 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2521 break; 2522 case UHF_C_PORT_RESET: 2523 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2524 break; 2525 default: 2526 return -1; 2527 } 2528 switch(value) { 2529 case UHF_C_PORT_CONNECTION: 2530 case UHF_C_PORT_ENABLE: 2531 case UHF_C_PORT_SUSPEND: 2532 case UHF_C_PORT_OVER_CURRENT: 2533 case UHF_C_PORT_RESET: 2534 /* Enable RHSC interrupt if condition is cleared. */ 2535 if ((OREAD4(sc, port) >> 16) == 0) 2536 ohci_rhsc_enable(sc); 2537 break; 2538 default: 2539 break; 2540 } 2541 break; 2542 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2543 if (len == 0) 2544 break; 2545 if ((value & 0xff) != 0) { 2546 return -1; 2547 } 2548 usb_hub_descriptor_t hubd; 2549 2550 totlen = min(buflen, sizeof(hubd)); 2551 memcpy(&hubd, buf, totlen); 2552 2553 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2554 hubd.bNbrPorts = sc->sc_noport; 2555 USETW(hubd.wHubCharacteristics, 2556 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2557 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2558 /* XXX overcurrent */ 2559 ); 2560 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2561 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2562 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2563 hubd.DeviceRemovable[i++] = (uint8_t)v; 2564 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2565 totlen = min(totlen, hubd.bDescLength); 2566 memcpy(buf, &hubd, totlen); 2567 break; 2568 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2569 if (len != 4) { 2570 return -1; 2571 } 2572 memset(buf, 0, len); /* ? XXX */ 2573 totlen = len; 2574 break; 2575 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2576 DPRINTFN(8, "get port status i=%d", index, 0, 0, 0); 2577 if (index < 1 || index > sc->sc_noport) { 2578 return -1; 2579 } 2580 if (len != 4) { 2581 return -1; 2582 } 2583 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2584 DPRINTFN(8, "port status=0x%04x", v, 0, 0, 0); 2585 USETW(ps.wPortStatus, v); 2586 USETW(ps.wPortChange, v >> 16); 2587 totlen = min(len, sizeof(ps)); 2588 memcpy(buf, &ps, totlen); 2589 break; 2590 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2591 return -1; 2592 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2593 break; 2594 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2595 if (index < 1 || index > sc->sc_noport) { 2596 return -1; 2597 } 2598 port = OHCI_RH_PORT_STATUS(index); 2599 switch(value) { 2600 case UHF_PORT_ENABLE: 2601 OWRITE4(sc, port, UPS_PORT_ENABLED); 2602 break; 2603 case UHF_PORT_SUSPEND: 2604 OWRITE4(sc, port, UPS_SUSPEND); 2605 break; 2606 case UHF_PORT_RESET: 2607 DPRINTFN(5, "reset port %d", index, 0, 0, 0); 2608 OWRITE4(sc, port, UPS_RESET); 2609 for (i = 0; i < 5; i++) { 2610 usb_delay_ms(&sc->sc_bus, 2611 USB_PORT_ROOT_RESET_DELAY); 2612 if (sc->sc_dying) { 2613 return -1; 2614 } 2615 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2616 break; 2617 } 2618 DPRINTFN(8, "port %d reset, status = 0x%04x", index, 2619 OREAD4(sc, port), 0, 0); 2620 break; 2621 case UHF_PORT_POWER: 2622 DPRINTFN(2, "set port power %d", index, 0, 0, 0); 2623 OWRITE4(sc, port, UPS_PORT_POWER); 2624 break; 2625 default: 2626 return -1; 2627 } 2628 break; 2629 default: 2630 /* default from usbroothub */ 2631 return buflen; 2632 } 2633 2634 return totlen; 2635 } 2636 2637 Static usbd_status 2638 ohci_root_intr_transfer(struct usbd_xfer *xfer) 2639 { 2640 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2641 usbd_status err; 2642 2643 /* Insert last in queue. */ 2644 mutex_enter(&sc->sc_lock); 2645 err = usb_insert_transfer(xfer); 2646 mutex_exit(&sc->sc_lock); 2647 if (err) 2648 return err; 2649 2650 /* Pipe isn't running, start first */ 2651 return ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 2652 } 2653 2654 Static usbd_status 2655 ohci_root_intr_start(struct usbd_xfer *xfer) 2656 { 2657 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2658 2659 if (sc->sc_dying) 2660 return USBD_IOERROR; 2661 2662 mutex_enter(&sc->sc_lock); 2663 KASSERT(sc->sc_intrxfer == NULL); 2664 sc->sc_intrxfer = xfer; 2665 mutex_exit(&sc->sc_lock); 2666 2667 return USBD_IN_PROGRESS; 2668 } 2669 2670 /* Abort a root interrupt request. */ 2671 Static void 2672 ohci_root_intr_abort(struct usbd_xfer *xfer) 2673 { 2674 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2675 2676 KASSERT(mutex_owned(&sc->sc_lock)); 2677 KASSERT(xfer->ux_pipe->up_intrxfer == xfer); 2678 2679 sc->sc_intrxfer = NULL; 2680 2681 xfer->ux_status = USBD_CANCELLED; 2682 usb_transfer_complete(xfer); 2683 } 2684 2685 /* Close the root pipe. */ 2686 Static void 2687 ohci_root_intr_close(struct usbd_pipe *pipe) 2688 { 2689 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 2690 2691 KASSERT(mutex_owned(&sc->sc_lock)); 2692 2693 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2694 2695 sc->sc_intrxfer = NULL; 2696 } 2697 2698 /************************/ 2699 2700 int 2701 ohci_device_ctrl_init(struct usbd_xfer *xfer) 2702 { 2703 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 2704 usb_device_request_t *req = &xfer->ux_request; 2705 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2706 ohci_soft_td_t *stat, *setup; 2707 int isread = req->bmRequestType & UT_READ; 2708 int len = xfer->ux_bufsize; 2709 int err = ENOMEM; 2710 2711 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2712 2713 setup = ohci_alloc_std(sc); 2714 if (setup == NULL) { 2715 goto bad1; 2716 } 2717 stat = ohci_alloc_std(sc); 2718 if (stat == NULL) { 2719 goto bad2; 2720 } 2721 2722 ox->ox_setup = setup; 2723 ox->ox_stat = stat; 2724 ox->ox_nstd = 0; 2725 2726 /* Set up data transaction */ 2727 if (len != 0) { 2728 err = ohci_alloc_std_chain(sc, xfer, len, isread); 2729 if (err) { 2730 goto bad3; 2731 } 2732 } 2733 return 0; 2734 2735 bad3: 2736 ohci_free_std(sc, stat); 2737 bad2: 2738 ohci_free_std(sc, setup); 2739 bad1: 2740 return err; 2741 } 2742 2743 void 2744 ohci_device_ctrl_fini(struct usbd_xfer *xfer) 2745 { 2746 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 2747 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2748 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 2749 2750 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2751 DPRINTFN(8, "xfer %p nstd %d", xfer, ox->ox_nstd, 0, 0); 2752 2753 mutex_enter(&sc->sc_lock); 2754 if (ox->ox_setup != opipe->tail.td) { 2755 ohci_free_std_locked(sc, ox->ox_setup); 2756 } 2757 for (size_t i = 0; i < ox->ox_nstd; i++) { 2758 ohci_soft_td_t *std = ox->ox_stds[i]; 2759 if (std == NULL) 2760 break; 2761 ohci_free_std_locked(sc, std); 2762 } 2763 ohci_free_std_locked(sc, ox->ox_stat); 2764 mutex_exit(&sc->sc_lock); 2765 2766 if (ox->ox_nstd) { 2767 const size_t sz = sizeof(ohci_soft_td_t *) * ox->ox_nstd; 2768 kmem_free(ox->ox_stds, sz); 2769 } 2770 } 2771 2772 Static usbd_status 2773 ohci_device_ctrl_transfer(struct usbd_xfer *xfer) 2774 { 2775 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2776 usbd_status err; 2777 2778 /* Insert last in queue. */ 2779 mutex_enter(&sc->sc_lock); 2780 err = usb_insert_transfer(xfer); 2781 mutex_exit(&sc->sc_lock); 2782 if (err) 2783 return err; 2784 2785 /* Pipe isn't running, start first */ 2786 return ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 2787 } 2788 2789 Static usbd_status 2790 ohci_device_ctrl_start(struct usbd_xfer *xfer) 2791 { 2792 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2793 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 2794 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 2795 usb_device_request_t *req = &xfer->ux_request; 2796 struct usbd_device *dev __diagused = opipe->pipe.up_dev; 2797 ohci_soft_td_t *setup, *stat, *next, *tail; 2798 ohci_soft_ed_t *sed; 2799 int isread; 2800 int len; 2801 2802 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2803 2804 if (sc->sc_dying) 2805 return USBD_IOERROR; 2806 2807 KASSERT(xfer->ux_rqflags & URQ_REQUEST); 2808 2809 isread = req->bmRequestType & UT_READ; 2810 len = UGETW(req->wLength); 2811 2812 DPRINTF("xfer=%p len=%d, addr=%d, endpt=%d", xfer, len, dev->ud_addr, 2813 opipe->pipe.up_endpoint->ue_edesc->bEndpointAddress); 2814 DPRINTF("type=0x%02x, request=0x%02x, wValue=0x%04x, wIndex=0x%04x", 2815 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2816 UGETW(req->wIndex)); 2817 2818 /* Need to take lock here for pipe->tail.td */ 2819 mutex_enter(&sc->sc_lock); 2820 2821 /* 2822 * Use the pipe "tail" TD as our first and loan our first TD to the 2823 * next transfer 2824 */ 2825 setup = opipe->tail.td; 2826 opipe->tail.td = ox->ox_setup; 2827 ox->ox_setup = setup; 2828 2829 stat = ox->ox_stat; 2830 2831 /* point at sentinel */ 2832 tail = opipe->tail.td; 2833 sed = opipe->sed; 2834 2835 KASSERTMSG(OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)) == dev->ud_addr, 2836 "address ED %d pipe %d\n", 2837 OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)), dev->ud_addr); 2838 KASSERTMSG(OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)) == 2839 UGETW(opipe->pipe.up_endpoint->ue_edesc->wMaxPacketSize), 2840 "MPL ED %d pipe %d\n", 2841 OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)), 2842 UGETW(opipe->pipe.up_endpoint->ue_edesc->wMaxPacketSize)); 2843 2844 /* next will point to data if len != 0 */ 2845 next = stat; 2846 2847 /* Set up data transaction */ 2848 if (len != 0) { 2849 ohci_soft_td_t *std; 2850 ohci_soft_td_t *end; 2851 2852 next = ox->ox_stds[0]; 2853 ohci_reset_std_chain(sc, xfer, len, isread, next, &end); 2854 2855 end->td.td_nexttd = HTOO32(stat->physaddr); 2856 end->nexttd = stat; 2857 2858 usb_syncmem(&end->dma, 2859 end->offs + offsetof(ohci_td_t, td_nexttd), 2860 sizeof(end->td.td_nexttd), 2861 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2862 2863 usb_syncmem(&xfer->ux_dmabuf, 0, len, 2864 isread ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 2865 std = ox->ox_stds[0]; 2866 /* Start toggle at 1 and then use the carried toggle. */ 2867 std->td.td_flags &= HTOO32(~OHCI_TD_TOGGLE_MASK); 2868 std->td.td_flags |= HTOO32(OHCI_TD_TOGGLE_1); 2869 usb_syncmem(&std->dma, 2870 std->offs + offsetof(ohci_td_t, td_flags), 2871 sizeof(std->td.td_flags), 2872 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2873 } 2874 2875 DPRINTFN(8, "setup %p data %p stat %p tail %p", setup, 2876 (len != 0 ? ox->ox_stds[0] : NULL), stat, tail); 2877 KASSERT(opipe->tail.td == tail); 2878 2879 memcpy(KERNADDR(&opipe->ctrl.reqdma, 0), req, sizeof(*req)); 2880 usb_syncmem(&opipe->ctrl.reqdma, 0, sizeof(*req), BUS_DMASYNC_PREWRITE); 2881 2882 setup->td.td_flags = HTOO32(OHCI_TD_SETUP | OHCI_TD_NOCC | 2883 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 2884 setup->td.td_cbp = HTOO32(DMAADDR(&opipe->ctrl.reqdma, 0)); 2885 setup->td.td_nexttd = HTOO32(next->physaddr); 2886 setup->td.td_be = HTOO32(O32TOH(setup->td.td_cbp) + sizeof(*req) - 1); 2887 setup->nexttd = next; 2888 setup->len = 0; 2889 setup->xfer = xfer; 2890 setup->flags = 0; 2891 ohci_hash_add_td(sc, setup); 2892 2893 xfer->ux_hcpriv = setup; 2894 usb_syncmem(&setup->dma, setup->offs, sizeof(setup->td), 2895 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2896 2897 stat->td.td_flags = HTOO32( 2898 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | 2899 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 2900 stat->td.td_cbp = 0; 2901 stat->td.td_nexttd = HTOO32(tail->physaddr); 2902 stat->td.td_be = 0; 2903 stat->nexttd = tail; 2904 stat->flags = OHCI_CALL_DONE; 2905 stat->len = 0; 2906 stat->xfer = xfer; 2907 ohci_hash_add_td(sc, stat); 2908 2909 usb_syncmem(&stat->dma, stat->offs, sizeof(stat->td), 2910 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2911 2912 memset(&tail->td, 0, sizeof(tail->td)); 2913 tail->nexttd = NULL; 2914 tail->xfer = NULL; 2915 2916 usb_syncmem(&tail->dma, tail->offs, sizeof(tail->td), 2917 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2918 2919 #ifdef OHCI_DEBUG 2920 USBHIST_LOGN(ohcidebug, 5, "--- dump start ---", 0, 0, 0, 0); 2921 if (ohcidebug >= 5) { 2922 ohci_dump_ed(sc, sed); 2923 ohci_dump_tds(sc, setup); 2924 } 2925 USBHIST_LOGN(ohcidebug, 5, "--- dump end ---", 0, 0, 0, 0); 2926 #endif 2927 2928 /* Insert ED in schedule */ 2929 sed->ed.ed_tailp = HTOO32(tail->physaddr); 2930 usb_syncmem(&sed->dma, 2931 sed->offs + offsetof(ohci_ed_t, ed_tailp), 2932 sizeof(sed->ed.ed_tailp), 2933 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2934 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 2935 if (xfer->ux_timeout && !sc->sc_bus.ub_usepolling) { 2936 callout_reset(&xfer->ux_callout, mstohz(xfer->ux_timeout), 2937 ohci_timeout, xfer); 2938 } 2939 2940 DPRINTF("done", 0, 0, 0, 0); 2941 2942 mutex_exit(&sc->sc_lock); 2943 2944 if (sc->sc_bus.ub_usepolling) 2945 ohci_waitintr(sc, xfer); 2946 2947 return USBD_IN_PROGRESS; 2948 } 2949 2950 /* Abort a device control request. */ 2951 Static void 2952 ohci_device_ctrl_abort(struct usbd_xfer *xfer) 2953 { 2954 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 2955 2956 KASSERT(mutex_owned(&sc->sc_lock)); 2957 2958 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2959 DPRINTF("xfer=%p", xfer, 0, 0, 0); 2960 ohci_abort_xfer(xfer, USBD_CANCELLED); 2961 } 2962 2963 /* Close a device control pipe. */ 2964 Static void 2965 ohci_device_ctrl_close(struct usbd_pipe *pipe) 2966 { 2967 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 2968 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 2969 2970 KASSERT(mutex_owned(&sc->sc_lock)); 2971 2972 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2973 DPRINTF("pipe=%p", pipe, 0, 0, 0); 2974 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2975 ohci_free_std_locked(sc, opipe->tail.td); 2976 } 2977 2978 /************************/ 2979 2980 Static void 2981 ohci_device_clear_toggle(struct usbd_pipe *pipe) 2982 { 2983 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 2984 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 2985 2986 opipe->sed->ed.ed_headp &= HTOO32(~OHCI_TOGGLECARRY); 2987 } 2988 2989 Static void 2990 ohci_noop(struct usbd_pipe *pipe) 2991 { 2992 } 2993 2994 Static int 2995 ohci_device_bulk_init(struct usbd_xfer *xfer) 2996 { 2997 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2998 int len = xfer->ux_bufsize; 2999 int endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress;; 3000 int isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3001 int err; 3002 3003 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3004 3005 KASSERT(!(xfer->ux_rqflags & URQ_REQUEST)); 3006 3007 DPRINTFN(4, "xfer=%p len=%d isread=%d flags=%d", xfer, len, isread, 3008 xfer->ux_flags); 3009 DPRINTFN(4, "endpt=%d", endpt, 0, 0, 0); 3010 3011 /* Allocate a chain of new TDs (including a new tail). */ 3012 err = ohci_alloc_std_chain(sc, xfer, len, isread); 3013 if (err) 3014 return err; 3015 3016 return 0; 3017 } 3018 3019 Static void 3020 ohci_device_bulk_fini(struct usbd_xfer *xfer) 3021 { 3022 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3023 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3024 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 3025 3026 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3027 DPRINTFN(8, "xfer %p nstd %d", xfer, ox->ox_nstd, 0, 0); 3028 3029 mutex_enter(&sc->sc_lock); 3030 for (size_t i = 0; i < ox->ox_nstd; i++) { 3031 ohci_soft_td_t *std = ox->ox_stds[i]; 3032 if (std == NULL) 3033 break; 3034 if (std != opipe->tail.td) 3035 ohci_free_std_locked(sc, std); 3036 } 3037 mutex_exit(&sc->sc_lock); 3038 3039 if (ox->ox_nstd) { 3040 const size_t sz = sizeof(ohci_soft_td_t *) * ox->ox_nstd; 3041 kmem_free(ox->ox_stds, sz); 3042 } 3043 } 3044 3045 Static usbd_status 3046 ohci_device_bulk_transfer(struct usbd_xfer *xfer) 3047 { 3048 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3049 usbd_status err; 3050 3051 /* Insert last in queue. */ 3052 mutex_enter(&sc->sc_lock); 3053 err = usb_insert_transfer(xfer); 3054 mutex_exit(&sc->sc_lock); 3055 if (err) 3056 return err; 3057 3058 /* Pipe isn't running, start first */ 3059 return ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 3060 } 3061 3062 Static usbd_status 3063 ohci_device_bulk_start(struct usbd_xfer *xfer) 3064 { 3065 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3066 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 3067 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3068 ohci_soft_td_t *last; 3069 ohci_soft_td_t *data, *tail, *tdp; 3070 ohci_soft_ed_t *sed; 3071 int len, isread, endpt; 3072 3073 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3074 3075 if (sc->sc_dying) 3076 return USBD_IOERROR; 3077 3078 KASSERT(!(xfer->ux_rqflags & URQ_REQUEST)); 3079 3080 len = xfer->ux_length; 3081 endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress; 3082 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3083 sed = opipe->sed; 3084 3085 DPRINTFN(4, "xfer=%p len=%d isread=%d flags=%d", xfer, len, isread, 3086 xfer->ux_flags); 3087 DPRINTFN(4, "endpt=%d", endpt, 0, 0, 0); 3088 3089 mutex_enter(&sc->sc_lock); 3090 3091 /* 3092 * Use the pipe "tail" TD as our first and loan our first TD to the 3093 * next transfer 3094 */ 3095 data = opipe->tail.td; 3096 opipe->tail.td = ox->ox_stds[0]; 3097 ox->ox_stds[0] = data; 3098 ohci_reset_std_chain(sc, xfer, len, isread, data, &last); 3099 3100 /* point at sentinel */ 3101 tail = opipe->tail.td; 3102 memset(&tail->td, 0, sizeof(tail->td)); 3103 tail->nexttd = NULL; 3104 tail->xfer = NULL; 3105 usb_syncmem(&tail->dma, tail->offs, sizeof(tail->td), 3106 BUS_DMASYNC_PREWRITE); 3107 xfer->ux_hcpriv = data; 3108 3109 DPRINTFN(8, "xfer %p data %p tail %p", xfer, ox->ox_stds[0], tail, 0); 3110 KASSERT(opipe->tail.td == tail); 3111 3112 /* We want interrupt at the end of the transfer. */ 3113 last->td.td_flags &= HTOO32(~OHCI_TD_INTR_MASK); 3114 last->td.td_flags |= HTOO32(OHCI_TD_SET_DI(1)); 3115 last->td.td_nexttd = HTOO32(tail->physaddr); 3116 last->nexttd = tail; 3117 last->flags |= OHCI_CALL_DONE; 3118 usb_syncmem(&last->dma, last->offs, sizeof(last->td), 3119 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3120 3121 DPRINTFN(4, "ed_flags=0x%08x td_flags=0x%08x " 3122 "td_cbp=0x%08x td_be=0x%08x", 3123 (int)O32TOH(sed->ed.ed_flags), 3124 (int)O32TOH(data->td.td_flags), 3125 (int)O32TOH(data->td.td_cbp), 3126 (int)O32TOH(data->td.td_be)); 3127 3128 #ifdef OHCI_DEBUG 3129 DPRINTFN(5, "--- dump start ---", 0, 0, 0, 0); 3130 if (ohcidebug >= 5) { 3131 ohci_dump_ed(sc, sed); 3132 ohci_dump_tds(sc, data); 3133 } 3134 DPRINTFN(5, "--- dump end ---", 0, 0, 0, 0); 3135 #endif 3136 3137 /* Insert ED in schedule */ 3138 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 3139 KASSERT(tdp->xfer == xfer); 3140 } 3141 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3142 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3143 sed->ed.ed_tailp = HTOO32(tail->physaddr); 3144 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3145 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3146 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3147 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 3148 if (xfer->ux_timeout && !sc->sc_bus.ub_usepolling) { 3149 callout_reset(&xfer->ux_callout, mstohz(xfer->ux_timeout), 3150 ohci_timeout, xfer); 3151 } 3152 mutex_exit(&sc->sc_lock); 3153 3154 return USBD_IN_PROGRESS; 3155 } 3156 3157 Static void 3158 ohci_device_bulk_abort(struct usbd_xfer *xfer) 3159 { 3160 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 3161 3162 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3163 3164 KASSERT(mutex_owned(&sc->sc_lock)); 3165 3166 DPRINTF("xfer=%p", xfer, 0, 0, 0); 3167 ohci_abort_xfer(xfer, USBD_CANCELLED); 3168 } 3169 3170 /* 3171 * Close a device bulk pipe. 3172 */ 3173 Static void 3174 ohci_device_bulk_close(struct usbd_pipe *pipe) 3175 { 3176 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 3177 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 3178 3179 KASSERT(mutex_owned(&sc->sc_lock)); 3180 3181 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3182 3183 DPRINTF("pipe=%p", pipe, 0, 0, 0); 3184 ohci_close_pipe(pipe, sc->sc_bulk_head); 3185 ohci_free_std_locked(sc, opipe->tail.td); 3186 } 3187 3188 /************************/ 3189 3190 Static int 3191 ohci_device_intr_init(struct usbd_xfer *xfer) 3192 { 3193 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3194 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3195 int len = xfer->ux_bufsize; 3196 int endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress;; 3197 int isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3198 int err; 3199 3200 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3201 3202 KASSERT(!(xfer->ux_rqflags & URQ_REQUEST)); 3203 KASSERT(len != 0); 3204 3205 DPRINTFN(4, "xfer=%p len=%d isread=%d flags=%d", xfer, len, isread, 3206 xfer->ux_flags); 3207 DPRINTFN(4, "endpt=%d", endpt, 0, 0, 0); 3208 3209 ox->ox_nstd = 0; 3210 3211 err = ohci_alloc_std_chain(sc, xfer, len, isread); 3212 if (err) { 3213 return err; 3214 } 3215 3216 return 0; 3217 } 3218 3219 Static void 3220 ohci_device_intr_fini(struct usbd_xfer *xfer) 3221 { 3222 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3223 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3224 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 3225 3226 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3227 DPRINTFN(8, "xfer %p nstd %d", xfer, ox->ox_nstd, 0, 0); 3228 3229 mutex_enter(&sc->sc_lock); 3230 for (size_t i = 0; i < ox->ox_nstd; i++) { 3231 ohci_soft_td_t *std = ox->ox_stds[i]; 3232 if (std != NULL) 3233 break; 3234 if (std != opipe->tail.td) 3235 ohci_free_std_locked(sc, std); 3236 } 3237 mutex_exit(&sc->sc_lock); 3238 3239 if (ox->ox_nstd) { 3240 const size_t sz = sizeof(ohci_soft_td_t *) * ox->ox_nstd; 3241 kmem_free(ox->ox_stds, sz); 3242 } 3243 } 3244 3245 Static usbd_status 3246 ohci_device_intr_transfer(struct usbd_xfer *xfer) 3247 { 3248 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3249 usbd_status err; 3250 3251 /* Insert last in queue. */ 3252 mutex_enter(&sc->sc_lock); 3253 err = usb_insert_transfer(xfer); 3254 mutex_exit(&sc->sc_lock); 3255 if (err) 3256 return err; 3257 3258 /* Pipe isn't running, start first */ 3259 return ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 3260 } 3261 3262 Static usbd_status 3263 ohci_device_intr_start(struct usbd_xfer *xfer) 3264 { 3265 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3266 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 3267 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3268 ohci_soft_ed_t *sed = opipe->sed; 3269 ohci_soft_td_t *data, *last, *tail; 3270 int len, isread, endpt; 3271 3272 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3273 3274 if (sc->sc_dying) 3275 return USBD_IOERROR; 3276 3277 DPRINTFN(3, "xfer=%p len=%d flags=%d priv=%p", xfer, xfer->ux_length, 3278 xfer->ux_flags, xfer->ux_priv); 3279 3280 KASSERT(!(xfer->ux_rqflags & URQ_REQUEST)); 3281 3282 len = xfer->ux_length; 3283 endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress; 3284 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3285 3286 mutex_enter(&sc->sc_lock); 3287 3288 /* 3289 * Use the pipe "tail" TD as our first and loan our first TD to the 3290 * next transfer. 3291 */ 3292 data = opipe->tail.td; 3293 opipe->tail.td = ox->ox_stds[0]; 3294 ox->ox_stds[0] = data; 3295 ohci_reset_std_chain(sc, xfer, len, isread, data, &last); 3296 3297 /* point at sentinel */ 3298 tail = opipe->tail.td; 3299 memset(&tail->td, 0, sizeof(tail->td)); 3300 tail->nexttd = NULL; 3301 tail->xfer = NULL; 3302 usb_syncmem(&tail->dma, tail->offs, sizeof(tail->td), 3303 BUS_DMASYNC_PREWRITE); 3304 xfer->ux_hcpriv = data; 3305 3306 DPRINTFN(8, "data %p tail %p", ox->ox_stds[0], tail, 0, 0); 3307 KASSERT(opipe->tail.td == tail); 3308 3309 /* We want interrupt at the end of the transfer. */ 3310 last->td.td_flags &= HTOO32(~OHCI_TD_INTR_MASK); 3311 last->td.td_flags |= HTOO32(OHCI_TD_SET_DI(1)); 3312 3313 last->td.td_nexttd = HTOO32(tail->physaddr); 3314 last->nexttd = tail; 3315 last->flags |= OHCI_CALL_DONE; 3316 usb_syncmem(&last->dma, last->offs, sizeof(last->td), 3317 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3318 3319 #ifdef OHCI_DEBUG 3320 DPRINTFN(5, "--- dump start ---", 0, 0, 0, 0); 3321 if (ohcidebug >= 5) { 3322 ohci_dump_ed(sc, sed); 3323 ohci_dump_tds(sc, data); 3324 } 3325 DPRINTFN(5, "--- dump end ---", 0, 0, 0, 0); 3326 #endif 3327 3328 /* Insert ED in schedule */ 3329 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3330 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3331 sed->ed.ed_tailp = HTOO32(tail->physaddr); 3332 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3333 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3334 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3335 3336 mutex_exit(&sc->sc_lock); 3337 3338 return USBD_IN_PROGRESS; 3339 } 3340 3341 /* Abort a device interrupt request. */ 3342 Static void 3343 ohci_device_intr_abort(struct usbd_xfer *xfer) 3344 { 3345 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 3346 3347 KASSERT(mutex_owned(&sc->sc_lock)); 3348 KASSERT(xfer->ux_pipe->up_intrxfer == xfer); 3349 3350 ohci_abort_xfer(xfer, USBD_CANCELLED); 3351 } 3352 3353 /* Close a device interrupt pipe. */ 3354 Static void 3355 ohci_device_intr_close(struct usbd_pipe *pipe) 3356 { 3357 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 3358 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 3359 int nslots = opipe->intr.nslots; 3360 int pos = opipe->intr.pos; 3361 int j; 3362 ohci_soft_ed_t *p, *sed = opipe->sed; 3363 3364 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3365 3366 KASSERT(mutex_owned(&sc->sc_lock)); 3367 3368 DPRINTFN(1, "pipe=%p nslots=%d pos=%d", pipe, nslots, pos, 0); 3369 usb_syncmem(&sed->dma, sed->offs, 3370 sizeof(sed->ed), BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3371 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 3372 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3373 sizeof(sed->ed.ed_flags), 3374 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3375 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 3376 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) 3377 usb_delay_ms_locked(&sc->sc_bus, 2, &sc->sc_lock); 3378 3379 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 3380 continue; 3381 KASSERT(p); 3382 p->next = sed->next; 3383 p->ed.ed_nexted = sed->ed.ed_nexted; 3384 usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted), 3385 sizeof(p->ed.ed_nexted), 3386 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3387 3388 for (j = 0; j < nslots; j++) 3389 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 3390 3391 ohci_free_std_locked(sc, opipe->tail.td); 3392 ohci_free_sed_locked(sc, opipe->sed); 3393 } 3394 3395 Static usbd_status 3396 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival) 3397 { 3398 int i, j, best; 3399 u_int npoll, slow, shigh, nslots; 3400 u_int bestbw, bw; 3401 ohci_soft_ed_t *hsed, *sed = opipe->sed; 3402 3403 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3404 3405 DPRINTFN(2, "pipe=%p", opipe, 0, 0, 0); 3406 if (ival == 0) { 3407 printf("ohci_setintr: 0 interval\n"); 3408 return USBD_INVAL; 3409 } 3410 3411 npoll = OHCI_NO_INTRS; 3412 while (npoll > ival) 3413 npoll /= 2; 3414 DPRINTFN(2, "ival=%d npoll=%d", ival, npoll, 0, 0); 3415 3416 /* 3417 * We now know which level in the tree the ED must go into. 3418 * Figure out which slot has most bandwidth left over. 3419 * Slots to examine: 3420 * npoll 3421 * 1 0 3422 * 2 1 2 3423 * 4 3 4 5 6 3424 * 8 7 8 9 10 11 12 13 14 3425 * N (N-1) .. (N-1+N-1) 3426 */ 3427 slow = npoll-1; 3428 shigh = slow + npoll; 3429 nslots = OHCI_NO_INTRS / npoll; 3430 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 3431 bw = 0; 3432 for (j = 0; j < nslots; j++) 3433 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 3434 if (bw < bestbw) { 3435 best = i; 3436 bestbw = bw; 3437 } 3438 } 3439 DPRINTFN(2, "best=%d(%d..%d) bestbw=%d", best, slow, shigh, bestbw); 3440 3441 mutex_enter(&sc->sc_lock); 3442 hsed = sc->sc_eds[best]; 3443 sed->next = hsed->next; 3444 usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags), 3445 sizeof(hsed->ed.ed_flags), 3446 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3447 sed->ed.ed_nexted = hsed->ed.ed_nexted; 3448 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3449 sizeof(sed->ed.ed_flags), 3450 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3451 hsed->next = sed; 3452 hsed->ed.ed_nexted = HTOO32(sed->physaddr); 3453 usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags), 3454 sizeof(hsed->ed.ed_flags), 3455 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3456 mutex_exit(&sc->sc_lock); 3457 3458 for (j = 0; j < nslots; j++) 3459 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 3460 opipe->intr.nslots = nslots; 3461 opipe->intr.pos = best; 3462 3463 DPRINTFN(5, "returns %p", opipe, 0, 0, 0); 3464 return USBD_NORMAL_COMPLETION; 3465 } 3466 3467 /***********************/ 3468 3469 Static int 3470 ohci_device_isoc_init(struct usbd_xfer *xfer) 3471 { 3472 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3473 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3474 ohci_soft_itd_t *sitd; 3475 size_t i; 3476 int err; 3477 3478 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3479 3480 DPRINTFN(1, "xfer %p len %d flags %d", xfer, xfer->ux_length, 3481 xfer->ux_flags, 0); 3482 3483 const size_t nfsitd = 3484 (xfer->ux_nframes + OHCI_ITD_NOFFSET - 1) / OHCI_ITD_NOFFSET; 3485 const size_t nbsitd = xfer->ux_bufsize / OHCI_PAGE_SIZE; 3486 const size_t nsitd = MAX(nfsitd, nbsitd) + 1; 3487 3488 ox->ox_sitds = kmem_zalloc(sizeof(ohci_soft_itd_t *) * nsitd, 3489 KM_SLEEP); 3490 ox->ox_nsitd = nsitd; 3491 3492 for (i = 0; i < nsitd; i++) { 3493 /* Allocate next ITD */ 3494 sitd = ohci_alloc_sitd(sc); 3495 if (sitd == NULL) { 3496 err = ENOMEM; 3497 goto fail; 3498 } 3499 ox->ox_sitds[i] = sitd; 3500 sitd->xfer = xfer; 3501 sitd->flags = 0; 3502 } 3503 3504 return 0; 3505 fail: 3506 for (; i > 0;) { 3507 ohci_free_sitd(sc, ox->ox_sitds[--i]); 3508 } 3509 return err; 3510 } 3511 3512 Static void 3513 ohci_device_isoc_fini(struct usbd_xfer *xfer) 3514 { 3515 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3516 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3517 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 3518 3519 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3520 3521 mutex_enter(&sc->sc_lock); 3522 for (size_t i = 0; i < ox->ox_nsitd; i++) { 3523 if (ox->ox_sitds[i] != opipe->tail.itd) { 3524 ohci_free_sitd_locked(sc, ox->ox_sitds[i]); 3525 } 3526 } 3527 mutex_exit(&sc->sc_lock); 3528 3529 if (ox->ox_nsitd) { 3530 const size_t sz = sizeof(ohci_soft_itd_t *) * ox->ox_nsitd; 3531 kmem_free(ox->ox_sitds, sz); 3532 } 3533 } 3534 3535 3536 usbd_status 3537 ohci_device_isoc_transfer(struct usbd_xfer *xfer) 3538 { 3539 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3540 usbd_status __diagused err; 3541 3542 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3543 3544 DPRINTFN(5, "xfer=%p", xfer, 0, 0, 0); 3545 3546 /* Put it on our queue, */ 3547 mutex_enter(&sc->sc_lock); 3548 err = usb_insert_transfer(xfer); 3549 mutex_exit(&sc->sc_lock); 3550 3551 KASSERT(err == USBD_NORMAL_COMPLETION); 3552 3553 /* insert into schedule, */ 3554 ohci_device_isoc_enter(xfer); 3555 3556 /* and start if the pipe wasn't running */ 3557 return USBD_IN_PROGRESS; 3558 } 3559 3560 void 3561 ohci_device_isoc_enter(struct usbd_xfer *xfer) 3562 { 3563 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3564 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 3565 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3566 ohci_soft_ed_t *sed = opipe->sed; 3567 ohci_soft_itd_t *sitd, *nsitd, *tail; 3568 ohci_physaddr_t buf, offs, noffs, bp0; 3569 int i, ncur, nframes; 3570 3571 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3572 DPRINTFN(5, "xfer=%p", xfer, 0, 0, 0); 3573 3574 mutex_enter(&sc->sc_lock); 3575 3576 if (sc->sc_dying) { 3577 mutex_exit(&sc->sc_lock); 3578 return; 3579 } 3580 3581 struct isoc *isoc = &opipe->isoc; 3582 3583 DPRINTFN(1, "used=%d next=%d xfer=%p nframes=%d", 3584 isoc->inuse, isoc->next, xfer, xfer->ux_nframes); 3585 3586 if (isoc->next == -1) { 3587 /* Not in use yet, schedule it a few frames ahead. */ 3588 isoc->next = O32TOH(sc->sc_hcca->hcca_frame_number) + 5; 3589 DPRINTFN(2,"start next=%d", isoc->next, 0, 0, 0); 3590 } 3591 3592 sitd = opipe->tail.itd; 3593 opipe->tail.itd = ox->ox_sitds[0]; 3594 ox->ox_sitds[0] = sitd; 3595 3596 buf = DMAADDR(&xfer->ux_dmabuf, 0); 3597 bp0 = OHCI_PAGE(buf); 3598 offs = OHCI_PAGE_OFFSET(buf); 3599 nframes = xfer->ux_nframes; 3600 xfer->ux_hcpriv = sitd; 3601 size_t j = 1; 3602 for (i = ncur = 0; i < nframes; i++, ncur++) { 3603 noffs = offs + xfer->ux_frlengths[i]; 3604 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ 3605 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */ 3606 3607 /* Allocate next ITD */ 3608 nsitd = ox->ox_sitds[j++]; 3609 KASSERT(nsitd != NULL); 3610 KASSERT(j < ox->ox_nsitd); 3611 3612 /* Fill current ITD */ 3613 sitd->itd.itd_flags = HTOO32( 3614 OHCI_ITD_NOCC | 3615 OHCI_ITD_SET_SF(isoc->next) | 3616 OHCI_ITD_SET_DI(6) | /* delay intr a little */ 3617 OHCI_ITD_SET_FC(ncur)); 3618 sitd->itd.itd_bp0 = HTOO32(bp0); 3619 sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr); 3620 sitd->itd.itd_be = HTOO32(bp0 + offs - 1); 3621 sitd->nextitd = nsitd; 3622 sitd->xfer = xfer; 3623 sitd->flags = 0; 3624 #ifdef DIAGNOSTIC 3625 sitd->isdone = false; 3626 #endif 3627 ohci_hash_add_itd(sc, sitd); 3628 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 3629 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3630 3631 sitd = nsitd; 3632 isoc->next = isoc->next + ncur; 3633 bp0 = OHCI_PAGE(buf + offs); 3634 ncur = 0; 3635 } 3636 sitd->itd.itd_offset[ncur] = HTOO16(OHCI_ITD_MK_OFFS(offs)); 3637 offs = noffs; 3638 } 3639 KASSERT(j <= ox->ox_nsitd); 3640 3641 /* point at sentinel */ 3642 tail = opipe->tail.itd; 3643 memset(&tail->itd, 0, sizeof(tail->itd)); 3644 tail->nextitd = NULL; 3645 tail->xfer = NULL; 3646 usb_syncmem(&tail->dma, tail->offs, sizeof(tail->itd), 3647 BUS_DMASYNC_PREWRITE); 3648 3649 /* Fixup last used ITD */ 3650 sitd->itd.itd_flags = HTOO32( 3651 OHCI_ITD_NOCC | 3652 OHCI_ITD_SET_SF(isoc->next) | 3653 OHCI_ITD_SET_DI(0) | 3654 OHCI_ITD_SET_FC(ncur)); 3655 sitd->itd.itd_bp0 = HTOO32(bp0); 3656 sitd->itd.itd_nextitd = HTOO32(tail->physaddr); 3657 sitd->itd.itd_be = HTOO32(bp0 + offs - 1); 3658 sitd->nextitd = tail; 3659 sitd->xfer = xfer; 3660 sitd->flags = OHCI_CALL_DONE; 3661 #ifdef DIAGNOSTIC 3662 sitd->isdone = false; 3663 #endif 3664 ohci_hash_add_itd(sc, sitd); 3665 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 3666 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3667 3668 isoc->next = isoc->next + ncur; 3669 isoc->inuse += nframes; 3670 3671 /* XXX pretend we did it all */ 3672 xfer->ux_actlen = offs; 3673 xfer->ux_status = USBD_IN_PROGRESS; 3674 3675 #ifdef OHCI_DEBUG 3676 if (ohcidebug >= 5) { 3677 DPRINTF("frame=%d", O32TOH(sc->sc_hcca->hcca_frame_number), 3678 0, 0, 0); 3679 ohci_dump_itds(sc, xfer->ux_hcpriv); 3680 ohci_dump_ed(sc, sed); 3681 } 3682 #endif 3683 3684 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3685 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3686 sed->ed.ed_tailp = HTOO32(tail->physaddr); 3687 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3688 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3689 sizeof(sed->ed.ed_flags), 3690 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3691 mutex_exit(&sc->sc_lock); 3692 } 3693 3694 void 3695 ohci_device_isoc_abort(struct usbd_xfer *xfer) 3696 { 3697 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 3698 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3699 ohci_soft_ed_t *sed; 3700 ohci_soft_itd_t *sitd; 3701 3702 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3703 DPRINTFN(1, "xfer=%p", xfer, 0, 0, 0); 3704 3705 KASSERT(mutex_owned(&sc->sc_lock)); 3706 3707 /* Transfer is already done. */ 3708 if (xfer->ux_status != USBD_NOT_STARTED && 3709 xfer->ux_status != USBD_IN_PROGRESS) { 3710 printf("ohci_device_isoc_abort: early return\n"); 3711 goto done; 3712 } 3713 3714 /* Give xfer the requested abort code. */ 3715 xfer->ux_status = USBD_CANCELLED; 3716 3717 sed = opipe->sed; 3718 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3719 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3720 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */ 3721 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3722 sizeof(sed->ed.ed_flags), 3723 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3724 3725 sitd = xfer->ux_hcpriv; 3726 KASSERT(sitd); 3727 3728 usb_delay_ms_locked(&sc->sc_bus, OHCI_ITD_NOFFSET, &sc->sc_lock); 3729 3730 for (; sitd->xfer == xfer; sitd = sitd->nextitd) { 3731 ohci_hash_rem_itd(sc, sitd); 3732 #ifdef DIAGNOSTIC 3733 DPRINTFN(1, "abort sets done sitd=%p", sitd, 0, 0, 0); 3734 sitd->isdone = true; 3735 #endif 3736 } 3737 3738 /* Run callback. */ 3739 usb_transfer_complete(xfer); 3740 3741 sed->ed.ed_headp = HTOO32(sitd->physaddr); /* unlink TDs */ 3742 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */ 3743 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3744 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3745 3746 done: 3747 KASSERT(mutex_owned(&sc->sc_lock)); 3748 } 3749 3750 void 3751 ohci_device_isoc_done(struct usbd_xfer *xfer) 3752 { 3753 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3754 DPRINTFN(1, "xfer=%p", xfer, 0, 0, 0); 3755 } 3756 3757 usbd_status 3758 ohci_setup_isoc(struct usbd_pipe *pipe) 3759 { 3760 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 3761 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 3762 struct isoc *isoc = &opipe->isoc; 3763 3764 isoc->next = -1; 3765 isoc->inuse = 0; 3766 3767 mutex_enter(&sc->sc_lock); 3768 ohci_add_ed(sc, opipe->sed, sc->sc_isoc_head); 3769 mutex_exit(&sc->sc_lock); 3770 3771 return USBD_NORMAL_COMPLETION; 3772 } 3773 3774 void 3775 ohci_device_isoc_close(struct usbd_pipe *pipe) 3776 { 3777 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 3778 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 3779 3780 KASSERT(mutex_owned(&sc->sc_lock)); 3781 3782 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3783 DPRINTF("pipe=%p", pipe, 0, 0, 0); 3784 ohci_close_pipe(pipe, sc->sc_isoc_head); 3785 #ifdef DIAGNOSTIC 3786 opipe->tail.itd->isdone = true; 3787 #endif 3788 ohci_free_sitd_locked(sc, opipe->tail.itd); 3789 } 3790
Indexes created Fri Oct 03 02:09:57 GMT 2025