ohci.c revision 1.254.2.70
1 /* $NetBSD: ohci.c,v 1.254.2.70 2016/04/04 07:43:12 skrll Exp $ */ 2 3 /* 4 * Copyright (c) 1998, 2004, 2005, 2012 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net) at 9 * Carlstedt Research & Technology, Jared D. McNeill (jmcneill (at) invisible.ca) 10 * and Matthew R. Green (mrg (at) eterna.com.au). 11 * This code is derived from software contributed to The NetBSD Foundation 12 * by Charles M. Hannum. 13 * 14 * Redistribution and use in source and binary forms, with or without 15 * modification, are permitted provided that the following conditions 16 * are met: 17 * 1. Redistributions of source code must retain the above copyright 18 * notice, this list of conditions and the following disclaimer. 19 * 2. Redistributions in binary form must reproduce the above copyright 20 * notice, this list of conditions and the following disclaimer in the 21 * documentation and/or other materials provided with the distribution. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 24 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 25 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 26 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 27 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 31 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 32 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 33 * POSSIBILITY OF SUCH DAMAGE. 34 */ 35 36 /* 37 * USB Open Host Controller driver. 38 * 39 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html 40 * USB spec: http://www.usb.org/developers/docs/ 41 */ 42 43 #include <sys/cdefs.h> 44 __KERNEL_RCSID(0, "$NetBSD: ohci.c,v 1.254.2.70 2016/04/04 07:43:12 skrll Exp $"); 45 46 #include "opt_usb.h" 47 48 #include <sys/param.h> 49 50 #include <sys/cpu.h> 51 #include <sys/device.h> 52 #include <sys/kernel.h> 53 #include <sys/kmem.h> 54 #include <sys/proc.h> 55 #include <sys/queue.h> 56 #include <sys/select.h> 57 #include <sys/sysctl.h> 58 #include <sys/systm.h> 59 60 #include <machine/endian.h> 61 62 #include <dev/usb/usb.h> 63 #include <dev/usb/usbdi.h> 64 #include <dev/usb/usbdivar.h> 65 #include <dev/usb/usb_mem.h> 66 #include <dev/usb/usb_quirks.h> 67 68 #include <dev/usb/ohcireg.h> 69 #include <dev/usb/ohcivar.h> 70 #include <dev/usb/usbroothub.h> 71 #include <dev/usb/usbhist.h> 72 73 #ifdef USB_DEBUG 74 #ifndef OHCI_DEBUG 75 #define ohcidebug 0 76 #else 77 static int ohcidebug = 10; 78 79 SYSCTL_SETUP(sysctl_hw_ohci_setup, "sysctl hw.ohci setup") 80 { 81 int err; 82 const struct sysctlnode *rnode; 83 const struct sysctlnode *cnode; 84 85 err = sysctl_createv(clog, 0, NULL, &rnode, 86 CTLFLAG_PERMANENT, CTLTYPE_NODE, "ohci", 87 SYSCTL_DESCR("ohci global controls"), 88 NULL, 0, NULL, 0, CTL_HW, CTL_CREATE, CTL_EOL); 89 90 if (err) 91 goto fail; 92 93 /* control debugging printfs */ 94 err = sysctl_createv(clog, 0, &rnode, &cnode, 95 CTLFLAG_PERMANENT|CTLFLAG_READWRITE, CTLTYPE_INT, 96 "debug", SYSCTL_DESCR("Enable debugging output"), 97 NULL, 0, &ohcidebug, sizeof(ohcidebug), CTL_CREATE, CTL_EOL); 98 if (err) 99 goto fail; 100 101 return; 102 fail: 103 aprint_error("%s: sysctl_createv failed (err = %d)\n", __func__, err); 104 } 105 106 #endif /* OHCI_DEBUG */ 107 #endif /* USB_DEBUG */ 108 109 #define DPRINTF(FMT,A,B,C,D) USBHIST_LOG(ohcidebug,FMT,A,B,C,D) 110 #define DPRINTFN(N,FMT,A,B,C,D) USBHIST_LOGN(ohcidebug,N,FMT,A,B,C,D) 111 #define OHCIHIST_FUNC() USBHIST_FUNC() 112 #define OHCIHIST_CALLED(name) USBHIST_CALLED(ohcidebug) 113 114 #if BYTE_ORDER == BIG_ENDIAN 115 #define SWAP_ENDIAN OHCI_LITTLE_ENDIAN 116 #else 117 #define SWAP_ENDIAN OHCI_BIG_ENDIAN 118 #endif 119 120 #define O16TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap16(val) : val) 121 #define O32TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap32(val) : val) 122 #define HTOO16(val) O16TOH(val) 123 #define HTOO32(val) O32TOH(val) 124 125 struct ohci_pipe; 126 127 Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *); 128 Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *); 129 130 Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *); 131 Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *); 132 Static void ohci_free_std_locked(ohci_softc_t *, ohci_soft_td_t *); 133 134 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *); 135 Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *); 136 Static void ohci_free_sitd_locked(ohci_softc_t *, 137 ohci_soft_itd_t *); 138 139 Static usbd_status ohci_alloc_std_chain(ohci_softc_t *, struct usbd_xfer *, 140 int, int); 141 Static void ohci_free_stds(ohci_softc_t *, struct ohci_xfer *); 142 143 Static void ohci_reset_std_chain(ohci_softc_t *, struct usbd_xfer *, 144 int, int, ohci_soft_td_t *, ohci_soft_td_t **); 145 146 Static usbd_status ohci_open(struct usbd_pipe *); 147 Static void ohci_poll(struct usbd_bus *); 148 Static void ohci_softintr(void *); 149 Static void ohci_waitintr(ohci_softc_t *, struct usbd_xfer *); 150 Static void ohci_rhsc(ohci_softc_t *, struct usbd_xfer *); 151 Static void ohci_rhsc_softint(void *); 152 153 Static void ohci_add_ed(ohci_softc_t *, ohci_soft_ed_t *, 154 ohci_soft_ed_t *); 155 156 Static void ohci_rem_ed(ohci_softc_t *, ohci_soft_ed_t *, 157 ohci_soft_ed_t *); 158 Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *); 159 Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *); 160 Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t); 161 Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *); 162 Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *); 163 Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t); 164 165 Static usbd_status ohci_setup_isoc(struct usbd_pipe *); 166 Static void ohci_device_isoc_enter(struct usbd_xfer *); 167 168 Static struct usbd_xfer * 169 ohci_allocx(struct usbd_bus *, unsigned int); 170 Static void ohci_freex(struct usbd_bus *, struct usbd_xfer *); 171 Static void ohci_get_lock(struct usbd_bus *, kmutex_t **); 172 Static int ohci_roothub_ctrl(struct usbd_bus *, 173 usb_device_request_t *, void *, int); 174 175 Static usbd_status ohci_root_intr_transfer(struct usbd_xfer *); 176 Static usbd_status ohci_root_intr_start(struct usbd_xfer *); 177 Static void ohci_root_intr_abort(struct usbd_xfer *); 178 Static void ohci_root_intr_close(struct usbd_pipe *); 179 Static void ohci_root_intr_done(struct usbd_xfer *); 180 181 Static int ohci_device_ctrl_init(struct usbd_xfer *); 182 Static void ohci_device_ctrl_fini(struct usbd_xfer *); 183 Static usbd_status ohci_device_ctrl_transfer(struct usbd_xfer *); 184 Static usbd_status ohci_device_ctrl_start(struct usbd_xfer *); 185 Static void ohci_device_ctrl_abort(struct usbd_xfer *); 186 Static void ohci_device_ctrl_close(struct usbd_pipe *); 187 Static void ohci_device_ctrl_done(struct usbd_xfer *); 188 189 Static int ohci_device_bulk_init(struct usbd_xfer *); 190 Static void ohci_device_bulk_fini(struct usbd_xfer *); 191 Static usbd_status ohci_device_bulk_transfer(struct usbd_xfer *); 192 Static usbd_status ohci_device_bulk_start(struct usbd_xfer *); 193 Static void ohci_device_bulk_abort(struct usbd_xfer *); 194 Static void ohci_device_bulk_close(struct usbd_pipe *); 195 Static void ohci_device_bulk_done(struct usbd_xfer *); 196 197 Static int ohci_device_intr_init(struct usbd_xfer *); 198 Static void ohci_device_intr_fini(struct usbd_xfer *); 199 Static usbd_status ohci_device_intr_transfer(struct usbd_xfer *); 200 Static usbd_status ohci_device_intr_start(struct usbd_xfer *); 201 Static void ohci_device_intr_abort(struct usbd_xfer *); 202 Static void ohci_device_intr_close(struct usbd_pipe *); 203 Static void ohci_device_intr_done(struct usbd_xfer *); 204 205 Static int ohci_device_isoc_init(struct usbd_xfer *); 206 Static void ohci_device_isoc_fini(struct usbd_xfer *); 207 Static usbd_status ohci_device_isoc_transfer(struct usbd_xfer *); 208 Static void ohci_device_isoc_abort(struct usbd_xfer *); 209 Static void ohci_device_isoc_close(struct usbd_pipe *); 210 Static void ohci_device_isoc_done(struct usbd_xfer *); 211 212 Static usbd_status ohci_device_setintr(ohci_softc_t *, 213 struct ohci_pipe *, int); 214 215 Static void ohci_timeout(void *); 216 Static void ohci_timeout_task(void *); 217 Static void ohci_rhsc_enable(void *); 218 219 Static void ohci_close_pipe(struct usbd_pipe *, ohci_soft_ed_t *); 220 Static void ohci_abort_xfer(struct usbd_xfer *, usbd_status); 221 222 Static void ohci_device_clear_toggle(struct usbd_pipe *); 223 Static void ohci_noop(struct usbd_pipe *); 224 225 #ifdef OHCI_DEBUG 226 Static void ohci_dumpregs(ohci_softc_t *); 227 Static void ohci_dump_tds(ohci_softc_t *, ohci_soft_td_t *); 228 Static void ohci_dump_td(ohci_softc_t *, ohci_soft_td_t *); 229 Static void ohci_dump_ed(ohci_softc_t *, ohci_soft_ed_t *); 230 Static void ohci_dump_itd(ohci_softc_t *, ohci_soft_itd_t *); 231 Static void ohci_dump_itds(ohci_softc_t *, ohci_soft_itd_t *); 232 #endif 233 234 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 235 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 236 #define OWRITE1(sc, r, x) \ 237 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 238 #define OWRITE2(sc, r, x) \ 239 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 240 #define OWRITE4(sc, r, x) \ 241 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 242 243 static __inline uint32_t 244 OREAD4(ohci_softc_t *sc, bus_size_t r) 245 { 246 247 OBARR(sc); 248 return bus_space_read_4(sc->iot, sc->ioh, r); 249 } 250 251 /* Reverse the bits in a value 0 .. 31 */ 252 Static uint8_t revbits[OHCI_NO_INTRS] = 253 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 254 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 255 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 256 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 257 258 struct ohci_pipe { 259 struct usbd_pipe pipe; 260 ohci_soft_ed_t *sed; 261 union { 262 ohci_soft_td_t *td; 263 ohci_soft_itd_t *itd; 264 } tail; 265 /* Info needed for different pipe kinds. */ 266 union { 267 /* Control pipe */ 268 struct { 269 usb_dma_t reqdma; 270 } ctrl; 271 /* Interrupt pipe */ 272 struct { 273 int nslots; 274 int pos; 275 } intr; 276 /* Isochronous pipe */ 277 struct isoc { 278 int next, inuse; 279 } isoc; 280 }; 281 }; 282 283 Static const struct usbd_bus_methods ohci_bus_methods = { 284 .ubm_open = ohci_open, 285 .ubm_softint = ohci_softintr, 286 .ubm_dopoll = ohci_poll, 287 .ubm_allocx = ohci_allocx, 288 .ubm_freex = ohci_freex, 289 .ubm_getlock = ohci_get_lock, 290 .ubm_rhctrl = ohci_roothub_ctrl, 291 }; 292 293 Static const struct usbd_pipe_methods ohci_root_intr_methods = { 294 .upm_transfer = ohci_root_intr_transfer, 295 .upm_start = ohci_root_intr_start, 296 .upm_abort = ohci_root_intr_abort, 297 .upm_close = ohci_root_intr_close, 298 .upm_cleartoggle = ohci_noop, 299 .upm_done = ohci_root_intr_done, 300 }; 301 302 Static const struct usbd_pipe_methods ohci_device_ctrl_methods = { 303 .upm_init = ohci_device_ctrl_init, 304 .upm_fini = ohci_device_ctrl_fini, 305 .upm_transfer = ohci_device_ctrl_transfer, 306 .upm_start = ohci_device_ctrl_start, 307 .upm_abort = ohci_device_ctrl_abort, 308 .upm_close = ohci_device_ctrl_close, 309 .upm_cleartoggle = ohci_noop, 310 .upm_done = ohci_device_ctrl_done, 311 }; 312 313 Static const struct usbd_pipe_methods ohci_device_intr_methods = { 314 .upm_init = ohci_device_intr_init, 315 .upm_fini = ohci_device_intr_fini, 316 .upm_transfer = ohci_device_intr_transfer, 317 .upm_start = ohci_device_intr_start, 318 .upm_abort = ohci_device_intr_abort, 319 .upm_close = ohci_device_intr_close, 320 .upm_cleartoggle = ohci_device_clear_toggle, 321 .upm_done = ohci_device_intr_done, 322 }; 323 324 Static const struct usbd_pipe_methods ohci_device_bulk_methods = { 325 .upm_init = ohci_device_bulk_init, 326 .upm_fini = ohci_device_bulk_fini, 327 .upm_transfer = ohci_device_bulk_transfer, 328 .upm_start = ohci_device_bulk_start, 329 .upm_abort = ohci_device_bulk_abort, 330 .upm_close = ohci_device_bulk_close, 331 .upm_cleartoggle = ohci_device_clear_toggle, 332 .upm_done = ohci_device_bulk_done, 333 }; 334 335 Static const struct usbd_pipe_methods ohci_device_isoc_methods = { 336 .upm_init = ohci_device_isoc_init, 337 .upm_fini = ohci_device_isoc_fini, 338 .upm_transfer = ohci_device_isoc_transfer, 339 .upm_abort = ohci_device_isoc_abort, 340 .upm_close = ohci_device_isoc_close, 341 .upm_cleartoggle = ohci_noop, 342 .upm_done = ohci_device_isoc_done, 343 }; 344 345 int 346 ohci_activate(device_t self, enum devact act) 347 { 348 struct ohci_softc *sc = device_private(self); 349 350 switch (act) { 351 case DVACT_DEACTIVATE: 352 sc->sc_dying = 1; 353 return 0; 354 default: 355 return EOPNOTSUPP; 356 } 357 } 358 359 void 360 ohci_childdet(device_t self, device_t child) 361 { 362 struct ohci_softc *sc = device_private(self); 363 364 KASSERT(sc->sc_child == child); 365 sc->sc_child = NULL; 366 } 367 368 int 369 ohci_detach(struct ohci_softc *sc, int flags) 370 { 371 int rv = 0; 372 373 if (sc->sc_child != NULL) 374 rv = config_detach(sc->sc_child, flags); 375 376 if (rv != 0) 377 return rv; 378 379 callout_halt(&sc->sc_tmo_rhsc, &sc->sc_lock); 380 381 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 382 callout_destroy(&sc->sc_tmo_rhsc); 383 384 softint_disestablish(sc->sc_rhsc_si); 385 386 cv_destroy(&sc->sc_softwake_cv); 387 388 mutex_destroy(&sc->sc_lock); 389 mutex_destroy(&sc->sc_intr_lock); 390 391 if (sc->sc_hcca != NULL) 392 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 393 pool_cache_destroy(sc->sc_xferpool); 394 395 return rv; 396 } 397 398 ohci_soft_ed_t * 399 ohci_alloc_sed(ohci_softc_t *sc) 400 { 401 ohci_soft_ed_t *sed; 402 usbd_status err; 403 int i, offs; 404 usb_dma_t dma; 405 406 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 407 408 mutex_enter(&sc->sc_lock); 409 if (sc->sc_freeeds == NULL) { 410 DPRINTFN(2, "allocating chunk", 0, 0, 0, 0); 411 mutex_exit(&sc->sc_lock); 412 413 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 414 OHCI_ED_ALIGN, &dma); 415 if (err) 416 return 0; 417 418 mutex_enter(&sc->sc_lock); 419 for (i = 0; i < OHCI_SED_CHUNK; i++) { 420 offs = i * OHCI_SED_SIZE; 421 sed = KERNADDR(&dma, offs); 422 sed->physaddr = DMAADDR(&dma, offs); 423 sed->dma = dma; 424 sed->offs = offs; 425 sed->next = sc->sc_freeeds; 426 sc->sc_freeeds = sed; 427 } 428 } 429 sed = sc->sc_freeeds; 430 sc->sc_freeeds = sed->next; 431 mutex_exit(&sc->sc_lock); 432 433 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 434 sed->next = 0; 435 return sed; 436 } 437 438 static inline void 439 ohci_free_sed_locked(ohci_softc_t *sc, ohci_soft_ed_t *sed) 440 { 441 442 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 443 444 sed->next = sc->sc_freeeds; 445 sc->sc_freeeds = sed; 446 } 447 448 void 449 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 450 { 451 452 mutex_enter(&sc->sc_lock); 453 ohci_free_sed_locked(sc, sed); 454 mutex_exit(&sc->sc_lock); 455 } 456 457 ohci_soft_td_t * 458 ohci_alloc_std(ohci_softc_t *sc) 459 { 460 ohci_soft_td_t *std; 461 usbd_status err; 462 int i, offs; 463 usb_dma_t dma; 464 465 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 466 467 mutex_enter(&sc->sc_lock); 468 if (sc->sc_freetds == NULL) { 469 DPRINTFN(2, "allocating chunk", 0, 0, 0, 0); 470 mutex_exit(&sc->sc_lock); 471 472 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 473 OHCI_TD_ALIGN, &dma); 474 if (err) 475 return NULL; 476 477 mutex_enter(&sc->sc_lock); 478 for (i = 0; i < OHCI_STD_CHUNK; i++) { 479 offs = i * OHCI_STD_SIZE; 480 std = KERNADDR(&dma, offs); 481 std->physaddr = DMAADDR(&dma, offs); 482 std->dma = dma; 483 std->offs = offs; 484 std->nexttd = sc->sc_freetds; 485 sc->sc_freetds = std; 486 } 487 } 488 489 std = sc->sc_freetds; 490 sc->sc_freetds = std->nexttd; 491 mutex_exit(&sc->sc_lock); 492 493 memset(&std->td, 0, sizeof(ohci_td_t)); 494 std->nexttd = NULL; 495 std->xfer = NULL; 496 497 return std; 498 } 499 500 void 501 ohci_free_std_locked(ohci_softc_t *sc, ohci_soft_td_t *std) 502 { 503 504 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 505 506 std->nexttd = sc->sc_freetds; 507 sc->sc_freetds = std; 508 } 509 510 void 511 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std) 512 { 513 514 mutex_enter(&sc->sc_lock); 515 ohci_free_std_locked(sc, std); 516 mutex_exit(&sc->sc_lock); 517 } 518 519 Static usbd_status 520 ohci_alloc_std_chain(ohci_softc_t *sc, struct usbd_xfer *xfer, int length, int rd) 521 { 522 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 523 uint16_t flags = xfer->ux_flags; 524 525 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 526 527 DPRINTFN(8, "addr=%d endpt=%d len=%d speed=%d", 528 xfer->ux_pipe->up_dev->ud_addr, 529 UE_GET_ADDR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress), 530 length, xfer->ux_pipe->up_dev->ud_speed); 531 532 ASSERT_SLEEPABLE(); 533 KASSERT(length != 0 || (!rd && (flags & USBD_FORCE_SHORT_XFER))); 534 535 size_t nstd = (!rd && (flags & USBD_FORCE_SHORT_XFER)) ? 1 : 0; 536 nstd += ((length + OHCI_PAGE_SIZE - 1) / OHCI_PAGE_SIZE); 537 ox->ox_stds = kmem_zalloc(sizeof(ohci_soft_td_t *) * nstd, 538 KM_SLEEP); 539 ox->ox_nstd = nstd; 540 541 DPRINTFN(8, "xfer %p nstd %d", xfer, nstd, 0, 0); 542 543 for (size_t j = 0; j < ox->ox_nstd;) { 544 ohci_soft_td_t *cur = ohci_alloc_std(sc); 545 if (cur == NULL) 546 goto nomem; 547 548 ox->ox_stds[j++] = cur; 549 cur->xfer = xfer; 550 cur->flags = 0; 551 } 552 553 return USBD_NORMAL_COMPLETION; 554 555 nomem: 556 ohci_free_stds(sc, ox); 557 558 return USBD_NOMEM; 559 } 560 561 Static void 562 ohci_free_stds(ohci_softc_t *sc, struct ohci_xfer *ox) 563 { 564 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 565 DPRINTF("ox=%p", ox, 0, 0, 0); 566 567 mutex_enter(&sc->sc_lock); 568 for (size_t i = 0; i < ox->ox_nstd; i++) { 569 ohci_soft_td_t *std = ox->ox_stds[i]; 570 if (std == NULL) 571 break; 572 ohci_free_std_locked(sc, std); 573 } 574 mutex_exit(&sc->sc_lock); 575 } 576 577 void 578 ohci_reset_std_chain(ohci_softc_t *sc, struct usbd_xfer *xfer, 579 int alen, int rd, ohci_soft_td_t *sp, ohci_soft_td_t **ep) 580 { 581 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 582 ohci_soft_td_t *next, *cur; 583 int len, curlen; 584 usb_dma_t *dma = &xfer->ux_dmabuf; 585 uint16_t flags = xfer->ux_flags; 586 587 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 588 DPRINTF("start len=%d", alen, 0, 0, 0); 589 590 KASSERT(mutex_owned(&sc->sc_lock)); 591 592 DPRINTFN(8, "addr=%d endpt=%d len=%d speed=%d", 593 xfer->ux_pipe->up_dev->ud_addr, 594 UE_GET_ADDR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress), 595 alen, xfer->ux_pipe->up_dev->ud_speed); 596 597 KASSERT(sp); 598 599 int mps = UGETW(xfer->ux_pipe->up_endpoint->ue_edesc->wMaxPacketSize); 600 601 /* 602 * Assign next for the len == 0 case where we don't go through the 603 * main loop. 604 */ 605 len = alen; 606 cur = next = sp; 607 608 usb_syncmem(dma, 0, len, 609 rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 610 const uint32_t tdflags = HTOO32( 611 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 612 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR); 613 614 size_t curoffs = 0; 615 for (size_t j = 1; len != 0;) { 616 if (j == ox->ox_nstd) 617 next = NULL; 618 else 619 next = ox->ox_stds[j++]; 620 KASSERT(next != cur); 621 622 curlen = 0; 623 ohci_physaddr_t sdataphys = DMAADDR(dma, curoffs); 624 ohci_physaddr_t edataphys = DMAADDR(dma, curoffs + len - 1); 625 626 ohci_physaddr_t sphyspg = OHCI_PAGE(sdataphys); 627 ohci_physaddr_t ephyspg = OHCI_PAGE(edataphys); 628 /* 629 * The OHCI hardware can handle at most one page 630 * crossing per TD 631 */ 632 curlen = len; 633 if (!(sphyspg == ephyspg || sphyspg + 1 == ephyspg)) { 634 /* must use multiple TDs, fill as much as possible. */ 635 curlen = 2 * OHCI_PAGE_SIZE - 636 (sdataphys & (OHCI_PAGE_SIZE - 1)); 637 /* the length must be a multiple of the max size */ 638 curlen -= curlen % mps; 639 } 640 KASSERT(curlen != 0); 641 DPRINTFN(4, "sdataphys=0x%08x edataphys=0x%08x " 642 "len=%d curlen=%d", sdataphys, edataphys, len, curlen); 643 644 cur->td.td_flags = tdflags; 645 cur->td.td_cbp = HTOO32(sdataphys); 646 cur->td.td_be = HTOO32(edataphys); 647 cur->td.td_nexttd = (next != NULL) ? HTOO32(next->physaddr) : 0; 648 cur->nexttd = next; 649 cur->len = curlen; 650 cur->flags = OHCI_ADD_LEN; 651 cur->xfer = xfer; 652 ohci_hash_add_td(sc, cur); 653 654 usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td), 655 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 656 657 curoffs += curlen; 658 len -= curlen; 659 660 if (len != 0) { 661 KASSERT(next != NULL); 662 DPRINTFN(10, "extend chain", 0, 0, 0, 0); 663 cur = next; 664 } 665 } 666 cur->td.td_flags |= 667 (xfer->ux_flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0); 668 669 if (!rd && 670 (flags & USBD_FORCE_SHORT_XFER) && 671 alen % mps == 0) { 672 /* Force a 0 length transfer at the end. */ 673 674 KASSERT(next != NULL); 675 cur = next; 676 677 cur->td.td_flags = tdflags; 678 cur->td.td_cbp = 0; /* indicate 0 length packet */ 679 cur->td.td_nexttd = 0; 680 cur->td.td_be = ~0; 681 cur->nexttd = NULL; 682 cur->len = 0; 683 cur->flags = 0; 684 cur->xfer = xfer; 685 ohci_hash_add_td(sc, cur); 686 687 usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td), 688 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 689 DPRINTFN(2, "add 0 xfer", 0, 0, 0, 0); 690 } 691 *ep = cur; 692 } 693 694 ohci_soft_itd_t * 695 ohci_alloc_sitd(ohci_softc_t *sc) 696 { 697 ohci_soft_itd_t *sitd; 698 usbd_status err; 699 int i, offs; 700 usb_dma_t dma; 701 702 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 703 704 mutex_enter(&sc->sc_lock); 705 if (sc->sc_freeitds == NULL) { 706 DPRINTFN(2, "allocating chunk", 0, 0, 0, 0); 707 mutex_exit(&sc->sc_lock); 708 709 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK, 710 OHCI_ITD_ALIGN, &dma); 711 if (err) 712 return NULL; 713 mutex_enter(&sc->sc_lock); 714 for (i = 0; i < OHCI_SITD_CHUNK; i++) { 715 offs = i * OHCI_SITD_SIZE; 716 sitd = KERNADDR(&dma, offs); 717 sitd->physaddr = DMAADDR(&dma, offs); 718 sitd->dma = dma; 719 sitd->offs = offs; 720 sitd->nextitd = sc->sc_freeitds; 721 sc->sc_freeitds = sitd; 722 } 723 } 724 725 sitd = sc->sc_freeitds; 726 sc->sc_freeitds = sitd->nextitd; 727 mutex_exit(&sc->sc_lock); 728 729 memset(&sitd->itd, 0, sizeof(ohci_itd_t)); 730 sitd->nextitd = NULL; 731 sitd->xfer = NULL; 732 733 #ifdef DIAGNOSTIC 734 sitd->isdone = true; 735 #endif 736 737 return sitd; 738 } 739 740 Static void 741 ohci_free_sitd_locked(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 742 { 743 744 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 745 DPRINTFN(10, "sitd=%p", sitd, 0, 0, 0); 746 747 KASSERT(sitd->isdone); 748 #ifdef DIAGNOSTIC 749 /* Warn double free */ 750 sitd->isdone = false; 751 #endif 752 753 sitd->nextitd = sc->sc_freeitds; 754 sc->sc_freeitds = sitd; 755 } 756 757 void 758 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 759 { 760 761 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 762 763 mutex_enter(&sc->sc_lock); 764 ohci_free_sitd_locked(sc, sitd); 765 mutex_exit(&sc->sc_lock); 766 } 767 768 int 769 ohci_init(ohci_softc_t *sc) 770 { 771 ohci_soft_ed_t *sed, *psed; 772 usbd_status err; 773 int i; 774 uint32_t s, ctl, rwc, ival, hcr, fm, per, rev, desca /*, descb */; 775 776 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 777 778 aprint_normal_dev(sc->sc_dev, ""); 779 780 sc->sc_hcca = NULL; 781 callout_init(&sc->sc_tmo_rhsc, CALLOUT_MPSAFE); 782 783 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_SOFTUSB); 784 mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_USB); 785 cv_init(&sc->sc_softwake_cv, "ohciab"); 786 787 sc->sc_rhsc_si = softint_establish(SOFTINT_NET | SOFTINT_MPSAFE, 788 ohci_rhsc_softint, sc); 789 790 for (i = 0; i < OHCI_HASH_SIZE; i++) 791 LIST_INIT(&sc->sc_hash_tds[i]); 792 for (i = 0; i < OHCI_HASH_SIZE; i++) 793 LIST_INIT(&sc->sc_hash_itds[i]); 794 795 sc->sc_xferpool = pool_cache_init(sizeof(struct ohci_xfer), 0, 0, 0, 796 "ohcixfer", NULL, IPL_USB, NULL, NULL, NULL); 797 798 rev = OREAD4(sc, OHCI_REVISION); 799 aprint_normal("OHCI version %d.%d%s\n", 800 OHCI_REV_HI(rev), OHCI_REV_LO(rev), 801 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 802 803 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 804 aprint_error_dev(sc->sc_dev, "unsupported OHCI revision\n"); 805 sc->sc_bus.ub_revision = USBREV_UNKNOWN; 806 return -1; 807 } 808 sc->sc_bus.ub_revision = USBREV_1_0; 809 sc->sc_bus.ub_usedma = true; 810 811 /* XXX determine alignment by R/W */ 812 /* Allocate the HCCA area. */ 813 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 814 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 815 if (err) { 816 sc->sc_hcca = NULL; 817 return err; 818 } 819 sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0); 820 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 821 822 sc->sc_eintrs = OHCI_NORMAL_INTRS; 823 824 /* Allocate dummy ED that starts the control list. */ 825 sc->sc_ctrl_head = ohci_alloc_sed(sc); 826 if (sc->sc_ctrl_head == NULL) { 827 err = ENOMEM; 828 goto bad1; 829 } 830 sc->sc_ctrl_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 831 832 /* Allocate dummy ED that starts the bulk list. */ 833 sc->sc_bulk_head = ohci_alloc_sed(sc); 834 if (sc->sc_bulk_head == NULL) { 835 err = ENOMEM; 836 goto bad2; 837 } 838 sc->sc_bulk_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 839 usb_syncmem(&sc->sc_bulk_head->dma, sc->sc_bulk_head->offs, 840 sizeof(sc->sc_bulk_head->ed), 841 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 842 843 /* Allocate dummy ED that starts the isochronous list. */ 844 sc->sc_isoc_head = ohci_alloc_sed(sc); 845 if (sc->sc_isoc_head == NULL) { 846 err = ENOMEM; 847 goto bad3; 848 } 849 sc->sc_isoc_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 850 usb_syncmem(&sc->sc_isoc_head->dma, sc->sc_isoc_head->offs, 851 sizeof(sc->sc_isoc_head->ed), 852 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 853 854 /* Allocate all the dummy EDs that make up the interrupt tree. */ 855 for (i = 0; i < OHCI_NO_EDS; i++) { 856 sed = ohci_alloc_sed(sc); 857 if (sed == NULL) { 858 while (--i >= 0) 859 ohci_free_sed(sc, sc->sc_eds[i]); 860 err = ENOMEM; 861 goto bad4; 862 } 863 /* All ED fields are set to 0. */ 864 sc->sc_eds[i] = sed; 865 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 866 if (i != 0) 867 psed = sc->sc_eds[(i-1) / 2]; 868 else 869 psed= sc->sc_isoc_head; 870 sed->next = psed; 871 sed->ed.ed_nexted = HTOO32(psed->physaddr); 872 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 873 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 874 } 875 /* 876 * Fill HCCA interrupt table. The bit reversal is to get 877 * the tree set up properly to spread the interrupts. 878 */ 879 for (i = 0; i < OHCI_NO_INTRS; i++) 880 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 881 HTOO32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 882 usb_syncmem(&sc->sc_hccadma, 0, OHCI_HCCA_SIZE, 883 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 884 885 #ifdef OHCI_DEBUG 886 DPRINTFN(15, "--- dump start ---", 0, 0, 0 ,0); 887 if (ohcidebug >= 15) { 888 for (i = 0; i < OHCI_NO_EDS; i++) { 889 DPRINTFN(15, "ed#%d ", i, 0, 0, 0); 890 ohci_dump_ed(sc, sc->sc_eds[i]); 891 } 892 DPRINTFN(15, "iso", 0, 0, 0 ,0); 893 ohci_dump_ed(sc, sc->sc_isoc_head); 894 } 895 DPRINTFN(15, "--- dump end ---", 0, 0, 0 ,0); 896 #endif 897 898 /* Preserve values programmed by SMM/BIOS but lost over reset. */ 899 ctl = OREAD4(sc, OHCI_CONTROL); 900 rwc = ctl & OHCI_RWC; 901 fm = OREAD4(sc, OHCI_FM_INTERVAL); 902 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 903 /* descb = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); */ 904 905 /* Determine in what context we are running. */ 906 if (ctl & OHCI_IR) { 907 /* SMM active, request change */ 908 DPRINTF("SMM active, request owner change", 0, 0, 0, 0); 909 if ((sc->sc_intre & (OHCI_OC | OHCI_MIE)) == 910 (OHCI_OC | OHCI_MIE)) 911 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_MIE); 912 s = OREAD4(sc, OHCI_COMMAND_STATUS); 913 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 914 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 915 usb_delay_ms(&sc->sc_bus, 1); 916 ctl = OREAD4(sc, OHCI_CONTROL); 917 } 918 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_MIE); 919 if ((ctl & OHCI_IR) == 0) { 920 aprint_error_dev(sc->sc_dev, 921 "SMM does not respond, resetting\n"); 922 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 923 goto reset; 924 } 925 #if 0 926 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */ 927 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 928 /* BIOS started controller. */ 929 DPRINTF("BIOS active", 0, 0, 0, 0); 930 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 931 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL | rwc); 932 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 933 } 934 #endif 935 } else { 936 DPRINTF("cold started", 0 ,0 ,0 ,0); 937 reset: 938 /* Controller was cold started. */ 939 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 940 } 941 942 /* 943 * This reset should not be necessary according to the OHCI spec, but 944 * without it some controllers do not start. 945 */ 946 DPRINTF("sc %p: resetting", sc, 0, 0, 0); 947 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 948 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 949 950 /* We now own the host controller and the bus has been reset. */ 951 952 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 953 /* Nominal time for a reset is 10 us. */ 954 for (i = 0; i < 10; i++) { 955 delay(10); 956 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 957 if (!hcr) 958 break; 959 } 960 if (hcr) { 961 aprint_error_dev(sc->sc_dev, "reset timeout\n"); 962 err = EIO; 963 goto bad5; 964 } 965 #ifdef OHCI_DEBUG 966 if (ohcidebug >= 15) 967 ohci_dumpregs(sc); 968 #endif 969 970 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 971 972 /* Set up HC registers. */ 973 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 974 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 975 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 976 /* disable all interrupts and then switch on all desired interrupts */ 977 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 978 /* switch on desired functional features */ 979 ctl = OREAD4(sc, OHCI_CONTROL); 980 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 981 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 982 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL | rwc; 983 /* And finally start it! */ 984 OWRITE4(sc, OHCI_CONTROL, ctl); 985 986 /* 987 * The controller is now OPERATIONAL. Set a some final 988 * registers that should be set earlier, but that the 989 * controller ignores when in the SUSPEND state. 990 */ 991 ival = OHCI_GET_IVAL(fm); 992 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 993 fm |= OHCI_FSMPS(ival) | ival; 994 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 995 per = OHCI_PERIODIC(ival); /* 90% periodic */ 996 OWRITE4(sc, OHCI_PERIODIC_START, per); 997 998 if (sc->sc_flags & OHCIF_SUPERIO) { 999 /* no overcurrent protection */ 1000 desca |= OHCI_NOCP; 1001 /* 1002 * Clear NoPowerSwitching and PowerOnToPowerGoodTime meaning 1003 * that 1004 * - ports are always power switched 1005 * - don't wait for powered root hub port 1006 */ 1007 desca &= ~(__SHIFTIN(0xff, OHCI_POTPGT_MASK) | OHCI_NPS); 1008 } 1009 1010 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */ 1011 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP); 1012 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 1013 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY); 1014 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca); 1015 1016 /* 1017 * The AMD756 requires a delay before re-reading the register, 1018 * otherwise it will occasionally report 0 ports. 1019 */ 1020 sc->sc_noport = 0; 1021 for (i = 0; i < 10 && sc->sc_noport == 0; i++) { 1022 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY); 1023 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 1024 } 1025 1026 #ifdef OHCI_DEBUG 1027 if (ohcidebug >= 5) 1028 ohci_dumpregs(sc); 1029 #endif 1030 1031 /* Set up the bus struct. */ 1032 sc->sc_bus.ub_methods = &ohci_bus_methods; 1033 sc->sc_bus.ub_pipesize = sizeof(struct ohci_pipe); 1034 1035 sc->sc_control = sc->sc_intre = 0; 1036 1037 /* Finally, turn on interrupts. */ 1038 DPRINTF("enabling %#x", sc->sc_eintrs | OHCI_MIE, 0, 0, 0); 1039 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 1040 1041 return 0; 1042 1043 bad5: 1044 for (i = 0; i < OHCI_NO_EDS; i++) 1045 ohci_free_sed(sc, sc->sc_eds[i]); 1046 bad4: 1047 ohci_free_sed(sc, sc->sc_isoc_head); 1048 bad3: 1049 ohci_free_sed(sc, sc->sc_bulk_head); 1050 bad2: 1051 ohci_free_sed(sc, sc->sc_ctrl_head); 1052 bad1: 1053 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 1054 sc->sc_hcca = NULL; 1055 return err; 1056 } 1057 1058 struct usbd_xfer * 1059 ohci_allocx(struct usbd_bus *bus, unsigned int nframes) 1060 { 1061 ohci_softc_t *sc = OHCI_BUS2SC(bus); 1062 struct usbd_xfer *xfer; 1063 1064 xfer = pool_cache_get(sc->sc_xferpool, PR_NOWAIT); 1065 if (xfer != NULL) { 1066 memset(xfer, 0, sizeof(struct ohci_xfer)); 1067 #ifdef DIAGNOSTIC 1068 xfer->ux_state = XFER_BUSY; 1069 #endif 1070 } 1071 return xfer; 1072 } 1073 1074 void 1075 ohci_freex(struct usbd_bus *bus, struct usbd_xfer *xfer) 1076 { 1077 ohci_softc_t *sc = OHCI_BUS2SC(bus); 1078 1079 KASSERTMSG(xfer->ux_state == XFER_BUSY, 1080 "xfer=%p not busy, 0x%08x\n", xfer, xfer->ux_state); 1081 #ifdef DIAGNOSTIC 1082 xfer->ux_state = XFER_FREE; 1083 #endif 1084 pool_cache_put(sc->sc_xferpool, xfer); 1085 } 1086 1087 Static void 1088 ohci_get_lock(struct usbd_bus *bus, kmutex_t **lock) 1089 { 1090 ohci_softc_t *sc = OHCI_BUS2SC(bus); 1091 1092 *lock = &sc->sc_lock; 1093 } 1094 1095 /* 1096 * Shut down the controller when the system is going down. 1097 */ 1098 bool 1099 ohci_shutdown(device_t self, int flags) 1100 { 1101 ohci_softc_t *sc = device_private(self); 1102 1103 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1104 1105 DPRINTF("stopping the HC", 0, 0, 0, 0); 1106 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1107 return true; 1108 } 1109 1110 bool 1111 ohci_resume(device_t dv, const pmf_qual_t *qual) 1112 { 1113 ohci_softc_t *sc = device_private(dv); 1114 uint32_t ctl; 1115 1116 mutex_spin_enter(&sc->sc_intr_lock); 1117 sc->sc_bus.ub_usepolling++; 1118 mutex_spin_exit(&sc->sc_intr_lock); 1119 1120 /* Some broken BIOSes do not recover these values */ 1121 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 1122 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, 1123 sc->sc_ctrl_head->physaddr); 1124 OWRITE4(sc, OHCI_BULK_HEAD_ED, 1125 sc->sc_bulk_head->physaddr); 1126 if (sc->sc_intre) 1127 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_intre & 1128 (OHCI_ALL_INTRS | OHCI_MIE)); 1129 if (sc->sc_control) 1130 ctl = sc->sc_control; 1131 else 1132 ctl = OREAD4(sc, OHCI_CONTROL); 1133 ctl |= OHCI_HCFS_RESUME; 1134 OWRITE4(sc, OHCI_CONTROL, ctl); 1135 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 1136 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL; 1137 OWRITE4(sc, OHCI_CONTROL, ctl); 1138 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 1139 sc->sc_control = sc->sc_intre = 0; 1140 1141 mutex_spin_enter(&sc->sc_intr_lock); 1142 sc->sc_bus.ub_usepolling--; 1143 mutex_spin_exit(&sc->sc_intr_lock); 1144 1145 return true; 1146 } 1147 1148 bool 1149 ohci_suspend(device_t dv, const pmf_qual_t *qual) 1150 { 1151 ohci_softc_t *sc = device_private(dv); 1152 uint32_t ctl; 1153 1154 mutex_spin_enter(&sc->sc_intr_lock); 1155 sc->sc_bus.ub_usepolling++; 1156 mutex_spin_exit(&sc->sc_intr_lock); 1157 1158 ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK; 1159 if (sc->sc_control == 0) { 1160 /* 1161 * Preserve register values, in case that BIOS 1162 * does not recover them. 1163 */ 1164 sc->sc_control = ctl; 1165 sc->sc_intre = OREAD4(sc, 1166 OHCI_INTERRUPT_ENABLE); 1167 } 1168 ctl |= OHCI_HCFS_SUSPEND; 1169 OWRITE4(sc, OHCI_CONTROL, ctl); 1170 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1171 1172 mutex_spin_enter(&sc->sc_intr_lock); 1173 sc->sc_bus.ub_usepolling--; 1174 mutex_spin_exit(&sc->sc_intr_lock); 1175 1176 return true; 1177 } 1178 1179 #ifdef OHCI_DEBUG 1180 void 1181 ohci_dumpregs(ohci_softc_t *sc) 1182 { 1183 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1184 1185 DPRINTF("rev=0x%08x control=0x%08x command=0x%08x", 1186 OREAD4(sc, OHCI_REVISION), 1187 OREAD4(sc, OHCI_CONTROL), 1188 OREAD4(sc, OHCI_COMMAND_STATUS), 0); 1189 DPRINTF(" intrstat=0x%08x intre=0x%08x intrd=0x%08x", 1190 OREAD4(sc, OHCI_INTERRUPT_STATUS), 1191 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 1192 OREAD4(sc, OHCI_INTERRUPT_DISABLE), 0); 1193 DPRINTF(" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x", 1194 OREAD4(sc, OHCI_HCCA), 1195 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 1196 OREAD4(sc, OHCI_CONTROL_HEAD_ED), 0); 1197 DPRINTF(" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x", 1198 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 1199 OREAD4(sc, OHCI_BULK_HEAD_ED), 1200 OREAD4(sc, OHCI_BULK_CURRENT_ED) ,0); 1201 DPRINTF(" done=0x%08x fmival=0x%08x fmrem=0x%08x", 1202 OREAD4(sc, OHCI_DONE_HEAD), 1203 OREAD4(sc, OHCI_FM_INTERVAL), 1204 OREAD4(sc, OHCI_FM_REMAINING), 0); 1205 DPRINTF(" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x", 1206 OREAD4(sc, OHCI_FM_NUMBER), 1207 OREAD4(sc, OHCI_PERIODIC_START), 1208 OREAD4(sc, OHCI_LS_THRESHOLD), 0); 1209 DPRINTF(" desca=0x%08x descb=0x%08x stat=0x%08x", 1210 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 1211 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 1212 OREAD4(sc, OHCI_RH_STATUS), 0); 1213 DPRINTF(" port1=0x%08x port2=0x%08x", 1214 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 1215 OREAD4(sc, OHCI_RH_PORT_STATUS(2)), 0, 0); 1216 DPRINTF(" HCCA: frame_number=0x%04x done_head=0x%08x", 1217 O32TOH(sc->sc_hcca->hcca_frame_number), 1218 O32TOH(sc->sc_hcca->hcca_done_head), 0, 0); 1219 } 1220 #endif 1221 1222 Static int ohci_intr1(ohci_softc_t *); 1223 1224 int 1225 ohci_intr(void *p) 1226 { 1227 ohci_softc_t *sc = p; 1228 int ret = 0; 1229 1230 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1231 1232 if (sc == NULL) 1233 return 0; 1234 1235 mutex_spin_enter(&sc->sc_intr_lock); 1236 1237 if (sc->sc_dying || !device_has_power(sc->sc_dev)) 1238 goto done; 1239 1240 /* If we get an interrupt while polling, then just ignore it. */ 1241 if (sc->sc_bus.ub_usepolling) { 1242 DPRINTFN(16, "ignored interrupt while polling", 0, 0, 0, 0); 1243 /* for level triggered intrs, should do something to ack */ 1244 OWRITE4(sc, OHCI_INTERRUPT_STATUS, 1245 OREAD4(sc, OHCI_INTERRUPT_STATUS)); 1246 1247 goto done; 1248 } 1249 1250 ret = ohci_intr1(sc); 1251 1252 done: 1253 mutex_spin_exit(&sc->sc_intr_lock); 1254 return ret; 1255 } 1256 1257 Static int 1258 ohci_intr1(ohci_softc_t *sc) 1259 { 1260 uint32_t intrs, eintrs; 1261 1262 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1263 1264 /* In case the interrupt occurs before initialization has completed. */ 1265 if (sc == NULL || sc->sc_hcca == NULL) { 1266 #ifdef DIAGNOSTIC 1267 printf("ohci_intr: sc->sc_hcca == NULL\n"); 1268 #endif 1269 return 0; 1270 } 1271 1272 KASSERT(mutex_owned(&sc->sc_intr_lock)); 1273 1274 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1275 if (!intrs) 1276 return 0; 1277 1278 /* Acknowledge */ 1279 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs & ~(OHCI_MIE|OHCI_WDH)); 1280 eintrs = intrs & sc->sc_eintrs; 1281 DPRINTFN(7, "sc=%p", sc, 0, 0, 0); 1282 DPRINTFN(7, "intrs=%#x(%#x) eintrs=%#x(%#x)", 1283 intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), eintrs, 1284 sc->sc_eintrs); 1285 1286 if (!eintrs) { 1287 return 0; 1288 } 1289 1290 if (eintrs & OHCI_SO) { 1291 sc->sc_overrun_cnt++; 1292 if (usbd_ratecheck(&sc->sc_overrun_ntc)) { 1293 printf("%s: %u scheduling overruns\n", 1294 device_xname(sc->sc_dev), sc->sc_overrun_cnt); 1295 sc->sc_overrun_cnt = 0; 1296 } 1297 /* XXX do what */ 1298 eintrs &= ~OHCI_SO; 1299 } 1300 if (eintrs & OHCI_WDH) { 1301 /* 1302 * We block the interrupt below, and reenable it later from 1303 * ohci_softintr(). 1304 */ 1305 usb_schedsoftintr(&sc->sc_bus); 1306 } 1307 if (eintrs & OHCI_RD) { 1308 DPRINTFN(5, "resume detect", sc, 0, 0, 0); 1309 printf("%s: resume detect\n", device_xname(sc->sc_dev)); 1310 /* XXX process resume detect */ 1311 } 1312 if (eintrs & OHCI_UE) { 1313 DPRINTFN(5, "unrecoverable error", sc, 0, 0, 0); 1314 printf("%s: unrecoverable error, controller halted\n", 1315 device_xname(sc->sc_dev)); 1316 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1317 /* XXX what else */ 1318 } 1319 if (eintrs & OHCI_RHSC) { 1320 /* 1321 * We block the interrupt below, and reenable it later from 1322 * a timeout. 1323 */ 1324 softint_schedule(sc->sc_rhsc_si); 1325 } 1326 1327 if (eintrs != 0) { 1328 /* Block unprocessed interrupts. */ 1329 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs); 1330 sc->sc_eintrs &= ~eintrs; 1331 DPRINTF("sc %p blocking intrs 0x%x", sc, eintrs, 0, 0); 1332 } 1333 1334 return 1; 1335 } 1336 1337 void 1338 ohci_rhsc_enable(void *v_sc) 1339 { 1340 ohci_softc_t *sc = v_sc; 1341 1342 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1343 DPRINTF("sc %p", sc, 0, 0, 0); 1344 mutex_spin_enter(&sc->sc_intr_lock); 1345 sc->sc_eintrs |= OHCI_RHSC; 1346 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1347 mutex_spin_exit(&sc->sc_intr_lock); 1348 } 1349 1350 #ifdef OHCI_DEBUG 1351 const char *ohci_cc_strs[] = { 1352 "NO_ERROR", 1353 "CRC", 1354 "BIT_STUFFING", 1355 "DATA_TOGGLE_MISMATCH", 1356 "STALL", 1357 "DEVICE_NOT_RESPONDING", 1358 "PID_CHECK_FAILURE", 1359 "UNEXPECTED_PID", 1360 "DATA_OVERRUN", 1361 "DATA_UNDERRUN", 1362 "BUFFER_OVERRUN", 1363 "BUFFER_UNDERRUN", 1364 "reserved", 1365 "reserved", 1366 "NOT_ACCESSED", 1367 "NOT_ACCESSED", 1368 }; 1369 #endif 1370 1371 void 1372 ohci_softintr(void *v) 1373 { 1374 struct usbd_bus *bus = v; 1375 ohci_softc_t *sc = OHCI_BUS2SC(bus); 1376 ohci_soft_itd_t *sitd, *sidone, *sitdnext; 1377 ohci_soft_td_t *std, *sdone, *stdnext; 1378 struct usbd_xfer *xfer; 1379 struct ohci_pipe *opipe; 1380 int len, cc; 1381 int i, j, actlen, iframes, uedir; 1382 ohci_physaddr_t done; 1383 1384 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1385 1386 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1387 1388 usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head), 1389 sizeof(sc->sc_hcca->hcca_done_head), 1390 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1391 done = O32TOH(sc->sc_hcca->hcca_done_head) & ~OHCI_DONE_INTRS; 1392 sc->sc_hcca->hcca_done_head = 0; 1393 usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head), 1394 sizeof(sc->sc_hcca->hcca_done_head), 1395 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1396 OWRITE4(sc, OHCI_INTERRUPT_STATUS, OHCI_WDH); 1397 sc->sc_eintrs |= OHCI_WDH; 1398 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_WDH); 1399 1400 /* Reverse the done list. */ 1401 for (sdone = NULL, sidone = NULL; done != 0; ) { 1402 std = ohci_hash_find_td(sc, done); 1403 if (std != NULL) { 1404 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 1405 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1406 std->dnext = sdone; 1407 done = O32TOH(std->td.td_nexttd); 1408 sdone = std; 1409 DPRINTFN(10, "add TD %p", std, 0, 0, 0); 1410 continue; 1411 } 1412 sitd = ohci_hash_find_itd(sc, done); 1413 if (sitd != NULL) { 1414 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 1415 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1416 sitd->dnext = sidone; 1417 done = O32TOH(sitd->itd.itd_nextitd); 1418 sidone = sitd; 1419 DPRINTFN(5, "add ITD %p", sitd, 0, 0, 0); 1420 continue; 1421 } 1422 DPRINTFN(10, "addr %p not found", done, 0, 0, 0); 1423 device_printf(sc->sc_dev, "WARNING: addr 0x%08lx not found\n", 1424 (u_long)done); 1425 break; 1426 } 1427 1428 DPRINTFN(10, "sdone=%p sidone=%p", sdone, sidone, 0, 0); 1429 DPRINTFN(10, "--- TD dump start ---", 0, 0, 0, 0); 1430 #ifdef OHCI_DEBUG 1431 if (ohcidebug >= 10) { 1432 for (std = sdone; std; std = std->dnext) 1433 ohci_dump_td(sc, std); 1434 } 1435 #endif 1436 DPRINTFN(10, "--- TD dump end ---", 0, 0, 0, 0); 1437 1438 for (std = sdone; std; std = stdnext) { 1439 xfer = std->xfer; 1440 stdnext = std->dnext; 1441 DPRINTFN(10, "std=%p xfer=%p hcpriv=%p", std, xfer, 1442 xfer ? xfer->ux_hcpriv : 0, 0); 1443 if (xfer == NULL) { 1444 /* 1445 * xfer == NULL: There seems to be no xfer associated 1446 * with this TD. It is tailp that happened to end up on 1447 * the done queue. 1448 * Shouldn't happen, but some chips are broken(?). 1449 */ 1450 continue; 1451 } 1452 if (xfer->ux_status == USBD_CANCELLED || 1453 xfer->ux_status == USBD_TIMEOUT) { 1454 DPRINTF("cancel/timeout %p", xfer, 0, 0, 0); 1455 /* Handled by abort routine. */ 1456 continue; 1457 } 1458 callout_stop(&xfer->ux_callout); 1459 1460 len = std->len; 1461 if (std->td.td_cbp != 0) 1462 len -= O32TOH(std->td.td_be) - 1463 O32TOH(std->td.td_cbp) + 1; 1464 DPRINTFN(10, "len=%d, flags=0x%x", len, std->flags, 0, 0); 1465 if (std->flags & OHCI_ADD_LEN) 1466 xfer->ux_actlen += len; 1467 1468 cc = OHCI_TD_GET_CC(O32TOH(std->td.td_flags)); 1469 if (cc == OHCI_CC_NO_ERROR) { 1470 ohci_hash_rem_td(sc, std); 1471 if (std->flags & OHCI_CALL_DONE) { 1472 xfer->ux_status = USBD_NORMAL_COMPLETION; 1473 usb_transfer_complete(xfer); 1474 } 1475 } else { 1476 /* 1477 * Endpoint is halted. First unlink all the TDs 1478 * belonging to the failed transfer, and then restart 1479 * the endpoint. 1480 */ 1481 ohci_soft_td_t *p, *n; 1482 opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 1483 1484 DPRINTFN(10, "error cc=%d", cc, 0, 0, 0); 1485 1486 /* remove xfer's TDs from the hash */ 1487 for (p = std; p->xfer == xfer; p = n) { 1488 n = p->nexttd; 1489 ohci_hash_rem_td(sc, p); 1490 } 1491 1492 ohci_soft_ed_t *sed = opipe->sed; 1493 1494 /* clear halt and TD chain */ 1495 sed->ed.ed_headp = HTOO32(p->physaddr); 1496 usb_syncmem(&sed->dma, 1497 sed->offs + offsetof(ohci_ed_t, ed_headp), 1498 sizeof(sed->ed.ed_headp), 1499 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1500 1501 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1502 1503 if (cc == OHCI_CC_DATA_UNDERRUN) 1504 xfer->ux_status = USBD_NORMAL_COMPLETION; 1505 else if (cc == OHCI_CC_STALL) 1506 xfer->ux_status = USBD_STALLED; 1507 else 1508 xfer->ux_status = USBD_IOERROR; 1509 usb_transfer_complete(xfer); 1510 } 1511 } 1512 DPRINTFN(10, "--- ITD dump start ---", 0, 0, 0, 0); 1513 #ifdef OHCI_DEBUG 1514 if (ohcidebug >= 10) { 1515 for (sitd = sidone; sitd; sitd = sitd->dnext) 1516 ohci_dump_itd(sc, sitd); 1517 } 1518 #endif 1519 DPRINTFN(10, "--- ITD dump end ---", 0, 0, 0, 0); 1520 1521 for (sitd = sidone; sitd != NULL; sitd = sitdnext) { 1522 xfer = sitd->xfer; 1523 sitdnext = sitd->dnext; 1524 DPRINTFN(1, "sitd=%p xfer=%p hcpriv=%p", sitd, xfer, 1525 xfer ? xfer->ux_hcpriv : 0, 0); 1526 if (xfer == NULL) 1527 continue; 1528 if (xfer->ux_status == USBD_CANCELLED || 1529 xfer->ux_status == USBD_TIMEOUT) { 1530 DPRINTF("cancel/timeout %p", xfer, 0, 0, 0); 1531 /* Handled by abort routine. */ 1532 continue; 1533 } 1534 KASSERT(!sitd->isdone); 1535 #ifdef DIAGNOSTIC 1536 sitd->isdone = true; 1537 #endif 1538 if (sitd->flags & OHCI_CALL_DONE) { 1539 ohci_soft_itd_t *next; 1540 1541 opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 1542 opipe->isoc.inuse -= xfer->ux_nframes; 1543 uedir = UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc-> 1544 bEndpointAddress); 1545 xfer->ux_status = USBD_NORMAL_COMPLETION; 1546 actlen = 0; 1547 for (i = 0, sitd = xfer->ux_hcpriv;; 1548 sitd = next) { 1549 next = sitd->nextitd; 1550 if (OHCI_ITD_GET_CC(O32TOH(sitd-> 1551 itd.itd_flags)) != OHCI_CC_NO_ERROR) 1552 xfer->ux_status = USBD_IOERROR; 1553 /* For input, update frlengths with actual */ 1554 /* XXX anything necessary for output? */ 1555 if (uedir == UE_DIR_IN && 1556 xfer->ux_status == USBD_NORMAL_COMPLETION) { 1557 iframes = OHCI_ITD_GET_FC(O32TOH( 1558 sitd->itd.itd_flags)); 1559 for (j = 0; j < iframes; i++, j++) { 1560 len = O16TOH(sitd-> 1561 itd.itd_offset[j]); 1562 if ((OHCI_ITD_PSW_GET_CC(len) & 1563 OHCI_CC_NOT_ACCESSED_MASK) 1564 == OHCI_CC_NOT_ACCESSED) 1565 len = 0; 1566 else 1567 len = OHCI_ITD_PSW_LENGTH(len); 1568 xfer->ux_frlengths[i] = len; 1569 actlen += len; 1570 } 1571 } 1572 if (sitd->flags & OHCI_CALL_DONE) 1573 break; 1574 ohci_hash_rem_itd(sc, sitd); 1575 1576 } 1577 ohci_hash_rem_itd(sc, sitd); 1578 if (uedir == UE_DIR_IN && 1579 xfer->ux_status == USBD_NORMAL_COMPLETION) 1580 xfer->ux_actlen = actlen; 1581 xfer->ux_hcpriv = NULL; 1582 1583 usb_transfer_complete(xfer); 1584 } 1585 } 1586 1587 if (sc->sc_softwake) { 1588 sc->sc_softwake = 0; 1589 cv_broadcast(&sc->sc_softwake_cv); 1590 } 1591 1592 DPRINTFN(10, "done", 0, 0, 0, 0); 1593 } 1594 1595 void 1596 ohci_device_ctrl_done(struct usbd_xfer *xfer) 1597 { 1598 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 1599 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 1600 int len = UGETW(xfer->ux_request.wLength); 1601 int isread = (xfer->ux_request.bmRequestType & UT_READ); 1602 1603 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1604 DPRINTFN(10, "xfer=%p", xfer, 0, 0, 0); 1605 1606 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1607 KASSERT(xfer->ux_rqflags & URQ_REQUEST); 1608 1609 if (len) 1610 usb_syncmem(&xfer->ux_dmabuf, 0, len, 1611 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1612 usb_syncmem(&opipe->ctrl.reqdma, 0, 1613 sizeof(usb_device_request_t), BUS_DMASYNC_POSTWRITE); 1614 } 1615 1616 void 1617 ohci_device_intr_done(struct usbd_xfer *xfer) 1618 { 1619 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 1620 int isread = 1621 (UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress) == UE_DIR_IN); 1622 1623 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1624 DPRINTFN(10, "xfer=%p, actlen=%d", xfer, xfer->ux_actlen, 0, 0); 1625 1626 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1627 1628 usb_syncmem(&xfer->ux_dmabuf, 0, xfer->ux_length, 1629 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1630 } 1631 1632 void 1633 ohci_device_bulk_done(struct usbd_xfer *xfer) 1634 { 1635 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 1636 1637 int isread = 1638 (UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress) == UE_DIR_IN); 1639 1640 KASSERT(mutex_owned(&sc->sc_lock)); 1641 1642 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1643 DPRINTFN(10, "xfer=%p, actlen=%d", xfer, xfer->ux_actlen, 0, 0); 1644 usb_syncmem(&xfer->ux_dmabuf, 0, xfer->ux_length, 1645 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1646 } 1647 1648 Static void 1649 ohci_rhsc_softint(void *arg) 1650 { 1651 ohci_softc_t *sc = arg; 1652 1653 mutex_enter(&sc->sc_lock); 1654 1655 ohci_rhsc(sc, sc->sc_intrxfer); 1656 1657 /* Do not allow RHSC interrupts > 1 per second */ 1658 callout_reset(&sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc); 1659 1660 mutex_exit(&sc->sc_lock); 1661 } 1662 1663 void 1664 ohci_rhsc(ohci_softc_t *sc, struct usbd_xfer *xfer) 1665 { 1666 u_char *p; 1667 int i, m; 1668 int hstatus __unused; 1669 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1670 1671 KASSERT(mutex_owned(&sc->sc_lock)); 1672 1673 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1674 DPRINTF("sc=%p xfer=%p hstatus=0x%08x", sc, xfer, hstatus, 0); 1675 1676 if (xfer == NULL) { 1677 /* Just ignore the change. */ 1678 return; 1679 } 1680 1681 p = xfer->ux_buf; 1682 m = min(sc->sc_noport, xfer->ux_length * 8 - 1); 1683 memset(p, 0, xfer->ux_length); 1684 for (i = 1; i <= m; i++) { 1685 /* Pick out CHANGE bits from the status reg. */ 1686 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1687 p[i/8] |= 1 << (i%8); 1688 } 1689 DPRINTF("change=0x%02x", *p, 0, 0, 0); 1690 xfer->ux_actlen = xfer->ux_length; 1691 xfer->ux_status = USBD_NORMAL_COMPLETION; 1692 1693 usb_transfer_complete(xfer); 1694 } 1695 1696 void 1697 ohci_root_intr_done(struct usbd_xfer *xfer) 1698 { 1699 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 1700 1701 KASSERT(mutex_owned(&sc->sc_lock)); 1702 1703 KASSERT(sc->sc_intrxfer == xfer); 1704 sc->sc_intrxfer = NULL; 1705 } 1706 1707 /* 1708 * Wait here until controller claims to have an interrupt. 1709 * Then call ohci_intr and return. Use timeout to avoid waiting 1710 * too long. 1711 */ 1712 void 1713 ohci_waitintr(ohci_softc_t *sc, struct usbd_xfer *xfer) 1714 { 1715 int timo; 1716 uint32_t intrs; 1717 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1718 1719 mutex_enter(&sc->sc_lock); 1720 1721 xfer->ux_status = USBD_IN_PROGRESS; 1722 for (timo = xfer->ux_timeout; timo >= 0; timo--) { 1723 usb_delay_ms(&sc->sc_bus, 1); 1724 if (sc->sc_dying) 1725 break; 1726 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 1727 DPRINTFN(15, "intrs 0x%04x", intrs, 0, 0, 0); 1728 #ifdef OHCI_DEBUG 1729 if (ohcidebug > 15) 1730 ohci_dumpregs(sc); 1731 #endif 1732 if (intrs) { 1733 mutex_spin_enter(&sc->sc_intr_lock); 1734 ohci_intr1(sc); 1735 mutex_spin_exit(&sc->sc_intr_lock); 1736 if (xfer->ux_status != USBD_IN_PROGRESS) 1737 goto done; 1738 } 1739 } 1740 1741 /* Timeout */ 1742 DPRINTF("timeout", 0, 0, 0, 0); 1743 xfer->ux_status = USBD_TIMEOUT; 1744 usb_transfer_complete(xfer); 1745 1746 done: 1747 mutex_exit(&sc->sc_lock); 1748 } 1749 1750 void 1751 ohci_poll(struct usbd_bus *bus) 1752 { 1753 ohci_softc_t *sc = OHCI_BUS2SC(bus); 1754 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1755 1756 #ifdef OHCI_DEBUG 1757 static int last; 1758 int new; 1759 new = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1760 if (new != last) { 1761 DPRINTFN(10, "intrs=0x%04x", new, 0, 0, 0); 1762 last = new; 1763 } 1764 #endif 1765 sc->sc_eintrs |= OHCI_WDH; 1766 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) { 1767 mutex_spin_enter(&sc->sc_intr_lock); 1768 ohci_intr1(sc); 1769 mutex_spin_exit(&sc->sc_intr_lock); 1770 } 1771 } 1772 1773 /* 1774 * Add an ED to the schedule. Called with USB lock held. 1775 */ 1776 Static void 1777 ohci_add_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1778 { 1779 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1780 DPRINTFN(8, "sed=%p head=%p", sed, head, 0, 0); 1781 1782 KASSERT(mutex_owned(&sc->sc_lock)); 1783 1784 usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted), 1785 sizeof(head->ed.ed_nexted), 1786 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1787 sed->next = head->next; 1788 sed->ed.ed_nexted = head->ed.ed_nexted; 1789 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted), 1790 sizeof(sed->ed.ed_nexted), 1791 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1792 head->next = sed; 1793 head->ed.ed_nexted = HTOO32(sed->physaddr); 1794 usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted), 1795 sizeof(head->ed.ed_nexted), 1796 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1797 } 1798 1799 /* 1800 * Remove an ED from the schedule. Called with USB lock held. 1801 */ 1802 Static void 1803 ohci_rem_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1804 { 1805 ohci_soft_ed_t *p; 1806 1807 KASSERT(mutex_owned(&sc->sc_lock)); 1808 1809 /* XXX */ 1810 for (p = head; p != NULL && p->next != sed; p = p->next) 1811 ; 1812 KASSERT(p != NULL); 1813 1814 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted), 1815 sizeof(sed->ed.ed_nexted), 1816 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1817 p->next = sed->next; 1818 p->ed.ed_nexted = sed->ed.ed_nexted; 1819 usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted), 1820 sizeof(p->ed.ed_nexted), 1821 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1822 } 1823 1824 /* 1825 * When a transfer is completed the TD is added to the done queue by 1826 * the host controller. This queue is the processed by software. 1827 * Unfortunately the queue contains the physical address of the TD 1828 * and we have no simple way to translate this back to a kernel address. 1829 * To make the translation possible (and fast) we use a hash table of 1830 * TDs currently in the schedule. The physical address is used as the 1831 * hash value. 1832 */ 1833 1834 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1835 /* Called with USB lock held. */ 1836 void 1837 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1838 { 1839 int h = HASH(std->physaddr); 1840 1841 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1842 1843 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1844 } 1845 1846 /* Called with USB lock held. */ 1847 void 1848 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1849 { 1850 1851 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1852 1853 LIST_REMOVE(std, hnext); 1854 } 1855 1856 ohci_soft_td_t * 1857 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a) 1858 { 1859 int h = HASH(a); 1860 ohci_soft_td_t *std; 1861 1862 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1863 std != NULL; 1864 std = LIST_NEXT(std, hnext)) 1865 if (std->physaddr == a) 1866 return std; 1867 return NULL; 1868 } 1869 1870 /* Called with USB lock held. */ 1871 void 1872 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1873 { 1874 int h = HASH(sitd->physaddr); 1875 1876 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1877 1878 KASSERT(mutex_owned(&sc->sc_lock)); 1879 1880 DPRINTFN(10, "sitd=%p physaddr=0x%08lx", sitd, (u_long)sitd->physaddr, 1881 0, 0); 1882 1883 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext); 1884 } 1885 1886 /* Called with USB lock held. */ 1887 void 1888 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1889 { 1890 1891 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1892 1893 KASSERT(mutex_owned(&sc->sc_lock)); 1894 1895 DPRINTFN(10, "sitd=%p physaddr=0x%08lx", sitd, (u_long)sitd->physaddr, 1896 0, 0); 1897 1898 LIST_REMOVE(sitd, hnext); 1899 } 1900 1901 ohci_soft_itd_t * 1902 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a) 1903 { 1904 int h = HASH(a); 1905 ohci_soft_itd_t *sitd; 1906 1907 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]); 1908 sitd != NULL; 1909 sitd = LIST_NEXT(sitd, hnext)) 1910 if (sitd->physaddr == a) 1911 return sitd; 1912 return NULL; 1913 } 1914 1915 void 1916 ohci_timeout(void *addr) 1917 { 1918 struct usbd_xfer *xfer = addr; 1919 struct ohci_xfer *oxfer = OHCI_XFER2OXFER(xfer); 1920 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 1921 1922 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1923 DPRINTF("oxfer=%p", oxfer, 0, 0, 0); 1924 1925 if (sc->sc_dying) { 1926 mutex_enter(&sc->sc_lock); 1927 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1928 mutex_exit(&sc->sc_lock); 1929 return; 1930 } 1931 1932 /* Execute the abort in a process context. */ 1933 usb_init_task(&oxfer->abort_task, ohci_timeout_task, addr, 1934 USB_TASKQ_MPSAFE); 1935 usb_add_task(xfer->ux_pipe->up_dev, &oxfer->abort_task, 1936 USB_TASKQ_HC); 1937 } 1938 1939 void 1940 ohci_timeout_task(void *addr) 1941 { 1942 struct usbd_xfer *xfer = addr; 1943 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 1944 1945 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1946 1947 DPRINTF("xfer=%p", xfer, 0, 0, 0); 1948 1949 mutex_enter(&sc->sc_lock); 1950 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1951 mutex_exit(&sc->sc_lock); 1952 } 1953 1954 #ifdef OHCI_DEBUG 1955 void 1956 ohci_dump_tds(ohci_softc_t *sc, ohci_soft_td_t *std) 1957 { 1958 for (; std; std = std->nexttd) { 1959 ohci_dump_td(sc, std); 1960 KASSERTMSG(std->nexttd == NULL || std != std->nexttd, 1961 "std %p next %p", std, std->nexttd); 1962 } 1963 } 1964 1965 void 1966 ohci_dump_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1967 { 1968 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1969 1970 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 1971 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1972 1973 uint32_t flags = O32TOH(std->td.td_flags); 1974 DPRINTF("TD(%p) at 0x%08lx:", std, (u_long)std->physaddr, 0, 0); 1975 DPRINTF(" round=%d DP=%x DI=%x T=%x", 1976 !!(flags & OHCI_TD_R), 1977 __SHIFTOUT(flags, OHCI_TD_DP_MASK), 1978 OHCI_TD_GET_DI(flags), 1979 __SHIFTOUT(flags, OHCI_TD_TOGGLE_MASK)); 1980 DPRINTF(" EC=%d CC=%d", OHCI_TD_GET_EC(flags), OHCI_TD_GET_CC(flags), 1981 0, 0); 1982 DPRINTF(" td_cbp=0x%08lx td_nexttd=0x%08lx td_be=0x%08lx", 1983 (u_long)O32TOH(std->td.td_cbp), 1984 (u_long)O32TOH(std->td.td_nexttd), 1985 (u_long)O32TOH(std->td.td_be), 0); 1986 } 1987 1988 void 1989 ohci_dump_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1990 { 1991 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1992 1993 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 1994 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1995 1996 uint32_t flags = O32TOH(sitd->itd.itd_flags); 1997 DPRINTF("ITD(%p) at 0x%08lx", sitd, (u_long)sitd->physaddr, 0, 0); 1998 DPRINTF(" sf=%d di=%d fc=%d cc=%d", 1999 OHCI_ITD_GET_SF(flags), OHCI_ITD_GET_DI(flags), 2000 OHCI_ITD_GET_FC(flags), OHCI_ITD_GET_CC(flags)); 2001 DPRINTF(" bp0=0x%08x next=0x%08x be=0x%08x", 2002 O32TOH(sitd->itd.itd_bp0), 2003 O32TOH(sitd->itd.itd_nextitd), 2004 O32TOH(sitd->itd.itd_be), 0); 2005 CTASSERT(OHCI_ITD_NOFFSET == 8); 2006 DPRINTF(" offs[0] = 0x%04x offs[1] = 0x%04x " 2007 "offs[2] = 0x%04x offs[3] = 0x%04x", 2008 O16TOH(sitd->itd.itd_offset[0]), 2009 O16TOH(sitd->itd.itd_offset[1]), 2010 O16TOH(sitd->itd.itd_offset[2]), 2011 O16TOH(sitd->itd.itd_offset[3])); 2012 DPRINTF(" offs[4] = 0x%04x offs[5] = 0x%04x " 2013 "offs[6] = 0x%04x offs[7] = 0x%04x", 2014 O16TOH(sitd->itd.itd_offset[4]), 2015 O16TOH(sitd->itd.itd_offset[5]), 2016 O16TOH(sitd->itd.itd_offset[6]), 2017 O16TOH(sitd->itd.itd_offset[7])); 2018 } 2019 2020 void 2021 ohci_dump_itds(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 2022 { 2023 for (; sitd; sitd = sitd->nextitd) 2024 ohci_dump_itd(sc, sitd); 2025 } 2026 2027 void 2028 ohci_dump_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 2029 { 2030 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2031 2032 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 2033 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2034 2035 uint32_t flags = O32TOH(sed->ed.ed_flags); 2036 DPRINTF("ED(%p) at 0x%08lx:", sed, sed->physaddr, 0, 0); 2037 DPRINTF(" addr=%d endpt=%d maxp=%d", 2038 OHCI_ED_GET_FA(flags), 2039 OHCI_ED_GET_EN(flags), 2040 OHCI_ED_GET_MAXP(flags), 2041 0); 2042 DPRINTF(" dir=%d speed=%d skip=%d iso=%d", 2043 __SHIFTOUT(flags, OHCI_ED_DIR_MASK), 2044 !!(flags & OHCI_ED_SPEED), 2045 !!(flags & OHCI_ED_SKIP), 2046 !!(flags & OHCI_ED_FORMAT_ISO)); 2047 DPRINTF(" tailp=0x%08lx", (u_long)O32TOH(sed->ed.ed_tailp), 2048 0, 0, 0); 2049 DPRINTF(" headp=0x%08lx nexted=0x%08lx halted=%d carry=%d", 2050 O32TOH(sed->ed.ed_headp), O32TOH(sed->ed.ed_nexted), 2051 !!(O32TOH(sed->ed.ed_headp) & OHCI_HALTED), 2052 !!(O32TOH(sed->ed.ed_headp) & OHCI_TOGGLECARRY)); 2053 } 2054 #endif 2055 2056 usbd_status 2057 ohci_open(struct usbd_pipe *pipe) 2058 { 2059 struct usbd_device *dev = pipe->up_dev; 2060 struct usbd_bus *bus = dev->ud_bus; 2061 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 2062 usb_endpoint_descriptor_t *ed = pipe->up_endpoint->ue_edesc; 2063 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 2064 uint8_t addr = dev->ud_addr; 2065 uint8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 2066 ohci_soft_ed_t *sed; 2067 ohci_soft_td_t *std; 2068 ohci_soft_itd_t *sitd; 2069 ohci_physaddr_t tdphys; 2070 uint32_t fmt; 2071 usbd_status err = USBD_NOMEM; 2072 int ival; 2073 2074 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2075 DPRINTFN(1, "pipe=%p, addr=%d, endpt=%d (%d)", pipe, addr, 2076 ed->bEndpointAddress, bus->ub_rhaddr); 2077 2078 if (sc->sc_dying) { 2079 return USBD_IOERROR; 2080 } 2081 2082 std = NULL; 2083 sed = NULL; 2084 2085 if (addr == bus->ub_rhaddr) { 2086 switch (ed->bEndpointAddress) { 2087 case USB_CONTROL_ENDPOINT: 2088 pipe->up_methods = &roothub_ctrl_methods; 2089 break; 2090 case UE_DIR_IN | USBROOTHUB_INTR_ENDPT: 2091 pipe->up_methods = &ohci_root_intr_methods; 2092 break; 2093 default: 2094 err = USBD_INVAL; 2095 goto bad; 2096 } 2097 } else { 2098 sed = ohci_alloc_sed(sc); 2099 if (sed == NULL) 2100 goto bad; 2101 opipe->sed = sed; 2102 if (xfertype == UE_ISOCHRONOUS) { 2103 sitd = ohci_alloc_sitd(sc); 2104 if (sitd == NULL) 2105 goto bad; 2106 2107 opipe->tail.itd = sitd; 2108 tdphys = sitd->physaddr; 2109 fmt = OHCI_ED_FORMAT_ISO; 2110 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 2111 fmt |= OHCI_ED_DIR_IN; 2112 else 2113 fmt |= OHCI_ED_DIR_OUT; 2114 } else { 2115 std = ohci_alloc_std(sc); 2116 if (std == NULL) 2117 goto bad; 2118 2119 opipe->tail.td = std; 2120 tdphys = std->physaddr; 2121 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD; 2122 } 2123 sed->ed.ed_flags = HTOO32( 2124 OHCI_ED_SET_FA(addr) | 2125 OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) | 2126 (dev->ud_speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) | 2127 fmt | 2128 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 2129 sed->ed.ed_headp = HTOO32(tdphys | 2130 (pipe->up_endpoint->ue_toggle ? OHCI_TOGGLECARRY : 0)); 2131 sed->ed.ed_tailp = HTOO32(tdphys); 2132 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 2133 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2134 2135 switch (xfertype) { 2136 case UE_CONTROL: 2137 pipe->up_methods = &ohci_device_ctrl_methods; 2138 err = usb_allocmem(&sc->sc_bus, 2139 sizeof(usb_device_request_t), 2140 0, &opipe->ctrl.reqdma); 2141 if (err) 2142 goto bad; 2143 mutex_enter(&sc->sc_lock); 2144 ohci_add_ed(sc, sed, sc->sc_ctrl_head); 2145 mutex_exit(&sc->sc_lock); 2146 break; 2147 case UE_INTERRUPT: 2148 pipe->up_methods = &ohci_device_intr_methods; 2149 ival = pipe->up_interval; 2150 if (ival == USBD_DEFAULT_INTERVAL) 2151 ival = ed->bInterval; 2152 err = ohci_device_setintr(sc, opipe, ival); 2153 if (err) 2154 goto bad; 2155 break; 2156 case UE_ISOCHRONOUS: 2157 pipe->up_serialise = false; 2158 pipe->up_methods = &ohci_device_isoc_methods; 2159 return ohci_setup_isoc(pipe); 2160 case UE_BULK: 2161 pipe->up_methods = &ohci_device_bulk_methods; 2162 mutex_enter(&sc->sc_lock); 2163 ohci_add_ed(sc, sed, sc->sc_bulk_head); 2164 mutex_exit(&sc->sc_lock); 2165 break; 2166 } 2167 } 2168 2169 return USBD_NORMAL_COMPLETION; 2170 2171 bad: 2172 if (std != NULL) { 2173 ohci_free_std(sc, std); 2174 } 2175 if (sed != NULL) 2176 ohci_free_sed(sc, sed); 2177 return err; 2178 2179 } 2180 2181 /* 2182 * Close a reqular pipe. 2183 * Assumes that there are no pending transactions. 2184 */ 2185 void 2186 ohci_close_pipe(struct usbd_pipe *pipe, ohci_soft_ed_t *head) 2187 { 2188 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 2189 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 2190 ohci_soft_ed_t *sed = opipe->sed; 2191 2192 KASSERT(mutex_owned(&sc->sc_lock)); 2193 2194 #ifdef DIAGNOSTIC 2195 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 2196 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2197 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) { 2198 ohci_soft_td_t *std; 2199 std = ohci_hash_find_td(sc, O32TOH(sed->ed.ed_headp)); 2200 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 2201 "tl=0x%x pipe=%p, std=%p\n", sed, 2202 (int)O32TOH(sed->ed.ed_headp), 2203 (int)O32TOH(sed->ed.ed_tailp), 2204 pipe, std); 2205 #ifdef OHCI_DEBUG 2206 usbd_dump_pipe(&opipe->pipe); 2207 ohci_dump_ed(sc, sed); 2208 if (std) 2209 ohci_dump_td(sc, std); 2210 #endif 2211 usb_delay_ms(&sc->sc_bus, 2); 2212 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2213 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) 2214 printf("ohci_close_pipe: pipe still not empty\n"); 2215 } 2216 #endif 2217 ohci_rem_ed(sc, sed, head); 2218 /* Make sure the host controller is not touching this ED */ 2219 usb_delay_ms(&sc->sc_bus, 1); 2220 pipe->up_endpoint->ue_toggle = 2221 (O32TOH(sed->ed.ed_headp) & OHCI_TOGGLECARRY) ? 1 : 0; 2222 ohci_free_sed_locked(sc, opipe->sed); 2223 } 2224 2225 /* 2226 * Abort a device request. 2227 * If this routine is called at splusb() it guarantees that the request 2228 * will be removed from the hardware scheduling and that the callback 2229 * for it will be called with USBD_CANCELLED status. 2230 * It's impossible to guarantee that the requested transfer will not 2231 * have happened since the hardware runs concurrently. 2232 * If the transaction has already happened we rely on the ordinary 2233 * interrupt processing to process it. 2234 * XXX This is most probably wrong. 2235 * XXXMRG this doesn't make sense anymore. 2236 */ 2237 void 2238 ohci_abort_xfer(struct usbd_xfer *xfer, usbd_status status) 2239 { 2240 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 2241 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2242 ohci_soft_ed_t *sed = opipe->sed; 2243 ohci_soft_td_t *p, *n; 2244 ohci_physaddr_t headp; 2245 int hit; 2246 int wake; 2247 2248 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2249 DPRINTF("xfer=%p pipe=%p sed=%p", xfer, opipe,sed, 0); 2250 2251 KASSERT(mutex_owned(&sc->sc_lock)); 2252 ASSERT_SLEEPABLE(); 2253 2254 if (sc->sc_dying) { 2255 /* If we're dying, just do the software part. */ 2256 xfer->ux_status = status; /* make software ignore it */ 2257 callout_halt(&xfer->ux_callout, &sc->sc_lock); 2258 usb_transfer_complete(xfer); 2259 return; 2260 } 2261 2262 /* 2263 * If an abort is already in progress then just wait for it to 2264 * complete and return. 2265 */ 2266 if (xfer->ux_hcflags & UXFER_ABORTING) { 2267 DPRINTFN(2, "already aborting", 0, 0, 0, 0); 2268 #ifdef DIAGNOSTIC 2269 if (status == USBD_TIMEOUT) 2270 printf("%s: TIMEOUT while aborting\n", __func__); 2271 #endif 2272 /* Override the status which might be USBD_TIMEOUT. */ 2273 xfer->ux_status = status; 2274 DPRINTFN(2, "waiting for abort to finish", 0, 0, 0, 0); 2275 xfer->ux_hcflags |= UXFER_ABORTWAIT; 2276 while (xfer->ux_hcflags & UXFER_ABORTING) 2277 cv_wait(&xfer->ux_hccv, &sc->sc_lock); 2278 goto done; 2279 } 2280 xfer->ux_hcflags |= UXFER_ABORTING; 2281 2282 /* 2283 * Step 1: Make interrupt routine and hardware ignore xfer. 2284 */ 2285 xfer->ux_status = status; /* make software ignore it */ 2286 callout_stop(&xfer->ux_callout); 2287 DPRINTFN(1, "stop ed=%p", sed, 0, 0, 0); 2288 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2289 sizeof(sed->ed.ed_flags), 2290 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2291 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */ 2292 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2293 sizeof(sed->ed.ed_flags), 2294 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2295 2296 /* 2297 * Step 2: Wait until we know hardware has finished any possible 2298 * use of the xfer. Also make sure the soft interrupt routine 2299 * has run. 2300 */ 2301 /* Hardware finishes in 1ms */ 2302 usb_delay_ms_locked(opipe->pipe.up_dev->ud_bus, 20, &sc->sc_lock); 2303 sc->sc_softwake = 1; 2304 usb_schedsoftintr(&sc->sc_bus); 2305 cv_wait(&sc->sc_softwake_cv, &sc->sc_lock); 2306 2307 /* 2308 * Step 3: Remove any vestiges of the xfer from the hardware. 2309 * The complication here is that the hardware may have executed 2310 * beyond the xfer we're trying to abort. So as we're scanning 2311 * the TDs of this xfer we check if the hardware points to 2312 * any of them. 2313 */ 2314 p = xfer->ux_hcpriv; 2315 KASSERT(p); 2316 2317 #ifdef OHCI_DEBUG 2318 DPRINTF("--- dump start ---", 0, 0, 0, 0); 2319 2320 if (ohcidebug >= 2) { 2321 DPRINTF("sed:", 0, 0, 0, 0); 2322 ohci_dump_ed(sc, sed); 2323 ohci_dump_tds(sc, p); 2324 } 2325 DPRINTF("--- dump end ---", 0, 0, 0, 0); 2326 #endif 2327 headp = O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK; 2328 hit = 0; 2329 for (; p->xfer == xfer; p = n) { 2330 hit |= headp == p->physaddr; 2331 n = p->nexttd; 2332 ohci_hash_rem_td(sc, p); 2333 } 2334 /* Zap headp register if hardware pointed inside the xfer. */ 2335 if (hit) { 2336 DPRINTFN(1, "set hd=0x%08x, tl=0x%08x", (int)p->physaddr, 2337 (int)O32TOH(sed->ed.ed_tailp), 0, 0); 2338 sed->ed.ed_headp = HTOO32(p->physaddr); /* unlink TDs */ 2339 usb_syncmem(&sed->dma, 2340 sed->offs + offsetof(ohci_ed_t, ed_headp), 2341 sizeof(sed->ed.ed_headp), 2342 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2343 } else { 2344 DPRINTFN(1, "no hit", 0, 0, 0, 0); 2345 } 2346 2347 /* 2348 * Step 4: Turn on hardware again. 2349 */ 2350 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2351 sizeof(sed->ed.ed_flags), 2352 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2353 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */ 2354 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2355 sizeof(sed->ed.ed_flags), 2356 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2357 2358 /* 2359 * Step 5: Execute callback. 2360 */ 2361 wake = xfer->ux_hcflags & UXFER_ABORTWAIT; 2362 xfer->ux_hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT); 2363 usb_transfer_complete(xfer); 2364 if (wake) 2365 cv_broadcast(&xfer->ux_hccv); 2366 2367 done: 2368 KASSERT(mutex_owned(&sc->sc_lock)); 2369 } 2370 2371 /* 2372 * Data structures and routines to emulate the root hub. 2373 */ 2374 Static int 2375 ohci_roothub_ctrl(struct usbd_bus *bus, usb_device_request_t *req, 2376 void *buf, int buflen) 2377 { 2378 ohci_softc_t *sc = OHCI_BUS2SC(bus); 2379 usb_port_status_t ps; 2380 uint16_t len, value, index; 2381 int l, totlen = 0; 2382 int port, i; 2383 uint32_t v; 2384 2385 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2386 2387 if (sc->sc_dying) 2388 return -1; 2389 2390 DPRINTFN(4, "type=0x%02x request=%02x", req->bmRequestType, 2391 req->bRequest, 0, 0); 2392 2393 len = UGETW(req->wLength); 2394 value = UGETW(req->wValue); 2395 index = UGETW(req->wIndex); 2396 2397 #define C(x,y) ((x) | ((y) << 8)) 2398 switch (C(req->bRequest, req->bmRequestType)) { 2399 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2400 DPRINTFN(8, "wValue=0x%04x", value, 0, 0, 0); 2401 if (len == 0) 2402 break; 2403 switch (value) { 2404 case C(0, UDESC_DEVICE): { 2405 usb_device_descriptor_t devd; 2406 2407 totlen = min(buflen, sizeof(devd)); 2408 memcpy(&devd, buf, totlen); 2409 USETW(devd.idVendor, sc->sc_id_vendor); 2410 memcpy(buf, &devd, totlen); 2411 break; 2412 } 2413 case C(1, UDESC_STRING): 2414 #define sd ((usb_string_descriptor_t *)buf) 2415 /* Vendor */ 2416 totlen = usb_makestrdesc(sd, len, sc->sc_vendor); 2417 break; 2418 case C(2, UDESC_STRING): 2419 /* Product */ 2420 totlen = usb_makestrdesc(sd, len, "OHCI root hub"); 2421 break; 2422 #undef sd 2423 default: 2424 /* default from usbroothub */ 2425 return buflen; 2426 } 2427 break; 2428 2429 /* Hub requests */ 2430 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2431 break; 2432 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2433 DPRINTFN(8, "UR_CLEAR_PORT_FEATURE port=%d feature=%d", 2434 index, value, 0, 0); 2435 if (index < 1 || index > sc->sc_noport) { 2436 return -1; 2437 } 2438 port = OHCI_RH_PORT_STATUS(index); 2439 switch(value) { 2440 case UHF_PORT_ENABLE: 2441 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2442 break; 2443 case UHF_PORT_SUSPEND: 2444 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2445 break; 2446 case UHF_PORT_POWER: 2447 /* Yes, writing to the LOW_SPEED bit clears power. */ 2448 OWRITE4(sc, port, UPS_LOW_SPEED); 2449 break; 2450 case UHF_C_PORT_CONNECTION: 2451 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2452 break; 2453 case UHF_C_PORT_ENABLE: 2454 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2455 break; 2456 case UHF_C_PORT_SUSPEND: 2457 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2458 break; 2459 case UHF_C_PORT_OVER_CURRENT: 2460 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2461 break; 2462 case UHF_C_PORT_RESET: 2463 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2464 break; 2465 default: 2466 return -1; 2467 } 2468 switch(value) { 2469 case UHF_C_PORT_CONNECTION: 2470 case UHF_C_PORT_ENABLE: 2471 case UHF_C_PORT_SUSPEND: 2472 case UHF_C_PORT_OVER_CURRENT: 2473 case UHF_C_PORT_RESET: 2474 /* Enable RHSC interrupt if condition is cleared. */ 2475 if ((OREAD4(sc, port) >> 16) == 0) 2476 ohci_rhsc_enable(sc); 2477 break; 2478 default: 2479 break; 2480 } 2481 break; 2482 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2483 if (len == 0) 2484 break; 2485 if ((value & 0xff) != 0) { 2486 return -1; 2487 } 2488 usb_hub_descriptor_t hubd; 2489 2490 totlen = min(buflen, sizeof(hubd)); 2491 memcpy(&hubd, buf, totlen); 2492 2493 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2494 hubd.bNbrPorts = sc->sc_noport; 2495 USETW(hubd.wHubCharacteristics, 2496 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2497 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2498 /* XXX overcurrent */ 2499 ); 2500 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2501 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2502 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2503 hubd.DeviceRemovable[i++] = (uint8_t)v; 2504 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2505 totlen = min(totlen, hubd.bDescLength); 2506 memcpy(buf, &hubd, totlen); 2507 break; 2508 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2509 if (len != 4) { 2510 return -1; 2511 } 2512 memset(buf, 0, len); /* ? XXX */ 2513 totlen = len; 2514 break; 2515 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2516 DPRINTFN(8, "get port status i=%d", index, 0, 0, 0); 2517 if (index < 1 || index > sc->sc_noport) { 2518 return -1; 2519 } 2520 if (len != 4) { 2521 return -1; 2522 } 2523 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2524 DPRINTFN(8, "port status=0x%04x", v, 0, 0, 0); 2525 USETW(ps.wPortStatus, v); 2526 USETW(ps.wPortChange, v >> 16); 2527 totlen = min(len, sizeof(ps)); 2528 memcpy(buf, &ps, totlen); 2529 break; 2530 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2531 return -1; 2532 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2533 break; 2534 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2535 if (index < 1 || index > sc->sc_noport) { 2536 return -1; 2537 } 2538 port = OHCI_RH_PORT_STATUS(index); 2539 switch(value) { 2540 case UHF_PORT_ENABLE: 2541 OWRITE4(sc, port, UPS_PORT_ENABLED); 2542 break; 2543 case UHF_PORT_SUSPEND: 2544 OWRITE4(sc, port, UPS_SUSPEND); 2545 break; 2546 case UHF_PORT_RESET: 2547 DPRINTFN(5, "reset port %d", index, 0, 0, 0); 2548 OWRITE4(sc, port, UPS_RESET); 2549 for (i = 0; i < 5; i++) { 2550 usb_delay_ms(&sc->sc_bus, 2551 USB_PORT_ROOT_RESET_DELAY); 2552 if (sc->sc_dying) { 2553 return -1; 2554 } 2555 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2556 break; 2557 } 2558 DPRINTFN(8, "port %d reset, status = 0x%04x", index, 2559 OREAD4(sc, port), 0, 0); 2560 break; 2561 case UHF_PORT_POWER: 2562 DPRINTFN(2, "set port power %d", index, 0, 0, 0); 2563 OWRITE4(sc, port, UPS_PORT_POWER); 2564 break; 2565 default: 2566 return -1; 2567 } 2568 break; 2569 default: 2570 /* default from usbroothub */ 2571 return buflen; 2572 } 2573 2574 return totlen; 2575 } 2576 2577 Static usbd_status 2578 ohci_root_intr_transfer(struct usbd_xfer *xfer) 2579 { 2580 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2581 usbd_status err; 2582 2583 /* Insert last in queue. */ 2584 mutex_enter(&sc->sc_lock); 2585 err = usb_insert_transfer(xfer); 2586 mutex_exit(&sc->sc_lock); 2587 if (err) 2588 return err; 2589 2590 /* Pipe isn't running, start first */ 2591 return ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 2592 } 2593 2594 Static usbd_status 2595 ohci_root_intr_start(struct usbd_xfer *xfer) 2596 { 2597 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2598 2599 if (sc->sc_dying) 2600 return USBD_IOERROR; 2601 2602 mutex_enter(&sc->sc_lock); 2603 KASSERT(sc->sc_intrxfer == NULL); 2604 sc->sc_intrxfer = xfer; 2605 mutex_exit(&sc->sc_lock); 2606 2607 return USBD_IN_PROGRESS; 2608 } 2609 2610 /* Abort a root interrupt request. */ 2611 Static void 2612 ohci_root_intr_abort(struct usbd_xfer *xfer) 2613 { 2614 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2615 2616 KASSERT(mutex_owned(&sc->sc_lock)); 2617 KASSERT(xfer->ux_pipe->up_intrxfer == xfer); 2618 2619 sc->sc_intrxfer = NULL; 2620 2621 xfer->ux_status = USBD_CANCELLED; 2622 usb_transfer_complete(xfer); 2623 } 2624 2625 /* Close the root pipe. */ 2626 Static void 2627 ohci_root_intr_close(struct usbd_pipe *pipe) 2628 { 2629 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 2630 2631 KASSERT(mutex_owned(&sc->sc_lock)); 2632 2633 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2634 2635 sc->sc_intrxfer = NULL; 2636 } 2637 2638 /************************/ 2639 2640 int 2641 ohci_device_ctrl_init(struct usbd_xfer *xfer) 2642 { 2643 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 2644 usb_device_request_t *req = &xfer->ux_request; 2645 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2646 ohci_soft_td_t *stat, *setup; 2647 int isread = req->bmRequestType & UT_READ; 2648 int len = xfer->ux_bufsize; 2649 int err = ENOMEM; 2650 2651 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2652 2653 setup = ohci_alloc_std(sc); 2654 if (setup == NULL) { 2655 goto bad1; 2656 } 2657 stat = ohci_alloc_std(sc); 2658 if (stat == NULL) { 2659 goto bad2; 2660 } 2661 2662 ox->ox_setup = setup; 2663 ox->ox_stat = stat; 2664 ox->ox_nstd = 0; 2665 2666 /* Set up data transaction */ 2667 if (len != 0) { 2668 err = ohci_alloc_std_chain(sc, xfer, len, isread); 2669 if (err) { 2670 goto bad3; 2671 } 2672 } 2673 return 0; 2674 2675 bad3: 2676 ohci_free_std(sc, stat); 2677 bad2: 2678 ohci_free_std(sc, setup); 2679 bad1: 2680 return err; 2681 } 2682 2683 void 2684 ohci_device_ctrl_fini(struct usbd_xfer *xfer) 2685 { 2686 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 2687 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2688 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 2689 2690 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2691 DPRINTFN(8, "xfer %p nstd %d", xfer, ox->ox_nstd, 0, 0); 2692 2693 mutex_enter(&sc->sc_lock); 2694 if (ox->ox_setup != opipe->tail.td) { 2695 ohci_free_std_locked(sc, ox->ox_setup); 2696 } 2697 for (size_t i = 0; i < ox->ox_nstd; i++) { 2698 ohci_soft_td_t *std = ox->ox_stds[i]; 2699 if (std == NULL) 2700 break; 2701 ohci_free_std_locked(sc, std); 2702 } 2703 ohci_free_std_locked(sc, ox->ox_stat); 2704 mutex_exit(&sc->sc_lock); 2705 2706 if (ox->ox_nstd) { 2707 const size_t sz = sizeof(ohci_soft_td_t *) * ox->ox_nstd; 2708 kmem_free(ox->ox_stds, sz); 2709 } 2710 } 2711 2712 Static usbd_status 2713 ohci_device_ctrl_transfer(struct usbd_xfer *xfer) 2714 { 2715 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2716 usbd_status err; 2717 2718 /* Insert last in queue. */ 2719 mutex_enter(&sc->sc_lock); 2720 err = usb_insert_transfer(xfer); 2721 mutex_exit(&sc->sc_lock); 2722 if (err) 2723 return err; 2724 2725 /* Pipe isn't running, start first */ 2726 return ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 2727 } 2728 2729 Static usbd_status 2730 ohci_device_ctrl_start(struct usbd_xfer *xfer) 2731 { 2732 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2733 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 2734 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 2735 usb_device_request_t *req = &xfer->ux_request; 2736 struct usbd_device *dev __diagused = opipe->pipe.up_dev; 2737 ohci_soft_td_t *setup, *stat, *next, *tail; 2738 ohci_soft_ed_t *sed; 2739 int isread; 2740 int len; 2741 2742 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2743 2744 if (sc->sc_dying) 2745 return USBD_IOERROR; 2746 2747 KASSERT(xfer->ux_rqflags & URQ_REQUEST); 2748 2749 isread = req->bmRequestType & UT_READ; 2750 len = UGETW(req->wLength); 2751 2752 DPRINTF("xfer=%p len=%d, addr=%d, endpt=%d", xfer, len, dev->ud_addr, 2753 opipe->pipe.up_endpoint->ue_edesc->bEndpointAddress); 2754 DPRINTF("type=0x%02x, request=0x%02x, wValue=0x%04x, wIndex=0x%04x", 2755 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2756 UGETW(req->wIndex)); 2757 2758 /* Need to take lock here for pipe->tail.td */ 2759 mutex_enter(&sc->sc_lock); 2760 2761 /* 2762 * Use the pipe "tail" TD as our first and loan our first TD to the 2763 * next transfer 2764 */ 2765 setup = opipe->tail.td; 2766 opipe->tail.td = ox->ox_setup; 2767 ox->ox_setup = setup; 2768 2769 stat = ox->ox_stat; 2770 2771 /* point at sentinel */ 2772 tail = opipe->tail.td; 2773 sed = opipe->sed; 2774 2775 KASSERTMSG(OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)) == dev->ud_addr, 2776 "address ED %d pipe %d\n", 2777 OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)), dev->ud_addr); 2778 KASSERTMSG(OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)) == 2779 UGETW(opipe->pipe.up_endpoint->ue_edesc->wMaxPacketSize), 2780 "MPL ED %d pipe %d\n", 2781 OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)), 2782 UGETW(opipe->pipe.up_endpoint->ue_edesc->wMaxPacketSize)); 2783 2784 /* next will point to data if len != 0 */ 2785 next = stat; 2786 2787 /* Set up data transaction */ 2788 if (len != 0) { 2789 ohci_soft_td_t *std; 2790 ohci_soft_td_t *end; 2791 2792 next = ox->ox_stds[0]; 2793 ohci_reset_std_chain(sc, xfer, len, isread, next, &end); 2794 2795 end->td.td_nexttd = HTOO32(stat->physaddr); 2796 end->nexttd = stat; 2797 2798 usb_syncmem(&end->dma, 2799 end->offs + offsetof(ohci_td_t, td_nexttd), 2800 sizeof(end->td.td_nexttd), 2801 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2802 2803 usb_syncmem(&xfer->ux_dmabuf, 0, len, 2804 isread ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 2805 std = ox->ox_stds[0]; 2806 /* Start toggle at 1 and then use the carried toggle. */ 2807 std->td.td_flags &= HTOO32(~OHCI_TD_TOGGLE_MASK); 2808 std->td.td_flags |= HTOO32(OHCI_TD_TOGGLE_1); 2809 usb_syncmem(&std->dma, 2810 std->offs + offsetof(ohci_td_t, td_flags), 2811 sizeof(std->td.td_flags), 2812 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2813 } 2814 2815 DPRINTFN(8, "setup %p data %p stat %p tail %p", setup, 2816 (len != 0 ? ox->ox_stds[0] : NULL), stat, tail); 2817 KASSERT(opipe->tail.td == tail); 2818 2819 memcpy(KERNADDR(&opipe->ctrl.reqdma, 0), req, sizeof(*req)); 2820 usb_syncmem(&opipe->ctrl.reqdma, 0, sizeof(*req), BUS_DMASYNC_PREWRITE); 2821 2822 setup->td.td_flags = HTOO32(OHCI_TD_SETUP | OHCI_TD_NOCC | 2823 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 2824 setup->td.td_cbp = HTOO32(DMAADDR(&opipe->ctrl.reqdma, 0)); 2825 setup->td.td_nexttd = HTOO32(next->physaddr); 2826 setup->td.td_be = HTOO32(O32TOH(setup->td.td_cbp) + sizeof(*req) - 1); 2827 setup->nexttd = next; 2828 setup->len = 0; 2829 setup->xfer = xfer; 2830 setup->flags = 0; 2831 ohci_hash_add_td(sc, setup); 2832 2833 xfer->ux_hcpriv = setup; 2834 usb_syncmem(&setup->dma, setup->offs, sizeof(setup->td), 2835 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2836 2837 stat->td.td_flags = HTOO32( 2838 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | 2839 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 2840 stat->td.td_cbp = 0; 2841 stat->td.td_nexttd = HTOO32(tail->physaddr); 2842 stat->td.td_be = 0; 2843 stat->nexttd = tail; 2844 stat->flags = OHCI_CALL_DONE; 2845 stat->len = 0; 2846 stat->xfer = xfer; 2847 ohci_hash_add_td(sc, stat); 2848 2849 usb_syncmem(&stat->dma, stat->offs, sizeof(stat->td), 2850 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2851 2852 memset(&tail->td, 0, sizeof(tail->td)); 2853 tail->nexttd = NULL; 2854 tail->xfer = NULL; 2855 2856 usb_syncmem(&tail->dma, tail->offs, sizeof(tail->td), 2857 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2858 2859 #ifdef OHCI_DEBUG 2860 USBHIST_LOGN(ohcidebug, 5, "--- dump start ---", 0, 0, 0, 0); 2861 if (ohcidebug >= 5) { 2862 ohci_dump_ed(sc, sed); 2863 ohci_dump_tds(sc, setup); 2864 } 2865 USBHIST_LOGN(ohcidebug, 5, "--- dump end ---", 0, 0, 0, 0); 2866 #endif 2867 2868 /* Insert ED in schedule */ 2869 sed->ed.ed_tailp = HTOO32(tail->physaddr); 2870 usb_syncmem(&sed->dma, 2871 sed->offs + offsetof(ohci_ed_t, ed_tailp), 2872 sizeof(sed->ed.ed_tailp), 2873 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2874 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 2875 if (xfer->ux_timeout && !sc->sc_bus.ub_usepolling) { 2876 callout_reset(&xfer->ux_callout, mstohz(xfer->ux_timeout), 2877 ohci_timeout, xfer); 2878 } 2879 2880 DPRINTF("done", 0, 0, 0, 0); 2881 2882 mutex_exit(&sc->sc_lock); 2883 2884 if (sc->sc_bus.ub_usepolling) 2885 ohci_waitintr(sc, xfer); 2886 2887 return USBD_IN_PROGRESS; 2888 } 2889 2890 /* Abort a device control request. */ 2891 Static void 2892 ohci_device_ctrl_abort(struct usbd_xfer *xfer) 2893 { 2894 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 2895 2896 KASSERT(mutex_owned(&sc->sc_lock)); 2897 2898 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2899 DPRINTF("xfer=%p", xfer, 0, 0, 0); 2900 ohci_abort_xfer(xfer, USBD_CANCELLED); 2901 } 2902 2903 /* Close a device control pipe. */ 2904 Static void 2905 ohci_device_ctrl_close(struct usbd_pipe *pipe) 2906 { 2907 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 2908 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 2909 2910 KASSERT(mutex_owned(&sc->sc_lock)); 2911 2912 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2913 DPRINTF("pipe=%p", pipe, 0, 0, 0); 2914 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2915 ohci_free_std_locked(sc, opipe->tail.td); 2916 } 2917 2918 /************************/ 2919 2920 Static void 2921 ohci_device_clear_toggle(struct usbd_pipe *pipe) 2922 { 2923 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 2924 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 2925 2926 opipe->sed->ed.ed_headp &= HTOO32(~OHCI_TOGGLECARRY); 2927 } 2928 2929 Static void 2930 ohci_noop(struct usbd_pipe *pipe) 2931 { 2932 } 2933 2934 Static int 2935 ohci_device_bulk_init(struct usbd_xfer *xfer) 2936 { 2937 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2938 int len = xfer->ux_bufsize; 2939 int endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress;; 2940 int isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2941 int err; 2942 2943 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2944 2945 KASSERT(!(xfer->ux_rqflags & URQ_REQUEST)); 2946 2947 DPRINTFN(4, "xfer=%p len=%d isread=%d flags=%d", xfer, len, isread, 2948 xfer->ux_flags); 2949 DPRINTFN(4, "endpt=%d", endpt, 0, 0, 0); 2950 2951 /* Allocate a chain of new TDs (including a new tail). */ 2952 err = ohci_alloc_std_chain(sc, xfer, len, isread); 2953 if (err) 2954 return err; 2955 2956 return 0; 2957 } 2958 2959 Static void 2960 ohci_device_bulk_fini(struct usbd_xfer *xfer) 2961 { 2962 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2963 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 2964 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 2965 2966 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2967 DPRINTFN(8, "xfer %p nstd %d", xfer, ox->ox_nstd, 0, 0); 2968 2969 mutex_enter(&sc->sc_lock); 2970 for (size_t i = 0; i < ox->ox_nstd; i++) { 2971 ohci_soft_td_t *std = ox->ox_stds[i]; 2972 if (std == NULL) 2973 break; 2974 if (std != opipe->tail.td) 2975 ohci_free_std_locked(sc, std); 2976 } 2977 mutex_exit(&sc->sc_lock); 2978 2979 if (ox->ox_nstd) { 2980 const size_t sz = sizeof(ohci_soft_td_t *) * ox->ox_nstd; 2981 kmem_free(ox->ox_stds, sz); 2982 } 2983 } 2984 2985 Static usbd_status 2986 ohci_device_bulk_transfer(struct usbd_xfer *xfer) 2987 { 2988 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2989 usbd_status err; 2990 2991 /* Insert last in queue. */ 2992 mutex_enter(&sc->sc_lock); 2993 err = usb_insert_transfer(xfer); 2994 mutex_exit(&sc->sc_lock); 2995 if (err) 2996 return err; 2997 2998 /* Pipe isn't running, start first */ 2999 return ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 3000 } 3001 3002 Static usbd_status 3003 ohci_device_bulk_start(struct usbd_xfer *xfer) 3004 { 3005 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3006 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 3007 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3008 ohci_soft_td_t *last; 3009 ohci_soft_td_t *data, *tail, *tdp; 3010 ohci_soft_ed_t *sed; 3011 int len, isread, endpt; 3012 3013 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3014 3015 if (sc->sc_dying) 3016 return USBD_IOERROR; 3017 3018 KASSERT(!(xfer->ux_rqflags & URQ_REQUEST)); 3019 3020 len = xfer->ux_length; 3021 endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress; 3022 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3023 sed = opipe->sed; 3024 3025 DPRINTFN(4, "xfer=%p len=%d isread=%d flags=%d", xfer, len, isread, 3026 xfer->ux_flags); 3027 DPRINTFN(4, "endpt=%d", endpt, 0, 0, 0); 3028 3029 mutex_enter(&sc->sc_lock); 3030 3031 /* 3032 * Use the pipe "tail" TD as our first and loan our first TD to the 3033 * next transfer 3034 */ 3035 data = opipe->tail.td; 3036 opipe->tail.td = ox->ox_stds[0]; 3037 ox->ox_stds[0] = data; 3038 ohci_reset_std_chain(sc, xfer, len, isread, data, &last); 3039 3040 /* point at sentinel */ 3041 tail = opipe->tail.td; 3042 memset(&tail->td, 0, sizeof(tail->td)); 3043 tail->nexttd = NULL; 3044 tail->xfer = NULL; 3045 usb_syncmem(&tail->dma, tail->offs, sizeof(tail->td), 3046 BUS_DMASYNC_PREWRITE); 3047 xfer->ux_hcpriv = data; 3048 3049 DPRINTFN(8, "xfer %p data %p tail %p", xfer, ox->ox_stds[0], tail, 0); 3050 KASSERT(opipe->tail.td == tail); 3051 3052 /* We want interrupt at the end of the transfer. */ 3053 last->td.td_flags &= HTOO32(~OHCI_TD_INTR_MASK); 3054 last->td.td_flags |= HTOO32(OHCI_TD_SET_DI(1)); 3055 last->td.td_nexttd = HTOO32(tail->physaddr); 3056 last->nexttd = tail; 3057 last->flags |= OHCI_CALL_DONE; 3058 usb_syncmem(&last->dma, last->offs, sizeof(last->td), 3059 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3060 3061 DPRINTFN(4, "ed_flags=0x%08x td_flags=0x%08x " 3062 "td_cbp=0x%08x td_be=0x%08x", 3063 (int)O32TOH(sed->ed.ed_flags), 3064 (int)O32TOH(data->td.td_flags), 3065 (int)O32TOH(data->td.td_cbp), 3066 (int)O32TOH(data->td.td_be)); 3067 3068 #ifdef OHCI_DEBUG 3069 DPRINTFN(5, "--- dump start ---", 0, 0, 0, 0); 3070 if (ohcidebug >= 5) { 3071 ohci_dump_ed(sc, sed); 3072 ohci_dump_tds(sc, data); 3073 } 3074 DPRINTFN(5, "--- dump end ---", 0, 0, 0, 0); 3075 #endif 3076 3077 /* Insert ED in schedule */ 3078 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 3079 KASSERT(tdp->xfer == xfer); 3080 } 3081 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3082 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3083 sed->ed.ed_tailp = HTOO32(tail->physaddr); 3084 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3085 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3086 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3087 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 3088 if (xfer->ux_timeout && !sc->sc_bus.ub_usepolling) { 3089 callout_reset(&xfer->ux_callout, mstohz(xfer->ux_timeout), 3090 ohci_timeout, xfer); 3091 } 3092 mutex_exit(&sc->sc_lock); 3093 3094 return USBD_IN_PROGRESS; 3095 } 3096 3097 Static void 3098 ohci_device_bulk_abort(struct usbd_xfer *xfer) 3099 { 3100 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 3101 3102 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3103 3104 KASSERT(mutex_owned(&sc->sc_lock)); 3105 3106 DPRINTF("xfer=%p", xfer, 0, 0, 0); 3107 ohci_abort_xfer(xfer, USBD_CANCELLED); 3108 } 3109 3110 /* 3111 * Close a device bulk pipe. 3112 */ 3113 Static void 3114 ohci_device_bulk_close(struct usbd_pipe *pipe) 3115 { 3116 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 3117 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 3118 3119 KASSERT(mutex_owned(&sc->sc_lock)); 3120 3121 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3122 3123 DPRINTF("pipe=%p", pipe, 0, 0, 0); 3124 ohci_close_pipe(pipe, sc->sc_bulk_head); 3125 ohci_free_std_locked(sc, opipe->tail.td); 3126 } 3127 3128 /************************/ 3129 3130 Static int 3131 ohci_device_intr_init(struct usbd_xfer *xfer) 3132 { 3133 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3134 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3135 int len = xfer->ux_bufsize; 3136 int endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress;; 3137 int isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3138 int err; 3139 3140 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3141 3142 KASSERT(!(xfer->ux_rqflags & URQ_REQUEST)); 3143 KASSERT(len != 0); 3144 3145 DPRINTFN(4, "xfer=%p len=%d isread=%d flags=%d", xfer, len, isread, 3146 xfer->ux_flags); 3147 DPRINTFN(4, "endpt=%d", endpt, 0, 0, 0); 3148 3149 ox->ox_nstd = 0; 3150 3151 err = ohci_alloc_std_chain(sc, xfer, len, isread); 3152 if (err) { 3153 return err; 3154 } 3155 3156 return 0; 3157 } 3158 3159 Static void 3160 ohci_device_intr_fini(struct usbd_xfer *xfer) 3161 { 3162 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3163 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3164 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 3165 3166 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3167 DPRINTFN(8, "xfer %p nstd %d", xfer, ox->ox_nstd, 0, 0); 3168 3169 mutex_enter(&sc->sc_lock); 3170 for (size_t i = 0; i < ox->ox_nstd; i++) { 3171 ohci_soft_td_t *std = ox->ox_stds[i]; 3172 if (std != NULL) 3173 break; 3174 if (std != opipe->tail.td) 3175 ohci_free_std_locked(sc, std); 3176 } 3177 mutex_exit(&sc->sc_lock); 3178 3179 if (ox->ox_nstd) { 3180 const size_t sz = sizeof(ohci_soft_td_t *) * ox->ox_nstd; 3181 kmem_free(ox->ox_stds, sz); 3182 } 3183 } 3184 3185 Static usbd_status 3186 ohci_device_intr_transfer(struct usbd_xfer *xfer) 3187 { 3188 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3189 usbd_status err; 3190 3191 /* Insert last in queue. */ 3192 mutex_enter(&sc->sc_lock); 3193 err = usb_insert_transfer(xfer); 3194 mutex_exit(&sc->sc_lock); 3195 if (err) 3196 return err; 3197 3198 /* Pipe isn't running, start first */ 3199 return ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 3200 } 3201 3202 Static usbd_status 3203 ohci_device_intr_start(struct usbd_xfer *xfer) 3204 { 3205 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3206 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 3207 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3208 ohci_soft_ed_t *sed = opipe->sed; 3209 ohci_soft_td_t *data, *last, *tail; 3210 int len, isread, endpt; 3211 3212 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3213 3214 if (sc->sc_dying) 3215 return USBD_IOERROR; 3216 3217 DPRINTFN(3, "xfer=%p len=%d flags=%d priv=%p", xfer, xfer->ux_length, 3218 xfer->ux_flags, xfer->ux_priv); 3219 3220 KASSERT(!(xfer->ux_rqflags & URQ_REQUEST)); 3221 3222 len = xfer->ux_length; 3223 endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress; 3224 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3225 3226 mutex_enter(&sc->sc_lock); 3227 3228 /* 3229 * Use the pipe "tail" TD as our first and loan our first TD to the 3230 * next transfer. 3231 */ 3232 data = opipe->tail.td; 3233 opipe->tail.td = ox->ox_stds[0]; 3234 ox->ox_stds[0] = data; 3235 ohci_reset_std_chain(sc, xfer, len, isread, data, &last); 3236 3237 /* point at sentinel */ 3238 tail = opipe->tail.td; 3239 memset(&tail->td, 0, sizeof(tail->td)); 3240 tail->nexttd = NULL; 3241 tail->xfer = NULL; 3242 usb_syncmem(&tail->dma, tail->offs, sizeof(tail->td), 3243 BUS_DMASYNC_PREWRITE); 3244 xfer->ux_hcpriv = data; 3245 3246 DPRINTFN(8, "data %p tail %p", ox->ox_stds[0], tail, 0, 0); 3247 KASSERT(opipe->tail.td == tail); 3248 3249 /* We want interrupt at the end of the transfer. */ 3250 last->td.td_flags &= HTOO32(~OHCI_TD_INTR_MASK); 3251 last->td.td_flags |= HTOO32(OHCI_TD_SET_DI(1)); 3252 3253 last->td.td_nexttd = HTOO32(tail->physaddr); 3254 last->nexttd = tail; 3255 last->flags |= OHCI_CALL_DONE; 3256 usb_syncmem(&last->dma, last->offs, sizeof(last->td), 3257 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3258 3259 #ifdef OHCI_DEBUG 3260 DPRINTFN(5, "--- dump start ---", 0, 0, 0, 0); 3261 if (ohcidebug >= 5) { 3262 ohci_dump_ed(sc, sed); 3263 ohci_dump_tds(sc, data); 3264 } 3265 DPRINTFN(5, "--- dump end ---", 0, 0, 0, 0); 3266 #endif 3267 3268 /* Insert ED in schedule */ 3269 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3270 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3271 sed->ed.ed_tailp = HTOO32(tail->physaddr); 3272 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3273 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3274 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3275 3276 mutex_exit(&sc->sc_lock); 3277 3278 return USBD_IN_PROGRESS; 3279 } 3280 3281 /* Abort a device interrupt request. */ 3282 Static void 3283 ohci_device_intr_abort(struct usbd_xfer *xfer) 3284 { 3285 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 3286 3287 KASSERT(mutex_owned(&sc->sc_lock)); 3288 KASSERT(xfer->ux_pipe->up_intrxfer == xfer); 3289 3290 ohci_abort_xfer(xfer, USBD_CANCELLED); 3291 } 3292 3293 /* Close a device interrupt pipe. */ 3294 Static void 3295 ohci_device_intr_close(struct usbd_pipe *pipe) 3296 { 3297 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 3298 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 3299 int nslots = opipe->intr.nslots; 3300 int pos = opipe->intr.pos; 3301 int j; 3302 ohci_soft_ed_t *p, *sed = opipe->sed; 3303 3304 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3305 3306 KASSERT(mutex_owned(&sc->sc_lock)); 3307 3308 DPRINTFN(1, "pipe=%p nslots=%d pos=%d", pipe, nslots, pos, 0); 3309 usb_syncmem(&sed->dma, sed->offs, 3310 sizeof(sed->ed), BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3311 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 3312 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3313 sizeof(sed->ed.ed_flags), 3314 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3315 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 3316 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) 3317 usb_delay_ms_locked(&sc->sc_bus, 2, &sc->sc_lock); 3318 3319 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 3320 continue; 3321 KASSERT(p); 3322 p->next = sed->next; 3323 p->ed.ed_nexted = sed->ed.ed_nexted; 3324 usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted), 3325 sizeof(p->ed.ed_nexted), 3326 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3327 3328 for (j = 0; j < nslots; j++) 3329 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 3330 3331 ohci_free_std_locked(sc, opipe->tail.td); 3332 ohci_free_sed_locked(sc, opipe->sed); 3333 } 3334 3335 Static usbd_status 3336 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival) 3337 { 3338 int i, j, best; 3339 u_int npoll, slow, shigh, nslots; 3340 u_int bestbw, bw; 3341 ohci_soft_ed_t *hsed, *sed = opipe->sed; 3342 3343 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3344 3345 DPRINTFN(2, "pipe=%p", opipe, 0, 0, 0); 3346 if (ival == 0) { 3347 printf("ohci_setintr: 0 interval\n"); 3348 return USBD_INVAL; 3349 } 3350 3351 npoll = OHCI_NO_INTRS; 3352 while (npoll > ival) 3353 npoll /= 2; 3354 DPRINTFN(2, "ival=%d npoll=%d", ival, npoll, 0, 0); 3355 3356 /* 3357 * We now know which level in the tree the ED must go into. 3358 * Figure out which slot has most bandwidth left over. 3359 * Slots to examine: 3360 * npoll 3361 * 1 0 3362 * 2 1 2 3363 * 4 3 4 5 6 3364 * 8 7 8 9 10 11 12 13 14 3365 * N (N-1) .. (N-1+N-1) 3366 */ 3367 slow = npoll-1; 3368 shigh = slow + npoll; 3369 nslots = OHCI_NO_INTRS / npoll; 3370 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 3371 bw = 0; 3372 for (j = 0; j < nslots; j++) 3373 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 3374 if (bw < bestbw) { 3375 best = i; 3376 bestbw = bw; 3377 } 3378 } 3379 DPRINTFN(2, "best=%d(%d..%d) bestbw=%d", best, slow, shigh, bestbw); 3380 3381 mutex_enter(&sc->sc_lock); 3382 hsed = sc->sc_eds[best]; 3383 sed->next = hsed->next; 3384 usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags), 3385 sizeof(hsed->ed.ed_flags), 3386 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3387 sed->ed.ed_nexted = hsed->ed.ed_nexted; 3388 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3389 sizeof(sed->ed.ed_flags), 3390 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3391 hsed->next = sed; 3392 hsed->ed.ed_nexted = HTOO32(sed->physaddr); 3393 usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags), 3394 sizeof(hsed->ed.ed_flags), 3395 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3396 mutex_exit(&sc->sc_lock); 3397 3398 for (j = 0; j < nslots; j++) 3399 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 3400 opipe->intr.nslots = nslots; 3401 opipe->intr.pos = best; 3402 3403 DPRINTFN(5, "returns %p", opipe, 0, 0, 0); 3404 return USBD_NORMAL_COMPLETION; 3405 } 3406 3407 /***********************/ 3408 3409 Static int 3410 ohci_device_isoc_init(struct usbd_xfer *xfer) 3411 { 3412 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3413 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3414 ohci_soft_itd_t *sitd; 3415 size_t i; 3416 int err; 3417 3418 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3419 3420 DPRINTFN(1, "xfer %p len %d flags %d", xfer, xfer->ux_length, 3421 xfer->ux_flags, 0); 3422 3423 const size_t nfsitd = 3424 (xfer->ux_nframes + OHCI_ITD_NOFFSET - 1) / OHCI_ITD_NOFFSET; 3425 const size_t nbsitd = xfer->ux_bufsize / OHCI_PAGE_SIZE; 3426 const size_t nsitd = MAX(nfsitd, nbsitd) + 1; 3427 3428 ox->ox_sitds = kmem_zalloc(sizeof(ohci_soft_itd_t *) * nsitd, 3429 KM_SLEEP); 3430 ox->ox_nsitd = nsitd; 3431 3432 for (i = 0; i < nsitd; i++) { 3433 /* Allocate next ITD */ 3434 sitd = ohci_alloc_sitd(sc); 3435 if (sitd == NULL) { 3436 err = ENOMEM; 3437 goto fail; 3438 } 3439 ox->ox_sitds[i] = sitd; 3440 sitd->xfer = xfer; 3441 sitd->flags = 0; 3442 } 3443 3444 return 0; 3445 fail: 3446 for (; i > 0;) { 3447 ohci_free_sitd(sc, ox->ox_sitds[--i]); 3448 } 3449 return err; 3450 } 3451 3452 Static void 3453 ohci_device_isoc_fini(struct usbd_xfer *xfer) 3454 { 3455 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3456 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3457 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 3458 3459 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3460 3461 mutex_enter(&sc->sc_lock); 3462 for (size_t i = 0; i < ox->ox_nsitd; i++) { 3463 if (ox->ox_sitds[i] != opipe->tail.itd) { 3464 ohci_free_sitd_locked(sc, ox->ox_sitds[i]); 3465 } 3466 } 3467 mutex_exit(&sc->sc_lock); 3468 3469 if (ox->ox_nsitd) { 3470 const size_t sz = sizeof(ohci_soft_itd_t *) * ox->ox_nsitd; 3471 kmem_free(ox->ox_sitds, sz); 3472 } 3473 } 3474 3475 3476 usbd_status 3477 ohci_device_isoc_transfer(struct usbd_xfer *xfer) 3478 { 3479 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3480 usbd_status __diagused err; 3481 3482 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3483 3484 DPRINTFN(5, "xfer=%p", xfer, 0, 0, 0); 3485 3486 /* Put it on our queue, */ 3487 mutex_enter(&sc->sc_lock); 3488 err = usb_insert_transfer(xfer); 3489 mutex_exit(&sc->sc_lock); 3490 3491 KASSERT(err == USBD_NORMAL_COMPLETION); 3492 3493 /* insert into schedule, */ 3494 ohci_device_isoc_enter(xfer); 3495 3496 /* and start if the pipe wasn't running */ 3497 return USBD_IN_PROGRESS; 3498 } 3499 3500 void 3501 ohci_device_isoc_enter(struct usbd_xfer *xfer) 3502 { 3503 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3504 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 3505 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3506 ohci_soft_ed_t *sed = opipe->sed; 3507 ohci_soft_itd_t *sitd, *nsitd, *tail; 3508 ohci_physaddr_t buf, offs, noffs, bp0; 3509 int i, ncur, nframes; 3510 3511 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3512 DPRINTFN(5, "xfer=%p", xfer, 0, 0, 0); 3513 3514 mutex_enter(&sc->sc_lock); 3515 3516 if (sc->sc_dying) { 3517 mutex_exit(&sc->sc_lock); 3518 return; 3519 } 3520 3521 struct isoc *isoc = &opipe->isoc; 3522 3523 DPRINTFN(1, "used=%d next=%d xfer=%p nframes=%d", 3524 isoc->inuse, isoc->next, xfer, xfer->ux_nframes); 3525 3526 if (isoc->next == -1) { 3527 /* Not in use yet, schedule it a few frames ahead. */ 3528 isoc->next = O32TOH(sc->sc_hcca->hcca_frame_number) + 5; 3529 DPRINTFN(2,"start next=%d", isoc->next, 0, 0, 0); 3530 } 3531 3532 sitd = opipe->tail.itd; 3533 opipe->tail.itd = ox->ox_sitds[0]; 3534 ox->ox_sitds[0] = sitd; 3535 3536 buf = DMAADDR(&xfer->ux_dmabuf, 0); 3537 bp0 = OHCI_PAGE(buf); 3538 offs = OHCI_PAGE_OFFSET(buf); 3539 nframes = xfer->ux_nframes; 3540 xfer->ux_hcpriv = sitd; 3541 size_t j = 1; 3542 for (i = ncur = 0; i < nframes; i++, ncur++) { 3543 noffs = offs + xfer->ux_frlengths[i]; 3544 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ 3545 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */ 3546 3547 /* Allocate next ITD */ 3548 nsitd = ox->ox_sitds[j++]; 3549 KASSERT(nsitd != NULL); 3550 KASSERT(j < ox->ox_nsitd); 3551 3552 /* Fill current ITD */ 3553 sitd->itd.itd_flags = HTOO32( 3554 OHCI_ITD_NOCC | 3555 OHCI_ITD_SET_SF(isoc->next) | 3556 OHCI_ITD_SET_DI(6) | /* delay intr a little */ 3557 OHCI_ITD_SET_FC(ncur)); 3558 sitd->itd.itd_bp0 = HTOO32(bp0); 3559 sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr); 3560 sitd->itd.itd_be = HTOO32(bp0 + offs - 1); 3561 sitd->nextitd = nsitd; 3562 sitd->xfer = xfer; 3563 sitd->flags = 0; 3564 #ifdef DIAGNOSTIC 3565 sitd->isdone = false; 3566 #endif 3567 ohci_hash_add_itd(sc, sitd); 3568 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 3569 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3570 3571 sitd = nsitd; 3572 isoc->next = isoc->next + ncur; 3573 bp0 = OHCI_PAGE(buf + offs); 3574 ncur = 0; 3575 } 3576 sitd->itd.itd_offset[ncur] = HTOO16(OHCI_ITD_MK_OFFS(offs)); 3577 offs = noffs; 3578 } 3579 KASSERT(j <= ox->ox_nsitd); 3580 3581 /* point at sentinel */ 3582 tail = opipe->tail.itd; 3583 memset(&tail->itd, 0, sizeof(tail->itd)); 3584 tail->nextitd = NULL; 3585 tail->xfer = NULL; 3586 usb_syncmem(&tail->dma, tail->offs, sizeof(tail->itd), 3587 BUS_DMASYNC_PREWRITE); 3588 3589 /* Fixup last used ITD */ 3590 sitd->itd.itd_flags = HTOO32( 3591 OHCI_ITD_NOCC | 3592 OHCI_ITD_SET_SF(isoc->next) | 3593 OHCI_ITD_SET_DI(0) | 3594 OHCI_ITD_SET_FC(ncur)); 3595 sitd->itd.itd_bp0 = HTOO32(bp0); 3596 sitd->itd.itd_nextitd = HTOO32(tail->physaddr); 3597 sitd->itd.itd_be = HTOO32(bp0 + offs - 1); 3598 sitd->nextitd = tail; 3599 sitd->xfer = xfer; 3600 sitd->flags = OHCI_CALL_DONE; 3601 #ifdef DIAGNOSTIC 3602 sitd->isdone = false; 3603 #endif 3604 ohci_hash_add_itd(sc, sitd); 3605 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 3606 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3607 3608 isoc->next = isoc->next + ncur; 3609 isoc->inuse += nframes; 3610 3611 /* XXX pretend we did it all */ 3612 xfer->ux_actlen = offs; 3613 xfer->ux_status = USBD_IN_PROGRESS; 3614 3615 #ifdef OHCI_DEBUG 3616 if (ohcidebug >= 5) { 3617 DPRINTF("frame=%d", O32TOH(sc->sc_hcca->hcca_frame_number), 3618 0, 0, 0); 3619 ohci_dump_itds(sc, xfer->ux_hcpriv); 3620 ohci_dump_ed(sc, sed); 3621 } 3622 #endif 3623 3624 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3625 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3626 sed->ed.ed_tailp = HTOO32(tail->physaddr); 3627 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3628 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3629 sizeof(sed->ed.ed_flags), 3630 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3631 mutex_exit(&sc->sc_lock); 3632 } 3633 3634 void 3635 ohci_device_isoc_abort(struct usbd_xfer *xfer) 3636 { 3637 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 3638 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3639 ohci_soft_ed_t *sed; 3640 ohci_soft_itd_t *sitd; 3641 3642 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3643 DPRINTFN(1, "xfer=%p", xfer, 0, 0, 0); 3644 3645 KASSERT(mutex_owned(&sc->sc_lock)); 3646 3647 /* Transfer is already done. */ 3648 if (xfer->ux_status != USBD_NOT_STARTED && 3649 xfer->ux_status != USBD_IN_PROGRESS) { 3650 printf("ohci_device_isoc_abort: early return\n"); 3651 goto done; 3652 } 3653 3654 /* Give xfer the requested abort code. */ 3655 xfer->ux_status = USBD_CANCELLED; 3656 3657 sed = opipe->sed; 3658 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3659 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3660 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */ 3661 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3662 sizeof(sed->ed.ed_flags), 3663 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3664 3665 sitd = xfer->ux_hcpriv; 3666 KASSERT(sitd); 3667 3668 usb_delay_ms_locked(&sc->sc_bus, OHCI_ITD_NOFFSET, &sc->sc_lock); 3669 3670 for (; sitd->xfer == xfer; sitd = sitd->nextitd) { 3671 ohci_hash_rem_itd(sc, sitd); 3672 #ifdef DIAGNOSTIC 3673 DPRINTFN(1, "abort sets done sitd=%p", sitd, 0, 0, 0); 3674 sitd->isdone = true; 3675 #endif 3676 } 3677 3678 /* Run callback. */ 3679 usb_transfer_complete(xfer); 3680 3681 sed->ed.ed_headp = HTOO32(sitd->physaddr); /* unlink TDs */ 3682 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */ 3683 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3684 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3685 3686 done: 3687 KASSERT(mutex_owned(&sc->sc_lock)); 3688 } 3689 3690 void 3691 ohci_device_isoc_done(struct usbd_xfer *xfer) 3692 { 3693 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3694 DPRINTFN(1, "xfer=%p", xfer, 0, 0, 0); 3695 } 3696 3697 usbd_status 3698 ohci_setup_isoc(struct usbd_pipe *pipe) 3699 { 3700 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 3701 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 3702 struct isoc *isoc = &opipe->isoc; 3703 3704 isoc->next = -1; 3705 isoc->inuse = 0; 3706 3707 mutex_enter(&sc->sc_lock); 3708 ohci_add_ed(sc, opipe->sed, sc->sc_isoc_head); 3709 mutex_exit(&sc->sc_lock); 3710 3711 return USBD_NORMAL_COMPLETION; 3712 } 3713 3714 void 3715 ohci_device_isoc_close(struct usbd_pipe *pipe) 3716 { 3717 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 3718 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 3719 3720 KASSERT(mutex_owned(&sc->sc_lock)); 3721 3722 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3723 DPRINTF("pipe=%p", pipe, 0, 0, 0); 3724 ohci_close_pipe(pipe, sc->sc_isoc_head); 3725 #ifdef DIAGNOSTIC 3726 opipe->tail.itd->isdone = true; 3727 #endif 3728 ohci_free_sitd_locked(sc, opipe->tail.itd); 3729 } 3730
Indexes created Fri Oct 03 02:09:57 GMT 2025