ohci.c revision 1.254.2.75
1 /* $NetBSD: ohci.c,v 1.254.2.75 2016/05/29 08:44:31 skrll Exp $ */ 2 3 /* 4 * Copyright (c) 1998, 2004, 2005, 2012 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net) at 9 * Carlstedt Research & Technology, Jared D. McNeill (jmcneill (at) invisible.ca) 10 * and Matthew R. Green (mrg (at) eterna.com.au). 11 * This code is derived from software contributed to The NetBSD Foundation 12 * by Charles M. Hannum. 13 * 14 * Redistribution and use in source and binary forms, with or without 15 * modification, are permitted provided that the following conditions 16 * are met: 17 * 1. Redistributions of source code must retain the above copyright 18 * notice, this list of conditions and the following disclaimer. 19 * 2. Redistributions in binary form must reproduce the above copyright 20 * notice, this list of conditions and the following disclaimer in the 21 * documentation and/or other materials provided with the distribution. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 24 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 25 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 26 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 27 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 31 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 32 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 33 * POSSIBILITY OF SUCH DAMAGE. 34 */ 35 36 /* 37 * USB Open Host Controller driver. 38 * 39 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html 40 * USB spec: http://www.usb.org/developers/docs/ 41 */ 42 43 #include <sys/cdefs.h> 44 __KERNEL_RCSID(0, "$NetBSD: ohci.c,v 1.254.2.75 2016/05/29 08:44:31 skrll Exp $"); 45 46 #ifdef _KERNEL_OPT 47 #include "opt_usb.h" 48 #endif 49 50 #include <sys/param.h> 51 52 #include <sys/cpu.h> 53 #include <sys/device.h> 54 #include <sys/kernel.h> 55 #include <sys/kmem.h> 56 #include <sys/proc.h> 57 #include <sys/queue.h> 58 #include <sys/select.h> 59 #include <sys/sysctl.h> 60 #include <sys/systm.h> 61 62 #include <machine/endian.h> 63 64 #include <dev/usb/usb.h> 65 #include <dev/usb/usbdi.h> 66 #include <dev/usb/usbdivar.h> 67 #include <dev/usb/usb_mem.h> 68 #include <dev/usb/usb_quirks.h> 69 70 #include <dev/usb/ohcireg.h> 71 #include <dev/usb/ohcivar.h> 72 #include <dev/usb/usbroothub.h> 73 #include <dev/usb/usbhist.h> 74 75 #ifdef USB_DEBUG 76 #ifndef OHCI_DEBUG 77 #define ohcidebug 0 78 #else 79 static int ohcidebug = 10; 80 81 SYSCTL_SETUP(sysctl_hw_ohci_setup, "sysctl hw.ohci setup") 82 { 83 int err; 84 const struct sysctlnode *rnode; 85 const struct sysctlnode *cnode; 86 87 err = sysctl_createv(clog, 0, NULL, &rnode, 88 CTLFLAG_PERMANENT, CTLTYPE_NODE, "ohci", 89 SYSCTL_DESCR("ohci global controls"), 90 NULL, 0, NULL, 0, CTL_HW, CTL_CREATE, CTL_EOL); 91 92 if (err) 93 goto fail; 94 95 /* control debugging printfs */ 96 err = sysctl_createv(clog, 0, &rnode, &cnode, 97 CTLFLAG_PERMANENT|CTLFLAG_READWRITE, CTLTYPE_INT, 98 "debug", SYSCTL_DESCR("Enable debugging output"), 99 NULL, 0, &ohcidebug, sizeof(ohcidebug), CTL_CREATE, CTL_EOL); 100 if (err) 101 goto fail; 102 103 return; 104 fail: 105 aprint_error("%s: sysctl_createv failed (err = %d)\n", __func__, err); 106 } 107 108 #endif /* OHCI_DEBUG */ 109 #endif /* USB_DEBUG */ 110 111 #define DPRINTF(FMT,A,B,C,D) USBHIST_LOG(ohcidebug,FMT,A,B,C,D) 112 #define DPRINTFN(N,FMT,A,B,C,D) USBHIST_LOGN(ohcidebug,N,FMT,A,B,C,D) 113 #define OHCIHIST_FUNC() USBHIST_FUNC() 114 #define OHCIHIST_CALLED(name) USBHIST_CALLED(ohcidebug) 115 116 #if BYTE_ORDER == BIG_ENDIAN 117 #define SWAP_ENDIAN OHCI_LITTLE_ENDIAN 118 #else 119 #define SWAP_ENDIAN OHCI_BIG_ENDIAN 120 #endif 121 122 #define O16TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap16(val) : val) 123 #define O32TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap32(val) : val) 124 #define HTOO16(val) O16TOH(val) 125 #define HTOO32(val) O32TOH(val) 126 127 struct ohci_pipe; 128 129 Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *); 130 Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *); 131 132 Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *); 133 Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *); 134 Static void ohci_free_std_locked(ohci_softc_t *, ohci_soft_td_t *); 135 136 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *); 137 Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *); 138 Static void ohci_free_sitd_locked(ohci_softc_t *, 139 ohci_soft_itd_t *); 140 141 Static int ohci_alloc_std_chain(ohci_softc_t *, struct usbd_xfer *, 142 int, int); 143 Static void ohci_free_stds(ohci_softc_t *, struct ohci_xfer *); 144 145 Static void ohci_reset_std_chain(ohci_softc_t *, struct usbd_xfer *, 146 int, int, ohci_soft_td_t *, ohci_soft_td_t **); 147 148 Static usbd_status ohci_open(struct usbd_pipe *); 149 Static void ohci_poll(struct usbd_bus *); 150 Static void ohci_softintr(void *); 151 Static void ohci_rhsc(ohci_softc_t *, struct usbd_xfer *); 152 Static void ohci_rhsc_softint(void *); 153 154 Static void ohci_add_ed(ohci_softc_t *, ohci_soft_ed_t *, 155 ohci_soft_ed_t *); 156 157 Static void ohci_rem_ed(ohci_softc_t *, ohci_soft_ed_t *, 158 ohci_soft_ed_t *); 159 Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *); 160 Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *); 161 Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t); 162 Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *); 163 Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *); 164 Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t); 165 166 Static usbd_status ohci_setup_isoc(struct usbd_pipe *); 167 Static void ohci_device_isoc_enter(struct usbd_xfer *); 168 169 Static struct usbd_xfer * 170 ohci_allocx(struct usbd_bus *, unsigned int); 171 Static void ohci_freex(struct usbd_bus *, struct usbd_xfer *); 172 Static void ohci_get_lock(struct usbd_bus *, kmutex_t **); 173 Static int ohci_roothub_ctrl(struct usbd_bus *, 174 usb_device_request_t *, void *, int); 175 176 Static usbd_status ohci_root_intr_transfer(struct usbd_xfer *); 177 Static usbd_status ohci_root_intr_start(struct usbd_xfer *); 178 Static void ohci_root_intr_abort(struct usbd_xfer *); 179 Static void ohci_root_intr_close(struct usbd_pipe *); 180 Static void ohci_root_intr_done(struct usbd_xfer *); 181 182 Static int ohci_device_ctrl_init(struct usbd_xfer *); 183 Static void ohci_device_ctrl_fini(struct usbd_xfer *); 184 Static usbd_status ohci_device_ctrl_transfer(struct usbd_xfer *); 185 Static usbd_status ohci_device_ctrl_start(struct usbd_xfer *); 186 Static void ohci_device_ctrl_abort(struct usbd_xfer *); 187 Static void ohci_device_ctrl_close(struct usbd_pipe *); 188 Static void ohci_device_ctrl_done(struct usbd_xfer *); 189 190 Static int ohci_device_bulk_init(struct usbd_xfer *); 191 Static void ohci_device_bulk_fini(struct usbd_xfer *); 192 Static usbd_status ohci_device_bulk_transfer(struct usbd_xfer *); 193 Static usbd_status ohci_device_bulk_start(struct usbd_xfer *); 194 Static void ohci_device_bulk_abort(struct usbd_xfer *); 195 Static void ohci_device_bulk_close(struct usbd_pipe *); 196 Static void ohci_device_bulk_done(struct usbd_xfer *); 197 198 Static int ohci_device_intr_init(struct usbd_xfer *); 199 Static void ohci_device_intr_fini(struct usbd_xfer *); 200 Static usbd_status ohci_device_intr_transfer(struct usbd_xfer *); 201 Static usbd_status ohci_device_intr_start(struct usbd_xfer *); 202 Static void ohci_device_intr_abort(struct usbd_xfer *); 203 Static void ohci_device_intr_close(struct usbd_pipe *); 204 Static void ohci_device_intr_done(struct usbd_xfer *); 205 206 Static int ohci_device_isoc_init(struct usbd_xfer *); 207 Static void ohci_device_isoc_fini(struct usbd_xfer *); 208 Static usbd_status ohci_device_isoc_transfer(struct usbd_xfer *); 209 Static void ohci_device_isoc_abort(struct usbd_xfer *); 210 Static void ohci_device_isoc_close(struct usbd_pipe *); 211 Static void ohci_device_isoc_done(struct usbd_xfer *); 212 213 Static usbd_status ohci_device_setintr(ohci_softc_t *, 214 struct ohci_pipe *, int); 215 216 Static void ohci_timeout(void *); 217 Static void ohci_timeout_task(void *); 218 Static void ohci_rhsc_enable(void *); 219 220 Static void ohci_close_pipe(struct usbd_pipe *, ohci_soft_ed_t *); 221 Static void ohci_abort_xfer(struct usbd_xfer *, usbd_status); 222 223 Static void ohci_device_clear_toggle(struct usbd_pipe *); 224 Static void ohci_noop(struct usbd_pipe *); 225 226 #ifdef OHCI_DEBUG 227 Static void ohci_dumpregs(ohci_softc_t *); 228 Static void ohci_dump_tds(ohci_softc_t *, ohci_soft_td_t *); 229 Static void ohci_dump_td(ohci_softc_t *, ohci_soft_td_t *); 230 Static void ohci_dump_ed(ohci_softc_t *, ohci_soft_ed_t *); 231 Static void ohci_dump_itd(ohci_softc_t *, ohci_soft_itd_t *); 232 Static void ohci_dump_itds(ohci_softc_t *, ohci_soft_itd_t *); 233 #endif 234 235 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 236 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 237 #define OWRITE1(sc, r, x) \ 238 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 239 #define OWRITE2(sc, r, x) \ 240 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 241 #define OWRITE4(sc, r, x) \ 242 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 243 244 static __inline uint32_t 245 OREAD4(ohci_softc_t *sc, bus_size_t r) 246 { 247 248 OBARR(sc); 249 return bus_space_read_4(sc->iot, sc->ioh, r); 250 } 251 252 /* Reverse the bits in a value 0 .. 31 */ 253 Static uint8_t revbits[OHCI_NO_INTRS] = 254 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 255 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 256 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 257 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 258 259 struct ohci_pipe { 260 struct usbd_pipe pipe; 261 ohci_soft_ed_t *sed; 262 union { 263 ohci_soft_td_t *td; 264 ohci_soft_itd_t *itd; 265 } tail; 266 /* Info needed for different pipe kinds. */ 267 union { 268 /* Control pipe */ 269 struct { 270 usb_dma_t reqdma; 271 } ctrl; 272 /* Interrupt pipe */ 273 struct { 274 int nslots; 275 int pos; 276 } intr; 277 /* Isochronous pipe */ 278 struct isoc { 279 int next, inuse; 280 } isoc; 281 }; 282 }; 283 284 Static const struct usbd_bus_methods ohci_bus_methods = { 285 .ubm_open = ohci_open, 286 .ubm_softint = ohci_softintr, 287 .ubm_dopoll = ohci_poll, 288 .ubm_allocx = ohci_allocx, 289 .ubm_freex = ohci_freex, 290 .ubm_getlock = ohci_get_lock, 291 .ubm_rhctrl = ohci_roothub_ctrl, 292 }; 293 294 Static const struct usbd_pipe_methods ohci_root_intr_methods = { 295 .upm_transfer = ohci_root_intr_transfer, 296 .upm_start = ohci_root_intr_start, 297 .upm_abort = ohci_root_intr_abort, 298 .upm_close = ohci_root_intr_close, 299 .upm_cleartoggle = ohci_noop, 300 .upm_done = ohci_root_intr_done, 301 }; 302 303 Static const struct usbd_pipe_methods ohci_device_ctrl_methods = { 304 .upm_init = ohci_device_ctrl_init, 305 .upm_fini = ohci_device_ctrl_fini, 306 .upm_transfer = ohci_device_ctrl_transfer, 307 .upm_start = ohci_device_ctrl_start, 308 .upm_abort = ohci_device_ctrl_abort, 309 .upm_close = ohci_device_ctrl_close, 310 .upm_cleartoggle = ohci_noop, 311 .upm_done = ohci_device_ctrl_done, 312 }; 313 314 Static const struct usbd_pipe_methods ohci_device_intr_methods = { 315 .upm_init = ohci_device_intr_init, 316 .upm_fini = ohci_device_intr_fini, 317 .upm_transfer = ohci_device_intr_transfer, 318 .upm_start = ohci_device_intr_start, 319 .upm_abort = ohci_device_intr_abort, 320 .upm_close = ohci_device_intr_close, 321 .upm_cleartoggle = ohci_device_clear_toggle, 322 .upm_done = ohci_device_intr_done, 323 }; 324 325 Static const struct usbd_pipe_methods ohci_device_bulk_methods = { 326 .upm_init = ohci_device_bulk_init, 327 .upm_fini = ohci_device_bulk_fini, 328 .upm_transfer = ohci_device_bulk_transfer, 329 .upm_start = ohci_device_bulk_start, 330 .upm_abort = ohci_device_bulk_abort, 331 .upm_close = ohci_device_bulk_close, 332 .upm_cleartoggle = ohci_device_clear_toggle, 333 .upm_done = ohci_device_bulk_done, 334 }; 335 336 Static const struct usbd_pipe_methods ohci_device_isoc_methods = { 337 .upm_init = ohci_device_isoc_init, 338 .upm_fini = ohci_device_isoc_fini, 339 .upm_transfer = ohci_device_isoc_transfer, 340 .upm_abort = ohci_device_isoc_abort, 341 .upm_close = ohci_device_isoc_close, 342 .upm_cleartoggle = ohci_noop, 343 .upm_done = ohci_device_isoc_done, 344 }; 345 346 int 347 ohci_activate(device_t self, enum devact act) 348 { 349 struct ohci_softc *sc = device_private(self); 350 351 switch (act) { 352 case DVACT_DEACTIVATE: 353 sc->sc_dying = 1; 354 return 0; 355 default: 356 return EOPNOTSUPP; 357 } 358 } 359 360 void 361 ohci_childdet(device_t self, device_t child) 362 { 363 struct ohci_softc *sc = device_private(self); 364 365 KASSERT(sc->sc_child == child); 366 sc->sc_child = NULL; 367 } 368 369 int 370 ohci_detach(struct ohci_softc *sc, int flags) 371 { 372 int rv = 0; 373 374 if (sc->sc_child != NULL) 375 rv = config_detach(sc->sc_child, flags); 376 377 if (rv != 0) 378 return rv; 379 380 callout_halt(&sc->sc_tmo_rhsc, &sc->sc_lock); 381 382 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 383 callout_destroy(&sc->sc_tmo_rhsc); 384 385 softint_disestablish(sc->sc_rhsc_si); 386 387 cv_destroy(&sc->sc_softwake_cv); 388 389 mutex_destroy(&sc->sc_lock); 390 mutex_destroy(&sc->sc_intr_lock); 391 392 if (sc->sc_hcca != NULL) 393 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 394 pool_cache_destroy(sc->sc_xferpool); 395 396 return rv; 397 } 398 399 ohci_soft_ed_t * 400 ohci_alloc_sed(ohci_softc_t *sc) 401 { 402 ohci_soft_ed_t *sed; 403 usbd_status err; 404 int i, offs; 405 usb_dma_t dma; 406 407 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 408 409 mutex_enter(&sc->sc_lock); 410 if (sc->sc_freeeds == NULL) { 411 DPRINTFN(2, "allocating chunk", 0, 0, 0, 0); 412 mutex_exit(&sc->sc_lock); 413 414 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 415 OHCI_ED_ALIGN, &dma); 416 if (err) 417 return 0; 418 419 mutex_enter(&sc->sc_lock); 420 for (i = 0; i < OHCI_SED_CHUNK; i++) { 421 offs = i * OHCI_SED_SIZE; 422 sed = KERNADDR(&dma, offs); 423 sed->physaddr = DMAADDR(&dma, offs); 424 sed->dma = dma; 425 sed->offs = offs; 426 sed->next = sc->sc_freeeds; 427 sc->sc_freeeds = sed; 428 } 429 } 430 sed = sc->sc_freeeds; 431 sc->sc_freeeds = sed->next; 432 mutex_exit(&sc->sc_lock); 433 434 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 435 sed->next = 0; 436 return sed; 437 } 438 439 static inline void 440 ohci_free_sed_locked(ohci_softc_t *sc, ohci_soft_ed_t *sed) 441 { 442 443 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 444 445 sed->next = sc->sc_freeeds; 446 sc->sc_freeeds = sed; 447 } 448 449 void 450 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 451 { 452 453 mutex_enter(&sc->sc_lock); 454 ohci_free_sed_locked(sc, sed); 455 mutex_exit(&sc->sc_lock); 456 } 457 458 ohci_soft_td_t * 459 ohci_alloc_std(ohci_softc_t *sc) 460 { 461 ohci_soft_td_t *std; 462 usbd_status err; 463 int i, offs; 464 usb_dma_t dma; 465 466 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 467 468 mutex_enter(&sc->sc_lock); 469 if (sc->sc_freetds == NULL) { 470 DPRINTFN(2, "allocating chunk", 0, 0, 0, 0); 471 mutex_exit(&sc->sc_lock); 472 473 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 474 OHCI_TD_ALIGN, &dma); 475 if (err) 476 return NULL; 477 478 mutex_enter(&sc->sc_lock); 479 for (i = 0; i < OHCI_STD_CHUNK; i++) { 480 offs = i * OHCI_STD_SIZE; 481 std = KERNADDR(&dma, offs); 482 std->physaddr = DMAADDR(&dma, offs); 483 std->dma = dma; 484 std->offs = offs; 485 std->nexttd = sc->sc_freetds; 486 sc->sc_freetds = std; 487 } 488 } 489 490 std = sc->sc_freetds; 491 sc->sc_freetds = std->nexttd; 492 mutex_exit(&sc->sc_lock); 493 494 memset(&std->td, 0, sizeof(ohci_td_t)); 495 std->nexttd = NULL; 496 std->xfer = NULL; 497 498 return std; 499 } 500 501 void 502 ohci_free_std_locked(ohci_softc_t *sc, ohci_soft_td_t *std) 503 { 504 505 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 506 507 std->nexttd = sc->sc_freetds; 508 sc->sc_freetds = std; 509 } 510 511 void 512 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std) 513 { 514 515 mutex_enter(&sc->sc_lock); 516 ohci_free_std_locked(sc, std); 517 mutex_exit(&sc->sc_lock); 518 } 519 520 Static int 521 ohci_alloc_std_chain(ohci_softc_t *sc, struct usbd_xfer *xfer, int length, int rd) 522 { 523 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 524 uint16_t flags = xfer->ux_flags; 525 526 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 527 528 DPRINTFN(8, "addr=%d endpt=%d len=%d speed=%d", 529 xfer->ux_pipe->up_dev->ud_addr, 530 UE_GET_ADDR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress), 531 length, xfer->ux_pipe->up_dev->ud_speed); 532 533 ASSERT_SLEEPABLE(); 534 KASSERT(length != 0 || (!rd && (flags & USBD_FORCE_SHORT_XFER))); 535 536 size_t nstd = (!rd && (flags & USBD_FORCE_SHORT_XFER)) ? 1 : 0; 537 nstd += ((length + OHCI_PAGE_SIZE - 1) / OHCI_PAGE_SIZE); 538 ox->ox_stds = kmem_zalloc(sizeof(ohci_soft_td_t *) * nstd, 539 KM_SLEEP); 540 ox->ox_nstd = nstd; 541 542 DPRINTFN(8, "xfer %p nstd %d", xfer, nstd, 0, 0); 543 544 for (size_t j = 0; j < ox->ox_nstd;) { 545 ohci_soft_td_t *cur = ohci_alloc_std(sc); 546 if (cur == NULL) 547 goto nomem; 548 549 ox->ox_stds[j++] = cur; 550 cur->xfer = xfer; 551 cur->flags = 0; 552 } 553 554 return 0; 555 556 nomem: 557 ohci_free_stds(sc, ox); 558 kmem_free(ox->ox_stds, sizeof(ohci_soft_td_t *) * nstd); 559 560 return ENOMEM; 561 } 562 563 Static void 564 ohci_free_stds(ohci_softc_t *sc, struct ohci_xfer *ox) 565 { 566 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 567 DPRINTF("ox=%p", ox, 0, 0, 0); 568 569 mutex_enter(&sc->sc_lock); 570 for (size_t i = 0; i < ox->ox_nstd; i++) { 571 ohci_soft_td_t *std = ox->ox_stds[i]; 572 if (std == NULL) 573 break; 574 ohci_free_std_locked(sc, std); 575 } 576 mutex_exit(&sc->sc_lock); 577 } 578 579 void 580 ohci_reset_std_chain(ohci_softc_t *sc, struct usbd_xfer *xfer, 581 int alen, int rd, ohci_soft_td_t *sp, ohci_soft_td_t **ep) 582 { 583 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 584 ohci_soft_td_t *next, *cur; 585 int len, curlen; 586 usb_dma_t *dma = &xfer->ux_dmabuf; 587 uint16_t flags = xfer->ux_flags; 588 589 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 590 DPRINTF("start len=%d", alen, 0, 0, 0); 591 592 KASSERT(mutex_owned(&sc->sc_lock)); 593 594 DPRINTFN(8, "addr=%d endpt=%d len=%d speed=%d", 595 xfer->ux_pipe->up_dev->ud_addr, 596 UE_GET_ADDR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress), 597 alen, xfer->ux_pipe->up_dev->ud_speed); 598 599 KASSERT(sp); 600 601 int mps = UGETW(xfer->ux_pipe->up_endpoint->ue_edesc->wMaxPacketSize); 602 603 /* 604 * Assign next for the len == 0 case where we don't go through the 605 * main loop. 606 */ 607 len = alen; 608 cur = next = sp; 609 610 usb_syncmem(dma, 0, len, 611 rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 612 const uint32_t tdflags = HTOO32( 613 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 614 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR); 615 616 size_t curoffs = 0; 617 for (size_t j = 1; len != 0;) { 618 if (j == ox->ox_nstd) 619 next = NULL; 620 else 621 next = ox->ox_stds[j++]; 622 KASSERT(next != cur); 623 624 curlen = 0; 625 ohci_physaddr_t sdataphys = DMAADDR(dma, curoffs); 626 ohci_physaddr_t edataphys = DMAADDR(dma, curoffs + len - 1); 627 628 ohci_physaddr_t sphyspg = OHCI_PAGE(sdataphys); 629 ohci_physaddr_t ephyspg = OHCI_PAGE(edataphys); 630 /* 631 * The OHCI hardware can handle at most one page 632 * crossing per TD 633 */ 634 curlen = len; 635 if (!(sphyspg == ephyspg || sphyspg + 1 == ephyspg)) { 636 /* must use multiple TDs, fill as much as possible. */ 637 curlen = 2 * OHCI_PAGE_SIZE - 638 (sdataphys & (OHCI_PAGE_SIZE - 1)); 639 /* the length must be a multiple of the max size */ 640 curlen -= curlen % mps; 641 } 642 KASSERT(curlen != 0); 643 DPRINTFN(4, "sdataphys=0x%08x edataphys=0x%08x " 644 "len=%d curlen=%d", sdataphys, edataphys, len, curlen); 645 646 cur->td.td_flags = tdflags; 647 cur->td.td_cbp = HTOO32(sdataphys); 648 cur->td.td_be = HTOO32(edataphys); 649 cur->td.td_nexttd = (next != NULL) ? HTOO32(next->physaddr) : 0; 650 cur->nexttd = next; 651 cur->len = curlen; 652 cur->flags = OHCI_ADD_LEN; 653 cur->xfer = xfer; 654 ohci_hash_add_td(sc, cur); 655 656 usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td), 657 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 658 659 curoffs += curlen; 660 len -= curlen; 661 662 if (len != 0) { 663 KASSERT(next != NULL); 664 DPRINTFN(10, "extend chain", 0, 0, 0, 0); 665 cur = next; 666 } 667 } 668 cur->td.td_flags |= 669 HTOO32(xfer->ux_flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0); 670 671 if (!rd && 672 (flags & USBD_FORCE_SHORT_XFER) && 673 alen % mps == 0) { 674 /* Force a 0 length transfer at the end. */ 675 676 KASSERT(next != NULL); 677 cur = next; 678 679 cur->td.td_flags = tdflags; 680 cur->td.td_cbp = 0; /* indicate 0 length packet */ 681 cur->td.td_nexttd = 0; 682 cur->td.td_be = ~0; 683 cur->nexttd = NULL; 684 cur->len = 0; 685 cur->flags = 0; 686 cur->xfer = xfer; 687 ohci_hash_add_td(sc, cur); 688 689 usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td), 690 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 691 DPRINTFN(2, "add 0 xfer", 0, 0, 0, 0); 692 } 693 *ep = cur; 694 } 695 696 ohci_soft_itd_t * 697 ohci_alloc_sitd(ohci_softc_t *sc) 698 { 699 ohci_soft_itd_t *sitd; 700 usbd_status err; 701 int i, offs; 702 usb_dma_t dma; 703 704 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 705 706 mutex_enter(&sc->sc_lock); 707 if (sc->sc_freeitds == NULL) { 708 DPRINTFN(2, "allocating chunk", 0, 0, 0, 0); 709 mutex_exit(&sc->sc_lock); 710 711 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK, 712 OHCI_ITD_ALIGN, &dma); 713 if (err) 714 return NULL; 715 mutex_enter(&sc->sc_lock); 716 for (i = 0; i < OHCI_SITD_CHUNK; i++) { 717 offs = i * OHCI_SITD_SIZE; 718 sitd = KERNADDR(&dma, offs); 719 sitd->physaddr = DMAADDR(&dma, offs); 720 sitd->dma = dma; 721 sitd->offs = offs; 722 sitd->nextitd = sc->sc_freeitds; 723 sc->sc_freeitds = sitd; 724 } 725 } 726 727 sitd = sc->sc_freeitds; 728 sc->sc_freeitds = sitd->nextitd; 729 mutex_exit(&sc->sc_lock); 730 731 memset(&sitd->itd, 0, sizeof(ohci_itd_t)); 732 sitd->nextitd = NULL; 733 sitd->xfer = NULL; 734 735 #ifdef DIAGNOSTIC 736 sitd->isdone = true; 737 #endif 738 739 return sitd; 740 } 741 742 Static void 743 ohci_free_sitd_locked(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 744 { 745 746 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 747 DPRINTFN(10, "sitd=%p", sitd, 0, 0, 0); 748 749 KASSERT(sitd->isdone); 750 #ifdef DIAGNOSTIC 751 /* Warn double free */ 752 sitd->isdone = false; 753 #endif 754 755 sitd->nextitd = sc->sc_freeitds; 756 sc->sc_freeitds = sitd; 757 } 758 759 void 760 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 761 { 762 763 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 764 765 mutex_enter(&sc->sc_lock); 766 ohci_free_sitd_locked(sc, sitd); 767 mutex_exit(&sc->sc_lock); 768 } 769 770 int 771 ohci_init(ohci_softc_t *sc) 772 { 773 ohci_soft_ed_t *sed, *psed; 774 usbd_status err; 775 int i; 776 uint32_t s, ctl, rwc, ival, hcr, fm, per, rev, desca /*, descb */; 777 778 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 779 780 aprint_normal_dev(sc->sc_dev, ""); 781 782 sc->sc_hcca = NULL; 783 callout_init(&sc->sc_tmo_rhsc, CALLOUT_MPSAFE); 784 785 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_SOFTUSB); 786 mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_USB); 787 cv_init(&sc->sc_softwake_cv, "ohciab"); 788 789 sc->sc_rhsc_si = softint_establish(SOFTINT_NET | SOFTINT_MPSAFE, 790 ohci_rhsc_softint, sc); 791 792 for (i = 0; i < OHCI_HASH_SIZE; i++) 793 LIST_INIT(&sc->sc_hash_tds[i]); 794 for (i = 0; i < OHCI_HASH_SIZE; i++) 795 LIST_INIT(&sc->sc_hash_itds[i]); 796 797 sc->sc_xferpool = pool_cache_init(sizeof(struct ohci_xfer), 0, 0, 0, 798 "ohcixfer", NULL, IPL_USB, NULL, NULL, NULL); 799 800 rev = OREAD4(sc, OHCI_REVISION); 801 aprint_normal("OHCI version %d.%d%s\n", 802 OHCI_REV_HI(rev), OHCI_REV_LO(rev), 803 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 804 805 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 806 aprint_error_dev(sc->sc_dev, "unsupported OHCI revision\n"); 807 sc->sc_bus.ub_revision = USBREV_UNKNOWN; 808 return -1; 809 } 810 sc->sc_bus.ub_revision = USBREV_1_0; 811 sc->sc_bus.ub_usedma = true; 812 813 /* XXX determine alignment by R/W */ 814 /* Allocate the HCCA area. */ 815 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 816 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 817 if (err) { 818 sc->sc_hcca = NULL; 819 return err; 820 } 821 sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0); 822 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 823 824 sc->sc_eintrs = OHCI_NORMAL_INTRS; 825 826 /* Allocate dummy ED that starts the control list. */ 827 sc->sc_ctrl_head = ohci_alloc_sed(sc); 828 if (sc->sc_ctrl_head == NULL) { 829 err = ENOMEM; 830 goto bad1; 831 } 832 sc->sc_ctrl_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 833 834 /* Allocate dummy ED that starts the bulk list. */ 835 sc->sc_bulk_head = ohci_alloc_sed(sc); 836 if (sc->sc_bulk_head == NULL) { 837 err = ENOMEM; 838 goto bad2; 839 } 840 sc->sc_bulk_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 841 usb_syncmem(&sc->sc_bulk_head->dma, sc->sc_bulk_head->offs, 842 sizeof(sc->sc_bulk_head->ed), 843 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 844 845 /* Allocate dummy ED that starts the isochronous list. */ 846 sc->sc_isoc_head = ohci_alloc_sed(sc); 847 if (sc->sc_isoc_head == NULL) { 848 err = ENOMEM; 849 goto bad3; 850 } 851 sc->sc_isoc_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 852 usb_syncmem(&sc->sc_isoc_head->dma, sc->sc_isoc_head->offs, 853 sizeof(sc->sc_isoc_head->ed), 854 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 855 856 /* Allocate all the dummy EDs that make up the interrupt tree. */ 857 for (i = 0; i < OHCI_NO_EDS; i++) { 858 sed = ohci_alloc_sed(sc); 859 if (sed == NULL) { 860 while (--i >= 0) 861 ohci_free_sed(sc, sc->sc_eds[i]); 862 err = ENOMEM; 863 goto bad4; 864 } 865 /* All ED fields are set to 0. */ 866 sc->sc_eds[i] = sed; 867 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 868 if (i != 0) 869 psed = sc->sc_eds[(i-1) / 2]; 870 else 871 psed= sc->sc_isoc_head; 872 sed->next = psed; 873 sed->ed.ed_nexted = HTOO32(psed->physaddr); 874 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 875 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 876 } 877 /* 878 * Fill HCCA interrupt table. The bit reversal is to get 879 * the tree set up properly to spread the interrupts. 880 */ 881 for (i = 0; i < OHCI_NO_INTRS; i++) 882 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 883 HTOO32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 884 usb_syncmem(&sc->sc_hccadma, 0, OHCI_HCCA_SIZE, 885 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 886 887 #ifdef OHCI_DEBUG 888 DPRINTFN(15, "--- dump start ---", 0, 0, 0 ,0); 889 if (ohcidebug >= 15) { 890 for (i = 0; i < OHCI_NO_EDS; i++) { 891 DPRINTFN(15, "ed#%d ", i, 0, 0, 0); 892 ohci_dump_ed(sc, sc->sc_eds[i]); 893 } 894 DPRINTFN(15, "iso", 0, 0, 0 ,0); 895 ohci_dump_ed(sc, sc->sc_isoc_head); 896 } 897 DPRINTFN(15, "--- dump end ---", 0, 0, 0 ,0); 898 #endif 899 900 /* Preserve values programmed by SMM/BIOS but lost over reset. */ 901 ctl = OREAD4(sc, OHCI_CONTROL); 902 rwc = ctl & OHCI_RWC; 903 fm = OREAD4(sc, OHCI_FM_INTERVAL); 904 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 905 /* descb = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); */ 906 907 /* Determine in what context we are running. */ 908 if (ctl & OHCI_IR) { 909 /* SMM active, request change */ 910 DPRINTF("SMM active, request owner change", 0, 0, 0, 0); 911 if ((sc->sc_intre & (OHCI_OC | OHCI_MIE)) == 912 (OHCI_OC | OHCI_MIE)) 913 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_MIE); 914 s = OREAD4(sc, OHCI_COMMAND_STATUS); 915 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 916 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 917 usb_delay_ms(&sc->sc_bus, 1); 918 ctl = OREAD4(sc, OHCI_CONTROL); 919 } 920 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_MIE); 921 if ((ctl & OHCI_IR) == 0) { 922 aprint_error_dev(sc->sc_dev, 923 "SMM does not respond, resetting\n"); 924 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 925 goto reset; 926 } 927 #if 0 928 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */ 929 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 930 /* BIOS started controller. */ 931 DPRINTF("BIOS active", 0, 0, 0, 0); 932 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 933 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL | rwc); 934 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 935 } 936 #endif 937 } else { 938 DPRINTF("cold started", 0 ,0 ,0 ,0); 939 reset: 940 /* Controller was cold started. */ 941 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 942 } 943 944 /* 945 * This reset should not be necessary according to the OHCI spec, but 946 * without it some controllers do not start. 947 */ 948 DPRINTF("sc %p: resetting", sc, 0, 0, 0); 949 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 950 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 951 952 /* We now own the host controller and the bus has been reset. */ 953 954 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 955 /* Nominal time for a reset is 10 us. */ 956 for (i = 0; i < 10; i++) { 957 delay(10); 958 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 959 if (!hcr) 960 break; 961 } 962 if (hcr) { 963 aprint_error_dev(sc->sc_dev, "reset timeout\n"); 964 err = EIO; 965 goto bad5; 966 } 967 #ifdef OHCI_DEBUG 968 if (ohcidebug >= 15) 969 ohci_dumpregs(sc); 970 #endif 971 972 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 973 974 /* Set up HC registers. */ 975 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 976 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 977 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 978 /* disable all interrupts and then switch on all desired interrupts */ 979 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 980 /* switch on desired functional features */ 981 ctl = OREAD4(sc, OHCI_CONTROL); 982 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 983 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 984 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL | rwc; 985 /* And finally start it! */ 986 OWRITE4(sc, OHCI_CONTROL, ctl); 987 988 /* 989 * The controller is now OPERATIONAL. Set a some final 990 * registers that should be set earlier, but that the 991 * controller ignores when in the SUSPEND state. 992 */ 993 ival = OHCI_GET_IVAL(fm); 994 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 995 fm |= OHCI_FSMPS(ival) | ival; 996 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 997 per = OHCI_PERIODIC(ival); /* 90% periodic */ 998 OWRITE4(sc, OHCI_PERIODIC_START, per); 999 1000 if (sc->sc_flags & OHCIF_SUPERIO) { 1001 /* no overcurrent protection */ 1002 desca |= OHCI_NOCP; 1003 /* 1004 * Clear NoPowerSwitching and PowerOnToPowerGoodTime meaning 1005 * that 1006 * - ports are always power switched 1007 * - don't wait for powered root hub port 1008 */ 1009 desca &= ~(__SHIFTIN(0xff, OHCI_POTPGT_MASK) | OHCI_NPS); 1010 } 1011 1012 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */ 1013 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP); 1014 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 1015 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY); 1016 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca); 1017 1018 /* 1019 * The AMD756 requires a delay before re-reading the register, 1020 * otherwise it will occasionally report 0 ports. 1021 */ 1022 sc->sc_noport = 0; 1023 for (i = 0; i < 10 && sc->sc_noport == 0; i++) { 1024 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY); 1025 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 1026 } 1027 1028 #ifdef OHCI_DEBUG 1029 if (ohcidebug >= 5) 1030 ohci_dumpregs(sc); 1031 #endif 1032 1033 /* Set up the bus struct. */ 1034 sc->sc_bus.ub_methods = &ohci_bus_methods; 1035 sc->sc_bus.ub_pipesize = sizeof(struct ohci_pipe); 1036 1037 sc->sc_control = sc->sc_intre = 0; 1038 1039 /* Finally, turn on interrupts. */ 1040 DPRINTF("enabling %#x", sc->sc_eintrs | OHCI_MIE, 0, 0, 0); 1041 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 1042 1043 return 0; 1044 1045 bad5: 1046 for (i = 0; i < OHCI_NO_EDS; i++) 1047 ohci_free_sed(sc, sc->sc_eds[i]); 1048 bad4: 1049 ohci_free_sed(sc, sc->sc_isoc_head); 1050 bad3: 1051 ohci_free_sed(sc, sc->sc_bulk_head); 1052 bad2: 1053 ohci_free_sed(sc, sc->sc_ctrl_head); 1054 bad1: 1055 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 1056 sc->sc_hcca = NULL; 1057 return err; 1058 } 1059 1060 struct usbd_xfer * 1061 ohci_allocx(struct usbd_bus *bus, unsigned int nframes) 1062 { 1063 ohci_softc_t *sc = OHCI_BUS2SC(bus); 1064 struct usbd_xfer *xfer; 1065 1066 xfer = pool_cache_get(sc->sc_xferpool, PR_NOWAIT); 1067 if (xfer != NULL) { 1068 memset(xfer, 0, sizeof(struct ohci_xfer)); 1069 #ifdef DIAGNOSTIC 1070 xfer->ux_state = XFER_BUSY; 1071 #endif 1072 } 1073 return xfer; 1074 } 1075 1076 void 1077 ohci_freex(struct usbd_bus *bus, struct usbd_xfer *xfer) 1078 { 1079 ohci_softc_t *sc = OHCI_BUS2SC(bus); 1080 1081 KASSERTMSG(xfer->ux_state == XFER_BUSY, 1082 "xfer=%p not busy, 0x%08x\n", xfer, xfer->ux_state); 1083 #ifdef DIAGNOSTIC 1084 xfer->ux_state = XFER_FREE; 1085 #endif 1086 pool_cache_put(sc->sc_xferpool, xfer); 1087 } 1088 1089 Static void 1090 ohci_get_lock(struct usbd_bus *bus, kmutex_t **lock) 1091 { 1092 ohci_softc_t *sc = OHCI_BUS2SC(bus); 1093 1094 *lock = &sc->sc_lock; 1095 } 1096 1097 /* 1098 * Shut down the controller when the system is going down. 1099 */ 1100 bool 1101 ohci_shutdown(device_t self, int flags) 1102 { 1103 ohci_softc_t *sc = device_private(self); 1104 1105 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1106 1107 DPRINTF("stopping the HC", 0, 0, 0, 0); 1108 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1109 return true; 1110 } 1111 1112 bool 1113 ohci_resume(device_t dv, const pmf_qual_t *qual) 1114 { 1115 ohci_softc_t *sc = device_private(dv); 1116 uint32_t ctl; 1117 1118 mutex_spin_enter(&sc->sc_intr_lock); 1119 sc->sc_bus.ub_usepolling++; 1120 mutex_spin_exit(&sc->sc_intr_lock); 1121 1122 /* Some broken BIOSes do not recover these values */ 1123 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 1124 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, 1125 sc->sc_ctrl_head->physaddr); 1126 OWRITE4(sc, OHCI_BULK_HEAD_ED, 1127 sc->sc_bulk_head->physaddr); 1128 if (sc->sc_intre) 1129 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_intre & 1130 (OHCI_ALL_INTRS | OHCI_MIE)); 1131 if (sc->sc_control) 1132 ctl = sc->sc_control; 1133 else 1134 ctl = OREAD4(sc, OHCI_CONTROL); 1135 ctl |= OHCI_HCFS_RESUME; 1136 OWRITE4(sc, OHCI_CONTROL, ctl); 1137 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 1138 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL; 1139 OWRITE4(sc, OHCI_CONTROL, ctl); 1140 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 1141 sc->sc_control = sc->sc_intre = 0; 1142 1143 mutex_spin_enter(&sc->sc_intr_lock); 1144 sc->sc_bus.ub_usepolling--; 1145 mutex_spin_exit(&sc->sc_intr_lock); 1146 1147 return true; 1148 } 1149 1150 bool 1151 ohci_suspend(device_t dv, const pmf_qual_t *qual) 1152 { 1153 ohci_softc_t *sc = device_private(dv); 1154 uint32_t ctl; 1155 1156 mutex_spin_enter(&sc->sc_intr_lock); 1157 sc->sc_bus.ub_usepolling++; 1158 mutex_spin_exit(&sc->sc_intr_lock); 1159 1160 ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK; 1161 if (sc->sc_control == 0) { 1162 /* 1163 * Preserve register values, in case that BIOS 1164 * does not recover them. 1165 */ 1166 sc->sc_control = ctl; 1167 sc->sc_intre = OREAD4(sc, 1168 OHCI_INTERRUPT_ENABLE); 1169 } 1170 ctl |= OHCI_HCFS_SUSPEND; 1171 OWRITE4(sc, OHCI_CONTROL, ctl); 1172 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1173 1174 mutex_spin_enter(&sc->sc_intr_lock); 1175 sc->sc_bus.ub_usepolling--; 1176 mutex_spin_exit(&sc->sc_intr_lock); 1177 1178 return true; 1179 } 1180 1181 #ifdef OHCI_DEBUG 1182 void 1183 ohci_dumpregs(ohci_softc_t *sc) 1184 { 1185 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1186 1187 DPRINTF("rev=0x%08x control=0x%08x command=0x%08x", 1188 OREAD4(sc, OHCI_REVISION), 1189 OREAD4(sc, OHCI_CONTROL), 1190 OREAD4(sc, OHCI_COMMAND_STATUS), 0); 1191 DPRINTF(" intrstat=0x%08x intre=0x%08x intrd=0x%08x", 1192 OREAD4(sc, OHCI_INTERRUPT_STATUS), 1193 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 1194 OREAD4(sc, OHCI_INTERRUPT_DISABLE), 0); 1195 DPRINTF(" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x", 1196 OREAD4(sc, OHCI_HCCA), 1197 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 1198 OREAD4(sc, OHCI_CONTROL_HEAD_ED), 0); 1199 DPRINTF(" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x", 1200 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 1201 OREAD4(sc, OHCI_BULK_HEAD_ED), 1202 OREAD4(sc, OHCI_BULK_CURRENT_ED) ,0); 1203 DPRINTF(" done=0x%08x fmival=0x%08x fmrem=0x%08x", 1204 OREAD4(sc, OHCI_DONE_HEAD), 1205 OREAD4(sc, OHCI_FM_INTERVAL), 1206 OREAD4(sc, OHCI_FM_REMAINING), 0); 1207 DPRINTF(" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x", 1208 OREAD4(sc, OHCI_FM_NUMBER), 1209 OREAD4(sc, OHCI_PERIODIC_START), 1210 OREAD4(sc, OHCI_LS_THRESHOLD), 0); 1211 DPRINTF(" desca=0x%08x descb=0x%08x stat=0x%08x", 1212 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 1213 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 1214 OREAD4(sc, OHCI_RH_STATUS), 0); 1215 DPRINTF(" port1=0x%08x port2=0x%08x", 1216 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 1217 OREAD4(sc, OHCI_RH_PORT_STATUS(2)), 0, 0); 1218 DPRINTF(" HCCA: frame_number=0x%04x done_head=0x%08x", 1219 O32TOH(sc->sc_hcca->hcca_frame_number), 1220 O32TOH(sc->sc_hcca->hcca_done_head), 0, 0); 1221 } 1222 #endif 1223 1224 Static int ohci_intr1(ohci_softc_t *); 1225 1226 int 1227 ohci_intr(void *p) 1228 { 1229 ohci_softc_t *sc = p; 1230 int ret = 0; 1231 1232 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1233 1234 if (sc == NULL) 1235 return 0; 1236 1237 mutex_spin_enter(&sc->sc_intr_lock); 1238 1239 if (sc->sc_dying || !device_has_power(sc->sc_dev)) 1240 goto done; 1241 1242 /* If we get an interrupt while polling, then just ignore it. */ 1243 if (sc->sc_bus.ub_usepolling) { 1244 DPRINTFN(16, "ignored interrupt while polling", 0, 0, 0, 0); 1245 /* for level triggered intrs, should do something to ack */ 1246 OWRITE4(sc, OHCI_INTERRUPT_STATUS, 1247 OREAD4(sc, OHCI_INTERRUPT_STATUS)); 1248 1249 goto done; 1250 } 1251 1252 ret = ohci_intr1(sc); 1253 1254 done: 1255 mutex_spin_exit(&sc->sc_intr_lock); 1256 return ret; 1257 } 1258 1259 Static int 1260 ohci_intr1(ohci_softc_t *sc) 1261 { 1262 uint32_t intrs, eintrs; 1263 1264 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1265 1266 /* In case the interrupt occurs before initialization has completed. */ 1267 if (sc == NULL || sc->sc_hcca == NULL) { 1268 #ifdef DIAGNOSTIC 1269 printf("ohci_intr: sc->sc_hcca == NULL\n"); 1270 #endif 1271 return 0; 1272 } 1273 1274 KASSERT(mutex_owned(&sc->sc_intr_lock)); 1275 1276 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1277 if (!intrs) 1278 return 0; 1279 1280 /* Acknowledge */ 1281 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs & ~(OHCI_MIE|OHCI_WDH)); 1282 eintrs = intrs & sc->sc_eintrs; 1283 DPRINTFN(7, "sc=%p", sc, 0, 0, 0); 1284 DPRINTFN(7, "intrs=%#x(%#x) eintrs=%#x(%#x)", 1285 intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), eintrs, 1286 sc->sc_eintrs); 1287 1288 if (!eintrs) { 1289 return 0; 1290 } 1291 1292 if (eintrs & OHCI_SO) { 1293 sc->sc_overrun_cnt++; 1294 if (usbd_ratecheck(&sc->sc_overrun_ntc)) { 1295 printf("%s: %u scheduling overruns\n", 1296 device_xname(sc->sc_dev), sc->sc_overrun_cnt); 1297 sc->sc_overrun_cnt = 0; 1298 } 1299 /* XXX do what */ 1300 eintrs &= ~OHCI_SO; 1301 } 1302 if (eintrs & OHCI_WDH) { 1303 /* 1304 * We block the interrupt below, and reenable it later from 1305 * ohci_softintr(). 1306 */ 1307 usb_schedsoftintr(&sc->sc_bus); 1308 } 1309 if (eintrs & OHCI_RD) { 1310 DPRINTFN(5, "resume detect", sc, 0, 0, 0); 1311 printf("%s: resume detect\n", device_xname(sc->sc_dev)); 1312 /* XXX process resume detect */ 1313 } 1314 if (eintrs & OHCI_UE) { 1315 DPRINTFN(5, "unrecoverable error", sc, 0, 0, 0); 1316 printf("%s: unrecoverable error, controller halted\n", 1317 device_xname(sc->sc_dev)); 1318 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1319 /* XXX what else */ 1320 } 1321 if (eintrs & OHCI_RHSC) { 1322 /* 1323 * We block the interrupt below, and reenable it later from 1324 * a timeout. 1325 */ 1326 softint_schedule(sc->sc_rhsc_si); 1327 } 1328 1329 if (eintrs != 0) { 1330 /* Block unprocessed interrupts. */ 1331 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs); 1332 sc->sc_eintrs &= ~eintrs; 1333 DPRINTF("sc %p blocking intrs 0x%x", sc, eintrs, 0, 0); 1334 } 1335 1336 return 1; 1337 } 1338 1339 void 1340 ohci_rhsc_enable(void *v_sc) 1341 { 1342 ohci_softc_t *sc = v_sc; 1343 1344 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1345 DPRINTF("sc %p", sc, 0, 0, 0); 1346 mutex_spin_enter(&sc->sc_intr_lock); 1347 sc->sc_eintrs |= OHCI_RHSC; 1348 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1349 mutex_spin_exit(&sc->sc_intr_lock); 1350 } 1351 1352 #ifdef OHCI_DEBUG 1353 const char *ohci_cc_strs[] = { 1354 "NO_ERROR", 1355 "CRC", 1356 "BIT_STUFFING", 1357 "DATA_TOGGLE_MISMATCH", 1358 "STALL", 1359 "DEVICE_NOT_RESPONDING", 1360 "PID_CHECK_FAILURE", 1361 "UNEXPECTED_PID", 1362 "DATA_OVERRUN", 1363 "DATA_UNDERRUN", 1364 "BUFFER_OVERRUN", 1365 "BUFFER_UNDERRUN", 1366 "reserved", 1367 "reserved", 1368 "NOT_ACCESSED", 1369 "NOT_ACCESSED", 1370 }; 1371 #endif 1372 1373 void 1374 ohci_softintr(void *v) 1375 { 1376 struct usbd_bus *bus = v; 1377 ohci_softc_t *sc = OHCI_BUS2SC(bus); 1378 ohci_soft_itd_t *sitd, *sidone, *sitdnext; 1379 ohci_soft_td_t *std, *sdone, *stdnext; 1380 struct usbd_xfer *xfer; 1381 struct ohci_pipe *opipe; 1382 int len, cc; 1383 int i, j, actlen, iframes, uedir; 1384 ohci_physaddr_t done; 1385 1386 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1387 1388 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1389 1390 usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head), 1391 sizeof(sc->sc_hcca->hcca_done_head), 1392 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1393 done = O32TOH(sc->sc_hcca->hcca_done_head) & ~OHCI_DONE_INTRS; 1394 sc->sc_hcca->hcca_done_head = 0; 1395 usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head), 1396 sizeof(sc->sc_hcca->hcca_done_head), 1397 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1398 OWRITE4(sc, OHCI_INTERRUPT_STATUS, OHCI_WDH); 1399 sc->sc_eintrs |= OHCI_WDH; 1400 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_WDH); 1401 1402 /* Reverse the done list. */ 1403 for (sdone = NULL, sidone = NULL; done != 0; ) { 1404 std = ohci_hash_find_td(sc, done); 1405 if (std != NULL) { 1406 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 1407 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1408 std->dnext = sdone; 1409 done = O32TOH(std->td.td_nexttd); 1410 sdone = std; 1411 DPRINTFN(10, "add TD %p", std, 0, 0, 0); 1412 continue; 1413 } 1414 sitd = ohci_hash_find_itd(sc, done); 1415 if (sitd != NULL) { 1416 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 1417 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1418 sitd->dnext = sidone; 1419 done = O32TOH(sitd->itd.itd_nextitd); 1420 sidone = sitd; 1421 DPRINTFN(5, "add ITD %p", sitd, 0, 0, 0); 1422 continue; 1423 } 1424 DPRINTFN(10, "addr %p not found", done, 0, 0, 0); 1425 device_printf(sc->sc_dev, "WARNING: addr 0x%08lx not found\n", 1426 (u_long)done); 1427 break; 1428 } 1429 1430 DPRINTFN(10, "sdone=%p sidone=%p", sdone, sidone, 0, 0); 1431 DPRINTFN(10, "--- TD dump start ---", 0, 0, 0, 0); 1432 #ifdef OHCI_DEBUG 1433 if (ohcidebug >= 10) { 1434 for (std = sdone; std; std = std->dnext) 1435 ohci_dump_td(sc, std); 1436 } 1437 #endif 1438 DPRINTFN(10, "--- TD dump end ---", 0, 0, 0, 0); 1439 1440 for (std = sdone; std; std = stdnext) { 1441 xfer = std->xfer; 1442 stdnext = std->dnext; 1443 DPRINTFN(10, "std=%p xfer=%p hcpriv=%p", std, xfer, 1444 xfer ? xfer->ux_hcpriv : 0, 0); 1445 if (xfer == NULL) { 1446 /* 1447 * xfer == NULL: There seems to be no xfer associated 1448 * with this TD. It is tailp that happened to end up on 1449 * the done queue. 1450 * Shouldn't happen, but some chips are broken(?). 1451 */ 1452 continue; 1453 } 1454 if (xfer->ux_status == USBD_CANCELLED || 1455 xfer->ux_status == USBD_TIMEOUT) { 1456 DPRINTF("cancel/timeout %p", xfer, 0, 0, 0); 1457 /* Handled by abort routine. */ 1458 continue; 1459 } 1460 callout_stop(&xfer->ux_callout); 1461 1462 len = std->len; 1463 if (std->td.td_cbp != 0) 1464 len -= O32TOH(std->td.td_be) - 1465 O32TOH(std->td.td_cbp) + 1; 1466 DPRINTFN(10, "len=%d, flags=0x%x", len, std->flags, 0, 0); 1467 if (std->flags & OHCI_ADD_LEN) 1468 xfer->ux_actlen += len; 1469 1470 cc = OHCI_TD_GET_CC(O32TOH(std->td.td_flags)); 1471 if (cc == OHCI_CC_NO_ERROR) { 1472 ohci_hash_rem_td(sc, std); 1473 if (std->flags & OHCI_CALL_DONE) { 1474 xfer->ux_status = USBD_NORMAL_COMPLETION; 1475 usb_transfer_complete(xfer); 1476 } 1477 } else { 1478 /* 1479 * Endpoint is halted. First unlink all the TDs 1480 * belonging to the failed transfer, and then restart 1481 * the endpoint. 1482 */ 1483 ohci_soft_td_t *p, *n; 1484 opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 1485 1486 DPRINTFN(10, "error cc=%d", cc, 0, 0, 0); 1487 1488 /* remove xfer's TDs from the hash */ 1489 for (p = std; p->xfer == xfer; p = n) { 1490 n = p->nexttd; 1491 ohci_hash_rem_td(sc, p); 1492 } 1493 1494 ohci_soft_ed_t *sed = opipe->sed; 1495 1496 /* clear halt and TD chain */ 1497 sed->ed.ed_headp = HTOO32(p->physaddr); 1498 usb_syncmem(&sed->dma, 1499 sed->offs + offsetof(ohci_ed_t, ed_headp), 1500 sizeof(sed->ed.ed_headp), 1501 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1502 1503 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1504 1505 if (cc == OHCI_CC_DATA_UNDERRUN) 1506 xfer->ux_status = USBD_NORMAL_COMPLETION; 1507 else if (cc == OHCI_CC_STALL) 1508 xfer->ux_status = USBD_STALLED; 1509 else 1510 xfer->ux_status = USBD_IOERROR; 1511 usb_transfer_complete(xfer); 1512 } 1513 } 1514 DPRINTFN(10, "--- ITD dump start ---", 0, 0, 0, 0); 1515 #ifdef OHCI_DEBUG 1516 if (ohcidebug >= 10) { 1517 for (sitd = sidone; sitd; sitd = sitd->dnext) 1518 ohci_dump_itd(sc, sitd); 1519 } 1520 #endif 1521 DPRINTFN(10, "--- ITD dump end ---", 0, 0, 0, 0); 1522 1523 for (sitd = sidone; sitd != NULL; sitd = sitdnext) { 1524 xfer = sitd->xfer; 1525 sitdnext = sitd->dnext; 1526 DPRINTFN(1, "sitd=%p xfer=%p hcpriv=%p", sitd, xfer, 1527 xfer ? xfer->ux_hcpriv : 0, 0); 1528 if (xfer == NULL) 1529 continue; 1530 if (xfer->ux_status == USBD_CANCELLED || 1531 xfer->ux_status == USBD_TIMEOUT) { 1532 DPRINTF("cancel/timeout %p", xfer, 0, 0, 0); 1533 /* Handled by abort routine. */ 1534 continue; 1535 } 1536 KASSERT(!sitd->isdone); 1537 #ifdef DIAGNOSTIC 1538 sitd->isdone = true; 1539 #endif 1540 if (sitd->flags & OHCI_CALL_DONE) { 1541 ohci_soft_itd_t *next; 1542 1543 opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 1544 opipe->isoc.inuse -= xfer->ux_nframes; 1545 uedir = UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc-> 1546 bEndpointAddress); 1547 xfer->ux_status = USBD_NORMAL_COMPLETION; 1548 actlen = 0; 1549 for (i = 0, sitd = xfer->ux_hcpriv;; 1550 sitd = next) { 1551 next = sitd->nextitd; 1552 if (OHCI_ITD_GET_CC(O32TOH(sitd-> 1553 itd.itd_flags)) != OHCI_CC_NO_ERROR) 1554 xfer->ux_status = USBD_IOERROR; 1555 /* For input, update frlengths with actual */ 1556 /* XXX anything necessary for output? */ 1557 if (uedir == UE_DIR_IN && 1558 xfer->ux_status == USBD_NORMAL_COMPLETION) { 1559 iframes = OHCI_ITD_GET_FC(O32TOH( 1560 sitd->itd.itd_flags)); 1561 for (j = 0; j < iframes; i++, j++) { 1562 len = O16TOH(sitd-> 1563 itd.itd_offset[j]); 1564 if ((OHCI_ITD_PSW_GET_CC(len) & 1565 OHCI_CC_NOT_ACCESSED_MASK) 1566 == OHCI_CC_NOT_ACCESSED) 1567 len = 0; 1568 else 1569 len = OHCI_ITD_PSW_LENGTH(len); 1570 xfer->ux_frlengths[i] = len; 1571 actlen += len; 1572 } 1573 } 1574 if (sitd->flags & OHCI_CALL_DONE) 1575 break; 1576 ohci_hash_rem_itd(sc, sitd); 1577 1578 } 1579 ohci_hash_rem_itd(sc, sitd); 1580 if (uedir == UE_DIR_IN && 1581 xfer->ux_status == USBD_NORMAL_COMPLETION) 1582 xfer->ux_actlen = actlen; 1583 xfer->ux_hcpriv = NULL; 1584 1585 usb_transfer_complete(xfer); 1586 } 1587 } 1588 1589 if (sc->sc_softwake) { 1590 sc->sc_softwake = 0; 1591 cv_broadcast(&sc->sc_softwake_cv); 1592 } 1593 1594 DPRINTFN(10, "done", 0, 0, 0, 0); 1595 } 1596 1597 void 1598 ohci_device_ctrl_done(struct usbd_xfer *xfer) 1599 { 1600 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 1601 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 1602 int len = UGETW(xfer->ux_request.wLength); 1603 int isread = (xfer->ux_request.bmRequestType & UT_READ); 1604 1605 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1606 DPRINTFN(10, "xfer=%p", xfer, 0, 0, 0); 1607 1608 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1609 KASSERT(xfer->ux_rqflags & URQ_REQUEST); 1610 1611 if (len) 1612 usb_syncmem(&xfer->ux_dmabuf, 0, len, 1613 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1614 usb_syncmem(&opipe->ctrl.reqdma, 0, 1615 sizeof(usb_device_request_t), BUS_DMASYNC_POSTWRITE); 1616 } 1617 1618 void 1619 ohci_device_intr_done(struct usbd_xfer *xfer) 1620 { 1621 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 1622 int isread = 1623 (UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress) == UE_DIR_IN); 1624 1625 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1626 DPRINTFN(10, "xfer=%p, actlen=%d", xfer, xfer->ux_actlen, 0, 0); 1627 1628 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1629 1630 usb_syncmem(&xfer->ux_dmabuf, 0, xfer->ux_length, 1631 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1632 } 1633 1634 void 1635 ohci_device_bulk_done(struct usbd_xfer *xfer) 1636 { 1637 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 1638 1639 int isread = 1640 (UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress) == UE_DIR_IN); 1641 1642 KASSERT(mutex_owned(&sc->sc_lock)); 1643 1644 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1645 DPRINTFN(10, "xfer=%p, actlen=%d", xfer, xfer->ux_actlen, 0, 0); 1646 usb_syncmem(&xfer->ux_dmabuf, 0, xfer->ux_length, 1647 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1648 } 1649 1650 Static void 1651 ohci_rhsc_softint(void *arg) 1652 { 1653 ohci_softc_t *sc = arg; 1654 1655 mutex_enter(&sc->sc_lock); 1656 1657 ohci_rhsc(sc, sc->sc_intrxfer); 1658 1659 /* Do not allow RHSC interrupts > 1 per second */ 1660 callout_reset(&sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc); 1661 1662 mutex_exit(&sc->sc_lock); 1663 } 1664 1665 void 1666 ohci_rhsc(ohci_softc_t *sc, struct usbd_xfer *xfer) 1667 { 1668 u_char *p; 1669 int i, m; 1670 int hstatus __unused; 1671 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1672 1673 KASSERT(mutex_owned(&sc->sc_lock)); 1674 1675 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1676 DPRINTF("sc=%p xfer=%p hstatus=0x%08x", sc, xfer, hstatus, 0); 1677 1678 if (xfer == NULL) { 1679 /* Just ignore the change. */ 1680 return; 1681 } 1682 1683 p = xfer->ux_buf; 1684 m = min(sc->sc_noport, xfer->ux_length * 8 - 1); 1685 memset(p, 0, xfer->ux_length); 1686 for (i = 1; i <= m; i++) { 1687 /* Pick out CHANGE bits from the status reg. */ 1688 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1689 p[i/8] |= 1 << (i%8); 1690 } 1691 DPRINTF("change=0x%02x", *p, 0, 0, 0); 1692 xfer->ux_actlen = xfer->ux_length; 1693 xfer->ux_status = USBD_NORMAL_COMPLETION; 1694 1695 usb_transfer_complete(xfer); 1696 } 1697 1698 void 1699 ohci_root_intr_done(struct usbd_xfer *xfer) 1700 { 1701 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 1702 1703 KASSERT(mutex_owned(&sc->sc_lock)); 1704 1705 KASSERT(sc->sc_intrxfer == xfer); 1706 sc->sc_intrxfer = NULL; 1707 } 1708 1709 void 1710 ohci_poll(struct usbd_bus *bus) 1711 { 1712 ohci_softc_t *sc = OHCI_BUS2SC(bus); 1713 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1714 1715 #ifdef OHCI_DEBUG 1716 static int last; 1717 int new; 1718 new = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1719 if (new != last) { 1720 DPRINTFN(10, "intrs=0x%04x", new, 0, 0, 0); 1721 last = new; 1722 } 1723 #endif 1724 sc->sc_eintrs |= OHCI_WDH; 1725 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) { 1726 mutex_spin_enter(&sc->sc_intr_lock); 1727 ohci_intr1(sc); 1728 mutex_spin_exit(&sc->sc_intr_lock); 1729 } 1730 } 1731 1732 /* 1733 * Add an ED to the schedule. Called with USB lock held. 1734 */ 1735 Static void 1736 ohci_add_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1737 { 1738 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1739 DPRINTFN(8, "sed=%p head=%p", sed, head, 0, 0); 1740 1741 KASSERT(mutex_owned(&sc->sc_lock)); 1742 1743 usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted), 1744 sizeof(head->ed.ed_nexted), 1745 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1746 sed->next = head->next; 1747 sed->ed.ed_nexted = head->ed.ed_nexted; 1748 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted), 1749 sizeof(sed->ed.ed_nexted), 1750 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1751 head->next = sed; 1752 head->ed.ed_nexted = HTOO32(sed->physaddr); 1753 usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted), 1754 sizeof(head->ed.ed_nexted), 1755 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1756 } 1757 1758 /* 1759 * Remove an ED from the schedule. Called with USB lock held. 1760 */ 1761 Static void 1762 ohci_rem_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1763 { 1764 ohci_soft_ed_t *p; 1765 1766 KASSERT(mutex_owned(&sc->sc_lock)); 1767 1768 /* XXX */ 1769 for (p = head; p != NULL && p->next != sed; p = p->next) 1770 ; 1771 KASSERT(p != NULL); 1772 1773 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted), 1774 sizeof(sed->ed.ed_nexted), 1775 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1776 p->next = sed->next; 1777 p->ed.ed_nexted = sed->ed.ed_nexted; 1778 usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted), 1779 sizeof(p->ed.ed_nexted), 1780 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1781 } 1782 1783 /* 1784 * When a transfer is completed the TD is added to the done queue by 1785 * the host controller. This queue is the processed by software. 1786 * Unfortunately the queue contains the physical address of the TD 1787 * and we have no simple way to translate this back to a kernel address. 1788 * To make the translation possible (and fast) we use a hash table of 1789 * TDs currently in the schedule. The physical address is used as the 1790 * hash value. 1791 */ 1792 1793 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1794 /* Called with USB lock held. */ 1795 void 1796 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1797 { 1798 int h = HASH(std->physaddr); 1799 1800 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1801 1802 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1803 } 1804 1805 /* Called with USB lock held. */ 1806 void 1807 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1808 { 1809 1810 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1811 1812 LIST_REMOVE(std, hnext); 1813 } 1814 1815 ohci_soft_td_t * 1816 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a) 1817 { 1818 int h = HASH(a); 1819 ohci_soft_td_t *std; 1820 1821 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1822 std != NULL; 1823 std = LIST_NEXT(std, hnext)) 1824 if (std->physaddr == a) 1825 return std; 1826 return NULL; 1827 } 1828 1829 /* Called with USB lock held. */ 1830 void 1831 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1832 { 1833 int h = HASH(sitd->physaddr); 1834 1835 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1836 1837 KASSERT(mutex_owned(&sc->sc_lock)); 1838 1839 DPRINTFN(10, "sitd=%p physaddr=0x%08lx", sitd, (u_long)sitd->physaddr, 1840 0, 0); 1841 1842 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext); 1843 } 1844 1845 /* Called with USB lock held. */ 1846 void 1847 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1848 { 1849 1850 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1851 1852 KASSERT(mutex_owned(&sc->sc_lock)); 1853 1854 DPRINTFN(10, "sitd=%p physaddr=0x%08lx", sitd, (u_long)sitd->physaddr, 1855 0, 0); 1856 1857 LIST_REMOVE(sitd, hnext); 1858 } 1859 1860 ohci_soft_itd_t * 1861 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a) 1862 { 1863 int h = HASH(a); 1864 ohci_soft_itd_t *sitd; 1865 1866 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]); 1867 sitd != NULL; 1868 sitd = LIST_NEXT(sitd, hnext)) 1869 if (sitd->physaddr == a) 1870 return sitd; 1871 return NULL; 1872 } 1873 1874 void 1875 ohci_timeout(void *addr) 1876 { 1877 struct usbd_xfer *xfer = addr; 1878 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 1879 1880 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1881 DPRINTF("xfer=%p", xfer, 0, 0, 0); 1882 1883 if (sc->sc_dying) { 1884 mutex_enter(&sc->sc_lock); 1885 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1886 mutex_exit(&sc->sc_lock); 1887 return; 1888 } 1889 1890 /* Execute the abort in a process context. */ 1891 usb_init_task(&xfer->ux_aborttask, ohci_timeout_task, addr, 1892 USB_TASKQ_MPSAFE); 1893 usb_add_task(xfer->ux_pipe->up_dev, &xfer->ux_aborttask, 1894 USB_TASKQ_HC); 1895 } 1896 1897 void 1898 ohci_timeout_task(void *addr) 1899 { 1900 struct usbd_xfer *xfer = addr; 1901 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 1902 1903 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1904 1905 DPRINTF("xfer=%p", xfer, 0, 0, 0); 1906 1907 mutex_enter(&sc->sc_lock); 1908 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1909 mutex_exit(&sc->sc_lock); 1910 } 1911 1912 #ifdef OHCI_DEBUG 1913 void 1914 ohci_dump_tds(ohci_softc_t *sc, ohci_soft_td_t *std) 1915 { 1916 for (; std; std = std->nexttd) { 1917 ohci_dump_td(sc, std); 1918 KASSERTMSG(std->nexttd == NULL || std != std->nexttd, 1919 "std %p next %p", std, std->nexttd); 1920 } 1921 } 1922 1923 void 1924 ohci_dump_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1925 { 1926 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1927 1928 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 1929 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1930 1931 uint32_t flags = O32TOH(std->td.td_flags); 1932 DPRINTF("TD(%p) at 0x%08lx:", std, (u_long)std->physaddr, 0, 0); 1933 DPRINTF(" round=%d DP=%x DI=%x T=%x", 1934 !!(flags & OHCI_TD_R), 1935 __SHIFTOUT(flags, OHCI_TD_DP_MASK), 1936 OHCI_TD_GET_DI(flags), 1937 __SHIFTOUT(flags, OHCI_TD_TOGGLE_MASK)); 1938 DPRINTF(" EC=%d CC=%d", OHCI_TD_GET_EC(flags), OHCI_TD_GET_CC(flags), 1939 0, 0); 1940 DPRINTF(" td_cbp=0x%08lx td_nexttd=0x%08lx td_be=0x%08lx", 1941 (u_long)O32TOH(std->td.td_cbp), 1942 (u_long)O32TOH(std->td.td_nexttd), 1943 (u_long)O32TOH(std->td.td_be), 0); 1944 } 1945 1946 void 1947 ohci_dump_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1948 { 1949 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1950 1951 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 1952 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1953 1954 uint32_t flags = O32TOH(sitd->itd.itd_flags); 1955 DPRINTF("ITD(%p) at 0x%08lx", sitd, (u_long)sitd->physaddr, 0, 0); 1956 DPRINTF(" sf=%d di=%d fc=%d cc=%d", 1957 OHCI_ITD_GET_SF(flags), OHCI_ITD_GET_DI(flags), 1958 OHCI_ITD_GET_FC(flags), OHCI_ITD_GET_CC(flags)); 1959 DPRINTF(" bp0=0x%08x next=0x%08x be=0x%08x", 1960 O32TOH(sitd->itd.itd_bp0), 1961 O32TOH(sitd->itd.itd_nextitd), 1962 O32TOH(sitd->itd.itd_be), 0); 1963 CTASSERT(OHCI_ITD_NOFFSET == 8); 1964 DPRINTF(" offs[0] = 0x%04x offs[1] = 0x%04x " 1965 "offs[2] = 0x%04x offs[3] = 0x%04x", 1966 O16TOH(sitd->itd.itd_offset[0]), 1967 O16TOH(sitd->itd.itd_offset[1]), 1968 O16TOH(sitd->itd.itd_offset[2]), 1969 O16TOH(sitd->itd.itd_offset[3])); 1970 DPRINTF(" offs[4] = 0x%04x offs[5] = 0x%04x " 1971 "offs[6] = 0x%04x offs[7] = 0x%04x", 1972 O16TOH(sitd->itd.itd_offset[4]), 1973 O16TOH(sitd->itd.itd_offset[5]), 1974 O16TOH(sitd->itd.itd_offset[6]), 1975 O16TOH(sitd->itd.itd_offset[7])); 1976 } 1977 1978 void 1979 ohci_dump_itds(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1980 { 1981 for (; sitd; sitd = sitd->nextitd) 1982 ohci_dump_itd(sc, sitd); 1983 } 1984 1985 void 1986 ohci_dump_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 1987 { 1988 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1989 1990 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 1991 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1992 1993 uint32_t flags = O32TOH(sed->ed.ed_flags); 1994 DPRINTF("ED(%p) at 0x%08lx:", sed, sed->physaddr, 0, 0); 1995 DPRINTF(" addr=%d endpt=%d maxp=%d", 1996 OHCI_ED_GET_FA(flags), 1997 OHCI_ED_GET_EN(flags), 1998 OHCI_ED_GET_MAXP(flags), 1999 0); 2000 DPRINTF(" dir=%d speed=%d skip=%d iso=%d", 2001 __SHIFTOUT(flags, OHCI_ED_DIR_MASK), 2002 !!(flags & OHCI_ED_SPEED), 2003 !!(flags & OHCI_ED_SKIP), 2004 !!(flags & OHCI_ED_FORMAT_ISO)); 2005 DPRINTF(" tailp=0x%08lx", (u_long)O32TOH(sed->ed.ed_tailp), 2006 0, 0, 0); 2007 DPRINTF(" headp=0x%08lx nexted=0x%08lx halted=%d carry=%d", 2008 O32TOH(sed->ed.ed_headp), O32TOH(sed->ed.ed_nexted), 2009 !!(O32TOH(sed->ed.ed_headp) & OHCI_HALTED), 2010 !!(O32TOH(sed->ed.ed_headp) & OHCI_TOGGLECARRY)); 2011 } 2012 #endif 2013 2014 usbd_status 2015 ohci_open(struct usbd_pipe *pipe) 2016 { 2017 struct usbd_device *dev = pipe->up_dev; 2018 struct usbd_bus *bus = dev->ud_bus; 2019 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 2020 usb_endpoint_descriptor_t *ed = pipe->up_endpoint->ue_edesc; 2021 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 2022 uint8_t addr = dev->ud_addr; 2023 uint8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 2024 ohci_soft_ed_t *sed; 2025 ohci_soft_td_t *std; 2026 ohci_soft_itd_t *sitd; 2027 ohci_physaddr_t tdphys; 2028 uint32_t fmt; 2029 usbd_status err = USBD_NOMEM; 2030 int ival; 2031 2032 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2033 DPRINTFN(1, "pipe=%p, addr=%d, endpt=%d (%d)", pipe, addr, 2034 ed->bEndpointAddress, bus->ub_rhaddr); 2035 2036 if (sc->sc_dying) { 2037 return USBD_IOERROR; 2038 } 2039 2040 std = NULL; 2041 sed = NULL; 2042 2043 if (addr == bus->ub_rhaddr) { 2044 switch (ed->bEndpointAddress) { 2045 case USB_CONTROL_ENDPOINT: 2046 pipe->up_methods = &roothub_ctrl_methods; 2047 break; 2048 case UE_DIR_IN | USBROOTHUB_INTR_ENDPT: 2049 pipe->up_methods = &ohci_root_intr_methods; 2050 break; 2051 default: 2052 err = USBD_INVAL; 2053 goto bad; 2054 } 2055 } else { 2056 sed = ohci_alloc_sed(sc); 2057 if (sed == NULL) 2058 goto bad; 2059 opipe->sed = sed; 2060 if (xfertype == UE_ISOCHRONOUS) { 2061 sitd = ohci_alloc_sitd(sc); 2062 if (sitd == NULL) 2063 goto bad; 2064 2065 opipe->tail.itd = sitd; 2066 tdphys = sitd->physaddr; 2067 fmt = OHCI_ED_FORMAT_ISO; 2068 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 2069 fmt |= OHCI_ED_DIR_IN; 2070 else 2071 fmt |= OHCI_ED_DIR_OUT; 2072 } else { 2073 std = ohci_alloc_std(sc); 2074 if (std == NULL) 2075 goto bad; 2076 2077 opipe->tail.td = std; 2078 tdphys = std->physaddr; 2079 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD; 2080 } 2081 sed->ed.ed_flags = HTOO32( 2082 OHCI_ED_SET_FA(addr) | 2083 OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) | 2084 (dev->ud_speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) | 2085 fmt | 2086 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 2087 sed->ed.ed_headp = HTOO32(tdphys | 2088 (pipe->up_endpoint->ue_toggle ? OHCI_TOGGLECARRY : 0)); 2089 sed->ed.ed_tailp = HTOO32(tdphys); 2090 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 2091 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2092 2093 switch (xfertype) { 2094 case UE_CONTROL: 2095 pipe->up_methods = &ohci_device_ctrl_methods; 2096 err = usb_allocmem(&sc->sc_bus, 2097 sizeof(usb_device_request_t), 2098 0, &opipe->ctrl.reqdma); 2099 if (err) 2100 goto bad; 2101 mutex_enter(&sc->sc_lock); 2102 ohci_add_ed(sc, sed, sc->sc_ctrl_head); 2103 mutex_exit(&sc->sc_lock); 2104 break; 2105 case UE_INTERRUPT: 2106 pipe->up_methods = &ohci_device_intr_methods; 2107 ival = pipe->up_interval; 2108 if (ival == USBD_DEFAULT_INTERVAL) 2109 ival = ed->bInterval; 2110 err = ohci_device_setintr(sc, opipe, ival); 2111 if (err) 2112 goto bad; 2113 break; 2114 case UE_ISOCHRONOUS: 2115 pipe->up_serialise = false; 2116 pipe->up_methods = &ohci_device_isoc_methods; 2117 return ohci_setup_isoc(pipe); 2118 case UE_BULK: 2119 pipe->up_methods = &ohci_device_bulk_methods; 2120 mutex_enter(&sc->sc_lock); 2121 ohci_add_ed(sc, sed, sc->sc_bulk_head); 2122 mutex_exit(&sc->sc_lock); 2123 break; 2124 } 2125 } 2126 2127 return USBD_NORMAL_COMPLETION; 2128 2129 bad: 2130 if (std != NULL) { 2131 ohci_free_std(sc, std); 2132 } 2133 if (sed != NULL) 2134 ohci_free_sed(sc, sed); 2135 return err; 2136 2137 } 2138 2139 /* 2140 * Close a reqular pipe. 2141 * Assumes that there are no pending transactions. 2142 */ 2143 void 2144 ohci_close_pipe(struct usbd_pipe *pipe, ohci_soft_ed_t *head) 2145 { 2146 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 2147 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 2148 ohci_soft_ed_t *sed = opipe->sed; 2149 2150 KASSERT(mutex_owned(&sc->sc_lock)); 2151 2152 #ifdef DIAGNOSTIC 2153 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 2154 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2155 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) { 2156 ohci_soft_td_t *std; 2157 std = ohci_hash_find_td(sc, O32TOH(sed->ed.ed_headp)); 2158 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 2159 "tl=0x%x pipe=%p, std=%p\n", sed, 2160 (int)O32TOH(sed->ed.ed_headp), 2161 (int)O32TOH(sed->ed.ed_tailp), 2162 pipe, std); 2163 #ifdef OHCI_DEBUG 2164 usbd_dump_pipe(&opipe->pipe); 2165 ohci_dump_ed(sc, sed); 2166 if (std) 2167 ohci_dump_td(sc, std); 2168 #endif 2169 usb_delay_ms(&sc->sc_bus, 2); 2170 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2171 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) 2172 printf("ohci_close_pipe: pipe still not empty\n"); 2173 } 2174 #endif 2175 ohci_rem_ed(sc, sed, head); 2176 /* Make sure the host controller is not touching this ED */ 2177 usb_delay_ms(&sc->sc_bus, 1); 2178 pipe->up_endpoint->ue_toggle = 2179 (O32TOH(sed->ed.ed_headp) & OHCI_TOGGLECARRY) ? 1 : 0; 2180 ohci_free_sed_locked(sc, opipe->sed); 2181 } 2182 2183 /* 2184 * Abort a device request. 2185 * If this routine is called at splusb() it guarantees that the request 2186 * will be removed from the hardware scheduling and that the callback 2187 * for it will be called with USBD_CANCELLED status. 2188 * It's impossible to guarantee that the requested transfer will not 2189 * have happened since the hardware runs concurrently. 2190 * If the transaction has already happened we rely on the ordinary 2191 * interrupt processing to process it. 2192 * XXX This is most probably wrong. 2193 * XXXMRG this doesn't make sense anymore. 2194 */ 2195 void 2196 ohci_abort_xfer(struct usbd_xfer *xfer, usbd_status status) 2197 { 2198 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 2199 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2200 ohci_soft_ed_t *sed = opipe->sed; 2201 ohci_soft_td_t *p, *n; 2202 ohci_physaddr_t headp; 2203 int hit; 2204 int wake; 2205 2206 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2207 DPRINTF("xfer=%p pipe=%p sed=%p", xfer, opipe,sed, 0); 2208 2209 KASSERT(mutex_owned(&sc->sc_lock)); 2210 ASSERT_SLEEPABLE(); 2211 2212 if (sc->sc_dying) { 2213 /* If we're dying, just do the software part. */ 2214 xfer->ux_status = status; /* make software ignore it */ 2215 callout_halt(&xfer->ux_callout, &sc->sc_lock); 2216 usb_transfer_complete(xfer); 2217 return; 2218 } 2219 2220 /* 2221 * If an abort is already in progress then just wait for it to 2222 * complete and return. 2223 */ 2224 if (xfer->ux_hcflags & UXFER_ABORTING) { 2225 DPRINTFN(2, "already aborting", 0, 0, 0, 0); 2226 #ifdef DIAGNOSTIC 2227 if (status == USBD_TIMEOUT) 2228 printf("%s: TIMEOUT while aborting\n", __func__); 2229 #endif 2230 /* Override the status which might be USBD_TIMEOUT. */ 2231 xfer->ux_status = status; 2232 DPRINTFN(2, "waiting for abort to finish", 0, 0, 0, 0); 2233 xfer->ux_hcflags |= UXFER_ABORTWAIT; 2234 while (xfer->ux_hcflags & UXFER_ABORTING) 2235 cv_wait(&xfer->ux_hccv, &sc->sc_lock); 2236 goto done; 2237 } 2238 xfer->ux_hcflags |= UXFER_ABORTING; 2239 2240 /* 2241 * Step 1: Make interrupt routine and hardware ignore xfer. 2242 */ 2243 xfer->ux_status = status; /* make software ignore it */ 2244 callout_stop(&xfer->ux_callout); 2245 DPRINTFN(1, "stop ed=%p", sed, 0, 0, 0); 2246 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2247 sizeof(sed->ed.ed_flags), 2248 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2249 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */ 2250 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2251 sizeof(sed->ed.ed_flags), 2252 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2253 2254 /* 2255 * Step 2: Wait until we know hardware has finished any possible 2256 * use of the xfer. Also make sure the soft interrupt routine 2257 * has run. 2258 */ 2259 /* Hardware finishes in 1ms */ 2260 usb_delay_ms_locked(opipe->pipe.up_dev->ud_bus, 20, &sc->sc_lock); 2261 sc->sc_softwake = 1; 2262 usb_schedsoftintr(&sc->sc_bus); 2263 cv_wait(&sc->sc_softwake_cv, &sc->sc_lock); 2264 2265 /* 2266 * Step 3: Remove any vestiges of the xfer from the hardware. 2267 * The complication here is that the hardware may have executed 2268 * beyond the xfer we're trying to abort. So as we're scanning 2269 * the TDs of this xfer we check if the hardware points to 2270 * any of them. 2271 */ 2272 p = xfer->ux_hcpriv; 2273 KASSERT(p); 2274 2275 #ifdef OHCI_DEBUG 2276 DPRINTF("--- dump start ---", 0, 0, 0, 0); 2277 2278 if (ohcidebug >= 2) { 2279 DPRINTF("sed:", 0, 0, 0, 0); 2280 ohci_dump_ed(sc, sed); 2281 ohci_dump_tds(sc, p); 2282 } 2283 DPRINTF("--- dump end ---", 0, 0, 0, 0); 2284 #endif 2285 headp = O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK; 2286 hit = 0; 2287 for (; p->xfer == xfer; p = n) { 2288 hit |= headp == p->physaddr; 2289 n = p->nexttd; 2290 ohci_hash_rem_td(sc, p); 2291 } 2292 /* Zap headp register if hardware pointed inside the xfer. */ 2293 if (hit) { 2294 DPRINTFN(1, "set hd=0x%08x, tl=0x%08x", (int)p->physaddr, 2295 (int)O32TOH(sed->ed.ed_tailp), 0, 0); 2296 sed->ed.ed_headp = HTOO32(p->physaddr); /* unlink TDs */ 2297 usb_syncmem(&sed->dma, 2298 sed->offs + offsetof(ohci_ed_t, ed_headp), 2299 sizeof(sed->ed.ed_headp), 2300 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2301 } else { 2302 DPRINTFN(1, "no hit", 0, 0, 0, 0); 2303 } 2304 2305 /* 2306 * Step 4: Turn on hardware again. 2307 */ 2308 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2309 sizeof(sed->ed.ed_flags), 2310 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2311 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */ 2312 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2313 sizeof(sed->ed.ed_flags), 2314 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2315 2316 /* 2317 * Step 5: Execute callback. 2318 */ 2319 wake = xfer->ux_hcflags & UXFER_ABORTWAIT; 2320 xfer->ux_hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT); 2321 usb_transfer_complete(xfer); 2322 if (wake) 2323 cv_broadcast(&xfer->ux_hccv); 2324 2325 done: 2326 KASSERT(mutex_owned(&sc->sc_lock)); 2327 } 2328 2329 /* 2330 * Data structures and routines to emulate the root hub. 2331 */ 2332 Static int 2333 ohci_roothub_ctrl(struct usbd_bus *bus, usb_device_request_t *req, 2334 void *buf, int buflen) 2335 { 2336 ohci_softc_t *sc = OHCI_BUS2SC(bus); 2337 usb_port_status_t ps; 2338 uint16_t len, value, index; 2339 int l, totlen = 0; 2340 int port, i; 2341 uint32_t v; 2342 2343 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2344 2345 if (sc->sc_dying) 2346 return -1; 2347 2348 DPRINTFN(4, "type=0x%02x request=%02x", req->bmRequestType, 2349 req->bRequest, 0, 0); 2350 2351 len = UGETW(req->wLength); 2352 value = UGETW(req->wValue); 2353 index = UGETW(req->wIndex); 2354 2355 #define C(x,y) ((x) | ((y) << 8)) 2356 switch (C(req->bRequest, req->bmRequestType)) { 2357 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2358 DPRINTFN(8, "wValue=0x%04x", value, 0, 0, 0); 2359 if (len == 0) 2360 break; 2361 switch (value) { 2362 case C(0, UDESC_DEVICE): { 2363 usb_device_descriptor_t devd; 2364 2365 totlen = min(buflen, sizeof(devd)); 2366 memcpy(&devd, buf, totlen); 2367 USETW(devd.idVendor, sc->sc_id_vendor); 2368 memcpy(buf, &devd, totlen); 2369 break; 2370 } 2371 case C(1, UDESC_STRING): 2372 #define sd ((usb_string_descriptor_t *)buf) 2373 /* Vendor */ 2374 totlen = usb_makestrdesc(sd, len, sc->sc_vendor); 2375 break; 2376 case C(2, UDESC_STRING): 2377 /* Product */ 2378 totlen = usb_makestrdesc(sd, len, "OHCI root hub"); 2379 break; 2380 #undef sd 2381 default: 2382 /* default from usbroothub */ 2383 return buflen; 2384 } 2385 break; 2386 2387 /* Hub requests */ 2388 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2389 break; 2390 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2391 DPRINTFN(8, "UR_CLEAR_PORT_FEATURE port=%d feature=%d", 2392 index, value, 0, 0); 2393 if (index < 1 || index > sc->sc_noport) { 2394 return -1; 2395 } 2396 port = OHCI_RH_PORT_STATUS(index); 2397 switch(value) { 2398 case UHF_PORT_ENABLE: 2399 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2400 break; 2401 case UHF_PORT_SUSPEND: 2402 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2403 break; 2404 case UHF_PORT_POWER: 2405 /* Yes, writing to the LOW_SPEED bit clears power. */ 2406 OWRITE4(sc, port, UPS_LOW_SPEED); 2407 break; 2408 case UHF_C_PORT_CONNECTION: 2409 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2410 break; 2411 case UHF_C_PORT_ENABLE: 2412 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2413 break; 2414 case UHF_C_PORT_SUSPEND: 2415 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2416 break; 2417 case UHF_C_PORT_OVER_CURRENT: 2418 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2419 break; 2420 case UHF_C_PORT_RESET: 2421 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2422 break; 2423 default: 2424 return -1; 2425 } 2426 switch(value) { 2427 case UHF_C_PORT_CONNECTION: 2428 case UHF_C_PORT_ENABLE: 2429 case UHF_C_PORT_SUSPEND: 2430 case UHF_C_PORT_OVER_CURRENT: 2431 case UHF_C_PORT_RESET: 2432 /* Enable RHSC interrupt if condition is cleared. */ 2433 if ((OREAD4(sc, port) >> 16) == 0) 2434 ohci_rhsc_enable(sc); 2435 break; 2436 default: 2437 break; 2438 } 2439 break; 2440 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2441 if (len == 0) 2442 break; 2443 if ((value & 0xff) != 0) { 2444 return -1; 2445 } 2446 usb_hub_descriptor_t hubd; 2447 2448 totlen = min(buflen, sizeof(hubd)); 2449 memcpy(&hubd, buf, totlen); 2450 2451 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2452 hubd.bNbrPorts = sc->sc_noport; 2453 USETW(hubd.wHubCharacteristics, 2454 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2455 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2456 /* XXX overcurrent */ 2457 ); 2458 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2459 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2460 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2461 hubd.DeviceRemovable[i++] = (uint8_t)v; 2462 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2463 totlen = min(totlen, hubd.bDescLength); 2464 memcpy(buf, &hubd, totlen); 2465 break; 2466 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2467 if (len != 4) { 2468 return -1; 2469 } 2470 memset(buf, 0, len); /* ? XXX */ 2471 totlen = len; 2472 break; 2473 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2474 DPRINTFN(8, "get port status i=%d", index, 0, 0, 0); 2475 if (index < 1 || index > sc->sc_noport) { 2476 return -1; 2477 } 2478 if (len != 4) { 2479 return -1; 2480 } 2481 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2482 DPRINTFN(8, "port status=0x%04x", v, 0, 0, 0); 2483 USETW(ps.wPortStatus, v); 2484 USETW(ps.wPortChange, v >> 16); 2485 totlen = min(len, sizeof(ps)); 2486 memcpy(buf, &ps, totlen); 2487 break; 2488 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2489 return -1; 2490 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2491 break; 2492 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2493 if (index < 1 || index > sc->sc_noport) { 2494 return -1; 2495 } 2496 port = OHCI_RH_PORT_STATUS(index); 2497 switch(value) { 2498 case UHF_PORT_ENABLE: 2499 OWRITE4(sc, port, UPS_PORT_ENABLED); 2500 break; 2501 case UHF_PORT_SUSPEND: 2502 OWRITE4(sc, port, UPS_SUSPEND); 2503 break; 2504 case UHF_PORT_RESET: 2505 DPRINTFN(5, "reset port %d", index, 0, 0, 0); 2506 OWRITE4(sc, port, UPS_RESET); 2507 for (i = 0; i < 5; i++) { 2508 usb_delay_ms(&sc->sc_bus, 2509 USB_PORT_ROOT_RESET_DELAY); 2510 if (sc->sc_dying) { 2511 return -1; 2512 } 2513 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2514 break; 2515 } 2516 DPRINTFN(8, "port %d reset, status = 0x%04x", index, 2517 OREAD4(sc, port), 0, 0); 2518 break; 2519 case UHF_PORT_POWER: 2520 DPRINTFN(2, "set port power %d", index, 0, 0, 0); 2521 OWRITE4(sc, port, UPS_PORT_POWER); 2522 break; 2523 default: 2524 return -1; 2525 } 2526 break; 2527 default: 2528 /* default from usbroothub */ 2529 return buflen; 2530 } 2531 2532 return totlen; 2533 } 2534 2535 Static usbd_status 2536 ohci_root_intr_transfer(struct usbd_xfer *xfer) 2537 { 2538 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2539 usbd_status err; 2540 2541 /* Insert last in queue. */ 2542 mutex_enter(&sc->sc_lock); 2543 err = usb_insert_transfer(xfer); 2544 mutex_exit(&sc->sc_lock); 2545 if (err) 2546 return err; 2547 2548 /* Pipe isn't running, start first */ 2549 return ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 2550 } 2551 2552 Static usbd_status 2553 ohci_root_intr_start(struct usbd_xfer *xfer) 2554 { 2555 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2556 2557 if (sc->sc_dying) 2558 return USBD_IOERROR; 2559 2560 mutex_enter(&sc->sc_lock); 2561 KASSERT(sc->sc_intrxfer == NULL); 2562 sc->sc_intrxfer = xfer; 2563 mutex_exit(&sc->sc_lock); 2564 2565 return USBD_IN_PROGRESS; 2566 } 2567 2568 /* Abort a root interrupt request. */ 2569 Static void 2570 ohci_root_intr_abort(struct usbd_xfer *xfer) 2571 { 2572 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2573 2574 KASSERT(mutex_owned(&sc->sc_lock)); 2575 KASSERT(xfer->ux_pipe->up_intrxfer == xfer); 2576 2577 sc->sc_intrxfer = NULL; 2578 2579 xfer->ux_status = USBD_CANCELLED; 2580 usb_transfer_complete(xfer); 2581 } 2582 2583 /* Close the root pipe. */ 2584 Static void 2585 ohci_root_intr_close(struct usbd_pipe *pipe) 2586 { 2587 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 2588 2589 KASSERT(mutex_owned(&sc->sc_lock)); 2590 2591 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2592 2593 sc->sc_intrxfer = NULL; 2594 } 2595 2596 /************************/ 2597 2598 int 2599 ohci_device_ctrl_init(struct usbd_xfer *xfer) 2600 { 2601 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 2602 usb_device_request_t *req = &xfer->ux_request; 2603 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2604 ohci_soft_td_t *stat, *setup; 2605 int isread = req->bmRequestType & UT_READ; 2606 int len = xfer->ux_bufsize; 2607 int err = ENOMEM; 2608 2609 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2610 2611 setup = ohci_alloc_std(sc); 2612 if (setup == NULL) { 2613 goto bad1; 2614 } 2615 stat = ohci_alloc_std(sc); 2616 if (stat == NULL) { 2617 goto bad2; 2618 } 2619 2620 ox->ox_setup = setup; 2621 ox->ox_stat = stat; 2622 ox->ox_nstd = 0; 2623 2624 /* Set up data transaction */ 2625 if (len != 0) { 2626 err = ohci_alloc_std_chain(sc, xfer, len, isread); 2627 if (err) { 2628 goto bad3; 2629 } 2630 } 2631 return 0; 2632 2633 bad3: 2634 ohci_free_std(sc, stat); 2635 bad2: 2636 ohci_free_std(sc, setup); 2637 bad1: 2638 return err; 2639 } 2640 2641 void 2642 ohci_device_ctrl_fini(struct usbd_xfer *xfer) 2643 { 2644 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 2645 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2646 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 2647 2648 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2649 DPRINTFN(8, "xfer %p nstd %d", xfer, ox->ox_nstd, 0, 0); 2650 2651 mutex_enter(&sc->sc_lock); 2652 if (ox->ox_setup != opipe->tail.td) { 2653 ohci_free_std_locked(sc, ox->ox_setup); 2654 } 2655 for (size_t i = 0; i < ox->ox_nstd; i++) { 2656 ohci_soft_td_t *std = ox->ox_stds[i]; 2657 if (std == NULL) 2658 break; 2659 ohci_free_std_locked(sc, std); 2660 } 2661 ohci_free_std_locked(sc, ox->ox_stat); 2662 mutex_exit(&sc->sc_lock); 2663 2664 if (ox->ox_nstd) { 2665 const size_t sz = sizeof(ohci_soft_td_t *) * ox->ox_nstd; 2666 kmem_free(ox->ox_stds, sz); 2667 } 2668 } 2669 2670 Static usbd_status 2671 ohci_device_ctrl_transfer(struct usbd_xfer *xfer) 2672 { 2673 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2674 usbd_status err; 2675 2676 /* Insert last in queue. */ 2677 mutex_enter(&sc->sc_lock); 2678 err = usb_insert_transfer(xfer); 2679 mutex_exit(&sc->sc_lock); 2680 if (err) 2681 return err; 2682 2683 /* Pipe isn't running, start first */ 2684 return ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 2685 } 2686 2687 Static usbd_status 2688 ohci_device_ctrl_start(struct usbd_xfer *xfer) 2689 { 2690 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2691 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 2692 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 2693 usb_device_request_t *req = &xfer->ux_request; 2694 struct usbd_device *dev __diagused = opipe->pipe.up_dev; 2695 ohci_soft_td_t *setup, *stat, *next, *tail; 2696 ohci_soft_ed_t *sed; 2697 int isread; 2698 int len; 2699 2700 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2701 2702 if (sc->sc_dying) 2703 return USBD_IOERROR; 2704 2705 KASSERT(xfer->ux_rqflags & URQ_REQUEST); 2706 2707 isread = req->bmRequestType & UT_READ; 2708 len = UGETW(req->wLength); 2709 2710 DPRINTF("xfer=%p len=%d, addr=%d, endpt=%d", xfer, len, dev->ud_addr, 2711 opipe->pipe.up_endpoint->ue_edesc->bEndpointAddress); 2712 DPRINTF("type=0x%02x, request=0x%02x, wValue=0x%04x, wIndex=0x%04x", 2713 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2714 UGETW(req->wIndex)); 2715 2716 /* Need to take lock here for pipe->tail.td */ 2717 mutex_enter(&sc->sc_lock); 2718 2719 /* 2720 * Use the pipe "tail" TD as our first and loan our first TD to the 2721 * next transfer 2722 */ 2723 setup = opipe->tail.td; 2724 opipe->tail.td = ox->ox_setup; 2725 ox->ox_setup = setup; 2726 2727 stat = ox->ox_stat; 2728 2729 /* point at sentinel */ 2730 tail = opipe->tail.td; 2731 sed = opipe->sed; 2732 2733 KASSERTMSG(OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)) == dev->ud_addr, 2734 "address ED %d pipe %d\n", 2735 OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)), dev->ud_addr); 2736 KASSERTMSG(OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)) == 2737 UGETW(opipe->pipe.up_endpoint->ue_edesc->wMaxPacketSize), 2738 "MPL ED %d pipe %d\n", 2739 OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)), 2740 UGETW(opipe->pipe.up_endpoint->ue_edesc->wMaxPacketSize)); 2741 2742 /* next will point to data if len != 0 */ 2743 next = stat; 2744 2745 /* Set up data transaction */ 2746 if (len != 0) { 2747 ohci_soft_td_t *std; 2748 ohci_soft_td_t *end; 2749 2750 next = ox->ox_stds[0]; 2751 ohci_reset_std_chain(sc, xfer, len, isread, next, &end); 2752 2753 end->td.td_nexttd = HTOO32(stat->physaddr); 2754 end->nexttd = stat; 2755 2756 usb_syncmem(&end->dma, 2757 end->offs + offsetof(ohci_td_t, td_nexttd), 2758 sizeof(end->td.td_nexttd), 2759 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2760 2761 usb_syncmem(&xfer->ux_dmabuf, 0, len, 2762 isread ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 2763 std = ox->ox_stds[0]; 2764 /* Start toggle at 1 and then use the carried toggle. */ 2765 std->td.td_flags &= HTOO32(~OHCI_TD_TOGGLE_MASK); 2766 std->td.td_flags |= HTOO32(OHCI_TD_TOGGLE_1); 2767 usb_syncmem(&std->dma, 2768 std->offs + offsetof(ohci_td_t, td_flags), 2769 sizeof(std->td.td_flags), 2770 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2771 } 2772 2773 DPRINTFN(8, "setup %p data %p stat %p tail %p", setup, 2774 (len != 0 ? ox->ox_stds[0] : NULL), stat, tail); 2775 KASSERT(opipe->tail.td == tail); 2776 2777 memcpy(KERNADDR(&opipe->ctrl.reqdma, 0), req, sizeof(*req)); 2778 usb_syncmem(&opipe->ctrl.reqdma, 0, sizeof(*req), BUS_DMASYNC_PREWRITE); 2779 2780 setup->td.td_flags = HTOO32(OHCI_TD_SETUP | OHCI_TD_NOCC | 2781 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 2782 setup->td.td_cbp = HTOO32(DMAADDR(&opipe->ctrl.reqdma, 0)); 2783 setup->td.td_nexttd = HTOO32(next->physaddr); 2784 setup->td.td_be = HTOO32(O32TOH(setup->td.td_cbp) + sizeof(*req) - 1); 2785 setup->nexttd = next; 2786 setup->len = 0; 2787 setup->xfer = xfer; 2788 setup->flags = 0; 2789 ohci_hash_add_td(sc, setup); 2790 2791 xfer->ux_hcpriv = setup; 2792 usb_syncmem(&setup->dma, setup->offs, sizeof(setup->td), 2793 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2794 2795 stat->td.td_flags = HTOO32( 2796 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | 2797 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 2798 stat->td.td_cbp = 0; 2799 stat->td.td_nexttd = HTOO32(tail->physaddr); 2800 stat->td.td_be = 0; 2801 stat->nexttd = tail; 2802 stat->flags = OHCI_CALL_DONE; 2803 stat->len = 0; 2804 stat->xfer = xfer; 2805 ohci_hash_add_td(sc, stat); 2806 2807 usb_syncmem(&stat->dma, stat->offs, sizeof(stat->td), 2808 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2809 2810 memset(&tail->td, 0, sizeof(tail->td)); 2811 tail->nexttd = NULL; 2812 tail->xfer = NULL; 2813 2814 usb_syncmem(&tail->dma, tail->offs, sizeof(tail->td), 2815 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2816 2817 #ifdef OHCI_DEBUG 2818 USBHIST_LOGN(ohcidebug, 5, "--- dump start ---", 0, 0, 0, 0); 2819 if (ohcidebug >= 5) { 2820 ohci_dump_ed(sc, sed); 2821 ohci_dump_tds(sc, setup); 2822 } 2823 USBHIST_LOGN(ohcidebug, 5, "--- dump end ---", 0, 0, 0, 0); 2824 #endif 2825 2826 /* Insert ED in schedule */ 2827 sed->ed.ed_tailp = HTOO32(tail->physaddr); 2828 usb_syncmem(&sed->dma, 2829 sed->offs + offsetof(ohci_ed_t, ed_tailp), 2830 sizeof(sed->ed.ed_tailp), 2831 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2832 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 2833 if (xfer->ux_timeout && !sc->sc_bus.ub_usepolling) { 2834 callout_reset(&xfer->ux_callout, mstohz(xfer->ux_timeout), 2835 ohci_timeout, xfer); 2836 } 2837 2838 DPRINTF("done", 0, 0, 0, 0); 2839 2840 mutex_exit(&sc->sc_lock); 2841 2842 return USBD_IN_PROGRESS; 2843 } 2844 2845 /* Abort a device control request. */ 2846 Static void 2847 ohci_device_ctrl_abort(struct usbd_xfer *xfer) 2848 { 2849 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 2850 2851 KASSERT(mutex_owned(&sc->sc_lock)); 2852 2853 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2854 DPRINTF("xfer=%p", xfer, 0, 0, 0); 2855 ohci_abort_xfer(xfer, USBD_CANCELLED); 2856 } 2857 2858 /* Close a device control pipe. */ 2859 Static void 2860 ohci_device_ctrl_close(struct usbd_pipe *pipe) 2861 { 2862 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 2863 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 2864 2865 KASSERT(mutex_owned(&sc->sc_lock)); 2866 2867 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2868 DPRINTF("pipe=%p", pipe, 0, 0, 0); 2869 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2870 ohci_free_std_locked(sc, opipe->tail.td); 2871 } 2872 2873 /************************/ 2874 2875 Static void 2876 ohci_device_clear_toggle(struct usbd_pipe *pipe) 2877 { 2878 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 2879 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 2880 2881 opipe->sed->ed.ed_headp &= HTOO32(~OHCI_TOGGLECARRY); 2882 } 2883 2884 Static void 2885 ohci_noop(struct usbd_pipe *pipe) 2886 { 2887 } 2888 2889 Static int 2890 ohci_device_bulk_init(struct usbd_xfer *xfer) 2891 { 2892 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2893 int len = xfer->ux_bufsize; 2894 int endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress;; 2895 int isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2896 int err; 2897 2898 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2899 2900 KASSERT(!(xfer->ux_rqflags & URQ_REQUEST)); 2901 2902 DPRINTFN(4, "xfer=%p len=%d isread=%d flags=%d", xfer, len, isread, 2903 xfer->ux_flags); 2904 DPRINTFN(4, "endpt=%d", endpt, 0, 0, 0); 2905 2906 /* Allocate a chain of new TDs (including a new tail). */ 2907 err = ohci_alloc_std_chain(sc, xfer, len, isread); 2908 if (err) 2909 return err; 2910 2911 return 0; 2912 } 2913 2914 Static void 2915 ohci_device_bulk_fini(struct usbd_xfer *xfer) 2916 { 2917 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2918 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 2919 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 2920 2921 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2922 DPRINTFN(8, "xfer %p nstd %d", xfer, ox->ox_nstd, 0, 0); 2923 2924 mutex_enter(&sc->sc_lock); 2925 for (size_t i = 0; i < ox->ox_nstd; i++) { 2926 ohci_soft_td_t *std = ox->ox_stds[i]; 2927 if (std == NULL) 2928 break; 2929 if (std != opipe->tail.td) 2930 ohci_free_std_locked(sc, std); 2931 } 2932 mutex_exit(&sc->sc_lock); 2933 2934 if (ox->ox_nstd) { 2935 const size_t sz = sizeof(ohci_soft_td_t *) * ox->ox_nstd; 2936 kmem_free(ox->ox_stds, sz); 2937 } 2938 } 2939 2940 Static usbd_status 2941 ohci_device_bulk_transfer(struct usbd_xfer *xfer) 2942 { 2943 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2944 usbd_status err; 2945 2946 /* Insert last in queue. */ 2947 mutex_enter(&sc->sc_lock); 2948 err = usb_insert_transfer(xfer); 2949 mutex_exit(&sc->sc_lock); 2950 if (err) 2951 return err; 2952 2953 /* Pipe isn't running, start first */ 2954 return ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 2955 } 2956 2957 Static usbd_status 2958 ohci_device_bulk_start(struct usbd_xfer *xfer) 2959 { 2960 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 2961 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 2962 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2963 ohci_soft_td_t *last; 2964 ohci_soft_td_t *data, *tail, *tdp; 2965 ohci_soft_ed_t *sed; 2966 int len, isread, endpt; 2967 2968 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2969 2970 if (sc->sc_dying) 2971 return USBD_IOERROR; 2972 2973 KASSERT(!(xfer->ux_rqflags & URQ_REQUEST)); 2974 2975 len = xfer->ux_length; 2976 endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress; 2977 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2978 sed = opipe->sed; 2979 2980 DPRINTFN(4, "xfer=%p len=%d isread=%d flags=%d", xfer, len, isread, 2981 xfer->ux_flags); 2982 DPRINTFN(4, "endpt=%d", endpt, 0, 0, 0); 2983 2984 mutex_enter(&sc->sc_lock); 2985 2986 /* 2987 * Use the pipe "tail" TD as our first and loan our first TD to the 2988 * next transfer 2989 */ 2990 data = opipe->tail.td; 2991 opipe->tail.td = ox->ox_stds[0]; 2992 ox->ox_stds[0] = data; 2993 ohci_reset_std_chain(sc, xfer, len, isread, data, &last); 2994 2995 /* point at sentinel */ 2996 tail = opipe->tail.td; 2997 memset(&tail->td, 0, sizeof(tail->td)); 2998 tail->nexttd = NULL; 2999 tail->xfer = NULL; 3000 usb_syncmem(&tail->dma, tail->offs, sizeof(tail->td), 3001 BUS_DMASYNC_PREWRITE); 3002 xfer->ux_hcpriv = data; 3003 3004 DPRINTFN(8, "xfer %p data %p tail %p", xfer, ox->ox_stds[0], tail, 0); 3005 KASSERT(opipe->tail.td == tail); 3006 3007 /* We want interrupt at the end of the transfer. */ 3008 last->td.td_flags &= HTOO32(~OHCI_TD_INTR_MASK); 3009 last->td.td_flags |= HTOO32(OHCI_TD_SET_DI(1)); 3010 last->td.td_nexttd = HTOO32(tail->physaddr); 3011 last->nexttd = tail; 3012 last->flags |= OHCI_CALL_DONE; 3013 usb_syncmem(&last->dma, last->offs, sizeof(last->td), 3014 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3015 3016 DPRINTFN(4, "ed_flags=0x%08x td_flags=0x%08x " 3017 "td_cbp=0x%08x td_be=0x%08x", 3018 (int)O32TOH(sed->ed.ed_flags), 3019 (int)O32TOH(data->td.td_flags), 3020 (int)O32TOH(data->td.td_cbp), 3021 (int)O32TOH(data->td.td_be)); 3022 3023 #ifdef OHCI_DEBUG 3024 DPRINTFN(5, "--- dump start ---", 0, 0, 0, 0); 3025 if (ohcidebug >= 5) { 3026 ohci_dump_ed(sc, sed); 3027 ohci_dump_tds(sc, data); 3028 } 3029 DPRINTFN(5, "--- dump end ---", 0, 0, 0, 0); 3030 #endif 3031 3032 /* Insert ED in schedule */ 3033 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 3034 KASSERT(tdp->xfer == xfer); 3035 } 3036 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3037 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3038 sed->ed.ed_tailp = HTOO32(tail->physaddr); 3039 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3040 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3041 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3042 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 3043 if (xfer->ux_timeout && !sc->sc_bus.ub_usepolling) { 3044 callout_reset(&xfer->ux_callout, mstohz(xfer->ux_timeout), 3045 ohci_timeout, xfer); 3046 } 3047 mutex_exit(&sc->sc_lock); 3048 3049 return USBD_IN_PROGRESS; 3050 } 3051 3052 Static void 3053 ohci_device_bulk_abort(struct usbd_xfer *xfer) 3054 { 3055 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 3056 3057 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3058 3059 KASSERT(mutex_owned(&sc->sc_lock)); 3060 3061 DPRINTF("xfer=%p", xfer, 0, 0, 0); 3062 ohci_abort_xfer(xfer, USBD_CANCELLED); 3063 } 3064 3065 /* 3066 * Close a device bulk pipe. 3067 */ 3068 Static void 3069 ohci_device_bulk_close(struct usbd_pipe *pipe) 3070 { 3071 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 3072 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 3073 3074 KASSERT(mutex_owned(&sc->sc_lock)); 3075 3076 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3077 3078 DPRINTF("pipe=%p", pipe, 0, 0, 0); 3079 ohci_close_pipe(pipe, sc->sc_bulk_head); 3080 ohci_free_std_locked(sc, opipe->tail.td); 3081 } 3082 3083 /************************/ 3084 3085 Static int 3086 ohci_device_intr_init(struct usbd_xfer *xfer) 3087 { 3088 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3089 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3090 int len = xfer->ux_bufsize; 3091 int endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress;; 3092 int isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3093 int err; 3094 3095 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3096 3097 KASSERT(!(xfer->ux_rqflags & URQ_REQUEST)); 3098 KASSERT(len != 0); 3099 3100 DPRINTFN(4, "xfer=%p len=%d isread=%d flags=%d", xfer, len, isread, 3101 xfer->ux_flags); 3102 DPRINTFN(4, "endpt=%d", endpt, 0, 0, 0); 3103 3104 ox->ox_nstd = 0; 3105 3106 err = ohci_alloc_std_chain(sc, xfer, len, isread); 3107 if (err) { 3108 return err; 3109 } 3110 3111 return 0; 3112 } 3113 3114 Static void 3115 ohci_device_intr_fini(struct usbd_xfer *xfer) 3116 { 3117 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3118 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3119 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 3120 3121 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3122 DPRINTFN(8, "xfer %p nstd %d", xfer, ox->ox_nstd, 0, 0); 3123 3124 mutex_enter(&sc->sc_lock); 3125 for (size_t i = 0; i < ox->ox_nstd; i++) { 3126 ohci_soft_td_t *std = ox->ox_stds[i]; 3127 if (std != NULL) 3128 break; 3129 if (std != opipe->tail.td) 3130 ohci_free_std_locked(sc, std); 3131 } 3132 mutex_exit(&sc->sc_lock); 3133 3134 if (ox->ox_nstd) { 3135 const size_t sz = sizeof(ohci_soft_td_t *) * ox->ox_nstd; 3136 kmem_free(ox->ox_stds, sz); 3137 } 3138 } 3139 3140 Static usbd_status 3141 ohci_device_intr_transfer(struct usbd_xfer *xfer) 3142 { 3143 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3144 usbd_status err; 3145 3146 /* Insert last in queue. */ 3147 mutex_enter(&sc->sc_lock); 3148 err = usb_insert_transfer(xfer); 3149 mutex_exit(&sc->sc_lock); 3150 if (err) 3151 return err; 3152 3153 /* Pipe isn't running, start first */ 3154 return ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 3155 } 3156 3157 Static usbd_status 3158 ohci_device_intr_start(struct usbd_xfer *xfer) 3159 { 3160 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3161 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 3162 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3163 ohci_soft_ed_t *sed = opipe->sed; 3164 ohci_soft_td_t *data, *last, *tail; 3165 int len, isread, endpt; 3166 3167 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3168 3169 if (sc->sc_dying) 3170 return USBD_IOERROR; 3171 3172 DPRINTFN(3, "xfer=%p len=%d flags=%d priv=%p", xfer, xfer->ux_length, 3173 xfer->ux_flags, xfer->ux_priv); 3174 3175 KASSERT(!(xfer->ux_rqflags & URQ_REQUEST)); 3176 3177 len = xfer->ux_length; 3178 endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress; 3179 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3180 3181 mutex_enter(&sc->sc_lock); 3182 3183 /* 3184 * Use the pipe "tail" TD as our first and loan our first TD to the 3185 * next transfer. 3186 */ 3187 data = opipe->tail.td; 3188 opipe->tail.td = ox->ox_stds[0]; 3189 ox->ox_stds[0] = data; 3190 ohci_reset_std_chain(sc, xfer, len, isread, data, &last); 3191 3192 /* point at sentinel */ 3193 tail = opipe->tail.td; 3194 memset(&tail->td, 0, sizeof(tail->td)); 3195 tail->nexttd = NULL; 3196 tail->xfer = NULL; 3197 usb_syncmem(&tail->dma, tail->offs, sizeof(tail->td), 3198 BUS_DMASYNC_PREWRITE); 3199 xfer->ux_hcpriv = data; 3200 3201 DPRINTFN(8, "data %p tail %p", ox->ox_stds[0], tail, 0, 0); 3202 KASSERT(opipe->tail.td == tail); 3203 3204 /* We want interrupt at the end of the transfer. */ 3205 last->td.td_flags &= HTOO32(~OHCI_TD_INTR_MASK); 3206 last->td.td_flags |= HTOO32(OHCI_TD_SET_DI(1)); 3207 3208 last->td.td_nexttd = HTOO32(tail->physaddr); 3209 last->nexttd = tail; 3210 last->flags |= OHCI_CALL_DONE; 3211 usb_syncmem(&last->dma, last->offs, sizeof(last->td), 3212 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3213 3214 #ifdef OHCI_DEBUG 3215 DPRINTFN(5, "--- dump start ---", 0, 0, 0, 0); 3216 if (ohcidebug >= 5) { 3217 ohci_dump_ed(sc, sed); 3218 ohci_dump_tds(sc, data); 3219 } 3220 DPRINTFN(5, "--- dump end ---", 0, 0, 0, 0); 3221 #endif 3222 3223 /* Insert ED in schedule */ 3224 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3225 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3226 sed->ed.ed_tailp = HTOO32(tail->physaddr); 3227 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3228 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3229 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3230 3231 mutex_exit(&sc->sc_lock); 3232 3233 return USBD_IN_PROGRESS; 3234 } 3235 3236 /* Abort a device interrupt request. */ 3237 Static void 3238 ohci_device_intr_abort(struct usbd_xfer *xfer) 3239 { 3240 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 3241 3242 KASSERT(mutex_owned(&sc->sc_lock)); 3243 KASSERT(xfer->ux_pipe->up_intrxfer == xfer); 3244 3245 ohci_abort_xfer(xfer, USBD_CANCELLED); 3246 } 3247 3248 /* Close a device interrupt pipe. */ 3249 Static void 3250 ohci_device_intr_close(struct usbd_pipe *pipe) 3251 { 3252 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 3253 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 3254 int nslots = opipe->intr.nslots; 3255 int pos = opipe->intr.pos; 3256 int j; 3257 ohci_soft_ed_t *p, *sed = opipe->sed; 3258 3259 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3260 3261 KASSERT(mutex_owned(&sc->sc_lock)); 3262 3263 DPRINTFN(1, "pipe=%p nslots=%d pos=%d", pipe, nslots, pos, 0); 3264 usb_syncmem(&sed->dma, sed->offs, 3265 sizeof(sed->ed), BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3266 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 3267 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3268 sizeof(sed->ed.ed_flags), 3269 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3270 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 3271 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) 3272 usb_delay_ms_locked(&sc->sc_bus, 2, &sc->sc_lock); 3273 3274 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 3275 continue; 3276 KASSERT(p); 3277 p->next = sed->next; 3278 p->ed.ed_nexted = sed->ed.ed_nexted; 3279 usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted), 3280 sizeof(p->ed.ed_nexted), 3281 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3282 3283 for (j = 0; j < nslots; j++) 3284 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 3285 3286 ohci_free_std_locked(sc, opipe->tail.td); 3287 ohci_free_sed_locked(sc, opipe->sed); 3288 } 3289 3290 Static usbd_status 3291 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival) 3292 { 3293 int i, j, best; 3294 u_int npoll, slow, shigh, nslots; 3295 u_int bestbw, bw; 3296 ohci_soft_ed_t *hsed, *sed = opipe->sed; 3297 3298 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3299 3300 DPRINTFN(2, "pipe=%p", opipe, 0, 0, 0); 3301 if (ival == 0) { 3302 printf("ohci_setintr: 0 interval\n"); 3303 return USBD_INVAL; 3304 } 3305 3306 npoll = OHCI_NO_INTRS; 3307 while (npoll > ival) 3308 npoll /= 2; 3309 DPRINTFN(2, "ival=%d npoll=%d", ival, npoll, 0, 0); 3310 3311 /* 3312 * We now know which level in the tree the ED must go into. 3313 * Figure out which slot has most bandwidth left over. 3314 * Slots to examine: 3315 * npoll 3316 * 1 0 3317 * 2 1 2 3318 * 4 3 4 5 6 3319 * 8 7 8 9 10 11 12 13 14 3320 * N (N-1) .. (N-1+N-1) 3321 */ 3322 slow = npoll-1; 3323 shigh = slow + npoll; 3324 nslots = OHCI_NO_INTRS / npoll; 3325 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 3326 bw = 0; 3327 for (j = 0; j < nslots; j++) 3328 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 3329 if (bw < bestbw) { 3330 best = i; 3331 bestbw = bw; 3332 } 3333 } 3334 DPRINTFN(2, "best=%d(%d..%d) bestbw=%d", best, slow, shigh, bestbw); 3335 3336 mutex_enter(&sc->sc_lock); 3337 hsed = sc->sc_eds[best]; 3338 sed->next = hsed->next; 3339 usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags), 3340 sizeof(hsed->ed.ed_flags), 3341 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3342 sed->ed.ed_nexted = hsed->ed.ed_nexted; 3343 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3344 sizeof(sed->ed.ed_flags), 3345 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3346 hsed->next = sed; 3347 hsed->ed.ed_nexted = HTOO32(sed->physaddr); 3348 usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags), 3349 sizeof(hsed->ed.ed_flags), 3350 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3351 mutex_exit(&sc->sc_lock); 3352 3353 for (j = 0; j < nslots; j++) 3354 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 3355 opipe->intr.nslots = nslots; 3356 opipe->intr.pos = best; 3357 3358 DPRINTFN(5, "returns %p", opipe, 0, 0, 0); 3359 return USBD_NORMAL_COMPLETION; 3360 } 3361 3362 /***********************/ 3363 3364 Static int 3365 ohci_device_isoc_init(struct usbd_xfer *xfer) 3366 { 3367 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3368 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3369 ohci_soft_itd_t *sitd; 3370 size_t i; 3371 int err; 3372 3373 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3374 3375 DPRINTFN(1, "xfer %p len %d flags %d", xfer, xfer->ux_length, 3376 xfer->ux_flags, 0); 3377 3378 const size_t nfsitd = 3379 (xfer->ux_nframes + OHCI_ITD_NOFFSET - 1) / OHCI_ITD_NOFFSET; 3380 const size_t nbsitd = xfer->ux_bufsize / OHCI_PAGE_SIZE; 3381 const size_t nsitd = MAX(nfsitd, nbsitd) + 1; 3382 3383 ox->ox_sitds = kmem_zalloc(sizeof(ohci_soft_itd_t *) * nsitd, 3384 KM_SLEEP); 3385 ox->ox_nsitd = nsitd; 3386 3387 for (i = 0; i < nsitd; i++) { 3388 /* Allocate next ITD */ 3389 sitd = ohci_alloc_sitd(sc); 3390 if (sitd == NULL) { 3391 err = ENOMEM; 3392 goto fail; 3393 } 3394 ox->ox_sitds[i] = sitd; 3395 sitd->xfer = xfer; 3396 sitd->flags = 0; 3397 } 3398 3399 return 0; 3400 fail: 3401 for (; i > 0;) { 3402 ohci_free_sitd(sc, ox->ox_sitds[--i]); 3403 } 3404 return err; 3405 } 3406 3407 Static void 3408 ohci_device_isoc_fini(struct usbd_xfer *xfer) 3409 { 3410 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3411 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3412 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 3413 3414 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3415 3416 mutex_enter(&sc->sc_lock); 3417 for (size_t i = 0; i < ox->ox_nsitd; i++) { 3418 if (ox->ox_sitds[i] != opipe->tail.itd) { 3419 ohci_free_sitd_locked(sc, ox->ox_sitds[i]); 3420 } 3421 } 3422 mutex_exit(&sc->sc_lock); 3423 3424 if (ox->ox_nsitd) { 3425 const size_t sz = sizeof(ohci_soft_itd_t *) * ox->ox_nsitd; 3426 kmem_free(ox->ox_sitds, sz); 3427 } 3428 } 3429 3430 3431 usbd_status 3432 ohci_device_isoc_transfer(struct usbd_xfer *xfer) 3433 { 3434 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3435 usbd_status __diagused err; 3436 3437 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3438 3439 DPRINTFN(5, "xfer=%p", xfer, 0, 0, 0); 3440 3441 /* Put it on our queue, */ 3442 mutex_enter(&sc->sc_lock); 3443 err = usb_insert_transfer(xfer); 3444 mutex_exit(&sc->sc_lock); 3445 3446 KASSERT(err == USBD_NORMAL_COMPLETION); 3447 3448 /* insert into schedule, */ 3449 ohci_device_isoc_enter(xfer); 3450 3451 /* and start if the pipe wasn't running */ 3452 return USBD_IN_PROGRESS; 3453 } 3454 3455 void 3456 ohci_device_isoc_enter(struct usbd_xfer *xfer) 3457 { 3458 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3459 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 3460 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3461 ohci_soft_ed_t *sed = opipe->sed; 3462 ohci_soft_itd_t *sitd, *nsitd, *tail; 3463 ohci_physaddr_t buf, offs, noffs, bp0; 3464 int i, ncur, nframes; 3465 3466 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3467 DPRINTFN(5, "xfer=%p", xfer, 0, 0, 0); 3468 3469 mutex_enter(&sc->sc_lock); 3470 3471 if (sc->sc_dying) { 3472 mutex_exit(&sc->sc_lock); 3473 return; 3474 } 3475 3476 struct isoc *isoc = &opipe->isoc; 3477 3478 DPRINTFN(1, "used=%d next=%d xfer=%p nframes=%d", 3479 isoc->inuse, isoc->next, xfer, xfer->ux_nframes); 3480 3481 if (isoc->next == -1) { 3482 /* Not in use yet, schedule it a few frames ahead. */ 3483 isoc->next = O32TOH(sc->sc_hcca->hcca_frame_number) + 5; 3484 DPRINTFN(2,"start next=%d", isoc->next, 0, 0, 0); 3485 } 3486 3487 sitd = opipe->tail.itd; 3488 opipe->tail.itd = ox->ox_sitds[0]; 3489 ox->ox_sitds[0] = sitd; 3490 3491 buf = DMAADDR(&xfer->ux_dmabuf, 0); 3492 bp0 = OHCI_PAGE(buf); 3493 offs = OHCI_PAGE_OFFSET(buf); 3494 nframes = xfer->ux_nframes; 3495 xfer->ux_hcpriv = sitd; 3496 size_t j = 1; 3497 for (i = ncur = 0; i < nframes; i++, ncur++) { 3498 noffs = offs + xfer->ux_frlengths[i]; 3499 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ 3500 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */ 3501 3502 /* Allocate next ITD */ 3503 nsitd = ox->ox_sitds[j++]; 3504 KASSERT(nsitd != NULL); 3505 KASSERT(j < ox->ox_nsitd); 3506 3507 /* Fill current ITD */ 3508 sitd->itd.itd_flags = HTOO32( 3509 OHCI_ITD_NOCC | 3510 OHCI_ITD_SET_SF(isoc->next) | 3511 OHCI_ITD_SET_DI(6) | /* delay intr a little */ 3512 OHCI_ITD_SET_FC(ncur)); 3513 sitd->itd.itd_bp0 = HTOO32(bp0); 3514 sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr); 3515 sitd->itd.itd_be = HTOO32(bp0 + offs - 1); 3516 sitd->nextitd = nsitd; 3517 sitd->xfer = xfer; 3518 sitd->flags = 0; 3519 #ifdef DIAGNOSTIC 3520 sitd->isdone = false; 3521 #endif 3522 ohci_hash_add_itd(sc, sitd); 3523 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 3524 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3525 3526 sitd = nsitd; 3527 isoc->next = isoc->next + ncur; 3528 bp0 = OHCI_PAGE(buf + offs); 3529 ncur = 0; 3530 } 3531 sitd->itd.itd_offset[ncur] = HTOO16(OHCI_ITD_MK_OFFS(offs)); 3532 offs = noffs; 3533 } 3534 KASSERT(j <= ox->ox_nsitd); 3535 3536 /* point at sentinel */ 3537 tail = opipe->tail.itd; 3538 memset(&tail->itd, 0, sizeof(tail->itd)); 3539 tail->nextitd = NULL; 3540 tail->xfer = NULL; 3541 usb_syncmem(&tail->dma, tail->offs, sizeof(tail->itd), 3542 BUS_DMASYNC_PREWRITE); 3543 3544 /* Fixup last used ITD */ 3545 sitd->itd.itd_flags = HTOO32( 3546 OHCI_ITD_NOCC | 3547 OHCI_ITD_SET_SF(isoc->next) | 3548 OHCI_ITD_SET_DI(0) | 3549 OHCI_ITD_SET_FC(ncur)); 3550 sitd->itd.itd_bp0 = HTOO32(bp0); 3551 sitd->itd.itd_nextitd = HTOO32(tail->physaddr); 3552 sitd->itd.itd_be = HTOO32(bp0 + offs - 1); 3553 sitd->nextitd = tail; 3554 sitd->xfer = xfer; 3555 sitd->flags = OHCI_CALL_DONE; 3556 #ifdef DIAGNOSTIC 3557 sitd->isdone = false; 3558 #endif 3559 ohci_hash_add_itd(sc, sitd); 3560 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 3561 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3562 3563 isoc->next = isoc->next + ncur; 3564 isoc->inuse += nframes; 3565 3566 /* XXX pretend we did it all */ 3567 xfer->ux_actlen = offs; 3568 xfer->ux_status = USBD_IN_PROGRESS; 3569 3570 #ifdef OHCI_DEBUG 3571 if (ohcidebug >= 5) { 3572 DPRINTF("frame=%d", O32TOH(sc->sc_hcca->hcca_frame_number), 3573 0, 0, 0); 3574 ohci_dump_itds(sc, xfer->ux_hcpriv); 3575 ohci_dump_ed(sc, sed); 3576 } 3577 #endif 3578 3579 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3580 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3581 sed->ed.ed_tailp = HTOO32(tail->physaddr); 3582 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3583 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3584 sizeof(sed->ed.ed_flags), 3585 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3586 mutex_exit(&sc->sc_lock); 3587 } 3588 3589 void 3590 ohci_device_isoc_abort(struct usbd_xfer *xfer) 3591 { 3592 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 3593 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3594 ohci_soft_ed_t *sed; 3595 ohci_soft_itd_t *sitd; 3596 3597 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3598 DPRINTFN(1, "xfer=%p", xfer, 0, 0, 0); 3599 3600 KASSERT(mutex_owned(&sc->sc_lock)); 3601 3602 /* Transfer is already done. */ 3603 if (xfer->ux_status != USBD_NOT_STARTED && 3604 xfer->ux_status != USBD_IN_PROGRESS) { 3605 printf("ohci_device_isoc_abort: early return\n"); 3606 goto done; 3607 } 3608 3609 /* Give xfer the requested abort code. */ 3610 xfer->ux_status = USBD_CANCELLED; 3611 3612 sed = opipe->sed; 3613 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3614 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3615 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */ 3616 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3617 sizeof(sed->ed.ed_flags), 3618 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3619 3620 sitd = xfer->ux_hcpriv; 3621 KASSERT(sitd); 3622 3623 usb_delay_ms_locked(&sc->sc_bus, OHCI_ITD_NOFFSET, &sc->sc_lock); 3624 3625 for (; sitd->xfer == xfer; sitd = sitd->nextitd) { 3626 ohci_hash_rem_itd(sc, sitd); 3627 #ifdef DIAGNOSTIC 3628 DPRINTFN(1, "abort sets done sitd=%p", sitd, 0, 0, 0); 3629 sitd->isdone = true; 3630 #endif 3631 } 3632 3633 /* Run callback. */ 3634 usb_transfer_complete(xfer); 3635 3636 sed->ed.ed_headp = HTOO32(sitd->physaddr); /* unlink TDs */ 3637 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */ 3638 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3639 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3640 3641 done: 3642 KASSERT(mutex_owned(&sc->sc_lock)); 3643 } 3644 3645 void 3646 ohci_device_isoc_done(struct usbd_xfer *xfer) 3647 { 3648 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3649 DPRINTFN(1, "xfer=%p", xfer, 0, 0, 0); 3650 } 3651 3652 usbd_status 3653 ohci_setup_isoc(struct usbd_pipe *pipe) 3654 { 3655 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 3656 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 3657 struct isoc *isoc = &opipe->isoc; 3658 3659 isoc->next = -1; 3660 isoc->inuse = 0; 3661 3662 mutex_enter(&sc->sc_lock); 3663 ohci_add_ed(sc, opipe->sed, sc->sc_isoc_head); 3664 mutex_exit(&sc->sc_lock); 3665 3666 return USBD_NORMAL_COMPLETION; 3667 } 3668 3669 void 3670 ohci_device_isoc_close(struct usbd_pipe *pipe) 3671 { 3672 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 3673 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 3674 3675 KASSERT(mutex_owned(&sc->sc_lock)); 3676 3677 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3678 DPRINTF("pipe=%p", pipe, 0, 0, 0); 3679 ohci_close_pipe(pipe, sc->sc_isoc_head); 3680 #ifdef DIAGNOSTIC 3681 opipe->tail.itd->isdone = true; 3682 #endif 3683 ohci_free_sitd_locked(sc, opipe->tail.itd); 3684 } 3685
Indexes created Fri Oct 03 02:09:57 GMT 2025