ohci.c revision 1.254.2.86
1 /* $NetBSD: ohci.c,v 1.254.2.86 2017/02/05 13:40:46 skrll Exp $ */ 2 3 /* 4 * Copyright (c) 1998, 2004, 2005, 2012 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net) at 9 * Carlstedt Research & Technology, Jared D. McNeill (jmcneill (at) invisible.ca) 10 * and Matthew R. Green (mrg (at) eterna.com.au). 11 * This code is derived from software contributed to The NetBSD Foundation 12 * by Charles M. Hannum. 13 * 14 * Redistribution and use in source and binary forms, with or without 15 * modification, are permitted provided that the following conditions 16 * are met: 17 * 1. Redistributions of source code must retain the above copyright 18 * notice, this list of conditions and the following disclaimer. 19 * 2. Redistributions in binary form must reproduce the above copyright 20 * notice, this list of conditions and the following disclaimer in the 21 * documentation and/or other materials provided with the distribution. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 24 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 25 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 26 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 27 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 31 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 32 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 33 * POSSIBILITY OF SUCH DAMAGE. 34 */ 35 36 /* 37 * USB Open Host Controller driver. 38 * 39 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html 40 * USB spec: http://www.usb.org/developers/docs/ 41 */ 42 43 #include <sys/cdefs.h> 44 __KERNEL_RCSID(0, "$NetBSD: ohci.c,v 1.254.2.86 2017/02/05 13:40:46 skrll Exp $"); 45 46 #ifdef _KERNEL_OPT 47 #include "opt_usb.h" 48 #endif 49 50 #include <sys/param.h> 51 52 #include <sys/cpu.h> 53 #include <sys/device.h> 54 #include <sys/kernel.h> 55 #include <sys/kmem.h> 56 #include <sys/proc.h> 57 #include <sys/queue.h> 58 #include <sys/select.h> 59 #include <sys/sysctl.h> 60 #include <sys/systm.h> 61 62 #include <machine/endian.h> 63 64 #include <dev/usb/usb.h> 65 #include <dev/usb/usbdi.h> 66 #include <dev/usb/usbdivar.h> 67 #include <dev/usb/usb_mem.h> 68 #include <dev/usb/usb_quirks.h> 69 70 #include <dev/usb/ohcireg.h> 71 #include <dev/usb/ohcivar.h> 72 #include <dev/usb/usbroothub.h> 73 #include <dev/usb/usbhist.h> 74 75 #ifdef USB_DEBUG 76 #ifndef OHCI_DEBUG 77 #define ohcidebug 0 78 #else 79 static int ohcidebug = 10; 80 81 SYSCTL_SETUP(sysctl_hw_ohci_setup, "sysctl hw.ohci setup") 82 { 83 int err; 84 const struct sysctlnode *rnode; 85 const struct sysctlnode *cnode; 86 87 err = sysctl_createv(clog, 0, NULL, &rnode, 88 CTLFLAG_PERMANENT, CTLTYPE_NODE, "ohci", 89 SYSCTL_DESCR("ohci global controls"), 90 NULL, 0, NULL, 0, CTL_HW, CTL_CREATE, CTL_EOL); 91 92 if (err) 93 goto fail; 94 95 /* control debugging printfs */ 96 err = sysctl_createv(clog, 0, &rnode, &cnode, 97 CTLFLAG_PERMANENT|CTLFLAG_READWRITE, CTLTYPE_INT, 98 "debug", SYSCTL_DESCR("Enable debugging output"), 99 NULL, 0, &ohcidebug, sizeof(ohcidebug), CTL_CREATE, CTL_EOL); 100 if (err) 101 goto fail; 102 103 return; 104 fail: 105 aprint_error("%s: sysctl_createv failed (err = %d)\n", __func__, err); 106 } 107 108 #endif /* OHCI_DEBUG */ 109 #endif /* USB_DEBUG */ 110 111 #define DPRINTF(FMT,A,B,C,D) USBHIST_LOG(ohcidebug,FMT,A,B,C,D) 112 #define DPRINTFN(N,FMT,A,B,C,D) USBHIST_LOGN(ohcidebug,N,FMT,A,B,C,D) 113 #define OHCIHIST_FUNC() USBHIST_FUNC() 114 #define OHCIHIST_CALLED(name) USBHIST_CALLED(ohcidebug) 115 116 #if BYTE_ORDER == BIG_ENDIAN 117 #define SWAP_ENDIAN OHCI_LITTLE_ENDIAN 118 #else 119 #define SWAP_ENDIAN OHCI_BIG_ENDIAN 120 #endif 121 122 #define O16TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap16(val) : val) 123 #define O32TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap32(val) : val) 124 #define HTOO16(val) O16TOH(val) 125 #define HTOO32(val) O32TOH(val) 126 127 struct ohci_pipe; 128 129 Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *); 130 Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *); 131 132 Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *); 133 Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *); 134 Static void ohci_free_std_locked(ohci_softc_t *, ohci_soft_td_t *); 135 136 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *); 137 Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *); 138 Static void ohci_free_sitd_locked(ohci_softc_t *, 139 ohci_soft_itd_t *); 140 141 Static int ohci_alloc_std_chain(ohci_softc_t *, struct usbd_xfer *, 142 int, int); 143 Static void ohci_free_stds(ohci_softc_t *, struct ohci_xfer *); 144 145 Static void ohci_reset_std_chain(ohci_softc_t *, struct usbd_xfer *, 146 int, int, ohci_soft_td_t *, ohci_soft_td_t **); 147 148 Static usbd_status ohci_open(struct usbd_pipe *); 149 Static void ohci_poll(struct usbd_bus *); 150 Static void ohci_softintr(void *); 151 Static void ohci_rhsc(ohci_softc_t *, struct usbd_xfer *); 152 Static void ohci_rhsc_softint(void *); 153 154 Static void ohci_add_ed(ohci_softc_t *, ohci_soft_ed_t *, 155 ohci_soft_ed_t *); 156 157 Static void ohci_rem_ed(ohci_softc_t *, ohci_soft_ed_t *, 158 ohci_soft_ed_t *); 159 Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *); 160 Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *); 161 Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t); 162 Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *); 163 Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *); 164 Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t); 165 166 Static usbd_status ohci_setup_isoc(struct usbd_pipe *); 167 Static void ohci_device_isoc_enter(struct usbd_xfer *); 168 169 Static struct usbd_xfer * 170 ohci_allocx(struct usbd_bus *, unsigned int); 171 Static void ohci_freex(struct usbd_bus *, struct usbd_xfer *); 172 Static void ohci_get_lock(struct usbd_bus *, kmutex_t **); 173 Static int ohci_roothub_ctrl(struct usbd_bus *, 174 usb_device_request_t *, void *, int); 175 176 Static usbd_status ohci_root_intr_transfer(struct usbd_xfer *); 177 Static usbd_status ohci_root_intr_start(struct usbd_xfer *); 178 Static void ohci_root_intr_abort(struct usbd_xfer *); 179 Static void ohci_root_intr_close(struct usbd_pipe *); 180 Static void ohci_root_intr_done(struct usbd_xfer *); 181 182 Static int ohci_device_ctrl_init(struct usbd_xfer *); 183 Static void ohci_device_ctrl_fini(struct usbd_xfer *); 184 Static usbd_status ohci_device_ctrl_transfer(struct usbd_xfer *); 185 Static usbd_status ohci_device_ctrl_start(struct usbd_xfer *); 186 Static void ohci_device_ctrl_abort(struct usbd_xfer *); 187 Static void ohci_device_ctrl_close(struct usbd_pipe *); 188 Static void ohci_device_ctrl_done(struct usbd_xfer *); 189 190 Static int ohci_device_bulk_init(struct usbd_xfer *); 191 Static void ohci_device_bulk_fini(struct usbd_xfer *); 192 Static usbd_status ohci_device_bulk_transfer(struct usbd_xfer *); 193 Static usbd_status ohci_device_bulk_start(struct usbd_xfer *); 194 Static void ohci_device_bulk_abort(struct usbd_xfer *); 195 Static void ohci_device_bulk_close(struct usbd_pipe *); 196 Static void ohci_device_bulk_done(struct usbd_xfer *); 197 198 Static int ohci_device_intr_init(struct usbd_xfer *); 199 Static void ohci_device_intr_fini(struct usbd_xfer *); 200 Static usbd_status ohci_device_intr_transfer(struct usbd_xfer *); 201 Static usbd_status ohci_device_intr_start(struct usbd_xfer *); 202 Static void ohci_device_intr_abort(struct usbd_xfer *); 203 Static void ohci_device_intr_close(struct usbd_pipe *); 204 Static void ohci_device_intr_done(struct usbd_xfer *); 205 206 Static int ohci_device_isoc_init(struct usbd_xfer *); 207 Static void ohci_device_isoc_fini(struct usbd_xfer *); 208 Static usbd_status ohci_device_isoc_transfer(struct usbd_xfer *); 209 Static void ohci_device_isoc_abort(struct usbd_xfer *); 210 Static void ohci_device_isoc_close(struct usbd_pipe *); 211 Static void ohci_device_isoc_done(struct usbd_xfer *); 212 213 Static usbd_status ohci_device_setintr(ohci_softc_t *, 214 struct ohci_pipe *, int); 215 216 Static void ohci_timeout(void *); 217 Static void ohci_timeout_task(void *); 218 Static void ohci_rhsc_enable(void *); 219 220 Static void ohci_close_pipe(struct usbd_pipe *, ohci_soft_ed_t *); 221 Static void ohci_abort_xfer(struct usbd_xfer *, usbd_status); 222 223 Static void ohci_device_clear_toggle(struct usbd_pipe *); 224 Static void ohci_noop(struct usbd_pipe *); 225 226 #ifdef OHCI_DEBUG 227 Static void ohci_dumpregs(ohci_softc_t *); 228 Static void ohci_dump_tds(ohci_softc_t *, ohci_soft_td_t *); 229 Static void ohci_dump_td(ohci_softc_t *, ohci_soft_td_t *); 230 Static void ohci_dump_ed(ohci_softc_t *, ohci_soft_ed_t *); 231 Static void ohci_dump_itd(ohci_softc_t *, ohci_soft_itd_t *); 232 Static void ohci_dump_itds(ohci_softc_t *, ohci_soft_itd_t *); 233 #endif 234 235 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 236 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 237 #define OWRITE1(sc, r, x) \ 238 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 239 #define OWRITE2(sc, r, x) \ 240 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 241 #define OWRITE4(sc, r, x) \ 242 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 243 244 static __inline uint32_t 245 OREAD4(ohci_softc_t *sc, bus_size_t r) 246 { 247 248 OBARR(sc); 249 return bus_space_read_4(sc->iot, sc->ioh, r); 250 } 251 252 /* Reverse the bits in a value 0 .. 31 */ 253 Static uint8_t revbits[OHCI_NO_INTRS] = 254 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 255 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 256 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 257 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 258 259 struct ohci_pipe { 260 struct usbd_pipe pipe; 261 ohci_soft_ed_t *sed; 262 union { 263 ohci_soft_td_t *td; 264 ohci_soft_itd_t *itd; 265 } tail; 266 /* Info needed for different pipe kinds. */ 267 union { 268 /* Control pipe */ 269 struct { 270 usb_dma_t reqdma; 271 } ctrl; 272 /* Interrupt pipe */ 273 struct { 274 int nslots; 275 int pos; 276 } intr; 277 /* Isochronous pipe */ 278 struct isoc { 279 int next, inuse; 280 } isoc; 281 }; 282 }; 283 284 Static const struct usbd_bus_methods ohci_bus_methods = { 285 .ubm_open = ohci_open, 286 .ubm_softint = ohci_softintr, 287 .ubm_dopoll = ohci_poll, 288 .ubm_allocx = ohci_allocx, 289 .ubm_freex = ohci_freex, 290 .ubm_getlock = ohci_get_lock, 291 .ubm_rhctrl = ohci_roothub_ctrl, 292 }; 293 294 Static const struct usbd_pipe_methods ohci_root_intr_methods = { 295 .upm_transfer = ohci_root_intr_transfer, 296 .upm_start = ohci_root_intr_start, 297 .upm_abort = ohci_root_intr_abort, 298 .upm_close = ohci_root_intr_close, 299 .upm_cleartoggle = ohci_noop, 300 .upm_done = ohci_root_intr_done, 301 }; 302 303 Static const struct usbd_pipe_methods ohci_device_ctrl_methods = { 304 .upm_init = ohci_device_ctrl_init, 305 .upm_fini = ohci_device_ctrl_fini, 306 .upm_transfer = ohci_device_ctrl_transfer, 307 .upm_start = ohci_device_ctrl_start, 308 .upm_abort = ohci_device_ctrl_abort, 309 .upm_close = ohci_device_ctrl_close, 310 .upm_cleartoggle = ohci_noop, 311 .upm_done = ohci_device_ctrl_done, 312 }; 313 314 Static const struct usbd_pipe_methods ohci_device_intr_methods = { 315 .upm_init = ohci_device_intr_init, 316 .upm_fini = ohci_device_intr_fini, 317 .upm_transfer = ohci_device_intr_transfer, 318 .upm_start = ohci_device_intr_start, 319 .upm_abort = ohci_device_intr_abort, 320 .upm_close = ohci_device_intr_close, 321 .upm_cleartoggle = ohci_device_clear_toggle, 322 .upm_done = ohci_device_intr_done, 323 }; 324 325 Static const struct usbd_pipe_methods ohci_device_bulk_methods = { 326 .upm_init = ohci_device_bulk_init, 327 .upm_fini = ohci_device_bulk_fini, 328 .upm_transfer = ohci_device_bulk_transfer, 329 .upm_start = ohci_device_bulk_start, 330 .upm_abort = ohci_device_bulk_abort, 331 .upm_close = ohci_device_bulk_close, 332 .upm_cleartoggle = ohci_device_clear_toggle, 333 .upm_done = ohci_device_bulk_done, 334 }; 335 336 Static const struct usbd_pipe_methods ohci_device_isoc_methods = { 337 .upm_init = ohci_device_isoc_init, 338 .upm_fini = ohci_device_isoc_fini, 339 .upm_transfer = ohci_device_isoc_transfer, 340 .upm_abort = ohci_device_isoc_abort, 341 .upm_close = ohci_device_isoc_close, 342 .upm_cleartoggle = ohci_noop, 343 .upm_done = ohci_device_isoc_done, 344 }; 345 346 int 347 ohci_activate(device_t self, enum devact act) 348 { 349 struct ohci_softc *sc = device_private(self); 350 351 switch (act) { 352 case DVACT_DEACTIVATE: 353 sc->sc_dying = 1; 354 return 0; 355 default: 356 return EOPNOTSUPP; 357 } 358 } 359 360 void 361 ohci_childdet(device_t self, device_t child) 362 { 363 struct ohci_softc *sc = device_private(self); 364 365 KASSERT(sc->sc_child == child); 366 sc->sc_child = NULL; 367 } 368 369 int 370 ohci_detach(struct ohci_softc *sc, int flags) 371 { 372 int rv = 0; 373 374 if (sc->sc_child != NULL) 375 rv = config_detach(sc->sc_child, flags); 376 377 if (rv != 0) 378 return rv; 379 380 callout_halt(&sc->sc_tmo_rhsc, &sc->sc_lock); 381 382 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 383 callout_destroy(&sc->sc_tmo_rhsc); 384 385 softint_disestablish(sc->sc_rhsc_si); 386 387 cv_destroy(&sc->sc_softwake_cv); 388 389 mutex_destroy(&sc->sc_lock); 390 mutex_destroy(&sc->sc_intr_lock); 391 392 if (sc->sc_hcca != NULL) 393 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 394 pool_cache_destroy(sc->sc_xferpool); 395 396 return rv; 397 } 398 399 ohci_soft_ed_t * 400 ohci_alloc_sed(ohci_softc_t *sc) 401 { 402 ohci_soft_ed_t *sed; 403 usbd_status err; 404 int i, offs; 405 usb_dma_t dma; 406 407 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 408 409 mutex_enter(&sc->sc_lock); 410 if (sc->sc_freeeds == NULL) { 411 DPRINTFN(2, "allocating chunk", 0, 0, 0, 0); 412 mutex_exit(&sc->sc_lock); 413 414 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 415 OHCI_ED_ALIGN, &dma); 416 if (err) 417 return 0; 418 419 mutex_enter(&sc->sc_lock); 420 for (i = 0; i < OHCI_SED_CHUNK; i++) { 421 offs = i * OHCI_SED_SIZE; 422 sed = KERNADDR(&dma, offs); 423 sed->physaddr = DMAADDR(&dma, offs); 424 sed->dma = dma; 425 sed->offs = offs; 426 sed->next = sc->sc_freeeds; 427 sc->sc_freeeds = sed; 428 } 429 } 430 sed = sc->sc_freeeds; 431 sc->sc_freeeds = sed->next; 432 mutex_exit(&sc->sc_lock); 433 434 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 435 sed->next = 0; 436 return sed; 437 } 438 439 static inline void 440 ohci_free_sed_locked(ohci_softc_t *sc, ohci_soft_ed_t *sed) 441 { 442 443 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 444 445 sed->next = sc->sc_freeeds; 446 sc->sc_freeeds = sed; 447 } 448 449 void 450 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 451 { 452 453 mutex_enter(&sc->sc_lock); 454 ohci_free_sed_locked(sc, sed); 455 mutex_exit(&sc->sc_lock); 456 } 457 458 ohci_soft_td_t * 459 ohci_alloc_std(ohci_softc_t *sc) 460 { 461 ohci_soft_td_t *std; 462 usbd_status err; 463 int i, offs; 464 usb_dma_t dma; 465 466 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 467 468 mutex_enter(&sc->sc_lock); 469 if (sc->sc_freetds == NULL) { 470 DPRINTFN(2, "allocating chunk", 0, 0, 0, 0); 471 mutex_exit(&sc->sc_lock); 472 473 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 474 OHCI_TD_ALIGN, &dma); 475 if (err) 476 return NULL; 477 478 mutex_enter(&sc->sc_lock); 479 for (i = 0; i < OHCI_STD_CHUNK; i++) { 480 offs = i * OHCI_STD_SIZE; 481 std = KERNADDR(&dma, offs); 482 std->physaddr = DMAADDR(&dma, offs); 483 std->dma = dma; 484 std->offs = offs; 485 std->nexttd = sc->sc_freetds; 486 sc->sc_freetds = std; 487 } 488 } 489 490 std = sc->sc_freetds; 491 sc->sc_freetds = std->nexttd; 492 mutex_exit(&sc->sc_lock); 493 494 memset(&std->td, 0, sizeof(ohci_td_t)); 495 std->nexttd = NULL; 496 std->xfer = NULL; 497 std->held = NULL; 498 499 return std; 500 } 501 502 void 503 ohci_free_std_locked(ohci_softc_t *sc, ohci_soft_td_t *std) 504 { 505 506 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 507 508 std->nexttd = sc->sc_freetds; 509 sc->sc_freetds = std; 510 } 511 512 void 513 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std) 514 { 515 516 mutex_enter(&sc->sc_lock); 517 ohci_free_std_locked(sc, std); 518 mutex_exit(&sc->sc_lock); 519 } 520 521 Static int 522 ohci_alloc_std_chain(ohci_softc_t *sc, struct usbd_xfer *xfer, int length, int rd) 523 { 524 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 525 uint16_t flags = xfer->ux_flags; 526 527 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 528 529 DPRINTFN(8, "addr=%d endpt=%d len=%d speed=%d", 530 xfer->ux_pipe->up_dev->ud_addr, 531 UE_GET_ADDR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress), 532 length, xfer->ux_pipe->up_dev->ud_speed); 533 534 ASSERT_SLEEPABLE(); 535 KASSERT(length != 0 || (!rd && (flags & USBD_FORCE_SHORT_XFER))); 536 537 size_t nstd = (!rd && (flags & USBD_FORCE_SHORT_XFER)) ? 1 : 0; 538 nstd += ((length + OHCI_PAGE_SIZE - 1) / OHCI_PAGE_SIZE); 539 ox->ox_stds = kmem_zalloc(sizeof(ohci_soft_td_t *) * nstd, 540 KM_SLEEP); 541 ox->ox_nstd = nstd; 542 543 DPRINTFN(8, "xfer %p nstd %d", xfer, nstd, 0, 0); 544 545 for (size_t j = 0; j < ox->ox_nstd; j++) { 546 ohci_soft_td_t *cur = ohci_alloc_std(sc); 547 if (cur == NULL) 548 goto nomem; 549 550 ox->ox_stds[j] = cur; 551 cur->held = &ox->ox_stds[j]; 552 cur->xfer = xfer; 553 cur->flags = 0; 554 DPRINTFN(10, "xfer=%p new std=%p held at %p", ox, cur, 555 cur->held, 0); 556 } 557 558 return 0; 559 560 nomem: 561 ohci_free_stds(sc, ox); 562 kmem_free(ox->ox_stds, sizeof(ohci_soft_td_t *) * nstd); 563 564 return ENOMEM; 565 } 566 567 Static void 568 ohci_free_stds(ohci_softc_t *sc, struct ohci_xfer *ox) 569 { 570 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 571 DPRINTF("ox=%p", ox, 0, 0, 0); 572 573 mutex_enter(&sc->sc_lock); 574 for (size_t i = 0; i < ox->ox_nstd; i++) { 575 ohci_soft_td_t *std = ox->ox_stds[i]; 576 if (std == NULL) 577 break; 578 ohci_free_std_locked(sc, std); 579 } 580 mutex_exit(&sc->sc_lock); 581 } 582 583 void 584 ohci_reset_std_chain(ohci_softc_t *sc, struct usbd_xfer *xfer, 585 int alen, int rd, ohci_soft_td_t *sp, ohci_soft_td_t **ep) 586 { 587 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 588 ohci_soft_td_t *next, *cur; 589 int len, curlen; 590 usb_dma_t *dma = &xfer->ux_dmabuf; 591 uint16_t flags = xfer->ux_flags; 592 593 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 594 DPRINTF("start len=%d", alen, 0, 0, 0); 595 596 KASSERT(mutex_owned(&sc->sc_lock)); 597 598 DPRINTFN(8, "addr=%d endpt=%d len=%d speed=%d", 599 xfer->ux_pipe->up_dev->ud_addr, 600 UE_GET_ADDR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress), 601 alen, xfer->ux_pipe->up_dev->ud_speed); 602 603 KASSERT(sp); 604 605 int mps = UGETW(xfer->ux_pipe->up_endpoint->ue_edesc->wMaxPacketSize); 606 607 /* 608 * Assign next for the len == 0 case where we don't go through the 609 * main loop. 610 */ 611 len = alen; 612 cur = next = sp; 613 614 usb_syncmem(dma, 0, len, 615 rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 616 const uint32_t tdflags = HTOO32( 617 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 618 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR); 619 620 size_t curoffs = 0; 621 for (size_t j = 1; len != 0;) { 622 if (j == ox->ox_nstd) 623 next = NULL; 624 else 625 next = ox->ox_stds[j++]; 626 KASSERT(next != cur); 627 628 curlen = 0; 629 const ohci_physaddr_t sdataphys = DMAADDR(dma, curoffs); 630 ohci_physaddr_t edataphys = DMAADDR(dma, curoffs + len - 1); 631 632 const ohci_physaddr_t sphyspg = OHCI_PAGE(sdataphys); 633 ohci_physaddr_t ephyspg = OHCI_PAGE(edataphys); 634 /* 635 * The OHCI hardware can handle at most one page 636 * crossing per TD 637 */ 638 curlen = len; 639 if (sphyspg != ephyspg && 640 sphyspg + OHCI_PAGE_SIZE != ephyspg) { 641 /* must use multiple TDs, fill as much as possible. */ 642 curlen = 2 * OHCI_PAGE_SIZE - 643 OHCI_PAGE_OFFSET(sdataphys); 644 /* the length must be a multiple of the max size */ 645 curlen -= curlen % mps; 646 edataphys = DMAADDR(dma, curoffs + curlen - 1); 647 } 648 KASSERT(curlen != 0); 649 DPRINTFN(4, "sdataphys=0x%08x edataphys=0x%08x " 650 "len=%d curlen=%d", sdataphys, edataphys, len, curlen); 651 652 cur->td.td_flags = tdflags; 653 cur->td.td_cbp = HTOO32(sdataphys); 654 cur->td.td_be = HTOO32(edataphys); 655 cur->td.td_nexttd = (next != NULL) ? HTOO32(next->physaddr) : 0; 656 cur->nexttd = next; 657 cur->len = curlen; 658 cur->flags = OHCI_ADD_LEN; 659 cur->xfer = xfer; 660 ohci_hash_add_td(sc, cur); 661 662 curoffs += curlen; 663 len -= curlen; 664 665 if (len != 0) { 666 KASSERT(next != NULL); 667 DPRINTFN(10, "extend chain", 0, 0, 0, 0); 668 usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td), 669 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 670 671 cur = next; 672 } 673 } 674 cur->td.td_flags |= 675 HTOO32(xfer->ux_flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0); 676 677 if (!rd && 678 (flags & USBD_FORCE_SHORT_XFER) && 679 alen % mps == 0) { 680 /* We're adding a ZLP so sync the previous TD */ 681 usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td), 682 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 683 684 /* Force a 0 length transfer at the end. */ 685 686 KASSERT(next != NULL); 687 cur = next; 688 689 cur->td.td_flags = tdflags; 690 cur->td.td_cbp = 0; /* indicate 0 length packet */ 691 cur->td.td_nexttd = 0; 692 cur->td.td_be = ~0; 693 cur->nexttd = NULL; 694 cur->len = 0; 695 cur->flags = 0; 696 cur->xfer = xfer; 697 ohci_hash_add_td(sc, cur); 698 699 DPRINTFN(2, "add 0 xfer", 0, 0, 0, 0); 700 } 701 702 /* Last TD gets usb_syncmem'ed by caller */ 703 *ep = cur; 704 } 705 706 ohci_soft_itd_t * 707 ohci_alloc_sitd(ohci_softc_t *sc) 708 { 709 ohci_soft_itd_t *sitd; 710 usbd_status err; 711 int i, offs; 712 usb_dma_t dma; 713 714 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 715 716 mutex_enter(&sc->sc_lock); 717 if (sc->sc_freeitds == NULL) { 718 DPRINTFN(2, "allocating chunk", 0, 0, 0, 0); 719 mutex_exit(&sc->sc_lock); 720 721 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK, 722 OHCI_ITD_ALIGN, &dma); 723 if (err) 724 return NULL; 725 mutex_enter(&sc->sc_lock); 726 for (i = 0; i < OHCI_SITD_CHUNK; i++) { 727 offs = i * OHCI_SITD_SIZE; 728 sitd = KERNADDR(&dma, offs); 729 sitd->physaddr = DMAADDR(&dma, offs); 730 sitd->dma = dma; 731 sitd->offs = offs; 732 sitd->nextitd = sc->sc_freeitds; 733 sc->sc_freeitds = sitd; 734 } 735 } 736 737 sitd = sc->sc_freeitds; 738 sc->sc_freeitds = sitd->nextitd; 739 mutex_exit(&sc->sc_lock); 740 741 memset(&sitd->itd, 0, sizeof(ohci_itd_t)); 742 sitd->nextitd = NULL; 743 sitd->xfer = NULL; 744 745 #ifdef DIAGNOSTIC 746 sitd->isdone = true; 747 #endif 748 749 return sitd; 750 } 751 752 Static void 753 ohci_free_sitd_locked(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 754 { 755 756 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 757 DPRINTFN(10, "sitd=%p", sitd, 0, 0, 0); 758 759 KASSERT(sitd->isdone); 760 #ifdef DIAGNOSTIC 761 /* Warn double free */ 762 sitd->isdone = false; 763 #endif 764 765 sitd->nextitd = sc->sc_freeitds; 766 sc->sc_freeitds = sitd; 767 } 768 769 void 770 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 771 { 772 773 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 774 775 mutex_enter(&sc->sc_lock); 776 ohci_free_sitd_locked(sc, sitd); 777 mutex_exit(&sc->sc_lock); 778 } 779 780 int 781 ohci_init(ohci_softc_t *sc) 782 { 783 ohci_soft_ed_t *sed, *psed; 784 usbd_status err; 785 int i; 786 uint32_t s, ctl, rwc, ival, hcr, fm, per, rev, desca /*, descb */; 787 788 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 789 790 aprint_normal_dev(sc->sc_dev, ""); 791 792 sc->sc_hcca = NULL; 793 callout_init(&sc->sc_tmo_rhsc, CALLOUT_MPSAFE); 794 795 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_SOFTUSB); 796 mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_USB); 797 cv_init(&sc->sc_softwake_cv, "ohciab"); 798 799 sc->sc_rhsc_si = softint_establish(SOFTINT_USB | SOFTINT_MPSAFE, 800 ohci_rhsc_softint, sc); 801 802 for (i = 0; i < OHCI_HASH_SIZE; i++) 803 LIST_INIT(&sc->sc_hash_tds[i]); 804 for (i = 0; i < OHCI_HASH_SIZE; i++) 805 LIST_INIT(&sc->sc_hash_itds[i]); 806 807 TAILQ_INIT(&sc->sc_abortingxfers); 808 809 sc->sc_xferpool = pool_cache_init(sizeof(struct ohci_xfer), 0, 0, 0, 810 "ohcixfer", NULL, IPL_USB, NULL, NULL, NULL); 811 812 rev = OREAD4(sc, OHCI_REVISION); 813 aprint_normal("OHCI version %d.%d%s\n", 814 OHCI_REV_HI(rev), OHCI_REV_LO(rev), 815 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 816 817 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 818 aprint_error_dev(sc->sc_dev, "unsupported OHCI revision\n"); 819 sc->sc_bus.ub_revision = USBREV_UNKNOWN; 820 return -1; 821 } 822 sc->sc_bus.ub_revision = USBREV_1_0; 823 sc->sc_bus.ub_usedma = true; 824 825 /* XXX determine alignment by R/W */ 826 /* Allocate the HCCA area. */ 827 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 828 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 829 if (err) { 830 sc->sc_hcca = NULL; 831 return err; 832 } 833 sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0); 834 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 835 836 sc->sc_eintrs = OHCI_NORMAL_INTRS; 837 838 /* Allocate dummy ED that starts the control list. */ 839 sc->sc_ctrl_head = ohci_alloc_sed(sc); 840 if (sc->sc_ctrl_head == NULL) { 841 err = ENOMEM; 842 goto bad1; 843 } 844 sc->sc_ctrl_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 845 846 /* Allocate dummy ED that starts the bulk list. */ 847 sc->sc_bulk_head = ohci_alloc_sed(sc); 848 if (sc->sc_bulk_head == NULL) { 849 err = ENOMEM; 850 goto bad2; 851 } 852 sc->sc_bulk_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 853 usb_syncmem(&sc->sc_bulk_head->dma, sc->sc_bulk_head->offs, 854 sizeof(sc->sc_bulk_head->ed), 855 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 856 857 /* Allocate dummy ED that starts the isochronous list. */ 858 sc->sc_isoc_head = ohci_alloc_sed(sc); 859 if (sc->sc_isoc_head == NULL) { 860 err = ENOMEM; 861 goto bad3; 862 } 863 sc->sc_isoc_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 864 usb_syncmem(&sc->sc_isoc_head->dma, sc->sc_isoc_head->offs, 865 sizeof(sc->sc_isoc_head->ed), 866 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 867 868 /* Allocate all the dummy EDs that make up the interrupt tree. */ 869 for (i = 0; i < OHCI_NO_EDS; i++) { 870 sed = ohci_alloc_sed(sc); 871 if (sed == NULL) { 872 while (--i >= 0) 873 ohci_free_sed(sc, sc->sc_eds[i]); 874 err = ENOMEM; 875 goto bad4; 876 } 877 /* All ED fields are set to 0. */ 878 sc->sc_eds[i] = sed; 879 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 880 if (i != 0) 881 psed = sc->sc_eds[(i-1) / 2]; 882 else 883 psed= sc->sc_isoc_head; 884 sed->next = psed; 885 sed->ed.ed_nexted = HTOO32(psed->physaddr); 886 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 887 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 888 } 889 /* 890 * Fill HCCA interrupt table. The bit reversal is to get 891 * the tree set up properly to spread the interrupts. 892 */ 893 for (i = 0; i < OHCI_NO_INTRS; i++) 894 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 895 HTOO32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 896 usb_syncmem(&sc->sc_hccadma, 0, OHCI_HCCA_SIZE, 897 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 898 899 #ifdef OHCI_DEBUG 900 DPRINTFN(15, "--- dump start ---", 0, 0, 0 ,0); 901 if (ohcidebug >= 15) { 902 for (i = 0; i < OHCI_NO_EDS; i++) { 903 DPRINTFN(15, "ed#%d ", i, 0, 0, 0); 904 ohci_dump_ed(sc, sc->sc_eds[i]); 905 } 906 DPRINTFN(15, "iso", 0, 0, 0 ,0); 907 ohci_dump_ed(sc, sc->sc_isoc_head); 908 } 909 DPRINTFN(15, "--- dump end ---", 0, 0, 0 ,0); 910 #endif 911 912 /* Preserve values programmed by SMM/BIOS but lost over reset. */ 913 ctl = OREAD4(sc, OHCI_CONTROL); 914 rwc = ctl & OHCI_RWC; 915 fm = OREAD4(sc, OHCI_FM_INTERVAL); 916 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 917 /* descb = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); */ 918 919 /* Determine in what context we are running. */ 920 if (ctl & OHCI_IR) { 921 /* SMM active, request change */ 922 DPRINTF("SMM active, request owner change", 0, 0, 0, 0); 923 if ((sc->sc_intre & (OHCI_OC | OHCI_MIE)) == 924 (OHCI_OC | OHCI_MIE)) 925 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_MIE); 926 s = OREAD4(sc, OHCI_COMMAND_STATUS); 927 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 928 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 929 usb_delay_ms(&sc->sc_bus, 1); 930 ctl = OREAD4(sc, OHCI_CONTROL); 931 } 932 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_MIE); 933 if ((ctl & OHCI_IR) == 0) { 934 aprint_error_dev(sc->sc_dev, 935 "SMM does not respond, resetting\n"); 936 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 937 goto reset; 938 } 939 #if 0 940 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */ 941 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 942 /* BIOS started controller. */ 943 DPRINTF("BIOS active", 0, 0, 0, 0); 944 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 945 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL | rwc); 946 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 947 } 948 #endif 949 } else { 950 DPRINTF("cold started", 0 ,0 ,0 ,0); 951 reset: 952 /* Controller was cold started. */ 953 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 954 } 955 956 /* 957 * This reset should not be necessary according to the OHCI spec, but 958 * without it some controllers do not start. 959 */ 960 DPRINTF("sc %p: resetting", sc, 0, 0, 0); 961 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 962 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 963 964 /* We now own the host controller and the bus has been reset. */ 965 966 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 967 /* Nominal time for a reset is 10 us. */ 968 for (i = 0; i < 10; i++) { 969 delay(10); 970 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 971 if (!hcr) 972 break; 973 } 974 if (hcr) { 975 aprint_error_dev(sc->sc_dev, "reset timeout\n"); 976 err = EIO; 977 goto bad5; 978 } 979 #ifdef OHCI_DEBUG 980 if (ohcidebug >= 15) 981 ohci_dumpregs(sc); 982 #endif 983 984 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 985 986 /* Set up HC registers. */ 987 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 988 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 989 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 990 /* disable all interrupts and then switch on all desired interrupts */ 991 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 992 /* switch on desired functional features */ 993 ctl = OREAD4(sc, OHCI_CONTROL); 994 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 995 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 996 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL | rwc; 997 /* And finally start it! */ 998 OWRITE4(sc, OHCI_CONTROL, ctl); 999 1000 /* 1001 * The controller is now OPERATIONAL. Set a some final 1002 * registers that should be set earlier, but that the 1003 * controller ignores when in the SUSPEND state. 1004 */ 1005 ival = OHCI_GET_IVAL(fm); 1006 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 1007 fm |= OHCI_FSMPS(ival) | ival; 1008 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 1009 per = OHCI_PERIODIC(ival); /* 90% periodic */ 1010 OWRITE4(sc, OHCI_PERIODIC_START, per); 1011 1012 if (sc->sc_flags & OHCIF_SUPERIO) { 1013 /* no overcurrent protection */ 1014 desca |= OHCI_NOCP; 1015 /* 1016 * Clear NoPowerSwitching and PowerOnToPowerGoodTime meaning 1017 * that 1018 * - ports are always power switched 1019 * - don't wait for powered root hub port 1020 */ 1021 desca &= ~(__SHIFTIN(0xff, OHCI_POTPGT_MASK) | OHCI_NPS); 1022 } 1023 1024 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */ 1025 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP); 1026 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 1027 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY); 1028 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca); 1029 1030 /* 1031 * The AMD756 requires a delay before re-reading the register, 1032 * otherwise it will occasionally report 0 ports. 1033 */ 1034 sc->sc_noport = 0; 1035 for (i = 0; i < 10 && sc->sc_noport == 0; i++) { 1036 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY); 1037 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 1038 } 1039 1040 #ifdef OHCI_DEBUG 1041 if (ohcidebug >= 5) 1042 ohci_dumpregs(sc); 1043 #endif 1044 1045 /* Set up the bus struct. */ 1046 sc->sc_bus.ub_methods = &ohci_bus_methods; 1047 sc->sc_bus.ub_pipesize = sizeof(struct ohci_pipe); 1048 1049 sc->sc_control = sc->sc_intre = 0; 1050 1051 /* Finally, turn on interrupts. */ 1052 DPRINTF("enabling %#x", sc->sc_eintrs | OHCI_MIE, 0, 0, 0); 1053 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 1054 1055 return 0; 1056 1057 bad5: 1058 for (i = 0; i < OHCI_NO_EDS; i++) 1059 ohci_free_sed(sc, sc->sc_eds[i]); 1060 bad4: 1061 ohci_free_sed(sc, sc->sc_isoc_head); 1062 bad3: 1063 ohci_free_sed(sc, sc->sc_bulk_head); 1064 bad2: 1065 ohci_free_sed(sc, sc->sc_ctrl_head); 1066 bad1: 1067 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 1068 sc->sc_hcca = NULL; 1069 return err; 1070 } 1071 1072 struct usbd_xfer * 1073 ohci_allocx(struct usbd_bus *bus, unsigned int nframes) 1074 { 1075 ohci_softc_t *sc = OHCI_BUS2SC(bus); 1076 struct usbd_xfer *xfer; 1077 1078 xfer = pool_cache_get(sc->sc_xferpool, PR_NOWAIT); 1079 if (xfer != NULL) { 1080 memset(xfer, 0, sizeof(struct ohci_xfer)); 1081 #ifdef DIAGNOSTIC 1082 xfer->ux_state = XFER_BUSY; 1083 #endif 1084 } 1085 return xfer; 1086 } 1087 1088 void 1089 ohci_freex(struct usbd_bus *bus, struct usbd_xfer *xfer) 1090 { 1091 ohci_softc_t *sc = OHCI_BUS2SC(bus); 1092 1093 KASSERTMSG(xfer->ux_state == XFER_BUSY, 1094 "xfer=%p not busy, 0x%08x\n", xfer, xfer->ux_state); 1095 #ifdef DIAGNOSTIC 1096 xfer->ux_state = XFER_FREE; 1097 #endif 1098 pool_cache_put(sc->sc_xferpool, xfer); 1099 } 1100 1101 Static void 1102 ohci_get_lock(struct usbd_bus *bus, kmutex_t **lock) 1103 { 1104 ohci_softc_t *sc = OHCI_BUS2SC(bus); 1105 1106 *lock = &sc->sc_lock; 1107 } 1108 1109 /* 1110 * Shut down the controller when the system is going down. 1111 */ 1112 bool 1113 ohci_shutdown(device_t self, int flags) 1114 { 1115 ohci_softc_t *sc = device_private(self); 1116 1117 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1118 1119 DPRINTF("stopping the HC", 0, 0, 0, 0); 1120 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1121 return true; 1122 } 1123 1124 bool 1125 ohci_resume(device_t dv, const pmf_qual_t *qual) 1126 { 1127 ohci_softc_t *sc = device_private(dv); 1128 uint32_t ctl; 1129 1130 mutex_spin_enter(&sc->sc_intr_lock); 1131 sc->sc_bus.ub_usepolling++; 1132 mutex_spin_exit(&sc->sc_intr_lock); 1133 1134 /* Some broken BIOSes do not recover these values */ 1135 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 1136 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, 1137 sc->sc_ctrl_head->physaddr); 1138 OWRITE4(sc, OHCI_BULK_HEAD_ED, 1139 sc->sc_bulk_head->physaddr); 1140 if (sc->sc_intre) 1141 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_intre & 1142 (OHCI_ALL_INTRS | OHCI_MIE)); 1143 if (sc->sc_control) 1144 ctl = sc->sc_control; 1145 else 1146 ctl = OREAD4(sc, OHCI_CONTROL); 1147 ctl |= OHCI_HCFS_RESUME; 1148 OWRITE4(sc, OHCI_CONTROL, ctl); 1149 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 1150 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL; 1151 OWRITE4(sc, OHCI_CONTROL, ctl); 1152 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 1153 sc->sc_control = sc->sc_intre = 0; 1154 1155 mutex_spin_enter(&sc->sc_intr_lock); 1156 sc->sc_bus.ub_usepolling--; 1157 mutex_spin_exit(&sc->sc_intr_lock); 1158 1159 return true; 1160 } 1161 1162 bool 1163 ohci_suspend(device_t dv, const pmf_qual_t *qual) 1164 { 1165 ohci_softc_t *sc = device_private(dv); 1166 uint32_t ctl; 1167 1168 mutex_spin_enter(&sc->sc_intr_lock); 1169 sc->sc_bus.ub_usepolling++; 1170 mutex_spin_exit(&sc->sc_intr_lock); 1171 1172 ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK; 1173 if (sc->sc_control == 0) { 1174 /* 1175 * Preserve register values, in case that BIOS 1176 * does not recover them. 1177 */ 1178 sc->sc_control = ctl; 1179 sc->sc_intre = OREAD4(sc, 1180 OHCI_INTERRUPT_ENABLE); 1181 } 1182 ctl |= OHCI_HCFS_SUSPEND; 1183 OWRITE4(sc, OHCI_CONTROL, ctl); 1184 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1185 1186 mutex_spin_enter(&sc->sc_intr_lock); 1187 sc->sc_bus.ub_usepolling--; 1188 mutex_spin_exit(&sc->sc_intr_lock); 1189 1190 return true; 1191 } 1192 1193 #ifdef OHCI_DEBUG 1194 void 1195 ohci_dumpregs(ohci_softc_t *sc) 1196 { 1197 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1198 1199 DPRINTF("rev=0x%08x control=0x%08x command=0x%08x", 1200 OREAD4(sc, OHCI_REVISION), 1201 OREAD4(sc, OHCI_CONTROL), 1202 OREAD4(sc, OHCI_COMMAND_STATUS), 0); 1203 DPRINTF(" intrstat=0x%08x intre=0x%08x intrd=0x%08x", 1204 OREAD4(sc, OHCI_INTERRUPT_STATUS), 1205 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 1206 OREAD4(sc, OHCI_INTERRUPT_DISABLE), 0); 1207 DPRINTF(" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x", 1208 OREAD4(sc, OHCI_HCCA), 1209 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 1210 OREAD4(sc, OHCI_CONTROL_HEAD_ED), 0); 1211 DPRINTF(" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x", 1212 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 1213 OREAD4(sc, OHCI_BULK_HEAD_ED), 1214 OREAD4(sc, OHCI_BULK_CURRENT_ED) ,0); 1215 DPRINTF(" done=0x%08x fmival=0x%08x fmrem=0x%08x", 1216 OREAD4(sc, OHCI_DONE_HEAD), 1217 OREAD4(sc, OHCI_FM_INTERVAL), 1218 OREAD4(sc, OHCI_FM_REMAINING), 0); 1219 DPRINTF(" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x", 1220 OREAD4(sc, OHCI_FM_NUMBER), 1221 OREAD4(sc, OHCI_PERIODIC_START), 1222 OREAD4(sc, OHCI_LS_THRESHOLD), 0); 1223 DPRINTF(" desca=0x%08x descb=0x%08x stat=0x%08x", 1224 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 1225 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 1226 OREAD4(sc, OHCI_RH_STATUS), 0); 1227 DPRINTF(" port1=0x%08x port2=0x%08x", 1228 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 1229 OREAD4(sc, OHCI_RH_PORT_STATUS(2)), 0, 0); 1230 DPRINTF(" HCCA: frame_number=0x%04x done_head=0x%08x", 1231 O32TOH(sc->sc_hcca->hcca_frame_number), 1232 O32TOH(sc->sc_hcca->hcca_done_head), 0, 0); 1233 } 1234 #endif 1235 1236 Static int ohci_intr1(ohci_softc_t *); 1237 1238 int 1239 ohci_intr(void *p) 1240 { 1241 ohci_softc_t *sc = p; 1242 int ret = 0; 1243 1244 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1245 1246 if (sc == NULL) 1247 return 0; 1248 1249 mutex_spin_enter(&sc->sc_intr_lock); 1250 1251 if (sc->sc_dying || !device_has_power(sc->sc_dev)) 1252 goto done; 1253 1254 /* If we get an interrupt while polling, then just ignore it. */ 1255 if (sc->sc_bus.ub_usepolling) { 1256 DPRINTFN(16, "ignored interrupt while polling", 0, 0, 0, 0); 1257 /* for level triggered intrs, should do something to ack */ 1258 OWRITE4(sc, OHCI_INTERRUPT_STATUS, 1259 OREAD4(sc, OHCI_INTERRUPT_STATUS)); 1260 1261 goto done; 1262 } 1263 1264 ret = ohci_intr1(sc); 1265 1266 done: 1267 mutex_spin_exit(&sc->sc_intr_lock); 1268 return ret; 1269 } 1270 1271 Static int 1272 ohci_intr1(ohci_softc_t *sc) 1273 { 1274 uint32_t intrs, eintrs; 1275 1276 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1277 1278 /* In case the interrupt occurs before initialization has completed. */ 1279 if (sc == NULL || sc->sc_hcca == NULL) { 1280 #ifdef DIAGNOSTIC 1281 printf("ohci_intr: sc->sc_hcca == NULL\n"); 1282 #endif 1283 return 0; 1284 } 1285 1286 KASSERT(mutex_owned(&sc->sc_intr_lock)); 1287 1288 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1289 if (!intrs) 1290 return 0; 1291 1292 /* Acknowledge */ 1293 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs & ~(OHCI_MIE|OHCI_WDH)); 1294 eintrs = intrs & sc->sc_eintrs; 1295 DPRINTFN(7, "sc=%p", sc, 0, 0, 0); 1296 DPRINTFN(7, "intrs=%#x(%#x) eintrs=%#x(%#x)", 1297 intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), eintrs, 1298 sc->sc_eintrs); 1299 1300 if (!eintrs) { 1301 return 0; 1302 } 1303 1304 if (eintrs & OHCI_SO) { 1305 sc->sc_overrun_cnt++; 1306 if (usbd_ratecheck(&sc->sc_overrun_ntc)) { 1307 printf("%s: %u scheduling overruns\n", 1308 device_xname(sc->sc_dev), sc->sc_overrun_cnt); 1309 sc->sc_overrun_cnt = 0; 1310 } 1311 /* XXX do what */ 1312 eintrs &= ~OHCI_SO; 1313 } 1314 if (eintrs & OHCI_WDH) { 1315 /* 1316 * We block the interrupt below, and reenable it later from 1317 * ohci_softintr(). 1318 */ 1319 usb_schedsoftintr(&sc->sc_bus); 1320 } 1321 if (eintrs & OHCI_RD) { 1322 DPRINTFN(5, "resume detect", sc, 0, 0, 0); 1323 printf("%s: resume detect\n", device_xname(sc->sc_dev)); 1324 /* XXX process resume detect */ 1325 } 1326 if (eintrs & OHCI_UE) { 1327 DPRINTFN(5, "unrecoverable error", sc, 0, 0, 0); 1328 printf("%s: unrecoverable error, controller halted\n", 1329 device_xname(sc->sc_dev)); 1330 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1331 /* XXX what else */ 1332 } 1333 if (eintrs & OHCI_RHSC) { 1334 /* 1335 * We block the interrupt below, and reenable it later from 1336 * a timeout. 1337 */ 1338 softint_schedule(sc->sc_rhsc_si); 1339 } 1340 if (eintrs & OHCI_SF) { 1341 struct ohci_xfer *ox, *tmp; 1342 TAILQ_FOREACH_SAFE(ox, &sc->sc_abortingxfers, ox_abnext, tmp) { 1343 DPRINTFN(10, "SF %p xfer %p", sc, ox, 0, 0); 1344 ox->ox_abintrs &= ~OHCI_SF; 1345 KASSERT(ox->ox_abintrs == 0); 1346 TAILQ_REMOVE(&sc->sc_abortingxfers, ox, ox_abnext); 1347 } 1348 cv_broadcast(&sc->sc_softwake_cv); 1349 1350 KASSERT(TAILQ_EMPTY(&sc->sc_abortingxfers)); 1351 DPRINTFN(10, "end SOF %p", sc, 0, 0, 0); 1352 /* Don't remove OHIC_SF from eintrs so it is blocked below */ 1353 } 1354 1355 if (eintrs != 0) { 1356 /* Block unprocessed interrupts. */ 1357 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs); 1358 sc->sc_eintrs &= ~eintrs; 1359 DPRINTF("sc %p blocking/removing intrs 0x%x", sc, eintrs, 0, 0); 1360 } 1361 1362 return 1; 1363 } 1364 1365 void 1366 ohci_rhsc_enable(void *v_sc) 1367 { 1368 ohci_softc_t *sc = v_sc; 1369 1370 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1371 DPRINTF("sc %p", sc, 0, 0, 0); 1372 mutex_spin_enter(&sc->sc_intr_lock); 1373 sc->sc_eintrs |= OHCI_RHSC; 1374 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1375 mutex_spin_exit(&sc->sc_intr_lock); 1376 } 1377 1378 #ifdef OHCI_DEBUG 1379 const char *ohci_cc_strs[] = { 1380 "NO_ERROR", 1381 "CRC", 1382 "BIT_STUFFING", 1383 "DATA_TOGGLE_MISMATCH", 1384 "STALL", 1385 "DEVICE_NOT_RESPONDING", 1386 "PID_CHECK_FAILURE", 1387 "UNEXPECTED_PID", 1388 "DATA_OVERRUN", 1389 "DATA_UNDERRUN", 1390 "BUFFER_OVERRUN", 1391 "BUFFER_UNDERRUN", 1392 "reserved", 1393 "reserved", 1394 "NOT_ACCESSED", 1395 "NOT_ACCESSED", 1396 }; 1397 #endif 1398 1399 void 1400 ohci_softintr(void *v) 1401 { 1402 struct usbd_bus *bus = v; 1403 ohci_softc_t *sc = OHCI_BUS2SC(bus); 1404 ohci_soft_itd_t *sitd, *sidone, *sitdnext; 1405 ohci_soft_td_t *std, *sdone, *stdnext; 1406 struct usbd_xfer *xfer; 1407 struct ohci_pipe *opipe; 1408 int len, cc; 1409 int i, j, actlen, iframes, uedir; 1410 ohci_physaddr_t done = 0; 1411 bool polling = sc->sc_bus.ub_usepolling; 1412 1413 KASSERT(polling || mutex_owned(&sc->sc_lock)); 1414 1415 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1416 1417 /* 1418 * Only read hccadone if WDH is set - we might get here from places 1419 * other than an interrupt 1420 */ 1421 if (!(OREAD4(sc, OHCI_INTERRUPT_STATUS) & OHCI_WDH)) { 1422 DPRINTFN(10, "no WDH %p", sc, 0, 0, 0); 1423 return; 1424 } 1425 1426 DPRINTFN(10, "WDH %p", sc, 0, 0, 0); 1427 usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head), 1428 sizeof(sc->sc_hcca->hcca_done_head), 1429 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1430 done = O32TOH(sc->sc_hcca->hcca_done_head) & ~OHCI_DONE_INTRS; 1431 sc->sc_hcca->hcca_done_head = 0; 1432 usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head), 1433 sizeof(sc->sc_hcca->hcca_done_head), 1434 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1435 OWRITE4(sc, OHCI_INTERRUPT_STATUS, OHCI_WDH); 1436 sc->sc_eintrs |= OHCI_WDH; 1437 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_WDH); 1438 1439 /* Reverse the done list. */ 1440 for (sdone = NULL, sidone = NULL; done != 0; ) { 1441 std = ohci_hash_find_td(sc, done); 1442 if (std != NULL) { 1443 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 1444 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1445 std->dnext = sdone; 1446 done = O32TOH(std->td.td_nexttd); 1447 sdone = std; 1448 DPRINTFN(10, "add TD %p", std, 0, 0, 0); 1449 continue; 1450 } 1451 sitd = ohci_hash_find_itd(sc, done); 1452 if (sitd != NULL) { 1453 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 1454 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1455 sitd->dnext = sidone; 1456 done = O32TOH(sitd->itd.itd_nextitd); 1457 sidone = sitd; 1458 DPRINTFN(5, "add ITD %p", sitd, 0, 0, 0); 1459 continue; 1460 } 1461 DPRINTFN(10, "addr %p not found", done, 0, 0, 0); 1462 device_printf(sc->sc_dev, "WARNING: addr 0x%08lx not found\n", 1463 (u_long)done); 1464 break; 1465 } 1466 1467 DPRINTFN(10, "sdone=%p sidone=%p", sdone, sidone, 0, 0); 1468 DPRINTFN(10, "--- TD dump start ---", 0, 0, 0, 0); 1469 #ifdef OHCI_DEBUG 1470 if (ohcidebug >= 10) { 1471 for (std = sdone; std; std = std->dnext) 1472 ohci_dump_td(sc, std); 1473 } 1474 #endif 1475 DPRINTFN(10, "--- TD dump end ---", 0, 0, 0, 0); 1476 1477 for (std = sdone; std; std = stdnext) { 1478 xfer = std->xfer; 1479 stdnext = std->dnext; 1480 DPRINTFN(10, "std=%p xfer=%p hcpriv=%p dnext=%p", std, xfer, 1481 xfer ? xfer->ux_hcpriv : 0, stdnext); 1482 if (xfer == NULL) { 1483 /* 1484 * xfer == NULL: There seems to be no xfer associated 1485 * with this TD. It is tailp that happened to end up on 1486 * the done queue. 1487 * Shouldn't happen, but some chips are broken(?). 1488 */ 1489 continue; 1490 } 1491 if (std->held == NULL) { 1492 DPRINTFN(10, "std=%p held is null", std, 0, 0, 0); 1493 ohci_hash_rem_td(sc, std); 1494 ohci_free_std_locked(sc, std); 1495 continue; 1496 } 1497 /* 1498 * Make sure the timeout handler didn't run or ran to the end 1499 * and set the transfer status. 1500 */ 1501 callout_halt(&xfer->ux_callout, polling ? NULL : &sc->sc_lock); 1502 1503 if (xfer->ux_status == USBD_CANCELLED || 1504 xfer->ux_status == USBD_TIMEOUT) { 1505 DPRINTF("cancel/timeout %p", xfer, 0, 0, 0); 1506 1507 /* Handled by abort routine. */ 1508 continue; 1509 } 1510 1511 len = std->len; 1512 if (std->td.td_cbp != 0) 1513 len -= O32TOH(std->td.td_be) - 1514 O32TOH(std->td.td_cbp) + 1; 1515 DPRINTFN(10, "len=%d, flags=0x%x", len, std->flags, 0, 0); 1516 if (std->flags & OHCI_ADD_LEN) 1517 xfer->ux_actlen += len; 1518 1519 cc = OHCI_TD_GET_CC(O32TOH(std->td.td_flags)); 1520 if (cc == OHCI_CC_NO_ERROR) { 1521 ohci_hash_rem_td(sc, std); 1522 if (std->flags & OHCI_CALL_DONE) { 1523 xfer->ux_status = USBD_NORMAL_COMPLETION; 1524 usb_transfer_complete(xfer); 1525 } 1526 } else { 1527 /* 1528 * Endpoint is halted. First unlink all the TDs 1529 * belonging to the failed transfer, and then restart 1530 * the endpoint. 1531 */ 1532 ohci_soft_td_t *p, *n; 1533 opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 1534 1535 DPRINTFN(10, "error cc=%d", cc, 0, 0, 0); 1536 1537 /* remove xfer's TDs from the hash */ 1538 for (p = std; p->xfer == xfer; p = n) { 1539 n = p->nexttd; 1540 ohci_hash_rem_td(sc, p); 1541 } 1542 1543 ohci_soft_ed_t *sed = opipe->sed; 1544 1545 /* clear halt and TD chain */ 1546 sed->ed.ed_headp = HTOO32(p->physaddr); 1547 usb_syncmem(&sed->dma, 1548 sed->offs + offsetof(ohci_ed_t, ed_headp), 1549 sizeof(sed->ed.ed_headp), 1550 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1551 1552 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1553 1554 if (cc == OHCI_CC_DATA_UNDERRUN) 1555 xfer->ux_status = USBD_NORMAL_COMPLETION; 1556 else if (cc == OHCI_CC_STALL) 1557 xfer->ux_status = USBD_STALLED; 1558 else 1559 xfer->ux_status = USBD_IOERROR; 1560 usb_transfer_complete(xfer); 1561 } 1562 } 1563 DPRINTFN(10, "--- ITD dump start ---", 0, 0, 0, 0); 1564 #ifdef OHCI_DEBUG 1565 if (ohcidebug >= 10) { 1566 for (sitd = sidone; sitd; sitd = sitd->dnext) 1567 ohci_dump_itd(sc, sitd); 1568 } 1569 #endif 1570 DPRINTFN(10, "--- ITD dump end ---", 0, 0, 0, 0); 1571 1572 for (sitd = sidone; sitd != NULL; sitd = sitdnext) { 1573 xfer = sitd->xfer; 1574 sitdnext = sitd->dnext; 1575 DPRINTFN(1, "sitd=%p xfer=%p hcpriv=%p", sitd, xfer, 1576 xfer ? xfer->ux_hcpriv : 0, 0); 1577 if (xfer == NULL) 1578 continue; 1579 if (xfer->ux_status == USBD_CANCELLED || 1580 xfer->ux_status == USBD_TIMEOUT) { 1581 DPRINTF("cancel/timeout %p", xfer, 0, 0, 0); 1582 /* Handled by abort routine. */ 1583 continue; 1584 } 1585 KASSERT(!sitd->isdone); 1586 #ifdef DIAGNOSTIC 1587 sitd->isdone = true; 1588 #endif 1589 if (sitd->flags & OHCI_CALL_DONE) { 1590 ohci_soft_itd_t *next; 1591 1592 opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 1593 opipe->isoc.inuse -= xfer->ux_nframes; 1594 uedir = UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc-> 1595 bEndpointAddress); 1596 xfer->ux_status = USBD_NORMAL_COMPLETION; 1597 actlen = 0; 1598 for (i = 0, sitd = xfer->ux_hcpriv;; 1599 sitd = next) { 1600 next = sitd->nextitd; 1601 if (OHCI_ITD_GET_CC(O32TOH(sitd-> 1602 itd.itd_flags)) != OHCI_CC_NO_ERROR) 1603 xfer->ux_status = USBD_IOERROR; 1604 /* For input, update frlengths with actual */ 1605 /* XXX anything necessary for output? */ 1606 if (uedir == UE_DIR_IN && 1607 xfer->ux_status == USBD_NORMAL_COMPLETION) { 1608 iframes = OHCI_ITD_GET_FC(O32TOH( 1609 sitd->itd.itd_flags)); 1610 for (j = 0; j < iframes; i++, j++) { 1611 len = O16TOH(sitd-> 1612 itd.itd_offset[j]); 1613 if ((OHCI_ITD_PSW_GET_CC(len) & 1614 OHCI_CC_NOT_ACCESSED_MASK) 1615 == OHCI_CC_NOT_ACCESSED) 1616 len = 0; 1617 else 1618 len = OHCI_ITD_PSW_LENGTH(len); 1619 xfer->ux_frlengths[i] = len; 1620 actlen += len; 1621 } 1622 } 1623 if (sitd->flags & OHCI_CALL_DONE) 1624 break; 1625 ohci_hash_rem_itd(sc, sitd); 1626 1627 } 1628 ohci_hash_rem_itd(sc, sitd); 1629 if (uedir == UE_DIR_IN && 1630 xfer->ux_status == USBD_NORMAL_COMPLETION) 1631 xfer->ux_actlen = actlen; 1632 xfer->ux_hcpriv = NULL; 1633 1634 usb_transfer_complete(xfer); 1635 } 1636 } 1637 1638 DPRINTFN(10, "done", 0, 0, 0, 0); 1639 } 1640 1641 void 1642 ohci_device_ctrl_done(struct usbd_xfer *xfer) 1643 { 1644 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 1645 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 1646 int len = UGETW(xfer->ux_request.wLength); 1647 int isread = (xfer->ux_request.bmRequestType & UT_READ); 1648 1649 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1650 DPRINTFN(10, "xfer=%p", xfer, 0, 0, 0); 1651 1652 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1653 KASSERT(xfer->ux_rqflags & URQ_REQUEST); 1654 1655 if (len) 1656 usb_syncmem(&xfer->ux_dmabuf, 0, len, 1657 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1658 usb_syncmem(&opipe->ctrl.reqdma, 0, 1659 sizeof(usb_device_request_t), BUS_DMASYNC_POSTWRITE); 1660 } 1661 1662 void 1663 ohci_device_intr_done(struct usbd_xfer *xfer) 1664 { 1665 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 1666 int isread = 1667 (UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress) == UE_DIR_IN); 1668 1669 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1670 DPRINTFN(10, "xfer=%p, actlen=%d", xfer, xfer->ux_actlen, 0, 0); 1671 1672 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1673 1674 usb_syncmem(&xfer->ux_dmabuf, 0, xfer->ux_length, 1675 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1676 } 1677 1678 void 1679 ohci_device_bulk_done(struct usbd_xfer *xfer) 1680 { 1681 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 1682 1683 int isread = 1684 (UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress) == UE_DIR_IN); 1685 1686 KASSERT(mutex_owned(&sc->sc_lock)); 1687 1688 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1689 DPRINTFN(10, "xfer=%p, actlen=%d", xfer, xfer->ux_actlen, 0, 0); 1690 usb_syncmem(&xfer->ux_dmabuf, 0, xfer->ux_length, 1691 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1692 } 1693 1694 Static void 1695 ohci_rhsc_softint(void *arg) 1696 { 1697 ohci_softc_t *sc = arg; 1698 1699 mutex_enter(&sc->sc_lock); 1700 1701 ohci_rhsc(sc, sc->sc_intrxfer); 1702 1703 /* Do not allow RHSC interrupts > 1 per second */ 1704 callout_reset(&sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc); 1705 1706 mutex_exit(&sc->sc_lock); 1707 } 1708 1709 void 1710 ohci_rhsc(ohci_softc_t *sc, struct usbd_xfer *xfer) 1711 { 1712 u_char *p; 1713 int i, m; 1714 int hstatus __unused; 1715 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1716 1717 KASSERT(mutex_owned(&sc->sc_lock)); 1718 1719 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1720 DPRINTF("sc=%p xfer=%p hstatus=0x%08x", sc, xfer, hstatus, 0); 1721 1722 if (xfer == NULL) { 1723 /* Just ignore the change. */ 1724 return; 1725 } 1726 1727 p = xfer->ux_buf; 1728 m = min(sc->sc_noport, xfer->ux_length * 8 - 1); 1729 memset(p, 0, xfer->ux_length); 1730 for (i = 1; i <= m; i++) { 1731 /* Pick out CHANGE bits from the status reg. */ 1732 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1733 p[i/8] |= 1 << (i%8); 1734 } 1735 DPRINTF("change=0x%02x", *p, 0, 0, 0); 1736 xfer->ux_actlen = xfer->ux_length; 1737 xfer->ux_status = USBD_NORMAL_COMPLETION; 1738 1739 usb_transfer_complete(xfer); 1740 } 1741 1742 void 1743 ohci_root_intr_done(struct usbd_xfer *xfer) 1744 { 1745 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 1746 1747 KASSERT(mutex_owned(&sc->sc_lock)); 1748 1749 KASSERT(sc->sc_intrxfer == xfer); 1750 sc->sc_intrxfer = NULL; 1751 } 1752 1753 void 1754 ohci_poll(struct usbd_bus *bus) 1755 { 1756 ohci_softc_t *sc = OHCI_BUS2SC(bus); 1757 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1758 1759 #ifdef OHCI_DEBUG 1760 static int last; 1761 int new; 1762 new = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1763 if (new != last) { 1764 DPRINTFN(10, "intrs=0x%04x", new, 0, 0, 0); 1765 last = new; 1766 } 1767 #endif 1768 sc->sc_eintrs |= OHCI_WDH; 1769 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) { 1770 mutex_spin_enter(&sc->sc_intr_lock); 1771 ohci_intr1(sc); 1772 mutex_spin_exit(&sc->sc_intr_lock); 1773 } 1774 } 1775 1776 /* 1777 * Add an ED to the schedule. Called with USB lock held. 1778 */ 1779 Static void 1780 ohci_add_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1781 { 1782 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1783 DPRINTFN(8, "sed=%p head=%p", sed, head, 0, 0); 1784 1785 KASSERT(mutex_owned(&sc->sc_lock)); 1786 1787 usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted), 1788 sizeof(head->ed.ed_nexted), 1789 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1790 sed->next = head->next; 1791 sed->ed.ed_nexted = head->ed.ed_nexted; 1792 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted), 1793 sizeof(sed->ed.ed_nexted), 1794 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1795 head->next = sed; 1796 head->ed.ed_nexted = HTOO32(sed->physaddr); 1797 usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted), 1798 sizeof(head->ed.ed_nexted), 1799 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1800 } 1801 1802 /* 1803 * Remove an ED from the schedule. Called with USB lock held. 1804 */ 1805 Static void 1806 ohci_rem_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1807 { 1808 ohci_soft_ed_t *p; 1809 1810 KASSERT(mutex_owned(&sc->sc_lock)); 1811 1812 /* XXX */ 1813 for (p = head; p != NULL && p->next != sed; p = p->next) 1814 ; 1815 KASSERT(p != NULL); 1816 1817 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted), 1818 sizeof(sed->ed.ed_nexted), 1819 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1820 p->next = sed->next; 1821 p->ed.ed_nexted = sed->ed.ed_nexted; 1822 usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted), 1823 sizeof(p->ed.ed_nexted), 1824 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1825 } 1826 1827 /* 1828 * When a transfer is completed the TD is added to the done queue by 1829 * the host controller. This queue is the processed by software. 1830 * Unfortunately the queue contains the physical address of the TD 1831 * and we have no simple way to translate this back to a kernel address. 1832 * To make the translation possible (and fast) we use a hash table of 1833 * TDs currently in the schedule. The physical address is used as the 1834 * hash value. 1835 */ 1836 1837 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1838 /* Called with USB lock held. */ 1839 void 1840 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1841 { 1842 int h = HASH(std->physaddr); 1843 1844 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1845 1846 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1847 } 1848 1849 /* Called with USB lock held. */ 1850 void 1851 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1852 { 1853 1854 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1855 1856 LIST_REMOVE(std, hnext); 1857 } 1858 1859 ohci_soft_td_t * 1860 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a) 1861 { 1862 int h = HASH(a); 1863 ohci_soft_td_t *std; 1864 1865 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1866 std != NULL; 1867 std = LIST_NEXT(std, hnext)) 1868 if (std->physaddr == a) 1869 return std; 1870 return NULL; 1871 } 1872 1873 /* Called with USB lock held. */ 1874 void 1875 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1876 { 1877 int h = HASH(sitd->physaddr); 1878 1879 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1880 1881 KASSERT(mutex_owned(&sc->sc_lock)); 1882 1883 DPRINTFN(10, "sitd=%p physaddr=0x%08lx", sitd, (u_long)sitd->physaddr, 1884 0, 0); 1885 1886 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext); 1887 } 1888 1889 /* Called with USB lock held. */ 1890 void 1891 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1892 { 1893 1894 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1895 1896 KASSERT(mutex_owned(&sc->sc_lock)); 1897 1898 DPRINTFN(10, "sitd=%p physaddr=0x%08lx", sitd, (u_long)sitd->physaddr, 1899 0, 0); 1900 1901 LIST_REMOVE(sitd, hnext); 1902 } 1903 1904 ohci_soft_itd_t * 1905 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a) 1906 { 1907 int h = HASH(a); 1908 ohci_soft_itd_t *sitd; 1909 1910 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]); 1911 sitd != NULL; 1912 sitd = LIST_NEXT(sitd, hnext)) 1913 if (sitd->physaddr == a) 1914 return sitd; 1915 return NULL; 1916 } 1917 1918 void 1919 ohci_timeout(void *addr) 1920 { 1921 struct usbd_xfer *xfer = addr; 1922 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 1923 bool timeout = false; 1924 1925 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1926 DPRINTF("xfer=%p", xfer, 0, 0, 0); 1927 1928 mutex_enter(&sc->sc_lock); 1929 if (sc->sc_dying) { 1930 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1931 mutex_exit(&sc->sc_lock); 1932 return; 1933 } 1934 1935 if (xfer->ux_status != USBD_CANCELLED) { 1936 xfer->ux_status = USBD_TIMEOUT; 1937 timeout = true; 1938 } 1939 mutex_exit(&sc->sc_lock); 1940 1941 if (timeout) { 1942 /* Execute the abort in a process context. */ 1943 usb_init_task(&xfer->ux_aborttask, ohci_timeout_task, addr, 1944 USB_TASKQ_MPSAFE); 1945 usb_add_task(xfer->ux_pipe->up_dev, &xfer->ux_aborttask, 1946 USB_TASKQ_HC); 1947 } 1948 } 1949 1950 void 1951 ohci_timeout_task(void *addr) 1952 { 1953 struct usbd_xfer *xfer = addr; 1954 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 1955 1956 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1957 1958 DPRINTF("xfer=%p", xfer, 0, 0, 0); 1959 1960 mutex_enter(&sc->sc_lock); 1961 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1962 mutex_exit(&sc->sc_lock); 1963 } 1964 1965 #ifdef OHCI_DEBUG 1966 void 1967 ohci_dump_tds(ohci_softc_t *sc, ohci_soft_td_t *std) 1968 { 1969 for (; std; std = std->nexttd) { 1970 ohci_dump_td(sc, std); 1971 KASSERTMSG(std->nexttd == NULL || std != std->nexttd, 1972 "std %p next %p", std, std->nexttd); 1973 } 1974 } 1975 1976 void 1977 ohci_dump_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1978 { 1979 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1980 1981 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 1982 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1983 1984 uint32_t flags = O32TOH(std->td.td_flags); 1985 DPRINTF("TD(%p) at 0x%08lx:", std, (u_long)std->physaddr, 0, 0); 1986 DPRINTF(" round=%d DP=%x DI=%x T=%x", 1987 !!(flags & OHCI_TD_R), 1988 __SHIFTOUT(flags, OHCI_TD_DP_MASK), 1989 OHCI_TD_GET_DI(flags), 1990 __SHIFTOUT(flags, OHCI_TD_TOGGLE_MASK)); 1991 DPRINTF(" EC=%d CC=%d", OHCI_TD_GET_EC(flags), OHCI_TD_GET_CC(flags), 1992 0, 0); 1993 DPRINTF(" td_cbp=0x%08lx td_nexttd=0x%08lx td_be=0x%08lx", 1994 (u_long)O32TOH(std->td.td_cbp), 1995 (u_long)O32TOH(std->td.td_nexttd), 1996 (u_long)O32TOH(std->td.td_be), 0); 1997 } 1998 1999 void 2000 ohci_dump_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 2001 { 2002 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2003 2004 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 2005 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2006 2007 uint32_t flags = O32TOH(sitd->itd.itd_flags); 2008 DPRINTF("ITD(%p) at 0x%08lx", sitd, (u_long)sitd->physaddr, 0, 0); 2009 DPRINTF(" sf=%d di=%d fc=%d cc=%d", 2010 OHCI_ITD_GET_SF(flags), OHCI_ITD_GET_DI(flags), 2011 OHCI_ITD_GET_FC(flags), OHCI_ITD_GET_CC(flags)); 2012 DPRINTF(" bp0=0x%08x next=0x%08x be=0x%08x", 2013 O32TOH(sitd->itd.itd_bp0), 2014 O32TOH(sitd->itd.itd_nextitd), 2015 O32TOH(sitd->itd.itd_be), 0); 2016 CTASSERT(OHCI_ITD_NOFFSET == 8); 2017 DPRINTF(" offs[0] = 0x%04x offs[1] = 0x%04x " 2018 "offs[2] = 0x%04x offs[3] = 0x%04x", 2019 O16TOH(sitd->itd.itd_offset[0]), 2020 O16TOH(sitd->itd.itd_offset[1]), 2021 O16TOH(sitd->itd.itd_offset[2]), 2022 O16TOH(sitd->itd.itd_offset[3])); 2023 DPRINTF(" offs[4] = 0x%04x offs[5] = 0x%04x " 2024 "offs[6] = 0x%04x offs[7] = 0x%04x", 2025 O16TOH(sitd->itd.itd_offset[4]), 2026 O16TOH(sitd->itd.itd_offset[5]), 2027 O16TOH(sitd->itd.itd_offset[6]), 2028 O16TOH(sitd->itd.itd_offset[7])); 2029 } 2030 2031 void 2032 ohci_dump_itds(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 2033 { 2034 for (; sitd; sitd = sitd->nextitd) 2035 ohci_dump_itd(sc, sitd); 2036 } 2037 2038 void 2039 ohci_dump_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 2040 { 2041 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2042 2043 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 2044 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2045 2046 uint32_t flags = O32TOH(sed->ed.ed_flags); 2047 DPRINTF("ED(%p) at 0x%08lx:", sed, sed->physaddr, 0, 0); 2048 DPRINTF(" addr=%d endpt=%d maxp=%d", 2049 OHCI_ED_GET_FA(flags), 2050 OHCI_ED_GET_EN(flags), 2051 OHCI_ED_GET_MAXP(flags), 2052 0); 2053 DPRINTF(" dir=%d speed=%d skip=%d iso=%d", 2054 __SHIFTOUT(flags, OHCI_ED_DIR_MASK), 2055 !!(flags & OHCI_ED_SPEED), 2056 !!(flags & OHCI_ED_SKIP), 2057 !!(flags & OHCI_ED_FORMAT_ISO)); 2058 DPRINTF(" tailp=0x%08lx", (u_long)O32TOH(sed->ed.ed_tailp), 2059 0, 0, 0); 2060 DPRINTF(" headp=0x%08lx nexted=0x%08lx halted=%d carry=%d", 2061 O32TOH(sed->ed.ed_headp), O32TOH(sed->ed.ed_nexted), 2062 !!(O32TOH(sed->ed.ed_headp) & OHCI_HALTED), 2063 !!(O32TOH(sed->ed.ed_headp) & OHCI_TOGGLECARRY)); 2064 } 2065 #endif 2066 2067 usbd_status 2068 ohci_open(struct usbd_pipe *pipe) 2069 { 2070 struct usbd_device *dev = pipe->up_dev; 2071 struct usbd_bus *bus = dev->ud_bus; 2072 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 2073 usb_endpoint_descriptor_t *ed = pipe->up_endpoint->ue_edesc; 2074 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 2075 uint8_t addr = dev->ud_addr; 2076 uint8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 2077 ohci_soft_ed_t *sed; 2078 ohci_soft_td_t *std; 2079 ohci_soft_itd_t *sitd; 2080 ohci_physaddr_t tdphys; 2081 uint32_t fmt; 2082 usbd_status err = USBD_NOMEM; 2083 int ival; 2084 2085 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2086 DPRINTFN(1, "pipe=%p, addr=%d, endpt=%d (%d)", pipe, addr, 2087 ed->bEndpointAddress, bus->ub_rhaddr); 2088 2089 if (sc->sc_dying) { 2090 return USBD_IOERROR; 2091 } 2092 2093 std = NULL; 2094 sed = NULL; 2095 2096 if (addr == bus->ub_rhaddr) { 2097 switch (ed->bEndpointAddress) { 2098 case USB_CONTROL_ENDPOINT: 2099 pipe->up_methods = &roothub_ctrl_methods; 2100 break; 2101 case UE_DIR_IN | USBROOTHUB_INTR_ENDPT: 2102 pipe->up_methods = &ohci_root_intr_methods; 2103 break; 2104 default: 2105 err = USBD_INVAL; 2106 goto bad; 2107 } 2108 } else { 2109 sed = ohci_alloc_sed(sc); 2110 if (sed == NULL) 2111 goto bad; 2112 opipe->sed = sed; 2113 if (xfertype == UE_ISOCHRONOUS) { 2114 sitd = ohci_alloc_sitd(sc); 2115 if (sitd == NULL) 2116 goto bad; 2117 2118 opipe->tail.itd = sitd; 2119 sitd->held = &opipe->tail.itd; 2120 tdphys = sitd->physaddr; 2121 fmt = OHCI_ED_FORMAT_ISO; 2122 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 2123 fmt |= OHCI_ED_DIR_IN; 2124 else 2125 fmt |= OHCI_ED_DIR_OUT; 2126 } else { 2127 std = ohci_alloc_std(sc); 2128 if (std == NULL) 2129 goto bad; 2130 2131 opipe->tail.td = std; 2132 std->held = &opipe->tail.td; 2133 tdphys = std->physaddr; 2134 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD; 2135 } 2136 sed->ed.ed_flags = HTOO32( 2137 OHCI_ED_SET_FA(addr) | 2138 OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) | 2139 (dev->ud_speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) | 2140 fmt | 2141 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 2142 sed->ed.ed_headp = HTOO32(tdphys | 2143 (pipe->up_endpoint->ue_toggle ? OHCI_TOGGLECARRY : 0)); 2144 sed->ed.ed_tailp = HTOO32(tdphys); 2145 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 2146 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2147 2148 switch (xfertype) { 2149 case UE_CONTROL: 2150 pipe->up_methods = &ohci_device_ctrl_methods; 2151 err = usb_allocmem(&sc->sc_bus, 2152 sizeof(usb_device_request_t), 2153 0, &opipe->ctrl.reqdma); 2154 if (err) 2155 goto bad; 2156 mutex_enter(&sc->sc_lock); 2157 ohci_add_ed(sc, sed, sc->sc_ctrl_head); 2158 mutex_exit(&sc->sc_lock); 2159 break; 2160 case UE_INTERRUPT: 2161 pipe->up_methods = &ohci_device_intr_methods; 2162 ival = pipe->up_interval; 2163 if (ival == USBD_DEFAULT_INTERVAL) 2164 ival = ed->bInterval; 2165 err = ohci_device_setintr(sc, opipe, ival); 2166 if (err) 2167 goto bad; 2168 break; 2169 case UE_ISOCHRONOUS: 2170 pipe->up_serialise = false; 2171 pipe->up_methods = &ohci_device_isoc_methods; 2172 return ohci_setup_isoc(pipe); 2173 case UE_BULK: 2174 pipe->up_methods = &ohci_device_bulk_methods; 2175 mutex_enter(&sc->sc_lock); 2176 ohci_add_ed(sc, sed, sc->sc_bulk_head); 2177 mutex_exit(&sc->sc_lock); 2178 break; 2179 } 2180 } 2181 2182 return USBD_NORMAL_COMPLETION; 2183 2184 bad: 2185 if (std != NULL) { 2186 ohci_free_std(sc, std); 2187 } 2188 if (sed != NULL) 2189 ohci_free_sed(sc, sed); 2190 return err; 2191 2192 } 2193 2194 /* 2195 * Close a reqular pipe. 2196 * Assumes that there are no pending transactions. 2197 */ 2198 void 2199 ohci_close_pipe(struct usbd_pipe *pipe, ohci_soft_ed_t *head) 2200 { 2201 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 2202 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 2203 ohci_soft_ed_t *sed = opipe->sed; 2204 2205 KASSERT(mutex_owned(&sc->sc_lock)); 2206 2207 #ifdef DIAGNOSTIC 2208 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 2209 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2210 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) { 2211 ohci_soft_td_t *std; 2212 std = ohci_hash_find_td(sc, O32TOH(sed->ed.ed_headp)); 2213 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 2214 "tl=0x%x pipe=%p, std=%p\n", sed, 2215 (int)O32TOH(sed->ed.ed_headp), 2216 (int)O32TOH(sed->ed.ed_tailp), 2217 pipe, std); 2218 #ifdef OHCI_DEBUG 2219 usbd_dump_pipe(&opipe->pipe); 2220 ohci_dump_ed(sc, sed); 2221 if (std) 2222 ohci_dump_td(sc, std); 2223 #endif 2224 usb_delay_ms(&sc->sc_bus, 2); 2225 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2226 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) 2227 printf("ohci_close_pipe: pipe still not empty\n"); 2228 } 2229 #endif 2230 ohci_rem_ed(sc, sed, head); 2231 /* Make sure the host controller is not touching this ED */ 2232 usb_delay_ms(&sc->sc_bus, 1); 2233 pipe->up_endpoint->ue_toggle = 2234 (O32TOH(sed->ed.ed_headp) & OHCI_TOGGLECARRY) ? 1 : 0; 2235 ohci_free_sed_locked(sc, opipe->sed); 2236 } 2237 2238 /* 2239 * Cancel or timeout a device request. We have two cases to deal with 2240 * 2241 * 1) A driver wants to stop scheduled or inflight transfers 2242 * 2) A transfer has timed out 2243 * 2244 * It's impossible to guarantee that the requested transfer will not 2245 * have (partially) happened since the hardware runs concurrently. 2246 * 2247 * Transfer state is protected by the bus lock and we set the transfer status 2248 * as soon as either of the above happens (with bus lock held). 2249 * 2250 * Then we arrange for the hardware to tells us that it is not still 2251 * processing the TDs by setting the sKip bit and requesting a SOF interrupt 2252 * 2253 * Once we see the SOF interrupt we can check the transfer TDs/iTDs to see if 2254 * they've been processed and either 2255 * a) if they're unused recover them for later use, or 2256 * b) if they've been used allocate new TD/iTDs to replace those 2257 * used. The softint handler will free the old ones. 2258 */ 2259 void 2260 ohci_abort_xfer(struct usbd_xfer *xfer, usbd_status status) 2261 { 2262 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 2263 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2264 ohci_soft_ed_t *sed = opipe->sed; 2265 ohci_soft_td_t *p, *n; 2266 ohci_physaddr_t headp; 2267 int hit; 2268 int wake; 2269 2270 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2271 DPRINTF("xfer=%p pipe=%p sed=%p", xfer, opipe,sed, 0); 2272 2273 KASSERT(mutex_owned(&sc->sc_lock)); 2274 ASSERT_SLEEPABLE(); 2275 2276 if (sc->sc_dying) { 2277 /* If we're dying, just do the software part. */ 2278 xfer->ux_status = status; 2279 callout_halt(&xfer->ux_callout, &sc->sc_lock); 2280 usb_transfer_complete(xfer); 2281 return; 2282 } 2283 2284 /* 2285 * If an abort is already in progress then just wait for it to 2286 * complete and return. 2287 */ 2288 if (xfer->ux_hcflags & UXFER_ABORTING) { 2289 DPRINTFN(2, "already aborting", 0, 0, 0, 0); 2290 #ifdef DIAGNOSTIC 2291 if (status == USBD_TIMEOUT) 2292 printf("%s: TIMEOUT while aborting\n", __func__); 2293 #endif 2294 /* Override the status which might be USBD_TIMEOUT. */ 2295 xfer->ux_status = status; 2296 DPRINTFN(2, "waiting for abort to finish", 0, 0, 0, 0); 2297 xfer->ux_hcflags |= UXFER_ABORTWAIT; 2298 while (xfer->ux_hcflags & UXFER_ABORTING) 2299 cv_wait(&xfer->ux_hccv, &sc->sc_lock); 2300 goto done; 2301 } 2302 xfer->ux_hcflags |= UXFER_ABORTING; 2303 2304 /* 2305 * Step 1: When cancelling a transfer make sure the timeout handler 2306 * didn't run or ran to the end and saw the USBD_CANCELLED status. 2307 * Otherwise we must have got here via a timeout. 2308 */ 2309 if (status == USBD_CANCELLED) { 2310 xfer->ux_status = status; 2311 callout_halt(&xfer->ux_callout, &sc->sc_lock); 2312 } else { 2313 KASSERT(xfer->ux_status == USBD_TIMEOUT); 2314 } 2315 2316 /* 2317 * Step 2: Unless the endpoint is already halted, we set the endpoint 2318 * descriptor sKip bit and wait for hardware to complete processing. 2319 * 2320 * This includes ensuring that any TDs of the transfer that got onto 2321 * the done list are also removed. We ensure this by waiting for 2322 * both a WDH and SOF interrupt. 2323 */ 2324 DPRINTFN(1, "stop ed=%p", sed, 0, 0, 0); 2325 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2326 sizeof(sed->ed.ed_flags), 2327 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2328 if (!(sed->ed.ed_flags & OHCI_HALTED)) { 2329 /* force hardware skip */ 2330 DPRINTFN(1, "pausing ed=%p", sed, 0, 0, 0); 2331 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 2332 usb_syncmem(&sed->dma, 2333 sed->offs + offsetof(ohci_ed_t, ed_flags), 2334 sizeof(sed->ed.ed_flags), 2335 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2336 2337 DPRINTFN(10, "WDH %p xfer %p", sc, xfer, 0, 0); 2338 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 2339 ox->ox_abintrs = OHCI_SF; 2340 TAILQ_INSERT_TAIL(&sc->sc_abortingxfers, ox, ox_abnext); 2341 2342 OWRITE4(sc, OHCI_INTERRUPT_STATUS, OHCI_SF); 2343 sc->sc_eintrs |= OHCI_SF; 2344 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_SF); 2345 /* 2346 * Step 2: Wait until we know hardware has finished any possible 2347 * use of the xfer. 2348 */ 2349 while (ox->ox_abintrs != 0) { 2350 DPRINTFN(10, "WDH %p xfer %p intrs %#x", sc, xfer, 2351 ox->ox_abintrs, 0); 2352 cv_wait(&sc->sc_softwake_cv, &sc->sc_lock); 2353 } 2354 } else { 2355 DPRINTFN(1, "halted ed=%p", sed, 0, 0, 0); 2356 } 2357 2358 /* 2359 * Step 3: Remove any vestiges of the xfer from the hardware. 2360 * The complication here is that the hardware may have executed 2361 * beyond the xfer we're trying to abort. So as we're scanning 2362 * the TDs of this xfer we check if the hardware points to 2363 * any of them. 2364 */ 2365 p = xfer->ux_hcpriv; 2366 KASSERT(p); 2367 2368 #ifdef OHCI_DEBUG 2369 DPRINTF("--- dump start ---", 0, 0, 0, 0); 2370 2371 if (ohcidebug >= 2) { 2372 DPRINTF("sed:", 0, 0, 0, 0); 2373 ohci_dump_ed(sc, sed); 2374 ohci_dump_tds(sc, p); 2375 } 2376 DPRINTF("--- dump end ---", 0, 0, 0, 0); 2377 #endif 2378 2379 #define OHCI_CC_ACCESSED_P(x) \ 2380 (((x) & OHCI_CC_NOT_ACCESSED_MASK) != OHCI_CC_NOT_ACCESSED) 2381 2382 2383 headp = O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK; 2384 hit = 0; 2385 for (; p->xfer == xfer; p = n) { 2386 hit |= headp == p->physaddr; 2387 n = p->nexttd; 2388 2389 int cc = OHCI_TD_GET_CC(O32TOH(p->td.td_flags)); 2390 if (!OHCI_CC_ACCESSED_P(cc)) { 2391 ohci_hash_rem_td(sc, p); 2392 continue; 2393 } 2394 DPRINTFN(10, "std=%p has been touched by HC", p, 0, 0, 0); 2395 2396 mutex_exit(&sc->sc_lock); 2397 ohci_soft_td_t *std = ohci_alloc_std(sc); 2398 if (std == NULL) { 2399 /* XXX What to do??? */ 2400 panic("hmm"); 2401 } 2402 mutex_enter(&sc->sc_lock); 2403 2404 DPRINTFN(10, "new std=%p now held at %p", std, p->held, 0, 0); 2405 *(p->held) = std; 2406 std->held = p->held; 2407 std->xfer = xfer; 2408 p->held = NULL; 2409 } 2410 /* Zap headp register if hardware pointed inside the xfer. */ 2411 if (hit) { 2412 DPRINTFN(1, "set hd=0x%08x, tl=0x%08x", (int)p->physaddr, 2413 (int)O32TOH(sed->ed.ed_tailp), 0, 0); 2414 sed->ed.ed_headp = HTOO32(p->physaddr); /* unlink TDs */ 2415 usb_syncmem(&sed->dma, 2416 sed->offs + offsetof(ohci_ed_t, ed_headp), 2417 sizeof(sed->ed.ed_headp), 2418 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2419 } else { 2420 DPRINTFN(1, "no hit", 0, 0, 0, 0); 2421 } 2422 2423 /* 2424 * Step 4: Turn on hardware again. 2425 */ 2426 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2427 sizeof(sed->ed.ed_flags), 2428 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2429 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */ 2430 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2431 sizeof(sed->ed.ed_flags), 2432 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2433 2434 /* 2435 * Step 5: Execute callback. 2436 */ 2437 wake = xfer->ux_hcflags & UXFER_ABORTWAIT; 2438 xfer->ux_hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT); 2439 usb_transfer_complete(xfer); 2440 if (wake) 2441 cv_broadcast(&xfer->ux_hccv); 2442 2443 done: 2444 KASSERT(mutex_owned(&sc->sc_lock)); 2445 } 2446 2447 /* 2448 * Data structures and routines to emulate the root hub. 2449 */ 2450 Static int 2451 ohci_roothub_ctrl(struct usbd_bus *bus, usb_device_request_t *req, 2452 void *buf, int buflen) 2453 { 2454 ohci_softc_t *sc = OHCI_BUS2SC(bus); 2455 usb_port_status_t ps; 2456 uint16_t len, value, index; 2457 int l, totlen = 0; 2458 int port, i; 2459 uint32_t v; 2460 2461 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2462 2463 if (sc->sc_dying) 2464 return -1; 2465 2466 DPRINTFN(4, "type=0x%02x request=%02x", req->bmRequestType, 2467 req->bRequest, 0, 0); 2468 2469 len = UGETW(req->wLength); 2470 value = UGETW(req->wValue); 2471 index = UGETW(req->wIndex); 2472 2473 #define C(x,y) ((x) | ((y) << 8)) 2474 switch (C(req->bRequest, req->bmRequestType)) { 2475 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2476 DPRINTFN(8, "wValue=0x%04x", value, 0, 0, 0); 2477 if (len == 0) 2478 break; 2479 switch (value) { 2480 case C(0, UDESC_DEVICE): { 2481 usb_device_descriptor_t devd; 2482 2483 totlen = min(buflen, sizeof(devd)); 2484 memcpy(&devd, buf, totlen); 2485 USETW(devd.idVendor, sc->sc_id_vendor); 2486 memcpy(buf, &devd, totlen); 2487 break; 2488 } 2489 case C(1, UDESC_STRING): 2490 #define sd ((usb_string_descriptor_t *)buf) 2491 /* Vendor */ 2492 totlen = usb_makestrdesc(sd, len, sc->sc_vendor); 2493 break; 2494 case C(2, UDESC_STRING): 2495 /* Product */ 2496 totlen = usb_makestrdesc(sd, len, "OHCI root hub"); 2497 break; 2498 #undef sd 2499 default: 2500 /* default from usbroothub */ 2501 return buflen; 2502 } 2503 break; 2504 2505 /* Hub requests */ 2506 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2507 break; 2508 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2509 DPRINTFN(8, "UR_CLEAR_PORT_FEATURE port=%d feature=%d", 2510 index, value, 0, 0); 2511 if (index < 1 || index > sc->sc_noport) { 2512 return -1; 2513 } 2514 port = OHCI_RH_PORT_STATUS(index); 2515 switch(value) { 2516 case UHF_PORT_ENABLE: 2517 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2518 break; 2519 case UHF_PORT_SUSPEND: 2520 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2521 break; 2522 case UHF_PORT_POWER: 2523 /* Yes, writing to the LOW_SPEED bit clears power. */ 2524 OWRITE4(sc, port, UPS_LOW_SPEED); 2525 break; 2526 case UHF_C_PORT_CONNECTION: 2527 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2528 break; 2529 case UHF_C_PORT_ENABLE: 2530 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2531 break; 2532 case UHF_C_PORT_SUSPEND: 2533 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2534 break; 2535 case UHF_C_PORT_OVER_CURRENT: 2536 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2537 break; 2538 case UHF_C_PORT_RESET: 2539 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2540 break; 2541 default: 2542 return -1; 2543 } 2544 switch(value) { 2545 case UHF_C_PORT_CONNECTION: 2546 case UHF_C_PORT_ENABLE: 2547 case UHF_C_PORT_SUSPEND: 2548 case UHF_C_PORT_OVER_CURRENT: 2549 case UHF_C_PORT_RESET: 2550 /* Enable RHSC interrupt if condition is cleared. */ 2551 if ((OREAD4(sc, port) >> 16) == 0) 2552 ohci_rhsc_enable(sc); 2553 break; 2554 default: 2555 break; 2556 } 2557 break; 2558 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2559 if (len == 0) 2560 break; 2561 if ((value & 0xff) != 0) { 2562 return -1; 2563 } 2564 usb_hub_descriptor_t hubd; 2565 2566 totlen = min(buflen, sizeof(hubd)); 2567 memcpy(&hubd, buf, totlen); 2568 2569 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2570 hubd.bNbrPorts = sc->sc_noport; 2571 USETW(hubd.wHubCharacteristics, 2572 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2573 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2574 /* XXX overcurrent */ 2575 ); 2576 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2577 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2578 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2579 hubd.DeviceRemovable[i++] = (uint8_t)v; 2580 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2581 totlen = min(totlen, hubd.bDescLength); 2582 memcpy(buf, &hubd, totlen); 2583 break; 2584 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2585 if (len != 4) { 2586 return -1; 2587 } 2588 memset(buf, 0, len); /* ? XXX */ 2589 totlen = len; 2590 break; 2591 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2592 DPRINTFN(8, "get port status i=%d", index, 0, 0, 0); 2593 if (index < 1 || index > sc->sc_noport) { 2594 return -1; 2595 } 2596 if (len != 4) { 2597 return -1; 2598 } 2599 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2600 DPRINTFN(8, "port status=0x%04x", v, 0, 0, 0); 2601 USETW(ps.wPortStatus, v); 2602 USETW(ps.wPortChange, v >> 16); 2603 totlen = min(len, sizeof(ps)); 2604 memcpy(buf, &ps, totlen); 2605 break; 2606 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2607 return -1; 2608 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2609 break; 2610 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2611 if (index < 1 || index > sc->sc_noport) { 2612 return -1; 2613 } 2614 port = OHCI_RH_PORT_STATUS(index); 2615 switch(value) { 2616 case UHF_PORT_ENABLE: 2617 OWRITE4(sc, port, UPS_PORT_ENABLED); 2618 break; 2619 case UHF_PORT_SUSPEND: 2620 OWRITE4(sc, port, UPS_SUSPEND); 2621 break; 2622 case UHF_PORT_RESET: 2623 DPRINTFN(5, "reset port %d", index, 0, 0, 0); 2624 OWRITE4(sc, port, UPS_RESET); 2625 for (i = 0; i < 5; i++) { 2626 usb_delay_ms(&sc->sc_bus, 2627 USB_PORT_ROOT_RESET_DELAY); 2628 if (sc->sc_dying) { 2629 return -1; 2630 } 2631 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2632 break; 2633 } 2634 DPRINTFN(8, "port %d reset, status = 0x%04x", index, 2635 OREAD4(sc, port), 0, 0); 2636 break; 2637 case UHF_PORT_POWER: 2638 DPRINTFN(2, "set port power %d", index, 0, 0, 0); 2639 OWRITE4(sc, port, UPS_PORT_POWER); 2640 break; 2641 default: 2642 return -1; 2643 } 2644 break; 2645 default: 2646 /* default from usbroothub */ 2647 return buflen; 2648 } 2649 2650 return totlen; 2651 } 2652 2653 Static usbd_status 2654 ohci_root_intr_transfer(struct usbd_xfer *xfer) 2655 { 2656 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2657 usbd_status err; 2658 2659 /* Insert last in queue. */ 2660 mutex_enter(&sc->sc_lock); 2661 err = usb_insert_transfer(xfer); 2662 mutex_exit(&sc->sc_lock); 2663 if (err) 2664 return err; 2665 2666 /* Pipe isn't running, start first */ 2667 return ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 2668 } 2669 2670 Static usbd_status 2671 ohci_root_intr_start(struct usbd_xfer *xfer) 2672 { 2673 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2674 2675 if (sc->sc_dying) 2676 return USBD_IOERROR; 2677 2678 mutex_enter(&sc->sc_lock); 2679 KASSERT(sc->sc_intrxfer == NULL); 2680 sc->sc_intrxfer = xfer; 2681 mutex_exit(&sc->sc_lock); 2682 2683 return USBD_IN_PROGRESS; 2684 } 2685 2686 /* Abort a root interrupt request. */ 2687 Static void 2688 ohci_root_intr_abort(struct usbd_xfer *xfer) 2689 { 2690 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2691 2692 KASSERT(mutex_owned(&sc->sc_lock)); 2693 KASSERT(xfer->ux_pipe->up_intrxfer == xfer); 2694 2695 sc->sc_intrxfer = NULL; 2696 2697 xfer->ux_status = USBD_CANCELLED; 2698 usb_transfer_complete(xfer); 2699 } 2700 2701 /* Close the root pipe. */ 2702 Static void 2703 ohci_root_intr_close(struct usbd_pipe *pipe) 2704 { 2705 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 2706 2707 KASSERT(mutex_owned(&sc->sc_lock)); 2708 2709 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2710 2711 sc->sc_intrxfer = NULL; 2712 } 2713 2714 /************************/ 2715 2716 int 2717 ohci_device_ctrl_init(struct usbd_xfer *xfer) 2718 { 2719 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 2720 usb_device_request_t *req = &xfer->ux_request; 2721 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2722 ohci_soft_td_t *stat, *setup; 2723 int isread = req->bmRequestType & UT_READ; 2724 int len = xfer->ux_bufsize; 2725 int err = ENOMEM; 2726 2727 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2728 2729 setup = ohci_alloc_std(sc); 2730 if (setup == NULL) { 2731 goto bad1; 2732 } 2733 stat = ohci_alloc_std(sc); 2734 if (stat == NULL) { 2735 goto bad2; 2736 } 2737 2738 ox->ox_setup = setup; 2739 ox->ox_stat = stat; 2740 ox->ox_nstd = 0; 2741 setup->held = &ox->ox_setup; 2742 stat->held = &ox->ox_stat; 2743 2744 DPRINTFN(10, "xfer=%p setup=%p held at %p", ox, setup, setup->held, 0); 2745 DPRINTFN(10, "xfer=%p stat= %p held at %p", ox, stat, stat->held, 0); 2746 2747 /* Set up data transaction */ 2748 if (len != 0) { 2749 err = ohci_alloc_std_chain(sc, xfer, len, isread); 2750 if (err) { 2751 goto bad3; 2752 } 2753 } 2754 return 0; 2755 2756 bad3: 2757 ohci_free_std(sc, stat); 2758 bad2: 2759 ohci_free_std(sc, setup); 2760 bad1: 2761 return err; 2762 } 2763 2764 void 2765 ohci_device_ctrl_fini(struct usbd_xfer *xfer) 2766 { 2767 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 2768 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2769 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 2770 2771 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2772 DPRINTFN(8, "xfer %p nstd %d", xfer, ox->ox_nstd, 0, 0); 2773 2774 mutex_enter(&sc->sc_lock); 2775 if (ox->ox_setup != opipe->tail.td) { 2776 ohci_free_std_locked(sc, ox->ox_setup); 2777 } 2778 for (size_t i = 0; i < ox->ox_nstd; i++) { 2779 ohci_soft_td_t *std = ox->ox_stds[i]; 2780 if (std == NULL) 2781 break; 2782 ohci_free_std_locked(sc, std); 2783 } 2784 ohci_free_std_locked(sc, ox->ox_stat); 2785 mutex_exit(&sc->sc_lock); 2786 2787 if (ox->ox_nstd) { 2788 const size_t sz = sizeof(ohci_soft_td_t *) * ox->ox_nstd; 2789 kmem_free(ox->ox_stds, sz); 2790 } 2791 } 2792 2793 Static usbd_status 2794 ohci_device_ctrl_transfer(struct usbd_xfer *xfer) 2795 { 2796 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2797 usbd_status err; 2798 2799 /* Insert last in queue. */ 2800 mutex_enter(&sc->sc_lock); 2801 err = usb_insert_transfer(xfer); 2802 mutex_exit(&sc->sc_lock); 2803 if (err) 2804 return err; 2805 2806 /* Pipe isn't running, start first */ 2807 return ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 2808 } 2809 2810 Static usbd_status 2811 ohci_device_ctrl_start(struct usbd_xfer *xfer) 2812 { 2813 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2814 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 2815 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 2816 usb_device_request_t *req = &xfer->ux_request; 2817 struct usbd_device *dev __diagused = opipe->pipe.up_dev; 2818 ohci_soft_td_t *setup, *stat, *next, *tail; 2819 ohci_soft_ed_t *sed; 2820 int isread; 2821 int len; 2822 2823 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2824 2825 if (sc->sc_dying) 2826 return USBD_IOERROR; 2827 2828 KASSERT(xfer->ux_rqflags & URQ_REQUEST); 2829 2830 isread = req->bmRequestType & UT_READ; 2831 len = UGETW(req->wLength); 2832 2833 DPRINTF("xfer=%p len=%d, addr=%d, endpt=%d", xfer, len, dev->ud_addr, 2834 opipe->pipe.up_endpoint->ue_edesc->bEndpointAddress); 2835 DPRINTF("type=0x%02x, request=0x%02x, wValue=0x%04x, wIndex=0x%04x", 2836 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2837 UGETW(req->wIndex)); 2838 2839 /* Need to take lock here for pipe->tail.td */ 2840 mutex_enter(&sc->sc_lock); 2841 2842 /* 2843 * Use the pipe "tail" TD as our first and loan our first TD to the 2844 * next transfer 2845 */ 2846 setup = opipe->tail.td; 2847 opipe->tail.td = ox->ox_setup; 2848 ox->ox_setup = setup; 2849 setup->held = &ox->ox_setup; 2850 2851 DPRINTFN(10, "xfer=%p new setup=%p held at %p", ox, setup, setup->held, 0); 2852 2853 stat = ox->ox_stat; 2854 2855 /* point at sentinel */ 2856 tail = opipe->tail.td; 2857 tail->held = &opipe->tail.td; 2858 sed = opipe->sed; 2859 2860 DPRINTFN(10, "xfer=%p new tail=%p held at %p", ox, tail, tail->held, 0); 2861 2862 KASSERTMSG(OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)) == dev->ud_addr, 2863 "address ED %d pipe %d\n", 2864 OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)), dev->ud_addr); 2865 KASSERTMSG(OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)) == 2866 UGETW(opipe->pipe.up_endpoint->ue_edesc->wMaxPacketSize), 2867 "MPL ED %d pipe %d\n", 2868 OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)), 2869 UGETW(opipe->pipe.up_endpoint->ue_edesc->wMaxPacketSize)); 2870 2871 /* next will point to data if len != 0 */ 2872 next = stat; 2873 2874 /* Set up data transaction */ 2875 if (len != 0) { 2876 ohci_soft_td_t *std; 2877 ohci_soft_td_t *end; 2878 2879 next = ox->ox_stds[0]; 2880 ohci_reset_std_chain(sc, xfer, len, isread, next, &end); 2881 2882 end->td.td_nexttd = HTOO32(stat->physaddr); 2883 end->nexttd = stat; 2884 2885 usb_syncmem(&end->dma, end->offs, sizeof(end->td), 2886 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2887 2888 usb_syncmem(&xfer->ux_dmabuf, 0, len, 2889 isread ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 2890 std = ox->ox_stds[0]; 2891 /* Start toggle at 1 and then use the carried toggle. */ 2892 std->td.td_flags &= HTOO32(~OHCI_TD_TOGGLE_MASK); 2893 std->td.td_flags |= HTOO32(OHCI_TD_TOGGLE_1); 2894 usb_syncmem(&std->dma, 2895 std->offs + offsetof(ohci_td_t, td_flags), 2896 sizeof(std->td.td_flags), 2897 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2898 } 2899 2900 DPRINTFN(8, "setup %p data %p stat %p tail %p", setup, 2901 (len != 0 ? ox->ox_stds[0] : NULL), stat, tail); 2902 KASSERT(opipe->tail.td == tail); 2903 2904 memcpy(KERNADDR(&opipe->ctrl.reqdma, 0), req, sizeof(*req)); 2905 usb_syncmem(&opipe->ctrl.reqdma, 0, sizeof(*req), BUS_DMASYNC_PREWRITE); 2906 2907 setup->td.td_flags = HTOO32(OHCI_TD_SETUP | OHCI_TD_NOCC | 2908 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 2909 setup->td.td_cbp = HTOO32(DMAADDR(&opipe->ctrl.reqdma, 0)); 2910 setup->td.td_nexttd = HTOO32(next->physaddr); 2911 setup->td.td_be = HTOO32(O32TOH(setup->td.td_cbp) + sizeof(*req) - 1); 2912 setup->nexttd = next; 2913 setup->len = 0; 2914 setup->xfer = xfer; 2915 setup->flags = 0; 2916 ohci_hash_add_td(sc, setup); 2917 2918 xfer->ux_hcpriv = setup; 2919 usb_syncmem(&setup->dma, setup->offs, sizeof(setup->td), 2920 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2921 2922 stat->td.td_flags = HTOO32( 2923 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | 2924 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 2925 stat->td.td_cbp = 0; 2926 stat->td.td_nexttd = HTOO32(tail->physaddr); 2927 stat->td.td_be = 0; 2928 stat->nexttd = tail; 2929 stat->flags = OHCI_CALL_DONE; 2930 stat->len = 0; 2931 stat->xfer = xfer; 2932 ohci_hash_add_td(sc, stat); 2933 2934 usb_syncmem(&stat->dma, stat->offs, sizeof(stat->td), 2935 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2936 2937 memset(&tail->td, 0, sizeof(tail->td)); 2938 tail->nexttd = NULL; 2939 tail->xfer = NULL; 2940 2941 usb_syncmem(&tail->dma, tail->offs, sizeof(tail->td), 2942 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2943 2944 #ifdef OHCI_DEBUG 2945 USBHIST_LOGN(ohcidebug, 5, "--- dump start ---", 0, 0, 0, 0); 2946 if (ohcidebug >= 5) { 2947 ohci_dump_ed(sc, sed); 2948 ohci_dump_tds(sc, setup); 2949 } 2950 USBHIST_LOGN(ohcidebug, 5, "--- dump end ---", 0, 0, 0, 0); 2951 #endif 2952 2953 /* Insert ED in schedule */ 2954 sed->ed.ed_tailp = HTOO32(tail->physaddr); 2955 usb_syncmem(&sed->dma, 2956 sed->offs + offsetof(ohci_ed_t, ed_tailp), 2957 sizeof(sed->ed.ed_tailp), 2958 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2959 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 2960 if (xfer->ux_timeout && !sc->sc_bus.ub_usepolling) { 2961 callout_reset(&xfer->ux_callout, mstohz(xfer->ux_timeout), 2962 ohci_timeout, xfer); 2963 } 2964 2965 DPRINTF("done", 0, 0, 0, 0); 2966 2967 xfer->ux_status = USBD_IN_PROGRESS; 2968 mutex_exit(&sc->sc_lock); 2969 2970 return USBD_IN_PROGRESS; 2971 } 2972 2973 /* Abort a device control request. */ 2974 Static void 2975 ohci_device_ctrl_abort(struct usbd_xfer *xfer) 2976 { 2977 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 2978 2979 KASSERT(mutex_owned(&sc->sc_lock)); 2980 2981 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2982 DPRINTF("xfer=%p", xfer, 0, 0, 0); 2983 ohci_abort_xfer(xfer, USBD_CANCELLED); 2984 } 2985 2986 /* Close a device control pipe. */ 2987 Static void 2988 ohci_device_ctrl_close(struct usbd_pipe *pipe) 2989 { 2990 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 2991 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 2992 2993 KASSERT(mutex_owned(&sc->sc_lock)); 2994 2995 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2996 DPRINTF("pipe=%p", pipe, 0, 0, 0); 2997 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2998 ohci_free_std_locked(sc, opipe->tail.td); 2999 } 3000 3001 /************************/ 3002 3003 Static void 3004 ohci_device_clear_toggle(struct usbd_pipe *pipe) 3005 { 3006 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 3007 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 3008 3009 opipe->sed->ed.ed_headp &= HTOO32(~OHCI_TOGGLECARRY); 3010 } 3011 3012 Static void 3013 ohci_noop(struct usbd_pipe *pipe) 3014 { 3015 } 3016 3017 Static int 3018 ohci_device_bulk_init(struct usbd_xfer *xfer) 3019 { 3020 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3021 int len = xfer->ux_bufsize; 3022 int endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress;; 3023 int isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3024 int err; 3025 3026 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3027 3028 KASSERT(!(xfer->ux_rqflags & URQ_REQUEST)); 3029 3030 DPRINTFN(4, "xfer=%p len=%d isread=%d flags=%d", xfer, len, isread, 3031 xfer->ux_flags); 3032 DPRINTFN(4, "endpt=%d", endpt, 0, 0, 0); 3033 3034 /* Allocate a chain of new TDs (including a new tail). */ 3035 err = ohci_alloc_std_chain(sc, xfer, len, isread); 3036 if (err) 3037 return err; 3038 3039 return 0; 3040 } 3041 3042 Static void 3043 ohci_device_bulk_fini(struct usbd_xfer *xfer) 3044 { 3045 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3046 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3047 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 3048 3049 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3050 DPRINTFN(8, "xfer %p nstd %d", xfer, ox->ox_nstd, 0, 0); 3051 3052 mutex_enter(&sc->sc_lock); 3053 for (size_t i = 0; i < ox->ox_nstd; i++) { 3054 ohci_soft_td_t *std = ox->ox_stds[i]; 3055 if (std == NULL) 3056 break; 3057 if (std != opipe->tail.td) 3058 ohci_free_std_locked(sc, std); 3059 } 3060 mutex_exit(&sc->sc_lock); 3061 3062 if (ox->ox_nstd) { 3063 const size_t sz = sizeof(ohci_soft_td_t *) * ox->ox_nstd; 3064 kmem_free(ox->ox_stds, sz); 3065 } 3066 } 3067 3068 Static usbd_status 3069 ohci_device_bulk_transfer(struct usbd_xfer *xfer) 3070 { 3071 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3072 usbd_status err; 3073 3074 /* Insert last in queue. */ 3075 mutex_enter(&sc->sc_lock); 3076 err = usb_insert_transfer(xfer); 3077 mutex_exit(&sc->sc_lock); 3078 if (err) 3079 return err; 3080 3081 /* Pipe isn't running, start first */ 3082 return ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 3083 } 3084 3085 Static usbd_status 3086 ohci_device_bulk_start(struct usbd_xfer *xfer) 3087 { 3088 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3089 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 3090 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3091 ohci_soft_td_t *last; 3092 ohci_soft_td_t *data, *tail, *tdp; 3093 ohci_soft_ed_t *sed; 3094 int len, isread, endpt; 3095 3096 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3097 3098 if (sc->sc_dying) 3099 return USBD_IOERROR; 3100 3101 KASSERT(!(xfer->ux_rqflags & URQ_REQUEST)); 3102 3103 len = xfer->ux_length; 3104 endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress; 3105 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3106 sed = opipe->sed; 3107 3108 DPRINTFN(4, "xfer=%p len=%d isread=%d flags=%d", xfer, len, isread, 3109 xfer->ux_flags); 3110 DPRINTFN(4, "endpt=%d", endpt, 0, 0, 0); 3111 3112 mutex_enter(&sc->sc_lock); 3113 3114 /* 3115 * Use the pipe "tail" TD as our first and loan our first TD to the 3116 * next transfer 3117 */ 3118 data = opipe->tail.td; 3119 opipe->tail.td = ox->ox_stds[0]; 3120 ox->ox_stds[0] = data; 3121 data->held = &ox->ox_stds[0]; 3122 ohci_reset_std_chain(sc, xfer, len, isread, data, &last); 3123 DPRINTFN(10, "xfer=%p new data=%p held at %p", ox, data, data->held, 0); 3124 3125 /* point at sentinel */ 3126 tail = opipe->tail.td; 3127 memset(&tail->td, 0, sizeof(tail->td)); 3128 tail->held = &opipe->tail.td; 3129 tail->nexttd = NULL; 3130 tail->xfer = NULL; 3131 DPRINTFN(10, "xfer=%p new tail=%p held at %p", ox, tail, tail->held, 0); 3132 usb_syncmem(&tail->dma, tail->offs, sizeof(tail->td), 3133 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3134 xfer->ux_hcpriv = data; 3135 3136 DPRINTFN(8, "xfer %p data %p tail %p", xfer, ox->ox_stds[0], tail, 0); 3137 KASSERT(opipe->tail.td == tail); 3138 3139 /* We want interrupt at the end of the transfer. */ 3140 last->td.td_flags &= HTOO32(~OHCI_TD_INTR_MASK); 3141 last->td.td_flags |= HTOO32(OHCI_TD_SET_DI(1)); 3142 last->td.td_nexttd = HTOO32(tail->physaddr); 3143 last->nexttd = tail; 3144 last->flags |= OHCI_CALL_DONE; 3145 usb_syncmem(&last->dma, last->offs, sizeof(last->td), 3146 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3147 3148 DPRINTFN(4, "ed_flags=0x%08x td_flags=0x%08x " 3149 "td_cbp=0x%08x td_be=0x%08x", 3150 (int)O32TOH(sed->ed.ed_flags), 3151 (int)O32TOH(data->td.td_flags), 3152 (int)O32TOH(data->td.td_cbp), 3153 (int)O32TOH(data->td.td_be)); 3154 3155 #ifdef OHCI_DEBUG 3156 DPRINTFN(5, "--- dump start ---", 0, 0, 0, 0); 3157 if (ohcidebug >= 5) { 3158 ohci_dump_ed(sc, sed); 3159 ohci_dump_tds(sc, data); 3160 } 3161 DPRINTFN(5, "--- dump end ---", 0, 0, 0, 0); 3162 #endif 3163 3164 /* Insert ED in schedule */ 3165 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 3166 KASSERT(tdp->xfer == xfer); 3167 } 3168 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3169 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3170 sed->ed.ed_tailp = HTOO32(tail->physaddr); 3171 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3172 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3173 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3174 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 3175 if (xfer->ux_timeout && !sc->sc_bus.ub_usepolling) { 3176 callout_reset(&xfer->ux_callout, mstohz(xfer->ux_timeout), 3177 ohci_timeout, xfer); 3178 } 3179 3180 xfer->ux_status = USBD_IN_PROGRESS; 3181 mutex_exit(&sc->sc_lock); 3182 3183 return USBD_IN_PROGRESS; 3184 } 3185 3186 Static void 3187 ohci_device_bulk_abort(struct usbd_xfer *xfer) 3188 { 3189 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 3190 3191 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3192 3193 KASSERT(mutex_owned(&sc->sc_lock)); 3194 3195 DPRINTF("xfer=%p", xfer, 0, 0, 0); 3196 ohci_abort_xfer(xfer, USBD_CANCELLED); 3197 } 3198 3199 /* 3200 * Close a device bulk pipe. 3201 */ 3202 Static void 3203 ohci_device_bulk_close(struct usbd_pipe *pipe) 3204 { 3205 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 3206 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 3207 3208 KASSERT(mutex_owned(&sc->sc_lock)); 3209 3210 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3211 3212 DPRINTF("pipe=%p", pipe, 0, 0, 0); 3213 ohci_close_pipe(pipe, sc->sc_bulk_head); 3214 ohci_free_std_locked(sc, opipe->tail.td); 3215 } 3216 3217 /************************/ 3218 3219 Static int 3220 ohci_device_intr_init(struct usbd_xfer *xfer) 3221 { 3222 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3223 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3224 int len = xfer->ux_bufsize; 3225 int endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress;; 3226 int isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3227 int err; 3228 3229 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3230 3231 KASSERT(!(xfer->ux_rqflags & URQ_REQUEST)); 3232 KASSERT(len != 0); 3233 3234 DPRINTFN(4, "xfer=%p len=%d isread=%d flags=%d", xfer, len, isread, 3235 xfer->ux_flags); 3236 DPRINTFN(4, "endpt=%d", endpt, 0, 0, 0); 3237 3238 ox->ox_nstd = 0; 3239 3240 err = ohci_alloc_std_chain(sc, xfer, len, isread); 3241 if (err) { 3242 return err; 3243 } 3244 3245 return 0; 3246 } 3247 3248 Static void 3249 ohci_device_intr_fini(struct usbd_xfer *xfer) 3250 { 3251 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3252 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3253 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 3254 3255 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3256 DPRINTFN(8, "xfer %p nstd %d", xfer, ox->ox_nstd, 0, 0); 3257 3258 mutex_enter(&sc->sc_lock); 3259 for (size_t i = 0; i < ox->ox_nstd; i++) { 3260 ohci_soft_td_t *std = ox->ox_stds[i]; 3261 if (std != NULL) 3262 break; 3263 if (std != opipe->tail.td) 3264 ohci_free_std_locked(sc, std); 3265 } 3266 mutex_exit(&sc->sc_lock); 3267 3268 if (ox->ox_nstd) { 3269 const size_t sz = sizeof(ohci_soft_td_t *) * ox->ox_nstd; 3270 kmem_free(ox->ox_stds, sz); 3271 } 3272 } 3273 3274 Static usbd_status 3275 ohci_device_intr_transfer(struct usbd_xfer *xfer) 3276 { 3277 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3278 usbd_status err; 3279 3280 /* Insert last in queue. */ 3281 mutex_enter(&sc->sc_lock); 3282 err = usb_insert_transfer(xfer); 3283 mutex_exit(&sc->sc_lock); 3284 if (err) 3285 return err; 3286 3287 /* Pipe isn't running, start first */ 3288 return ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 3289 } 3290 3291 Static usbd_status 3292 ohci_device_intr_start(struct usbd_xfer *xfer) 3293 { 3294 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3295 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 3296 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3297 ohci_soft_ed_t *sed = opipe->sed; 3298 ohci_soft_td_t *data, *last, *tail; 3299 int len, isread, endpt; 3300 3301 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3302 3303 if (sc->sc_dying) 3304 return USBD_IOERROR; 3305 3306 DPRINTFN(3, "xfer=%p len=%d flags=%d priv=%p", xfer, xfer->ux_length, 3307 xfer->ux_flags, xfer->ux_priv); 3308 3309 KASSERT(!(xfer->ux_rqflags & URQ_REQUEST)); 3310 3311 len = xfer->ux_length; 3312 endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress; 3313 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3314 3315 mutex_enter(&sc->sc_lock); 3316 3317 /* 3318 * Use the pipe "tail" TD as our first and loan our first TD to the 3319 * next transfer. 3320 */ 3321 data = opipe->tail.td; 3322 opipe->tail.td = ox->ox_stds[0]; 3323 ox->ox_stds[0] = data; 3324 data->held = &ox->ox_stds[0]; 3325 ohci_reset_std_chain(sc, xfer, len, isread, data, &last); 3326 DPRINTFN(10, "xfer=%p new data=%p held at %p", ox, data, data->held, 0); 3327 3328 /* point at sentinel */ 3329 tail = opipe->tail.td; 3330 memset(&tail->td, 0, sizeof(tail->td)); 3331 tail->held = &opipe->tail.td; 3332 tail->nexttd = NULL; 3333 tail->xfer = NULL; 3334 DPRINTFN(10, "xfer=%p new tail=%p held at %p", ox, tail, tail->held, 0); 3335 usb_syncmem(&tail->dma, tail->offs, sizeof(tail->td), 3336 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3337 xfer->ux_hcpriv = data; 3338 3339 DPRINTFN(8, "data %p tail %p", ox->ox_stds[0], tail, 0, 0); 3340 KASSERT(opipe->tail.td == tail); 3341 3342 /* We want interrupt at the end of the transfer. */ 3343 last->td.td_flags &= HTOO32(~OHCI_TD_INTR_MASK); 3344 last->td.td_flags |= HTOO32(OHCI_TD_SET_DI(1)); 3345 3346 last->td.td_nexttd = HTOO32(tail->physaddr); 3347 last->nexttd = tail; 3348 last->flags |= OHCI_CALL_DONE; 3349 usb_syncmem(&last->dma, last->offs, sizeof(last->td), 3350 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3351 3352 #ifdef OHCI_DEBUG 3353 DPRINTFN(5, "--- dump start ---", 0, 0, 0, 0); 3354 if (ohcidebug >= 5) { 3355 ohci_dump_ed(sc, sed); 3356 ohci_dump_tds(sc, data); 3357 } 3358 DPRINTFN(5, "--- dump end ---", 0, 0, 0, 0); 3359 #endif 3360 3361 /* Insert ED in schedule */ 3362 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3363 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3364 sed->ed.ed_tailp = HTOO32(tail->physaddr); 3365 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3366 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3367 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3368 3369 xfer->ux_status = USBD_IN_PROGRESS; 3370 mutex_exit(&sc->sc_lock); 3371 3372 return USBD_IN_PROGRESS; 3373 } 3374 3375 /* Abort a device interrupt request. */ 3376 Static void 3377 ohci_device_intr_abort(struct usbd_xfer *xfer) 3378 { 3379 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 3380 3381 KASSERT(mutex_owned(&sc->sc_lock)); 3382 KASSERT(xfer->ux_pipe->up_intrxfer == xfer); 3383 3384 ohci_abort_xfer(xfer, USBD_CANCELLED); 3385 } 3386 3387 /* Close a device interrupt pipe. */ 3388 Static void 3389 ohci_device_intr_close(struct usbd_pipe *pipe) 3390 { 3391 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 3392 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 3393 int nslots = opipe->intr.nslots; 3394 int pos = opipe->intr.pos; 3395 int j; 3396 ohci_soft_ed_t *p, *sed = opipe->sed; 3397 3398 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3399 3400 KASSERT(mutex_owned(&sc->sc_lock)); 3401 3402 DPRINTFN(1, "pipe=%p nslots=%d pos=%d", pipe, nslots, pos, 0); 3403 usb_syncmem(&sed->dma, sed->offs, 3404 sizeof(sed->ed), BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3405 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 3406 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3407 sizeof(sed->ed.ed_flags), 3408 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3409 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 3410 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) 3411 usb_delay_ms_locked(&sc->sc_bus, 2, &sc->sc_lock); 3412 3413 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 3414 continue; 3415 KASSERT(p); 3416 p->next = sed->next; 3417 p->ed.ed_nexted = sed->ed.ed_nexted; 3418 usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted), 3419 sizeof(p->ed.ed_nexted), 3420 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3421 3422 for (j = 0; j < nslots; j++) 3423 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 3424 3425 ohci_free_std_locked(sc, opipe->tail.td); 3426 ohci_free_sed_locked(sc, opipe->sed); 3427 } 3428 3429 Static usbd_status 3430 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival) 3431 { 3432 int i, j, best; 3433 u_int npoll, slow, shigh, nslots; 3434 u_int bestbw, bw; 3435 ohci_soft_ed_t *hsed, *sed = opipe->sed; 3436 3437 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3438 3439 DPRINTFN(2, "pipe=%p", opipe, 0, 0, 0); 3440 if (ival == 0) { 3441 printf("ohci_setintr: 0 interval\n"); 3442 return USBD_INVAL; 3443 } 3444 3445 npoll = OHCI_NO_INTRS; 3446 while (npoll > ival) 3447 npoll /= 2; 3448 DPRINTFN(2, "ival=%d npoll=%d", ival, npoll, 0, 0); 3449 3450 /* 3451 * We now know which level in the tree the ED must go into. 3452 * Figure out which slot has most bandwidth left over. 3453 * Slots to examine: 3454 * npoll 3455 * 1 0 3456 * 2 1 2 3457 * 4 3 4 5 6 3458 * 8 7 8 9 10 11 12 13 14 3459 * N (N-1) .. (N-1+N-1) 3460 */ 3461 slow = npoll-1; 3462 shigh = slow + npoll; 3463 nslots = OHCI_NO_INTRS / npoll; 3464 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 3465 bw = 0; 3466 for (j = 0; j < nslots; j++) 3467 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 3468 if (bw < bestbw) { 3469 best = i; 3470 bestbw = bw; 3471 } 3472 } 3473 DPRINTFN(2, "best=%d(%d..%d) bestbw=%d", best, slow, shigh, bestbw); 3474 3475 mutex_enter(&sc->sc_lock); 3476 hsed = sc->sc_eds[best]; 3477 sed->next = hsed->next; 3478 usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags), 3479 sizeof(hsed->ed.ed_flags), 3480 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3481 sed->ed.ed_nexted = hsed->ed.ed_nexted; 3482 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3483 sizeof(sed->ed.ed_flags), 3484 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3485 hsed->next = sed; 3486 hsed->ed.ed_nexted = HTOO32(sed->physaddr); 3487 usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags), 3488 sizeof(hsed->ed.ed_flags), 3489 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3490 mutex_exit(&sc->sc_lock); 3491 3492 for (j = 0; j < nslots; j++) 3493 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 3494 opipe->intr.nslots = nslots; 3495 opipe->intr.pos = best; 3496 3497 DPRINTFN(5, "returns %p", opipe, 0, 0, 0); 3498 return USBD_NORMAL_COMPLETION; 3499 } 3500 3501 /***********************/ 3502 3503 Static int 3504 ohci_device_isoc_init(struct usbd_xfer *xfer) 3505 { 3506 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3507 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3508 ohci_soft_itd_t *sitd; 3509 size_t i; 3510 int err; 3511 3512 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3513 3514 DPRINTFN(1, "xfer %p len %d flags %d", xfer, xfer->ux_length, 3515 xfer->ux_flags, 0); 3516 3517 const size_t nfsitd = 3518 (xfer->ux_nframes + OHCI_ITD_NOFFSET - 1) / OHCI_ITD_NOFFSET; 3519 const size_t nbsitd = xfer->ux_bufsize / OHCI_PAGE_SIZE; 3520 const size_t nsitd = MAX(nfsitd, nbsitd) + 1; 3521 3522 ox->ox_sitds = kmem_zalloc(sizeof(ohci_soft_itd_t *) * nsitd, 3523 KM_SLEEP); 3524 ox->ox_nsitd = nsitd; 3525 3526 for (i = 0; i < nsitd; i++) { 3527 /* Allocate next ITD */ 3528 sitd = ohci_alloc_sitd(sc); 3529 if (sitd == NULL) { 3530 err = ENOMEM; 3531 goto fail; 3532 } 3533 ox->ox_sitds[i] = sitd; 3534 sitd->held = &ox->ox_sitds[i]; 3535 sitd->xfer = xfer; 3536 sitd->flags = 0; 3537 // DPRINTFN(10, "xfer=%p new tail=%p held at %p", ox, tail, tail->held, 0); 3538 } 3539 3540 return 0; 3541 fail: 3542 for (; i > 0;) { 3543 ohci_free_sitd(sc, ox->ox_sitds[--i]); 3544 } 3545 return err; 3546 } 3547 3548 Static void 3549 ohci_device_isoc_fini(struct usbd_xfer *xfer) 3550 { 3551 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3552 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3553 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 3554 3555 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3556 3557 mutex_enter(&sc->sc_lock); 3558 for (size_t i = 0; i < ox->ox_nsitd; i++) { 3559 if (ox->ox_sitds[i] != opipe->tail.itd) { 3560 ohci_free_sitd_locked(sc, ox->ox_sitds[i]); 3561 } 3562 } 3563 mutex_exit(&sc->sc_lock); 3564 3565 if (ox->ox_nsitd) { 3566 const size_t sz = sizeof(ohci_soft_itd_t *) * ox->ox_nsitd; 3567 kmem_free(ox->ox_sitds, sz); 3568 } 3569 } 3570 3571 3572 usbd_status 3573 ohci_device_isoc_transfer(struct usbd_xfer *xfer) 3574 { 3575 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3576 usbd_status __diagused err; 3577 3578 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3579 3580 DPRINTFN(5, "xfer=%p", xfer, 0, 0, 0); 3581 3582 /* Put it on our queue, */ 3583 mutex_enter(&sc->sc_lock); 3584 err = usb_insert_transfer(xfer); 3585 mutex_exit(&sc->sc_lock); 3586 3587 KASSERT(err == USBD_NORMAL_COMPLETION); 3588 3589 /* insert into schedule, */ 3590 ohci_device_isoc_enter(xfer); 3591 3592 /* and start if the pipe wasn't running */ 3593 return USBD_IN_PROGRESS; 3594 } 3595 3596 void 3597 ohci_device_isoc_enter(struct usbd_xfer *xfer) 3598 { 3599 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3600 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 3601 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3602 ohci_soft_ed_t *sed = opipe->sed; 3603 ohci_soft_itd_t *sitd, *nsitd, *tail; 3604 ohci_physaddr_t buf, offs, noffs, bp0; 3605 int i, ncur, nframes; 3606 3607 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3608 DPRINTFN(5, "xfer=%p", xfer, 0, 0, 0); 3609 3610 mutex_enter(&sc->sc_lock); 3611 3612 if (sc->sc_dying) { 3613 mutex_exit(&sc->sc_lock); 3614 return; 3615 } 3616 3617 struct isoc *isoc = &opipe->isoc; 3618 3619 DPRINTFN(1, "used=%d next=%d xfer=%p nframes=%d", 3620 isoc->inuse, isoc->next, xfer, xfer->ux_nframes); 3621 3622 if (isoc->next == -1) { 3623 /* Not in use yet, schedule it a few frames ahead. */ 3624 isoc->next = O32TOH(sc->sc_hcca->hcca_frame_number) + 5; 3625 DPRINTFN(2,"start next=%d", isoc->next, 0, 0, 0); 3626 } 3627 3628 sitd = opipe->tail.itd; 3629 opipe->tail.itd = ox->ox_sitds[0]; 3630 ox->ox_sitds[0] = sitd; 3631 sitd->held = &ox->ox_sitds[0]; 3632 3633 buf = DMAADDR(&xfer->ux_dmabuf, 0); 3634 bp0 = OHCI_PAGE(buf); 3635 offs = OHCI_PAGE_OFFSET(buf); 3636 nframes = xfer->ux_nframes; 3637 xfer->ux_hcpriv = sitd; 3638 size_t j = 1; 3639 for (i = ncur = 0; i < nframes; i++, ncur++) { 3640 noffs = offs + xfer->ux_frlengths[i]; 3641 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ 3642 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */ 3643 3644 /* Allocate next ITD */ 3645 nsitd = ox->ox_sitds[j++]; 3646 KASSERT(nsitd != NULL); 3647 KASSERT(j < ox->ox_nsitd); 3648 3649 /* Fill current ITD */ 3650 sitd->itd.itd_flags = HTOO32( 3651 OHCI_ITD_NOCC | 3652 OHCI_ITD_SET_SF(isoc->next) | 3653 OHCI_ITD_SET_DI(6) | /* delay intr a little */ 3654 OHCI_ITD_SET_FC(ncur)); 3655 sitd->itd.itd_bp0 = HTOO32(bp0); 3656 sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr); 3657 sitd->itd.itd_be = HTOO32(bp0 + offs - 1); 3658 sitd->nextitd = nsitd; 3659 sitd->xfer = xfer; 3660 sitd->flags = 0; 3661 #ifdef DIAGNOSTIC 3662 sitd->isdone = false; 3663 #endif 3664 ohci_hash_add_itd(sc, sitd); 3665 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 3666 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3667 3668 sitd = nsitd; 3669 isoc->next = isoc->next + ncur; 3670 bp0 = OHCI_PAGE(buf + offs); 3671 ncur = 0; 3672 } 3673 sitd->itd.itd_offset[ncur] = HTOO16(OHCI_ITD_MK_OFFS(offs)); 3674 /* XXX Sync */ 3675 offs = noffs; 3676 } 3677 KASSERT(j <= ox->ox_nsitd); 3678 3679 /* point at sentinel */ 3680 tail = opipe->tail.itd; 3681 memset(&tail->itd, 0, sizeof(tail->itd)); 3682 tail->held = &opipe->tail.itd; 3683 tail->nextitd = NULL; 3684 tail->xfer = NULL; 3685 usb_syncmem(&tail->dma, tail->offs, sizeof(tail->itd), 3686 BUS_DMASYNC_PREWRITE); 3687 3688 /* Fixup last used ITD */ 3689 sitd->itd.itd_flags = HTOO32( 3690 OHCI_ITD_NOCC | 3691 OHCI_ITD_SET_SF(isoc->next) | 3692 OHCI_ITD_SET_DI(0) | 3693 OHCI_ITD_SET_FC(ncur)); 3694 sitd->itd.itd_bp0 = HTOO32(bp0); 3695 sitd->itd.itd_nextitd = HTOO32(tail->physaddr); 3696 sitd->itd.itd_be = HTOO32(bp0 + offs - 1); 3697 sitd->nextitd = tail; 3698 sitd->xfer = xfer; 3699 sitd->flags = OHCI_CALL_DONE; 3700 #ifdef DIAGNOSTIC 3701 sitd->isdone = false; 3702 #endif 3703 ohci_hash_add_itd(sc, sitd); 3704 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 3705 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3706 3707 isoc->next = isoc->next + ncur; 3708 isoc->inuse += nframes; 3709 3710 /* XXX pretend we did it all */ 3711 xfer->ux_actlen = offs; 3712 xfer->ux_status = USBD_IN_PROGRESS; 3713 3714 #ifdef OHCI_DEBUG 3715 if (ohcidebug >= 5) { 3716 DPRINTF("frame=%d", O32TOH(sc->sc_hcca->hcca_frame_number), 3717 0, 0, 0); 3718 ohci_dump_itds(sc, xfer->ux_hcpriv); 3719 ohci_dump_ed(sc, sed); 3720 } 3721 #endif 3722 3723 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3724 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3725 sed->ed.ed_tailp = HTOO32(tail->physaddr); 3726 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3727 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3728 sizeof(sed->ed.ed_flags), 3729 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3730 mutex_exit(&sc->sc_lock); 3731 } 3732 3733 void 3734 ohci_device_isoc_abort(struct usbd_xfer *xfer) 3735 { 3736 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 3737 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3738 ohci_soft_ed_t *sed; 3739 ohci_soft_itd_t *sitd; 3740 3741 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3742 DPRINTFN(1, "xfer=%p", xfer, 0, 0, 0); 3743 3744 KASSERT(mutex_owned(&sc->sc_lock)); 3745 3746 /* Transfer is already done. */ 3747 if (xfer->ux_status != USBD_NOT_STARTED && 3748 xfer->ux_status != USBD_IN_PROGRESS) { 3749 printf("ohci_device_isoc_abort: early return\n"); 3750 goto done; 3751 } 3752 3753 /* Give xfer the requested abort code. */ 3754 xfer->ux_status = USBD_CANCELLED; 3755 3756 sed = opipe->sed; 3757 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3758 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3759 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */ 3760 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3761 sizeof(sed->ed.ed_flags), 3762 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3763 3764 sitd = xfer->ux_hcpriv; 3765 KASSERT(sitd); 3766 3767 usb_delay_ms_locked(&sc->sc_bus, OHCI_ITD_NOFFSET, &sc->sc_lock); 3768 3769 for (; sitd->xfer == xfer; sitd = sitd->nextitd) { 3770 ohci_hash_rem_itd(sc, sitd); 3771 #ifdef DIAGNOSTIC 3772 DPRINTFN(1, "abort sets done sitd=%p", sitd, 0, 0, 0); 3773 sitd->isdone = true; 3774 #endif 3775 } 3776 3777 /* Run callback. */ 3778 usb_transfer_complete(xfer); 3779 3780 sed->ed.ed_headp = HTOO32(sitd->physaddr); /* unlink TDs */ 3781 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */ 3782 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3783 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3784 3785 done: 3786 KASSERT(mutex_owned(&sc->sc_lock)); 3787 } 3788 3789 void 3790 ohci_device_isoc_done(struct usbd_xfer *xfer) 3791 { 3792 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3793 DPRINTFN(1, "xfer=%p", xfer, 0, 0, 0); 3794 } 3795 3796 usbd_status 3797 ohci_setup_isoc(struct usbd_pipe *pipe) 3798 { 3799 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 3800 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 3801 struct isoc *isoc = &opipe->isoc; 3802 3803 isoc->next = -1; 3804 isoc->inuse = 0; 3805 3806 mutex_enter(&sc->sc_lock); 3807 ohci_add_ed(sc, opipe->sed, sc->sc_isoc_head); 3808 mutex_exit(&sc->sc_lock); 3809 3810 return USBD_NORMAL_COMPLETION; 3811 } 3812 3813 void 3814 ohci_device_isoc_close(struct usbd_pipe *pipe) 3815 { 3816 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 3817 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 3818 3819 KASSERT(mutex_owned(&sc->sc_lock)); 3820 3821 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3822 DPRINTF("pipe=%p", pipe, 0, 0, 0); 3823 ohci_close_pipe(pipe, sc->sc_isoc_head); 3824 #ifdef DIAGNOSTIC 3825 opipe->tail.itd->isdone = true; 3826 #endif 3827 ohci_free_sitd_locked(sc, opipe->tail.itd); 3828 } 3829
Indexes created Fri Oct 03 02:09:57 GMT 2025