ohci.c revision 1.256
1 /* $NetBSD: ohci.c,v 1.256 2015/08/19 06:23:35 skrll Exp $ */ 2 3 /* 4 * Copyright (c) 1998, 2004, 2005, 2012 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net) at 9 * Carlstedt Research & Technology, Jared D. McNeill (jmcneill (at) invisible.ca) 10 * and Matthew R. Green (mrg (at) eterna.com.au). 11 * This code is derived from software contributed to The NetBSD Foundation 12 * by Charles M. Hannum. 13 * 14 * Redistribution and use in source and binary forms, with or without 15 * modification, are permitted provided that the following conditions 16 * are met: 17 * 1. Redistributions of source code must retain the above copyright 18 * notice, this list of conditions and the following disclaimer. 19 * 2. Redistributions in binary form must reproduce the above copyright 20 * notice, this list of conditions and the following disclaimer in the 21 * documentation and/or other materials provided with the distribution. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 24 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 25 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 26 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 27 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 31 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 32 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 33 * POSSIBILITY OF SUCH DAMAGE. 34 */ 35 36 /* 37 * USB Open Host Controller driver. 38 * 39 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html 40 * USB spec: http://www.usb.org/developers/docs/ 41 */ 42 43 #include <sys/cdefs.h> 44 __KERNEL_RCSID(0, "$NetBSD: ohci.c,v 1.256 2015/08/19 06:23:35 skrll Exp $"); 45 46 #include <sys/param.h> 47 #include <sys/systm.h> 48 #include <sys/kmem.h> 49 #include <sys/kernel.h> 50 #include <sys/device.h> 51 #include <sys/select.h> 52 #include <sys/proc.h> 53 #include <sys/queue.h> 54 #include <sys/cpu.h> 55 56 #include <machine/endian.h> 57 58 #include <dev/usb/usb.h> 59 #include <dev/usb/usbdi.h> 60 #include <dev/usb/usbdivar.h> 61 #include <dev/usb/usb_mem.h> 62 #include <dev/usb/usb_quirks.h> 63 64 #include <dev/usb/ohcireg.h> 65 #include <dev/usb/ohcivar.h> 66 #include <dev/usb/usbroothub_subr.h> 67 68 69 70 #ifdef OHCI_DEBUG 71 #define DPRINTF(x) if (ohcidebug) printf x 72 #define DPRINTFN(n,x) if (ohcidebug>(n)) printf x 73 int ohcidebug = 0; 74 #else 75 #define DPRINTF(x) 76 #define DPRINTFN(n,x) 77 #endif 78 79 #if BYTE_ORDER == BIG_ENDIAN 80 #define SWAP_ENDIAN OHCI_LITTLE_ENDIAN 81 #else 82 #define SWAP_ENDIAN OHCI_BIG_ENDIAN 83 #endif 84 85 #define O16TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap16(val) : val) 86 #define O32TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap32(val) : val) 87 #define HTOO16(val) O16TOH(val) 88 #define HTOO32(val) O32TOH(val) 89 90 struct ohci_pipe; 91 92 Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *); 93 Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *); 94 95 Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *); 96 Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *); 97 98 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *); 99 Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *); 100 101 Static void ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *, 102 ohci_soft_td_t *); 103 Static usbd_status ohci_alloc_std_chain(struct ohci_pipe *, 104 ohci_softc_t *, int, int, usbd_xfer_handle, 105 ohci_soft_td_t *, ohci_soft_td_t **); 106 107 Static usbd_status ohci_open(usbd_pipe_handle); 108 Static void ohci_poll(struct usbd_bus *); 109 Static void ohci_softintr(void *); 110 Static void ohci_waitintr(ohci_softc_t *, usbd_xfer_handle); 111 Static void ohci_rhsc(ohci_softc_t *, usbd_xfer_handle); 112 Static void ohci_rhsc_softint(void *arg); 113 114 Static usbd_status ohci_device_request(usbd_xfer_handle xfer); 115 Static void ohci_add_ed(ohci_softc_t *, ohci_soft_ed_t *, 116 ohci_soft_ed_t *); 117 118 Static void ohci_rem_ed(ohci_softc_t *, ohci_soft_ed_t *, 119 ohci_soft_ed_t *); 120 Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *); 121 Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *); 122 Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t); 123 Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *); 124 Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *); 125 Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t); 126 127 Static usbd_status ohci_setup_isoc(usbd_pipe_handle pipe); 128 Static void ohci_device_isoc_enter(usbd_xfer_handle); 129 130 Static usbd_status ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 131 Static void ohci_freem(struct usbd_bus *, usb_dma_t *); 132 133 Static usbd_xfer_handle ohci_allocx(struct usbd_bus *); 134 Static void ohci_freex(struct usbd_bus *, usbd_xfer_handle); 135 Static void ohci_get_lock(struct usbd_bus *, kmutex_t **); 136 137 Static usbd_status ohci_root_ctrl_transfer(usbd_xfer_handle); 138 Static usbd_status ohci_root_ctrl_start(usbd_xfer_handle); 139 Static void ohci_root_ctrl_abort(usbd_xfer_handle); 140 Static void ohci_root_ctrl_close(usbd_pipe_handle); 141 Static void ohci_root_ctrl_done(usbd_xfer_handle); 142 143 Static usbd_status ohci_root_intr_transfer(usbd_xfer_handle); 144 Static usbd_status ohci_root_intr_start(usbd_xfer_handle); 145 Static void ohci_root_intr_abort(usbd_xfer_handle); 146 Static void ohci_root_intr_close(usbd_pipe_handle); 147 Static void ohci_root_intr_done(usbd_xfer_handle); 148 149 Static usbd_status ohci_device_ctrl_transfer(usbd_xfer_handle); 150 Static usbd_status ohci_device_ctrl_start(usbd_xfer_handle); 151 Static void ohci_device_ctrl_abort(usbd_xfer_handle); 152 Static void ohci_device_ctrl_close(usbd_pipe_handle); 153 Static void ohci_device_ctrl_done(usbd_xfer_handle); 154 155 Static usbd_status ohci_device_bulk_transfer(usbd_xfer_handle); 156 Static usbd_status ohci_device_bulk_start(usbd_xfer_handle); 157 Static void ohci_device_bulk_abort(usbd_xfer_handle); 158 Static void ohci_device_bulk_close(usbd_pipe_handle); 159 Static void ohci_device_bulk_done(usbd_xfer_handle); 160 161 Static usbd_status ohci_device_intr_transfer(usbd_xfer_handle); 162 Static usbd_status ohci_device_intr_start(usbd_xfer_handle); 163 Static void ohci_device_intr_abort(usbd_xfer_handle); 164 Static void ohci_device_intr_close(usbd_pipe_handle); 165 Static void ohci_device_intr_done(usbd_xfer_handle); 166 167 Static usbd_status ohci_device_isoc_transfer(usbd_xfer_handle); 168 Static usbd_status ohci_device_isoc_start(usbd_xfer_handle); 169 Static void ohci_device_isoc_abort(usbd_xfer_handle); 170 Static void ohci_device_isoc_close(usbd_pipe_handle); 171 Static void ohci_device_isoc_done(usbd_xfer_handle); 172 173 Static usbd_status ohci_device_setintr(ohci_softc_t *sc, 174 struct ohci_pipe *pipe, int ival); 175 176 Static void ohci_timeout(void *); 177 Static void ohci_timeout_task(void *); 178 Static void ohci_rhsc_enable(void *); 179 180 Static void ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *); 181 Static void ohci_abort_xfer(usbd_xfer_handle, usbd_status); 182 183 Static void ohci_device_clear_toggle(usbd_pipe_handle pipe); 184 Static void ohci_noop(usbd_pipe_handle pipe); 185 186 #ifdef OHCI_DEBUG 187 Static void ohci_dumpregs(ohci_softc_t *); 188 Static void ohci_dump_tds(ohci_softc_t *, ohci_soft_td_t *); 189 Static void ohci_dump_td(ohci_softc_t *, ohci_soft_td_t *); 190 Static void ohci_dump_ed(ohci_softc_t *, ohci_soft_ed_t *); 191 Static void ohci_dump_itd(ohci_softc_t *, ohci_soft_itd_t *); 192 Static void ohci_dump_itds(ohci_softc_t *, ohci_soft_itd_t *); 193 #endif 194 195 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 196 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 197 #define OWRITE1(sc, r, x) \ 198 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 199 #define OWRITE2(sc, r, x) \ 200 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 201 #define OWRITE4(sc, r, x) \ 202 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 203 204 static __inline uint32_t 205 OREAD4(ohci_softc_t *sc, bus_size_t r) 206 { 207 208 OBARR(sc); 209 return bus_space_read_4(sc->iot, sc->ioh, r); 210 } 211 212 /* Reverse the bits in a value 0 .. 31 */ 213 Static u_int8_t revbits[OHCI_NO_INTRS] = 214 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 215 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 216 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 217 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 218 219 struct ohci_pipe { 220 struct usbd_pipe pipe; 221 ohci_soft_ed_t *sed; 222 union { 223 ohci_soft_td_t *td; 224 ohci_soft_itd_t *itd; 225 } tail; 226 /* Info needed for different pipe kinds. */ 227 union { 228 /* Control pipe */ 229 struct { 230 usb_dma_t reqdma; 231 u_int length; 232 ohci_soft_td_t *setup, *data, *stat; 233 } ctl; 234 /* Interrupt pipe */ 235 struct { 236 int nslots; 237 int pos; 238 } intr; 239 /* Bulk pipe */ 240 struct { 241 u_int length; 242 int isread; 243 } bulk; 244 /* Iso pipe */ 245 struct iso { 246 int next, inuse; 247 } iso; 248 } u; 249 }; 250 251 #define OHCI_INTR_ENDPT 1 252 253 Static const struct usbd_bus_methods ohci_bus_methods = { 254 .open_pipe = ohci_open, 255 .soft_intr = ohci_softintr, 256 .do_poll = ohci_poll, 257 .allocm = ohci_allocm, 258 .freem = ohci_freem, 259 .allocx = ohci_allocx, 260 .freex = ohci_freex, 261 .get_lock = ohci_get_lock, 262 .new_device = NULL, 263 }; 264 265 Static const struct usbd_pipe_methods ohci_root_ctrl_methods = { 266 .transfer = ohci_root_ctrl_transfer, 267 .start = ohci_root_ctrl_start, 268 .abort = ohci_root_ctrl_abort, 269 .close = ohci_root_ctrl_close, 270 .cleartoggle = ohci_noop, 271 .done = ohci_root_ctrl_done, 272 }; 273 274 Static const struct usbd_pipe_methods ohci_root_intr_methods = { 275 .transfer = ohci_root_intr_transfer, 276 .start = ohci_root_intr_start, 277 .abort = ohci_root_intr_abort, 278 .close = ohci_root_intr_close, 279 .cleartoggle = ohci_noop, 280 .done = ohci_root_intr_done, 281 }; 282 283 Static const struct usbd_pipe_methods ohci_device_ctrl_methods = { 284 .transfer = ohci_device_ctrl_transfer, 285 .start = ohci_device_ctrl_start, 286 .abort = ohci_device_ctrl_abort, 287 .close = ohci_device_ctrl_close, 288 .cleartoggle = ohci_noop, 289 .done = ohci_device_ctrl_done, 290 }; 291 292 Static const struct usbd_pipe_methods ohci_device_intr_methods = { 293 .transfer = ohci_device_intr_transfer, 294 .start = ohci_device_intr_start, 295 .abort = ohci_device_intr_abort, 296 .close = ohci_device_intr_close, 297 .cleartoggle = ohci_device_clear_toggle, 298 .done = ohci_device_intr_done, 299 }; 300 301 Static const struct usbd_pipe_methods ohci_device_bulk_methods = { 302 .transfer = ohci_device_bulk_transfer, 303 .start = ohci_device_bulk_start, 304 .abort = ohci_device_bulk_abort, 305 .close = ohci_device_bulk_close, 306 .cleartoggle = ohci_device_clear_toggle, 307 .done = ohci_device_bulk_done, 308 }; 309 310 Static const struct usbd_pipe_methods ohci_device_isoc_methods = { 311 .transfer = ohci_device_isoc_transfer, 312 .start = ohci_device_isoc_start, 313 .abort = ohci_device_isoc_abort, 314 .close = ohci_device_isoc_close, 315 .cleartoggle = ohci_noop, 316 .done = ohci_device_isoc_done, 317 }; 318 319 int 320 ohci_activate(device_t self, enum devact act) 321 { 322 struct ohci_softc *sc = device_private(self); 323 324 switch (act) { 325 case DVACT_DEACTIVATE: 326 sc->sc_dying = 1; 327 return 0; 328 default: 329 return EOPNOTSUPP; 330 } 331 } 332 333 void 334 ohci_childdet(device_t self, device_t child) 335 { 336 struct ohci_softc *sc = device_private(self); 337 338 KASSERT(sc->sc_child == child); 339 sc->sc_child = NULL; 340 } 341 342 int 343 ohci_detach(struct ohci_softc *sc, int flags) 344 { 345 int rv = 0; 346 347 if (sc->sc_child != NULL) 348 rv = config_detach(sc->sc_child, flags); 349 350 if (rv != 0) 351 return (rv); 352 353 callout_halt(&sc->sc_tmo_rhsc, &sc->sc_lock); 354 355 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 356 callout_destroy(&sc->sc_tmo_rhsc); 357 358 softint_disestablish(sc->sc_rhsc_si); 359 360 cv_destroy(&sc->sc_softwake_cv); 361 362 mutex_destroy(&sc->sc_lock); 363 mutex_destroy(&sc->sc_intr_lock); 364 365 if (sc->sc_hcca != NULL) 366 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 367 pool_cache_destroy(sc->sc_xferpool); 368 369 return (rv); 370 } 371 372 ohci_soft_ed_t * 373 ohci_alloc_sed(ohci_softc_t *sc) 374 { 375 ohci_soft_ed_t *sed; 376 usbd_status err; 377 int i, offs; 378 usb_dma_t dma; 379 380 if (sc->sc_freeeds == NULL) { 381 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 382 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 383 OHCI_ED_ALIGN, &dma); 384 if (err) 385 return (0); 386 for (i = 0; i < OHCI_SED_CHUNK; i++) { 387 offs = i * OHCI_SED_SIZE; 388 sed = KERNADDR(&dma, offs); 389 sed->physaddr = DMAADDR(&dma, offs); 390 sed->dma = dma; 391 sed->offs = offs; 392 sed->next = sc->sc_freeeds; 393 sc->sc_freeeds = sed; 394 } 395 } 396 sed = sc->sc_freeeds; 397 sc->sc_freeeds = sed->next; 398 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 399 sed->next = 0; 400 return (sed); 401 } 402 403 void 404 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 405 { 406 sed->next = sc->sc_freeeds; 407 sc->sc_freeeds = sed; 408 } 409 410 ohci_soft_td_t * 411 ohci_alloc_std(ohci_softc_t *sc) 412 { 413 ohci_soft_td_t *std; 414 usbd_status err; 415 int i, offs; 416 usb_dma_t dma; 417 418 KASSERT(sc->sc_bus.use_polling || mutex_owned(&sc->sc_lock)); 419 420 if (sc->sc_freetds == NULL) { 421 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 422 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 423 OHCI_TD_ALIGN, &dma); 424 if (err) 425 return (NULL); 426 for(i = 0; i < OHCI_STD_CHUNK; i++) { 427 offs = i * OHCI_STD_SIZE; 428 std = KERNADDR(&dma, offs); 429 std->physaddr = DMAADDR(&dma, offs); 430 std->dma = dma; 431 std->offs = offs; 432 std->nexttd = sc->sc_freetds; 433 sc->sc_freetds = std; 434 } 435 } 436 437 std = sc->sc_freetds; 438 sc->sc_freetds = std->nexttd; 439 memset(&std->td, 0, sizeof(ohci_td_t)); 440 std->nexttd = NULL; 441 std->xfer = NULL; 442 ohci_hash_add_td(sc, std); 443 444 return (std); 445 } 446 447 void 448 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std) 449 { 450 KASSERT(sc->sc_bus.use_polling || mutex_owned(&sc->sc_lock)); 451 452 ohci_hash_rem_td(sc, std); 453 std->nexttd = sc->sc_freetds; 454 sc->sc_freetds = std; 455 } 456 457 usbd_status 458 ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc, 459 int alen, int rd, usbd_xfer_handle xfer, 460 ohci_soft_td_t *sp, ohci_soft_td_t **ep) 461 { 462 ohci_soft_td_t *next, *cur; 463 ohci_physaddr_t dataphys, dataphysend; 464 u_int32_t tdflags; 465 int len, curlen; 466 usb_dma_t *dma = &xfer->dmabuf; 467 u_int16_t flags = xfer->flags; 468 469 DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen)); 470 471 KASSERT(mutex_owned(&sc->sc_lock)); 472 473 len = alen; 474 cur = sp; 475 dataphys = DMAADDR(dma, 0); 476 dataphysend = OHCI_PAGE(dataphys + len - 1); 477 usb_syncmem(dma, 0, len, 478 rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 479 tdflags = HTOO32( 480 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 481 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) | 482 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR); 483 484 for (;;) { 485 next = ohci_alloc_std(sc); 486 if (next == NULL) 487 goto nomem; 488 489 /* The OHCI hardware can handle at most one page crossing. */ 490 if (OHCI_PAGE(dataphys) == dataphysend || 491 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) { 492 /* we can handle it in this TD */ 493 curlen = len; 494 } else { 495 /* must use multiple TDs, fill as much as possible. */ 496 curlen = 2 * OHCI_PAGE_SIZE - 497 (dataphys & (OHCI_PAGE_SIZE-1)); 498 /* the length must be a multiple of the max size */ 499 curlen -= curlen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize); 500 #ifdef DIAGNOSTIC 501 if (curlen == 0) 502 panic("ohci_alloc_std: curlen == 0"); 503 #endif 504 } 505 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x " 506 "dataphysend=0x%08x len=%d curlen=%d\n", 507 dataphys, dataphysend, 508 len, curlen)); 509 len -= curlen; 510 511 cur->td.td_flags = tdflags; 512 cur->td.td_cbp = HTOO32(dataphys); 513 cur->nexttd = next; 514 cur->td.td_nexttd = HTOO32(next->physaddr); 515 cur->td.td_be = HTOO32(dataphys + curlen - 1); 516 cur->len = curlen; 517 cur->flags = OHCI_ADD_LEN; 518 cur->xfer = xfer; 519 usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td), 520 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 521 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n", 522 dataphys, dataphys + curlen - 1)); 523 if (len == 0) 524 break; 525 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n")); 526 dataphys += curlen; 527 cur = next; 528 } 529 if (!rd && (flags & USBD_FORCE_SHORT_XFER) && 530 alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) { 531 /* Force a 0 length transfer at the end. */ 532 533 cur = next; 534 next = ohci_alloc_std(sc); 535 if (next == NULL) 536 goto nomem; 537 538 cur->td.td_flags = tdflags; 539 cur->td.td_cbp = 0; /* indicate 0 length packet */ 540 cur->nexttd = next; 541 cur->td.td_nexttd = HTOO32(next->physaddr); 542 cur->td.td_be = ~0; 543 cur->len = 0; 544 cur->flags = 0; 545 cur->xfer = xfer; 546 usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td), 547 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 548 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n")); 549 } 550 *ep = cur; 551 552 return (USBD_NORMAL_COMPLETION); 553 554 nomem: 555 556 /* Don't free sp - let the caller do that */ 557 ohci_free_std_chain(sc, sp->nexttd, NULL); 558 559 return (USBD_NOMEM); 560 } 561 562 Static void 563 ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std, 564 ohci_soft_td_t *stdend) 565 { 566 ohci_soft_td_t *p; 567 568 for (; std != stdend; std = p) { 569 p = std->nexttd; 570 ohci_free_std(sc, std); 571 } 572 } 573 574 ohci_soft_itd_t * 575 ohci_alloc_sitd(ohci_softc_t *sc) 576 { 577 ohci_soft_itd_t *sitd; 578 usbd_status err; 579 int i, offs; 580 usb_dma_t dma; 581 582 if (sc->sc_freeitds == NULL) { 583 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n")); 584 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK, 585 OHCI_ITD_ALIGN, &dma); 586 if (err) 587 return (NULL); 588 for(i = 0; i < OHCI_SITD_CHUNK; i++) { 589 offs = i * OHCI_SITD_SIZE; 590 sitd = KERNADDR(&dma, offs); 591 sitd->physaddr = DMAADDR(&dma, offs); 592 sitd->dma = dma; 593 sitd->offs = offs; 594 sitd->nextitd = sc->sc_freeitds; 595 sc->sc_freeitds = sitd; 596 } 597 } 598 599 sitd = sc->sc_freeitds; 600 sc->sc_freeitds = sitd->nextitd; 601 memset(&sitd->itd, 0, sizeof(ohci_itd_t)); 602 sitd->nextitd = NULL; 603 sitd->xfer = NULL; 604 ohci_hash_add_itd(sc, sitd); 605 606 #ifdef DIAGNOSTIC 607 sitd->isdone = 0; 608 #endif 609 610 return (sitd); 611 } 612 613 void 614 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 615 { 616 617 DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd)); 618 619 #ifdef DIAGNOSTIC 620 if (!sitd->isdone) { 621 panic("ohci_free_sitd: sitd=%p not done", sitd); 622 return; 623 } 624 /* Warn double free */ 625 sitd->isdone = 0; 626 #endif 627 628 ohci_hash_rem_itd(sc, sitd); 629 sitd->nextitd = sc->sc_freeitds; 630 sc->sc_freeitds = sitd; 631 } 632 633 usbd_status 634 ohci_init(ohci_softc_t *sc) 635 { 636 ohci_soft_ed_t *sed, *psed; 637 usbd_status err; 638 int i; 639 u_int32_t s, ctl, rwc, ival, hcr, fm, per, rev, desca /*, descb */; 640 641 DPRINTF(("ohci_init: start\n")); 642 aprint_normal_dev(sc->sc_dev, ""); 643 644 sc->sc_hcca = NULL; 645 callout_init(&sc->sc_tmo_rhsc, CALLOUT_MPSAFE); 646 647 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_SOFTUSB); 648 mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_USB); 649 cv_init(&sc->sc_softwake_cv, "ohciab"); 650 651 sc->sc_rhsc_si = softint_establish(SOFTINT_NET | SOFTINT_MPSAFE, 652 ohci_rhsc_softint, sc); 653 654 for (i = 0; i < OHCI_HASH_SIZE; i++) 655 LIST_INIT(&sc->sc_hash_tds[i]); 656 for (i = 0; i < OHCI_HASH_SIZE; i++) 657 LIST_INIT(&sc->sc_hash_itds[i]); 658 659 sc->sc_xferpool = pool_cache_init(sizeof(struct ohci_xfer), 0, 0, 0, 660 "ohcixfer", NULL, IPL_USB, NULL, NULL, NULL); 661 662 rev = OREAD4(sc, OHCI_REVISION); 663 aprint_normal("OHCI version %d.%d%s\n", 664 OHCI_REV_HI(rev), OHCI_REV_LO(rev), 665 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 666 667 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 668 aprint_error_dev(sc->sc_dev, "unsupported OHCI revision\n"); 669 sc->sc_bus.usbrev = USBREV_UNKNOWN; 670 return (USBD_INVAL); 671 } 672 sc->sc_bus.usbrev = USBREV_1_0; 673 674 usb_setup_reserve(sc->sc_dev, &sc->sc_dma_reserve, sc->sc_bus.dmatag, 675 USB_MEM_RESERVE); 676 677 /* XXX determine alignment by R/W */ 678 /* Allocate the HCCA area. */ 679 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 680 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 681 if (err) { 682 sc->sc_hcca = NULL; 683 return err; 684 } 685 sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0); 686 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 687 688 sc->sc_eintrs = OHCI_NORMAL_INTRS; 689 690 /* Allocate dummy ED that starts the control list. */ 691 sc->sc_ctrl_head = ohci_alloc_sed(sc); 692 if (sc->sc_ctrl_head == NULL) { 693 err = USBD_NOMEM; 694 goto bad1; 695 } 696 sc->sc_ctrl_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 697 698 /* Allocate dummy ED that starts the bulk list. */ 699 sc->sc_bulk_head = ohci_alloc_sed(sc); 700 if (sc->sc_bulk_head == NULL) { 701 err = USBD_NOMEM; 702 goto bad2; 703 } 704 sc->sc_bulk_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 705 usb_syncmem(&sc->sc_bulk_head->dma, sc->sc_bulk_head->offs, 706 sizeof(sc->sc_bulk_head->ed), 707 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 708 709 /* Allocate dummy ED that starts the isochronous list. */ 710 sc->sc_isoc_head = ohci_alloc_sed(sc); 711 if (sc->sc_isoc_head == NULL) { 712 err = USBD_NOMEM; 713 goto bad3; 714 } 715 sc->sc_isoc_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 716 usb_syncmem(&sc->sc_isoc_head->dma, sc->sc_isoc_head->offs, 717 sizeof(sc->sc_isoc_head->ed), 718 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 719 720 /* Allocate all the dummy EDs that make up the interrupt tree. */ 721 for (i = 0; i < OHCI_NO_EDS; i++) { 722 sed = ohci_alloc_sed(sc); 723 if (sed == NULL) { 724 while (--i >= 0) 725 ohci_free_sed(sc, sc->sc_eds[i]); 726 err = USBD_NOMEM; 727 goto bad4; 728 } 729 /* All ED fields are set to 0. */ 730 sc->sc_eds[i] = sed; 731 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 732 if (i != 0) 733 psed = sc->sc_eds[(i-1) / 2]; 734 else 735 psed= sc->sc_isoc_head; 736 sed->next = psed; 737 sed->ed.ed_nexted = HTOO32(psed->physaddr); 738 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 739 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 740 } 741 /* 742 * Fill HCCA interrupt table. The bit reversal is to get 743 * the tree set up properly to spread the interrupts. 744 */ 745 for (i = 0; i < OHCI_NO_INTRS; i++) 746 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 747 HTOO32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 748 usb_syncmem(&sc->sc_hccadma, 0, OHCI_HCCA_SIZE, 749 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 750 751 #ifdef OHCI_DEBUG 752 if (ohcidebug > 15) { 753 for (i = 0; i < OHCI_NO_EDS; i++) { 754 printf("ed#%d ", i); 755 ohci_dump_ed(sc, sc->sc_eds[i]); 756 } 757 printf("iso "); 758 ohci_dump_ed(sc, sc->sc_isoc_head); 759 } 760 #endif 761 762 /* Preserve values programmed by SMM/BIOS but lost over reset. */ 763 ctl = OREAD4(sc, OHCI_CONTROL); 764 rwc = ctl & OHCI_RWC; 765 fm = OREAD4(sc, OHCI_FM_INTERVAL); 766 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 767 /* descb = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); */ 768 769 /* Determine in what context we are running. */ 770 if (ctl & OHCI_IR) { 771 /* SMM active, request change */ 772 DPRINTF(("ohci_init: SMM active, request owner change\n")); 773 if ((sc->sc_intre & (OHCI_OC | OHCI_MIE)) == 774 (OHCI_OC | OHCI_MIE)) 775 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_MIE); 776 s = OREAD4(sc, OHCI_COMMAND_STATUS); 777 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 778 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 779 usb_delay_ms(&sc->sc_bus, 1); 780 ctl = OREAD4(sc, OHCI_CONTROL); 781 } 782 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_MIE); 783 if ((ctl & OHCI_IR) == 0) { 784 aprint_error_dev(sc->sc_dev, 785 "SMM does not respond, resetting\n"); 786 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 787 goto reset; 788 } 789 #if 0 790 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */ 791 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 792 /* BIOS started controller. */ 793 DPRINTF(("ohci_init: BIOS active\n")); 794 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 795 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL | rwc); 796 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 797 } 798 #endif 799 } else { 800 DPRINTF(("ohci_init: cold started\n")); 801 reset: 802 /* Controller was cold started. */ 803 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 804 } 805 806 /* 807 * This reset should not be necessary according to the OHCI spec, but 808 * without it some controllers do not start. 809 */ 810 DPRINTF(("%s: resetting\n", device_xname(sc->sc_dev))); 811 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 812 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 813 814 /* We now own the host controller and the bus has been reset. */ 815 816 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 817 /* Nominal time for a reset is 10 us. */ 818 for (i = 0; i < 10; i++) { 819 delay(10); 820 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 821 if (!hcr) 822 break; 823 } 824 if (hcr) { 825 aprint_error_dev(sc->sc_dev, "reset timeout\n"); 826 err = USBD_IOERROR; 827 goto bad5; 828 } 829 #ifdef OHCI_DEBUG 830 if (ohcidebug > 15) 831 ohci_dumpregs(sc); 832 #endif 833 834 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 835 836 /* Set up HC registers. */ 837 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 838 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 839 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 840 /* disable all interrupts and then switch on all desired interrupts */ 841 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 842 /* switch on desired functional features */ 843 ctl = OREAD4(sc, OHCI_CONTROL); 844 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 845 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 846 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL | rwc; 847 /* And finally start it! */ 848 OWRITE4(sc, OHCI_CONTROL, ctl); 849 850 /* 851 * The controller is now OPERATIONAL. Set a some final 852 * registers that should be set earlier, but that the 853 * controller ignores when in the SUSPEND state. 854 */ 855 ival = OHCI_GET_IVAL(fm); 856 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 857 fm |= OHCI_FSMPS(ival) | ival; 858 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 859 per = OHCI_PERIODIC(ival); /* 90% periodic */ 860 OWRITE4(sc, OHCI_PERIODIC_START, per); 861 862 if (sc->sc_flags & OHCIF_SUPERIO) { 863 /* no overcurrent protection */ 864 desca |= OHCI_NOCP; 865 /* 866 * Clear NoPowerSwitching and PowerOnToPowerGoodTime meaning 867 * that 868 * - ports are always power switched 869 * - don't wait for powered root hub port 870 */ 871 desca &= ~(__SHIFTIN(0xff, OHCI_POTPGT_MASK) | OHCI_NPS); 872 } 873 874 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */ 875 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP); 876 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 877 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY); 878 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca); 879 880 /* 881 * The AMD756 requires a delay before re-reading the register, 882 * otherwise it will occasionally report 0 ports. 883 */ 884 sc->sc_noport = 0; 885 for (i = 0; i < 10 && sc->sc_noport == 0; i++) { 886 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY); 887 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 888 } 889 890 #ifdef OHCI_DEBUG 891 if (ohcidebug > 5) 892 ohci_dumpregs(sc); 893 #endif 894 895 /* Set up the bus struct. */ 896 sc->sc_bus.methods = &ohci_bus_methods; 897 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 898 899 sc->sc_control = sc->sc_intre = 0; 900 901 /* Finally, turn on interrupts. */ 902 DPRINTFN(1,("ohci_init: enabling %#x\n", sc->sc_eintrs | OHCI_MIE)); 903 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 904 905 return (USBD_NORMAL_COMPLETION); 906 907 bad5: 908 for (i = 0; i < OHCI_NO_EDS; i++) 909 ohci_free_sed(sc, sc->sc_eds[i]); 910 bad4: 911 ohci_free_sed(sc, sc->sc_isoc_head); 912 bad3: 913 ohci_free_sed(sc, sc->sc_bulk_head); 914 bad2: 915 ohci_free_sed(sc, sc->sc_ctrl_head); 916 bad1: 917 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 918 sc->sc_hcca = NULL; 919 return (err); 920 } 921 922 usbd_status 923 ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 924 { 925 struct ohci_softc *sc = bus->hci_private; 926 usbd_status status; 927 928 status = usb_allocmem(&sc->sc_bus, size, 0, dma); 929 if (status == USBD_NOMEM) 930 status = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size); 931 return status; 932 } 933 934 void 935 ohci_freem(struct usbd_bus *bus, usb_dma_t *dma) 936 { 937 struct ohci_softc *sc = bus->hci_private; 938 if (dma->block->flags & USB_DMA_RESERVE) { 939 usb_reserve_freem(&sc->sc_dma_reserve, dma); 940 return; 941 } 942 usb_freemem(&sc->sc_bus, dma); 943 } 944 945 usbd_xfer_handle 946 ohci_allocx(struct usbd_bus *bus) 947 { 948 struct ohci_softc *sc = bus->hci_private; 949 usbd_xfer_handle xfer; 950 951 xfer = pool_cache_get(sc->sc_xferpool, PR_NOWAIT); 952 if (xfer != NULL) { 953 memset(xfer, 0, sizeof(struct ohci_xfer)); 954 #ifdef DIAGNOSTIC 955 xfer->busy_free = XFER_BUSY; 956 #endif 957 } 958 return (xfer); 959 } 960 961 void 962 ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 963 { 964 struct ohci_softc *sc = bus->hci_private; 965 966 #ifdef DIAGNOSTIC 967 if (xfer->busy_free != XFER_BUSY) { 968 printf("ohci_freex: xfer=%p not busy, 0x%08x\n", xfer, 969 xfer->busy_free); 970 } 971 xfer->busy_free = XFER_FREE; 972 #endif 973 pool_cache_put(sc->sc_xferpool, xfer); 974 } 975 976 Static void 977 ohci_get_lock(struct usbd_bus *bus, kmutex_t **lock) 978 { 979 struct ohci_softc *sc = bus->hci_private; 980 981 *lock = &sc->sc_lock; 982 } 983 984 /* 985 * Shut down the controller when the system is going down. 986 */ 987 bool 988 ohci_shutdown(device_t self, int flags) 989 { 990 ohci_softc_t *sc = device_private(self); 991 992 DPRINTF(("ohci_shutdown: stopping the HC\n")); 993 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 994 return true; 995 } 996 997 bool 998 ohci_resume(device_t dv, const pmf_qual_t *qual) 999 { 1000 ohci_softc_t *sc = device_private(dv); 1001 uint32_t ctl; 1002 1003 mutex_spin_enter(&sc->sc_intr_lock); 1004 sc->sc_bus.use_polling++; 1005 mutex_spin_exit(&sc->sc_intr_lock); 1006 1007 /* Some broken BIOSes do not recover these values */ 1008 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 1009 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, 1010 sc->sc_ctrl_head->physaddr); 1011 OWRITE4(sc, OHCI_BULK_HEAD_ED, 1012 sc->sc_bulk_head->physaddr); 1013 if (sc->sc_intre) 1014 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_intre & 1015 (OHCI_ALL_INTRS | OHCI_MIE)); 1016 if (sc->sc_control) 1017 ctl = sc->sc_control; 1018 else 1019 ctl = OREAD4(sc, OHCI_CONTROL); 1020 ctl |= OHCI_HCFS_RESUME; 1021 OWRITE4(sc, OHCI_CONTROL, ctl); 1022 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 1023 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL; 1024 OWRITE4(sc, OHCI_CONTROL, ctl); 1025 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 1026 sc->sc_control = sc->sc_intre = 0; 1027 1028 mutex_spin_enter(&sc->sc_intr_lock); 1029 sc->sc_bus.use_polling--; 1030 mutex_spin_exit(&sc->sc_intr_lock); 1031 1032 return true; 1033 } 1034 1035 bool 1036 ohci_suspend(device_t dv, const pmf_qual_t *qual) 1037 { 1038 ohci_softc_t *sc = device_private(dv); 1039 uint32_t ctl; 1040 1041 mutex_spin_enter(&sc->sc_intr_lock); 1042 sc->sc_bus.use_polling++; 1043 mutex_spin_exit(&sc->sc_intr_lock); 1044 1045 ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK; 1046 if (sc->sc_control == 0) { 1047 /* 1048 * Preserve register values, in case that BIOS 1049 * does not recover them. 1050 */ 1051 sc->sc_control = ctl; 1052 sc->sc_intre = OREAD4(sc, 1053 OHCI_INTERRUPT_ENABLE); 1054 } 1055 ctl |= OHCI_HCFS_SUSPEND; 1056 OWRITE4(sc, OHCI_CONTROL, ctl); 1057 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1058 1059 mutex_spin_enter(&sc->sc_intr_lock); 1060 sc->sc_bus.use_polling--; 1061 mutex_spin_exit(&sc->sc_intr_lock); 1062 1063 return true; 1064 } 1065 1066 #ifdef OHCI_DEBUG 1067 void 1068 ohci_dumpregs(ohci_softc_t *sc) 1069 { 1070 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 1071 OREAD4(sc, OHCI_REVISION), 1072 OREAD4(sc, OHCI_CONTROL), 1073 OREAD4(sc, OHCI_COMMAND_STATUS))); 1074 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 1075 OREAD4(sc, OHCI_INTERRUPT_STATUS), 1076 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 1077 OREAD4(sc, OHCI_INTERRUPT_DISABLE))); 1078 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 1079 OREAD4(sc, OHCI_HCCA), 1080 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 1081 OREAD4(sc, OHCI_CONTROL_HEAD_ED))); 1082 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 1083 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 1084 OREAD4(sc, OHCI_BULK_HEAD_ED), 1085 OREAD4(sc, OHCI_BULK_CURRENT_ED))); 1086 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 1087 OREAD4(sc, OHCI_DONE_HEAD), 1088 OREAD4(sc, OHCI_FM_INTERVAL), 1089 OREAD4(sc, OHCI_FM_REMAINING))); 1090 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 1091 OREAD4(sc, OHCI_FM_NUMBER), 1092 OREAD4(sc, OHCI_PERIODIC_START), 1093 OREAD4(sc, OHCI_LS_THRESHOLD))); 1094 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n", 1095 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 1096 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 1097 OREAD4(sc, OHCI_RH_STATUS))); 1098 DPRINTF((" port1=0x%08x port2=0x%08x\n", 1099 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 1100 OREAD4(sc, OHCI_RH_PORT_STATUS(2)))); 1101 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n", 1102 O32TOH(sc->sc_hcca->hcca_frame_number), 1103 O32TOH(sc->sc_hcca->hcca_done_head))); 1104 } 1105 #endif 1106 1107 Static int ohci_intr1(ohci_softc_t *); 1108 1109 int 1110 ohci_intr(void *p) 1111 { 1112 ohci_softc_t *sc = p; 1113 int ret = 0; 1114 1115 if (sc == NULL) 1116 return (0); 1117 1118 mutex_spin_enter(&sc->sc_intr_lock); 1119 1120 if (sc->sc_dying || !device_has_power(sc->sc_dev)) 1121 goto done; 1122 1123 /* If we get an interrupt while polling, then just ignore it. */ 1124 if (sc->sc_bus.use_polling) { 1125 #ifdef DIAGNOSTIC 1126 DPRINTFN(16, ("ohci_intr: ignored interrupt while polling\n")); 1127 #endif 1128 /* for level triggered intrs, should do something to ack */ 1129 OWRITE4(sc, OHCI_INTERRUPT_STATUS, 1130 OREAD4(sc, OHCI_INTERRUPT_STATUS)); 1131 1132 goto done; 1133 } 1134 1135 ret = ohci_intr1(sc); 1136 1137 done: 1138 mutex_spin_exit(&sc->sc_intr_lock); 1139 return ret; 1140 } 1141 1142 Static int 1143 ohci_intr1(ohci_softc_t *sc) 1144 { 1145 u_int32_t intrs, eintrs; 1146 1147 DPRINTFN(14,("ohci_intr1: enter\n")); 1148 1149 /* In case the interrupt occurs before initialization has completed. */ 1150 if (sc == NULL || sc->sc_hcca == NULL) { 1151 #ifdef DIAGNOSTIC 1152 printf("ohci_intr: sc->sc_hcca == NULL\n"); 1153 #endif 1154 return (0); 1155 } 1156 1157 KASSERT(mutex_owned(&sc->sc_intr_lock)); 1158 1159 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1160 if (!intrs) 1161 return (0); 1162 1163 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs & ~(OHCI_MIE|OHCI_WDH)); /* Acknowledge */ 1164 eintrs = intrs & sc->sc_eintrs; 1165 DPRINTFN(7, ("ohci_intr: sc=%p intrs=%#x(%#x) eintrs=%#x(%#x)\n", 1166 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 1167 (u_int)eintrs, sc->sc_eintrs)); 1168 1169 if (!eintrs) { 1170 return (0); 1171 } 1172 1173 sc->sc_bus.no_intrs++; 1174 if (eintrs & OHCI_SO) { 1175 sc->sc_overrun_cnt++; 1176 if (usbd_ratecheck(&sc->sc_overrun_ntc)) { 1177 printf("%s: %u scheduling overruns\n", 1178 device_xname(sc->sc_dev), sc->sc_overrun_cnt); 1179 sc->sc_overrun_cnt = 0; 1180 } 1181 /* XXX do what */ 1182 eintrs &= ~OHCI_SO; 1183 } 1184 if (eintrs & OHCI_WDH) { 1185 /* 1186 * We block the interrupt below, and reenable it later from 1187 * ohci_softintr(). 1188 */ 1189 usb_schedsoftintr(&sc->sc_bus); 1190 } 1191 if (eintrs & OHCI_RD) { 1192 printf("%s: resume detect\n", device_xname(sc->sc_dev)); 1193 /* XXX process resume detect */ 1194 } 1195 if (eintrs & OHCI_UE) { 1196 printf("%s: unrecoverable error, controller halted\n", 1197 device_xname(sc->sc_dev)); 1198 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1199 /* XXX what else */ 1200 } 1201 if (eintrs & OHCI_RHSC) { 1202 /* 1203 * We block the interrupt below, and reenable it later from 1204 * a timeout. 1205 */ 1206 softint_schedule(sc->sc_rhsc_si); 1207 } 1208 1209 if (eintrs != 0) { 1210 /* Block unprocessed interrupts. */ 1211 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs); 1212 sc->sc_eintrs &= ~eintrs; 1213 DPRINTFN(1, ("%s: blocking intrs 0x%x\n", 1214 device_xname(sc->sc_dev), eintrs)); 1215 } 1216 1217 return (1); 1218 } 1219 1220 void 1221 ohci_rhsc_enable(void *v_sc) 1222 { 1223 ohci_softc_t *sc = v_sc; 1224 1225 DPRINTFN(1, ("%s: %s\n", __func__, device_xname(sc->sc_dev))); 1226 mutex_spin_enter(&sc->sc_intr_lock); 1227 sc->sc_eintrs |= OHCI_RHSC; 1228 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1229 mutex_spin_exit(&sc->sc_intr_lock); 1230 } 1231 1232 #ifdef OHCI_DEBUG 1233 const char *ohci_cc_strs[] = { 1234 "NO_ERROR", 1235 "CRC", 1236 "BIT_STUFFING", 1237 "DATA_TOGGLE_MISMATCH", 1238 "STALL", 1239 "DEVICE_NOT_RESPONDING", 1240 "PID_CHECK_FAILURE", 1241 "UNEXPECTED_PID", 1242 "DATA_OVERRUN", 1243 "DATA_UNDERRUN", 1244 "BUFFER_OVERRUN", 1245 "BUFFER_UNDERRUN", 1246 "reserved", 1247 "reserved", 1248 "NOT_ACCESSED", 1249 "NOT_ACCESSED", 1250 }; 1251 #endif 1252 1253 void 1254 ohci_softintr(void *v) 1255 { 1256 struct usbd_bus *bus = v; 1257 ohci_softc_t *sc = bus->hci_private; 1258 ohci_soft_itd_t *sitd, *sidone, *sitdnext; 1259 ohci_soft_td_t *std, *sdone, *stdnext; 1260 usbd_xfer_handle xfer; 1261 struct ohci_pipe *opipe; 1262 int len, cc; 1263 int i, j, actlen, iframes, uedir; 1264 ohci_physaddr_t done; 1265 1266 KASSERT(sc->sc_bus.use_polling || mutex_owned(&sc->sc_lock)); 1267 1268 DPRINTFN(10,("ohci_softintr: enter\n")); 1269 1270 usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head), 1271 sizeof(sc->sc_hcca->hcca_done_head), 1272 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1273 done = O32TOH(sc->sc_hcca->hcca_done_head) & ~OHCI_DONE_INTRS; 1274 sc->sc_hcca->hcca_done_head = 0; 1275 usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head), 1276 sizeof(sc->sc_hcca->hcca_done_head), 1277 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1278 OWRITE4(sc, OHCI_INTERRUPT_STATUS, OHCI_WDH); 1279 sc->sc_eintrs |= OHCI_WDH; 1280 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_WDH); 1281 1282 /* Reverse the done list. */ 1283 for (sdone = NULL, sidone = NULL; done != 0; ) { 1284 std = ohci_hash_find_td(sc, done); 1285 if (std != NULL) { 1286 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 1287 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1288 std->dnext = sdone; 1289 done = O32TOH(std->td.td_nexttd); 1290 sdone = std; 1291 DPRINTFN(10,("add TD %p\n", std)); 1292 continue; 1293 } 1294 sitd = ohci_hash_find_itd(sc, done); 1295 if (sitd != NULL) { 1296 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 1297 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1298 sitd->dnext = sidone; 1299 done = O32TOH(sitd->itd.itd_nextitd); 1300 sidone = sitd; 1301 DPRINTFN(5,("add ITD %p\n", sitd)); 1302 continue; 1303 } 1304 device_printf(sc->sc_dev, "WARNING: addr 0x%08lx not found\n", 1305 (u_long)done); 1306 break; 1307 } 1308 1309 DPRINTFN(10,("ohci_softintr: sdone=%p sidone=%p\n", sdone, sidone)); 1310 1311 #ifdef OHCI_DEBUG 1312 if (ohcidebug > 10) { 1313 DPRINTF(("ohci_process_done: TD done:\n")); 1314 for (std = sdone; std; std = std->dnext) 1315 ohci_dump_td(sc, std); 1316 } 1317 #endif 1318 1319 for (std = sdone; std; std = stdnext) { 1320 xfer = std->xfer; 1321 stdnext = std->dnext; 1322 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n", 1323 std, xfer, xfer ? xfer->hcpriv : 0)); 1324 if (xfer == NULL) { 1325 /* 1326 * xfer == NULL: There seems to be no xfer associated 1327 * with this TD. It is tailp that happened to end up on 1328 * the done queue. 1329 * Shouldn't happen, but some chips are broken(?). 1330 */ 1331 continue; 1332 } 1333 if (xfer->status == USBD_CANCELLED || 1334 xfer->status == USBD_TIMEOUT) { 1335 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1336 xfer)); 1337 /* Handled by abort routine. */ 1338 continue; 1339 } 1340 callout_stop(&xfer->timeout_handle); 1341 1342 len = std->len; 1343 if (std->td.td_cbp != 0) 1344 len -= O32TOH(std->td.td_be) - 1345 O32TOH(std->td.td_cbp) + 1; 1346 DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", len, 1347 std->flags)); 1348 if (std->flags & OHCI_ADD_LEN) 1349 xfer->actlen += len; 1350 1351 cc = OHCI_TD_GET_CC(O32TOH(std->td.td_flags)); 1352 if (cc == OHCI_CC_NO_ERROR) { 1353 if (std->flags & OHCI_CALL_DONE) { 1354 xfer->status = USBD_NORMAL_COMPLETION; 1355 usb_transfer_complete(xfer); 1356 } 1357 ohci_free_std(sc, std); 1358 } else { 1359 /* 1360 * Endpoint is halted. First unlink all the TDs 1361 * belonging to the failed transfer, and then restart 1362 * the endpoint. 1363 */ 1364 ohci_soft_td_t *p, *n; 1365 opipe = (struct ohci_pipe *)xfer->pipe; 1366 1367 DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n", 1368 OHCI_TD_GET_CC(O32TOH(std->td.td_flags)), 1369 ohci_cc_strs[OHCI_TD_GET_CC(O32TOH(std->td.td_flags))])); 1370 1371 /* remove TDs */ 1372 for (p = std; p->xfer == xfer; p = n) { 1373 n = p->nexttd; 1374 ohci_free_std(sc, p); 1375 } 1376 1377 /* clear halt */ 1378 opipe->sed->ed.ed_headp = HTOO32(p->physaddr); 1379 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1380 1381 if (cc == OHCI_CC_STALL) 1382 xfer->status = USBD_STALLED; 1383 else 1384 xfer->status = USBD_IOERROR; 1385 usb_transfer_complete(xfer); 1386 } 1387 } 1388 1389 #ifdef OHCI_DEBUG 1390 if (ohcidebug > 10) { 1391 DPRINTF(("ohci_softintr: ITD done:\n")); 1392 for (sitd = sidone; sitd; sitd = sitd->dnext) 1393 ohci_dump_itd(sc, sitd); 1394 } 1395 #endif 1396 1397 for (sitd = sidone; sitd != NULL; sitd = sitdnext) { 1398 xfer = sitd->xfer; 1399 sitdnext = sitd->dnext; 1400 DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n", 1401 sitd, xfer, xfer ? xfer->hcpriv : 0)); 1402 if (xfer == NULL) 1403 continue; 1404 if (xfer->status == USBD_CANCELLED || 1405 xfer->status == USBD_TIMEOUT) { 1406 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1407 xfer)); 1408 /* Handled by abort routine. */ 1409 continue; 1410 } 1411 #ifdef DIAGNOSTIC 1412 if (sitd->isdone) 1413 printf("ohci_softintr: sitd=%p is done\n", sitd); 1414 sitd->isdone = 1; 1415 #endif 1416 if (sitd->flags & OHCI_CALL_DONE) { 1417 ohci_soft_itd_t *next; 1418 1419 opipe = (struct ohci_pipe *)xfer->pipe; 1420 opipe->u.iso.inuse -= xfer->nframes; 1421 uedir = UE_GET_DIR(xfer->pipe->endpoint->edesc-> 1422 bEndpointAddress); 1423 xfer->status = USBD_NORMAL_COMPLETION; 1424 actlen = 0; 1425 for (i = 0, sitd = xfer->hcpriv;; 1426 sitd = next) { 1427 next = sitd->nextitd; 1428 if (OHCI_ITD_GET_CC(O32TOH(sitd-> 1429 itd.itd_flags)) != OHCI_CC_NO_ERROR) 1430 xfer->status = USBD_IOERROR; 1431 /* For input, update frlengths with actual */ 1432 /* XXX anything necessary for output? */ 1433 if (uedir == UE_DIR_IN && 1434 xfer->status == USBD_NORMAL_COMPLETION) { 1435 iframes = OHCI_ITD_GET_FC(O32TOH( 1436 sitd->itd.itd_flags)); 1437 for (j = 0; j < iframes; i++, j++) { 1438 len = O16TOH(sitd-> 1439 itd.itd_offset[j]); 1440 if ((OHCI_ITD_PSW_GET_CC(len) & 1441 OHCI_CC_NOT_ACCESSED_MASK) 1442 == OHCI_CC_NOT_ACCESSED) 1443 len = 0; 1444 else 1445 len = OHCI_ITD_PSW_LENGTH(len); 1446 xfer->frlengths[i] = len; 1447 actlen += len; 1448 } 1449 } 1450 if (sitd->flags & OHCI_CALL_DONE) 1451 break; 1452 ohci_free_sitd(sc, sitd); 1453 } 1454 ohci_free_sitd(sc, sitd); 1455 if (uedir == UE_DIR_IN && 1456 xfer->status == USBD_NORMAL_COMPLETION) 1457 xfer->actlen = actlen; 1458 xfer->hcpriv = NULL; 1459 1460 usb_transfer_complete(xfer); 1461 } 1462 } 1463 1464 if (sc->sc_softwake) { 1465 sc->sc_softwake = 0; 1466 cv_broadcast(&sc->sc_softwake_cv); 1467 } 1468 1469 DPRINTFN(10,("ohci_softintr: done:\n")); 1470 } 1471 1472 void 1473 ohci_device_ctrl_done(usbd_xfer_handle xfer) 1474 { 1475 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1476 #ifdef DIAGNOSTIC 1477 ohci_softc_t *sc = xfer->pipe->device->bus->hci_private; 1478 #endif 1479 int len = UGETW(xfer->request.wLength); 1480 int isread = (xfer->request.bmRequestType & UT_READ); 1481 1482 DPRINTFN(10,("ohci_device_ctrl_done: xfer=%p\n", xfer)); 1483 1484 KASSERT(sc->sc_bus.use_polling || mutex_owned(&sc->sc_lock)); 1485 1486 #ifdef DIAGNOSTIC 1487 if (!(xfer->rqflags & URQ_REQUEST)) { 1488 panic("ohci_device_ctrl_done: not a request"); 1489 } 1490 #endif 1491 if (len) 1492 usb_syncmem(&xfer->dmabuf, 0, len, 1493 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1494 usb_syncmem(&opipe->u.ctl.reqdma, 0, 1495 sizeof(usb_device_request_t), BUS_DMASYNC_POSTWRITE); 1496 } 1497 1498 void 1499 ohci_device_intr_done(usbd_xfer_handle xfer) 1500 { 1501 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1502 ohci_softc_t *sc = opipe->pipe.device->bus->hci_private; 1503 ohci_soft_ed_t *sed = opipe->sed; 1504 ohci_soft_td_t *data, *tail; 1505 int isread = 1506 (UE_GET_DIR(xfer->pipe->endpoint->edesc->bEndpointAddress) == UE_DIR_IN); 1507 1508 DPRINTFN(10,("ohci_device_intr_done: xfer=%p, actlen=%d\n", 1509 xfer, xfer->actlen)); 1510 1511 KASSERT(sc->sc_bus.use_polling || mutex_owned(&sc->sc_lock)); 1512 1513 usb_syncmem(&xfer->dmabuf, 0, xfer->length, 1514 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1515 if (xfer->pipe->repeat) { 1516 data = opipe->tail.td; 1517 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 1518 if (tail == NULL) { 1519 xfer->status = USBD_NOMEM; 1520 return; 1521 } 1522 tail->xfer = NULL; 1523 1524 data->td.td_flags = HTOO32( 1525 OHCI_TD_IN | OHCI_TD_NOCC | 1526 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 1527 if (xfer->flags & USBD_SHORT_XFER_OK) 1528 data->td.td_flags |= HTOO32(OHCI_TD_R); 1529 data->td.td_cbp = HTOO32(DMAADDR(&xfer->dmabuf, 0)); 1530 data->nexttd = tail; 1531 data->td.td_nexttd = HTOO32(tail->physaddr); 1532 data->td.td_be = HTOO32(O32TOH(data->td.td_cbp) + 1533 xfer->length - 1); 1534 data->len = xfer->length; 1535 data->xfer = xfer; 1536 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1537 usb_syncmem(&data->dma, data->offs, sizeof(data->td), 1538 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1539 xfer->hcpriv = data; 1540 xfer->actlen = 0; 1541 1542 sed->ed.ed_tailp = HTOO32(tail->physaddr); 1543 usb_syncmem(&sed->dma, 1544 sed->offs + offsetof(ohci_ed_t, ed_tailp), 1545 sizeof(sed->ed.ed_tailp), 1546 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1547 opipe->tail.td = tail; 1548 } 1549 } 1550 1551 void 1552 ohci_device_bulk_done(usbd_xfer_handle xfer) 1553 { 1554 #ifdef DIAGNOSTIC 1555 ohci_softc_t *sc = xfer->pipe->device->bus->hci_private; 1556 #endif 1557 int isread = 1558 (UE_GET_DIR(xfer->pipe->endpoint->edesc->bEndpointAddress) == UE_DIR_IN); 1559 1560 KASSERT(mutex_owned(&sc->sc_lock)); 1561 1562 DPRINTFN(10,("ohci_device_bulk_done: xfer=%p, actlen=%d\n", 1563 xfer, xfer->actlen)); 1564 usb_syncmem(&xfer->dmabuf, 0, xfer->length, 1565 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1566 } 1567 1568 Static void 1569 ohci_rhsc_softint(void *arg) 1570 { 1571 ohci_softc_t *sc = arg; 1572 1573 mutex_enter(&sc->sc_lock); 1574 1575 ohci_rhsc(sc, sc->sc_intrxfer); 1576 1577 /* Do not allow RHSC interrupts > 1 per second */ 1578 callout_reset(&sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc); 1579 1580 mutex_exit(&sc->sc_lock); 1581 } 1582 1583 void 1584 ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer) 1585 { 1586 u_char *p; 1587 int i, m; 1588 int hstatus __unused; 1589 1590 KASSERT(mutex_owned(&sc->sc_lock)); 1591 1592 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1593 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n", 1594 sc, xfer, hstatus)); 1595 1596 if (xfer == NULL) { 1597 /* Just ignore the change. */ 1598 return; 1599 } 1600 1601 p = KERNADDR(&xfer->dmabuf, 0); 1602 m = min(sc->sc_noport, xfer->length * 8 - 1); 1603 memset(p, 0, xfer->length); 1604 for (i = 1; i <= m; i++) { 1605 /* Pick out CHANGE bits from the status reg. */ 1606 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1607 p[i/8] |= 1 << (i%8); 1608 } 1609 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 1610 xfer->actlen = xfer->length; 1611 xfer->status = USBD_NORMAL_COMPLETION; 1612 1613 usb_transfer_complete(xfer); 1614 } 1615 1616 void 1617 ohci_root_intr_done(usbd_xfer_handle xfer) 1618 { 1619 } 1620 1621 void 1622 ohci_root_ctrl_done(usbd_xfer_handle xfer) 1623 { 1624 } 1625 1626 /* 1627 * Wait here until controller claims to have an interrupt. 1628 * Then call ohci_intr and return. Use timeout to avoid waiting 1629 * too long. 1630 */ 1631 void 1632 ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer) 1633 { 1634 int timo; 1635 u_int32_t intrs; 1636 1637 mutex_enter(&sc->sc_lock); 1638 1639 xfer->status = USBD_IN_PROGRESS; 1640 for (timo = xfer->timeout; timo >= 0; timo--) { 1641 usb_delay_ms(&sc->sc_bus, 1); 1642 if (sc->sc_dying) 1643 break; 1644 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 1645 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs)); 1646 #ifdef OHCI_DEBUG 1647 if (ohcidebug > 15) 1648 ohci_dumpregs(sc); 1649 #endif 1650 if (intrs) { 1651 mutex_spin_enter(&sc->sc_intr_lock); 1652 ohci_intr1(sc); 1653 mutex_spin_exit(&sc->sc_intr_lock); 1654 if (xfer->status != USBD_IN_PROGRESS) 1655 goto done; 1656 } 1657 } 1658 1659 /* Timeout */ 1660 DPRINTF(("ohci_waitintr: timeout\n")); 1661 xfer->status = USBD_TIMEOUT; 1662 usb_transfer_complete(xfer); 1663 1664 /* XXX should free TD */ 1665 1666 done: 1667 mutex_exit(&sc->sc_lock); 1668 } 1669 1670 void 1671 ohci_poll(struct usbd_bus *bus) 1672 { 1673 ohci_softc_t *sc = bus->hci_private; 1674 #ifdef OHCI_DEBUG 1675 static int last; 1676 int new; 1677 new = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1678 if (new != last) { 1679 DPRINTFN(10,("ohci_poll: intrs=0x%04x\n", new)); 1680 last = new; 1681 } 1682 #endif 1683 sc->sc_eintrs |= OHCI_WDH; 1684 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) { 1685 mutex_spin_enter(&sc->sc_intr_lock); 1686 ohci_intr1(sc); 1687 mutex_spin_exit(&sc->sc_intr_lock); 1688 } 1689 } 1690 1691 usbd_status 1692 ohci_device_request(usbd_xfer_handle xfer) 1693 { 1694 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1695 usb_device_request_t *req = &xfer->request; 1696 usbd_device_handle dev = opipe->pipe.device; 1697 ohci_softc_t *sc = dev->bus->hci_private; 1698 ohci_soft_td_t *setup, *stat, *next, *tail; 1699 ohci_soft_ed_t *sed; 1700 int isread; 1701 int len; 1702 usbd_status err; 1703 1704 KASSERT(mutex_owned(&sc->sc_lock)); 1705 1706 isread = req->bmRequestType & UT_READ; 1707 len = UGETW(req->wLength); 1708 1709 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 1710 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 1711 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1712 UGETW(req->wIndex), len, dev->address, 1713 opipe->pipe.endpoint->edesc->bEndpointAddress)); 1714 1715 setup = opipe->tail.td; 1716 stat = ohci_alloc_std(sc); 1717 if (stat == NULL) { 1718 err = USBD_NOMEM; 1719 goto bad1; 1720 } 1721 tail = ohci_alloc_std(sc); 1722 if (tail == NULL) { 1723 err = USBD_NOMEM; 1724 goto bad2; 1725 } 1726 tail->xfer = NULL; 1727 1728 sed = opipe->sed; 1729 opipe->u.ctl.length = len; 1730 1731 KASSERTMSG(OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)) == dev->address, 1732 "address ED %d pipe %d\n", 1733 OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)), dev->address); 1734 KASSERTMSG(OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)) == 1735 UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize), 1736 "MPL ED %d pipe %d\n", 1737 OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)), 1738 UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize)); 1739 1740 next = stat; 1741 1742 /* Set up data transaction */ 1743 if (len != 0) { 1744 ohci_soft_td_t *std = stat; 1745 1746 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 1747 std, &stat); 1748 if (err) { 1749 /* stat is unchanged if error */ 1750 goto bad3; 1751 } 1752 stat = stat->nexttd; /* point at free TD */ 1753 1754 /* Start toggle at 1 and then use the carried toggle. */ 1755 std->td.td_flags &= HTOO32(~OHCI_TD_TOGGLE_MASK); 1756 std->td.td_flags |= HTOO32(OHCI_TD_TOGGLE_1); 1757 usb_syncmem(&std->dma, 1758 std->offs + offsetof(ohci_td_t, td_flags), 1759 sizeof(std->td.td_flags), 1760 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1761 } 1762 1763 memcpy(KERNADDR(&opipe->u.ctl.reqdma, 0), req, sizeof *req); 1764 usb_syncmem(&opipe->u.ctl.reqdma, 0, sizeof *req, BUS_DMASYNC_PREWRITE); 1765 1766 setup->td.td_flags = HTOO32(OHCI_TD_SETUP | OHCI_TD_NOCC | 1767 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1768 setup->td.td_cbp = HTOO32(DMAADDR(&opipe->u.ctl.reqdma, 0)); 1769 setup->nexttd = next; 1770 setup->td.td_nexttd = HTOO32(next->physaddr); 1771 setup->td.td_be = HTOO32(O32TOH(setup->td.td_cbp) + sizeof *req - 1); 1772 setup->len = 0; 1773 setup->xfer = xfer; 1774 setup->flags = 0; 1775 xfer->hcpriv = setup; 1776 usb_syncmem(&setup->dma, setup->offs, sizeof(setup->td), 1777 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1778 1779 stat->td.td_flags = HTOO32( 1780 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | 1781 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1782 stat->td.td_cbp = 0; 1783 stat->nexttd = tail; 1784 stat->td.td_nexttd = HTOO32(tail->physaddr); 1785 stat->td.td_be = 0; 1786 stat->flags = OHCI_CALL_DONE; 1787 stat->len = 0; 1788 stat->xfer = xfer; 1789 usb_syncmem(&stat->dma, stat->offs, sizeof(stat->td), 1790 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1791 1792 #ifdef OHCI_DEBUG 1793 if (ohcidebug > 5) { 1794 DPRINTF(("ohci_device_request:\n")); 1795 ohci_dump_ed(sc, sed); 1796 ohci_dump_tds(sc, setup); 1797 } 1798 #endif 1799 1800 /* Insert ED in schedule */ 1801 sed->ed.ed_tailp = HTOO32(tail->physaddr); 1802 usb_syncmem(&sed->dma, 1803 sed->offs + offsetof(ohci_ed_t, ed_tailp), 1804 sizeof(sed->ed.ed_tailp), 1805 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1806 opipe->tail.td = tail; 1807 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1808 if (xfer->timeout && !sc->sc_bus.use_polling) { 1809 callout_reset(&xfer->timeout_handle, mstohz(xfer->timeout), 1810 ohci_timeout, xfer); 1811 } 1812 1813 #ifdef OHCI_DEBUG 1814 if (ohcidebug > 20) { 1815 delay(10000); 1816 DPRINTF(("ohci_device_request: status=%x\n", 1817 OREAD4(sc, OHCI_COMMAND_STATUS))); 1818 ohci_dumpregs(sc); 1819 printf("ctrl head:\n"); 1820 ohci_dump_ed(sc, sc->sc_ctrl_head); 1821 printf("sed:\n"); 1822 ohci_dump_ed(sc, sed); 1823 ohci_dump_tds(sc, setup); 1824 } 1825 #endif 1826 1827 return (USBD_NORMAL_COMPLETION); 1828 1829 bad3: 1830 ohci_free_std(sc, tail); 1831 bad2: 1832 ohci_free_std(sc, stat); 1833 bad1: 1834 return (err); 1835 } 1836 1837 /* 1838 * Add an ED to the schedule. Called with USB lock held. 1839 */ 1840 Static void 1841 ohci_add_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1842 { 1843 DPRINTFN(8,("ohci_add_ed: sed=%p head=%p\n", sed, head)); 1844 1845 KASSERT(mutex_owned(&sc->sc_lock)); 1846 1847 usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted), 1848 sizeof(head->ed.ed_nexted), 1849 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1850 sed->next = head->next; 1851 sed->ed.ed_nexted = head->ed.ed_nexted; 1852 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted), 1853 sizeof(sed->ed.ed_nexted), 1854 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1855 head->next = sed; 1856 head->ed.ed_nexted = HTOO32(sed->physaddr); 1857 usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted), 1858 sizeof(head->ed.ed_nexted), 1859 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1860 } 1861 1862 /* 1863 * Remove an ED from the schedule. Called with USB lock held. 1864 */ 1865 Static void 1866 ohci_rem_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1867 { 1868 ohci_soft_ed_t *p; 1869 1870 KASSERT(mutex_owned(&sc->sc_lock)); 1871 1872 /* XXX */ 1873 for (p = head; p != NULL && p->next != sed; p = p->next) 1874 ; 1875 KASSERT(p != NULL); 1876 1877 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted), 1878 sizeof(sed->ed.ed_nexted), 1879 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1880 p->next = sed->next; 1881 p->ed.ed_nexted = sed->ed.ed_nexted; 1882 usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted), 1883 sizeof(p->ed.ed_nexted), 1884 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1885 } 1886 1887 /* 1888 * When a transfer is completed the TD is added to the done queue by 1889 * the host controller. This queue is the processed by software. 1890 * Unfortunately the queue contains the physical address of the TD 1891 * and we have no simple way to translate this back to a kernel address. 1892 * To make the translation possible (and fast) we use a hash table of 1893 * TDs currently in the schedule. The physical address is used as the 1894 * hash value. 1895 */ 1896 1897 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1898 /* Called with USB lock held. */ 1899 void 1900 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1901 { 1902 int h = HASH(std->physaddr); 1903 1904 KASSERT(sc->sc_bus.use_polling || mutex_owned(&sc->sc_lock)); 1905 1906 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1907 } 1908 1909 /* Called with USB lock held. */ 1910 void 1911 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1912 { 1913 1914 KASSERT(sc->sc_bus.use_polling || mutex_owned(&sc->sc_lock)); 1915 1916 LIST_REMOVE(std, hnext); 1917 } 1918 1919 ohci_soft_td_t * 1920 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a) 1921 { 1922 int h = HASH(a); 1923 ohci_soft_td_t *std; 1924 1925 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1926 std != NULL; 1927 std = LIST_NEXT(std, hnext)) 1928 if (std->physaddr == a) 1929 return (std); 1930 return (NULL); 1931 } 1932 1933 /* Called with USB lock held. */ 1934 void 1935 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1936 { 1937 int h = HASH(sitd->physaddr); 1938 1939 KASSERT(mutex_owned(&sc->sc_lock)); 1940 1941 DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n", 1942 sitd, (u_long)sitd->physaddr)); 1943 1944 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext); 1945 } 1946 1947 /* Called with USB lock held. */ 1948 void 1949 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1950 { 1951 1952 KASSERT(mutex_owned(&sc->sc_lock)); 1953 1954 DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n", 1955 sitd, (u_long)sitd->physaddr)); 1956 1957 LIST_REMOVE(sitd, hnext); 1958 } 1959 1960 ohci_soft_itd_t * 1961 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a) 1962 { 1963 int h = HASH(a); 1964 ohci_soft_itd_t *sitd; 1965 1966 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]); 1967 sitd != NULL; 1968 sitd = LIST_NEXT(sitd, hnext)) 1969 if (sitd->physaddr == a) 1970 return (sitd); 1971 return (NULL); 1972 } 1973 1974 void 1975 ohci_timeout(void *addr) 1976 { 1977 struct ohci_xfer *oxfer = addr; 1978 struct ohci_pipe *opipe = (struct ohci_pipe *)oxfer->xfer.pipe; 1979 ohci_softc_t *sc = opipe->pipe.device->bus->hci_private; 1980 1981 DPRINTF(("ohci_timeout: oxfer=%p\n", oxfer)); 1982 1983 if (sc->sc_dying) { 1984 mutex_enter(&sc->sc_lock); 1985 ohci_abort_xfer(&oxfer->xfer, USBD_TIMEOUT); 1986 mutex_exit(&sc->sc_lock); 1987 return; 1988 } 1989 1990 /* Execute the abort in a process context. */ 1991 usb_init_task(&oxfer->abort_task, ohci_timeout_task, addr, 1992 USB_TASKQ_MPSAFE); 1993 usb_add_task(oxfer->xfer.pipe->device, &oxfer->abort_task, 1994 USB_TASKQ_HC); 1995 } 1996 1997 void 1998 ohci_timeout_task(void *addr) 1999 { 2000 usbd_xfer_handle xfer = addr; 2001 ohci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2002 2003 DPRINTF(("ohci_timeout_task: xfer=%p\n", xfer)); 2004 2005 mutex_enter(&sc->sc_lock); 2006 ohci_abort_xfer(xfer, USBD_TIMEOUT); 2007 mutex_exit(&sc->sc_lock); 2008 } 2009 2010 #ifdef OHCI_DEBUG 2011 void 2012 ohci_dump_tds(ohci_softc_t *sc, ohci_soft_td_t *std) 2013 { 2014 for (; std; std = std->nexttd) 2015 ohci_dump_td(sc, std); 2016 } 2017 2018 void 2019 ohci_dump_td(ohci_softc_t *sc, ohci_soft_td_t *std) 2020 { 2021 char sbuf[128]; 2022 2023 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 2024 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2025 snprintb(sbuf, sizeof(sbuf), 2026 "\177\20" 2027 "b\22R\0" 2028 "f\23\02DP\0" 2029 "=\x0" "setup\0" 2030 "=\x1" "out\0" 2031 "=\x2" "in\0" 2032 "=\x3" "reserved\0" 2033 "f\25\03DI\0" 2034 "=\x07" "none\0" 2035 "f\30\02T\0" 2036 "=\x0" "carry\0" 2037 "=\x1" "carry\0" 2038 "=\x2" "0\0" 2039 "=\x3" "1\0" 2040 "f\32\02EC\0" 2041 "f\34\04CC\0", 2042 (u_int32_t)O32TOH(std->td.td_flags)); 2043 printf("TD(%p) at %08lx:\n\tflags=%s\n\tcbp=0x%08lx nexttd=0x%08lx be=0x%08lx\n", 2044 std, (u_long)std->physaddr, sbuf, 2045 (u_long)O32TOH(std->td.td_cbp), 2046 (u_long)O32TOH(std->td.td_nexttd), 2047 (u_long)O32TOH(std->td.td_be)); 2048 } 2049 2050 void 2051 ohci_dump_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 2052 { 2053 int i; 2054 2055 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 2056 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2057 printf("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n" 2058 "bp0=0x%08lx next=0x%08lx be=0x%08lx\n", 2059 sitd, (u_long)sitd->physaddr, 2060 OHCI_ITD_GET_SF(O32TOH(sitd->itd.itd_flags)), 2061 OHCI_ITD_GET_DI(O32TOH(sitd->itd.itd_flags)), 2062 OHCI_ITD_GET_FC(O32TOH(sitd->itd.itd_flags)), 2063 OHCI_ITD_GET_CC(O32TOH(sitd->itd.itd_flags)), 2064 (u_long)O32TOH(sitd->itd.itd_bp0), 2065 (u_long)O32TOH(sitd->itd.itd_nextitd), 2066 (u_long)O32TOH(sitd->itd.itd_be)); 2067 for (i = 0; i < OHCI_ITD_NOFFSET; i++) 2068 printf("offs[%d]=0x%04x ", i, 2069 (u_int)O16TOH(sitd->itd.itd_offset[i])); 2070 printf("\n"); 2071 } 2072 2073 void 2074 ohci_dump_itds(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 2075 { 2076 for (; sitd; sitd = sitd->nextitd) 2077 ohci_dump_itd(sc, sitd); 2078 } 2079 2080 void 2081 ohci_dump_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 2082 { 2083 char sbuf[128], sbuf2[128]; 2084 2085 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 2086 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2087 snprintb(sbuf, sizeof(sbuf), 2088 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO", 2089 (u_int32_t)O32TOH(sed->ed.ed_flags)); 2090 snprintb(sbuf2, sizeof(sbuf2), "\20\1HALT\2CARRY", 2091 (u_int32_t)O32TOH(sed->ed.ed_headp)); 2092 2093 printf("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d flags=%s\ntailp=0x%08lx " 2094 "headflags=%s headp=0x%08lx nexted=0x%08lx\n", 2095 sed, (u_long)sed->physaddr, 2096 OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)), 2097 OHCI_ED_GET_EN(O32TOH(sed->ed.ed_flags)), 2098 OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)), sbuf, 2099 (u_long)O32TOH(sed->ed.ed_tailp), sbuf2, 2100 (u_long)O32TOH(sed->ed.ed_headp), 2101 (u_long)O32TOH(sed->ed.ed_nexted)); 2102 } 2103 #endif 2104 2105 usbd_status 2106 ohci_open(usbd_pipe_handle pipe) 2107 { 2108 usbd_device_handle dev = pipe->device; 2109 ohci_softc_t *sc = dev->bus->hci_private; 2110 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 2111 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2112 u_int8_t addr = dev->address; 2113 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 2114 ohci_soft_ed_t *sed; 2115 ohci_soft_td_t *std; 2116 ohci_soft_itd_t *sitd; 2117 ohci_physaddr_t tdphys; 2118 u_int32_t fmt; 2119 usbd_status err = USBD_NOMEM; 2120 int ival; 2121 2122 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 2123 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 2124 2125 if (sc->sc_dying) { 2126 return USBD_IOERROR; 2127 } 2128 2129 std = NULL; 2130 sed = NULL; 2131 2132 if (addr == sc->sc_addr) { 2133 switch (ed->bEndpointAddress) { 2134 case USB_CONTROL_ENDPOINT: 2135 pipe->methods = &ohci_root_ctrl_methods; 2136 break; 2137 case UE_DIR_IN | OHCI_INTR_ENDPT: 2138 pipe->methods = &ohci_root_intr_methods; 2139 break; 2140 default: 2141 err = USBD_INVAL; 2142 goto bad; 2143 } 2144 } else { 2145 sed = ohci_alloc_sed(sc); 2146 if (sed == NULL) 2147 goto bad; 2148 opipe->sed = sed; 2149 if (xfertype == UE_ISOCHRONOUS) { 2150 mutex_enter(&sc->sc_lock); 2151 sitd = ohci_alloc_sitd(sc); 2152 mutex_exit(&sc->sc_lock); 2153 if (sitd == NULL) 2154 goto bad; 2155 2156 opipe->tail.itd = sitd; 2157 tdphys = sitd->physaddr; 2158 fmt = OHCI_ED_FORMAT_ISO; 2159 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 2160 fmt |= OHCI_ED_DIR_IN; 2161 else 2162 fmt |= OHCI_ED_DIR_OUT; 2163 } else { 2164 mutex_enter(&sc->sc_lock); 2165 std = ohci_alloc_std(sc); 2166 mutex_exit(&sc->sc_lock); 2167 if (std == NULL) 2168 goto bad; 2169 2170 opipe->tail.td = std; 2171 tdphys = std->physaddr; 2172 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD; 2173 } 2174 sed->ed.ed_flags = HTOO32( 2175 OHCI_ED_SET_FA(addr) | 2176 OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) | 2177 (dev->speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) | 2178 fmt | 2179 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 2180 sed->ed.ed_headp = HTOO32(tdphys | 2181 (pipe->endpoint->datatoggle ? OHCI_TOGGLECARRY : 0)); 2182 sed->ed.ed_tailp = HTOO32(tdphys); 2183 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 2184 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2185 2186 switch (xfertype) { 2187 case UE_CONTROL: 2188 pipe->methods = &ohci_device_ctrl_methods; 2189 err = usb_allocmem(&sc->sc_bus, 2190 sizeof(usb_device_request_t), 2191 0, &opipe->u.ctl.reqdma); 2192 if (err) 2193 goto bad; 2194 mutex_enter(&sc->sc_lock); 2195 ohci_add_ed(sc, sed, sc->sc_ctrl_head); 2196 mutex_exit(&sc->sc_lock); 2197 break; 2198 case UE_INTERRUPT: 2199 pipe->methods = &ohci_device_intr_methods; 2200 ival = pipe->interval; 2201 if (ival == USBD_DEFAULT_INTERVAL) 2202 ival = ed->bInterval; 2203 err = ohci_device_setintr(sc, opipe, ival); 2204 if (err) 2205 goto bad; 2206 break; 2207 case UE_ISOCHRONOUS: 2208 pipe->methods = &ohci_device_isoc_methods; 2209 return (ohci_setup_isoc(pipe)); 2210 case UE_BULK: 2211 pipe->methods = &ohci_device_bulk_methods; 2212 mutex_enter(&sc->sc_lock); 2213 ohci_add_ed(sc, sed, sc->sc_bulk_head); 2214 mutex_exit(&sc->sc_lock); 2215 break; 2216 } 2217 } 2218 2219 return USBD_NORMAL_COMPLETION; 2220 2221 bad: 2222 if (std != NULL) { 2223 mutex_enter(&sc->sc_lock); 2224 ohci_free_std(sc, std); 2225 mutex_exit(&sc->sc_lock); 2226 } 2227 if (sed != NULL) 2228 ohci_free_sed(sc, sed); 2229 return err; 2230 2231 } 2232 2233 /* 2234 * Close a reqular pipe. 2235 * Assumes that there are no pending transactions. 2236 */ 2237 void 2238 ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head) 2239 { 2240 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2241 ohci_softc_t *sc = pipe->device->bus->hci_private; 2242 ohci_soft_ed_t *sed = opipe->sed; 2243 2244 KASSERT(mutex_owned(&sc->sc_lock)); 2245 2246 #ifdef DIAGNOSTIC 2247 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 2248 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2249 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) { 2250 ohci_soft_td_t *std; 2251 std = ohci_hash_find_td(sc, O32TOH(sed->ed.ed_headp)); 2252 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 2253 "tl=0x%x pipe=%p, std=%p\n", sed, 2254 (int)O32TOH(sed->ed.ed_headp), 2255 (int)O32TOH(sed->ed.ed_tailp), 2256 pipe, std); 2257 #ifdef OHCI_DEBUG 2258 usbd_dump_pipe(&opipe->pipe); 2259 ohci_dump_ed(sc, sed); 2260 if (std) 2261 ohci_dump_td(sc, std); 2262 #endif 2263 usb_delay_ms(&sc->sc_bus, 2); 2264 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2265 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) 2266 printf("ohci_close_pipe: pipe still not empty\n"); 2267 } 2268 #endif 2269 ohci_rem_ed(sc, sed, head); 2270 /* Make sure the host controller is not touching this ED */ 2271 usb_delay_ms(&sc->sc_bus, 1); 2272 pipe->endpoint->datatoggle = 2273 (O32TOH(sed->ed.ed_headp) & OHCI_TOGGLECARRY) ? 1 : 0; 2274 ohci_free_sed(sc, opipe->sed); 2275 } 2276 2277 /* 2278 * Abort a device request. 2279 * If this routine is called at splusb() it guarantees that the request 2280 * will be removed from the hardware scheduling and that the callback 2281 * for it will be called with USBD_CANCELLED status. 2282 * It's impossible to guarantee that the requested transfer will not 2283 * have happened since the hardware runs concurrently. 2284 * If the transaction has already happened we rely on the ordinary 2285 * interrupt processing to process it. 2286 * XXX This is most probably wrong. 2287 * XXXMRG this doesn't make sense anymore. 2288 */ 2289 void 2290 ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2291 { 2292 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2293 ohci_softc_t *sc = opipe->pipe.device->bus->hci_private; 2294 ohci_soft_ed_t *sed = opipe->sed; 2295 ohci_soft_td_t *p, *n; 2296 ohci_physaddr_t headp; 2297 int hit; 2298 int wake; 2299 2300 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p sed=%p\n", xfer, opipe,sed)); 2301 2302 KASSERT(mutex_owned(&sc->sc_lock)); 2303 2304 if (sc->sc_dying) { 2305 /* If we're dying, just do the software part. */ 2306 xfer->status = status; /* make software ignore it */ 2307 callout_halt(&xfer->timeout_handle, &sc->sc_lock); 2308 usb_transfer_complete(xfer); 2309 return; 2310 } 2311 2312 if (cpu_intr_p() || cpu_softintr_p()) 2313 panic("ohci_abort_xfer: not in process context"); 2314 2315 /* 2316 * If an abort is already in progress then just wait for it to 2317 * complete and return. 2318 */ 2319 if (xfer->hcflags & UXFER_ABORTING) { 2320 DPRINTFN(2, ("ohci_abort_xfer: already aborting\n")); 2321 #ifdef DIAGNOSTIC 2322 if (status == USBD_TIMEOUT) 2323 printf("%s: TIMEOUT while aborting\n", __func__); 2324 #endif 2325 /* Override the status which might be USBD_TIMEOUT. */ 2326 xfer->status = status; 2327 DPRINTFN(2, ("ohci_abort_xfer: waiting for abort to finish\n")); 2328 xfer->hcflags |= UXFER_ABORTWAIT; 2329 while (xfer->hcflags & UXFER_ABORTING) 2330 cv_wait(&xfer->hccv, &sc->sc_lock); 2331 goto done; 2332 } 2333 xfer->hcflags |= UXFER_ABORTING; 2334 2335 /* 2336 * Step 1: Make interrupt routine and hardware ignore xfer. 2337 */ 2338 xfer->status = status; /* make software ignore it */ 2339 callout_stop(&xfer->timeout_handle); 2340 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed)); 2341 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2342 sizeof(sed->ed.ed_flags), 2343 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2344 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */ 2345 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2346 sizeof(sed->ed.ed_flags), 2347 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2348 2349 /* 2350 * Step 2: Wait until we know hardware has finished any possible 2351 * use of the xfer. Also make sure the soft interrupt routine 2352 * has run. 2353 */ 2354 /* Hardware finishes in 1ms */ 2355 usb_delay_ms_locked(opipe->pipe.device->bus, 20, &sc->sc_lock); 2356 sc->sc_softwake = 1; 2357 usb_schedsoftintr(&sc->sc_bus); 2358 cv_wait(&sc->sc_softwake_cv, &sc->sc_lock); 2359 2360 /* 2361 * Step 3: Remove any vestiges of the xfer from the hardware. 2362 * The complication here is that the hardware may have executed 2363 * beyond the xfer we're trying to abort. So as we're scanning 2364 * the TDs of this xfer we check if the hardware points to 2365 * any of them. 2366 */ 2367 p = xfer->hcpriv; 2368 #ifdef DIAGNOSTIC 2369 if (p == NULL) { 2370 xfer->hcflags &= ~UXFER_ABORTING; /* XXX */ 2371 printf("ohci_abort_xfer: hcpriv is NULL\n"); 2372 goto done; 2373 } 2374 #endif 2375 #ifdef OHCI_DEBUG 2376 if (ohcidebug > 1) { 2377 DPRINTF(("ohci_abort_xfer: sed=\n")); 2378 ohci_dump_ed(sc, sed); 2379 ohci_dump_tds(sc, p); 2380 } 2381 #endif 2382 headp = O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK; 2383 hit = 0; 2384 for (; p->xfer == xfer; p = n) { 2385 hit |= headp == p->physaddr; 2386 n = p->nexttd; 2387 ohci_free_std(sc, p); 2388 } 2389 /* Zap headp register if hardware pointed inside the xfer. */ 2390 if (hit) { 2391 DPRINTFN(1,("ohci_abort_xfer: set hd=0x%08x, tl=0x%08x\n", 2392 (int)p->physaddr, (int)O32TOH(sed->ed.ed_tailp))); 2393 sed->ed.ed_headp = HTOO32(p->physaddr); /* unlink TDs */ 2394 usb_syncmem(&sed->dma, 2395 sed->offs + offsetof(ohci_ed_t, ed_headp), 2396 sizeof(sed->ed.ed_headp), 2397 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2398 } else { 2399 DPRINTFN(1,("ohci_abort_xfer: no hit\n")); 2400 } 2401 2402 /* 2403 * Step 4: Turn on hardware again. 2404 */ 2405 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2406 sizeof(sed->ed.ed_flags), 2407 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2408 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */ 2409 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2410 sizeof(sed->ed.ed_flags), 2411 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2412 2413 /* 2414 * Step 5: Execute callback. 2415 */ 2416 wake = xfer->hcflags & UXFER_ABORTWAIT; 2417 xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT); 2418 usb_transfer_complete(xfer); 2419 if (wake) 2420 cv_broadcast(&xfer->hccv); 2421 2422 done: 2423 KASSERT(mutex_owned(&sc->sc_lock)); 2424 } 2425 2426 /* 2427 * Data structures and routines to emulate the root hub. 2428 */ 2429 Static usb_device_descriptor_t ohci_devd = { 2430 USB_DEVICE_DESCRIPTOR_SIZE, 2431 UDESC_DEVICE, /* type */ 2432 {0x00, 0x01}, /* USB version */ 2433 UDCLASS_HUB, /* class */ 2434 UDSUBCLASS_HUB, /* subclass */ 2435 UDPROTO_FSHUB, /* protocol */ 2436 64, /* max packet */ 2437 {0},{0},{0x00,0x01}, /* device id */ 2438 1,2,0, /* string indicies */ 2439 1 /* # of configurations */ 2440 }; 2441 2442 Static const usb_config_descriptor_t ohci_confd = { 2443 USB_CONFIG_DESCRIPTOR_SIZE, 2444 UDESC_CONFIG, 2445 {USB_CONFIG_DESCRIPTOR_SIZE + 2446 USB_INTERFACE_DESCRIPTOR_SIZE + 2447 USB_ENDPOINT_DESCRIPTOR_SIZE}, 2448 1, 2449 1, 2450 0, 2451 UC_ATTR_MBO | UC_SELF_POWERED, 2452 0 /* max power */ 2453 }; 2454 2455 Static const usb_interface_descriptor_t ohci_ifcd = { 2456 USB_INTERFACE_DESCRIPTOR_SIZE, 2457 UDESC_INTERFACE, 2458 0, 2459 0, 2460 1, 2461 UICLASS_HUB, 2462 UISUBCLASS_HUB, 2463 UIPROTO_FSHUB, 2464 0 2465 }; 2466 2467 Static const usb_endpoint_descriptor_t ohci_endpd = { 2468 .bLength = USB_ENDPOINT_DESCRIPTOR_SIZE, 2469 .bDescriptorType = UDESC_ENDPOINT, 2470 .bEndpointAddress = UE_DIR_IN | OHCI_INTR_ENDPT, 2471 .bmAttributes = UE_INTERRUPT, 2472 .wMaxPacketSize = {8, 0}, /* max packet */ 2473 .bInterval = 255, 2474 }; 2475 2476 Static const usb_hub_descriptor_t ohci_hubd = { 2477 .bDescLength = USB_HUB_DESCRIPTOR_SIZE, 2478 .bDescriptorType = UDESC_HUB, 2479 }; 2480 2481 /* 2482 * Simulate a hardware hub by handling all the necessary requests. 2483 */ 2484 Static usbd_status 2485 ohci_root_ctrl_transfer(usbd_xfer_handle xfer) 2486 { 2487 ohci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2488 usbd_status err; 2489 2490 /* Insert last in queue. */ 2491 mutex_enter(&sc->sc_lock); 2492 err = usb_insert_transfer(xfer); 2493 mutex_exit(&sc->sc_lock); 2494 if (err) 2495 return (err); 2496 2497 /* Pipe isn't running, start first */ 2498 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2499 } 2500 2501 Static usbd_status 2502 ohci_root_ctrl_start(usbd_xfer_handle xfer) 2503 { 2504 ohci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2505 usb_device_request_t *req; 2506 void *buf = NULL; 2507 int port, i; 2508 int len, value, index, l, totlen = 0; 2509 usb_port_status_t ps; 2510 usb_hub_descriptor_t hubd; 2511 usbd_status err; 2512 u_int32_t v; 2513 2514 if (sc->sc_dying) 2515 return (USBD_IOERROR); 2516 2517 #ifdef DIAGNOSTIC 2518 if (!(xfer->rqflags & URQ_REQUEST)) 2519 /* XXX panic */ 2520 return (USBD_INVAL); 2521 #endif 2522 req = &xfer->request; 2523 2524 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 2525 req->bmRequestType, req->bRequest)); 2526 2527 len = UGETW(req->wLength); 2528 value = UGETW(req->wValue); 2529 index = UGETW(req->wIndex); 2530 2531 if (len != 0) 2532 buf = KERNADDR(&xfer->dmabuf, 0); 2533 2534 #define C(x,y) ((x) | ((y) << 8)) 2535 switch(C(req->bRequest, req->bmRequestType)) { 2536 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 2537 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 2538 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 2539 /* 2540 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 2541 * for the integrated root hub. 2542 */ 2543 break; 2544 case C(UR_GET_CONFIG, UT_READ_DEVICE): 2545 if (len > 0) { 2546 *(u_int8_t *)buf = sc->sc_conf; 2547 totlen = 1; 2548 } 2549 break; 2550 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2551 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 2552 if (len == 0) 2553 break; 2554 switch(value >> 8) { 2555 case UDESC_DEVICE: 2556 if ((value & 0xff) != 0) { 2557 err = USBD_IOERROR; 2558 goto ret; 2559 } 2560 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 2561 USETW(ohci_devd.idVendor, sc->sc_id_vendor); 2562 memcpy(buf, &ohci_devd, l); 2563 break; 2564 case UDESC_CONFIG: 2565 if ((value & 0xff) != 0) { 2566 err = USBD_IOERROR; 2567 goto ret; 2568 } 2569 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 2570 memcpy(buf, &ohci_confd, l); 2571 buf = (char *)buf + l; 2572 len -= l; 2573 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 2574 totlen += l; 2575 memcpy(buf, &ohci_ifcd, l); 2576 buf = (char *)buf + l; 2577 len -= l; 2578 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 2579 totlen += l; 2580 memcpy(buf, &ohci_endpd, l); 2581 break; 2582 case UDESC_STRING: 2583 #define sd ((usb_string_descriptor_t *)buf) 2584 switch (value & 0xff) { 2585 case 0: /* Language table */ 2586 totlen = usb_makelangtbl(sd, len); 2587 break; 2588 case 1: /* Vendor */ 2589 totlen = usb_makestrdesc(sd, len, 2590 sc->sc_vendor); 2591 break; 2592 case 2: /* Product */ 2593 totlen = usb_makestrdesc(sd, len, 2594 "OHCI root hub"); 2595 break; 2596 } 2597 #undef sd 2598 break; 2599 default: 2600 err = USBD_IOERROR; 2601 goto ret; 2602 } 2603 break; 2604 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 2605 if (len > 0) { 2606 *(u_int8_t *)buf = 0; 2607 totlen = 1; 2608 } 2609 break; 2610 case C(UR_GET_STATUS, UT_READ_DEVICE): 2611 if (len > 1) { 2612 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 2613 totlen = 2; 2614 } 2615 break; 2616 case C(UR_GET_STATUS, UT_READ_INTERFACE): 2617 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 2618 if (len > 1) { 2619 USETW(((usb_status_t *)buf)->wStatus, 0); 2620 totlen = 2; 2621 } 2622 break; 2623 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 2624 if (value >= USB_MAX_DEVICES) { 2625 err = USBD_IOERROR; 2626 goto ret; 2627 } 2628 sc->sc_addr = value; 2629 break; 2630 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 2631 if (value != 0 && value != 1) { 2632 err = USBD_IOERROR; 2633 goto ret; 2634 } 2635 sc->sc_conf = value; 2636 break; 2637 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 2638 break; 2639 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 2640 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 2641 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 2642 err = USBD_IOERROR; 2643 goto ret; 2644 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 2645 break; 2646 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 2647 break; 2648 /* Hub requests */ 2649 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2650 break; 2651 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2652 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 2653 "port=%d feature=%d\n", 2654 index, value)); 2655 if (index < 1 || index > sc->sc_noport) { 2656 err = USBD_IOERROR; 2657 goto ret; 2658 } 2659 port = OHCI_RH_PORT_STATUS(index); 2660 switch(value) { 2661 case UHF_PORT_ENABLE: 2662 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2663 break; 2664 case UHF_PORT_SUSPEND: 2665 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2666 break; 2667 case UHF_PORT_POWER: 2668 /* Yes, writing to the LOW_SPEED bit clears power. */ 2669 OWRITE4(sc, port, UPS_LOW_SPEED); 2670 break; 2671 case UHF_C_PORT_CONNECTION: 2672 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2673 break; 2674 case UHF_C_PORT_ENABLE: 2675 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2676 break; 2677 case UHF_C_PORT_SUSPEND: 2678 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2679 break; 2680 case UHF_C_PORT_OVER_CURRENT: 2681 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2682 break; 2683 case UHF_C_PORT_RESET: 2684 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2685 break; 2686 default: 2687 err = USBD_IOERROR; 2688 goto ret; 2689 } 2690 switch(value) { 2691 case UHF_C_PORT_CONNECTION: 2692 case UHF_C_PORT_ENABLE: 2693 case UHF_C_PORT_SUSPEND: 2694 case UHF_C_PORT_OVER_CURRENT: 2695 case UHF_C_PORT_RESET: 2696 /* Enable RHSC interrupt if condition is cleared. */ 2697 if ((OREAD4(sc, port) >> 16) == 0) 2698 ohci_rhsc_enable(sc); 2699 break; 2700 default: 2701 break; 2702 } 2703 break; 2704 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2705 if (len == 0) 2706 break; 2707 if ((value & 0xff) != 0) { 2708 err = USBD_IOERROR; 2709 goto ret; 2710 } 2711 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2712 hubd = ohci_hubd; 2713 hubd.bNbrPorts = sc->sc_noport; 2714 USETW(hubd.wHubCharacteristics, 2715 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2716 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2717 /* XXX overcurrent */ 2718 ); 2719 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2720 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2721 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2722 hubd.DeviceRemovable[i++] = (u_int8_t)v; 2723 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2724 l = min(len, hubd.bDescLength); 2725 totlen = l; 2726 memcpy(buf, &hubd, l); 2727 break; 2728 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2729 if (len != 4) { 2730 err = USBD_IOERROR; 2731 goto ret; 2732 } 2733 memset(buf, 0, len); /* ? XXX */ 2734 totlen = len; 2735 break; 2736 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2737 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 2738 index)); 2739 if (index < 1 || index > sc->sc_noport) { 2740 err = USBD_IOERROR; 2741 goto ret; 2742 } 2743 if (len != 4) { 2744 err = USBD_IOERROR; 2745 goto ret; 2746 } 2747 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2748 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 2749 v)); 2750 USETW(ps.wPortStatus, v); 2751 USETW(ps.wPortChange, v >> 16); 2752 l = min(len, sizeof ps); 2753 memcpy(buf, &ps, l); 2754 totlen = l; 2755 break; 2756 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2757 err = USBD_IOERROR; 2758 goto ret; 2759 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2760 break; 2761 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2762 if (index < 1 || index > sc->sc_noport) { 2763 err = USBD_IOERROR; 2764 goto ret; 2765 } 2766 port = OHCI_RH_PORT_STATUS(index); 2767 switch(value) { 2768 case UHF_PORT_ENABLE: 2769 OWRITE4(sc, port, UPS_PORT_ENABLED); 2770 break; 2771 case UHF_PORT_SUSPEND: 2772 OWRITE4(sc, port, UPS_SUSPEND); 2773 break; 2774 case UHF_PORT_RESET: 2775 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 2776 index)); 2777 OWRITE4(sc, port, UPS_RESET); 2778 for (i = 0; i < 5; i++) { 2779 usb_delay_ms(&sc->sc_bus, 2780 USB_PORT_ROOT_RESET_DELAY); 2781 if (sc->sc_dying) { 2782 err = USBD_IOERROR; 2783 goto ret; 2784 } 2785 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2786 break; 2787 } 2788 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 2789 index, OREAD4(sc, port))); 2790 break; 2791 case UHF_PORT_POWER: 2792 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 2793 "%d\n", index)); 2794 OWRITE4(sc, port, UPS_PORT_POWER); 2795 break; 2796 default: 2797 err = USBD_IOERROR; 2798 goto ret; 2799 } 2800 break; 2801 default: 2802 err = USBD_IOERROR; 2803 goto ret; 2804 } 2805 xfer->actlen = totlen; 2806 err = USBD_NORMAL_COMPLETION; 2807 ret: 2808 xfer->status = err; 2809 mutex_enter(&sc->sc_lock); 2810 usb_transfer_complete(xfer); 2811 mutex_exit(&sc->sc_lock); 2812 return (USBD_IN_PROGRESS); 2813 } 2814 2815 /* Abort a root control request. */ 2816 Static void 2817 ohci_root_ctrl_abort(usbd_xfer_handle xfer) 2818 { 2819 /* Nothing to do, all transfers are synchronous. */ 2820 } 2821 2822 /* Close the root pipe. */ 2823 Static void 2824 ohci_root_ctrl_close(usbd_pipe_handle pipe) 2825 { 2826 DPRINTF(("ohci_root_ctrl_close\n")); 2827 /* Nothing to do. */ 2828 } 2829 2830 Static usbd_status 2831 ohci_root_intr_transfer(usbd_xfer_handle xfer) 2832 { 2833 ohci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2834 usbd_status err; 2835 2836 /* Insert last in queue. */ 2837 mutex_enter(&sc->sc_lock); 2838 err = usb_insert_transfer(xfer); 2839 mutex_exit(&sc->sc_lock); 2840 if (err) 2841 return (err); 2842 2843 /* Pipe isn't running, start first */ 2844 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2845 } 2846 2847 Static usbd_status 2848 ohci_root_intr_start(usbd_xfer_handle xfer) 2849 { 2850 usbd_pipe_handle pipe = xfer->pipe; 2851 ohci_softc_t *sc = pipe->device->bus->hci_private; 2852 2853 if (sc->sc_dying) 2854 return (USBD_IOERROR); 2855 2856 mutex_enter(&sc->sc_lock); 2857 KASSERT(sc->sc_intrxfer == NULL); 2858 sc->sc_intrxfer = xfer; 2859 mutex_exit(&sc->sc_lock); 2860 2861 return (USBD_IN_PROGRESS); 2862 } 2863 2864 /* Abort a root interrupt request. */ 2865 Static void 2866 ohci_root_intr_abort(usbd_xfer_handle xfer) 2867 { 2868 ohci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2869 2870 KASSERT(mutex_owned(&sc->sc_lock)); 2871 KASSERT(xfer->pipe->intrxfer == xfer); 2872 2873 sc->sc_intrxfer = NULL; 2874 2875 xfer->status = USBD_CANCELLED; 2876 usb_transfer_complete(xfer); 2877 } 2878 2879 /* Close the root pipe. */ 2880 Static void 2881 ohci_root_intr_close(usbd_pipe_handle pipe) 2882 { 2883 ohci_softc_t *sc = pipe->device->bus->hci_private; 2884 2885 KASSERT(mutex_owned(&sc->sc_lock)); 2886 2887 DPRINTF(("ohci_root_intr_close\n")); 2888 2889 sc->sc_intrxfer = NULL; 2890 } 2891 2892 /************************/ 2893 2894 Static usbd_status 2895 ohci_device_ctrl_transfer(usbd_xfer_handle xfer) 2896 { 2897 ohci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2898 usbd_status err; 2899 2900 /* Insert last in queue. */ 2901 mutex_enter(&sc->sc_lock); 2902 err = usb_insert_transfer(xfer); 2903 mutex_exit(&sc->sc_lock); 2904 if (err) 2905 return (err); 2906 2907 /* Pipe isn't running, start first */ 2908 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2909 } 2910 2911 Static usbd_status 2912 ohci_device_ctrl_start(usbd_xfer_handle xfer) 2913 { 2914 ohci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2915 usbd_status err; 2916 2917 if (sc->sc_dying) 2918 return (USBD_IOERROR); 2919 2920 #ifdef DIAGNOSTIC 2921 if (!(xfer->rqflags & URQ_REQUEST)) { 2922 /* XXX panic */ 2923 printf("ohci_device_ctrl_transfer: not a request\n"); 2924 return (USBD_INVAL); 2925 } 2926 #endif 2927 2928 mutex_enter(&sc->sc_lock); 2929 err = ohci_device_request(xfer); 2930 mutex_exit(&sc->sc_lock); 2931 if (err) 2932 return (err); 2933 2934 if (sc->sc_bus.use_polling) 2935 ohci_waitintr(sc, xfer); 2936 return (USBD_IN_PROGRESS); 2937 } 2938 2939 /* Abort a device control request. */ 2940 Static void 2941 ohci_device_ctrl_abort(usbd_xfer_handle xfer) 2942 { 2943 #ifdef DIAGNOSTIC 2944 ohci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2945 #endif 2946 2947 KASSERT(mutex_owned(&sc->sc_lock)); 2948 2949 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer)); 2950 ohci_abort_xfer(xfer, USBD_CANCELLED); 2951 } 2952 2953 /* Close a device control pipe. */ 2954 Static void 2955 ohci_device_ctrl_close(usbd_pipe_handle pipe) 2956 { 2957 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2958 ohci_softc_t *sc = pipe->device->bus->hci_private; 2959 2960 KASSERT(mutex_owned(&sc->sc_lock)); 2961 2962 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe)); 2963 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2964 ohci_free_std(sc, opipe->tail.td); 2965 } 2966 2967 /************************/ 2968 2969 Static void 2970 ohci_device_clear_toggle(usbd_pipe_handle pipe) 2971 { 2972 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2973 ohci_softc_t *sc = pipe->device->bus->hci_private; 2974 2975 opipe->sed->ed.ed_headp &= HTOO32(~OHCI_TOGGLECARRY); 2976 } 2977 2978 Static void 2979 ohci_noop(usbd_pipe_handle pipe) 2980 { 2981 } 2982 2983 Static usbd_status 2984 ohci_device_bulk_transfer(usbd_xfer_handle xfer) 2985 { 2986 ohci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2987 usbd_status err; 2988 2989 /* Insert last in queue. */ 2990 mutex_enter(&sc->sc_lock); 2991 err = usb_insert_transfer(xfer); 2992 mutex_exit(&sc->sc_lock); 2993 if (err) 2994 return (err); 2995 2996 /* Pipe isn't running, start first */ 2997 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2998 } 2999 3000 Static usbd_status 3001 ohci_device_bulk_start(usbd_xfer_handle xfer) 3002 { 3003 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3004 usbd_device_handle dev = opipe->pipe.device; 3005 ohci_softc_t *sc = dev->bus->hci_private; 3006 int addr = dev->address; 3007 ohci_soft_td_t *data, *tail, *tdp; 3008 ohci_soft_ed_t *sed; 3009 int len, isread, endpt; 3010 usbd_status err; 3011 3012 if (sc->sc_dying) 3013 return (USBD_IOERROR); 3014 3015 #ifdef DIAGNOSTIC 3016 if (xfer->rqflags & URQ_REQUEST) { 3017 /* XXX panic */ 3018 printf("ohci_device_bulk_start: a request\n"); 3019 return (USBD_INVAL); 3020 } 3021 #endif 3022 3023 mutex_enter(&sc->sc_lock); 3024 3025 len = xfer->length; 3026 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 3027 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3028 sed = opipe->sed; 3029 3030 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d " 3031 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags, 3032 endpt)); 3033 3034 opipe->u.bulk.isread = isread; 3035 opipe->u.bulk.length = len; 3036 3037 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3038 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3039 /* Update device address */ 3040 sed->ed.ed_flags = HTOO32( 3041 (O32TOH(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) | 3042 OHCI_ED_SET_FA(addr)); 3043 3044 /* Allocate a chain of new TDs (including a new tail). */ 3045 data = opipe->tail.td; 3046 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 3047 data, &tail); 3048 if (err) 3049 return err; 3050 3051 /* We want interrupt at the end of the transfer. */ 3052 tail->td.td_flags &= HTOO32(~OHCI_TD_INTR_MASK); 3053 tail->td.td_flags |= HTOO32(OHCI_TD_SET_DI(1)); 3054 tail->flags |= OHCI_CALL_DONE; 3055 tail = tail->nexttd; /* point at sentinel */ 3056 usb_syncmem(&tail->dma, tail->offs + offsetof(ohci_td_t, td_flags), 3057 sizeof(tail->td.td_flags), 3058 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3059 if (err) { 3060 mutex_exit(&sc->sc_lock); 3061 return (err); 3062 } 3063 3064 tail->xfer = NULL; 3065 xfer->hcpriv = data; 3066 3067 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x " 3068 "td_cbp=0x%08x td_be=0x%08x\n", 3069 (int)O32TOH(sed->ed.ed_flags), 3070 (int)O32TOH(data->td.td_flags), 3071 (int)O32TOH(data->td.td_cbp), 3072 (int)O32TOH(data->td.td_be))); 3073 3074 #ifdef OHCI_DEBUG 3075 if (ohcidebug > 5) { 3076 ohci_dump_ed(sc, sed); 3077 ohci_dump_tds(sc, data); 3078 } 3079 #endif 3080 3081 /* Insert ED in schedule */ 3082 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 3083 tdp->xfer = xfer; 3084 } 3085 sed->ed.ed_tailp = HTOO32(tail->physaddr); 3086 opipe->tail.td = tail; 3087 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3088 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3089 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3090 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 3091 if (xfer->timeout && !sc->sc_bus.use_polling) { 3092 callout_reset(&xfer->timeout_handle, mstohz(xfer->timeout), 3093 ohci_timeout, xfer); 3094 } 3095 mutex_exit(&sc->sc_lock); 3096 3097 #if 0 3098 /* This goes wrong if we are too slow. */ 3099 if (ohcidebug > 10) { 3100 delay(10000); 3101 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 3102 OREAD4(sc, OHCI_COMMAND_STATUS))); 3103 ohci_dump_ed(sc, sed); 3104 ohci_dump_tds(sc, data); 3105 } 3106 #endif 3107 3108 return (USBD_IN_PROGRESS); 3109 } 3110 3111 Static void 3112 ohci_device_bulk_abort(usbd_xfer_handle xfer) 3113 { 3114 #ifdef DIAGNOSTIC 3115 ohci_softc_t *sc = xfer->pipe->device->bus->hci_private; 3116 #endif 3117 3118 KASSERT(mutex_owned(&sc->sc_lock)); 3119 3120 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer)); 3121 ohci_abort_xfer(xfer, USBD_CANCELLED); 3122 } 3123 3124 /* 3125 * Close a device bulk pipe. 3126 */ 3127 Static void 3128 ohci_device_bulk_close(usbd_pipe_handle pipe) 3129 { 3130 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3131 ohci_softc_t *sc = pipe->device->bus->hci_private; 3132 3133 KASSERT(mutex_owned(&sc->sc_lock)); 3134 3135 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe)); 3136 ohci_close_pipe(pipe, sc->sc_bulk_head); 3137 ohci_free_std(sc, opipe->tail.td); 3138 } 3139 3140 /************************/ 3141 3142 Static usbd_status 3143 ohci_device_intr_transfer(usbd_xfer_handle xfer) 3144 { 3145 ohci_softc_t *sc = xfer->pipe->device->bus->hci_private; 3146 usbd_status err; 3147 3148 /* Insert last in queue. */ 3149 mutex_enter(&sc->sc_lock); 3150 err = usb_insert_transfer(xfer); 3151 mutex_exit(&sc->sc_lock); 3152 if (err) 3153 return (err); 3154 3155 /* Pipe isn't running, start first */ 3156 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 3157 } 3158 3159 Static usbd_status 3160 ohci_device_intr_start(usbd_xfer_handle xfer) 3161 { 3162 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3163 usbd_device_handle dev = opipe->pipe.device; 3164 ohci_softc_t *sc = dev->bus->hci_private; 3165 ohci_soft_ed_t *sed = opipe->sed; 3166 ohci_soft_td_t *data, *tail; 3167 int len, isread, endpt; 3168 3169 if (sc->sc_dying) 3170 return (USBD_IOERROR); 3171 3172 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d " 3173 "flags=%d priv=%p\n", 3174 xfer, xfer->length, xfer->flags, xfer->priv)); 3175 3176 #ifdef DIAGNOSTIC 3177 if (xfer->rqflags & URQ_REQUEST) 3178 panic("ohci_device_intr_transfer: a request"); 3179 #endif 3180 3181 len = xfer->length; 3182 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 3183 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3184 3185 data = opipe->tail.td; 3186 mutex_enter(&sc->sc_lock); 3187 tail = ohci_alloc_std(sc); 3188 mutex_exit(&sc->sc_lock); 3189 if (tail == NULL) 3190 return (USBD_NOMEM); 3191 tail->xfer = NULL; 3192 3193 data->td.td_flags = HTOO32( 3194 isread ? OHCI_TD_IN : OHCI_TD_OUT | 3195 OHCI_TD_NOCC | 3196 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 3197 if (xfer->flags & USBD_SHORT_XFER_OK) 3198 data->td.td_flags |= HTOO32(OHCI_TD_R); 3199 data->td.td_cbp = HTOO32(DMAADDR(&xfer->dmabuf, 0)); 3200 data->nexttd = tail; 3201 data->td.td_nexttd = HTOO32(tail->physaddr); 3202 data->td.td_be = HTOO32(O32TOH(data->td.td_cbp) + len - 1); 3203 data->len = len; 3204 data->xfer = xfer; 3205 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 3206 usb_syncmem(&data->dma, data->offs, sizeof(data->td), 3207 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3208 xfer->hcpriv = data; 3209 3210 #ifdef OHCI_DEBUG 3211 if (ohcidebug > 5) { 3212 DPRINTF(("ohci_device_intr_transfer:\n")); 3213 ohci_dump_ed(sc, sed); 3214 ohci_dump_tds(sc, data); 3215 } 3216 #endif 3217 3218 /* Insert ED in schedule */ 3219 mutex_enter(&sc->sc_lock); 3220 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3221 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3222 sed->ed.ed_tailp = HTOO32(tail->physaddr); 3223 opipe->tail.td = tail; 3224 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3225 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3226 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3227 3228 #if 0 3229 /* 3230 * This goes horribly wrong, printing thousands of descriptors, 3231 * because false references are followed due to the fact that the 3232 * TD is gone. 3233 */ 3234 if (ohcidebug > 5) { 3235 usb_delay_ms_locked(&sc->sc_bus, 5, &sc->sc_lock); 3236 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 3237 OREAD4(sc, OHCI_COMMAND_STATUS))); 3238 ohci_dump_ed(sc, sed); 3239 ohci_dump_tds(sc, data); 3240 } 3241 #endif 3242 mutex_exit(&sc->sc_lock); 3243 3244 return (USBD_IN_PROGRESS); 3245 } 3246 3247 /* Abort a device interrupt request. */ 3248 Static void 3249 ohci_device_intr_abort(usbd_xfer_handle xfer) 3250 { 3251 #ifdef DIAGNOSTIC 3252 ohci_softc_t *sc = xfer->pipe->device->bus->hci_private; 3253 #endif 3254 3255 KASSERT(mutex_owned(&sc->sc_lock)); 3256 KASSERT(xfer->pipe->intrxfer == xfer); 3257 3258 ohci_abort_xfer(xfer, USBD_CANCELLED); 3259 } 3260 3261 /* Close a device interrupt pipe. */ 3262 Static void 3263 ohci_device_intr_close(usbd_pipe_handle pipe) 3264 { 3265 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3266 ohci_softc_t *sc = pipe->device->bus->hci_private; 3267 int nslots = opipe->u.intr.nslots; 3268 int pos = opipe->u.intr.pos; 3269 int j; 3270 ohci_soft_ed_t *p, *sed = opipe->sed; 3271 3272 KASSERT(mutex_owned(&sc->sc_lock)); 3273 3274 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 3275 pipe, nslots, pos)); 3276 usb_syncmem(&sed->dma, sed->offs, 3277 sizeof(sed->ed), BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3278 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 3279 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3280 sizeof(sed->ed.ed_flags), 3281 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3282 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 3283 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) 3284 usb_delay_ms_locked(&sc->sc_bus, 2, &sc->sc_lock); 3285 3286 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 3287 continue; 3288 #ifdef DIAGNOSTIC 3289 if (p == NULL) 3290 panic("ohci_device_intr_close: ED not found"); 3291 #endif 3292 p->next = sed->next; 3293 p->ed.ed_nexted = sed->ed.ed_nexted; 3294 usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted), 3295 sizeof(p->ed.ed_nexted), 3296 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3297 3298 for (j = 0; j < nslots; j++) 3299 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 3300 3301 ohci_free_std(sc, opipe->tail.td); 3302 ohci_free_sed(sc, opipe->sed); 3303 } 3304 3305 Static usbd_status 3306 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival) 3307 { 3308 int i, j, best; 3309 u_int npoll, slow, shigh, nslots; 3310 u_int bestbw, bw; 3311 ohci_soft_ed_t *hsed, *sed = opipe->sed; 3312 3313 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 3314 if (ival == 0) { 3315 printf("ohci_setintr: 0 interval\n"); 3316 return (USBD_INVAL); 3317 } 3318 3319 npoll = OHCI_NO_INTRS; 3320 while (npoll > ival) 3321 npoll /= 2; 3322 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 3323 3324 /* 3325 * We now know which level in the tree the ED must go into. 3326 * Figure out which slot has most bandwidth left over. 3327 * Slots to examine: 3328 * npoll 3329 * 1 0 3330 * 2 1 2 3331 * 4 3 4 5 6 3332 * 8 7 8 9 10 11 12 13 14 3333 * N (N-1) .. (N-1+N-1) 3334 */ 3335 slow = npoll-1; 3336 shigh = slow + npoll; 3337 nslots = OHCI_NO_INTRS / npoll; 3338 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 3339 bw = 0; 3340 for (j = 0; j < nslots; j++) 3341 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 3342 if (bw < bestbw) { 3343 best = i; 3344 bestbw = bw; 3345 } 3346 } 3347 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 3348 best, slow, shigh, bestbw)); 3349 3350 mutex_enter(&sc->sc_lock); 3351 hsed = sc->sc_eds[best]; 3352 sed->next = hsed->next; 3353 usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags), 3354 sizeof(hsed->ed.ed_flags), 3355 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3356 sed->ed.ed_nexted = hsed->ed.ed_nexted; 3357 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3358 sizeof(sed->ed.ed_flags), 3359 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3360 hsed->next = sed; 3361 hsed->ed.ed_nexted = HTOO32(sed->physaddr); 3362 usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags), 3363 sizeof(hsed->ed.ed_flags), 3364 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3365 mutex_exit(&sc->sc_lock); 3366 3367 for (j = 0; j < nslots; j++) 3368 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 3369 opipe->u.intr.nslots = nslots; 3370 opipe->u.intr.pos = best; 3371 3372 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 3373 return (USBD_NORMAL_COMPLETION); 3374 } 3375 3376 /***********************/ 3377 3378 usbd_status 3379 ohci_device_isoc_transfer(usbd_xfer_handle xfer) 3380 { 3381 ohci_softc_t *sc = xfer->pipe->device->bus->hci_private; 3382 usbd_status err; 3383 3384 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer)); 3385 3386 /* Put it on our queue, */ 3387 mutex_enter(&sc->sc_lock); 3388 err = usb_insert_transfer(xfer); 3389 mutex_exit(&sc->sc_lock); 3390 3391 /* bail out on error, */ 3392 if (err && err != USBD_IN_PROGRESS) 3393 return (err); 3394 3395 /* XXX should check inuse here */ 3396 3397 /* insert into schedule, */ 3398 ohci_device_isoc_enter(xfer); 3399 3400 /* and start if the pipe wasn't running */ 3401 if (!err) 3402 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 3403 3404 return (err); 3405 } 3406 3407 void 3408 ohci_device_isoc_enter(usbd_xfer_handle xfer) 3409 { 3410 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3411 usbd_device_handle dev = opipe->pipe.device; 3412 ohci_softc_t *sc = dev->bus->hci_private; 3413 ohci_soft_ed_t *sed = opipe->sed; 3414 struct iso *iso = &opipe->u.iso; 3415 ohci_soft_itd_t *sitd, *nsitd; 3416 ohci_physaddr_t buf, offs, noffs, bp0; 3417 int i, ncur, nframes; 3418 3419 DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p " 3420 "nframes=%d\n", 3421 iso->inuse, iso->next, xfer, xfer->nframes)); 3422 3423 if (sc->sc_dying) 3424 return; 3425 3426 if (iso->next == -1) { 3427 /* Not in use yet, schedule it a few frames ahead. */ 3428 iso->next = O32TOH(sc->sc_hcca->hcca_frame_number) + 5; 3429 DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n", 3430 iso->next)); 3431 } 3432 3433 sitd = opipe->tail.itd; 3434 buf = DMAADDR(&xfer->dmabuf, 0); 3435 bp0 = OHCI_PAGE(buf); 3436 offs = OHCI_PAGE_OFFSET(buf); 3437 nframes = xfer->nframes; 3438 xfer->hcpriv = sitd; 3439 for (i = ncur = 0; i < nframes; i++, ncur++) { 3440 noffs = offs + xfer->frlengths[i]; 3441 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ 3442 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */ 3443 3444 /* Allocate next ITD */ 3445 mutex_enter(&sc->sc_lock); 3446 nsitd = ohci_alloc_sitd(sc); 3447 mutex_exit(&sc->sc_lock); 3448 if (nsitd == NULL) { 3449 /* XXX what now? */ 3450 printf("%s: isoc TD alloc failed\n", 3451 device_xname(sc->sc_dev)); 3452 return; 3453 } 3454 3455 /* Fill current ITD */ 3456 sitd->itd.itd_flags = HTOO32( 3457 OHCI_ITD_NOCC | 3458 OHCI_ITD_SET_SF(iso->next) | 3459 OHCI_ITD_SET_DI(6) | /* delay intr a little */ 3460 OHCI_ITD_SET_FC(ncur)); 3461 sitd->itd.itd_bp0 = HTOO32(bp0); 3462 sitd->nextitd = nsitd; 3463 sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr); 3464 sitd->itd.itd_be = HTOO32(bp0 + offs - 1); 3465 sitd->xfer = xfer; 3466 sitd->flags = 0; 3467 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 3468 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3469 3470 sitd = nsitd; 3471 iso->next = iso->next + ncur; 3472 bp0 = OHCI_PAGE(buf + offs); 3473 ncur = 0; 3474 } 3475 sitd->itd.itd_offset[ncur] = HTOO16(OHCI_ITD_MK_OFFS(offs)); 3476 offs = noffs; 3477 } 3478 mutex_enter(&sc->sc_lock); 3479 nsitd = ohci_alloc_sitd(sc); 3480 mutex_exit(&sc->sc_lock); 3481 if (nsitd == NULL) { 3482 /* XXX what now? */ 3483 printf("%s: isoc TD alloc failed\n", 3484 device_xname(sc->sc_dev)); 3485 return; 3486 } 3487 /* Fixup last used ITD */ 3488 sitd->itd.itd_flags = HTOO32( 3489 OHCI_ITD_NOCC | 3490 OHCI_ITD_SET_SF(iso->next) | 3491 OHCI_ITD_SET_DI(0) | 3492 OHCI_ITD_SET_FC(ncur)); 3493 sitd->itd.itd_bp0 = HTOO32(bp0); 3494 sitd->nextitd = nsitd; 3495 sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr); 3496 sitd->itd.itd_be = HTOO32(bp0 + offs - 1); 3497 sitd->xfer = xfer; 3498 sitd->flags = OHCI_CALL_DONE; 3499 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 3500 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3501 3502 iso->next = iso->next + ncur; 3503 iso->inuse += nframes; 3504 3505 xfer->actlen = offs; /* XXX pretend we did it all */ 3506 3507 xfer->status = USBD_IN_PROGRESS; 3508 3509 #ifdef OHCI_DEBUG 3510 if (ohcidebug > 5) { 3511 DPRINTF(("ohci_device_isoc_enter: frame=%d\n", 3512 O32TOH(sc->sc_hcca->hcca_frame_number))); 3513 ohci_dump_itds(sc, xfer->hcpriv); 3514 ohci_dump_ed(sc, sed); 3515 } 3516 #endif 3517 3518 mutex_enter(&sc->sc_lock); 3519 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3520 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3521 sed->ed.ed_tailp = HTOO32(nsitd->physaddr); 3522 opipe->tail.itd = nsitd; 3523 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3524 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3525 sizeof(sed->ed.ed_flags), 3526 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3527 mutex_exit(&sc->sc_lock); 3528 3529 #ifdef OHCI_DEBUG 3530 if (ohcidebug > 5) { 3531 delay(150000); 3532 DPRINTF(("ohci_device_isoc_enter: after frame=%d\n", 3533 O32TOH(sc->sc_hcca->hcca_frame_number))); 3534 ohci_dump_itds(sc, xfer->hcpriv); 3535 ohci_dump_ed(sc, sed); 3536 } 3537 #endif 3538 } 3539 3540 usbd_status 3541 ohci_device_isoc_start(usbd_xfer_handle xfer) 3542 { 3543 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3544 ohci_softc_t *sc = opipe->pipe.device->bus->hci_private; 3545 3546 DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer)); 3547 3548 mutex_enter(&sc->sc_lock); 3549 3550 if (sc->sc_dying) { 3551 mutex_exit(&sc->sc_lock); 3552 return (USBD_IOERROR); 3553 } 3554 3555 #ifdef DIAGNOSTIC 3556 if (xfer->status != USBD_IN_PROGRESS) 3557 printf("ohci_device_isoc_start: not in progress %p\n", xfer); 3558 #endif 3559 3560 /* XXX anything to do? */ 3561 3562 mutex_exit(&sc->sc_lock); 3563 3564 return (USBD_IN_PROGRESS); 3565 } 3566 3567 void 3568 ohci_device_isoc_abort(usbd_xfer_handle xfer) 3569 { 3570 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3571 ohci_softc_t *sc = opipe->pipe.device->bus->hci_private; 3572 ohci_soft_ed_t *sed; 3573 ohci_soft_itd_t *sitd; 3574 3575 DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p lock=%p\n", xfer, &sc->sc_lock)); 3576 3577 KASSERT(mutex_owned(&sc->sc_lock)); 3578 3579 /* Transfer is already done. */ 3580 if (xfer->status != USBD_NOT_STARTED && 3581 xfer->status != USBD_IN_PROGRESS) { 3582 printf("ohci_device_isoc_abort: early return\n"); 3583 goto done; 3584 } 3585 3586 /* Give xfer the requested abort code. */ 3587 xfer->status = USBD_CANCELLED; 3588 3589 sed = opipe->sed; 3590 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3591 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3592 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */ 3593 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3594 sizeof(sed->ed.ed_flags), 3595 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3596 3597 sitd = xfer->hcpriv; 3598 #ifdef DIAGNOSTIC 3599 if (sitd == NULL) { 3600 printf("ohci_device_isoc_abort: hcpriv==0\n"); 3601 goto done; 3602 } 3603 #endif 3604 for (; sitd->xfer == xfer; sitd = sitd->nextitd) { 3605 #ifdef DIAGNOSTIC 3606 DPRINTFN(1,("abort sets done sitd=%p\n", sitd)); 3607 sitd->isdone = 1; 3608 #endif 3609 } 3610 3611 usb_delay_ms_locked(&sc->sc_bus, OHCI_ITD_NOFFSET, &sc->sc_lock); 3612 3613 /* Run callback. */ 3614 usb_transfer_complete(xfer); 3615 3616 sed->ed.ed_headp = HTOO32(sitd->physaddr); /* unlink TDs */ 3617 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */ 3618 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3619 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3620 3621 done: 3622 KASSERT(mutex_owned(&sc->sc_lock)); 3623 } 3624 3625 void 3626 ohci_device_isoc_done(usbd_xfer_handle xfer) 3627 { 3628 DPRINTFN(1,("ohci_device_isoc_done: xfer=%p\n", xfer)); 3629 } 3630 3631 usbd_status 3632 ohci_setup_isoc(usbd_pipe_handle pipe) 3633 { 3634 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3635 ohci_softc_t *sc = pipe->device->bus->hci_private; 3636 struct iso *iso = &opipe->u.iso; 3637 3638 iso->next = -1; 3639 iso->inuse = 0; 3640 3641 mutex_enter(&sc->sc_lock); 3642 ohci_add_ed(sc, opipe->sed, sc->sc_isoc_head); 3643 mutex_exit(&sc->sc_lock); 3644 3645 return (USBD_NORMAL_COMPLETION); 3646 } 3647 3648 void 3649 ohci_device_isoc_close(usbd_pipe_handle pipe) 3650 { 3651 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3652 ohci_softc_t *sc = pipe->device->bus->hci_private; 3653 3654 KASSERT(mutex_owned(&sc->sc_lock)); 3655 3656 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe)); 3657 ohci_close_pipe(pipe, sc->sc_isoc_head); 3658 #ifdef DIAGNOSTIC 3659 opipe->tail.itd->isdone = 1; 3660 #endif 3661 ohci_free_sitd(sc, opipe->tail.itd); 3662 } 3663
Indexes created Thu Sep 25 16:09:42 GMT 2025