ohci.c revision 1.260
1 /* $NetBSD: ohci.c,v 1.260 2016/04/23 10:15:32 skrll Exp $ */ 2 3 /* 4 * Copyright (c) 1998, 2004, 2005, 2012 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net) at 9 * Carlstedt Research & Technology, Jared D. McNeill (jmcneill (at) invisible.ca) 10 * and Matthew R. Green (mrg (at) eterna.com.au). 11 * This code is derived from software contributed to The NetBSD Foundation 12 * by Charles M. Hannum. 13 * 14 * Redistribution and use in source and binary forms, with or without 15 * modification, are permitted provided that the following conditions 16 * are met: 17 * 1. Redistributions of source code must retain the above copyright 18 * notice, this list of conditions and the following disclaimer. 19 * 2. Redistributions in binary form must reproduce the above copyright 20 * notice, this list of conditions and the following disclaimer in the 21 * documentation and/or other materials provided with the distribution. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 24 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 25 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 26 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 27 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 31 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 32 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 33 * POSSIBILITY OF SUCH DAMAGE. 34 */ 35 36 /* 37 * USB Open Host Controller driver. 38 * 39 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html 40 * USB spec: http://www.usb.org/developers/docs/ 41 */ 42 43 #include <sys/cdefs.h> 44 __KERNEL_RCSID(0, "$NetBSD: ohci.c,v 1.260 2016/04/23 10:15:32 skrll Exp $"); 45 46 #include "opt_usb.h" 47 48 #include <sys/param.h> 49 50 #include <sys/cpu.h> 51 #include <sys/device.h> 52 #include <sys/kernel.h> 53 #include <sys/kmem.h> 54 #include <sys/proc.h> 55 #include <sys/queue.h> 56 #include <sys/select.h> 57 #include <sys/sysctl.h> 58 #include <sys/systm.h> 59 60 #include <machine/endian.h> 61 62 #include <dev/usb/usb.h> 63 #include <dev/usb/usbdi.h> 64 #include <dev/usb/usbdivar.h> 65 #include <dev/usb/usb_mem.h> 66 #include <dev/usb/usb_quirks.h> 67 68 #include <dev/usb/ohcireg.h> 69 #include <dev/usb/ohcivar.h> 70 #include <dev/usb/usbroothub.h> 71 #include <dev/usb/usbhist.h> 72 73 #ifdef USB_DEBUG 74 #ifndef OHCI_DEBUG 75 #define ohcidebug 0 76 #else 77 static int ohcidebug = 10; 78 79 SYSCTL_SETUP(sysctl_hw_ohci_setup, "sysctl hw.ohci setup") 80 { 81 int err; 82 const struct sysctlnode *rnode; 83 const struct sysctlnode *cnode; 84 85 err = sysctl_createv(clog, 0, NULL, &rnode, 86 CTLFLAG_PERMANENT, CTLTYPE_NODE, "ohci", 87 SYSCTL_DESCR("ohci global controls"), 88 NULL, 0, NULL, 0, CTL_HW, CTL_CREATE, CTL_EOL); 89 90 if (err) 91 goto fail; 92 93 /* control debugging printfs */ 94 err = sysctl_createv(clog, 0, &rnode, &cnode, 95 CTLFLAG_PERMANENT|CTLFLAG_READWRITE, CTLTYPE_INT, 96 "debug", SYSCTL_DESCR("Enable debugging output"), 97 NULL, 0, &ohcidebug, sizeof(ohcidebug), CTL_CREATE, CTL_EOL); 98 if (err) 99 goto fail; 100 101 return; 102 fail: 103 aprint_error("%s: sysctl_createv failed (err = %d)\n", __func__, err); 104 } 105 106 #endif /* OHCI_DEBUG */ 107 #endif /* USB_DEBUG */ 108 109 #define DPRINTF(FMT,A,B,C,D) USBHIST_LOG(ohcidebug,FMT,A,B,C,D) 110 #define DPRINTFN(N,FMT,A,B,C,D) USBHIST_LOGN(ohcidebug,N,FMT,A,B,C,D) 111 #define OHCIHIST_FUNC() USBHIST_FUNC() 112 #define OHCIHIST_CALLED(name) USBHIST_CALLED(ohcidebug) 113 114 #if BYTE_ORDER == BIG_ENDIAN 115 #define SWAP_ENDIAN OHCI_LITTLE_ENDIAN 116 #else 117 #define SWAP_ENDIAN OHCI_BIG_ENDIAN 118 #endif 119 120 #define O16TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap16(val) : val) 121 #define O32TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap32(val) : val) 122 #define HTOO16(val) O16TOH(val) 123 #define HTOO32(val) O32TOH(val) 124 125 struct ohci_pipe; 126 127 Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *); 128 Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *); 129 130 Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *); 131 Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *); 132 Static void ohci_free_std_locked(ohci_softc_t *, ohci_soft_td_t *); 133 134 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *); 135 Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *); 136 Static void ohci_free_sitd_locked(ohci_softc_t *, 137 ohci_soft_itd_t *); 138 139 Static int ohci_alloc_std_chain(ohci_softc_t *, struct usbd_xfer *, 140 int, int); 141 Static void ohci_free_stds(ohci_softc_t *, struct ohci_xfer *); 142 143 Static void ohci_reset_std_chain(ohci_softc_t *, struct usbd_xfer *, 144 int, int, ohci_soft_td_t *, ohci_soft_td_t **); 145 146 Static usbd_status ohci_open(struct usbd_pipe *); 147 Static void ohci_poll(struct usbd_bus *); 148 Static void ohci_softintr(void *); 149 Static void ohci_waitintr(ohci_softc_t *, struct usbd_xfer *); 150 Static void ohci_rhsc(ohci_softc_t *, struct usbd_xfer *); 151 Static void ohci_rhsc_softint(void *); 152 153 Static void ohci_add_ed(ohci_softc_t *, ohci_soft_ed_t *, 154 ohci_soft_ed_t *); 155 156 Static void ohci_rem_ed(ohci_softc_t *, ohci_soft_ed_t *, 157 ohci_soft_ed_t *); 158 Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *); 159 Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *); 160 Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t); 161 Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *); 162 Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *); 163 Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t); 164 165 Static usbd_status ohci_setup_isoc(struct usbd_pipe *); 166 Static void ohci_device_isoc_enter(struct usbd_xfer *); 167 168 Static struct usbd_xfer * 169 ohci_allocx(struct usbd_bus *, unsigned int); 170 Static void ohci_freex(struct usbd_bus *, struct usbd_xfer *); 171 Static void ohci_get_lock(struct usbd_bus *, kmutex_t **); 172 Static int ohci_roothub_ctrl(struct usbd_bus *, 173 usb_device_request_t *, void *, int); 174 175 Static usbd_status ohci_root_intr_transfer(struct usbd_xfer *); 176 Static usbd_status ohci_root_intr_start(struct usbd_xfer *); 177 Static void ohci_root_intr_abort(struct usbd_xfer *); 178 Static void ohci_root_intr_close(struct usbd_pipe *); 179 Static void ohci_root_intr_done(struct usbd_xfer *); 180 181 Static int ohci_device_ctrl_init(struct usbd_xfer *); 182 Static void ohci_device_ctrl_fini(struct usbd_xfer *); 183 Static usbd_status ohci_device_ctrl_transfer(struct usbd_xfer *); 184 Static usbd_status ohci_device_ctrl_start(struct usbd_xfer *); 185 Static void ohci_device_ctrl_abort(struct usbd_xfer *); 186 Static void ohci_device_ctrl_close(struct usbd_pipe *); 187 Static void ohci_device_ctrl_done(struct usbd_xfer *); 188 189 Static int ohci_device_bulk_init(struct usbd_xfer *); 190 Static void ohci_device_bulk_fini(struct usbd_xfer *); 191 Static usbd_status ohci_device_bulk_transfer(struct usbd_xfer *); 192 Static usbd_status ohci_device_bulk_start(struct usbd_xfer *); 193 Static void ohci_device_bulk_abort(struct usbd_xfer *); 194 Static void ohci_device_bulk_close(struct usbd_pipe *); 195 Static void ohci_device_bulk_done(struct usbd_xfer *); 196 197 Static int ohci_device_intr_init(struct usbd_xfer *); 198 Static void ohci_device_intr_fini(struct usbd_xfer *); 199 Static usbd_status ohci_device_intr_transfer(struct usbd_xfer *); 200 Static usbd_status ohci_device_intr_start(struct usbd_xfer *); 201 Static void ohci_device_intr_abort(struct usbd_xfer *); 202 Static void ohci_device_intr_close(struct usbd_pipe *); 203 Static void ohci_device_intr_done(struct usbd_xfer *); 204 205 Static int ohci_device_isoc_init(struct usbd_xfer *); 206 Static void ohci_device_isoc_fini(struct usbd_xfer *); 207 Static usbd_status ohci_device_isoc_transfer(struct usbd_xfer *); 208 Static void ohci_device_isoc_abort(struct usbd_xfer *); 209 Static void ohci_device_isoc_close(struct usbd_pipe *); 210 Static void ohci_device_isoc_done(struct usbd_xfer *); 211 212 Static usbd_status ohci_device_setintr(ohci_softc_t *, 213 struct ohci_pipe *, int); 214 215 Static void ohci_timeout(void *); 216 Static void ohci_timeout_task(void *); 217 Static void ohci_rhsc_enable(void *); 218 219 Static void ohci_close_pipe(struct usbd_pipe *, ohci_soft_ed_t *); 220 Static void ohci_abort_xfer(struct usbd_xfer *, usbd_status); 221 222 Static void ohci_device_clear_toggle(struct usbd_pipe *); 223 Static void ohci_noop(struct usbd_pipe *); 224 225 #ifdef OHCI_DEBUG 226 Static void ohci_dumpregs(ohci_softc_t *); 227 Static void ohci_dump_tds(ohci_softc_t *, ohci_soft_td_t *); 228 Static void ohci_dump_td(ohci_softc_t *, ohci_soft_td_t *); 229 Static void ohci_dump_ed(ohci_softc_t *, ohci_soft_ed_t *); 230 Static void ohci_dump_itd(ohci_softc_t *, ohci_soft_itd_t *); 231 Static void ohci_dump_itds(ohci_softc_t *, ohci_soft_itd_t *); 232 #endif 233 234 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 235 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 236 #define OWRITE1(sc, r, x) \ 237 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 238 #define OWRITE2(sc, r, x) \ 239 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 240 #define OWRITE4(sc, r, x) \ 241 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 242 243 static __inline uint32_t 244 OREAD4(ohci_softc_t *sc, bus_size_t r) 245 { 246 247 OBARR(sc); 248 return bus_space_read_4(sc->iot, sc->ioh, r); 249 } 250 251 /* Reverse the bits in a value 0 .. 31 */ 252 Static uint8_t revbits[OHCI_NO_INTRS] = 253 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 254 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 255 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 256 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 257 258 struct ohci_pipe { 259 struct usbd_pipe pipe; 260 ohci_soft_ed_t *sed; 261 union { 262 ohci_soft_td_t *td; 263 ohci_soft_itd_t *itd; 264 } tail; 265 /* Info needed for different pipe kinds. */ 266 union { 267 /* Control pipe */ 268 struct { 269 usb_dma_t reqdma; 270 } ctrl; 271 /* Interrupt pipe */ 272 struct { 273 int nslots; 274 int pos; 275 } intr; 276 /* Isochronous pipe */ 277 struct isoc { 278 int next, inuse; 279 } isoc; 280 }; 281 }; 282 283 Static const struct usbd_bus_methods ohci_bus_methods = { 284 .ubm_open = ohci_open, 285 .ubm_softint = ohci_softintr, 286 .ubm_dopoll = ohci_poll, 287 .ubm_allocx = ohci_allocx, 288 .ubm_freex = ohci_freex, 289 .ubm_getlock = ohci_get_lock, 290 .ubm_rhctrl = ohci_roothub_ctrl, 291 }; 292 293 Static const struct usbd_pipe_methods ohci_root_intr_methods = { 294 .upm_transfer = ohci_root_intr_transfer, 295 .upm_start = ohci_root_intr_start, 296 .upm_abort = ohci_root_intr_abort, 297 .upm_close = ohci_root_intr_close, 298 .upm_cleartoggle = ohci_noop, 299 .upm_done = ohci_root_intr_done, 300 }; 301 302 Static const struct usbd_pipe_methods ohci_device_ctrl_methods = { 303 .upm_init = ohci_device_ctrl_init, 304 .upm_fini = ohci_device_ctrl_fini, 305 .upm_transfer = ohci_device_ctrl_transfer, 306 .upm_start = ohci_device_ctrl_start, 307 .upm_abort = ohci_device_ctrl_abort, 308 .upm_close = ohci_device_ctrl_close, 309 .upm_cleartoggle = ohci_noop, 310 .upm_done = ohci_device_ctrl_done, 311 }; 312 313 Static const struct usbd_pipe_methods ohci_device_intr_methods = { 314 .upm_init = ohci_device_intr_init, 315 .upm_fini = ohci_device_intr_fini, 316 .upm_transfer = ohci_device_intr_transfer, 317 .upm_start = ohci_device_intr_start, 318 .upm_abort = ohci_device_intr_abort, 319 .upm_close = ohci_device_intr_close, 320 .upm_cleartoggle = ohci_device_clear_toggle, 321 .upm_done = ohci_device_intr_done, 322 }; 323 324 Static const struct usbd_pipe_methods ohci_device_bulk_methods = { 325 .upm_init = ohci_device_bulk_init, 326 .upm_fini = ohci_device_bulk_fini, 327 .upm_transfer = ohci_device_bulk_transfer, 328 .upm_start = ohci_device_bulk_start, 329 .upm_abort = ohci_device_bulk_abort, 330 .upm_close = ohci_device_bulk_close, 331 .upm_cleartoggle = ohci_device_clear_toggle, 332 .upm_done = ohci_device_bulk_done, 333 }; 334 335 Static const struct usbd_pipe_methods ohci_device_isoc_methods = { 336 .upm_init = ohci_device_isoc_init, 337 .upm_fini = ohci_device_isoc_fini, 338 .upm_transfer = ohci_device_isoc_transfer, 339 .upm_abort = ohci_device_isoc_abort, 340 .upm_close = ohci_device_isoc_close, 341 .upm_cleartoggle = ohci_noop, 342 .upm_done = ohci_device_isoc_done, 343 }; 344 345 int 346 ohci_activate(device_t self, enum devact act) 347 { 348 struct ohci_softc *sc = device_private(self); 349 350 switch (act) { 351 case DVACT_DEACTIVATE: 352 sc->sc_dying = 1; 353 return 0; 354 default: 355 return EOPNOTSUPP; 356 } 357 } 358 359 void 360 ohci_childdet(device_t self, device_t child) 361 { 362 struct ohci_softc *sc = device_private(self); 363 364 KASSERT(sc->sc_child == child); 365 sc->sc_child = NULL; 366 } 367 368 int 369 ohci_detach(struct ohci_softc *sc, int flags) 370 { 371 int rv = 0; 372 373 if (sc->sc_child != NULL) 374 rv = config_detach(sc->sc_child, flags); 375 376 if (rv != 0) 377 return rv; 378 379 callout_halt(&sc->sc_tmo_rhsc, &sc->sc_lock); 380 381 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 382 callout_destroy(&sc->sc_tmo_rhsc); 383 384 softint_disestablish(sc->sc_rhsc_si); 385 386 cv_destroy(&sc->sc_softwake_cv); 387 388 mutex_destroy(&sc->sc_lock); 389 mutex_destroy(&sc->sc_intr_lock); 390 391 if (sc->sc_hcca != NULL) 392 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 393 pool_cache_destroy(sc->sc_xferpool); 394 395 return rv; 396 } 397 398 ohci_soft_ed_t * 399 ohci_alloc_sed(ohci_softc_t *sc) 400 { 401 ohci_soft_ed_t *sed; 402 usbd_status err; 403 int i, offs; 404 usb_dma_t dma; 405 406 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 407 408 mutex_enter(&sc->sc_lock); 409 if (sc->sc_freeeds == NULL) { 410 DPRINTFN(2, "allocating chunk", 0, 0, 0, 0); 411 mutex_exit(&sc->sc_lock); 412 413 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 414 OHCI_ED_ALIGN, &dma); 415 if (err) 416 return 0; 417 418 mutex_enter(&sc->sc_lock); 419 for (i = 0; i < OHCI_SED_CHUNK; i++) { 420 offs = i * OHCI_SED_SIZE; 421 sed = KERNADDR(&dma, offs); 422 sed->physaddr = DMAADDR(&dma, offs); 423 sed->dma = dma; 424 sed->offs = offs; 425 sed->next = sc->sc_freeeds; 426 sc->sc_freeeds = sed; 427 } 428 } 429 sed = sc->sc_freeeds; 430 sc->sc_freeeds = sed->next; 431 mutex_exit(&sc->sc_lock); 432 433 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 434 sed->next = 0; 435 return sed; 436 } 437 438 static inline void 439 ohci_free_sed_locked(ohci_softc_t *sc, ohci_soft_ed_t *sed) 440 { 441 442 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 443 444 sed->next = sc->sc_freeeds; 445 sc->sc_freeeds = sed; 446 } 447 448 void 449 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 450 { 451 452 mutex_enter(&sc->sc_lock); 453 ohci_free_sed_locked(sc, sed); 454 mutex_exit(&sc->sc_lock); 455 } 456 457 ohci_soft_td_t * 458 ohci_alloc_std(ohci_softc_t *sc) 459 { 460 ohci_soft_td_t *std; 461 usbd_status err; 462 int i, offs; 463 usb_dma_t dma; 464 465 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 466 467 mutex_enter(&sc->sc_lock); 468 if (sc->sc_freetds == NULL) { 469 DPRINTFN(2, "allocating chunk", 0, 0, 0, 0); 470 mutex_exit(&sc->sc_lock); 471 472 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 473 OHCI_TD_ALIGN, &dma); 474 if (err) 475 return NULL; 476 477 mutex_enter(&sc->sc_lock); 478 for (i = 0; i < OHCI_STD_CHUNK; i++) { 479 offs = i * OHCI_STD_SIZE; 480 std = KERNADDR(&dma, offs); 481 std->physaddr = DMAADDR(&dma, offs); 482 std->dma = dma; 483 std->offs = offs; 484 std->nexttd = sc->sc_freetds; 485 sc->sc_freetds = std; 486 } 487 } 488 489 std = sc->sc_freetds; 490 sc->sc_freetds = std->nexttd; 491 mutex_exit(&sc->sc_lock); 492 493 memset(&std->td, 0, sizeof(ohci_td_t)); 494 std->nexttd = NULL; 495 std->xfer = NULL; 496 497 return std; 498 } 499 500 void 501 ohci_free_std_locked(ohci_softc_t *sc, ohci_soft_td_t *std) 502 { 503 504 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 505 506 std->nexttd = sc->sc_freetds; 507 sc->sc_freetds = std; 508 } 509 510 void 511 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std) 512 { 513 514 mutex_enter(&sc->sc_lock); 515 ohci_free_std_locked(sc, std); 516 mutex_exit(&sc->sc_lock); 517 } 518 519 Static int 520 ohci_alloc_std_chain(ohci_softc_t *sc, struct usbd_xfer *xfer, int length, int rd) 521 { 522 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 523 uint16_t flags = xfer->ux_flags; 524 525 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 526 527 DPRINTFN(8, "addr=%d endpt=%d len=%d speed=%d", 528 xfer->ux_pipe->up_dev->ud_addr, 529 UE_GET_ADDR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress), 530 length, xfer->ux_pipe->up_dev->ud_speed); 531 532 ASSERT_SLEEPABLE(); 533 KASSERT(length != 0 || (!rd && (flags & USBD_FORCE_SHORT_XFER))); 534 535 size_t nstd = (!rd && (flags & USBD_FORCE_SHORT_XFER)) ? 1 : 0; 536 nstd += ((length + OHCI_PAGE_SIZE - 1) / OHCI_PAGE_SIZE); 537 ox->ox_stds = kmem_zalloc(sizeof(ohci_soft_td_t *) * nstd, 538 KM_SLEEP); 539 ox->ox_nstd = nstd; 540 541 DPRINTFN(8, "xfer %p nstd %d", xfer, nstd, 0, 0); 542 543 for (size_t j = 0; j < ox->ox_nstd;) { 544 ohci_soft_td_t *cur = ohci_alloc_std(sc); 545 if (cur == NULL) 546 goto nomem; 547 548 ox->ox_stds[j++] = cur; 549 cur->xfer = xfer; 550 cur->flags = 0; 551 } 552 553 return 0; 554 555 nomem: 556 ohci_free_stds(sc, ox); 557 kmem_free(ox->ox_stds, sizeof(ohci_soft_td_t *) * nstd); 558 559 return ENOMEM; 560 } 561 562 Static void 563 ohci_free_stds(ohci_softc_t *sc, struct ohci_xfer *ox) 564 { 565 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 566 DPRINTF("ox=%p", ox, 0, 0, 0); 567 568 mutex_enter(&sc->sc_lock); 569 for (size_t i = 0; i < ox->ox_nstd; i++) { 570 ohci_soft_td_t *std = ox->ox_stds[i]; 571 if (std == NULL) 572 break; 573 ohci_free_std_locked(sc, std); 574 } 575 mutex_exit(&sc->sc_lock); 576 } 577 578 void 579 ohci_reset_std_chain(ohci_softc_t *sc, struct usbd_xfer *xfer, 580 int alen, int rd, ohci_soft_td_t *sp, ohci_soft_td_t **ep) 581 { 582 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 583 ohci_soft_td_t *next, *cur; 584 int len, curlen; 585 usb_dma_t *dma = &xfer->ux_dmabuf; 586 uint16_t flags = xfer->ux_flags; 587 588 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 589 DPRINTF("start len=%d", alen, 0, 0, 0); 590 591 KASSERT(mutex_owned(&sc->sc_lock)); 592 593 DPRINTFN(8, "addr=%d endpt=%d len=%d speed=%d", 594 xfer->ux_pipe->up_dev->ud_addr, 595 UE_GET_ADDR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress), 596 alen, xfer->ux_pipe->up_dev->ud_speed); 597 598 KASSERT(sp); 599 600 int mps = UGETW(xfer->ux_pipe->up_endpoint->ue_edesc->wMaxPacketSize); 601 602 /* 603 * Assign next for the len == 0 case where we don't go through the 604 * main loop. 605 */ 606 len = alen; 607 cur = next = sp; 608 609 usb_syncmem(dma, 0, len, 610 rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 611 const uint32_t tdflags = HTOO32( 612 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 613 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR); 614 615 size_t curoffs = 0; 616 for (size_t j = 1; len != 0;) { 617 if (j == ox->ox_nstd) 618 next = NULL; 619 else 620 next = ox->ox_stds[j++]; 621 KASSERT(next != cur); 622 623 curlen = 0; 624 ohci_physaddr_t sdataphys = DMAADDR(dma, curoffs); 625 ohci_physaddr_t edataphys = DMAADDR(dma, curoffs + len - 1); 626 627 ohci_physaddr_t sphyspg = OHCI_PAGE(sdataphys); 628 ohci_physaddr_t ephyspg = OHCI_PAGE(edataphys); 629 /* 630 * The OHCI hardware can handle at most one page 631 * crossing per TD 632 */ 633 curlen = len; 634 if (!(sphyspg == ephyspg || sphyspg + 1 == ephyspg)) { 635 /* must use multiple TDs, fill as much as possible. */ 636 curlen = 2 * OHCI_PAGE_SIZE - 637 (sdataphys & (OHCI_PAGE_SIZE - 1)); 638 /* the length must be a multiple of the max size */ 639 curlen -= curlen % mps; 640 } 641 KASSERT(curlen != 0); 642 DPRINTFN(4, "sdataphys=0x%08x edataphys=0x%08x " 643 "len=%d curlen=%d", sdataphys, edataphys, len, curlen); 644 645 cur->td.td_flags = tdflags; 646 cur->td.td_cbp = HTOO32(sdataphys); 647 cur->td.td_be = HTOO32(edataphys); 648 cur->td.td_nexttd = (next != NULL) ? HTOO32(next->physaddr) : 0; 649 cur->nexttd = next; 650 cur->len = curlen; 651 cur->flags = OHCI_ADD_LEN; 652 cur->xfer = xfer; 653 ohci_hash_add_td(sc, cur); 654 655 usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td), 656 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 657 658 curoffs += curlen; 659 len -= curlen; 660 661 if (len != 0) { 662 KASSERT(next != NULL); 663 DPRINTFN(10, "extend chain", 0, 0, 0, 0); 664 cur = next; 665 } 666 } 667 cur->td.td_flags |= 668 (xfer->ux_flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0); 669 670 if (!rd && 671 (flags & USBD_FORCE_SHORT_XFER) && 672 alen % mps == 0) { 673 /* Force a 0 length transfer at the end. */ 674 675 KASSERT(next != NULL); 676 cur = next; 677 678 cur->td.td_flags = tdflags; 679 cur->td.td_cbp = 0; /* indicate 0 length packet */ 680 cur->td.td_nexttd = 0; 681 cur->td.td_be = ~0; 682 cur->nexttd = NULL; 683 cur->len = 0; 684 cur->flags = 0; 685 cur->xfer = xfer; 686 ohci_hash_add_td(sc, cur); 687 688 usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td), 689 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 690 DPRINTFN(2, "add 0 xfer", 0, 0, 0, 0); 691 } 692 *ep = cur; 693 } 694 695 ohci_soft_itd_t * 696 ohci_alloc_sitd(ohci_softc_t *sc) 697 { 698 ohci_soft_itd_t *sitd; 699 usbd_status err; 700 int i, offs; 701 usb_dma_t dma; 702 703 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 704 705 mutex_enter(&sc->sc_lock); 706 if (sc->sc_freeitds == NULL) { 707 DPRINTFN(2, "allocating chunk", 0, 0, 0, 0); 708 mutex_exit(&sc->sc_lock); 709 710 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK, 711 OHCI_ITD_ALIGN, &dma); 712 if (err) 713 return NULL; 714 mutex_enter(&sc->sc_lock); 715 for (i = 0; i < OHCI_SITD_CHUNK; i++) { 716 offs = i * OHCI_SITD_SIZE; 717 sitd = KERNADDR(&dma, offs); 718 sitd->physaddr = DMAADDR(&dma, offs); 719 sitd->dma = dma; 720 sitd->offs = offs; 721 sitd->nextitd = sc->sc_freeitds; 722 sc->sc_freeitds = sitd; 723 } 724 } 725 726 sitd = sc->sc_freeitds; 727 sc->sc_freeitds = sitd->nextitd; 728 mutex_exit(&sc->sc_lock); 729 730 memset(&sitd->itd, 0, sizeof(ohci_itd_t)); 731 sitd->nextitd = NULL; 732 sitd->xfer = NULL; 733 734 #ifdef DIAGNOSTIC 735 sitd->isdone = true; 736 #endif 737 738 return sitd; 739 } 740 741 Static void 742 ohci_free_sitd_locked(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 743 { 744 745 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 746 DPRINTFN(10, "sitd=%p", sitd, 0, 0, 0); 747 748 KASSERT(sitd->isdone); 749 #ifdef DIAGNOSTIC 750 /* Warn double free */ 751 sitd->isdone = false; 752 #endif 753 754 sitd->nextitd = sc->sc_freeitds; 755 sc->sc_freeitds = sitd; 756 } 757 758 void 759 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 760 { 761 762 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 763 764 mutex_enter(&sc->sc_lock); 765 ohci_free_sitd_locked(sc, sitd); 766 mutex_exit(&sc->sc_lock); 767 } 768 769 int 770 ohci_init(ohci_softc_t *sc) 771 { 772 ohci_soft_ed_t *sed, *psed; 773 usbd_status err; 774 int i; 775 uint32_t s, ctl, rwc, ival, hcr, fm, per, rev, desca /*, descb */; 776 777 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 778 779 aprint_normal_dev(sc->sc_dev, ""); 780 781 sc->sc_hcca = NULL; 782 callout_init(&sc->sc_tmo_rhsc, CALLOUT_MPSAFE); 783 784 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_SOFTUSB); 785 mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_USB); 786 cv_init(&sc->sc_softwake_cv, "ohciab"); 787 788 sc->sc_rhsc_si = softint_establish(SOFTINT_NET | SOFTINT_MPSAFE, 789 ohci_rhsc_softint, sc); 790 791 for (i = 0; i < OHCI_HASH_SIZE; i++) 792 LIST_INIT(&sc->sc_hash_tds[i]); 793 for (i = 0; i < OHCI_HASH_SIZE; i++) 794 LIST_INIT(&sc->sc_hash_itds[i]); 795 796 sc->sc_xferpool = pool_cache_init(sizeof(struct ohci_xfer), 0, 0, 0, 797 "ohcixfer", NULL, IPL_USB, NULL, NULL, NULL); 798 799 rev = OREAD4(sc, OHCI_REVISION); 800 aprint_normal("OHCI version %d.%d%s\n", 801 OHCI_REV_HI(rev), OHCI_REV_LO(rev), 802 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 803 804 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 805 aprint_error_dev(sc->sc_dev, "unsupported OHCI revision\n"); 806 sc->sc_bus.ub_revision = USBREV_UNKNOWN; 807 return -1; 808 } 809 sc->sc_bus.ub_revision = USBREV_1_0; 810 sc->sc_bus.ub_usedma = true; 811 812 /* XXX determine alignment by R/W */ 813 /* Allocate the HCCA area. */ 814 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 815 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 816 if (err) { 817 sc->sc_hcca = NULL; 818 return err; 819 } 820 sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0); 821 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 822 823 sc->sc_eintrs = OHCI_NORMAL_INTRS; 824 825 /* Allocate dummy ED that starts the control list. */ 826 sc->sc_ctrl_head = ohci_alloc_sed(sc); 827 if (sc->sc_ctrl_head == NULL) { 828 err = ENOMEM; 829 goto bad1; 830 } 831 sc->sc_ctrl_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 832 833 /* Allocate dummy ED that starts the bulk list. */ 834 sc->sc_bulk_head = ohci_alloc_sed(sc); 835 if (sc->sc_bulk_head == NULL) { 836 err = ENOMEM; 837 goto bad2; 838 } 839 sc->sc_bulk_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 840 usb_syncmem(&sc->sc_bulk_head->dma, sc->sc_bulk_head->offs, 841 sizeof(sc->sc_bulk_head->ed), 842 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 843 844 /* Allocate dummy ED that starts the isochronous list. */ 845 sc->sc_isoc_head = ohci_alloc_sed(sc); 846 if (sc->sc_isoc_head == NULL) { 847 err = ENOMEM; 848 goto bad3; 849 } 850 sc->sc_isoc_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 851 usb_syncmem(&sc->sc_isoc_head->dma, sc->sc_isoc_head->offs, 852 sizeof(sc->sc_isoc_head->ed), 853 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 854 855 /* Allocate all the dummy EDs that make up the interrupt tree. */ 856 for (i = 0; i < OHCI_NO_EDS; i++) { 857 sed = ohci_alloc_sed(sc); 858 if (sed == NULL) { 859 while (--i >= 0) 860 ohci_free_sed(sc, sc->sc_eds[i]); 861 err = ENOMEM; 862 goto bad4; 863 } 864 /* All ED fields are set to 0. */ 865 sc->sc_eds[i] = sed; 866 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 867 if (i != 0) 868 psed = sc->sc_eds[(i-1) / 2]; 869 else 870 psed= sc->sc_isoc_head; 871 sed->next = psed; 872 sed->ed.ed_nexted = HTOO32(psed->physaddr); 873 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 874 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 875 } 876 /* 877 * Fill HCCA interrupt table. The bit reversal is to get 878 * the tree set up properly to spread the interrupts. 879 */ 880 for (i = 0; i < OHCI_NO_INTRS; i++) 881 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 882 HTOO32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 883 usb_syncmem(&sc->sc_hccadma, 0, OHCI_HCCA_SIZE, 884 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 885 886 #ifdef OHCI_DEBUG 887 DPRINTFN(15, "--- dump start ---", 0, 0, 0 ,0); 888 if (ohcidebug >= 15) { 889 for (i = 0; i < OHCI_NO_EDS; i++) { 890 DPRINTFN(15, "ed#%d ", i, 0, 0, 0); 891 ohci_dump_ed(sc, sc->sc_eds[i]); 892 } 893 DPRINTFN(15, "iso", 0, 0, 0 ,0); 894 ohci_dump_ed(sc, sc->sc_isoc_head); 895 } 896 DPRINTFN(15, "--- dump end ---", 0, 0, 0 ,0); 897 #endif 898 899 /* Preserve values programmed by SMM/BIOS but lost over reset. */ 900 ctl = OREAD4(sc, OHCI_CONTROL); 901 rwc = ctl & OHCI_RWC; 902 fm = OREAD4(sc, OHCI_FM_INTERVAL); 903 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 904 /* descb = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); */ 905 906 /* Determine in what context we are running. */ 907 if (ctl & OHCI_IR) { 908 /* SMM active, request change */ 909 DPRINTF("SMM active, request owner change", 0, 0, 0, 0); 910 if ((sc->sc_intre & (OHCI_OC | OHCI_MIE)) == 911 (OHCI_OC | OHCI_MIE)) 912 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_MIE); 913 s = OREAD4(sc, OHCI_COMMAND_STATUS); 914 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 915 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 916 usb_delay_ms(&sc->sc_bus, 1); 917 ctl = OREAD4(sc, OHCI_CONTROL); 918 } 919 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_MIE); 920 if ((ctl & OHCI_IR) == 0) { 921 aprint_error_dev(sc->sc_dev, 922 "SMM does not respond, resetting\n"); 923 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 924 goto reset; 925 } 926 #if 0 927 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */ 928 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 929 /* BIOS started controller. */ 930 DPRINTF("BIOS active", 0, 0, 0, 0); 931 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 932 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL | rwc); 933 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 934 } 935 #endif 936 } else { 937 DPRINTF("cold started", 0 ,0 ,0 ,0); 938 reset: 939 /* Controller was cold started. */ 940 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 941 } 942 943 /* 944 * This reset should not be necessary according to the OHCI spec, but 945 * without it some controllers do not start. 946 */ 947 DPRINTF("sc %p: resetting", sc, 0, 0, 0); 948 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 949 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 950 951 /* We now own the host controller and the bus has been reset. */ 952 953 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 954 /* Nominal time for a reset is 10 us. */ 955 for (i = 0; i < 10; i++) { 956 delay(10); 957 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 958 if (!hcr) 959 break; 960 } 961 if (hcr) { 962 aprint_error_dev(sc->sc_dev, "reset timeout\n"); 963 err = EIO; 964 goto bad5; 965 } 966 #ifdef OHCI_DEBUG 967 if (ohcidebug >= 15) 968 ohci_dumpregs(sc); 969 #endif 970 971 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 972 973 /* Set up HC registers. */ 974 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 975 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 976 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 977 /* disable all interrupts and then switch on all desired interrupts */ 978 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 979 /* switch on desired functional features */ 980 ctl = OREAD4(sc, OHCI_CONTROL); 981 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 982 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 983 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL | rwc; 984 /* And finally start it! */ 985 OWRITE4(sc, OHCI_CONTROL, ctl); 986 987 /* 988 * The controller is now OPERATIONAL. Set a some final 989 * registers that should be set earlier, but that the 990 * controller ignores when in the SUSPEND state. 991 */ 992 ival = OHCI_GET_IVAL(fm); 993 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 994 fm |= OHCI_FSMPS(ival) | ival; 995 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 996 per = OHCI_PERIODIC(ival); /* 90% periodic */ 997 OWRITE4(sc, OHCI_PERIODIC_START, per); 998 999 if (sc->sc_flags & OHCIF_SUPERIO) { 1000 /* no overcurrent protection */ 1001 desca |= OHCI_NOCP; 1002 /* 1003 * Clear NoPowerSwitching and PowerOnToPowerGoodTime meaning 1004 * that 1005 * - ports are always power switched 1006 * - don't wait for powered root hub port 1007 */ 1008 desca &= ~(__SHIFTIN(0xff, OHCI_POTPGT_MASK) | OHCI_NPS); 1009 } 1010 1011 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */ 1012 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP); 1013 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 1014 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY); 1015 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca); 1016 1017 /* 1018 * The AMD756 requires a delay before re-reading the register, 1019 * otherwise it will occasionally report 0 ports. 1020 */ 1021 sc->sc_noport = 0; 1022 for (i = 0; i < 10 && sc->sc_noport == 0; i++) { 1023 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY); 1024 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 1025 } 1026 1027 #ifdef OHCI_DEBUG 1028 if (ohcidebug >= 5) 1029 ohci_dumpregs(sc); 1030 #endif 1031 1032 /* Set up the bus struct. */ 1033 sc->sc_bus.ub_methods = &ohci_bus_methods; 1034 sc->sc_bus.ub_pipesize = sizeof(struct ohci_pipe); 1035 1036 sc->sc_control = sc->sc_intre = 0; 1037 1038 /* Finally, turn on interrupts. */ 1039 DPRINTF("enabling %#x", sc->sc_eintrs | OHCI_MIE, 0, 0, 0); 1040 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 1041 1042 return 0; 1043 1044 bad5: 1045 for (i = 0; i < OHCI_NO_EDS; i++) 1046 ohci_free_sed(sc, sc->sc_eds[i]); 1047 bad4: 1048 ohci_free_sed(sc, sc->sc_isoc_head); 1049 bad3: 1050 ohci_free_sed(sc, sc->sc_bulk_head); 1051 bad2: 1052 ohci_free_sed(sc, sc->sc_ctrl_head); 1053 bad1: 1054 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 1055 sc->sc_hcca = NULL; 1056 return err; 1057 } 1058 1059 struct usbd_xfer * 1060 ohci_allocx(struct usbd_bus *bus, unsigned int nframes) 1061 { 1062 ohci_softc_t *sc = OHCI_BUS2SC(bus); 1063 struct usbd_xfer *xfer; 1064 1065 xfer = pool_cache_get(sc->sc_xferpool, PR_NOWAIT); 1066 if (xfer != NULL) { 1067 memset(xfer, 0, sizeof(struct ohci_xfer)); 1068 #ifdef DIAGNOSTIC 1069 xfer->ux_state = XFER_BUSY; 1070 #endif 1071 } 1072 return xfer; 1073 } 1074 1075 void 1076 ohci_freex(struct usbd_bus *bus, struct usbd_xfer *xfer) 1077 { 1078 ohci_softc_t *sc = OHCI_BUS2SC(bus); 1079 1080 KASSERTMSG(xfer->ux_state == XFER_BUSY, 1081 "xfer=%p not busy, 0x%08x\n", xfer, xfer->ux_state); 1082 #ifdef DIAGNOSTIC 1083 xfer->ux_state = XFER_FREE; 1084 #endif 1085 pool_cache_put(sc->sc_xferpool, xfer); 1086 } 1087 1088 Static void 1089 ohci_get_lock(struct usbd_bus *bus, kmutex_t **lock) 1090 { 1091 ohci_softc_t *sc = OHCI_BUS2SC(bus); 1092 1093 *lock = &sc->sc_lock; 1094 } 1095 1096 /* 1097 * Shut down the controller when the system is going down. 1098 */ 1099 bool 1100 ohci_shutdown(device_t self, int flags) 1101 { 1102 ohci_softc_t *sc = device_private(self); 1103 1104 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1105 1106 DPRINTF("stopping the HC", 0, 0, 0, 0); 1107 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1108 return true; 1109 } 1110 1111 bool 1112 ohci_resume(device_t dv, const pmf_qual_t *qual) 1113 { 1114 ohci_softc_t *sc = device_private(dv); 1115 uint32_t ctl; 1116 1117 mutex_spin_enter(&sc->sc_intr_lock); 1118 sc->sc_bus.ub_usepolling++; 1119 mutex_spin_exit(&sc->sc_intr_lock); 1120 1121 /* Some broken BIOSes do not recover these values */ 1122 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 1123 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, 1124 sc->sc_ctrl_head->physaddr); 1125 OWRITE4(sc, OHCI_BULK_HEAD_ED, 1126 sc->sc_bulk_head->physaddr); 1127 if (sc->sc_intre) 1128 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_intre & 1129 (OHCI_ALL_INTRS | OHCI_MIE)); 1130 if (sc->sc_control) 1131 ctl = sc->sc_control; 1132 else 1133 ctl = OREAD4(sc, OHCI_CONTROL); 1134 ctl |= OHCI_HCFS_RESUME; 1135 OWRITE4(sc, OHCI_CONTROL, ctl); 1136 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 1137 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL; 1138 OWRITE4(sc, OHCI_CONTROL, ctl); 1139 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 1140 sc->sc_control = sc->sc_intre = 0; 1141 1142 mutex_spin_enter(&sc->sc_intr_lock); 1143 sc->sc_bus.ub_usepolling--; 1144 mutex_spin_exit(&sc->sc_intr_lock); 1145 1146 return true; 1147 } 1148 1149 bool 1150 ohci_suspend(device_t dv, const pmf_qual_t *qual) 1151 { 1152 ohci_softc_t *sc = device_private(dv); 1153 uint32_t ctl; 1154 1155 mutex_spin_enter(&sc->sc_intr_lock); 1156 sc->sc_bus.ub_usepolling++; 1157 mutex_spin_exit(&sc->sc_intr_lock); 1158 1159 ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK; 1160 if (sc->sc_control == 0) { 1161 /* 1162 * Preserve register values, in case that BIOS 1163 * does not recover them. 1164 */ 1165 sc->sc_control = ctl; 1166 sc->sc_intre = OREAD4(sc, 1167 OHCI_INTERRUPT_ENABLE); 1168 } 1169 ctl |= OHCI_HCFS_SUSPEND; 1170 OWRITE4(sc, OHCI_CONTROL, ctl); 1171 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1172 1173 mutex_spin_enter(&sc->sc_intr_lock); 1174 sc->sc_bus.ub_usepolling--; 1175 mutex_spin_exit(&sc->sc_intr_lock); 1176 1177 return true; 1178 } 1179 1180 #ifdef OHCI_DEBUG 1181 void 1182 ohci_dumpregs(ohci_softc_t *sc) 1183 { 1184 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1185 1186 DPRINTF("rev=0x%08x control=0x%08x command=0x%08x", 1187 OREAD4(sc, OHCI_REVISION), 1188 OREAD4(sc, OHCI_CONTROL), 1189 OREAD4(sc, OHCI_COMMAND_STATUS), 0); 1190 DPRINTF(" intrstat=0x%08x intre=0x%08x intrd=0x%08x", 1191 OREAD4(sc, OHCI_INTERRUPT_STATUS), 1192 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 1193 OREAD4(sc, OHCI_INTERRUPT_DISABLE), 0); 1194 DPRINTF(" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x", 1195 OREAD4(sc, OHCI_HCCA), 1196 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 1197 OREAD4(sc, OHCI_CONTROL_HEAD_ED), 0); 1198 DPRINTF(" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x", 1199 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 1200 OREAD4(sc, OHCI_BULK_HEAD_ED), 1201 OREAD4(sc, OHCI_BULK_CURRENT_ED) ,0); 1202 DPRINTF(" done=0x%08x fmival=0x%08x fmrem=0x%08x", 1203 OREAD4(sc, OHCI_DONE_HEAD), 1204 OREAD4(sc, OHCI_FM_INTERVAL), 1205 OREAD4(sc, OHCI_FM_REMAINING), 0); 1206 DPRINTF(" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x", 1207 OREAD4(sc, OHCI_FM_NUMBER), 1208 OREAD4(sc, OHCI_PERIODIC_START), 1209 OREAD4(sc, OHCI_LS_THRESHOLD), 0); 1210 DPRINTF(" desca=0x%08x descb=0x%08x stat=0x%08x", 1211 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 1212 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 1213 OREAD4(sc, OHCI_RH_STATUS), 0); 1214 DPRINTF(" port1=0x%08x port2=0x%08x", 1215 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 1216 OREAD4(sc, OHCI_RH_PORT_STATUS(2)), 0, 0); 1217 DPRINTF(" HCCA: frame_number=0x%04x done_head=0x%08x", 1218 O32TOH(sc->sc_hcca->hcca_frame_number), 1219 O32TOH(sc->sc_hcca->hcca_done_head), 0, 0); 1220 } 1221 #endif 1222 1223 Static int ohci_intr1(ohci_softc_t *); 1224 1225 int 1226 ohci_intr(void *p) 1227 { 1228 ohci_softc_t *sc = p; 1229 int ret = 0; 1230 1231 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1232 1233 if (sc == NULL) 1234 return 0; 1235 1236 mutex_spin_enter(&sc->sc_intr_lock); 1237 1238 if (sc->sc_dying || !device_has_power(sc->sc_dev)) 1239 goto done; 1240 1241 /* If we get an interrupt while polling, then just ignore it. */ 1242 if (sc->sc_bus.ub_usepolling) { 1243 DPRINTFN(16, "ignored interrupt while polling", 0, 0, 0, 0); 1244 /* for level triggered intrs, should do something to ack */ 1245 OWRITE4(sc, OHCI_INTERRUPT_STATUS, 1246 OREAD4(sc, OHCI_INTERRUPT_STATUS)); 1247 1248 goto done; 1249 } 1250 1251 ret = ohci_intr1(sc); 1252 1253 done: 1254 mutex_spin_exit(&sc->sc_intr_lock); 1255 return ret; 1256 } 1257 1258 Static int 1259 ohci_intr1(ohci_softc_t *sc) 1260 { 1261 uint32_t intrs, eintrs; 1262 1263 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1264 1265 /* In case the interrupt occurs before initialization has completed. */ 1266 if (sc == NULL || sc->sc_hcca == NULL) { 1267 #ifdef DIAGNOSTIC 1268 printf("ohci_intr: sc->sc_hcca == NULL\n"); 1269 #endif 1270 return 0; 1271 } 1272 1273 KASSERT(mutex_owned(&sc->sc_intr_lock)); 1274 1275 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1276 if (!intrs) 1277 return 0; 1278 1279 /* Acknowledge */ 1280 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs & ~(OHCI_MIE|OHCI_WDH)); 1281 eintrs = intrs & sc->sc_eintrs; 1282 DPRINTFN(7, "sc=%p", sc, 0, 0, 0); 1283 DPRINTFN(7, "intrs=%#x(%#x) eintrs=%#x(%#x)", 1284 intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), eintrs, 1285 sc->sc_eintrs); 1286 1287 if (!eintrs) { 1288 return 0; 1289 } 1290 1291 if (eintrs & OHCI_SO) { 1292 sc->sc_overrun_cnt++; 1293 if (usbd_ratecheck(&sc->sc_overrun_ntc)) { 1294 printf("%s: %u scheduling overruns\n", 1295 device_xname(sc->sc_dev), sc->sc_overrun_cnt); 1296 sc->sc_overrun_cnt = 0; 1297 } 1298 /* XXX do what */ 1299 eintrs &= ~OHCI_SO; 1300 } 1301 if (eintrs & OHCI_WDH) { 1302 /* 1303 * We block the interrupt below, and reenable it later from 1304 * ohci_softintr(). 1305 */ 1306 usb_schedsoftintr(&sc->sc_bus); 1307 } 1308 if (eintrs & OHCI_RD) { 1309 DPRINTFN(5, "resume detect", sc, 0, 0, 0); 1310 printf("%s: resume detect\n", device_xname(sc->sc_dev)); 1311 /* XXX process resume detect */ 1312 } 1313 if (eintrs & OHCI_UE) { 1314 DPRINTFN(5, "unrecoverable error", sc, 0, 0, 0); 1315 printf("%s: unrecoverable error, controller halted\n", 1316 device_xname(sc->sc_dev)); 1317 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1318 /* XXX what else */ 1319 } 1320 if (eintrs & OHCI_RHSC) { 1321 /* 1322 * We block the interrupt below, and reenable it later from 1323 * a timeout. 1324 */ 1325 softint_schedule(sc->sc_rhsc_si); 1326 } 1327 1328 if (eintrs != 0) { 1329 /* Block unprocessed interrupts. */ 1330 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs); 1331 sc->sc_eintrs &= ~eintrs; 1332 DPRINTF("sc %p blocking intrs 0x%x", sc, eintrs, 0, 0); 1333 } 1334 1335 return 1; 1336 } 1337 1338 void 1339 ohci_rhsc_enable(void *v_sc) 1340 { 1341 ohci_softc_t *sc = v_sc; 1342 1343 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1344 DPRINTF("sc %p", sc, 0, 0, 0); 1345 mutex_spin_enter(&sc->sc_intr_lock); 1346 sc->sc_eintrs |= OHCI_RHSC; 1347 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1348 mutex_spin_exit(&sc->sc_intr_lock); 1349 } 1350 1351 #ifdef OHCI_DEBUG 1352 const char *ohci_cc_strs[] = { 1353 "NO_ERROR", 1354 "CRC", 1355 "BIT_STUFFING", 1356 "DATA_TOGGLE_MISMATCH", 1357 "STALL", 1358 "DEVICE_NOT_RESPONDING", 1359 "PID_CHECK_FAILURE", 1360 "UNEXPECTED_PID", 1361 "DATA_OVERRUN", 1362 "DATA_UNDERRUN", 1363 "BUFFER_OVERRUN", 1364 "BUFFER_UNDERRUN", 1365 "reserved", 1366 "reserved", 1367 "NOT_ACCESSED", 1368 "NOT_ACCESSED", 1369 }; 1370 #endif 1371 1372 void 1373 ohci_softintr(void *v) 1374 { 1375 struct usbd_bus *bus = v; 1376 ohci_softc_t *sc = OHCI_BUS2SC(bus); 1377 ohci_soft_itd_t *sitd, *sidone, *sitdnext; 1378 ohci_soft_td_t *std, *sdone, *stdnext; 1379 struct usbd_xfer *xfer; 1380 struct ohci_pipe *opipe; 1381 int len, cc; 1382 int i, j, actlen, iframes, uedir; 1383 ohci_physaddr_t done; 1384 1385 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1386 1387 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1388 1389 usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head), 1390 sizeof(sc->sc_hcca->hcca_done_head), 1391 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1392 done = O32TOH(sc->sc_hcca->hcca_done_head) & ~OHCI_DONE_INTRS; 1393 sc->sc_hcca->hcca_done_head = 0; 1394 usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head), 1395 sizeof(sc->sc_hcca->hcca_done_head), 1396 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1397 OWRITE4(sc, OHCI_INTERRUPT_STATUS, OHCI_WDH); 1398 sc->sc_eintrs |= OHCI_WDH; 1399 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_WDH); 1400 1401 /* Reverse the done list. */ 1402 for (sdone = NULL, sidone = NULL; done != 0; ) { 1403 std = ohci_hash_find_td(sc, done); 1404 if (std != NULL) { 1405 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 1406 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1407 std->dnext = sdone; 1408 done = O32TOH(std->td.td_nexttd); 1409 sdone = std; 1410 DPRINTFN(10, "add TD %p", std, 0, 0, 0); 1411 continue; 1412 } 1413 sitd = ohci_hash_find_itd(sc, done); 1414 if (sitd != NULL) { 1415 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 1416 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1417 sitd->dnext = sidone; 1418 done = O32TOH(sitd->itd.itd_nextitd); 1419 sidone = sitd; 1420 DPRINTFN(5, "add ITD %p", sitd, 0, 0, 0); 1421 continue; 1422 } 1423 DPRINTFN(10, "addr %p not found", done, 0, 0, 0); 1424 device_printf(sc->sc_dev, "WARNING: addr 0x%08lx not found\n", 1425 (u_long)done); 1426 break; 1427 } 1428 1429 DPRINTFN(10, "sdone=%p sidone=%p", sdone, sidone, 0, 0); 1430 DPRINTFN(10, "--- TD dump start ---", 0, 0, 0, 0); 1431 #ifdef OHCI_DEBUG 1432 if (ohcidebug >= 10) { 1433 for (std = sdone; std; std = std->dnext) 1434 ohci_dump_td(sc, std); 1435 } 1436 #endif 1437 DPRINTFN(10, "--- TD dump end ---", 0, 0, 0, 0); 1438 1439 for (std = sdone; std; std = stdnext) { 1440 xfer = std->xfer; 1441 stdnext = std->dnext; 1442 DPRINTFN(10, "std=%p xfer=%p hcpriv=%p", std, xfer, 1443 xfer ? xfer->ux_hcpriv : 0, 0); 1444 if (xfer == NULL) { 1445 /* 1446 * xfer == NULL: There seems to be no xfer associated 1447 * with this TD. It is tailp that happened to end up on 1448 * the done queue. 1449 * Shouldn't happen, but some chips are broken(?). 1450 */ 1451 continue; 1452 } 1453 if (xfer->ux_status == USBD_CANCELLED || 1454 xfer->ux_status == USBD_TIMEOUT) { 1455 DPRINTF("cancel/timeout %p", xfer, 0, 0, 0); 1456 /* Handled by abort routine. */ 1457 continue; 1458 } 1459 callout_stop(&xfer->ux_callout); 1460 1461 len = std->len; 1462 if (std->td.td_cbp != 0) 1463 len -= O32TOH(std->td.td_be) - 1464 O32TOH(std->td.td_cbp) + 1; 1465 DPRINTFN(10, "len=%d, flags=0x%x", len, std->flags, 0, 0); 1466 if (std->flags & OHCI_ADD_LEN) 1467 xfer->ux_actlen += len; 1468 1469 cc = OHCI_TD_GET_CC(O32TOH(std->td.td_flags)); 1470 if (cc == OHCI_CC_NO_ERROR) { 1471 ohci_hash_rem_td(sc, std); 1472 if (std->flags & OHCI_CALL_DONE) { 1473 xfer->ux_status = USBD_NORMAL_COMPLETION; 1474 usb_transfer_complete(xfer); 1475 } 1476 } else { 1477 /* 1478 * Endpoint is halted. First unlink all the TDs 1479 * belonging to the failed transfer, and then restart 1480 * the endpoint. 1481 */ 1482 ohci_soft_td_t *p, *n; 1483 opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 1484 1485 DPRINTFN(10, "error cc=%d", cc, 0, 0, 0); 1486 1487 /* remove xfer's TDs from the hash */ 1488 for (p = std; p->xfer == xfer; p = n) { 1489 n = p->nexttd; 1490 ohci_hash_rem_td(sc, p); 1491 } 1492 1493 ohci_soft_ed_t *sed = opipe->sed; 1494 1495 /* clear halt and TD chain */ 1496 sed->ed.ed_headp = HTOO32(p->physaddr); 1497 usb_syncmem(&sed->dma, 1498 sed->offs + offsetof(ohci_ed_t, ed_headp), 1499 sizeof(sed->ed.ed_headp), 1500 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1501 1502 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1503 1504 if (cc == OHCI_CC_DATA_UNDERRUN) 1505 xfer->ux_status = USBD_NORMAL_COMPLETION; 1506 else if (cc == OHCI_CC_STALL) 1507 xfer->ux_status = USBD_STALLED; 1508 else 1509 xfer->ux_status = USBD_IOERROR; 1510 usb_transfer_complete(xfer); 1511 } 1512 } 1513 DPRINTFN(10, "--- ITD dump start ---", 0, 0, 0, 0); 1514 #ifdef OHCI_DEBUG 1515 if (ohcidebug >= 10) { 1516 for (sitd = sidone; sitd; sitd = sitd->dnext) 1517 ohci_dump_itd(sc, sitd); 1518 } 1519 #endif 1520 DPRINTFN(10, "--- ITD dump end ---", 0, 0, 0, 0); 1521 1522 for (sitd = sidone; sitd != NULL; sitd = sitdnext) { 1523 xfer = sitd->xfer; 1524 sitdnext = sitd->dnext; 1525 DPRINTFN(1, "sitd=%p xfer=%p hcpriv=%p", sitd, xfer, 1526 xfer ? xfer->ux_hcpriv : 0, 0); 1527 if (xfer == NULL) 1528 continue; 1529 if (xfer->ux_status == USBD_CANCELLED || 1530 xfer->ux_status == USBD_TIMEOUT) { 1531 DPRINTF("cancel/timeout %p", xfer, 0, 0, 0); 1532 /* Handled by abort routine. */ 1533 continue; 1534 } 1535 KASSERT(!sitd->isdone); 1536 #ifdef DIAGNOSTIC 1537 sitd->isdone = true; 1538 #endif 1539 if (sitd->flags & OHCI_CALL_DONE) { 1540 ohci_soft_itd_t *next; 1541 1542 opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 1543 opipe->isoc.inuse -= xfer->ux_nframes; 1544 uedir = UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc-> 1545 bEndpointAddress); 1546 xfer->ux_status = USBD_NORMAL_COMPLETION; 1547 actlen = 0; 1548 for (i = 0, sitd = xfer->ux_hcpriv;; 1549 sitd = next) { 1550 next = sitd->nextitd; 1551 if (OHCI_ITD_GET_CC(O32TOH(sitd-> 1552 itd.itd_flags)) != OHCI_CC_NO_ERROR) 1553 xfer->ux_status = USBD_IOERROR; 1554 /* For input, update frlengths with actual */ 1555 /* XXX anything necessary for output? */ 1556 if (uedir == UE_DIR_IN && 1557 xfer->ux_status == USBD_NORMAL_COMPLETION) { 1558 iframes = OHCI_ITD_GET_FC(O32TOH( 1559 sitd->itd.itd_flags)); 1560 for (j = 0; j < iframes; i++, j++) { 1561 len = O16TOH(sitd-> 1562 itd.itd_offset[j]); 1563 if ((OHCI_ITD_PSW_GET_CC(len) & 1564 OHCI_CC_NOT_ACCESSED_MASK) 1565 == OHCI_CC_NOT_ACCESSED) 1566 len = 0; 1567 else 1568 len = OHCI_ITD_PSW_LENGTH(len); 1569 xfer->ux_frlengths[i] = len; 1570 actlen += len; 1571 } 1572 } 1573 if (sitd->flags & OHCI_CALL_DONE) 1574 break; 1575 ohci_hash_rem_itd(sc, sitd); 1576 1577 } 1578 ohci_hash_rem_itd(sc, sitd); 1579 if (uedir == UE_DIR_IN && 1580 xfer->ux_status == USBD_NORMAL_COMPLETION) 1581 xfer->ux_actlen = actlen; 1582 xfer->ux_hcpriv = NULL; 1583 1584 usb_transfer_complete(xfer); 1585 } 1586 } 1587 1588 if (sc->sc_softwake) { 1589 sc->sc_softwake = 0; 1590 cv_broadcast(&sc->sc_softwake_cv); 1591 } 1592 1593 DPRINTFN(10, "done", 0, 0, 0, 0); 1594 } 1595 1596 void 1597 ohci_device_ctrl_done(struct usbd_xfer *xfer) 1598 { 1599 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 1600 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 1601 int len = UGETW(xfer->ux_request.wLength); 1602 int isread = (xfer->ux_request.bmRequestType & UT_READ); 1603 1604 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1605 DPRINTFN(10, "xfer=%p", xfer, 0, 0, 0); 1606 1607 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1608 KASSERT(xfer->ux_rqflags & URQ_REQUEST); 1609 1610 if (len) 1611 usb_syncmem(&xfer->ux_dmabuf, 0, len, 1612 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1613 usb_syncmem(&opipe->ctrl.reqdma, 0, 1614 sizeof(usb_device_request_t), BUS_DMASYNC_POSTWRITE); 1615 } 1616 1617 void 1618 ohci_device_intr_done(struct usbd_xfer *xfer) 1619 { 1620 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 1621 int isread = 1622 (UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress) == UE_DIR_IN); 1623 1624 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1625 DPRINTFN(10, "xfer=%p, actlen=%d", xfer, xfer->ux_actlen, 0, 0); 1626 1627 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1628 1629 usb_syncmem(&xfer->ux_dmabuf, 0, xfer->ux_length, 1630 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1631 } 1632 1633 void 1634 ohci_device_bulk_done(struct usbd_xfer *xfer) 1635 { 1636 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 1637 1638 int isread = 1639 (UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress) == UE_DIR_IN); 1640 1641 KASSERT(mutex_owned(&sc->sc_lock)); 1642 1643 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1644 DPRINTFN(10, "xfer=%p, actlen=%d", xfer, xfer->ux_actlen, 0, 0); 1645 usb_syncmem(&xfer->ux_dmabuf, 0, xfer->ux_length, 1646 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1647 } 1648 1649 Static void 1650 ohci_rhsc_softint(void *arg) 1651 { 1652 ohci_softc_t *sc = arg; 1653 1654 mutex_enter(&sc->sc_lock); 1655 1656 ohci_rhsc(sc, sc->sc_intrxfer); 1657 1658 /* Do not allow RHSC interrupts > 1 per second */ 1659 callout_reset(&sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc); 1660 1661 mutex_exit(&sc->sc_lock); 1662 } 1663 1664 void 1665 ohci_rhsc(ohci_softc_t *sc, struct usbd_xfer *xfer) 1666 { 1667 u_char *p; 1668 int i, m; 1669 int hstatus __unused; 1670 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1671 1672 KASSERT(mutex_owned(&sc->sc_lock)); 1673 1674 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1675 DPRINTF("sc=%p xfer=%p hstatus=0x%08x", sc, xfer, hstatus, 0); 1676 1677 if (xfer == NULL) { 1678 /* Just ignore the change. */ 1679 return; 1680 } 1681 1682 p = xfer->ux_buf; 1683 m = min(sc->sc_noport, xfer->ux_length * 8 - 1); 1684 memset(p, 0, xfer->ux_length); 1685 for (i = 1; i <= m; i++) { 1686 /* Pick out CHANGE bits from the status reg. */ 1687 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1688 p[i/8] |= 1 << (i%8); 1689 } 1690 DPRINTF("change=0x%02x", *p, 0, 0, 0); 1691 xfer->ux_actlen = xfer->ux_length; 1692 xfer->ux_status = USBD_NORMAL_COMPLETION; 1693 1694 usb_transfer_complete(xfer); 1695 } 1696 1697 void 1698 ohci_root_intr_done(struct usbd_xfer *xfer) 1699 { 1700 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 1701 1702 KASSERT(mutex_owned(&sc->sc_lock)); 1703 1704 KASSERT(sc->sc_intrxfer == xfer); 1705 sc->sc_intrxfer = NULL; 1706 } 1707 1708 /* 1709 * Wait here until controller claims to have an interrupt. 1710 * Then call ohci_intr and return. Use timeout to avoid waiting 1711 * too long. 1712 */ 1713 void 1714 ohci_waitintr(ohci_softc_t *sc, struct usbd_xfer *xfer) 1715 { 1716 int timo; 1717 uint32_t intrs; 1718 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1719 1720 mutex_enter(&sc->sc_lock); 1721 1722 xfer->ux_status = USBD_IN_PROGRESS; 1723 for (timo = xfer->ux_timeout; timo >= 0; timo--) { 1724 usb_delay_ms(&sc->sc_bus, 1); 1725 if (sc->sc_dying) 1726 break; 1727 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 1728 DPRINTFN(15, "intrs 0x%04x", intrs, 0, 0, 0); 1729 #ifdef OHCI_DEBUG 1730 if (ohcidebug > 15) 1731 ohci_dumpregs(sc); 1732 #endif 1733 if (intrs) { 1734 mutex_spin_enter(&sc->sc_intr_lock); 1735 ohci_intr1(sc); 1736 mutex_spin_exit(&sc->sc_intr_lock); 1737 if (xfer->ux_status != USBD_IN_PROGRESS) 1738 goto done; 1739 } 1740 } 1741 1742 /* Timeout */ 1743 DPRINTF("timeout", 0, 0, 0, 0); 1744 xfer->ux_status = USBD_TIMEOUT; 1745 usb_transfer_complete(xfer); 1746 1747 done: 1748 mutex_exit(&sc->sc_lock); 1749 } 1750 1751 void 1752 ohci_poll(struct usbd_bus *bus) 1753 { 1754 ohci_softc_t *sc = OHCI_BUS2SC(bus); 1755 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1756 1757 #ifdef OHCI_DEBUG 1758 static int last; 1759 int new; 1760 new = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1761 if (new != last) { 1762 DPRINTFN(10, "intrs=0x%04x", new, 0, 0, 0); 1763 last = new; 1764 } 1765 #endif 1766 sc->sc_eintrs |= OHCI_WDH; 1767 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) { 1768 mutex_spin_enter(&sc->sc_intr_lock); 1769 ohci_intr1(sc); 1770 mutex_spin_exit(&sc->sc_intr_lock); 1771 } 1772 } 1773 1774 /* 1775 * Add an ED to the schedule. Called with USB lock held. 1776 */ 1777 Static void 1778 ohci_add_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1779 { 1780 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1781 DPRINTFN(8, "sed=%p head=%p", sed, head, 0, 0); 1782 1783 KASSERT(mutex_owned(&sc->sc_lock)); 1784 1785 usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted), 1786 sizeof(head->ed.ed_nexted), 1787 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1788 sed->next = head->next; 1789 sed->ed.ed_nexted = head->ed.ed_nexted; 1790 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted), 1791 sizeof(sed->ed.ed_nexted), 1792 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1793 head->next = sed; 1794 head->ed.ed_nexted = HTOO32(sed->physaddr); 1795 usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted), 1796 sizeof(head->ed.ed_nexted), 1797 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1798 } 1799 1800 /* 1801 * Remove an ED from the schedule. Called with USB lock held. 1802 */ 1803 Static void 1804 ohci_rem_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1805 { 1806 ohci_soft_ed_t *p; 1807 1808 KASSERT(mutex_owned(&sc->sc_lock)); 1809 1810 /* XXX */ 1811 for (p = head; p != NULL && p->next != sed; p = p->next) 1812 ; 1813 KASSERT(p != NULL); 1814 1815 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted), 1816 sizeof(sed->ed.ed_nexted), 1817 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1818 p->next = sed->next; 1819 p->ed.ed_nexted = sed->ed.ed_nexted; 1820 usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted), 1821 sizeof(p->ed.ed_nexted), 1822 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1823 } 1824 1825 /* 1826 * When a transfer is completed the TD is added to the done queue by 1827 * the host controller. This queue is the processed by software. 1828 * Unfortunately the queue contains the physical address of the TD 1829 * and we have no simple way to translate this back to a kernel address. 1830 * To make the translation possible (and fast) we use a hash table of 1831 * TDs currently in the schedule. The physical address is used as the 1832 * hash value. 1833 */ 1834 1835 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1836 /* Called with USB lock held. */ 1837 void 1838 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1839 { 1840 int h = HASH(std->physaddr); 1841 1842 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1843 1844 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1845 } 1846 1847 /* Called with USB lock held. */ 1848 void 1849 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1850 { 1851 1852 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1853 1854 LIST_REMOVE(std, hnext); 1855 } 1856 1857 ohci_soft_td_t * 1858 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a) 1859 { 1860 int h = HASH(a); 1861 ohci_soft_td_t *std; 1862 1863 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1864 std != NULL; 1865 std = LIST_NEXT(std, hnext)) 1866 if (std->physaddr == a) 1867 return std; 1868 return NULL; 1869 } 1870 1871 /* Called with USB lock held. */ 1872 void 1873 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1874 { 1875 int h = HASH(sitd->physaddr); 1876 1877 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1878 1879 KASSERT(mutex_owned(&sc->sc_lock)); 1880 1881 DPRINTFN(10, "sitd=%p physaddr=0x%08lx", sitd, (u_long)sitd->physaddr, 1882 0, 0); 1883 1884 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext); 1885 } 1886 1887 /* Called with USB lock held. */ 1888 void 1889 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1890 { 1891 1892 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1893 1894 KASSERT(mutex_owned(&sc->sc_lock)); 1895 1896 DPRINTFN(10, "sitd=%p physaddr=0x%08lx", sitd, (u_long)sitd->physaddr, 1897 0, 0); 1898 1899 LIST_REMOVE(sitd, hnext); 1900 } 1901 1902 ohci_soft_itd_t * 1903 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a) 1904 { 1905 int h = HASH(a); 1906 ohci_soft_itd_t *sitd; 1907 1908 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]); 1909 sitd != NULL; 1910 sitd = LIST_NEXT(sitd, hnext)) 1911 if (sitd->physaddr == a) 1912 return sitd; 1913 return NULL; 1914 } 1915 1916 void 1917 ohci_timeout(void *addr) 1918 { 1919 struct usbd_xfer *xfer = addr; 1920 struct ohci_xfer *oxfer = OHCI_XFER2OXFER(xfer); 1921 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 1922 1923 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1924 DPRINTF("oxfer=%p", oxfer, 0, 0, 0); 1925 1926 if (sc->sc_dying) { 1927 mutex_enter(&sc->sc_lock); 1928 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1929 mutex_exit(&sc->sc_lock); 1930 return; 1931 } 1932 1933 /* Execute the abort in a process context. */ 1934 usb_init_task(&oxfer->abort_task, ohci_timeout_task, addr, 1935 USB_TASKQ_MPSAFE); 1936 usb_add_task(xfer->ux_pipe->up_dev, &oxfer->abort_task, 1937 USB_TASKQ_HC); 1938 } 1939 1940 void 1941 ohci_timeout_task(void *addr) 1942 { 1943 struct usbd_xfer *xfer = addr; 1944 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 1945 1946 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1947 1948 DPRINTF("xfer=%p", xfer, 0, 0, 0); 1949 1950 mutex_enter(&sc->sc_lock); 1951 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1952 mutex_exit(&sc->sc_lock); 1953 } 1954 1955 #ifdef OHCI_DEBUG 1956 void 1957 ohci_dump_tds(ohci_softc_t *sc, ohci_soft_td_t *std) 1958 { 1959 for (; std; std = std->nexttd) { 1960 ohci_dump_td(sc, std); 1961 KASSERTMSG(std->nexttd == NULL || std != std->nexttd, 1962 "std %p next %p", std, std->nexttd); 1963 } 1964 } 1965 1966 void 1967 ohci_dump_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1968 { 1969 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1970 1971 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 1972 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1973 1974 uint32_t flags = O32TOH(std->td.td_flags); 1975 DPRINTF("TD(%p) at 0x%08lx:", std, (u_long)std->physaddr, 0, 0); 1976 DPRINTF(" round=%d DP=%x DI=%x T=%x", 1977 !!(flags & OHCI_TD_R), 1978 __SHIFTOUT(flags, OHCI_TD_DP_MASK), 1979 OHCI_TD_GET_DI(flags), 1980 __SHIFTOUT(flags, OHCI_TD_TOGGLE_MASK)); 1981 DPRINTF(" EC=%d CC=%d", OHCI_TD_GET_EC(flags), OHCI_TD_GET_CC(flags), 1982 0, 0); 1983 DPRINTF(" td_cbp=0x%08lx td_nexttd=0x%08lx td_be=0x%08lx", 1984 (u_long)O32TOH(std->td.td_cbp), 1985 (u_long)O32TOH(std->td.td_nexttd), 1986 (u_long)O32TOH(std->td.td_be), 0); 1987 } 1988 1989 void 1990 ohci_dump_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1991 { 1992 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1993 1994 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 1995 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1996 1997 uint32_t flags = O32TOH(sitd->itd.itd_flags); 1998 DPRINTF("ITD(%p) at 0x%08lx", sitd, (u_long)sitd->physaddr, 0, 0); 1999 DPRINTF(" sf=%d di=%d fc=%d cc=%d", 2000 OHCI_ITD_GET_SF(flags), OHCI_ITD_GET_DI(flags), 2001 OHCI_ITD_GET_FC(flags), OHCI_ITD_GET_CC(flags)); 2002 DPRINTF(" bp0=0x%08x next=0x%08x be=0x%08x", 2003 O32TOH(sitd->itd.itd_bp0), 2004 O32TOH(sitd->itd.itd_nextitd), 2005 O32TOH(sitd->itd.itd_be), 0); 2006 CTASSERT(OHCI_ITD_NOFFSET == 8); 2007 DPRINTF(" offs[0] = 0x%04x offs[1] = 0x%04x " 2008 "offs[2] = 0x%04x offs[3] = 0x%04x", 2009 O16TOH(sitd->itd.itd_offset[0]), 2010 O16TOH(sitd->itd.itd_offset[1]), 2011 O16TOH(sitd->itd.itd_offset[2]), 2012 O16TOH(sitd->itd.itd_offset[3])); 2013 DPRINTF(" offs[4] = 0x%04x offs[5] = 0x%04x " 2014 "offs[6] = 0x%04x offs[7] = 0x%04x", 2015 O16TOH(sitd->itd.itd_offset[4]), 2016 O16TOH(sitd->itd.itd_offset[5]), 2017 O16TOH(sitd->itd.itd_offset[6]), 2018 O16TOH(sitd->itd.itd_offset[7])); 2019 } 2020 2021 void 2022 ohci_dump_itds(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 2023 { 2024 for (; sitd; sitd = sitd->nextitd) 2025 ohci_dump_itd(sc, sitd); 2026 } 2027 2028 void 2029 ohci_dump_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 2030 { 2031 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2032 2033 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 2034 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2035 2036 uint32_t flags = O32TOH(sed->ed.ed_flags); 2037 DPRINTF("ED(%p) at 0x%08lx:", sed, sed->physaddr, 0, 0); 2038 DPRINTF(" addr=%d endpt=%d maxp=%d", 2039 OHCI_ED_GET_FA(flags), 2040 OHCI_ED_GET_EN(flags), 2041 OHCI_ED_GET_MAXP(flags), 2042 0); 2043 DPRINTF(" dir=%d speed=%d skip=%d iso=%d", 2044 __SHIFTOUT(flags, OHCI_ED_DIR_MASK), 2045 !!(flags & OHCI_ED_SPEED), 2046 !!(flags & OHCI_ED_SKIP), 2047 !!(flags & OHCI_ED_FORMAT_ISO)); 2048 DPRINTF(" tailp=0x%08lx", (u_long)O32TOH(sed->ed.ed_tailp), 2049 0, 0, 0); 2050 DPRINTF(" headp=0x%08lx nexted=0x%08lx halted=%d carry=%d", 2051 O32TOH(sed->ed.ed_headp), O32TOH(sed->ed.ed_nexted), 2052 !!(O32TOH(sed->ed.ed_headp) & OHCI_HALTED), 2053 !!(O32TOH(sed->ed.ed_headp) & OHCI_TOGGLECARRY)); 2054 } 2055 #endif 2056 2057 usbd_status 2058 ohci_open(struct usbd_pipe *pipe) 2059 { 2060 struct usbd_device *dev = pipe->up_dev; 2061 struct usbd_bus *bus = dev->ud_bus; 2062 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 2063 usb_endpoint_descriptor_t *ed = pipe->up_endpoint->ue_edesc; 2064 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 2065 uint8_t addr = dev->ud_addr; 2066 uint8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 2067 ohci_soft_ed_t *sed; 2068 ohci_soft_td_t *std; 2069 ohci_soft_itd_t *sitd; 2070 ohci_physaddr_t tdphys; 2071 uint32_t fmt; 2072 usbd_status err = USBD_NOMEM; 2073 int ival; 2074 2075 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2076 DPRINTFN(1, "pipe=%p, addr=%d, endpt=%d (%d)", pipe, addr, 2077 ed->bEndpointAddress, bus->ub_rhaddr); 2078 2079 if (sc->sc_dying) { 2080 return USBD_IOERROR; 2081 } 2082 2083 std = NULL; 2084 sed = NULL; 2085 2086 if (addr == bus->ub_rhaddr) { 2087 switch (ed->bEndpointAddress) { 2088 case USB_CONTROL_ENDPOINT: 2089 pipe->up_methods = &roothub_ctrl_methods; 2090 break; 2091 case UE_DIR_IN | USBROOTHUB_INTR_ENDPT: 2092 pipe->up_methods = &ohci_root_intr_methods; 2093 break; 2094 default: 2095 err = USBD_INVAL; 2096 goto bad; 2097 } 2098 } else { 2099 sed = ohci_alloc_sed(sc); 2100 if (sed == NULL) 2101 goto bad; 2102 opipe->sed = sed; 2103 if (xfertype == UE_ISOCHRONOUS) { 2104 sitd = ohci_alloc_sitd(sc); 2105 if (sitd == NULL) 2106 goto bad; 2107 2108 opipe->tail.itd = sitd; 2109 tdphys = sitd->physaddr; 2110 fmt = OHCI_ED_FORMAT_ISO; 2111 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 2112 fmt |= OHCI_ED_DIR_IN; 2113 else 2114 fmt |= OHCI_ED_DIR_OUT; 2115 } else { 2116 std = ohci_alloc_std(sc); 2117 if (std == NULL) 2118 goto bad; 2119 2120 opipe->tail.td = std; 2121 tdphys = std->physaddr; 2122 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD; 2123 } 2124 sed->ed.ed_flags = HTOO32( 2125 OHCI_ED_SET_FA(addr) | 2126 OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) | 2127 (dev->ud_speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) | 2128 fmt | 2129 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 2130 sed->ed.ed_headp = HTOO32(tdphys | 2131 (pipe->up_endpoint->ue_toggle ? OHCI_TOGGLECARRY : 0)); 2132 sed->ed.ed_tailp = HTOO32(tdphys); 2133 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 2134 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2135 2136 switch (xfertype) { 2137 case UE_CONTROL: 2138 pipe->up_methods = &ohci_device_ctrl_methods; 2139 err = usb_allocmem(&sc->sc_bus, 2140 sizeof(usb_device_request_t), 2141 0, &opipe->ctrl.reqdma); 2142 if (err) 2143 goto bad; 2144 mutex_enter(&sc->sc_lock); 2145 ohci_add_ed(sc, sed, sc->sc_ctrl_head); 2146 mutex_exit(&sc->sc_lock); 2147 break; 2148 case UE_INTERRUPT: 2149 pipe->up_methods = &ohci_device_intr_methods; 2150 ival = pipe->up_interval; 2151 if (ival == USBD_DEFAULT_INTERVAL) 2152 ival = ed->bInterval; 2153 err = ohci_device_setintr(sc, opipe, ival); 2154 if (err) 2155 goto bad; 2156 break; 2157 case UE_ISOCHRONOUS: 2158 pipe->up_serialise = false; 2159 pipe->up_methods = &ohci_device_isoc_methods; 2160 return ohci_setup_isoc(pipe); 2161 case UE_BULK: 2162 pipe->up_methods = &ohci_device_bulk_methods; 2163 mutex_enter(&sc->sc_lock); 2164 ohci_add_ed(sc, sed, sc->sc_bulk_head); 2165 mutex_exit(&sc->sc_lock); 2166 break; 2167 } 2168 } 2169 2170 return USBD_NORMAL_COMPLETION; 2171 2172 bad: 2173 if (std != NULL) { 2174 ohci_free_std(sc, std); 2175 } 2176 if (sed != NULL) 2177 ohci_free_sed(sc, sed); 2178 return err; 2179 2180 } 2181 2182 /* 2183 * Close a reqular pipe. 2184 * Assumes that there are no pending transactions. 2185 */ 2186 void 2187 ohci_close_pipe(struct usbd_pipe *pipe, ohci_soft_ed_t *head) 2188 { 2189 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 2190 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 2191 ohci_soft_ed_t *sed = opipe->sed; 2192 2193 KASSERT(mutex_owned(&sc->sc_lock)); 2194 2195 #ifdef DIAGNOSTIC 2196 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 2197 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2198 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) { 2199 ohci_soft_td_t *std; 2200 std = ohci_hash_find_td(sc, O32TOH(sed->ed.ed_headp)); 2201 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 2202 "tl=0x%x pipe=%p, std=%p\n", sed, 2203 (int)O32TOH(sed->ed.ed_headp), 2204 (int)O32TOH(sed->ed.ed_tailp), 2205 pipe, std); 2206 #ifdef OHCI_DEBUG 2207 usbd_dump_pipe(&opipe->pipe); 2208 ohci_dump_ed(sc, sed); 2209 if (std) 2210 ohci_dump_td(sc, std); 2211 #endif 2212 usb_delay_ms(&sc->sc_bus, 2); 2213 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2214 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) 2215 printf("ohci_close_pipe: pipe still not empty\n"); 2216 } 2217 #endif 2218 ohci_rem_ed(sc, sed, head); 2219 /* Make sure the host controller is not touching this ED */ 2220 usb_delay_ms(&sc->sc_bus, 1); 2221 pipe->up_endpoint->ue_toggle = 2222 (O32TOH(sed->ed.ed_headp) & OHCI_TOGGLECARRY) ? 1 : 0; 2223 ohci_free_sed_locked(sc, opipe->sed); 2224 } 2225 2226 /* 2227 * Abort a device request. 2228 * If this routine is called at splusb() it guarantees that the request 2229 * will be removed from the hardware scheduling and that the callback 2230 * for it will be called with USBD_CANCELLED status. 2231 * It's impossible to guarantee that the requested transfer will not 2232 * have happened since the hardware runs concurrently. 2233 * If the transaction has already happened we rely on the ordinary 2234 * interrupt processing to process it. 2235 * XXX This is most probably wrong. 2236 * XXXMRG this doesn't make sense anymore. 2237 */ 2238 void 2239 ohci_abort_xfer(struct usbd_xfer *xfer, usbd_status status) 2240 { 2241 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 2242 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2243 ohci_soft_ed_t *sed = opipe->sed; 2244 ohci_soft_td_t *p, *n; 2245 ohci_physaddr_t headp; 2246 int hit; 2247 int wake; 2248 2249 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2250 DPRINTF("xfer=%p pipe=%p sed=%p", xfer, opipe,sed, 0); 2251 2252 KASSERT(mutex_owned(&sc->sc_lock)); 2253 ASSERT_SLEEPABLE(); 2254 2255 if (sc->sc_dying) { 2256 /* If we're dying, just do the software part. */ 2257 xfer->ux_status = status; /* make software ignore it */ 2258 callout_halt(&xfer->ux_callout, &sc->sc_lock); 2259 usb_transfer_complete(xfer); 2260 return; 2261 } 2262 2263 /* 2264 * If an abort is already in progress then just wait for it to 2265 * complete and return. 2266 */ 2267 if (xfer->ux_hcflags & UXFER_ABORTING) { 2268 DPRINTFN(2, "already aborting", 0, 0, 0, 0); 2269 #ifdef DIAGNOSTIC 2270 if (status == USBD_TIMEOUT) 2271 printf("%s: TIMEOUT while aborting\n", __func__); 2272 #endif 2273 /* Override the status which might be USBD_TIMEOUT. */ 2274 xfer->ux_status = status; 2275 DPRINTFN(2, "waiting for abort to finish", 0, 0, 0, 0); 2276 xfer->ux_hcflags |= UXFER_ABORTWAIT; 2277 while (xfer->ux_hcflags & UXFER_ABORTING) 2278 cv_wait(&xfer->ux_hccv, &sc->sc_lock); 2279 goto done; 2280 } 2281 xfer->ux_hcflags |= UXFER_ABORTING; 2282 2283 /* 2284 * Step 1: Make interrupt routine and hardware ignore xfer. 2285 */ 2286 xfer->ux_status = status; /* make software ignore it */ 2287 callout_stop(&xfer->ux_callout); 2288 DPRINTFN(1, "stop ed=%p", sed, 0, 0, 0); 2289 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2290 sizeof(sed->ed.ed_flags), 2291 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2292 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */ 2293 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2294 sizeof(sed->ed.ed_flags), 2295 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2296 2297 /* 2298 * Step 2: Wait until we know hardware has finished any possible 2299 * use of the xfer. Also make sure the soft interrupt routine 2300 * has run. 2301 */ 2302 /* Hardware finishes in 1ms */ 2303 usb_delay_ms_locked(opipe->pipe.up_dev->ud_bus, 20, &sc->sc_lock); 2304 sc->sc_softwake = 1; 2305 usb_schedsoftintr(&sc->sc_bus); 2306 cv_wait(&sc->sc_softwake_cv, &sc->sc_lock); 2307 2308 /* 2309 * Step 3: Remove any vestiges of the xfer from the hardware. 2310 * The complication here is that the hardware may have executed 2311 * beyond the xfer we're trying to abort. So as we're scanning 2312 * the TDs of this xfer we check if the hardware points to 2313 * any of them. 2314 */ 2315 p = xfer->ux_hcpriv; 2316 KASSERT(p); 2317 2318 #ifdef OHCI_DEBUG 2319 DPRINTF("--- dump start ---", 0, 0, 0, 0); 2320 2321 if (ohcidebug >= 2) { 2322 DPRINTF("sed:", 0, 0, 0, 0); 2323 ohci_dump_ed(sc, sed); 2324 ohci_dump_tds(sc, p); 2325 } 2326 DPRINTF("--- dump end ---", 0, 0, 0, 0); 2327 #endif 2328 headp = O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK; 2329 hit = 0; 2330 for (; p->xfer == xfer; p = n) { 2331 hit |= headp == p->physaddr; 2332 n = p->nexttd; 2333 ohci_hash_rem_td(sc, p); 2334 } 2335 /* Zap headp register if hardware pointed inside the xfer. */ 2336 if (hit) { 2337 DPRINTFN(1, "set hd=0x%08x, tl=0x%08x", (int)p->physaddr, 2338 (int)O32TOH(sed->ed.ed_tailp), 0, 0); 2339 sed->ed.ed_headp = HTOO32(p->physaddr); /* unlink TDs */ 2340 usb_syncmem(&sed->dma, 2341 sed->offs + offsetof(ohci_ed_t, ed_headp), 2342 sizeof(sed->ed.ed_headp), 2343 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2344 } else { 2345 DPRINTFN(1, "no hit", 0, 0, 0, 0); 2346 } 2347 2348 /* 2349 * Step 4: Turn on hardware again. 2350 */ 2351 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2352 sizeof(sed->ed.ed_flags), 2353 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2354 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */ 2355 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2356 sizeof(sed->ed.ed_flags), 2357 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2358 2359 /* 2360 * Step 5: Execute callback. 2361 */ 2362 wake = xfer->ux_hcflags & UXFER_ABORTWAIT; 2363 xfer->ux_hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT); 2364 usb_transfer_complete(xfer); 2365 if (wake) 2366 cv_broadcast(&xfer->ux_hccv); 2367 2368 done: 2369 KASSERT(mutex_owned(&sc->sc_lock)); 2370 } 2371 2372 /* 2373 * Data structures and routines to emulate the root hub. 2374 */ 2375 Static int 2376 ohci_roothub_ctrl(struct usbd_bus *bus, usb_device_request_t *req, 2377 void *buf, int buflen) 2378 { 2379 ohci_softc_t *sc = OHCI_BUS2SC(bus); 2380 usb_port_status_t ps; 2381 uint16_t len, value, index; 2382 int l, totlen = 0; 2383 int port, i; 2384 uint32_t v; 2385 2386 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2387 2388 if (sc->sc_dying) 2389 return -1; 2390 2391 DPRINTFN(4, "type=0x%02x request=%02x", req->bmRequestType, 2392 req->bRequest, 0, 0); 2393 2394 len = UGETW(req->wLength); 2395 value = UGETW(req->wValue); 2396 index = UGETW(req->wIndex); 2397 2398 #define C(x,y) ((x) | ((y) << 8)) 2399 switch (C(req->bRequest, req->bmRequestType)) { 2400 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2401 DPRINTFN(8, "wValue=0x%04x", value, 0, 0, 0); 2402 if (len == 0) 2403 break; 2404 switch (value) { 2405 case C(0, UDESC_DEVICE): { 2406 usb_device_descriptor_t devd; 2407 2408 totlen = min(buflen, sizeof(devd)); 2409 memcpy(&devd, buf, totlen); 2410 USETW(devd.idVendor, sc->sc_id_vendor); 2411 memcpy(buf, &devd, totlen); 2412 break; 2413 } 2414 case C(1, UDESC_STRING): 2415 #define sd ((usb_string_descriptor_t *)buf) 2416 /* Vendor */ 2417 totlen = usb_makestrdesc(sd, len, sc->sc_vendor); 2418 break; 2419 case C(2, UDESC_STRING): 2420 /* Product */ 2421 totlen = usb_makestrdesc(sd, len, "OHCI root hub"); 2422 break; 2423 #undef sd 2424 default: 2425 /* default from usbroothub */ 2426 return buflen; 2427 } 2428 break; 2429 2430 /* Hub requests */ 2431 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2432 break; 2433 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2434 DPRINTFN(8, "UR_CLEAR_PORT_FEATURE port=%d feature=%d", 2435 index, value, 0, 0); 2436 if (index < 1 || index > sc->sc_noport) { 2437 return -1; 2438 } 2439 port = OHCI_RH_PORT_STATUS(index); 2440 switch(value) { 2441 case UHF_PORT_ENABLE: 2442 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2443 break; 2444 case UHF_PORT_SUSPEND: 2445 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2446 break; 2447 case UHF_PORT_POWER: 2448 /* Yes, writing to the LOW_SPEED bit clears power. */ 2449 OWRITE4(sc, port, UPS_LOW_SPEED); 2450 break; 2451 case UHF_C_PORT_CONNECTION: 2452 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2453 break; 2454 case UHF_C_PORT_ENABLE: 2455 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2456 break; 2457 case UHF_C_PORT_SUSPEND: 2458 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2459 break; 2460 case UHF_C_PORT_OVER_CURRENT: 2461 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2462 break; 2463 case UHF_C_PORT_RESET: 2464 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2465 break; 2466 default: 2467 return -1; 2468 } 2469 switch(value) { 2470 case UHF_C_PORT_CONNECTION: 2471 case UHF_C_PORT_ENABLE: 2472 case UHF_C_PORT_SUSPEND: 2473 case UHF_C_PORT_OVER_CURRENT: 2474 case UHF_C_PORT_RESET: 2475 /* Enable RHSC interrupt if condition is cleared. */ 2476 if ((OREAD4(sc, port) >> 16) == 0) 2477 ohci_rhsc_enable(sc); 2478 break; 2479 default: 2480 break; 2481 } 2482 break; 2483 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2484 if (len == 0) 2485 break; 2486 if ((value & 0xff) != 0) { 2487 return -1; 2488 } 2489 usb_hub_descriptor_t hubd; 2490 2491 totlen = min(buflen, sizeof(hubd)); 2492 memcpy(&hubd, buf, totlen); 2493 2494 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2495 hubd.bNbrPorts = sc->sc_noport; 2496 USETW(hubd.wHubCharacteristics, 2497 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2498 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2499 /* XXX overcurrent */ 2500 ); 2501 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2502 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2503 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2504 hubd.DeviceRemovable[i++] = (uint8_t)v; 2505 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2506 totlen = min(totlen, hubd.bDescLength); 2507 memcpy(buf, &hubd, totlen); 2508 break; 2509 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2510 if (len != 4) { 2511 return -1; 2512 } 2513 memset(buf, 0, len); /* ? XXX */ 2514 totlen = len; 2515 break; 2516 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2517 DPRINTFN(8, "get port status i=%d", index, 0, 0, 0); 2518 if (index < 1 || index > sc->sc_noport) { 2519 return -1; 2520 } 2521 if (len != 4) { 2522 return -1; 2523 } 2524 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2525 DPRINTFN(8, "port status=0x%04x", v, 0, 0, 0); 2526 USETW(ps.wPortStatus, v); 2527 USETW(ps.wPortChange, v >> 16); 2528 totlen = min(len, sizeof(ps)); 2529 memcpy(buf, &ps, totlen); 2530 break; 2531 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2532 return -1; 2533 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2534 break; 2535 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2536 if (index < 1 || index > sc->sc_noport) { 2537 return -1; 2538 } 2539 port = OHCI_RH_PORT_STATUS(index); 2540 switch(value) { 2541 case UHF_PORT_ENABLE: 2542 OWRITE4(sc, port, UPS_PORT_ENABLED); 2543 break; 2544 case UHF_PORT_SUSPEND: 2545 OWRITE4(sc, port, UPS_SUSPEND); 2546 break; 2547 case UHF_PORT_RESET: 2548 DPRINTFN(5, "reset port %d", index, 0, 0, 0); 2549 OWRITE4(sc, port, UPS_RESET); 2550 for (i = 0; i < 5; i++) { 2551 usb_delay_ms(&sc->sc_bus, 2552 USB_PORT_ROOT_RESET_DELAY); 2553 if (sc->sc_dying) { 2554 return -1; 2555 } 2556 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2557 break; 2558 } 2559 DPRINTFN(8, "port %d reset, status = 0x%04x", index, 2560 OREAD4(sc, port), 0, 0); 2561 break; 2562 case UHF_PORT_POWER: 2563 DPRINTFN(2, "set port power %d", index, 0, 0, 0); 2564 OWRITE4(sc, port, UPS_PORT_POWER); 2565 break; 2566 default: 2567 return -1; 2568 } 2569 break; 2570 default: 2571 /* default from usbroothub */ 2572 return buflen; 2573 } 2574 2575 return totlen; 2576 } 2577 2578 Static usbd_status 2579 ohci_root_intr_transfer(struct usbd_xfer *xfer) 2580 { 2581 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2582 usbd_status err; 2583 2584 /* Insert last in queue. */ 2585 mutex_enter(&sc->sc_lock); 2586 err = usb_insert_transfer(xfer); 2587 mutex_exit(&sc->sc_lock); 2588 if (err) 2589 return err; 2590 2591 /* Pipe isn't running, start first */ 2592 return ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 2593 } 2594 2595 Static usbd_status 2596 ohci_root_intr_start(struct usbd_xfer *xfer) 2597 { 2598 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2599 2600 if (sc->sc_dying) 2601 return USBD_IOERROR; 2602 2603 mutex_enter(&sc->sc_lock); 2604 KASSERT(sc->sc_intrxfer == NULL); 2605 sc->sc_intrxfer = xfer; 2606 mutex_exit(&sc->sc_lock); 2607 2608 return USBD_IN_PROGRESS; 2609 } 2610 2611 /* Abort a root interrupt request. */ 2612 Static void 2613 ohci_root_intr_abort(struct usbd_xfer *xfer) 2614 { 2615 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2616 2617 KASSERT(mutex_owned(&sc->sc_lock)); 2618 KASSERT(xfer->ux_pipe->up_intrxfer == xfer); 2619 2620 sc->sc_intrxfer = NULL; 2621 2622 xfer->ux_status = USBD_CANCELLED; 2623 usb_transfer_complete(xfer); 2624 } 2625 2626 /* Close the root pipe. */ 2627 Static void 2628 ohci_root_intr_close(struct usbd_pipe *pipe) 2629 { 2630 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 2631 2632 KASSERT(mutex_owned(&sc->sc_lock)); 2633 2634 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2635 2636 sc->sc_intrxfer = NULL; 2637 } 2638 2639 /************************/ 2640 2641 int 2642 ohci_device_ctrl_init(struct usbd_xfer *xfer) 2643 { 2644 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 2645 usb_device_request_t *req = &xfer->ux_request; 2646 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2647 ohci_soft_td_t *stat, *setup; 2648 int isread = req->bmRequestType & UT_READ; 2649 int len = xfer->ux_bufsize; 2650 int err = ENOMEM; 2651 2652 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2653 2654 setup = ohci_alloc_std(sc); 2655 if (setup == NULL) { 2656 goto bad1; 2657 } 2658 stat = ohci_alloc_std(sc); 2659 if (stat == NULL) { 2660 goto bad2; 2661 } 2662 2663 ox->ox_setup = setup; 2664 ox->ox_stat = stat; 2665 ox->ox_nstd = 0; 2666 2667 /* Set up data transaction */ 2668 if (len != 0) { 2669 err = ohci_alloc_std_chain(sc, xfer, len, isread); 2670 if (err) { 2671 goto bad3; 2672 } 2673 } 2674 return 0; 2675 2676 bad3: 2677 ohci_free_std(sc, stat); 2678 bad2: 2679 ohci_free_std(sc, setup); 2680 bad1: 2681 return err; 2682 } 2683 2684 void 2685 ohci_device_ctrl_fini(struct usbd_xfer *xfer) 2686 { 2687 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 2688 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2689 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 2690 2691 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2692 DPRINTFN(8, "xfer %p nstd %d", xfer, ox->ox_nstd, 0, 0); 2693 2694 mutex_enter(&sc->sc_lock); 2695 if (ox->ox_setup != opipe->tail.td) { 2696 ohci_free_std_locked(sc, ox->ox_setup); 2697 } 2698 for (size_t i = 0; i < ox->ox_nstd; i++) { 2699 ohci_soft_td_t *std = ox->ox_stds[i]; 2700 if (std == NULL) 2701 break; 2702 ohci_free_std_locked(sc, std); 2703 } 2704 ohci_free_std_locked(sc, ox->ox_stat); 2705 mutex_exit(&sc->sc_lock); 2706 2707 if (ox->ox_nstd) { 2708 const size_t sz = sizeof(ohci_soft_td_t *) * ox->ox_nstd; 2709 kmem_free(ox->ox_stds, sz); 2710 } 2711 } 2712 2713 Static usbd_status 2714 ohci_device_ctrl_transfer(struct usbd_xfer *xfer) 2715 { 2716 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2717 usbd_status err; 2718 2719 /* Insert last in queue. */ 2720 mutex_enter(&sc->sc_lock); 2721 err = usb_insert_transfer(xfer); 2722 mutex_exit(&sc->sc_lock); 2723 if (err) 2724 return err; 2725 2726 /* Pipe isn't running, start first */ 2727 return ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 2728 } 2729 2730 Static usbd_status 2731 ohci_device_ctrl_start(struct usbd_xfer *xfer) 2732 { 2733 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2734 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 2735 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 2736 usb_device_request_t *req = &xfer->ux_request; 2737 struct usbd_device *dev __diagused = opipe->pipe.up_dev; 2738 ohci_soft_td_t *setup, *stat, *next, *tail; 2739 ohci_soft_ed_t *sed; 2740 int isread; 2741 int len; 2742 2743 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2744 2745 if (sc->sc_dying) 2746 return USBD_IOERROR; 2747 2748 KASSERT(xfer->ux_rqflags & URQ_REQUEST); 2749 2750 isread = req->bmRequestType & UT_READ; 2751 len = UGETW(req->wLength); 2752 2753 DPRINTF("xfer=%p len=%d, addr=%d, endpt=%d", xfer, len, dev->ud_addr, 2754 opipe->pipe.up_endpoint->ue_edesc->bEndpointAddress); 2755 DPRINTF("type=0x%02x, request=0x%02x, wValue=0x%04x, wIndex=0x%04x", 2756 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2757 UGETW(req->wIndex)); 2758 2759 /* Need to take lock here for pipe->tail.td */ 2760 mutex_enter(&sc->sc_lock); 2761 2762 /* 2763 * Use the pipe "tail" TD as our first and loan our first TD to the 2764 * next transfer 2765 */ 2766 setup = opipe->tail.td; 2767 opipe->tail.td = ox->ox_setup; 2768 ox->ox_setup = setup; 2769 2770 stat = ox->ox_stat; 2771 2772 /* point at sentinel */ 2773 tail = opipe->tail.td; 2774 sed = opipe->sed; 2775 2776 KASSERTMSG(OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)) == dev->ud_addr, 2777 "address ED %d pipe %d\n", 2778 OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)), dev->ud_addr); 2779 KASSERTMSG(OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)) == 2780 UGETW(opipe->pipe.up_endpoint->ue_edesc->wMaxPacketSize), 2781 "MPL ED %d pipe %d\n", 2782 OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)), 2783 UGETW(opipe->pipe.up_endpoint->ue_edesc->wMaxPacketSize)); 2784 2785 /* next will point to data if len != 0 */ 2786 next = stat; 2787 2788 /* Set up data transaction */ 2789 if (len != 0) { 2790 ohci_soft_td_t *std; 2791 ohci_soft_td_t *end; 2792 2793 next = ox->ox_stds[0]; 2794 ohci_reset_std_chain(sc, xfer, len, isread, next, &end); 2795 2796 end->td.td_nexttd = HTOO32(stat->physaddr); 2797 end->nexttd = stat; 2798 2799 usb_syncmem(&end->dma, 2800 end->offs + offsetof(ohci_td_t, td_nexttd), 2801 sizeof(end->td.td_nexttd), 2802 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2803 2804 usb_syncmem(&xfer->ux_dmabuf, 0, len, 2805 isread ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 2806 std = ox->ox_stds[0]; 2807 /* Start toggle at 1 and then use the carried toggle. */ 2808 std->td.td_flags &= HTOO32(~OHCI_TD_TOGGLE_MASK); 2809 std->td.td_flags |= HTOO32(OHCI_TD_TOGGLE_1); 2810 usb_syncmem(&std->dma, 2811 std->offs + offsetof(ohci_td_t, td_flags), 2812 sizeof(std->td.td_flags), 2813 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2814 } 2815 2816 DPRINTFN(8, "setup %p data %p stat %p tail %p", setup, 2817 (len != 0 ? ox->ox_stds[0] : NULL), stat, tail); 2818 KASSERT(opipe->tail.td == tail); 2819 2820 memcpy(KERNADDR(&opipe->ctrl.reqdma, 0), req, sizeof(*req)); 2821 usb_syncmem(&opipe->ctrl.reqdma, 0, sizeof(*req), BUS_DMASYNC_PREWRITE); 2822 2823 setup->td.td_flags = HTOO32(OHCI_TD_SETUP | OHCI_TD_NOCC | 2824 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 2825 setup->td.td_cbp = HTOO32(DMAADDR(&opipe->ctrl.reqdma, 0)); 2826 setup->td.td_nexttd = HTOO32(next->physaddr); 2827 setup->td.td_be = HTOO32(O32TOH(setup->td.td_cbp) + sizeof(*req) - 1); 2828 setup->nexttd = next; 2829 setup->len = 0; 2830 setup->xfer = xfer; 2831 setup->flags = 0; 2832 ohci_hash_add_td(sc, setup); 2833 2834 xfer->ux_hcpriv = setup; 2835 usb_syncmem(&setup->dma, setup->offs, sizeof(setup->td), 2836 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2837 2838 stat->td.td_flags = HTOO32( 2839 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | 2840 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 2841 stat->td.td_cbp = 0; 2842 stat->td.td_nexttd = HTOO32(tail->physaddr); 2843 stat->td.td_be = 0; 2844 stat->nexttd = tail; 2845 stat->flags = OHCI_CALL_DONE; 2846 stat->len = 0; 2847 stat->xfer = xfer; 2848 ohci_hash_add_td(sc, stat); 2849 2850 usb_syncmem(&stat->dma, stat->offs, sizeof(stat->td), 2851 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2852 2853 memset(&tail->td, 0, sizeof(tail->td)); 2854 tail->nexttd = NULL; 2855 tail->xfer = NULL; 2856 2857 usb_syncmem(&tail->dma, tail->offs, sizeof(tail->td), 2858 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2859 2860 #ifdef OHCI_DEBUG 2861 USBHIST_LOGN(ohcidebug, 5, "--- dump start ---", 0, 0, 0, 0); 2862 if (ohcidebug >= 5) { 2863 ohci_dump_ed(sc, sed); 2864 ohci_dump_tds(sc, setup); 2865 } 2866 USBHIST_LOGN(ohcidebug, 5, "--- dump end ---", 0, 0, 0, 0); 2867 #endif 2868 2869 /* Insert ED in schedule */ 2870 sed->ed.ed_tailp = HTOO32(tail->physaddr); 2871 usb_syncmem(&sed->dma, 2872 sed->offs + offsetof(ohci_ed_t, ed_tailp), 2873 sizeof(sed->ed.ed_tailp), 2874 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2875 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 2876 if (xfer->ux_timeout && !sc->sc_bus.ub_usepolling) { 2877 callout_reset(&xfer->ux_callout, mstohz(xfer->ux_timeout), 2878 ohci_timeout, xfer); 2879 } 2880 2881 DPRINTF("done", 0, 0, 0, 0); 2882 2883 mutex_exit(&sc->sc_lock); 2884 2885 if (sc->sc_bus.ub_usepolling) 2886 ohci_waitintr(sc, xfer); 2887 2888 return USBD_IN_PROGRESS; 2889 } 2890 2891 /* Abort a device control request. */ 2892 Static void 2893 ohci_device_ctrl_abort(struct usbd_xfer *xfer) 2894 { 2895 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 2896 2897 KASSERT(mutex_owned(&sc->sc_lock)); 2898 2899 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2900 DPRINTF("xfer=%p", xfer, 0, 0, 0); 2901 ohci_abort_xfer(xfer, USBD_CANCELLED); 2902 } 2903 2904 /* Close a device control pipe. */ 2905 Static void 2906 ohci_device_ctrl_close(struct usbd_pipe *pipe) 2907 { 2908 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 2909 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 2910 2911 KASSERT(mutex_owned(&sc->sc_lock)); 2912 2913 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2914 DPRINTF("pipe=%p", pipe, 0, 0, 0); 2915 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2916 ohci_free_std_locked(sc, opipe->tail.td); 2917 } 2918 2919 /************************/ 2920 2921 Static void 2922 ohci_device_clear_toggle(struct usbd_pipe *pipe) 2923 { 2924 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 2925 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 2926 2927 opipe->sed->ed.ed_headp &= HTOO32(~OHCI_TOGGLECARRY); 2928 } 2929 2930 Static void 2931 ohci_noop(struct usbd_pipe *pipe) 2932 { 2933 } 2934 2935 Static int 2936 ohci_device_bulk_init(struct usbd_xfer *xfer) 2937 { 2938 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2939 int len = xfer->ux_bufsize; 2940 int endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress;; 2941 int isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2942 int err; 2943 2944 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2945 2946 KASSERT(!(xfer->ux_rqflags & URQ_REQUEST)); 2947 2948 DPRINTFN(4, "xfer=%p len=%d isread=%d flags=%d", xfer, len, isread, 2949 xfer->ux_flags); 2950 DPRINTFN(4, "endpt=%d", endpt, 0, 0, 0); 2951 2952 /* Allocate a chain of new TDs (including a new tail). */ 2953 err = ohci_alloc_std_chain(sc, xfer, len, isread); 2954 if (err) 2955 return err; 2956 2957 return 0; 2958 } 2959 2960 Static void 2961 ohci_device_bulk_fini(struct usbd_xfer *xfer) 2962 { 2963 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2964 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 2965 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 2966 2967 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2968 DPRINTFN(8, "xfer %p nstd %d", xfer, ox->ox_nstd, 0, 0); 2969 2970 mutex_enter(&sc->sc_lock); 2971 for (size_t i = 0; i < ox->ox_nstd; i++) { 2972 ohci_soft_td_t *std = ox->ox_stds[i]; 2973 if (std == NULL) 2974 break; 2975 if (std != opipe->tail.td) 2976 ohci_free_std_locked(sc, std); 2977 } 2978 mutex_exit(&sc->sc_lock); 2979 2980 if (ox->ox_nstd) { 2981 const size_t sz = sizeof(ohci_soft_td_t *) * ox->ox_nstd; 2982 kmem_free(ox->ox_stds, sz); 2983 } 2984 } 2985 2986 Static usbd_status 2987 ohci_device_bulk_transfer(struct usbd_xfer *xfer) 2988 { 2989 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2990 usbd_status err; 2991 2992 /* Insert last in queue. */ 2993 mutex_enter(&sc->sc_lock); 2994 err = usb_insert_transfer(xfer); 2995 mutex_exit(&sc->sc_lock); 2996 if (err) 2997 return err; 2998 2999 /* Pipe isn't running, start first */ 3000 return ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 3001 } 3002 3003 Static usbd_status 3004 ohci_device_bulk_start(struct usbd_xfer *xfer) 3005 { 3006 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3007 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 3008 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3009 ohci_soft_td_t *last; 3010 ohci_soft_td_t *data, *tail, *tdp; 3011 ohci_soft_ed_t *sed; 3012 int len, isread, endpt; 3013 3014 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3015 3016 if (sc->sc_dying) 3017 return USBD_IOERROR; 3018 3019 KASSERT(!(xfer->ux_rqflags & URQ_REQUEST)); 3020 3021 len = xfer->ux_length; 3022 endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress; 3023 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3024 sed = opipe->sed; 3025 3026 DPRINTFN(4, "xfer=%p len=%d isread=%d flags=%d", xfer, len, isread, 3027 xfer->ux_flags); 3028 DPRINTFN(4, "endpt=%d", endpt, 0, 0, 0); 3029 3030 mutex_enter(&sc->sc_lock); 3031 3032 /* 3033 * Use the pipe "tail" TD as our first and loan our first TD to the 3034 * next transfer 3035 */ 3036 data = opipe->tail.td; 3037 opipe->tail.td = ox->ox_stds[0]; 3038 ox->ox_stds[0] = data; 3039 ohci_reset_std_chain(sc, xfer, len, isread, data, &last); 3040 3041 /* point at sentinel */ 3042 tail = opipe->tail.td; 3043 memset(&tail->td, 0, sizeof(tail->td)); 3044 tail->nexttd = NULL; 3045 tail->xfer = NULL; 3046 usb_syncmem(&tail->dma, tail->offs, sizeof(tail->td), 3047 BUS_DMASYNC_PREWRITE); 3048 xfer->ux_hcpriv = data; 3049 3050 DPRINTFN(8, "xfer %p data %p tail %p", xfer, ox->ox_stds[0], tail, 0); 3051 KASSERT(opipe->tail.td == tail); 3052 3053 /* We want interrupt at the end of the transfer. */ 3054 last->td.td_flags &= HTOO32(~OHCI_TD_INTR_MASK); 3055 last->td.td_flags |= HTOO32(OHCI_TD_SET_DI(1)); 3056 last->td.td_nexttd = HTOO32(tail->physaddr); 3057 last->nexttd = tail; 3058 last->flags |= OHCI_CALL_DONE; 3059 usb_syncmem(&last->dma, last->offs, sizeof(last->td), 3060 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3061 3062 DPRINTFN(4, "ed_flags=0x%08x td_flags=0x%08x " 3063 "td_cbp=0x%08x td_be=0x%08x", 3064 (int)O32TOH(sed->ed.ed_flags), 3065 (int)O32TOH(data->td.td_flags), 3066 (int)O32TOH(data->td.td_cbp), 3067 (int)O32TOH(data->td.td_be)); 3068 3069 #ifdef OHCI_DEBUG 3070 DPRINTFN(5, "--- dump start ---", 0, 0, 0, 0); 3071 if (ohcidebug >= 5) { 3072 ohci_dump_ed(sc, sed); 3073 ohci_dump_tds(sc, data); 3074 } 3075 DPRINTFN(5, "--- dump end ---", 0, 0, 0, 0); 3076 #endif 3077 3078 /* Insert ED in schedule */ 3079 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 3080 KASSERT(tdp->xfer == xfer); 3081 } 3082 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3083 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3084 sed->ed.ed_tailp = HTOO32(tail->physaddr); 3085 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3086 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3087 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3088 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 3089 if (xfer->ux_timeout && !sc->sc_bus.ub_usepolling) { 3090 callout_reset(&xfer->ux_callout, mstohz(xfer->ux_timeout), 3091 ohci_timeout, xfer); 3092 } 3093 mutex_exit(&sc->sc_lock); 3094 3095 return USBD_IN_PROGRESS; 3096 } 3097 3098 Static void 3099 ohci_device_bulk_abort(struct usbd_xfer *xfer) 3100 { 3101 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 3102 3103 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3104 3105 KASSERT(mutex_owned(&sc->sc_lock)); 3106 3107 DPRINTF("xfer=%p", xfer, 0, 0, 0); 3108 ohci_abort_xfer(xfer, USBD_CANCELLED); 3109 } 3110 3111 /* 3112 * Close a device bulk pipe. 3113 */ 3114 Static void 3115 ohci_device_bulk_close(struct usbd_pipe *pipe) 3116 { 3117 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 3118 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 3119 3120 KASSERT(mutex_owned(&sc->sc_lock)); 3121 3122 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3123 3124 DPRINTF("pipe=%p", pipe, 0, 0, 0); 3125 ohci_close_pipe(pipe, sc->sc_bulk_head); 3126 ohci_free_std_locked(sc, opipe->tail.td); 3127 } 3128 3129 /************************/ 3130 3131 Static int 3132 ohci_device_intr_init(struct usbd_xfer *xfer) 3133 { 3134 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3135 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3136 int len = xfer->ux_bufsize; 3137 int endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress;; 3138 int isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3139 int err; 3140 3141 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3142 3143 KASSERT(!(xfer->ux_rqflags & URQ_REQUEST)); 3144 KASSERT(len != 0); 3145 3146 DPRINTFN(4, "xfer=%p len=%d isread=%d flags=%d", xfer, len, isread, 3147 xfer->ux_flags); 3148 DPRINTFN(4, "endpt=%d", endpt, 0, 0, 0); 3149 3150 ox->ox_nstd = 0; 3151 3152 err = ohci_alloc_std_chain(sc, xfer, len, isread); 3153 if (err) { 3154 return err; 3155 } 3156 3157 return 0; 3158 } 3159 3160 Static void 3161 ohci_device_intr_fini(struct usbd_xfer *xfer) 3162 { 3163 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3164 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3165 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 3166 3167 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3168 DPRINTFN(8, "xfer %p nstd %d", xfer, ox->ox_nstd, 0, 0); 3169 3170 mutex_enter(&sc->sc_lock); 3171 for (size_t i = 0; i < ox->ox_nstd; i++) { 3172 ohci_soft_td_t *std = ox->ox_stds[i]; 3173 if (std != NULL) 3174 break; 3175 if (std != opipe->tail.td) 3176 ohci_free_std_locked(sc, std); 3177 } 3178 mutex_exit(&sc->sc_lock); 3179 3180 if (ox->ox_nstd) { 3181 const size_t sz = sizeof(ohci_soft_td_t *) * ox->ox_nstd; 3182 kmem_free(ox->ox_stds, sz); 3183 } 3184 } 3185 3186 Static usbd_status 3187 ohci_device_intr_transfer(struct usbd_xfer *xfer) 3188 { 3189 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3190 usbd_status err; 3191 3192 /* Insert last in queue. */ 3193 mutex_enter(&sc->sc_lock); 3194 err = usb_insert_transfer(xfer); 3195 mutex_exit(&sc->sc_lock); 3196 if (err) 3197 return err; 3198 3199 /* Pipe isn't running, start first */ 3200 return ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 3201 } 3202 3203 Static usbd_status 3204 ohci_device_intr_start(struct usbd_xfer *xfer) 3205 { 3206 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3207 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 3208 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3209 ohci_soft_ed_t *sed = opipe->sed; 3210 ohci_soft_td_t *data, *last, *tail; 3211 int len, isread, endpt; 3212 3213 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3214 3215 if (sc->sc_dying) 3216 return USBD_IOERROR; 3217 3218 DPRINTFN(3, "xfer=%p len=%d flags=%d priv=%p", xfer, xfer->ux_length, 3219 xfer->ux_flags, xfer->ux_priv); 3220 3221 KASSERT(!(xfer->ux_rqflags & URQ_REQUEST)); 3222 3223 len = xfer->ux_length; 3224 endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress; 3225 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3226 3227 mutex_enter(&sc->sc_lock); 3228 3229 /* 3230 * Use the pipe "tail" TD as our first and loan our first TD to the 3231 * next transfer. 3232 */ 3233 data = opipe->tail.td; 3234 opipe->tail.td = ox->ox_stds[0]; 3235 ox->ox_stds[0] = data; 3236 ohci_reset_std_chain(sc, xfer, len, isread, data, &last); 3237 3238 /* point at sentinel */ 3239 tail = opipe->tail.td; 3240 memset(&tail->td, 0, sizeof(tail->td)); 3241 tail->nexttd = NULL; 3242 tail->xfer = NULL; 3243 usb_syncmem(&tail->dma, tail->offs, sizeof(tail->td), 3244 BUS_DMASYNC_PREWRITE); 3245 xfer->ux_hcpriv = data; 3246 3247 DPRINTFN(8, "data %p tail %p", ox->ox_stds[0], tail, 0, 0); 3248 KASSERT(opipe->tail.td == tail); 3249 3250 /* We want interrupt at the end of the transfer. */ 3251 last->td.td_flags &= HTOO32(~OHCI_TD_INTR_MASK); 3252 last->td.td_flags |= HTOO32(OHCI_TD_SET_DI(1)); 3253 3254 last->td.td_nexttd = HTOO32(tail->physaddr); 3255 last->nexttd = tail; 3256 last->flags |= OHCI_CALL_DONE; 3257 usb_syncmem(&last->dma, last->offs, sizeof(last->td), 3258 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3259 3260 #ifdef OHCI_DEBUG 3261 DPRINTFN(5, "--- dump start ---", 0, 0, 0, 0); 3262 if (ohcidebug >= 5) { 3263 ohci_dump_ed(sc, sed); 3264 ohci_dump_tds(sc, data); 3265 } 3266 DPRINTFN(5, "--- dump end ---", 0, 0, 0, 0); 3267 #endif 3268 3269 /* Insert ED in schedule */ 3270 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3271 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3272 sed->ed.ed_tailp = HTOO32(tail->physaddr); 3273 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3274 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3275 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3276 3277 mutex_exit(&sc->sc_lock); 3278 3279 return USBD_IN_PROGRESS; 3280 } 3281 3282 /* Abort a device interrupt request. */ 3283 Static void 3284 ohci_device_intr_abort(struct usbd_xfer *xfer) 3285 { 3286 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 3287 3288 KASSERT(mutex_owned(&sc->sc_lock)); 3289 KASSERT(xfer->ux_pipe->up_intrxfer == xfer); 3290 3291 ohci_abort_xfer(xfer, USBD_CANCELLED); 3292 } 3293 3294 /* Close a device interrupt pipe. */ 3295 Static void 3296 ohci_device_intr_close(struct usbd_pipe *pipe) 3297 { 3298 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 3299 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 3300 int nslots = opipe->intr.nslots; 3301 int pos = opipe->intr.pos; 3302 int j; 3303 ohci_soft_ed_t *p, *sed = opipe->sed; 3304 3305 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3306 3307 KASSERT(mutex_owned(&sc->sc_lock)); 3308 3309 DPRINTFN(1, "pipe=%p nslots=%d pos=%d", pipe, nslots, pos, 0); 3310 usb_syncmem(&sed->dma, sed->offs, 3311 sizeof(sed->ed), BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3312 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 3313 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3314 sizeof(sed->ed.ed_flags), 3315 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3316 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 3317 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) 3318 usb_delay_ms_locked(&sc->sc_bus, 2, &sc->sc_lock); 3319 3320 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 3321 continue; 3322 KASSERT(p); 3323 p->next = sed->next; 3324 p->ed.ed_nexted = sed->ed.ed_nexted; 3325 usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted), 3326 sizeof(p->ed.ed_nexted), 3327 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3328 3329 for (j = 0; j < nslots; j++) 3330 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 3331 3332 ohci_free_std_locked(sc, opipe->tail.td); 3333 ohci_free_sed_locked(sc, opipe->sed); 3334 } 3335 3336 Static usbd_status 3337 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival) 3338 { 3339 int i, j, best; 3340 u_int npoll, slow, shigh, nslots; 3341 u_int bestbw, bw; 3342 ohci_soft_ed_t *hsed, *sed = opipe->sed; 3343 3344 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3345 3346 DPRINTFN(2, "pipe=%p", opipe, 0, 0, 0); 3347 if (ival == 0) { 3348 printf("ohci_setintr: 0 interval\n"); 3349 return USBD_INVAL; 3350 } 3351 3352 npoll = OHCI_NO_INTRS; 3353 while (npoll > ival) 3354 npoll /= 2; 3355 DPRINTFN(2, "ival=%d npoll=%d", ival, npoll, 0, 0); 3356 3357 /* 3358 * We now know which level in the tree the ED must go into. 3359 * Figure out which slot has most bandwidth left over. 3360 * Slots to examine: 3361 * npoll 3362 * 1 0 3363 * 2 1 2 3364 * 4 3 4 5 6 3365 * 8 7 8 9 10 11 12 13 14 3366 * N (N-1) .. (N-1+N-1) 3367 */ 3368 slow = npoll-1; 3369 shigh = slow + npoll; 3370 nslots = OHCI_NO_INTRS / npoll; 3371 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 3372 bw = 0; 3373 for (j = 0; j < nslots; j++) 3374 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 3375 if (bw < bestbw) { 3376 best = i; 3377 bestbw = bw; 3378 } 3379 } 3380 DPRINTFN(2, "best=%d(%d..%d) bestbw=%d", best, slow, shigh, bestbw); 3381 3382 mutex_enter(&sc->sc_lock); 3383 hsed = sc->sc_eds[best]; 3384 sed->next = hsed->next; 3385 usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags), 3386 sizeof(hsed->ed.ed_flags), 3387 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3388 sed->ed.ed_nexted = hsed->ed.ed_nexted; 3389 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3390 sizeof(sed->ed.ed_flags), 3391 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3392 hsed->next = sed; 3393 hsed->ed.ed_nexted = HTOO32(sed->physaddr); 3394 usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags), 3395 sizeof(hsed->ed.ed_flags), 3396 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3397 mutex_exit(&sc->sc_lock); 3398 3399 for (j = 0; j < nslots; j++) 3400 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 3401 opipe->intr.nslots = nslots; 3402 opipe->intr.pos = best; 3403 3404 DPRINTFN(5, "returns %p", opipe, 0, 0, 0); 3405 return USBD_NORMAL_COMPLETION; 3406 } 3407 3408 /***********************/ 3409 3410 Static int 3411 ohci_device_isoc_init(struct usbd_xfer *xfer) 3412 { 3413 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3414 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3415 ohci_soft_itd_t *sitd; 3416 size_t i; 3417 int err; 3418 3419 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3420 3421 DPRINTFN(1, "xfer %p len %d flags %d", xfer, xfer->ux_length, 3422 xfer->ux_flags, 0); 3423 3424 const size_t nfsitd = 3425 (xfer->ux_nframes + OHCI_ITD_NOFFSET - 1) / OHCI_ITD_NOFFSET; 3426 const size_t nbsitd = xfer->ux_bufsize / OHCI_PAGE_SIZE; 3427 const size_t nsitd = MAX(nfsitd, nbsitd) + 1; 3428 3429 ox->ox_sitds = kmem_zalloc(sizeof(ohci_soft_itd_t *) * nsitd, 3430 KM_SLEEP); 3431 ox->ox_nsitd = nsitd; 3432 3433 for (i = 0; i < nsitd; i++) { 3434 /* Allocate next ITD */ 3435 sitd = ohci_alloc_sitd(sc); 3436 if (sitd == NULL) { 3437 err = ENOMEM; 3438 goto fail; 3439 } 3440 ox->ox_sitds[i] = sitd; 3441 sitd->xfer = xfer; 3442 sitd->flags = 0; 3443 } 3444 3445 return 0; 3446 fail: 3447 for (; i > 0;) { 3448 ohci_free_sitd(sc, ox->ox_sitds[--i]); 3449 } 3450 return err; 3451 } 3452 3453 Static void 3454 ohci_device_isoc_fini(struct usbd_xfer *xfer) 3455 { 3456 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3457 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3458 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 3459 3460 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3461 3462 mutex_enter(&sc->sc_lock); 3463 for (size_t i = 0; i < ox->ox_nsitd; i++) { 3464 if (ox->ox_sitds[i] != opipe->tail.itd) { 3465 ohci_free_sitd_locked(sc, ox->ox_sitds[i]); 3466 } 3467 } 3468 mutex_exit(&sc->sc_lock); 3469 3470 if (ox->ox_nsitd) { 3471 const size_t sz = sizeof(ohci_soft_itd_t *) * ox->ox_nsitd; 3472 kmem_free(ox->ox_sitds, sz); 3473 } 3474 } 3475 3476 3477 usbd_status 3478 ohci_device_isoc_transfer(struct usbd_xfer *xfer) 3479 { 3480 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3481 usbd_status __diagused err; 3482 3483 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3484 3485 DPRINTFN(5, "xfer=%p", xfer, 0, 0, 0); 3486 3487 /* Put it on our queue, */ 3488 mutex_enter(&sc->sc_lock); 3489 err = usb_insert_transfer(xfer); 3490 mutex_exit(&sc->sc_lock); 3491 3492 KASSERT(err == USBD_NORMAL_COMPLETION); 3493 3494 /* insert into schedule, */ 3495 ohci_device_isoc_enter(xfer); 3496 3497 /* and start if the pipe wasn't running */ 3498 return USBD_IN_PROGRESS; 3499 } 3500 3501 void 3502 ohci_device_isoc_enter(struct usbd_xfer *xfer) 3503 { 3504 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3505 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 3506 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3507 ohci_soft_ed_t *sed = opipe->sed; 3508 ohci_soft_itd_t *sitd, *nsitd, *tail; 3509 ohci_physaddr_t buf, offs, noffs, bp0; 3510 int i, ncur, nframes; 3511 3512 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3513 DPRINTFN(5, "xfer=%p", xfer, 0, 0, 0); 3514 3515 mutex_enter(&sc->sc_lock); 3516 3517 if (sc->sc_dying) { 3518 mutex_exit(&sc->sc_lock); 3519 return; 3520 } 3521 3522 struct isoc *isoc = &opipe->isoc; 3523 3524 DPRINTFN(1, "used=%d next=%d xfer=%p nframes=%d", 3525 isoc->inuse, isoc->next, xfer, xfer->ux_nframes); 3526 3527 if (isoc->next == -1) { 3528 /* Not in use yet, schedule it a few frames ahead. */ 3529 isoc->next = O32TOH(sc->sc_hcca->hcca_frame_number) + 5; 3530 DPRINTFN(2,"start next=%d", isoc->next, 0, 0, 0); 3531 } 3532 3533 sitd = opipe->tail.itd; 3534 opipe->tail.itd = ox->ox_sitds[0]; 3535 ox->ox_sitds[0] = sitd; 3536 3537 buf = DMAADDR(&xfer->ux_dmabuf, 0); 3538 bp0 = OHCI_PAGE(buf); 3539 offs = OHCI_PAGE_OFFSET(buf); 3540 nframes = xfer->ux_nframes; 3541 xfer->ux_hcpriv = sitd; 3542 size_t j = 1; 3543 for (i = ncur = 0; i < nframes; i++, ncur++) { 3544 noffs = offs + xfer->ux_frlengths[i]; 3545 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ 3546 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */ 3547 3548 /* Allocate next ITD */ 3549 nsitd = ox->ox_sitds[j++]; 3550 KASSERT(nsitd != NULL); 3551 KASSERT(j < ox->ox_nsitd); 3552 3553 /* Fill current ITD */ 3554 sitd->itd.itd_flags = HTOO32( 3555 OHCI_ITD_NOCC | 3556 OHCI_ITD_SET_SF(isoc->next) | 3557 OHCI_ITD_SET_DI(6) | /* delay intr a little */ 3558 OHCI_ITD_SET_FC(ncur)); 3559 sitd->itd.itd_bp0 = HTOO32(bp0); 3560 sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr); 3561 sitd->itd.itd_be = HTOO32(bp0 + offs - 1); 3562 sitd->nextitd = nsitd; 3563 sitd->xfer = xfer; 3564 sitd->flags = 0; 3565 #ifdef DIAGNOSTIC 3566 sitd->isdone = false; 3567 #endif 3568 ohci_hash_add_itd(sc, sitd); 3569 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 3570 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3571 3572 sitd = nsitd; 3573 isoc->next = isoc->next + ncur; 3574 bp0 = OHCI_PAGE(buf + offs); 3575 ncur = 0; 3576 } 3577 sitd->itd.itd_offset[ncur] = HTOO16(OHCI_ITD_MK_OFFS(offs)); 3578 offs = noffs; 3579 } 3580 KASSERT(j <= ox->ox_nsitd); 3581 3582 /* point at sentinel */ 3583 tail = opipe->tail.itd; 3584 memset(&tail->itd, 0, sizeof(tail->itd)); 3585 tail->nextitd = NULL; 3586 tail->xfer = NULL; 3587 usb_syncmem(&tail->dma, tail->offs, sizeof(tail->itd), 3588 BUS_DMASYNC_PREWRITE); 3589 3590 /* Fixup last used ITD */ 3591 sitd->itd.itd_flags = HTOO32( 3592 OHCI_ITD_NOCC | 3593 OHCI_ITD_SET_SF(isoc->next) | 3594 OHCI_ITD_SET_DI(0) | 3595 OHCI_ITD_SET_FC(ncur)); 3596 sitd->itd.itd_bp0 = HTOO32(bp0); 3597 sitd->itd.itd_nextitd = HTOO32(tail->physaddr); 3598 sitd->itd.itd_be = HTOO32(bp0 + offs - 1); 3599 sitd->nextitd = tail; 3600 sitd->xfer = xfer; 3601 sitd->flags = OHCI_CALL_DONE; 3602 #ifdef DIAGNOSTIC 3603 sitd->isdone = false; 3604 #endif 3605 ohci_hash_add_itd(sc, sitd); 3606 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 3607 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3608 3609 isoc->next = isoc->next + ncur; 3610 isoc->inuse += nframes; 3611 3612 /* XXX pretend we did it all */ 3613 xfer->ux_actlen = offs; 3614 xfer->ux_status = USBD_IN_PROGRESS; 3615 3616 #ifdef OHCI_DEBUG 3617 if (ohcidebug >= 5) { 3618 DPRINTF("frame=%d", O32TOH(sc->sc_hcca->hcca_frame_number), 3619 0, 0, 0); 3620 ohci_dump_itds(sc, xfer->ux_hcpriv); 3621 ohci_dump_ed(sc, sed); 3622 } 3623 #endif 3624 3625 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3626 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3627 sed->ed.ed_tailp = HTOO32(tail->physaddr); 3628 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3629 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3630 sizeof(sed->ed.ed_flags), 3631 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3632 mutex_exit(&sc->sc_lock); 3633 } 3634 3635 void 3636 ohci_device_isoc_abort(struct usbd_xfer *xfer) 3637 { 3638 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 3639 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3640 ohci_soft_ed_t *sed; 3641 ohci_soft_itd_t *sitd; 3642 3643 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3644 DPRINTFN(1, "xfer=%p", xfer, 0, 0, 0); 3645 3646 KASSERT(mutex_owned(&sc->sc_lock)); 3647 3648 /* Transfer is already done. */ 3649 if (xfer->ux_status != USBD_NOT_STARTED && 3650 xfer->ux_status != USBD_IN_PROGRESS) { 3651 printf("ohci_device_isoc_abort: early return\n"); 3652 goto done; 3653 } 3654 3655 /* Give xfer the requested abort code. */ 3656 xfer->ux_status = USBD_CANCELLED; 3657 3658 sed = opipe->sed; 3659 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3660 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3661 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */ 3662 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3663 sizeof(sed->ed.ed_flags), 3664 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3665 3666 sitd = xfer->ux_hcpriv; 3667 KASSERT(sitd); 3668 3669 usb_delay_ms_locked(&sc->sc_bus, OHCI_ITD_NOFFSET, &sc->sc_lock); 3670 3671 for (; sitd->xfer == xfer; sitd = sitd->nextitd) { 3672 ohci_hash_rem_itd(sc, sitd); 3673 #ifdef DIAGNOSTIC 3674 DPRINTFN(1, "abort sets done sitd=%p", sitd, 0, 0, 0); 3675 sitd->isdone = true; 3676 #endif 3677 } 3678 3679 /* Run callback. */ 3680 usb_transfer_complete(xfer); 3681 3682 sed->ed.ed_headp = HTOO32(sitd->physaddr); /* unlink TDs */ 3683 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */ 3684 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3685 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3686 3687 done: 3688 KASSERT(mutex_owned(&sc->sc_lock)); 3689 } 3690 3691 void 3692 ohci_device_isoc_done(struct usbd_xfer *xfer) 3693 { 3694 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3695 DPRINTFN(1, "xfer=%p", xfer, 0, 0, 0); 3696 } 3697 3698 usbd_status 3699 ohci_setup_isoc(struct usbd_pipe *pipe) 3700 { 3701 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 3702 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 3703 struct isoc *isoc = &opipe->isoc; 3704 3705 isoc->next = -1; 3706 isoc->inuse = 0; 3707 3708 mutex_enter(&sc->sc_lock); 3709 ohci_add_ed(sc, opipe->sed, sc->sc_isoc_head); 3710 mutex_exit(&sc->sc_lock); 3711 3712 return USBD_NORMAL_COMPLETION; 3713 } 3714 3715 void 3716 ohci_device_isoc_close(struct usbd_pipe *pipe) 3717 { 3718 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 3719 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 3720 3721 KASSERT(mutex_owned(&sc->sc_lock)); 3722 3723 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3724 DPRINTF("pipe=%p", pipe, 0, 0, 0); 3725 ohci_close_pipe(pipe, sc->sc_isoc_head); 3726 #ifdef DIAGNOSTIC 3727 opipe->tail.itd->isdone = true; 3728 #endif 3729 ohci_free_sitd_locked(sc, opipe->tail.itd); 3730 } 3731
Indexes created Wed Sep 24 05:09:52 GMT 2025